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2015-10-27	Pavel Pisa	sysless: update for cmdproc correct return value of... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-10-27	Pavel Pisa	Update uLUt and sysless submodules. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-07-30	Pavel Pisa	USB CDC ACM use maximal packet length - 64 bytes.	commit \| commitdiff \| tree
2015-07-30	Pavel Pisa	Compute USB engine event mask by function.	commit \| commitdiff \| tree
2015-07-30	Pavel Pisa	USB CDC ACM send zero length packet if previous one...	commit \| commitdiff \| tree
2015-07-30	Pavel Pisa	Test option to use cmdproc IO as POSIX FILE stream.	commit \| commitdiff \| tree
2015-07-30	Pavel Pisa	USB CDC ACM target for command processor implemented.	commit \| commitdiff \| tree
2015-07-30	Pavel Pisa	uLUt and sysless submodules updated. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Include simple scripts to build, load and run project... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Shift some external signals by half of clock cycle... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Simplify FPGA design external CPU read logic. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Git ignore build outputs. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Remove nonstandard ieee.std_logic_arith and ieee.std_logic_u... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Include testbed for simulation in GHDL. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Disable use of unisim library to allow simulation by... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Include example of mapping dualported RAM mapping to... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-15	Pavel Pisa	Include hardware design of FPGA peripherals to external... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-13	Pavel Pisa	Switch LX_DAD default link variant to SDRAM. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-12	Pavel Pisa	Include host tool to send code and FPGA configuration... Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>	commit \| commitdiff \| tree
2015-02-12	Pavel Pisa	Prepare build-able skeleton for LX_DAD application.	commit \| commitdiff \| tree
2015-02-12	Pavel Pisa	LX_DAD project started.	commit \| commitdiff \| tree

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