rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-dad.git/commit

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author	Pavel Pisa <pisa@cmp.felk.cvut.cz>
	Sun, 15 Feb 2015 03:08:47 +0000 (04:08 +0100)
committer	Pavel Pisa <pisa@cmp.felk.cvut.cz>
	Sun, 15 Feb 2015 03:08:47 +0000 (04:08 +0100)
commit	727f8eb717f97b5091b97deebe75370601e9cedd
tree	38316f2bd89dea7a4fc20cfd9d92b9c82c1b4ce7	tree \| snapshot
parent	f6ad3f5023804a2f83e289434ca3d398d6171735	commit \| diff

Remove nonstandard ieee.std_logic_arith and ieee.std_logic_unsigned libraries.

This makes GHDL happy and can be used in standard mode.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>

hw/bus_example.vhd		diff \| blob \| history
hw/bus_measurement.vhd		diff \| blob \| history
hw/dff2.vhd		diff \| blob \| history
hw/dff3.vhd		diff \| blob \| history
hw/lx_crosdom_ser_fifo.vhd		diff \| blob \| history
hw/lx_dad_pkg.vhd		diff \| blob \| history
hw/lx_dad_top.vhd		diff \| blob \| history
hw/lx_example_mem.vhd		diff \| blob \| history
hw/measurement_register.vhd		diff \| blob \| history
hw/tb/Makefile		diff \| blob \| history