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(parent: def2d0c) | patch
Simplify FPGA design external CPU read logic.
authorPavel Pisa <pisa@cmp.felk.cvut.cz>
Sun, 15 Feb 2015 10:55:02 +0000 (11:55 +0100)
committerPavel Pisa <pisa@cmp.felk.cvut.cz>
Sun, 15 Feb 2015 11:14:14 +0000 (12:14 +0100)
commit5c8cb50ce62ea18abc2ef0998abf6aeeae12c92b
treebd5d9803f0fd29e463956a45f4715ee6d27a0d4ctree | snapshot
parentdef2d0cbf8998eb26135b897977c099d1f0c5f21commit | diff
Simplify FPGA design external CPU read logic.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
hw/bus_example.vhd diff | blob | history
hw/lx_dad_top.vhd diff | blob | history