]> rtime.felk.cvut.cz Git - fpga/uart.git/shortlog
fpga/uart.git
2011-02-04 Vladimir BurianFirst prototype of receiver shift register.
2011-01-28 Vladimir BurianSome comments added.
2011-01-22 Vladimir BurianClear of FIFO overflow flag capability added.
2011-01-22 Vladimir BurianBaud_gen scale input width redefined as generic. Defaul...
2011-01-22 Vladimir BurianFirst working prototype of HW UART - TX part.