]> rtime.felk.cvut.cz Git - fpga/uart.git/tree
Baud_gen scale input width redefined as generic. Default value is 16.
-rw-r--r-- 1139 baud_gen.vhd
-rw-r--r-- 2307 fifo.vhd
drwxr-xr-x - tb
-rw-r--r-- 1695 tx.vhd
-rw-r--r-- 1806 tx_control.vhd
-rw-r--r-- 4524 uart.vhd