]> rtime.felk.cvut.cz Git - fpga/uart.git/commit
projects / fpga / uart.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(initial) | patch
First working prototype of HW UART - TX part.
authorVladimir Burian <buriavl2@fel.cvut.cz>
Sat, 22 Jan 2011 21:53:46 +0000 (22:53 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Sat, 22 Jan 2011 21:53:46 +0000 (22:53 +0100)
commit2ebabd4dbaa364e876a5edd9f393cb778829217c
treef126615165e21a23591217366e2a8b197a49348ftree | snapshot
First working prototype of HW UART - TX part.
baud_gen.vhd [new file with mode: 0644] blob
fifo.vhd [new file with mode: 0644] blob
tb/Makefile [new file with mode: 0644] blob
tb/tb_baud_gen.vhd [new file with mode: 0644] blob
tb/tb_fifo.vhd [new file with mode: 0644] blob
tb/tb_tx.vhd [new file with mode: 0644] blob
tb/tb_uart.vhd [new file with mode: 0644] blob
tx.vhd [new file with mode: 0644] blob
tx_control.vhd [new file with mode: 0644] blob
uart.vhd [new file with mode: 0644] blob
Unnamed repository; edit this file 'description' to name the repository.