]> rtime.felk.cvut.cz Git - fpga/uart.git/commit
First prototype of receiver shift register.
authorVladimir Burian <buriavl2@fel.cvut.cz>
Fri, 28 Jan 2011 16:13:40 +0000 (17:13 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Fri, 4 Feb 2011 09:07:02 +0000 (10:07 +0100)
commit3c7195008725d62225052f655609abc96027528b
tree6e129a87f0e1f3e82fa3510413ad9a9f32534b27
parentc6a65ad432f6d0b7f941632755d1433cd3724864
First prototype of receiver shift register.
rx.vhd [new file with mode: 0644]
tb/Makefile