]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/log
fpga/lx-cpu1/lx-rocon.git
9 years agoTestbed for receiver CRC processing check. lx-receiver-crc
Pavel Pisa [Sun, 22 Feb 2015 11:10:59 +0000 (12:10 +0100)]
Testbed for receiver CRC processing check.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoInclude symlinks to LUT tables of fncapprox component.
Pavel Pisa [Sun, 22 Feb 2015 00:03:57 +0000 (01:03 +0100)]
Include symlinks to LUT tables of fncapprox component.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoSet of VHDL design workaround to allow whole design compile by GHDL.
Pavel Pisa [Tue, 30 Dec 2014 08:45:15 +0000 (09:45 +0100)]
Set of VHDL design workaround to allow whole design compile by GHDL.

IRC subsystem is removed from lx_rocon_top.vhd because its inclusion
causes exception in GHDL.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoLX master: purge unused signals in the receiver.
Pavel Pisa [Sun, 22 Feb 2015 11:34:47 +0000 (12:34 +0100)]
LX master: purge unused signals in the receiver.

9 years agoLX master: implement CRC checking in receiver.
Pavel Pisa [Sun, 22 Feb 2015 11:34:06 +0000 (12:34 +0100)]
LX master: implement CRC checking in receiver.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoSetup testbed gitignore file list.
Pavel Pisa [Sun, 22 Feb 2015 11:11:36 +0000 (12:11 +0100)]
Setup testbed gitignore file list.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoIRC input: simplify and remove dependency on ieee.std_logic_arith.all and work.mbl_pk...
Pavel Pisa [Sat, 21 Feb 2015 22:12:44 +0000 (23:12 +0100)]
IRC input: simplify and remove dependency on ieee.std_logic_arith.all and work.mbl_pkg.all.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoIRC inputs: fix problem when index is reported to MCU before value update.
Pavel Pisa [Sat, 21 Feb 2015 22:10:58 +0000 (23:10 +0100)]
IRC inputs: fix problem when index is reported to MCU before value update.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRemove next_ prefix from chip selects/clock enables to reflect real phase.
Pavel Pisa [Wed, 18 Feb 2015 22:16:38 +0000 (23:16 +0100)]
Remove next_ prefix from chip selects/clock enables to reflect real phase.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoCorrect FPGA bus design for external CPU read cycle.
Pavel Pisa [Sun, 15 Feb 2015 18:08:40 +0000 (19:08 +0100)]
Correct FPGA bus design for external CPU read cycle.

The original design required to keep peripheral
chip/clock enable signal for two clock cycles
during read to ensure correct output data routing.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: add test for channels mutual current ADC calibration and check.
Pavel Pisa [Sat, 14 Feb 2015 22:15:02 +0000 (23:15 +0100)]
RoCoN: add test for channels mutual current ADC calibration and check.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Extend read cycle to ensure that even data from concurrently changed register...
Pavel Pisa [Sun, 18 Jan 2015 20:57:48 +0000 (21:57 +0100)]
RoCoN: Extend read cycle to ensure that even data from concurrently changed register stabilizes.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN and TUMBL firmware: reimplemented control of stepper motor without feedback.
Pavel Pisa [Thu, 15 Jan 2015 18:58:02 +0000 (19:58 +0100)]
RoCoN and TUMBL firmware: reimplemented control of stepper motor without feedback.

This implementation already keeps position and is suitable for real applications.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: add measurement of input voltage in milli-Volts.
Pavel Pisa [Thu, 15 Jan 2015 09:07:59 +0000 (10:07 +0100)]
RoCoN: add measurement of input voltage in milli-Volts.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: add current D component keep zero for BDLC/PMSM PXMCC based control.
Pavel Pisa [Sun, 11 Jan 2015 20:51:01 +0000 (21:51 +0100)]
RoCoN: add current D component keep zero for BDLC/PMSM PXMCC based control.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: add current D component stabilization to zero for stepper motor with feedback.
Pavel Pisa [Sun, 11 Jan 2015 20:38:24 +0000 (21:38 +0100)]
RoCoN: add current D component stabilization to zero for stepper motor with feedback.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: do not run stepper motor current controller if axis not powered.
Pavel Pisa [Sun, 11 Jan 2015 20:18:24 +0000 (21:18 +0100)]
RoCoN: do not run stepper motor current controller if axis not powered.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: optimize and divide to more functions DQ current controler code.
Pavel Pisa [Sun, 11 Jan 2015 20:03:41 +0000 (21:03 +0100)]
RoCoN: optimize and divide to more functions DQ current controler code.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: add proper DQ current components controllers for stepper motor.
Pavel Pisa [Sun, 11 Jan 2015 09:22:24 +0000 (10:22 +0100)]
RoCoN: add proper DQ current components controllers for stepper motor.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN and TUMBL firmware: initial experimental support of stepper motor without feedback.
Pavel Pisa [Sat, 10 Jan 2015 14:28:32 +0000 (15:28 +0100)]
RoCoN and TUMBL firmware: initial experimental support of stepper motor without feedback.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoExtend PXMCC control and support routines to enable/disable ptofs automatic update.
Pavel Pisa [Tue, 6 Jan 2015 11:13:21 +0000 (12:13 +0100)]
Extend PXMCC control and support routines to enable/disable ptofs automatic update.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: correct constant spelling in disabled test code.
Pavel Pisa [Mon, 5 Jan 2015 22:01:54 +0000 (23:01 +0100)]
RoCoN: correct constant spelling in disabled test code.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN and TUMBL firmware for control of stepper motor with IRC sensor.
Pavel Pisa [Mon, 5 Jan 2015 21:57:21 +0000 (22:57 +0100)]
RoCoN and TUMBL firmware for control of stepper motor with IRC sensor.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoPXMCC - use symbolic constants for PXMCC axis modes.
Pavel Pisa [Sun, 4 Jan 2015 20:50:16 +0000 (21:50 +0100)]
PXMCC - use symbolic constants for PXMCC axis modes.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN - initial version which can use PXMCC for positional control.
Pavel Pisa [Sun, 4 Jan 2015 14:34:00 +0000 (15:34 +0100)]
RoCoN - initial version which can use PXMCC for positional control.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoOptimize PXMCC firmware to use only 32-bit types and change mode selection back.
Pavel Pisa [Sun, 4 Jan 2015 09:20:50 +0000 (10:20 +0100)]
Optimize PXMCC firmware to use only 32-bit types and change mode selection back.

Gain 5% time reduction by integration of multiplication
of array indexes by element size into index computation
expressions.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoPXMCC firmware optimization and BDLC/PMSM mode change to 1.
Pavel Pisa [Sat, 3 Jan 2015 22:51:22 +0000 (23:51 +0100)]
PXMCC firmware optimization and BDLC/PMSM mode change to 1.

Optimization reuses pxmcc_curadc_data_t cur_val field to store
current adjusted for reduced measurement time caused
by non zero time when PWM is switched to high side.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoCorrect comment about phase sectors in PXMCC firmware.
Pavel Pisa [Sat, 3 Jan 2015 20:55:58 +0000 (21:55 +0100)]
Correct comment about phase sectors in PXMCC firmware.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoCorrect PXMCC firmware variant which uses conditional instructions.
Pavel Pisa [Sat, 3 Jan 2015 20:48:44 +0000 (21:48 +0100)]
Correct PXMCC firmware variant which uses conditional instructions.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoImplemented multiple axes support in PXMCC firmware.
Pavel Pisa [Sat, 3 Jan 2015 15:27:16 +0000 (16:27 +0100)]
Implemented multiple axes support in PXMCC firmware.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoPrepare PXMCC data structures to be better prepared for multiple axes support.
Pavel Pisa [Sat, 3 Jan 2015 14:55:06 +0000 (15:55 +0100)]
Prepare PXMCC data structures to be better prepared for multiple axes support.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTumbl - disable GPRF forward if finish_wrb_mem_s is clock cycle cause.
Pavel Pisa [Wed, 31 Dec 2014 11:14:05 +0000 (12:14 +0100)]
Tumbl - disable GPRF forward if finish_wrb_mem_s is clock cycle cause.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoUpdate Tumbl and test of concurrent access.
Pavel Pisa [Wed, 31 Dec 2014 08:19:09 +0000 (09:19 +0100)]
Update Tumbl and test of concurrent access.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoPrevent register duplications of FPGA chipselect - cs0_xc_f_s - signal.
Pavel Pisa [Wed, 31 Dec 2014 08:16:56 +0000 (09:16 +0100)]
Prevent register duplications of FPGA chipselect - cs0_xc_f_s - signal.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTumbl: Separate wait for external bus data and state when external bus is taken by...
Pavel Pisa [Tue, 30 Dec 2014 14:09:29 +0000 (15:09 +0100)]
Tumbl: Separate wait for external bus data and state when external bus is taken by other master.

Original design reuses external bus clock enable/ready indication
for external master wait. This solution is broken because
external master leaves other data on the bus when clocks
are re-enabled than Tumbl expects. When external master
requests bus at/after end of the Tumbl external memory cycle
there is no need to do anything special in such case.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoROCON GHDL simulation testbed setup for concurrent access bug hunt.
Pavel Pisa [Tue, 30 Dec 2014 08:30:10 +0000 (09:30 +0100)]
ROCON GHDL simulation testbed setup for concurrent access bug hunt.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTUMBL testbed updated to be closer to concurrent extmem access situation.
Pavel Pisa [Mon, 29 Dec 2014 11:57:51 +0000 (12:57 +0100)]
TUMBL testbed updated to be closer to concurrent extmem access situation.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTUMBL GHDL simulation testbed prepared.
Pavel Pisa [Mon, 29 Dec 2014 00:01:13 +0000 (01:01 +0100)]
TUMBL GHDL simulation testbed prepared.

Actual use is for simulate and catch problem with missing
wait for external bus data ready in some situations.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agousb_sendhex: extend support for I32HEX format variant.
Pavel Pisa [Mon, 22 Dec 2014 17:40:07 +0000 (18:40 +0100)]
usb_sendhex: extend support for I32HEX format variant.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
9 years agoRoCoN: test of FPGA internal interference between TUMBL and LPC.
Pavel Pisa [Sun, 21 Dec 2014 17:17:32 +0000 (18:17 +0100)]
RoCoN: test of FPGA internal interference between TUMBL and LPC.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoReport detailed analysis of timing problems for 20 worst signal traces.
Pavel Pisa [Sat, 20 Dec 2014 09:18:08 +0000 (10:18 +0100)]
Report detailed analysis of timing problems for 20 worst signal traces.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: ensure that PXMC does not interfere with TUMBL firmware PWM writes.
Pavel Pisa [Mon, 15 Dec 2014 13:14:26 +0000 (14:14 +0100)]
RoCoN: ensure that PXMC does not interfere with TUMBL firmware PWM writes.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTUMBL firmware: make reserve in current DQ filter for longer measurement period.
Pavel Pisa [Mon, 15 Dec 2014 13:13:09 +0000 (14:13 +0100)]
TUMBL firmware: make reserve in current DQ filter for longer measurement period.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTUMBL: Modules updated - correct broken CMPU, CMP and IT(TE) in TUMBL and other cleanups.
Pavel Pisa [Mon, 15 Dec 2014 09:34:10 +0000 (10:34 +0100)]
TUMBL: Modules updated - correct broken CMPU, CMP and IT(TE) in TUMBL and other cleanups.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: include optional mode parameter to testlxpwrrx command.
Pavel Pisa [Mon, 15 Dec 2014 09:17:14 +0000 (10:17 +0100)]
RoCoN: include optional mode parameter to testlxpwrrx command.

Mode 0 stores standard data for current ADC evaluation.
Mode 1 is used to debug state of TUMBL firmware.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoProvide cumulative D and Q current components for filtering.
Pavel Pisa [Sun, 14 Dec 2014 16:02:01 +0000 (17:02 +0100)]
Provide cumulative D and Q current components for filtering.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTUMBL firmware to compute D and Q components of winding current.
Pavel Pisa [Sun, 14 Dec 2014 15:40:16 +0000 (16:40 +0100)]
TUMBL firmware to compute D and Q components of winding current.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTUMBL interface: Combine D and Q PWM components into single variable.
Pavel Pisa [Sun, 14 Dec 2014 12:28:38 +0000 (13:28 +0100)]
TUMBL interface: Combine D and Q PWM components into single variable.

This ensures that both components are changed by single write
command. This ensures data consistency even when PWM is
written asynchronously by LPC.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoCorrection of edge case of phase sector evaluation in the TUMBL firmware.
Pavel Pisa [Sun, 14 Dec 2014 11:45:34 +0000 (12:45 +0100)]
Correction of edge case of phase sector evaluation in the TUMBL firmware.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: TUMBL firmware commutation test.
Pavel Pisa [Fri, 12 Dec 2014 21:22:01 +0000 (22:22 +0100)]
RoCoN: TUMBL firmware commutation test.

It provides PWM commutation only and requires phase
table to be aligned by prior run of RoCoN LPC
firmware.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoVariant of 3-phase DQ firmware which replaces branches by arithmetic.
Pavel Pisa [Fri, 12 Dec 2014 21:19:05 +0000 (22:19 +0100)]
Variant of 3-phase DQ firmware which replaces branches by arithmetic.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoThe first firmware version for DQ to 3 phase PWM computation.
Pavel Pisa [Tue, 9 Dec 2014 23:00:25 +0000 (00:00 +0100)]
The first firmware version for DQ to 3 phase PWM computation.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoSetup tumble specific tool-chain for firmware build.
Pavel Pisa [Mon, 8 Dec 2014 21:57:32 +0000 (22:57 +0100)]
Setup tumble specific tool-chain for firmware build.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: minor adjustment of fncapprox test;
Pavel Pisa [Sun, 7 Dec 2014 21:52:00 +0000 (22:52 +0100)]
RoCoN: minor adjustment of fncapprox test;

Reduce test range by 16.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTumbl firmware which tracks IRC0 and computes sine and cosine with use of approximati...
Pavel Pisa [Sun, 7 Dec 2014 21:46:57 +0000 (22:46 +0100)]
Tumbl firmware which tracks IRC0 and computes sine and cosine with use of approximation block.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoMove original tumbl firmware out of way of new one.
Pavel Pisa [Sun, 7 Dec 2014 21:27:12 +0000 (22:27 +0100)]
Move original tumbl firmware out of way of new one.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: approximated functions block test adapted to changes and cycle mode provided.
Pavel Pisa [Sun, 7 Dec 2014 10:55:10 +0000 (11:55 +0100)]
RoCoN: approximated functions block test adapted to changes and cycle mode provided.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoReduce sine and cosine to 16-bit only variant in approximated function block.
Pavel Pisa [Sun, 7 Dec 2014 10:53:57 +0000 (11:53 +0100)]
Reduce sine and cosine to 16-bit only variant in approximated function block.

It is far above target application needs and implementation
with last result bits stripped reduces FPGA slices utilization.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoAdd registers to LX Master MOSI and SYNC signals to ensure right timing.
Pavel Pisa [Sat, 6 Dec 2014 23:36:28 +0000 (00:36 +0100)]
Add registers to LX Master MOSI and SYNC signals to ensure right timing.

Changed location to falling clock phase to adjust timing.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoApproximated function block changed to used signed 18x18 multiply of DSP48A1.
Pavel Pisa [Sat, 6 Dec 2014 23:28:29 +0000 (00:28 +0100)]
Approximated function block changed to used signed 18x18 multiply of DSP48A1.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: approximated functions test code extended.
Pavel Pisa [Sat, 6 Dec 2014 11:59:13 +0000 (12:59 +0100)]
RoCoN: approximated functions test code extended.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoApproximated function block computes reciprocal, sine and cosine functions.
Pavel Pisa [Sat, 6 Dec 2014 11:58:46 +0000 (12:58 +0100)]
Approximated function block computes reciprocal, sine and cosine functions.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoTable C for reciprocal computation reduced to made DSP48 structure same as for sine.
Pavel Pisa [Thu, 4 Dec 2014 18:40:11 +0000 (19:40 +0100)]
Table C for reciprocal computation reduced to made DSP48 structure same as for sine.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoLX Master: explicitly declare widely permissive license for lx_crosdom_ser_fifo...
Pavel Pisa [Tue, 2 Dec 2014 22:16:17 +0000 (23:16 +0100)]
LX Master: explicitly declare widely permissive license for  lx_crosdom_ser_fifo.vhd.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: included command to test approximation of reciprocal computation.
Pavel Pisa [Sun, 30 Nov 2014 21:39:52 +0000 (22:39 +0100)]
RoCoN: included command to test approximation of reciprocal computation.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoReciprocal computation implemented in function approximation block.
Pavel Pisa [Sun, 30 Nov 2014 19:03:25 +0000 (20:03 +0100)]
Reciprocal computation implemented in function approximation block.

The function approximation block is placed
on address 0x80023000 .

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoInclude initial stub of function generator to LX HW design.
Pavel Pisa [Sun, 30 Nov 2014 16:31:50 +0000 (17:31 +0100)]
Include initial stub of function generator to LX HW design.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoLX master: ensure fully specified state for rx_done_ratio_s to prevent latch use.
Pavel Pisa [Sun, 30 Nov 2014 16:29:19 +0000 (17:29 +0100)]
LX master: ensure fully specified state for rx_done_ratio_s to prevent latch use.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: lower integration constant and max. speed per tick after switching 4x faster...
Pavel Pisa [Mon, 24 Nov 2014 21:30:51 +0000 (22:30 +0100)]
RoCoN: lower integration constant and max. speed per tick after switching 4x faster interrupt.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: correct computation of channel location for case with multiple LXPWR slaves.
Pavel Pisa [Mon, 24 Nov 2014 21:28:39 +0000 (22:28 +0100)]
RoCoN: correct computation of channel location for case with multiple LXPWR slaves.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: move Master RX ISR to appl_pxmc.c which allows to use it for PXMC timing.
Pavel Pisa [Sun, 23 Nov 2014 21:29:46 +0000 (22:29 +0100)]
RoCoN: move Master RX ISR to appl_pxmc.c which allows to use it for PXMC timing.

When PXMC_ROCON_TIMED_BY_RX_DONE is defined in appl_defs.h
then whole PXMC controller and coordinated movement trimming
is driven by by LX Master receive from LXPWR done event.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: FPGA register for Rx event reduction ration configuration.
Pavel Pisa [Sun, 23 Nov 2014 15:16:06 +0000 (16:16 +0100)]
RoCoN: FPGA register for Rx event reduction ration configuration.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoLX Master extended to allow send only each n-th receive done event.
Pavel Pisa [Sun, 23 Nov 2014 15:14:58 +0000 (16:14 +0100)]
LX Master extended to allow send only each n-th receive done event.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoMade LX Master communication frame configurable.
Pavel Pisa [Sun, 23 Nov 2014 09:30:59 +0000 (10:30 +0100)]
Made LX Master communication frame configurable.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: test command to report measured LXPWR cycle period.
Pavel Pisa [Sun, 23 Nov 2014 09:25:09 +0000 (10:25 +0100)]
RoCoN: test command to report measured LXPWR cycle period.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: add definition of LX Master register for PWM cycle period configuration.
Pavel Pisa [Sat, 22 Nov 2014 22:58:35 +0000 (23:58 +0100)]
RoCoN: add definition of LX Master register for PWM cycle period configuration.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Configure master FPGA for LXPWR design including power supply voltage ADC.
Pavel Pisa [Tue, 11 Nov 2014 19:25:49 +0000 (20:25 +0100)]
RoCoN: Configure master FPGA for LXPWR design including power supply voltage ADC.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Select higher interrupt priority for LXPWM master receiver interrupt.
Pavel Pisa [Sun, 9 Nov 2014 19:35:11 +0000 (20:35 +0100)]
RoCoN: Select higher interrupt priority for LXPWM master receiver interrupt.

The current data acquisition/read from FPGA has to be finished
in less than 50 usec and other interrupts can can delay
this processing. The receiver interrupt LXPWR_RX_IRQn
is mapped to interrupt TIMER2_IRQn and its priority
is increased.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Configure PXMC for new LXPWR data format by default.
Pavel Pisa [Sun, 9 Nov 2014 19:30:42 +0000 (20:30 +0100)]
RoCoN: Configure PXMC for new LXPWR data format by default.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: PXMC support for new LXPWR data format used by sigma-int rolling ADC.
Pavel Pisa [Fri, 7 Nov 2014 13:30:08 +0000 (14:30 +0100)]
RoCoN: PXMC support for new LXPWR data format used by sigma-int rolling ADC.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoUpdated submodules to actual versions.
Pavel Pisa [Sun, 21 Sep 2014 08:08:57 +0000 (10:08 +0200)]
Updated submodules to actual versions.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: use BlueBot drawing declared axis order after population of another two bridges. bluebot
Pavel Pisa [Fri, 27 Jun 2014 22:32:37 +0000 (00:32 +0200)]
RoCoN: use BlueBot drawing declared axis order after population of another two bridges.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: change testlxpwrrx stored set of data to include PWM values as well.
Pavel Pisa [Wed, 18 Jun 2014 21:57:57 +0000 (23:57 +0200)]
RoCoN: change testlxpwrrx stored set of data to include PWM values as well.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: added support and test command to capture LXPWR ADC stream.
Pavel Pisa [Tue, 17 Jun 2014 20:52:03 +0000 (22:52 +0200)]
RoCoN: added support and test command to capture LXPWR ADC stream.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: correct variable name in pxmc_rocon_receiver_chan2reg.
Pavel Pisa [Tue, 17 Jun 2014 20:50:33 +0000 (22:50 +0200)]
RoCoN: correct variable name in pxmc_rocon_receiver_chan2reg.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoProvide output event indication end of reception from LXPWR.
Pavel Pisa [Tue, 17 Jun 2014 18:03:10 +0000 (20:03 +0200)]
Provide output event indication end of reception from LXPWR.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: implement HAL sensors reading and processing for BLDC/PMSM.
Pavel Pisa [Sun, 15 Jun 2014 22:34:46 +0000 (00:34 +0200)]
RoCoN: implement HAL sensors reading and processing for BLDC/PMSM.

LXPWR receiver configuration is set for single AGL
in chain for now. The chain length should
to be auto-detected.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoImplemented initial version of LXPWR receiver FSM based on transmitter.
Pavel Pisa [Sun, 15 Jun 2014 21:24:10 +0000 (23:24 +0200)]
Implemented initial version of LXPWR receiver FSM based on transmitter.

The basic implementation does not check CRC for now.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoProvide direct pass-trough drive of i_rd_s from filtered rd_f_s.
Pavel Pisa [Sun, 15 Jun 2014 10:07:24 +0000 (12:07 +0200)]
Provide direct pass-trough drive of i_rd_s from filtered rd_f_s.

This violates standard next_.._s -> register pattern
but only registered signals are used for i_rd_s
generation and shift one cycle forward allows
to use shorter read access cycle.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoAssign next_last_address_s signal value in all cases to prevent generation of latches.
Pavel Pisa [Sun, 15 Jun 2014 09:25:26 +0000 (11:25 +0200)]
Assign next_last_address_s signal value in all cases to prevent generation of latches.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: reset max ISR spent time after its read.
Pavel Pisa [Sun, 15 Jun 2014 08:57:37 +0000 (10:57 +0200)]
RoCoN: reset max ISR spent time after its read.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: ensure that all EIM parameters for FPGA are setup.
Pavel Pisa [Sun, 15 Jun 2014 08:56:35 +0000 (10:56 +0200)]
RoCoN: ensure that all EIM parameters for FPGA are setup.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRedesign external bus access timing and logic.
Pavel Pisa [Sun, 15 Jun 2014 08:54:36 +0000 (10:54 +0200)]
Redesign external bus access timing and logic.

There has been fundamental flaws in write cycles activation
and timing which leads to write of unstable data to
unstable address when write has been activated
on partially valid BLS on start of LPC write cycle.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Change hard-coded IRC status bit positions to named bit masks.
Pavel Pisa [Tue, 10 Jun 2014 09:04:41 +0000 (11:04 +0200)]
RoCoN: Change hard-coded IRC status bit positions to named bit masks.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Ensure USB buffers alignment.
Pavel Pisa [Mon, 9 Jun 2014 22:04:57 +0000 (00:04 +0200)]
RoCoN: Ensure USB buffers alignment.

It is not required on Cortex-M3/4 but can speedup
operations.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: Implement USB memory transfers for 32-bit wide memory read/write.
Pavel Pisa [Mon, 9 Jun 2014 21:49:49 +0000 (23:49 +0200)]
RoCoN: Implement USB memory transfers for 32-bit wide memory read/write.

The 32-bit access target is is elected by "-t 4" parameter
of "usb_sendhex".

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoUpdate PXMC for 8 DC axes
Martin Meloun [Mon, 9 Jun 2014 16:59:39 +0000 (18:59 +0200)]
Update PXMC for 8 DC axes

Signed-off-by: Martin Meloun <meloumar@cmp.felk.cvut.cz>
9 years agoUpdate FPGA, fix hazard conditions in BRAM
Martin Meloun [Mon, 9 Jun 2014 16:58:14 +0000 (18:58 +0200)]
Update FPGA, fix hazard conditions in BRAM

Signed-off-by: Martin Meloun <meloumar@cmp.felk.cvut.cz>
9 years agoRoCoN: update code to build for simulated mode under Linux.
Pavel Pisa [Sat, 7 Jun 2014 11:46:31 +0000 (13:46 +0200)]
RoCoN: update code to build for simulated mode under Linux.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
9 years agoRoCoN: reverse order for PWM channels assignment.
Pavel Pisa [Tue, 3 Jun 2014 12:19:24 +0000 (14:19 +0200)]
RoCoN: reverse order for PWM channels assignment.

The connectors are soldered on upper side of LX_PWR
board in our actual assembly which leads to reverse
order to our standard used on other boards (i.e. LMC_CB2).

Signed-off-by: Pavel Pisa <ppisa@pikron.com>