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Set of VHDL design workaround to allow whole design compile by GHDL.
authorPavel Pisa <ppisa@pikron.com>
Tue, 30 Dec 2014 08:45:15 +0000 (09:45 +0100)
committerPavel Pisa <ppisa@pikron.com>
Sun, 22 Feb 2015 11:41:06 +0000 (12:41 +0100)
commit8985b5e66332f234081f3d5b7b3482dec49d1e7b
tree5679a41ee522d06b5544811a55173b5140411411tree | snapshot
parent745c58f76ca76904e406b996be72a3b9928a81f9commit | diff
Set of VHDL design workaround to allow whole design compile by GHDL.

IRC subsystem is removed from lx_rocon_top.vhd because its inclusion
causes exception in GHDL.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>
hw/bus_irc.vhd diff | blob | history
hw/irc_proc_main.vhd diff | blob | history
hw/lx_rocon_pkg.vhd diff | blob | history
hw/lx_rocon_top.vhd diff | blob | history
hw/tb/Makefile diff | blob | history
hw/xilinx_dualport_bram.vhd diff | blob | history
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