RoCoN: include optional mode parameter to testlxpwrrx command.

Mode 0 stores standard data for current ADC evaluation.
Mode 1 is used to debug state of TUMBL firmware.

Signed-off-by: Pavel Pisa <ppisa@pikron.com>

diff --git a/sw/app/rocon/appl_defs.h b/sw/app/rocon/appl_defs.h
index e6594bb34bcd0e51a4c37cc1fc263542150bb4ff..9ca032fa0cd75b2a309cf8a069eca506fcd9f481 100644 (file)
--- a/sw/app/rocon/appl_defs.h
+++ b/sw/app/rocon/appl_defs.h
@@ -143,6 +143,8 @@ int pxmc_rocon_rx_done_isr_setup(irq_handler_t rx_done_isr_handler);
 
 extern volatile void *pxmc_rocon_rx_data_hist_buff;
 extern volatile void *pxmc_rocon_rx_data_hist_buff_end;
+extern int pxmc_rocon_rx_data_hist_mode;
+
 extern uint32_t pxmc_rocon_rx_cycle_time;
 extern uint32_t pxmc_rocon_rx_irq_latency;
 extern uint32_t pxmc_rocon_rx_irq_latency_max;

diff --git a/sw/app/rocon/appl_pxmc.c b/sw/app/rocon/appl_pxmc.c
index ab7e038a541e56513824d9ecc1f3f482812c3437..f140ece3d0e8fc806008a8e675b3a61dbf1f4ae2 100644 (file)
--- a/sw/app/rocon/appl_pxmc.c
+++ b/sw/app/rocon/appl_pxmc.c
@@ -708,6 +708,7 @@ pxmc_rocon_pwm_dc_out(pxmc_state_t *mcs)
 
 volatile void *pxmc_rocon_rx_data_hist_buff;
 volatile void *pxmc_rocon_rx_data_hist_buff_end;
+int pxmc_rocon_rx_data_hist_mode;
 
 uint32_t pxmc_rocon_rx_last_irq;
 uint32_t pxmc_rocon_rx_cycle_time;
@@ -736,17 +737,27 @@ IRQ_HANDLER_FNC(pxmc_rocon_rx_done_isr)
       pxmc_rocon_rx_data_hist_buff = NULL;
 
     if (pxmc_rocon_rx_data_hist_buff != NULL) {
-      int i;
-      volatile uint32_t *pwm_reg = fpga_lx_master_transmitter_base + 8;
-      volatile uint32_t *rec_reg = fpga_lx_master_receiver_base + 8;
-      uint16_t *pbuf = (uint16_t *)pxmc_rocon_rx_data_hist_buff;
-      for (i = 0; i < 8; i++) {
-        *(pbuf++) = *(rec_reg++);
-      }
-      for (i = 0; i < 8; i++) {
-        *(pbuf++) = *(pwm_reg++);
+      if (pxmc_rocon_rx_data_hist_mode == 0) {
+        int i;
+        volatile uint32_t *pwm_reg = fpga_lx_master_transmitter_base + 8;
+        volatile uint32_t *rec_reg = fpga_lx_master_receiver_base + 8;
+        uint16_t *pbuf = (uint16_t *)pxmc_rocon_rx_data_hist_buff;
+        for (i = 0; i < 8; i++) {
+          *(pbuf++) = *(rec_reg++);
+        }
+        for (i = 0; i < 8; i++) {
+          *(pbuf++) = *(pwm_reg++);
+        }
+        pxmc_rocon_rx_data_hist_buff = pbuf;
+      } else if (pxmc_rocon_rx_data_hist_mode == 1) {
+        int i;
+        uint32_t *pbuf = (uint32_t *)pxmc_rocon_rx_data_hist_buff;
+
+        for (i = 0; i < 16; i++)
+          *(pbuf++) = fpga_tumbl_dmem[i];
+
+        pxmc_rocon_rx_data_hist_buff = pbuf;
       }
-      pxmc_rocon_rx_data_hist_buff = pbuf;
     }
 
     pxmc_rocon_rx_irq_latency = ROCON_RX_TIM->TC - cr1;

diff --git a/sw/app/rocon/appl_tests.c b/sw/app/rocon/appl_tests.c
index cf3a5f3582ab221dc4113025241491f3f7351114..7b1c8999ff6b72d35dc7a9de67098905769784ad 100644 (file)
--- a/sw/app/rocon/appl_tests.c
+++ b/sw/app/rocon/appl_tests.c
@@ -276,13 +276,31 @@ int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
 
 int cmd_do_testlxpwrrx(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
 {
+  char *ps = param[1];
+  long mode = 0;
+  uint32_t *ptr;
+
+  if (ps != NULL) {
+    si_skspace(&ps);
+    if (*ps) {
+      if (si_ulong(&ps, &mode, 0) < 0)
+        return -CMDERR_BADPAR;
+    }
+  }
   pxmc_rocon_rx_data_hist_buff = NULL;
+  pxmc_rocon_rx_data_hist_mode = mode;
+
  #ifndef PXMC_ROCON_TIMED_BY_RX_DONE
   pxmc_rocon_rx_done_isr_setup(pxmc_rocon_rx_done_isr);
  #endif /*PXMC_ROCON_TIMED_BY_RX_DONE*/
   pxmc_rocon_rx_data_hist_buff_end = (void *)(FPGA_CONFIGURATION_FILE_ADDRESS +
                                          0x80000);
-  pxmc_rocon_rx_data_hist_buff = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
+  ptr = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
+  if (mode != 0) {
+    *(ptr++) = '10XL';
+    *(ptr++) = mode;
+  }
+  pxmc_rocon_rx_data_hist_buff = (void *)ptr;
   return 0;
 }