spi: spi-xilinx: Added workaround when startup block is enabled
In AXI SPI when the startup block is enabled in the hardware
STARTUP block don't provide clock as soon as SPI provides command,
first command fails. So to overcome this issue added a workaround
to perform a dummy Read Id if startup block is enabled in the
hardware.
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Acked-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: phy: dp83867: Add support for 6-wire mode in SGMII configuration
SGMII interface is capable of working as a 4-wire or 6-wire SGMII
interface. Default is 4-wire mode. Read DT "ti,6-wire-mode" property
to program SGMIICTL1[SGMII_TYPE] 6-wire mode.
v4l: xilinx: scd: Enable 10 bit formats support for memory based IP
This patch enables 10bit format support in driver. This will configure
the 8bit or 10bit video format in IP based on media bus format set by
the application.
Harini Katakam [Sat, 23 Mar 2019 07:12:31 +0000 (12:42 +0530)]
arm64: zynqmp: Update Micrel PHY details on zc1275 and zc1285
The FMC card AES-FMC-NETW1-G is the necessary to support ethernet
on zc1275 and zc1285 boards. No previous PHYs/FMCs will be supported
on this HW. So update the phy address to 1 and necessary skew values.
Also remove PL IP related nodes and parameters that DTG generates.
Jarod Wilson [Sat, 23 Mar 2019 10:26:07 +0000 (15:56 +0530)]
net: deprecate eth_change_mtu, remove usage
With centralized MTU checking, there's nothing productive done by
eth_change_mtu that isn't already done in dev_set_mtu, so mark it as
deprecated and remove all usage of it in the kernel. All callers have been
audited for calls to alloc_etherdev* or ether_setup directly, which means
they all have a valid dev->min_mtu and dev->max_mtu. Now eth_change_mtu
prints out a netdev_warn about being deprecated, for the benefit of
out-of-tree drivers that might be utilizing it.
Of note, dvb_net.c actually had dev->mtu = 4096, while using
eth_change_mtu, meaning that if you ever tried changing it's mtu, you
couldn't set it above 1500 anymore. It's now getting dev->max_mtu also set
to 4096 to remedy that.
v2: fix up lantiq_etop, missed breakage due to drive not compiling on x86
CC: netdev@vger.kernel.org Signed-off-by: Jarod Wilson <jarod@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Philippe Reynes [Sat, 23 Mar 2019 10:26:05 +0000 (15:56 +0530)]
net: ethernet: macb: use phydev from struct net_device
The private structure contain a pointer to phydev, but the structure
net_device already contain such pointer. So we can remove the pointer
phydev in the private structure, and update the driver to use the
one contained in struct net_device.
Rebased on xilinx tree.
Signed-off-by: Philippe Reynes <tremyfr@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Harini Katakam <harini.katakam@xilix.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
dmaengine: xilinx_dma: Remove axidma multichannel mode support
The AXI DMA multichannel support is deprecated in the IP and it is no
longer actively supported. For multichannel support, refer to the AXI
multichannel direct memory access IP product guide(PG228). So it is
decided to remove it's complete support from the driver. Just to
highlight that this patch intentionally breaks backward compatibility.
dt-bindings: dmaengine: xilinx_dma: Remove axidma multichannel support
The AXI DMA multichannel support is deprecated in the IP and it is no
longer actively supported. For multichannel support, refer to the AXI
multichannel direct memory access IP product guide(PG228). So it is
decided to remove it's complete support from the driver. Inline with
it remove axidma multichannel optional properties i.e xlnx,mcdma and
dma-channels from the binding description. Just to highlight that this
patch intentionally breaks backward compatibility.
There are changes between xilinx 4.19 kernel m25p80.c and mainline
4.19 kernel m25p80.c. This was happened due to merge. so update the
drver. This update includes below commits from mainline
00a5762 mtd: m25p80: Remove unneeded m25p->command field 4a3e85f mtd: devices: m25p80: Make sure the buffer passed in op is DMA-able 138f5dc mtd: m25p80: add support of SPI 1-2-2 and 1-4-4 protocols b02b17f mtd: m25p80: Call spi_mem_get_name() to let controller set a
custom name 1e07392 mtd: devices: m25p80: Use spi_mem_set_drvdata() instead of
spi_set_drvdata()
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch introduces separate media bus formats for each 10bit pixel
formats. This way v4l2 subdev applications can differentiate between
8bit and 10bit formats.
v4l: xilinx: scd: Fix video format configuration for YUV420
In the current implementation streaming based driver, the video format
value for YUV420 is programmed wrongly. This patch programs it correctly
according to PG322.
net: can: xilinx_can: fix chip_start failure with invalid bus
Currently the xilinx_can xcan_chip_start() function, called from
.ndo_open() and via CAN_MODE_START (bus-off restart), waits for the SR
register to show the wanted operating state, with a 1 sec timeout.
However, that register bit will only be set once the HW has observed 11
consecutive recessive bits (BusIdle) on the bus.
If the bus will not see the 11 bits (e.g. it is stuck dominant), the
function will timeout and return an error.
If this was done as part of a scheduled restart from bus-off, the
interface will stay in bus-off state forever even if the bus recovers
later.
If this was done during interface .ndo_open(), the interface will stay
down.
According to M_CAN and FLEXCAN documentation they also wait for 11
consecutive recessive bits, but their drivers do not seem to wait for
that.
To make the behavior consistent, modify xilinx_can to also not wait for
the synchronization to complete.
The only way for users to know for sure that the bus has been joined
successfully is to see successfully received or transmitted frames. That
does not seem optimal, but it is consistent with other drivers and we
should have a properly working restart-ms with xilinx_can.
Rename axiethernet register description to be inline with product guide
register names. It also corrects TEMAC interrupt controller offsets and
removes obsolete registers and bitmasks. There is no major functional
impact since the modified offsets are only used in ethtool get_regs and
not in any programming sequence.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Wendy Liang [Tue, 19 Mar 2019 12:01:26 +0000 (05:01 -0700)]
remoteproc: zynqmp_r5: allow kick not to pass message
Allow remoteproc kick not to write to IPI buffer. As remotperoc has
sysfs API to allow userspace to kick r5, it is possible to just raise
interrupt but not write data. Otherwise, it will take more time
to kick remoteproc, as it will need to copy the data to the IPI
buffer.
Signed-off-by: Wendy Liang <wendy.liang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPI subsystem default time out tolerance for a transfer to be complete
is 100ms. This works well on ZynqMP and Zynq platforms because on these
hardwares QSPI and SPI runs at 100MHz. But on versal emulation platform,
QSPI and SPI runs at 25MHz and core runs at 2.16MHz.
so the wait time should be increased to accommodate that clock, when
using DMA or IO. Otherwise we will get transfer time outs. Hence
increase the transfer time out tolerance.
Based on various testings this tolerance is increased from 200 to 1000.
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mtd: rawnand: Apply nand_reset() only to TOSHIBA parts
While writing oob, flash chips like TOSHIBA will clear the whole data
page, if there is no nand_reset(). So limit this reset only to these
parts.
We can still go without checking the jedec_id, but arasan_nand driver
does not support setup_data_interface() hook to initialize the flash
timings during reset. arasan_nand driver is not supporting this hook
because the NAND subsystem is not supporting NVDDR modes. so by adding
this check we can support SDR, NVDDR modes in arasan.
And to support this jedec id check, added new jedec_id variable to
struct onfi_params. This is needed until NAND subsystem supports NVDDR
modes.
Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Harini Katakam [Fri, 22 Mar 2019 05:20:00 +0000 (10:50 +0530)]
net: macb: Add NULL check for PCLK and HCLK
Both PCLK and HCLK are "required" clocks according to macb devicetree
documentation. There is a chance that devm_clk_get doesn't return a
negative error but just a NULL clock structure instead. In such a case
the driver proceeds as usual and uses pclk value 0 to calculate MDC
divisor which is incorrect. Hence fix the same in clock initialization.
net: can: xilinx_can: Fix incorrect assignment of bittiming_const for canfd
commit 9e5f1b2 ("can: xilinx_can: add support for Xilinx CAN FD core")
had wrong assignment of bittiming_const for axi canfd, It should point to
xcan_bittiming_const_canfd structure instead of xcan_bittiming_const_can.
Michal Simek [Thu, 21 Mar 2019 15:02:39 +0000 (16:02 +0100)]
dt-bindings: Fix position of xlnx,int-clock-stable-broken property
The patch:
"dt-bindings: mmc: broken clock stable indicator on arasan controllers"
(sha1: 26c312281336b55eba01ea1e7b85740d383076c6)
Was adding it as generic optional property not optional property just
for xlnx,zynqmp-8.9a.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rob Herring [Tue, 28 Aug 2018 01:52:04 +0000 (20:52 -0500)]
ARM: zynq: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Michal Simek <michal.simek@xilinx.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: defer the probe if clock is not found
It's not always the case that clock is already available when can
driver get probed at the first time, e.g. the clock is provided by
clock wizard which may be probed after can driver. So let's defer
the probe when devm_clk_get() call fails and give it chance to
try later.
Signed-off-by: Venkatesh Yadav Abbarapu <vabbarap@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Jann Horn [Mon, 18 Feb 2019 21:43:09 +0000 (22:43 +0100)]
firmware: xilinx: fix debugfs write handler
- Userspace wants to write a string with `len` bytes, not counting the
terminating NULL, so we should allocate `len+1` bytes. It looks like the
current code relied on having a nullbyte directly behind `kern_buff`,
which happens to work reliably as long as `len` isn't one of the kmalloc
size classes.
- strncpy_from_user() is completely wrong here; userspace is giving us a
(not necessarily null-terminated) buffer and its length.
strncpy_from_user() is for cases in which we don't know the length.
- Don't let broken userspace allocate arbitrarily big kmalloc allocations.
Just use memdup_user_nul(), which is designed precisely for things like
this.
Signed-off-by: Jann Horn <jannh@google.com> Acked-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
net: xilinx: axiethernet: Check for queue full in transmit path
As per DMA programming sequence, software must not resubmit a BD which
is already under the hardware control else results are undefined. In
iperf3 stress testing, we observed intermittent zero bandwidth and DMA
IP going into stall state. To fix this behavior, in the transmit path
add a check for queue space before adding new BD elements.
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch fixes below kernel doc warnings
warning: Function parameter or member 'priv' not described in
'xcan_write_frame'
warning: Function parameter or member 'skb' not described in
'xcan_start_xmit_fifo'
warning: Function parameter or member 'ndev' not described in
'xcan_start_xmit_fifo'
warning: Function parameter or member 'skb' not described in
'xcan_start_xmit_mailbox'
warning: Function parameter or member 'ndev' not described in
'xcan_start_xmit_mailbox'
warning: Function parameter or member 'priv' not described in
'xcan_rx_fifo_get_next_frame'
This patch fixes below checkpatch warnings and checks in the driver.
CHECK: Alignment should match open parenthesis
+ void (*write_reg)(const struct xcan_priv *priv, enum xcan_reg reg,
+ u32 val);
CHECK: Alignment should match open parenthesis
+static void xcan_write_reg_le(const struct xcan_priv *priv, enum xcan_reg reg,
+ u32 val)
CHECK: Alignment should match open parenthesis
+static void xcan_write_reg_be(const struct xcan_priv *priv, enum xcan_reg reg,
+ u32 val)
CHECK: Alignment should match open parenthesis
+ netdev_dbg(ndev, "BRPR=0x%08x, BTR=0x%08x\n",
+ priv->read_reg(priv, XCAN_BRPR_OFFSET),
CHECK: Alignment should match open parenthesis
+ netdev_warn(ndev,
+ "timed out for correct mode\n");
CHECK: Alignment should match open parenthesis
+ netdev_dbg(ndev, "status:#x%08x\n",
+ priv->read_reg(priv, XCAN_SR_OFFSET));
CHECK: spaces preferred around that '-' (ctx:VxV)
+ (CAN_EFF_ID_BITS-CAN_SFF_ID_BITS)) <<
^
CHECK: Alignment should match open parenthesis
+ netdev_dbg(ndev, "%s: error status register:0x%x\n",
+ __func__, priv->read_reg(priv, XCAN_ESR_OFFSET));
WARNING: line over 80 characters
+ offset = XCAN_RXMSG_2_FRAME_OFFSET(fsr & XCAN_FSR_RI_MASK);
WARNING: line over 80 characters
+ offset = XCAN_RXMSG_FRAME_OFFSET(fsr & XCAN_FSR_RI_MASK);
WARNING: line over 80 characters
+ while ((isr & XCAN_IXR_TXOK_MASK) && !WARN_ON(++retries == 100)) {
WARNING: line over 80 characters
+ priv->write_reg(priv, XCAN_ICR_OFFSET, XCAN_IXR_TXOK_MASK);
CHECK: Alignment should match open parenthesis
+ netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
+ __func__, ret);
CHECK: Alignment should match open parenthesis
+ ret = request_irq(ndev->irq, xcan_interrupt, priv->irq_flags,
+ ndev->name, ndev);
CHECK: Alignment should match open parenthesis
+static int xcan_get_berr_counter(const struct net_device *ndev,
+ struct can_berr_counter *bec)
CHECK: Alignment should match open parenthesis
+ netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
+ __func__, ret);
CHECK: Please don't use multiple blank lines
+
+
CHECK: Alignment should match open parenthesis
+ netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
+ __func__, ret);`
Wendy Liang [Sun, 17 Mar 2019 10:47:56 +0000 (03:47 -0700)]
remoteproc: zynqmp_r5: ack IPI before checking vrings
If we ack IPI interrupt after checking vrings, it is
possible to miss some IPI interrupts. Ack the IPI
interrupts before checking the vrings to make sure
no IPI interrupts are missed.
Signed-off-by: Wendy Liang <wendy.liang@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: dwc3: route lpd usb traffic through CCI path for making SMMU work
usb dma traffic by default takes the direct DDR path from LPD switch.
Since SMMU is present before CCI, the usb dma traffic needs to be
routed to take the CCI path for making SMMU work. This can be done
by enabling "coherency" in usb.
This patch modifies the code to enable coherency in usb for below
mentioned cases
1. To route usb dma transactions through CCI path for coherency. This is
done when "dma-coherent" property is added into dwc3 dts node.
2. To route usb dma transactions through CCI path to make SMMU work with
usb dma. This is done when "dwc->dev->iommu_group" is populated
(iommu_group is only populated when sucessfull smmu comtext for usb is
created).
Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Paul Thomas [Thu, 14 Mar 2019 10:11:33 +0000 (15:41 +0530)]
net: macb: Check for SKBTX_HW_TSTAMP in macb driver
Make sure SKBTX_HW_TSTAMP (i.e. SOF_TIMESTAMPING_TX_HARDWARE) has
been enabled for this skb. This is a common practice in handling TX
timestamp. It fixes the issue where normal socks that aren't
expecting a timestamp will not wake up on select.
Fixed if statement, modified commit description and tested.
- Harini
Signed-off-by: Paul Thomas <pthomas8589@gmail.com> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Harini Katakam [Thu, 14 Mar 2019 10:11:32 +0000 (15:41 +0530)]
net: macb: Optimize reading HW timestamp
The seconds input from BD (6 bits) just needs to be ORed with the
upper bits from timer in this function. Avoid +/- operations every
single time. Check for seconds rollover at BIT 5 and subtract the
overhead only in that case.
Harini Katakam [Thu, 14 Mar 2019 10:11:30 +0000 (15:41 +0530)]
net: macb: Add separate definition for PPM fraction
The scaled ppm parameter passed to _adjfine() contains a 16 bit
fraction. This just happens to be the same as SUBNSINCR_SIZE now.
Hence define this separately.
Remove map_dma_q_irq() redundant definition and also reduce the scope of
axienet_queue_xmit function. This patch fixes below sparse warnings.
drivers/net/ethernet/xilinx/xilinx_axienet_main.c: At top level:
drivers/net/ethernet/xilinx/xilinx_axienet_main.c:1004:5: warning: no previous
prototype for ‘axienet_queue_xmit’ [-Wmissing-prototypes]
int axienet_queue_xmit(struct sk_buff *skb, struct net_device *ndev,
u16 map)
^~~~~~~~~~~~~~~~~~
drivers/net/ethernet/xilinx/xilinx_axienet_main.c:1471:5: warning: no previous
prototype for ‘map_dma_q_irq’ [-Wmissing-prototypes]
int map_dma_q_irq(int irq, struct axienet_local *lp)
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Wendy Liang [Thu, 14 Mar 2019 07:09:21 +0000 (00:09 -0700)]
remoteproc: sysfs: allow kick to pass small data
Allow kick to pass small data. The size of the data to pass by sysfs
kick depends on the kick rproc operation implementation. For now, the
size is sizeof(int).
USB: gadget: f_hid: fix deadlock in f_hidg_write()
In f_hidg_write() the write_spinlock is acquired before calling
usb_ep_queue() which causes a deadlock when dummy_hcd is being used.
This is because dummy_queue() callbacks into f_hidg_req_complete() which
tries to acquire the same spinlock. This is (part of) the backtrace when
the deadlock occurs:
0xffffffffc06b1410 in f_hidg_req_complete
0xffffffffc06a590a in usb_gadget_giveback_request
0xffffffffc06cfff2 in dummy_queue
0xffffffffc06a4b96 in usb_ep_queue
0xffffffffc06b1eb6 in f_hidg_write
0xffffffff8127730b in __vfs_write
0xffffffff812774d1 in vfs_write
0xffffffff81277725 in SYSC_write
Fix this by releasing the write_spinlock before calling usb_ep_queue()
Rajan Vaja [Wed, 13 Mar 2019 17:28:01 +0000 (10:28 -0700)]
firmware: zynqmp: Fix feature check response
Actual response of feature check API is stored in
index 1 of response. Data at index 0 represents
status of API not response.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Vishal Sagar [Thu, 14 Mar 2019 10:56:00 +0000 (03:56 -0700)]
drm: xlnx: scaler: Add max width and height properties
This patch adds support to parse xlnx,max-width and xlnx,max-height from
the device tree node and save the maximum dimensions. This breaks
backward compatibility.
Vishal Sagar [Thu, 14 Mar 2019 10:55:58 +0000 (03:55 -0700)]
drm: xlnx: csc: Add max width and height dt properties
This patch gets the maximum width and height of frame from the device
tree properties xlnx,max-width and xlnx,max-height. This breaks backward
compatibility.
Vishal Sagar [Thu, 14 Mar 2019 10:55:56 +0000 (03:55 -0700)]
v4l: xilinx: vpss-scaler: Make max width and height mandatory properties
This patch makes the xlnx,max-width and xlnx,max-height as mandatory dt
properties. This breaks backward compatibility and a warning message is
hence added.
Vishal Sagar [Thu, 14 Mar 2019 10:55:52 +0000 (03:55 -0700)]
dmaengine: xilinx: frmbuf: Make max-width and max-height mandatory properties
This patch makes the xlnx,max-width and xlnx,max-height mandatory
properties in the device tree node. Since this breaks backward
compatibility, a warning message is added.
Vishal Sagar [Thu, 14 Mar 2019 10:55:50 +0000 (03:55 -0700)]
v4l: xilinx-gamma: Make max-width and max-height mandatory dt properties
This patch makes the xlnx,max-width and xlnx,max-height mandatory dt
properties. As this breaks backward compatibility, a warning message is
also added.
Vishal Sagar [Thu, 14 Mar 2019 10:02:58 +0000 (03:02 -0700)]
media: xilinx: tpg: Add support for v8.0
Adds support for the v8.0 compatible string. Now the hls flag is set if
the compatible string is not v5.0. This patch makes the xlnx,max-height
and xlnx,max-width as mandatory properties. It also fixes the enum
format.
Rohit Visavalia [Tue, 12 Mar 2019 14:04:59 +0000 (07:04 -0700)]
drm: xlnx: zynqmp_dp: Fix DP aux related issues
drm_dp_dpcd_read() uses zynqmp_dp_aux_transfer(), and
zynqmp_dp_aux_transfer() needs DP status as connected to generate
aux transactions. Then add retry for drm_dp_dpcd_read(), as it can
fail on first attempt, for example, with DP to HDMI adapter.
Add gpio phy reset via I2C expander TCA6416 on board ZCU102.
A warning call trace is observer in probe when this reset is called
from context that can sleep. Keep this commented until that is
resolved in phylib.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>