This way it would not then indicate that START is
actual reset line.
Reported-by: Vesa Jaaskelainen <dachaac@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
};
enum zynqmp_pm_reset {
- ZYNQMP_PM_RESET_START = 999,
- ZYNQMP_PM_RESET_PCIE_CFG,
+ ZYNQMP_PM_RESET_START = 1000,
+ ZYNQMP_PM_RESET_PCIE_CFG = ZYNQMP_PM_RESET_START,
ZYNQMP_PM_RESET_PCIE_BRIDGE,
ZYNQMP_PM_RESET_PCIE_CTRL,
ZYNQMP_PM_RESET_DP,
ZYNQMP_PM_RESET_PS_PL1,
ZYNQMP_PM_RESET_PS_PL2,
ZYNQMP_PM_RESET_PS_PL3,
- ZYNQMP_PM_RESET_END
+ ZYNQMP_PM_RESET_END = ZYNQMP_PM_RESET_PS_PL3
};
enum zynqmp_pm_abort_reason {