spi: Increase the spi time out

SPI subsystem default time out tolerance for a transfer to be complete
is 100ms. This works well on ZynqMP and Zynq platforms because on these
hardwares QSPI and SPI runs at 100MHz. But on versal emulation platform,
QSPI and SPI runs at 25MHz and core runs at 2.16MHz.
so the wait time should be increased to accommodate that clock, when
using DMA or IO. Otherwise we will get transfer time outs. Hence
increase the transfer time out tolerance.
Based on various testings this tolerance is increased from 200 to 1000.

Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 4a834dd535c3c11c105d2bc617ecba7b06133dbb..5f51bf97098fe488433ffec5dce6f1fccf1da751 100644 (file)
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1039,7 +1039,7 @@ static int spi_transfer_one_message(struct spi_controller *ctlr,
                                ret = 0;
                                ms = 8LL * 1000LL * xfer->len;
                                do_div(ms, xfer->speed_hz);
-                               ms += ms + 200; /* some tolerance */
+                               ms += ms + 1000; /* some tolerance */
 
                                if (ms > UINT_MAX)
                                        ms = UINT_MAX;