]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/script
microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / system / script /
2017-01-24 Pavel Pisamicrozed_apo: use board specific constrain file for...
2016-05-17 Martin Jerabekbootscript: changed IPs, updated paths
2016-05-16 Martin Jerabeksystem: removed reference to post-write_bitstream dist...
2016-05-16 Martin Jerabeksystem: updated build script for new Vivado version
2016-05-16 Martin Jerabeksystem: can_crossbar fixed and added to device tree...
2016-05-12 Martin Jerabeksja1000: IP fixes, corrected device-tree entry, it...
2016-05-12 Martin Jerabeksystem: updated scripts
2016-05-12 Martin Jerabekbitstream file renamed
2016-04-01 Martin Jerabeksystem: build fix, removed generated HDL wrappers
2016-03-30 Martin Jerabekadded system and petalinux configuration, scripts,...