rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/commit

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(parent: 4413e76) | patch

author	Martin Jerabek <jerabma7@fel.cvut.cz>
	Thu, 12 May 2016 23:53:44 +0000 (01:53 +0200)
committer	Martin Jerabek <jerabma7@fel.cvut.cz>
	Thu, 12 May 2016 23:56:01 +0000 (01:56 +0200)
commit	a9f1e455e73421dfede13efd167511860657f1d0
tree	74bc940d82563aa8ca064368578d520a6fcf3f31	tree \| snapshot
parent	4413e7626dcc5a4512960c8693749832cc990e67	commit \| diff

sja1000: IP fixes, corrected device-tree entry, it works now

petalinux/subsystems/linux/configs/device-tree/system-top.dts		diff \| blob \| history
system/ip/can_merge/can_merge.vhd		diff \| blob \| history
system/ip/can_merge/component.xml		diff \| blob \| history
system/ip/sja1000_1.0/component.xml		diff \| blob \| history
system/ip/sja1000_1.0/hdl/can_ifc_axi_sync_duplex.v		diff \| blob \| history
system/ip/sja1000_1.0/hdl/can_registers.v		diff \| blob \| history
system/ip/sja1000_1.0/hdl/sja1000.v		diff \| blob \| history
system/script/dist.tcl	[new file with mode: 0644]	blob
system/script/recreate.tcl		diff \| blob \| history
system/src/top/top.bd		diff \| blob \| history
system/system.bif	[new file with mode: 0644]	blob

CAN benchmark FPGA design and software for MicroZed board