TXD and RXD names in the top-level desing exchanged so it makes more sense.
# RS-232 Port #
#==============================================================================#
-NET "RXD" LOC = "A7"; # input to RS232 driver
-NET "TXD" LOC = "B7"; # output from RS232 driver
+NET "TXD" LOC = "A7"; # output from the board (from FPGA)
+NET "RXD" LOC = "B7"; # input to the board (to FPGA)
#==============================================================================#
# Incremental rotary encoder #
CLK_24MHz: in std_logic;
RESET: in std_logic;
- RXD : out std_logic;
- TXD : in std_logic;
+ RXD : in std_logic;
+ TXD : out std_logic;
ROT_FEED : out std_logic;
ROT_A : in std_logic;
per_irq => uart_irq,
per_dout => uart_dout,
- rxd => TXD,
- txd => RXD
+ rxd => RXD,
+ txd => TXD
);