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description | MSP430 simple UART echo - test top level design for Virtex 2 V2MB1000 board |
owner | buriavl2 |
last change | Sun, 13 Feb 2011 16:26:56 +0000 (17:26 +0100) |
URL | git://rtime.felk.cvut.cz/fpga/virtex2/uart.git |
ssh://git@rtime.felk.cvut.cz/fpga/virtex2/uart.git | |
http://rtime.felk.cvut.cz/git/fpga/virtex2/uart.git |
13 years ago | master | shortlog | log | tree |