#OPT_CFLAGS += $(call CHECKCC,--param large-function-insns=10000)
# The -Os option of gcc-4.0 sets max-inline-insns-single to 5 which prevents
-# # inlining of almost every function
+# inlining of almost every function
NOOPT_SHARED_FLAGS += $(call CHECKCC,--param max-inline-insns-single=50)
SHARED_FLAGS += -mpreferred-stack-boundary=4 -m64 -mcmodel=kernel \
-mno-red-zone -funit-at-a-time
OPT_CFLAGS += -mno-red-zone -funit-at-a-time
OPT_CXXFLAGS += -mno-red-zone -funit-at-a-time
-SHARED_FLAGS-$(CONFIG_AMD64_CORE2) += $(call CHECKCC,-march=core2,-march=i686)
-SHARED_FLAGS-$(CONFIG_AMD64_ATOM) += $(call CHECKCC,-march=atom,-march=i686)
-SHARED_FLAGS-$(CONFIG_AMD64_K8) += $(call CHECKCC,-march=k8,-march=i686)
+SHARED_FLAGS-$(CONFIG_AMD64_CORE2) += $(call CHECKCC,-march=core2,)
+SHARED_FLAGS-$(CONFIG_AMD64_ATOM) += $(call CHECKCC,-march=atom,)
+SHARED_FLAGS-$(CONFIG_AMD64_K8) += $(call CHECKCC,-march=k8,)
SHARED_FLAGS += $(call CHECKCC,-mno-mmx,)
SHARED_FLAGS += $(call CHECKCC,-mno-sse,)
SHARED_FLAGS += $(call CHECKCC,-mno-sse2,)
vmem_alloc_IMPL := vmem_alloc vmem_alloc-arch
tb_entry_IMPL := tb_entry tb_entry-arm
+ifeq ("$(CONFIG_JDB)","y")
JDB_INTERFACES := jdb_handler_queue jdb_module jdb_pic \
jdb jdb_core jdb_prompt_ext jdb_list \
jdb_prompt_module jdb_exit_module jdb_kern_info \
jdb_trap_state jdb_ipi jdb_rcupdate \
jdb_ipc_gate jdb_obj_space jdb_log jdb_factory \
jdb_semaphore jdb_thread jdb_scheduler jdb_sender_list\
- jdb_perf jdb_vm jdb_regex jdb_disasm
+ jdb_perf jdb_vm jdb_regex jdb_disasm jdb_bp
JDB_TBUF_IFS := jdb_tbuf jdb_tbuf_init jdb_tbuf_output \
jdb_tbuf_show \
tb_entry tb_entry_output
-ifeq ("$(CONFIG_JDB)","y")
INTERFACES_KERNEL += $(JDB_INTERFACES) $(JDB_TBUF_IFS) $(DBG_INTERFACES)
jdb_IMPL := jdb jdb-arm jdb-ansi jdb-thread
jdb_kern_info_IMPL := jdb_kern_info jdb_kern_info-arm \
jdb_ptab_IMPL := jdb_ptab jdb_ptab-ia32-ux-arm jdb_ptab-arm
jdb_entry_frame_IMPL := jdb_entry_frame-arm
jdb_trace_set_IMPL := jdb_trace_set jdb_trace_set-arm
+jdb_bp := jdb_bp
thread_IMPL += thread-debug
ifneq ($(CONFIG_JDB_GZIP),)
#
# JDB subsystem
#
+ifeq ("$(CONFIG_JDB)","y")
JDB_INTERFACES := jdb jdb_attach_irq jdb_core jdb_scheduler jdb_entry_frame \
jdb_exit_module jdb_factory jdb_handler_queue \
jdb_input jdb_ipc_gate jdb_kobject jdb_kobject_names\
jdb_obj_space jdb_prompt_ext jdb_screen jdb_space \
jdb_symbol jdb_table jdb_tcb jdb_thread \
jdb_thread_list jdb_trace jdb_util kern_cnt \
- push_console jdb_disasm jdb_regex
+ push_console jdb_regex jdb_disasm jdb_bp
JDB_TBUF_IFS := jdb_tbuf jdb_tbuf_init jdb_tbuf_output \
jdb_tbuf_show tb_entry tb_entry_output
-
-
-ifeq ("$(CONFIG_JDB)","y")
INTERFACES_KERNEL += $(JDB_INTERFACES) $(JDB_TBUF_IFS) #$(DBG_INTERFACES)
jdb_IMPL := jdb jdb-ansi jdb-ppc32 jdb-thread
jdb_tcb_IMPL := jdb_tcb jdb_tcb-ppc32
jdb_entry_frame_IMPL := jdb_entry_frame-ppc32
+jdb_bp := jdb_bp
thread_IMPL += thread-debug
endif
return 0;
}
+PUBLIC static
+int
+Jdb_bp::instruction_bp_at_addr(Address addr)
+{ return test_match(addr, Breakpoint::INSTRUCTION); }
+
+
PUBLIC static inline NOEXPORT
void
Jdb_bp::restrict_task(int num, int other, Mword task)
}
static Jdb_set_bp jdb_set_bp INIT_PRIORITY(JDB_MODULE_INIT_PRIO);
-
-// external callable
-int
-jdb_instruction_bp_at_addr(Address addr)
-{ return Jdb_bp::test_match(addr, Breakpoint::INSTRUCTION); }
-
--- /dev/null
+// Implementation for those who do not provide a breakpoint implementation
+INTERFACE:
+
+class Jdb_bp
+{
+public:
+ static int instruction_bp_at_addr(Address) { return 0; }
+};
#include "alloca.h"
#include "disasm.h"
#include "jdb.h"
+#include "jdb_bp.h"
#include "jdb_input.h"
#include "jdb_lines.h"
#include "jdb_module.h"
char Jdb_disasm::show_intel_syntax;
char Jdb_disasm::show_lines = 2;
-
-// available from the jdb_bp module
-extern int jdb_instruction_bp_at_addr(Address addr) __attribute__((weak));
-
static
bool
Jdb_disasm::disasm_line(char *buffer, int buflen, Address &addr,
break;
}
}
-
+
// show instruction breakpoint
- if (jdb_instruction_bp_at_addr != 0)
- {
- if (Mword i = jdb_instruction_bp_at_addr(addr))
- {
- stat_str[0] = '#';
- stat_str[1] = '0'+i;
- }
- }
+ if (Mword i = Jdb_bp::instruction_bp_at_addr(addr))
+ {
+ stat_str[0] = '#';
+ stat_str[1] = '0'+i;
+ }
printf("%s"L4_PTR_FMT"%s%s ",
addr == enter_addr ? Jdb::esc_emph : "", addr, stat_str,
}
PUBLIC
-unsigned
+unsigned
Jdb_dump::key_pressed(int c, unsigned long &row, unsigned long &col)
{
switch (c)
{
default:
return Nothing;
-
+
case KEY_CURSOR_HOME: // return to previous or go home
if (level == 0)
{
}
}
return Redraw;
-
+
case 'D':
if (Kconsole::console()->find_console(Console::GZIP))
{
return Redraw;
}
return Handled;
-
+
case ' ': // change viewing mode
switch (dump_type)
{
break;
case 'c': // set boundaries for highlighting memory contents
- if (level<=7 && dump_type == D_MODE)
+ if (level <= 7 && dump_type == D_MODE)
{
Address a;
if (Jdb::peek((Address*)virt(row,col), task, a))
return Redraw;
}
}
-
break;
+
+ case 'r':
+ return Redraw;
}
return Handled;
#include "terminate.h"
#include "types.h"
-
/**
* Private 'exit' module.
- *
+ *
* This module handles the 'exit' or '^' command that
* makes a call to exit() and virtually reboots the system.
*/
Jdb::screen_scroll(1, 127);
Jdb::blink_cursor(Jdb_screen::height(), 1);
Jdb::cursor(127, 1);
+ vmx_off();
terminate(1);
return LEAVE;
}
PUBLIC
int
Jdb_exit_module::num_cmds() const
-{
+{
return 1;
}
Jdb_exit_module::Jdb_exit_module()
: Jdb_module("GENERAL")
{}
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION [vmx]:
+
+// VT might need some special treatment, switching VT off seems to be
+// necessary to do a (keyboard) reset
+
+#include "cpu.h"
+
+PRIVATE static
+void
+Jdb_exit_module::do_vmxoff(unsigned, void *)
+{
+ asm volatile("vmxoff");
+}
+
+PRIVATE static
+void
+Jdb_exit_module::remote_vmxoff(unsigned cpu)
+{
+ Jdb::remote_work(cpu, do_vmxoff, 0);
+}
+
+PRIVATE
+void
+Jdb_exit_module::vmx_off() const
+{
+ if (Cpu::boot_cpu()->vmx())
+ Jdb::foreach_cpu(&remote_vmxoff);
+}
+
+// ------------------------------------------------------------------------
+IMPLEMENTATION [!vmx]:
+
+PRIVATE
+void
+Jdb_exit_module::vmx_off() const {}
Jdb::cursor(crow - absr + 1, col_o);
}
}
- goto screen;
-
+ goto screen;
+
default:
break;
}
{
crow -= drows;
if (absr >= drows)
- absr -= drows;
+ absr -= drows;
else
absr = 0;
}
Jdb::abort_command();
return false;
default:
- if (Jdb::is_toplevel_cmd(c))
+ if (Jdb::is_toplevel_cmd(c))
return false;
break;
}
putstr("vCPU st: ");
if (t->state() & Thread_vcpu_enabled)
{
- char st[7];
+ char st1[7];
+ char st2[7];
printf("c=%s s=%s e-ip=%08lx e-sp=%08lx S=",
- vcpu_state_str(t->vcpu_state()->state, st, sizeof(st)),
- vcpu_state_str(t->vcpu_state()->_saved_state, st, sizeof(st)),
- t->vcpu_state()->_entry_ip, t->vcpu_state()->_entry_sp);
+ vcpu_state_str(t->vcpu_state()->state, st1, sizeof(st1)),
+ vcpu_state_str(t->vcpu_state()->_saved_state, st2, sizeof(st2)),
+ t->vcpu_state()->_entry_ip, t->vcpu_state()->_entry_sp);
print_kobject(static_cast<Task*>(t->vcpu_user_space()));
}
else
{
extern Spin_lock _tramp_mp_spinlock;
- state_change_dirty (0, Thread_ready); // Set myself ready
+ state_change_dirty(0, Thread_ready); // Set myself ready
// Setup initial timeslice
- set_current_sched (sched());
+ set_current_sched(sched());
Fpu::init(cpu());
// initialize the current_mem_space function to point to the kernel space
Kernel_task::kernel_task()->mem_space()->make_current();
+ Mem_unit::tlb_flush();
+
Cpu::cpus.cpu(current_cpu()).set_online(1);
_tramp_mp_spinlock.set(1);
Cp15_c1_generic = Cp15_c1_mmu
| (Config::Cp15_c1_use_alignment_check ? Cp15_c1_alignment_check : 0)
- //| Cp15_c1_branch_predict
+ | Cp15_c1_branch_predict
| Cp15_c1_high_vector
| (Config::Cp15_c1_use_a9_swp_enable ? Cp15_c1_sw : 0),
#ifdef CONFIG_ARM_TZ
+.macro ISB_OP reg
+#ifdef CONFIG_ARM_V7
+ isb
+#else
+ mcr p15, 0, lr, c7, c5, 4 @ cp15isb
+#endif
+.endm
+
/**********************************************************************
* Secure and Nonsecure switching stuff
*
// switch to non-secure world
mov r1, #1
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
mrc p15, 0, r1, c2, c0, 0 @ read CP15_TTB0
stmia r0!, {r1}
// switch to secure world
mov r1, #0
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
mrc p15, 0, r1, c5, c0, 0 @ read CP15_DFSR
stmia r0!, {r1}
// switch to non-secure world
mov r1, #1
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
ldmia r0!, {r1}
mcr p15, 0, r1, c2, c0, 0 @ write CP15_TTB0
// switch to secure world
mov r1, #0
mcr p15, 0, r1, c1, c1, 0
- isb
+ ISB_OP r1
xxx
#endif
.macro SWITCH_TO_NONSECURE_MODE
mov lr, #0xf
mcr p15, 0, lr, c1, c1, 0
- isb
+ ISB_OP lr
.endm
.macro SWITCH_TO_SECURE_MODE
mov lr, #0x0
mcr p15, 0, lr, c1, c1, 0
- isb
+ ISB_OP lr
.endm
Space *const ktask = Kernel_task::kernel_task();
check(kernel->bind(ktask, 0));
+ Mem_unit::tlb_flush();
+
// switch to stack of kernel thread and bootstrap the kernel
asm volatile
(" str sp,%0 \n" // save stack pointer in safe register
Mem_space::Mem_space (Ram_quota *q, Dir_type* pdir)
: _quota(q), _dir (pdir)
{
- asid(0);
+ asid(~0UL);
enable_reverse_lookup ();
}
PRIVATE inline static
unsigned long
Mem_space::next_asid(unsigned cpu)
-{
- unsigned long ret = _next_free_asid.cpu(cpu)++;
- return ret;
-}
+{ return _next_free_asid.cpu(cpu)++; }
PRIVATE inline NEEDS[Mem_space::next_asid]
unsigned long
bl invalidate_l1_v7
#endif
+ mcr p15, 0, r0, c7, c5, 0 // ICIALLU
+ mcr p15, 0, r0, c7, c5, 6 // BPIALL
+
mcr p15, 0, r0, c7, c10, 4 // dsb
#ifdef CONFIG_ARM_V6
mcr p15, 0, r0, c7, c7, 0 // inv both
ldr r0, [r0]
mcr p15, 0, r0, c3, c0
+ // init TTBCR
+ mov r0, #0
+ mcr p15, 0, r0, c2, c0, 2
+
adr r0, _tramp_mp_startup_pdbr
ldr r0, [r0]
mcr p15, 0, r0, c2, c0
#include "mem_space.h"
#include "thread_state.h"
#include "timer.h"
-#include "jdb.h"
#include "ref_ptr.h"
FIASCO_DEFINE_KOBJ(Vm);
Vm::state()
{ return reinterpret_cast<machine_state *>(_state); };
+// ------------------------------------------------------------------------
IMPLEMENTATION [arm && tz]:
#include "thread.h"
}
_state = (Mword *)(Virt_addr(state_fpage.mem_address()).value());
-
+
{
bool resident;
Mem_space::Phys_addr phys;
return;
WARN("tz: Receive event failed\n");
}
-
+
log_vm(this, 1);
if (!get_fpu())
}
Cpu::cpus.cpu(current()->cpu()).tz_switch_to_ns(_state);
-
+
assert(cpu_lock.test());
log_vm(this, 0);
-
+
if ((state()->exit_reason != 1) ||
((state()->exit_reason == 1) &&
((state()->r[0] & 0xffff0000) == 0xffff0000)))
if (!current_thread()->switchin_fpu())
{
printf("tz: switchin_fpu failed\n");
- return false;
+ return false;
}
}
return true;
}
+// --------------------------------------------------------------------------
IMPLEMENTATION [arm && tz && !fpu]:
PUBLIC
return L4_msg_tag(0, 0, 0, 0);
}
+// --------------------------------------------------------------------------
IMPLEMENTATION:
PUBLIC
f->tag(L4_msg_tag(0,0,0,-L4_err::EInval));
}
+// --------------------------------------------------------------------------
+IMPLEMENTATION [debug]:
+
+#include "jdb.h"
+
PRIVATE
Mword
Vm::jdb_get(Mword *state_ptr)
return snprintf(buf, max, " utcb:%lx pc:%lx ", (Mword)_state, (Mword)jdb_get(&state()->pc));
}
-// --------------------------------------------------------------------------
-IMPLEMENTATION [debug]:
-
IMPLEMENT
unsigned
Vm::vm_log_fmt(Tb_entry *e, int maxlen, char *buf)
{
if (l->r0 == 0x1110)
return snprintf(buf, maxlen, "entry: pc:%08lx/%03lx intack irq: %lx", l->pc, l->pending_events, l->r1);
-
+
return snprintf(buf, maxlen, "entry: pc:%08lx/%03lx r0:%lx", l->pc, l->pending_events, l->r0);
}
return snprintf(buf, maxlen, "exit: pc:%08lx/%03lx intack", l->pc, l->pending_events);
if (l->r0 == 0x1115)
return snprintf(buf, maxlen, "exit: pc:%08lx/%03lx send ipi:%lx", l->pc, l->pending_events, l->r1);
-
+
return snprintf(buf, maxlen, "exit: pc:%08lx/%03lx r0:%lx", l->pc, l->pending_events, l->r0);
}
PUBLIC static inline
void
-Vm::log_vm(Irq *, bool)
+Vm::log_vm(Vm *, bool)
{}
void
Buddy_t_base<A,B,M>::free(void *block, unsigned long size)
{
- assert ((unsigned long)block >= _base);
- assert ((unsigned long)block - _base < Max_mem);
- assert (!_free_map[((unsigned long)block - _base) / Min_size]);
+ assert_kdb ((unsigned long)block >= _base);
+ assert_kdb ((unsigned long)block - _base < Max_mem);
+ assert_kdb (!_free_map[((unsigned long)block - _base) / Min_size]);
//bool _b = 0;
//if (_debug) printf("Buddy::free(%p, %ld)\n", block, size);
unsigned size_index = 0;
extern Thread *nil_thread;
static Thread *&kernel_thread = nil_thread;
+class Kobject_iface;
+
+class Initial_kobjects
+{
+public:
+ enum
+ {
+ Max = 5,
+ First_cap = 5,
+
+ End_cap = First_cap + Max,
+ };
+
+ void register_obj(Kobject_iface *o, unsigned cap)
+ {
+ assert (cap >= First_cap);
+ assert (cap < End_cap);
+
+ cap -= First_cap;
+
+ assert (!_v[cap]);
+
+ _v[cap] = o;
+ }
+
+ Kobject_iface *obj(unsigned cap) const
+ {
+ assert (cap >= First_cap);
+ assert (cap < End_cap);
+
+ cap -= First_cap;
+
+ return _v[cap];
+ }
+
+private:
+ Kobject_iface *_v[Max];
+};
+
class Global_context_data
{
Mword _state;
};
+extern Initial_kobjects initial_kobjects;
+
//---------------------------------------------------------------------------
INTERFACE [mp]:
Thread *nil_thread;
bool running = true;
unsigned boot_stack;
+Initial_kobjects initial_kobjects;
inline NEEDS ["config.h"]
Context *context_of(const void *ptr)
int get_int() const { return (config_and_cap & Tn_INT_ROUTE_CNF_MASK) >> 9; }
- bool can_periodic() { return config_and_cap & Tn_PER_INT_CAP; }
- void set_periodic() { config_and_cap |= Tn_TYPE_CNF; }
+ bool can_periodic() const { return config_and_cap & Tn_PER_INT_CAP; }
+ void set_periodic() { config_and_cap |= Tn_TYPE_CNF; }
void set_level_irq() { config_and_cap |= Tn_INT_TYPE_CNF; }
void set_edge_irq() { config_and_cap &= ~Tn_INT_TYPE_CNF; }
- bool can_64bit() { return config_and_cap & Tn_SIZE_CAP; }
- void force_32bit() { config_and_cap |= Tn_32MODE_CNF; }
- void val_set() { config_and_cap |= Tn_VAL_SET_CNF; }
+ bool can_64bit() const { return config_and_cap & Tn_SIZE_CAP; }
+ void force_32bit() { config_and_cap |= Tn_32MODE_CNF; }
+ void val_set() { config_and_cap |= Tn_VAL_SET_CNF; }
- Unsigned32 int_route_cap() { return config_and_cap >> 32; }
- bool int_avail(int i) { return int_route_cap() & i; }
+ Unsigned32 int_route_cap() const { return config_and_cap >> 32; }
+ bool int_avail(int i) const { return int_route_cap() & i; }
int get_first_int()
{
public:
enum { Page_shift = Config::PAGE_SHIFT };
Mword leaf() const { return true; }
- void set(Address p, bool intermed, bool present, unsigned long attrs = 0)
+ void set(Address p, bool intermed, bool present, unsigned long attrs = 0)
{
_raw = (p & Pfn) | (present ? 1 : 0)
| (intermed ? (Writable | User | Cacheable) : 0) | attrs;
struct
{
Mword pdir;
- int (*handler)(Trap_state*, unsigned int);
+ FIASCO_FASTCALL int (*handler)(Trap_state*, unsigned);
void *stack;
} p;
if (get_max_lvt() > 3)
clear_num_errors();
after = get_num_errors();
- printf("APIC ESR value before/after enabling: %08x/%08x\n",
+ printf("APIC ESR value before/after enabling: %08x/%08x\n",
before, after);
}
}
// entry_sys_fast_ipc/entry_sys_fast_ipc_c/entry_sys_fast_ipc_log.
Address tss_mem = alloc_tss(sizeof(Tss) + 256);
assert(tss_mem + sizeof(Tss) + 256 < Mem_layout::Io_bitmap);
- size_t tss_size;
+ size_t tss_size;
if (Config::enable_io_protection)
// this is actually tss_size +1, including the io_bitmap_delimiter byte
assert(tss_size < 0x100000); // must fit into 20 Bits
- cpu.init_tss (tss_mem, tss_size);
+ cpu.init_tss(tss_mem, tss_size);
// force GDT... to memory before loading the registers
asm volatile ( "" : : : "memory" );
cpu.set_gdt();
cpu.set_ldt(0);
- cpu.set_ds (Gdt::data_segment());
- cpu.set_es (Gdt::data_segment());
- cpu.set_ss (Gdt::gdt_data_kernel | Gdt::Selector_kernel);
- cpu.set_fs (Gdt::gdt_data_user | Gdt::Selector_user);
- cpu.set_gs (Gdt::gdt_data_user | Gdt::Selector_user);
- cpu.set_cs ();
+ cpu.set_ds(Gdt::data_segment());
+ cpu.set_es(Gdt::data_segment());
+ cpu.set_ss(Gdt::gdt_data_kernel | Gdt::Selector_kernel);
+ cpu.set_fs(Gdt::gdt_data_user | Gdt::Selector_user);
+ cpu.set_gs(Gdt::gdt_data_user | Gdt::Selector_user);
+ cpu.set_cs();
// and finally initialize the TSS
cpu.set_tss();
void
Space::switchin_ldt() const
{
- Cpu::cpus.cpu(current_cpu()).enable_ldt (_ldt.addr(), _ldt.size());
+ Cpu::cpus.cpu(current_cpu()).enable_ldt(_ldt.addr(), _ldt.size());
}
void *
Vm_svm::operator new (size_t size, void *p)
{
+ (void)size;
assert (size == sizeof (Vm_svm));
return p;
}
void *
Vm_vmx::operator new (size_t size, void *p)
{
+ (void)size;
assert (size == sizeof (Vm_vmx));
return p;
}
asm volatile("vmwrite %0, %1" : : "r" ((Unsigned64)value >> 32), "r" (field + 1));
}
-static void vmxoff(void)
-{
- asm volatile("vmxoff");
-}
-
PUBLIC
Vmx::Vmx(unsigned cpu)
: _vmx_enabled(false), _has_vpid(false)
asm volatile("vmxon %0" : :"m"(_vmxon_base_pa):);
_vmx_enabled = true;
- atexit(vmxoff);
-
printf("VMX: initialized\n");
Mword eflags;
void
Gdt_entry::show() const
{
- static char const modes[] = {16,64,32,-1};
+ static char const modes[] = { 16, 64, 32, -1 };
// segment descriptor
Address b = base();
- Address l = size();
printf("%016lx-%016lx dpl=%d %dbit %s %02X (\033[33;1m%s\033[m)\n",
- b, b+l, (access & 0x60) >> 5,
- modes[mode()],
- access & 0x10 ? "code/data" : "system ",
- access & 0x1f, type_str());
+ b, b + size(), (access & 0x60) >> 5,
+ modes[mode()],
+ access & 0x10 ? "code/data" : "system ",
+ access & 0x1f, type_str());
}
PUBLIC inline
Gdt_entry::size() const
{
Mword l = limit();
- return (granularity()) ? ((l+1) << 12)-1 : l;
+ return granularity() ? ((l+1) << 12)-1 : l;
}
PUBLIC inline
unsigned
Io_apic::legacy_override(unsigned i)
{
+ if (!_madt)
+ return i;
+
unsigned tmp = 0;
for (;;++tmp)
{
public:
struct Irq_log
{
- Mword irq_obj;
- int irq_number;
+ Mword irq_obj;
+ Address user_ip;
+ int irq_number;
};
static unsigned irq_log_fmt(Tb_entry *, int, char *)
Irq::irq_log_fmt(Tb_entry *e, int maxlen, char *buf)
{
Irq_log *l = e->payload<Irq_log>();
- return snprintf(buf, maxlen, "0x%x/%u D:%lx", l->irq_number, l->irq_number,
- l->irq_obj);
+ return snprintf(buf, maxlen, "0x%x/%u D:%lx userip=%lx",
+ l->irq_number, l->irq_number,
+ l->irq_obj, l->user_ip);
}
PUBLIC static inline
void
Irq::log_irq(Irq *irq, int nr)
{
- LOG_TRACE("IRQ-HW", "irq-hw", current(), __irq_log_fmt,
+ Context *c = current();
+ LOG_TRACE("IRQ-Object triggers", "irq", c, __irq_log_fmt,
Irq::Irq_log *l = tbe->payload<Irq::Irq_log>();
l->irq_number = nr;
- l->irq_obj = irq ? irq->dbg_id() : ~0UL;
+ l->user_ip = c->regs()->ip(),
+ l->irq_obj = irq ? irq->dbg_id() : ~0UL;
);
}
void
Irq::log_timer_irq(int nr)
{
- LOG_TRACE("IRQ-Timer", "irq-ti", current(), __irq_log_fmt,
+ Context *c = current();
+ LOG_TRACE("Kernel Timer Events", "timer", c, __irq_log_fmt,
Irq::Irq_log *l = tbe->payload<Irq::Irq_log>();
l->irq_number = nr;
- l->irq_obj = ~0UL;
+ l->user_ip = c->regs()->ip(),
+ l->irq_obj = ~0UL;
);
}
FIASCO_DECLARE_KOBJ();
friend class Icu_h<Icu>;
-
-public:
};
return commit_result(0, 1);
}
+
+PUBLIC inline
+Icu::Icu()
+{
+ initial_kobjects.register_obj(this, 6);
+}
+
+static Icu icu;
+
#include "config.h"
#include "cmdline.h"
-#include "scheduler.h"
#include "factory.h"
#include "initcalls.h"
#include "ipc_gate.h"
#include "thread.h"
#include "types.h"
#include "ram_quota.h"
-#include "vlog.h"
-#include "irq_controller.h"
-
-static Vlog vlog;
-static Scheduler scheduler;
-static Icu icu;
enum Default_base_caps
{
C_pager = 4,
C_log = 5,
C_icu = 6,
- C_scheduler = 7,
- C_log_irq,
+ C_scheduler = 7
};
check (sigma0->initialize());
check (map(sigma0, sigma0_task->obj_space(), sigma0_task, C_task, 0));
check (map(Factory::root(), sigma0_task->obj_space(), sigma0_task, C_factory, 0));
- check (map(&scheduler, sigma0_task->obj_space(), sigma0_task, C_scheduler, 0));
- check (map(&vlog, sigma0_task->obj_space(), sigma0_task, C_log, 0));
- check (map(&icu, sigma0_task->obj_space(), sigma0_task, C_icu, 0));
+
+ for (unsigned c = Initial_kobjects::First_cap; c < Initial_kobjects::End_cap; ++c)
+ {
+ Kobject_iface *o = initial_kobjects.obj(c);
+ if (o)
+ check(map(o, sigma0_task->obj_space(), sigma0_task, c, 0));
+ }
sigma0_space = sigma0_task->mem_space();
sigma0_thread->activate();
check (obj_map(sigma0_task, C_factory, 1, boot_task, C_factory, 0).error() == 0);
- check (obj_map(sigma0_task, C_scheduler, 1, boot_task, C_scheduler, 0).error() == 0);
- check (obj_map(sigma0_task, C_log, 1, boot_task, C_log, 0).error() == 0);
- check (obj_map(sigma0_task, C_icu, 1, boot_task, C_icu, 0).error() == 0);
+ for (unsigned c = Initial_kobjects::First_cap; c < Initial_kobjects::End_cap; ++c)
+ {
+ Kobject_iface *o = initial_kobjects.obj(c);
+ if (o)
+ check(obj_map(sigma0_task, c, 1, boot_task, c, 0).error() == 0);
+ }
boot_thread->activate();
}
Timer::init_system_clock();
Sched_context::rq(cpu()).set_idle(this->sched());
+ Kernel_task::kernel_task()->mem_space()->make_current();
+
// Setup initial timeslice
- set_current_sched (sched());
+ set_current_sched(sched());
Timer::enable();
#include "kip.h"
#include "mem_region.h"
#include "buddy_alloc.h"
+#include "panic.h"
static Kmem_alloc::Alloc _a;
Kmem_alloc::Alloc *Kmem_alloc::a = &_a;
#include "member_offs.h"
#include "timeout.h"
#include "prio_list.h"
+#include "ref_obj.h"
class Syscall_frame;
class Sender;
FIASCO_DEFINE_KOBJ(Scheduler);
+static Scheduler scheduler;
+
+PUBLIC inline
+Scheduler::Scheduler()
+{
+ initial_kobjects.register_obj(this, 7);
+}
+
PRIVATE static
Mword
Scheduler::first_online(Cpu_set const *cpus, Mword bm)
-INTERFACE:
-
-class Sys_ex_regs_frame;
-
-
-IMPLEMENTATION:
-
-#include <cstdio>
-
-#include "l4_types.h"
+//---------------------------------------------------------------------------
+IMPLEMENTATION [debug]:
-#include "config.h"
-#include "entry_frame.h"
-#include "feature.h"
-#include "irq.h"
-#include "logdefs.h"
-#include "map_util.h"
-#include "processor.h"
-#include "ram_quota.h"
#include "space.h"
-#include "std_macros.h"
#include "task.h"
#include "thread.h"
-#include "thread_state.h"
-#include "warn.h"
-
-class Syscalls : public Thread
-{
-
-public:
- void sys_invoke_object();
-protected:
- Syscalls();
-};
+class Syscalls : public Thread { };
-extern "C" void sys_invoke_debug(Kobject *o, Syscall_frame *f) __attribute__((weak));
-
+extern "C" void sys_invoke_debug(Kobject *o, Syscall_frame *f);
PUBLIC inline NOEXPORT ALWAYS_INLINE
void
Syscalls::sys_invoke_debug()
{
- if (!&::sys_invoke_debug)
- return;
-
Syscall_frame *f = this->regs();
//printf("sys_invoke_debugger(f=%p, obj=%lx)\n", f, f->ref().raw());
Kobject_iface *o = space()->obj_space()->lookup_local(f->ref().cap());
extern "C" void sys_invoke_debug_wrapper()
{ static_cast<Syscalls*>(current_thread())->sys_invoke_debug(); }
+//---------------------------------------------------------------------------
+IMPLEMENTATION [!debug]:
+
+#include "thread.h"
+
+extern "C" void sys_invoke_debug_wrapper() {}
//---------------------------------------------------------------------------
INTERFACE [ia32 || ux || amd64]:
INTERFACE:
+#include "l4_buf_iter.h"
#include "l4_error.h"
class Syscall_frame;
#include "l4_types.h"
#include "l4_msg_item.h"
-#include "l4_buf_iter.h"
#include "config.h"
#include "cpu_lock.h"
unsigned entry_number = utcb->values[1];
unsigned idx = 2;
- Mword *trampoline_page = (Mword *)Kmem::phys_to_virt
- (Mem_layout::Trampoline_frame);
+ Mword *trampoline_page = (Mword *)Kmem::kernel_trampoline_page;
for (; idx < tag.words()
; idx += Utcb_values_per_ldt_entry,
_i_flags(F_ICRNL), _o_flags(F_ONLRET | F_OCRNL), _l_flags(F_ECHO)
{
Vkey::set_echo(Vkey::Echo_crnl);
+ // CAP idx 5 is the initial kernel stream
+ initial_kobjects.register_obj(this, 5);
}
PUBLIC
}
}
+
+static Vlog __vlog;
+
_data._free = elem_num;
}
-PUBLIC
-inline
-slab::~slab()
-{
- assert(_data._in_use == 0);
-
- slab_entry *e = _data._first_free;
-
- while (e)
- {
- _data._cache->elem_dtor(& e->_entry[0]);
- e = e->_next_free;
- }
-}
-
PUBLIC
void *
slab::alloc()
slab_cache_anon::~slab_cache_anon()
{
// the derived class should call destroy() before deleting us.
- assert(_first_slab == 0);
+ // assert(_first_slab == 0);
}
-PROTECTED
-void
+PROTECTED inline
+void
slab_cache_anon::destroy() // descendant should call this in destructor
{
+#if 0
slab *n, *s = _first_slab;
while (s)
}
_first_slab = 0;
+#endif
}
PUBLIC
endif
ifeq ($(IGNORE_MAKECONF_INCLUDE),)
-ifneq ($(filter help config txtconfig oldconfig,$(MAKECMDGOALS)),)
+ifneq ($(filter help config oldconfig,$(MAKECMDGOALS)),)
# tweek $(L4DIR)/mk/Makeconf to use the intermediate file
export BID_IGN_ROOT_CONF=y
BID_ROOT_CONF=$(DROPSCONF_CONFIG_MK)
export DROPS_STDDIR
# after having absfilename, we can export BID_ROOT_CONF
-ifneq ($(filter config txtconfig oldconfig gconfig qconfig xconfig, $(MAKECMDGOALS)),)
+ifneq ($(filter config oldconfig gconfig qconfig xconfig, $(MAKECMDGOALS)),)
export BID_ROOT_CONF=$(call absfilename,$(OBJ_BASE))/.config.all
endif
endif
# some more dependencies
tool: $(DROPSCONF_CONFIG_MK)
pkg: $(DROPSCONF_CONFIG_MK) tool
-doc: pkgdoc
ifneq ($(CONFIG_BID_BUILD_DOC),)
install-dirs += doc
$(VERBOSE)$(MAKE) -C pkg cont
.PHONY: all clean cleanall install hello pkgdoc up update
-.PHONY: $(BUILD_DIRS) doc/html check_build_tools cont cleanfast
+.PHONY: $(BUILD_DIRS) doc check_build_tools cont cleanfast
cleanall::
$(VERBOSE)rm -f *~
$(L4DIR)/tool/bin/gengrub2iso --timeout=0 $$ml \
$(OBJ_BASE)/images/$$(echo $$e | tr '[ ]' '[_]').iso "$$e"
+help::
+ @echo
+ @echo "Image generation targets:"
+ @echo " image - Generate images containing all modules."
+ @echo " Supported formats include ELF, uimage and raw."
+ @echo " grub1iso - Generate an ISO using GRUB1 in images/name.iso [x86, amd64]"
+ @echo " grub2iso - Generate an ISO using GRUB2 in images/name.iso [x86, amd64]"
+ @echo " qemu - Use Qemu to run 'name'. [x86, amd64]"
+ @echo " ux - Run 'name' under Fiasco/UX. [x86]"
+ @echo " kexec - Issue a kexec call to start the entry."
+ @echo " Add 'E=name' to directly select the entry without using the menu."
+ @echo " Modules are defined in conf/modules.list."
+
+
.PHONY: image qemu ux switch_ram_base grub1iso grub2iso
switch_ram_base:
@echo -e $(EMPHSTART)" Note, this report might disclose private information"$(EMPHSTOP)
@echo -e $(EMPHSTART)" Please review (and edit) before sending it to public lists"$(EMPHSTOP)
@echo -e $(EMPHSTART)"============================================================="$(EMPHSTOP)
+
+help::
+ @echo
+ @echo "Miscellaneous targets:"
+ @echo " switch_ram_base RAM_BASE=0xaddr"
+ @echo " - Switch physical RAM base of build to 'addr'."
+ @echo " update - Update working copy by using SVN."
+ @echo " cont - Continue building after fixing a build error."
+ @echo " clean - Call 'clean' target recursively."
+ @echo " cleanfast - Delete all directories created during build."
+ @echo " report - Print out host configuration information."
+ @echo " help - Print this help text."
MKFLAGS +=$(MKFLAGS_$@)
NM = $(SYSTEM_TARGET)nm
OBJCOPY = $(SYSTEM_TARGET)objcopy
-PKG_CONFIG = PKG_CONFIG_PATH= pkg-config --silence-errors
+PKG_CONFIG = pkg-config $(if $(VERBOSE),--silence-errors)
PWDCMD = sh -c pwd
RANLIB = $(SYSTEM_TARGET)ranlib
RM = rm -f
L4_BID_PKG_CONFIG = $(PKG_CONFIG)
BID_PKG_CONFIG = $(if $(strip $(3)), \
$(shell PKG_CONFIG_LIBDIR=$(1)/pc \
- $(L4_BID_PKG_CONFIG) \
+ PKG_CONFIG_PATH= $(L4_BID_PKG_CONFIG) \
--define-variable=incdir=$(1)/include/contrib \
$(2) $(3) || echo __PKGCONFIG_FAILED__))
$(VERBOSE)$(RM) $(DROPSCONF_CONFIG) $(DROPSCONF_CONFIG_H) \
$(DROPSCONF_CONFIG_MK) .menuconfig.log \
$(DROPSCONF_CONFIG).old
+
help::
- @echo " config - run the menu-driven configuration tool"
- @echo " txtconfig - run the configuration tool"
- @echo " oldconfig - (re)create the configuration header based on a prior"
- @echo " configuration or default values"
+ @echo
+ @echo "Configuration targets:"
+ @echo " config - run the menu-driven configuration tool"
+ @echo " gconfig - run a graphical configuration tool"
+ @echo " qconfig - run a graphical configuration tool"
+ @echo " xconfig - run a graphical configuration tool"
+ @echo " oldconfig - (re)create the configuration header based on a prior"
+ @echo " configuration or default values"
# special switch not to include DROPSCONF_CONFIG_MK
ifeq ($(DROPSCONF_DONTINC_MK),)
@echo "l4_bid_call_pkgconfig()" >> $(L4DEF_FILE_SH)
@echo "{" >> $(L4DEF_FILE_SH)
@echo " obj_base=\$$1; shift; " >> $(L4DEF_FILE_SH)
- @echo " PKG_CONFIG_LIBDIR=\$$obj_base/pc \$$L4_BID_PKG_CONFIG \\" >> $(L4DEF_FILE_SH)
+ @echo " PKG_CONFIG_LIBDIR=\$$obj_base/pc PKG_CONFIG_PATH= \\" >> $(L4DEF_FILE_SH)
+ @echo " \$$L4_BID_PKG_CONFIG \\" >> $(L4DEF_FILE_SH)
@echo " --define-variable=incdir=\$$obj_base/include/contrib \\" >> $(L4DEF_FILE_SH)
@echo " \"\$$@\"" >> $(L4DEF_FILE_SH)
@echo "}" >> $(L4DEF_FILE_SH)
--- /dev/null
+requires: libc
+provides: drivers_uart
+Maintainer: adam@os.inf.tu-dresden.de
--- /dev/null
+PKGDIR = .
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET = $(wildcard [a-z]*)
+
+include $(L4DIR)/mk/subdir.mk
+
+uart: of
--- /dev/null
+PKGDIR = ..
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET := include src
+
+include $(L4DIR)/mk/subdir.mk
+
+src: include
--- /dev/null
+PKGDIR = ../..
+L4DIR ?= $(PKGDIR)/../..
+
+PKGNAME = drivers
+EXTRA_TARGET = hpet
+
+include $(L4DIR)/mk/include.mk
--- /dev/null
+// vim: set ft=cpp:
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#pragma once
+
+#include <l4/sys/compiler.h>
+#include <l4/sys/types.h>
+
+namespace L4 {
+namespace Driver {
+
+class Hpet
+{
+public:
+ // General Capabilities and ID Register
+ unsigned rev_id() const { l4_mb(); return _cap_and_id & 0xff; }
+ unsigned num_tim_cap() const { l4_mb(); return ((_cap_and_id >> 8) & 0xf) + 1; }
+ unsigned count_size_cap() const { l4_mb(); return _cap_and_id & (1 << 13); }
+ unsigned leg_rt_cap() const { l4_mb(); return _cap_and_id & (1 << 13); }
+ unsigned vendor_id() const { l4_mb(); return (_cap_and_id >> 16) & 0xffff; };
+ l4_uint32_t counter_clk_period() const { l4_mb(); return _cap_and_id >> 32; }
+
+ // General Configuration Register
+ unsigned enabled() const { return _conf & 1; }
+ void enable() { _conf |= 1; l4_wmb(); }
+ void disable() { _conf &= ~1; l4_wmb(); }
+ unsigned leg_rt_cnf() const { return _conf & 2; }
+ void legacy_route_enable() { _conf |= 2; l4_wmb(); }
+ void legacy_route_disable() { _conf &= ~2; l4_wmb(); }
+
+ // General Interrupt Status Register
+ unsigned irq_active(int irqnum) const { l4_mb(); return (1 << irqnum) & _int_status; }
+ void irq_clear_active(int irqnum)
+ {
+ _int_status = 1 << irqnum; l4_wmb();
+ typeof(_int_status) dummy = *(volatile typeof(_int_status) *)&_int_status;
+ (void)dummy;
+ }
+
+ // Main Counter Register
+ l4_uint64_t main_counter_val() const { l4_mb(); return _main_counter; }
+ void main_counter_val(l4_uint64_t v) { _main_counter = v; l4_wmb(); }
+
+ class Timer
+ {
+ public:
+ // Timer N Configuration and Capability Register
+ void set_int_type_level() { _conf_and_cap |= 2; l4_wmb(); }
+ void set_int_type_edge() { _conf_and_cap &= ~2; l4_wmb(); }
+ unsigned is_int_type_level() const { return _conf_and_cap & 2; }
+ unsigned is_int_type_edge() const { return !is_int_type_level(); }
+
+ void enable_int() { _conf_and_cap |= 4; l4_wmb(); }
+ void disable_int() { _conf_and_cap &= ~4; l4_wmb(); }
+ unsigned is_int_enabled() const { return _conf_and_cap & 4; }
+
+ void set_periodic() { _conf_and_cap |= 8; l4_wmb(); }
+ void set_nonperiodic() { _conf_and_cap &= ~8; l4_wmb(); }
+ unsigned is_periodic() const { return _conf_and_cap & 8; }
+ unsigned is_nonperiodic() const { return !is_periodic(); }
+
+ unsigned periodic_int_capable() const { return _conf_and_cap & (1 << 4); }
+ unsigned can_64bit() const { return _conf_and_cap & (1 << 5); }
+
+ void val_set_cnf() { _conf_and_cap |= 1 << 6; l4_wmb(); }
+
+ void force_32bit() { _conf_and_cap |= 1 << 8; l4_wmb(); }
+ unsigned forced_32bit() const { return _conf_and_cap & (1 << 8); }
+
+ unsigned int_route_cnf() const { return (_conf_and_cap >> 9) & 0x1f; }
+ void set_int_route(unsigned irqnum)
+ { _conf_and_cap = (_conf_and_cap & ~(31 << 9)) | (irqnum << 9); }
+
+ void enable_fsb() { _conf_and_cap |= 1 << 14; l4_wmb(); }
+ void disable_fsb() { _conf_and_cap &= ~(1 << 14); l4_wmb(); }
+ unsigned is_fsb() const { return _conf_and_cap & (1 << 14); }
+
+ unsigned can_fsb() const { return _conf_and_cap & (1 << 15); }
+
+
+ l4_uint32_t int_route_cap() const { return _conf_and_cap >> 32; }
+ unsigned int_avail(int int_nr) const { return int_route_cap() & int_nr; }
+ unsigned ints_avail() const { return int_route_cap(); }
+
+ int get_first_int(int i = 0)
+ {
+ l4_uint32_t cap = int_route_cap();
+ for (; i < 32; ++i)
+ if (cap & (1 << i))
+ return i;
+ return ~0U;
+ }
+
+ l4_uint64_t comparator() const { return _comp; }
+ void set_comparator(l4_uint64_t v) { _comp = v; l4_wmb(); }
+
+ void fsb_int_addr(l4_uint32_t addr) { _int_route_addr = addr; }
+ void fsb_int_val(l4_uint32_t val) { _int_route_val = val; }
+
+ void print_state() const;
+
+ l4_uint64_t conf_and_cap() const { return _conf_and_cap; }
+ l4_uint64_t comp() const { return _comp; }
+
+ private:
+ l4_uint64_t _conf_and_cap;
+ l4_uint64_t _comp;
+ l4_uint32_t _int_route_addr; // right order?
+ l4_uint32_t _int_route_val;
+ } __attribute__((packed));
+
+ Timer *timer(int nr) const
+ {
+ return reinterpret_cast<Timer *>((char *)this + 0x100 + 0x20 * nr);
+ }
+
+ unsigned ioapic_irq(int nr) const
+ {
+ return timer(nr)->int_route_cnf();
+ }
+
+ void print_state() const;
+
+ l4_uint64_t clk2ns(l4_uint64_t v) const
+ { return v * counter_clk_period() / 1000000ULL; }
+
+ l4_uint64_t clk2us(l4_uint64_t v) const
+ { return v * counter_clk_period() / 1000000000ULL; }
+
+ l4_uint64_t us2clk(unsigned us) const
+ { return us * 1000000000ULL / counter_clk_period(); }
+
+ l4_uint64_t ns2clk(unsigned us) const
+ { return us * 1000000ULL / counter_clk_period(); }
+
+ l4_uint64_t cap_and_id() const { return _cap_and_id; }
+ l4_uint64_t conf() const { return _conf; }
+
+private:
+ l4_uint64_t _cap_and_id; // 0x0
+ l4_uint64_t _pad1;
+ l4_uint64_t _conf; // 0x10
+ l4_uint64_t _pad2;
+ l4_uint64_t _int_status; // 0x20
+ l4_uint64_t _pad3[(0xf0 - 0x28) / sizeof(l4_uint64_t)];
+ l4_uint64_t _main_counter;
+} __attribute__((packed));
+
+}}
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+SRC_CC += hpet.cc
+TARGET = libdrivers_hpet.a
+PC_FILENAME = libdrivers_hpet
+
+PRIVATE_INCDIR += $(SRC_DIR)/../include
+
+include $(L4DIR)/mk/lib.mk
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+
+#include <l4/drivers/hpet>
+
+#include <stdio.h>
+
+void
+L4::Driver::Hpet::print_state() const
+{
+ printf("HPET Information:\n");
+ printf("Rev-id: 0x%x\n", rev_id());
+ printf("Num timers: %d\n", num_tim_cap());
+ printf("Count size: %s\n", count_size_cap() ? "64bit" : "32bit");
+ printf("Legacy capable: %s\n", leg_rt_cap() ? "Yes" : "No");
+ printf("Legacy enabled: %s\n", leg_rt_cnf() ? "Yes" : "No");
+ printf("Vedor ID: 0x%x\n", vendor_id());
+ printf("Counter clock period: 0x%x / %u\n", counter_clk_period(),
+ counter_clk_period());
+ printf("Frequency (Hz): %lld\n", 1000000000000000ULL / counter_clk_period());
+
+ printf("Enabled: %s\n", enabled() ? "Yes" : "No");
+
+ printf("Main counter value: %lld\n", main_counter_val());
+
+ printf("Raw values: %16llx %16llx\n", cap_and_id(), conf());
+
+
+ for (unsigned i = 0; i < num_tim_cap(); ++i)
+ {
+ printf("HPET Timer-%d Information:\n", i);
+ timer(i)->print_state();
+ }
+}
+
+void
+L4::Driver::Hpet::Timer::print_state() const
+{
+ printf(" Int type: %s\n", is_int_type_level() ? "Level" : "Edge");
+ printf(" IRQ enabled: %s\n", is_int_enabled() ? "Yes" : "No");
+ printf(" Mode: %s\n", is_periodic() ? "Periodic" : "Non-periodic");
+ printf(" Periodic int capable: %s\n", periodic_int_capable() ? "Yes" : "No");
+ printf(" Can 64bit: %s\n", can_64bit() ? "Yes" : "No");
+ printf(" Forced to 32bit: %s\n", forced_32bit() ? "Yes" : "No");
+ printf(" Can FSB/MSI: %s\n", can_fsb() ? "Yes" : "No");
+ printf(" Does FSB/MSI: %s\n", is_fsb() ? "Yes" : "No");
+ printf(" IRQs available: %x\n", ints_avail());
+ printf(" IRQ set: %d\n", int_route_cnf());
+ printf(" Comparator value: %lld\n", comparator());
+ printf(" Raw values: %16llx %16llx\n", conf_and_cap(), comp());
+}
+
--- /dev/null
+PKGDIR = ..
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET = include src
+
+include $(L4DIR)/mk/subdir.mk
+
+src: include
--- /dev/null
+PKGDIR = ../..
+L4DIR ?= $(PKGDIR)/../..
+
+PKGNAME = drivers
+
+include $(L4DIR)/mk/include.mk
--- /dev/null
+#ifndef L4_PPC32_OF_H__
+#define L4_PPC32_OF_H__
+
+#include <stdarg.h>
+#include <string.h>
+
+namespace L4_drivers
+{
+class Of
+{
+private:
+ /* declarations */
+ struct prom_args
+ {
+ const char *service;
+ int nargs;
+ int nret;
+ void *args[10];
+ prom_args(const char *s, int na, int nr) : service(s), nargs(na), nret(nr) {}
+ };
+
+ typedef int (*prom_entry)(struct prom_args *);
+
+ //int prom_call(const char *service, int nargs, int nret, ...) const;
+protected:
+ enum {
+ PROM_ERROR = -1u
+ };
+
+
+ typedef void *ihandle_t;
+ typedef void *phandle_t;
+
+ typedef struct
+ {
+ unsigned long len;
+ char data[];
+ } of_item_t;
+
+ /* methods */
+ unsigned prom_call(const char *service, int nargs, int nret, ...) const
+ {
+ struct prom_args args = prom_args(service, nargs, nret);
+ va_list list;
+
+ va_start(list, nret);
+ for(int i = 0; i < nargs; i++)
+ args.args[i] = va_arg(list, void*);
+ va_end(list);
+
+ for(int i = 0; i < nret; i++)
+ args.args[nargs + i] = 0;
+
+ if(_prom()(&args) < 0)
+ return PROM_ERROR;
+
+ return (nret > 0) ? (unsigned long)args.args[nargs] : 0;
+ }
+
+
+ int prom_getprop(phandle_t node, const char *pname, void *value,
+ size_t size)
+ {
+ return prom_call("getprop", 4, 1, node, pname, (unsigned long)value,
+ (unsigned long)size);
+ }
+
+ int prom_next_node(phandle_t *nodep)
+ {
+ phandle_t node;
+
+ if ((node = *nodep) != 0
+ && (*nodep = (phandle_t)prom_call("child", 1, 1, node)) != 0)
+ return 1;
+ if ((*nodep = (phandle_t)prom_call("peer", 1, 1, node)) != 0)
+ return 1;
+ for (;;) {
+ if ((node = (phandle_t)prom_call("parent", 1, 1, node)) == 0)
+ return 0;
+ if ((*nodep = (phandle_t)prom_call("peer", 1, 1, node)) != 0)
+ return 1;
+ }
+ }
+
+ template<typename T>
+ static inline bool handle_valid(T p)
+ {
+ return ((unsigned long)p != 0 && (unsigned long)p != PROM_ERROR);
+ }
+
+ static prom_entry _prom(unsigned long prom = 0)
+ {
+ static prom_entry local_prom;
+
+ if(prom)
+ local_prom = reinterpret_cast<prom_entry>(prom);
+
+ return local_prom;
+ }
+
+public:
+ Of() {};
+
+ static void set_prom(unsigned long prom)
+ {
+ _prom(prom);
+ }
+
+ static unsigned long get_prom()
+ {
+ return reinterpret_cast<unsigned long>(_prom());
+ }
+
+};
+}
+
+#endif /* L4_PPC32_OF_H__*/
--- /dev/null
+#ifndef _L4_PPC32_OF_DEV_H__
+#define _L4_PPC32_OF_DEV_H__
+
+enum
+{
+ MAX_OF_DEVICES = 32
+};
+
+typedef struct of_device_t
+{
+ char type[32]; //type name
+ char name[32]; //device name
+ unsigned long reg; //address
+ union {
+ struct {
+ unsigned long cpu_freq;
+ unsigned long bus_freq;
+ unsigned long time_freq;
+ } freq;
+ unsigned long interrupts[3]; //pin, int nr, sense
+ };
+} of_device_t;
+
+#endif
--- /dev/null
+#include <l4/drivers/of.h>
+#include <stdio.h>
+
+namespace L4_drivers
+{
+class Of_if : public Of
+{
+private:
+ phandle_t _chosen;
+ ihandle_t _root;
+
+ phandle_t get_device(const char*, const char *prop = "device_type");
+ unsigned long cpu_detect(const char *prop);
+
+public:
+ Of_if() : Of(), _chosen(0), _root(0) {}
+ unsigned long detect_ramsize();
+ unsigned long detect_cpu_freq();
+ unsigned long detect_bus_freq();
+ unsigned long detect_time_freq();
+ bool detect_devices(unsigned long *start_addr, unsigned long *length);
+ void boot_finish();
+
+ phandle_t get_chosen()
+ {
+ if(handle_valid(_chosen)) return _chosen;
+ _chosen = (phandle_t)prom_call("finddevice", 1, 1, "/chosen");
+ return _chosen;
+ }
+
+ ihandle_t get_root()
+ {
+ if(handle_valid(_root)) return _root;
+ _root = (ihandle_t)prom_call("finddevice", 1, 1, "/");
+ return _root;
+ }
+
+ void vesa_set_mode(int mode);
+};
+}
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+SRC_CC := of.cc
+SYSTEMS := x86 arm amd64 ppc32
+TARGET = libdrivers_of.a
+
+PRIVATE_INCDIR += $(SRC_DIR)/../include
+
+include $(L4DIR)/mk/lib.mk
+
+CXXFLAGS += -DL4_NO_RTTI -fno-exceptions -fno-rtti
--- /dev/null
+#include "of_if.h"
+#include <l4/drivers/of_dev.h>
+
+namespace L4_drivers
+{
+ unsigned long Of_if::detect_ramsize()
+ {
+ unsigned long addr_cells, size_cells, ram_size;
+ unsigned long reg[100];
+ phandle_t mem;
+
+ prom_getprop(get_root(), "#address-cells", &addr_cells, sizeof(&addr_cells));
+ prom_getprop(get_root(), "#size-cells", &size_cells, sizeof(&size_cells));
+ ram_size = 0;
+
+ mem = get_device("memory");
+ unsigned int len = prom_getprop(mem, "reg", ®, sizeof(reg));
+ len /= 4; /* always 32 bit values */
+
+ if(len > sizeof(reg))
+ len = sizeof(reg);
+
+ unsigned long base, size;
+ for(unsigned i = 0; i < len; i += (addr_cells + size_cells)) {
+ base = reg[i + addr_cells - 1];
+ size = reg[i + addr_cells + size_cells - 1];
+ if((base + size) > ram_size)
+ ram_size = base + size;
+
+ printf(" Memory base: [%08lx; %08lx] size: %lu KB\n",
+ base, base + size, size / 1024);
+ }
+
+ return ram_size;
+ }
+
+ unsigned long Of_if::cpu_detect(const char* prop)
+ {
+ phandle_t cpu;
+ unsigned long val;
+ cpu = get_device("cpu");
+
+ prom_getprop(cpu, prop, &val, sizeof(&val));
+ return val;
+ }
+
+ unsigned long Of_if::detect_bus_freq()
+ {
+ return cpu_detect("bus-frequency");
+ }
+
+ unsigned long Of_if::detect_cpu_freq()
+ {
+ return cpu_detect("clock-frequency");
+ }
+
+ unsigned long Of_if::detect_time_freq()
+ {
+ return cpu_detect("timebase-frequency");
+ }
+
+ L4_drivers::Of_if::phandle_t Of_if::get_device(const char *device, const char *prop)
+ {
+ phandle_t dev;
+ char type[32];
+ for(dev = 0; prom_next_node(&dev); )
+ {
+ prom_getprop(dev, prop, type, sizeof(type));
+
+ if (strcmp(type, device))
+ continue;
+
+ return dev;
+ }
+ return 0;
+ }
+
+ bool Of_if::detect_devices(unsigned long *start_addr, unsigned long *length)
+ {
+ static of_device_t dev[MAX_OF_DEVICES];
+ char descr[64];
+
+ printf(" Detecting hardware ...\n");
+ int i = -1;
+
+ for(phandle_t node = 0; prom_next_node(&node) && i < MAX_OF_DEVICES;)
+ {
+ if (prom_getprop(node, "device_type", &(dev[i+1].type),
+ sizeof(dev[i].type)) < 0)
+ continue;
+ i++;
+
+ prom_getprop(node, "name", &dev[i].name, sizeof(dev[i].name));
+
+ if (prom_getprop(node, "reg", &(dev[i].reg), sizeof(dev[i].reg)) < 0)
+ dev[i].reg = 0;
+
+ if (!strcmp(dev[i].type, "cpu"))
+ {
+ dev[i].freq.cpu_freq = detect_cpu_freq();
+ dev[i].freq.bus_freq = detect_bus_freq();
+ dev[i].freq.time_freq = detect_time_freq();
+ }
+ else if (prom_getprop(node, "interrupts", (dev[i].interrupts),
+ sizeof(dev[i].interrupts)) < 0)
+ dev[i].interrupts[0] = dev[i].interrupts[1] = dev[i].interrupts[2] = ~0UL;
+
+
+ //just for information
+ prom_getprop(node, ".description", descr, sizeof(descr));
+
+ printf("\33[1;36m"
+ " [%s]\33[0;36m (%s)\33[0m\n"
+ " reg: %08lx interrupts: %08lx, %08lx, %08lx\n",
+ dev[i].name, descr, dev[i].reg, dev[i].interrupts[0],
+ dev[i].interrupts[1], dev[i].interrupts[2]);
+ }
+
+ if (i < 0)
+ return false;
+
+ *start_addr = (unsigned long)dev;
+ *length = (i + 1) * sizeof(of_device_t);
+
+ return true;
+ }
+
+
+ void Of_if::boot_finish()
+ {
+ ihandle_t _std;
+ //close stdin
+ prom_getprop(get_chosen(), "stdin", &_std, sizeof(_std));
+ prom_call("close", 1, 0, _std);
+ //close stdout
+ prom_getprop(get_chosen(), "stdout", &_std, sizeof(_std));
+ prom_call("close", 1, 0, _std);
+ //finish pending dma requests
+ prom_call("quiesce", 0, 0);
+ }
+
+ void Of_if::vesa_set_mode(int mode)
+ {
+ (void)mode;
+ unsigned long test_mode = 0x117;
+ phandle_t disp = get_device("display", "name");
+ int ret = prom_call("vesa-set-mode", 2, 1, disp, test_mode);// &test_mode);
+ unsigned long adr = prom_call("vesa-frame-buffer-adr", 1, 1);
+
+ printf("VESA: returned %d fb %08lx\n", ret, adr);
+ }
+}
--- /dev/null
+PKGDIR = ..
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET := include src
+include $(L4DIR)/mk/subdir.mk
--- /dev/null
+PKGDIR = ../..
+L4DIR ?= $(PKGDIR)/../..
+
+PKGNAME = drivers
+
+include $(L4DIR)/mk/include.mk
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_CXX_UART_H__
+#define L4_CXX_UART_H__
+
+#include <stddef.h>
+
+namespace L4
+{
+ class Uart
+ {
+ protected:
+ int _rx_irq;
+ int _tx_irq;
+ unsigned _mode;
+ unsigned _rate;
+
+ public:
+ void *operator new (size_t, void* a)
+ { return a; }
+
+ public:
+ typedef unsigned Transfer_mode;
+ typedef unsigned Baud_rate;
+
+ Uart(int rx_irq, int tx_irq)
+ : _rx_irq(rx_irq), _tx_irq(tx_irq), _mode(~0U), _rate(~0U)
+ {}
+
+ virtual bool startup(unsigned long base) = 0;
+
+ virtual ~Uart() {}
+ virtual void shutdown() = 0;
+ virtual bool enable_rx_irq(bool enable = true) = 0;
+ virtual bool enable_tx_irq(bool enable = true) = 0;
+ virtual bool change_mode(Transfer_mode m, Baud_rate r) = 0;
+ virtual int get_char(bool blocking = true) const = 0;
+ virtual int char_avail() const = 0;
+ virtual int write(char const *s, unsigned long count) const = 0;
+
+ int rx_irq() const { return _rx_irq; }
+ int tx_irq() const { return _tx_irq; }
+ Transfer_mode mode() const { return _mode; }
+ Baud_rate rate() const { return _rate; }
+ };
+};
+
+#endif
+
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_CXX_UART_DUMMY_H__
+#define L4_CXX_UART_DUMMY_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_dummy : public Uart
+ {
+ private:
+ unsigned long _base;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+
+ public:
+ Uart_dummy(int rx_irq, int tx_irq)
+ : Uart(rx_irq, tx_irq), _base(~0UL) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+ };
+};
+
+#endif
--- /dev/null
+/*
+ * (c) 2008-2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_CXX_UART_imx_H__
+#define L4_CXX_UART_imx_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_imx : public Uart
+ {
+ public:
+ enum platform_type { Type_imx21, Type_imx51 };
+ Uart_imx(int rx_irq, int tx_irq, enum platform_type type)
+ : Uart(rx_irq, tx_irq), _base(~0UL), _type(type) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+
+ private:
+ unsigned long _base;
+ enum platform_type _type;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+ };
+
+ class Uart_imx21 : public Uart_imx
+ {
+ public:
+ Uart_imx21(int rx_irq, int tx_irq)
+ : Uart_imx(rx_irq, tx_irq, Type_imx21) {}
+ };
+
+ class Uart_imx51 : public Uart_imx
+ {
+ public:
+ Uart_imx51(int rx_irq, int tx_irq)
+ : Uart_imx(rx_irq, tx_irq, Type_imx51) {}
+ };
+};
+
+#endif
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_CXX_UART_OF_H__
+#define L4_CXX_UART_OF_H__
+
+#include "uart_base.h"
+#include <stdarg.h>
+#include <string.h>
+#include <l4/drivers/of.h>
+
+namespace L4
+{
+ class Uart_of : public Uart, public L4_drivers::Of
+ {
+ private:
+ ihandle_t _serial;
+
+ public:
+ Uart_of()
+ : Uart(0, 0), Of(), _serial(0) {}
+ bool startup(unsigned long base);
+
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+ };
+};
+
+#endif
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_CXX_UART_OMAP35X_H__
+#define L4_CXX_UART_OMAP35X_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_omap35x : public Uart
+ {
+ private:
+ unsigned long _base;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+
+ public:
+ Uart_omap35x(int rx_irq, int tx_irq)
+ : Uart(rx_irq, tx_irq), _base(~0UL) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+ };
+};
+
+#endif
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_CXX_UART_PL011_H__
+#define L4_CXX_UART_PL011_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_pl011 : public Uart
+ {
+ private:
+ unsigned long _base;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+
+ public:
+ Uart_pl011(int rx_irq, int tx_irq)
+ : Uart(rx_irq, tx_irq), _base(~0UL) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+ };
+};
+
+#endif
--- /dev/null
+/*!
+ * \file uart_pxa.h
+ * \brief PXA Uart header file
+ *
+ * \date 2008-01-04
+ * \author Adam Lackorznynski <adam@os.inf.tu-dresden.de>
+ * Alexander Warg <alexander.warg@os.inf.tu-dresden.de>
+ *
+ */
+/*
+ * (c) 2008-2009 Author(s)
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef __L4_CXX_UART_PXA_H__
+#define __L4_CXX_UART_PXA_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_pxa : public Uart
+ {
+ private:
+ unsigned long _base;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+
+ public:
+ Uart_pxa(int rx_irq, int tx_irq)
+ : Uart(rx_irq, tx_irq), _base(~0UL) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+ };
+};
+
+#endif
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef L4_DRIVERS_UART_S3C2410_H__
+#define L4_DRIVERS_UART_S3C2410_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_s3c2410 : public Uart
+ {
+ private:
+ unsigned long _base;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+
+ public:
+ Uart_s3c2410(int rx_irq, int tx_irq)
+ : Uart(rx_irq, tx_irq), _base(~0UL) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+
+ void auto_flow_control(bool on);
+ void fifo_reset();
+ };
+};
+
+#endif
--- /dev/null
+/*!
+ * \file uart_sa1000.h
+ * \brief SA1000 uart header
+ *
+ * \date 2008-01-02
+ * \author Adam Lackorznynski <adam@os.inf.tu-dresden.de>
+ * Alexander Warg <alexander.warg@os.inf.tu-dresden.de>
+ *
+ */
+/*
+ * (c) 2008-2009 Author(s)
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#ifndef __L4_CXX_UART_SA1000_H__
+#define __L4_CXX_UART_SA1000_H__
+
+#include "uart_base.h"
+
+namespace L4
+{
+ class Uart_sa1000 : public Uart
+ {
+ private:
+ unsigned long _base;
+
+ inline unsigned long rd(unsigned long reg) const;
+ inline void wr(unsigned long reg, unsigned long val) const;
+
+ public:
+ Uart_sa1000(int rx_irq, int tx_irq)
+ : Uart(rx_irq, tx_irq), _base(~0UL) {}
+ bool startup(unsigned long base);
+ void shutdown();
+ bool enable_rx_irq(bool enable = true);
+ bool enable_tx_irq(bool enable = true);
+ bool change_mode(Transfer_mode m, Baud_rate r);
+ int get_char(bool blocking = true) const;
+ int char_avail() const;
+ inline void out_char(char c) const;
+ int write(char const *s, unsigned long count) const;
+ };
+};
+
+#endif
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+SRC_CC += uart_dummy.cc uart_pl011.cc uart_sa1000.cc \
+ uart_pxa.cc uart_omap35x.cc uart_imx.cc \
+ uart_s3c2410.cc uart_of.cc
+SYSTEMS = x86 amd64 arm ppc32
+TARGET = libdrivers_uart.a
+PC_FILENAME = drivers_uart
+
+PRIVATE_INCDIR += $(SRC_DIR)/../include
+
+INCLUDE_MAKE_RULES = $(SRC_DIR)/*/Make.rules
+
+include $(L4DIR)/mk/lib.mk
+
+CXXFLAGS += -DL4_NO_RTTI -fno-exceptions -fno-rtti
+
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_dummy.h"
+
+namespace L4
+{
+ bool Uart_dummy::startup(unsigned long /*base*/)
+ { return true; }
+
+ void Uart_dummy::shutdown()
+ {}
+
+ bool Uart_dummy::enable_rx_irq(bool /*enable*/)
+ { return true; }
+ bool Uart_dummy::enable_tx_irq(bool /*enable*/) { return false; }
+ bool Uart_dummy::change_mode(Transfer_mode, Baud_rate)
+ { return true; }
+
+ int Uart_dummy::get_char(bool /*blocking*/) const
+ { return 0; }
+
+ int Uart_dummy::char_avail() const
+ { return false; }
+
+ void Uart_dummy::out_char(char c) const
+ { (void)c; }
+
+ int Uart_dummy::write(char const *s, unsigned long count) const
+ { (void)s; (void)count; return 0; }
+};
--- /dev/null
+/*
+ * (c) 2008-2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_imx.h"
+
+namespace L4
+{
+ enum {
+ URXD = 0x00, // Receiver
+ UTXD = 0x40, // Transmitter
+ UCR1 = 0x80, // Control 1
+ UCR2 = 0x84, // Control 2
+ UCR3 = 0x88, // Control 3
+ UCR4 = 0x8c, // Control 4
+ UFCR = 0x90, // FIFO Control
+ USR1 = 0x94, // Status 1
+ USR2 = 0x98, // Status 2
+ UESC = 0x9c, // Escape Charater
+ UTIM = 0xa0, // Escape Timer
+ UBIR = 0xa4, // BRM Incremental Registers
+ UBMR = 0xa8, // BRM Modulator Registers
+ UBRC = 0xac, // Baud Rate Count
+ ONEMS = 0xb0, // One millisecond
+ UTS = 0xb4, // Test
+
+
+ UCR1_EN = 1 << 0, // Enable UART
+
+ UCR2_SRST = 1 << 0, // Software Reset
+ UCR2_RXEN = 1 << 1, // Receiver Enable
+ UCR2_TXEN = 1 << 2, // Transmitter Enable
+ UCR2_WS = 1 << 5, // 8-bit character length
+ UCR2_STPB = 1 << 6, // 0 = 1 Stop bit, 1 = 2 stop bits
+ UCR2_PROE = 1 << 7, // 0 = even parity, 1 = odd parity
+ UCR2_PREN = 1 << 8, // Parity enable
+ UCR2_RTEC_MASK = 3 << 9, // Request to Send Edge Control mask
+ UCR2_RTEC_RISI = 0 << 9, // Trigger IRQ on rising edge
+ UCR2_RTEC_FALL = 1 << 9, // Trigger IRQ on falling edge
+ UCR2_RTEC_ANY = 2 << 9, // Trigger IRQ on any edge
+ UCR2_ESCEN = 1 << 11, // Escape enable
+ UCR2_CTS = 1 << 12, // Clear to Send: 0 = pin is high (inactive), 1 = pin is low (active)
+ UCR2_CTSC = 1 << 13, // CTS Pin Control: 0 = pin controlled by CTS bit, 1 = pin controlled by the receiver
+ UCR2_IRTS = 1 << 14, // Ignore RTS pin
+ UCR2_ESCI = 1 << 15, // Escape Sequence Interrupt Enable
+
+ UCR3_ACIEN = 1 << 0, // Autobaud Counter Interrupt enable
+ UCR3_INVT = 1 << 1, // Inverted Infrared Transmission
+ UCR3_RXDMUXSEL = 1 << 2, // RXD Muxed Input Selected: 0 = serial ist IPP_UART_RXD, IR is IPP_UART_RXD_IR, 1 = IPP_UART_RXD_MUX for both
+
+
+ UCR4_DREN = 1 << 0, // Receive Data Ready Interrupt Enable
+ UCR4_OREN = 1 << 1, // Receiver Overrun Interrupt enable
+ UCR4_BKEN = 1 << 2, // BREAK Condition Dected Interrupt enable
+ UCR4_TCEN = 1 << 3, // Transmit Complete Interrupt Enable
+ UCR4_LPBYP = 1 << 4, // Low Power Bypass
+ UCR4_IRSC = 1 << 5, // IR Special Case
+ // Bit 6 is reserve, should be written as 0
+ UCR4_WKEN = 1 << 7, // WAKE Interrupt Enable
+ UCR4_ENIRI = 1 << 8, // Serial Infrared Interrupt Enable
+ UCR4_INVR = 1 << 9, // Inverted Infrared Reception
+ UCR4_CTSTL_32 = 32 << 10, // CTS Trigger Level
+
+ UFCR_RXTL_MASK = 63 << 0, // Receiver Trigger Level Mask
+ UFCR_RXTL_1 = 1 << 0, // Receiver Trigger Level: 1 char
+ UFCR_RFDIV_2 = 4 << 7, // Reference Frequency Divier: by 2
+ UFCR_TXTL_MASK = 63 << 10, // Trasmitter Trigger Level: 8 chars
+ UFCR_TXTL_8 = 8 << 10, // Trasmitter Trigger Level: 8 chars
+ UFCR_TXTL_32 = 32 << 10, // Trasmitter Trigger Level: 32 chars
+
+ USR1_TRDY = 1 << 13, // Transmitter Ready
+
+ USR2_RDR = 1 << 0, // Receive Data Ready
+ USR2_ORE = 1 << 1, // Overrun Error
+ USR2_BRCD = 1 << 2, // Break Condition Detected
+ USR2_TXDC = 1 << 3, // Transmitter Complete
+ USR2_TXFE = 1 << 14, // Transmit Buffer FIFO Empty
+
+ };
+
+ unsigned long Uart_imx::rd(unsigned long reg) const
+ { return *(volatile unsigned long *)(_base + reg); }
+ void Uart_imx::wr(unsigned long reg, unsigned long val) const
+ { *(volatile unsigned long *)(_base + reg) = val; }
+
+ bool Uart_imx::startup(unsigned long base)
+ {
+ _base = base;
+
+ // 115200Baud, 8n1
+ switch (_type)
+ {
+ case Type_imx21:
+ wr(UBIR, 0x0344);
+ wr(UBMR, 0x270f);
+ break;
+ case Type_imx51:
+ wr(UBIR, 0xf);
+ wr(UBMR, 0x120);
+ break;
+ }
+
+ wr(UCR1, UCR1_EN);
+ wr(UCR2, UCR2_SRST | UCR2_RXEN | UCR2_TXEN | UCR2_WS | UCR2_IRTS); // note: no IRQs enabled
+ wr(UCR3, UCR3_RXDMUXSEL);
+ wr(UCR4, UCR4_CTSTL_32);
+ wr(UFCR, UFCR_TXTL_8 | UFCR_RFDIV_2 | UFCR_RXTL_1);
+
+ return true;
+ }
+
+ void Uart_imx::shutdown()
+ {
+ wr(UCR1, 0); // Disable UART
+ }
+
+ bool Uart_imx::enable_rx_irq(bool enable)
+ {
+ if (enable)
+ {
+ wr(UCR2, rd(UCR2) | UCR2_RTEC_ANY);
+ wr(UCR4, rd(UCR4) | UCR4_DREN);
+ }
+ else
+ wr(UCR4, rd(UCR4) & ~UCR4_DREN);
+
+ return true;
+ }
+ bool Uart_imx::enable_tx_irq(bool /*enable*/) { return false; }
+ bool Uart_imx::change_mode(Transfer_mode, Baud_rate)
+ { return true; }
+
+ int Uart_imx::get_char(bool blocking) const
+ {
+ while (!char_avail())
+ if (!blocking) return -1;
+
+ return rd(URXD) & 0xff;
+ }
+
+ int Uart_imx::char_avail() const
+ {
+ return rd(USR2) & USR2_RDR;
+ }
+
+ void Uart_imx::out_char(char c) const
+ {
+ while (!(rd(USR1) & USR1_TRDY))
+ ;
+ wr(UTXD, c);
+ }
+
+ int Uart_imx::write(char const *s, unsigned long count) const
+ {
+ unsigned long c = count;
+ while (c)
+ {
+ if (*s == 10)
+ out_char(13);
+ out_char(*s++);
+ --c;
+ }
+ while (!(rd(USR2) & USR2_TXDC))
+ ;
+
+ return count;
+ }
+};
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_of.h"
+#include <stdio.h>
+
+namespace L4 {
+
+ bool Uart_of::startup(unsigned long /*base*/)
+ {
+ char path[64], type[16];
+ for(phandle_t node = 0; prom_next_node(&node); ) {
+ prom_getprop(node, "device_type", type, sizeof(type));
+
+ if(strcmp(type, "serial"))
+ continue;
+
+ if(prom_call("package-to-path", 3, 1, node, path, sizeof(path)) == Of::PROM_ERROR)
+ return false;
+
+ /* open port */
+ if((_serial = (ihandle_t)prom_call("open", 1, 1, path)) <= 0)
+ return false;
+
+ break;
+ }
+ //prom_call("exit", 0, 0);
+ return (!_serial)?false:true;
+ }
+
+ void Uart_of::shutdown()
+ {
+ prom_call("close", 1, 0, _serial);
+ }
+
+ int Uart_of::get_char(bool blocking) const
+ {
+ int c, len = 0;
+
+ while(len != 1 && blocking)
+ len = prom_call("read", 3, 1, _serial, &c, 1);
+
+ return (len)?c:-1;
+ }
+
+ int Uart_of::write(char const *s, unsigned long count) const
+ {
+ return prom_call("write", 3, 1, _serial, s, count);
+ }
+
+ void Uart_of::out_char(char c) const
+ {
+ prom_call("write", 3, 0, _serial, c, 1);
+ }
+
+ /* UNIMPLEMENTED */
+ bool Uart_of::enable_rx_irq(bool){return true;}
+ bool Uart_of::enable_tx_irq(bool){return true;}
+ bool Uart_of::change_mode(Transfer_mode, Baud_rate){return true;}
+ int Uart_of::char_avail() const {return 1;}
+};
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_omap35x.h"
+
+namespace L4
+{
+ enum {
+ DLL_REG = 0x00,
+ RHR_REG = 0x00,
+ THR_REG = 0x00,
+ IER_REG = 0x04,
+ DLH_REG = 0x04,
+ LCD_REG = 0x08,
+ LSR_REG = 0x14,
+ SSR_REG = 0x44,
+ SYSC_REG = 0x54,
+ SYSS_REG = 0x58,
+
+ LCD_REG_CHAR_LENGTH_5BIT = 0 << 0,
+ LCD_REG_CHAR_LENGTH_6BIT = 1 << 0,
+ LCD_REG_CHAR_LENGTH_7BIT = 2 << 0,
+ LCD_REG_CHAR_LENGTH_8BIT = 3 << 0,
+ LCD_REG_CHAR_NB_STOP_2 = 1 << 2,
+ LCD_REG_CHAR_PARITY_EN = 1 << 3,
+ LCD_REG_CHAR_PARITY_TYPE1_EVEN = 1 << 4,
+
+ LSR_REG_RX_FIFO_E_AVAIL = 1 << 0,
+ LSR_REG_TX_FIFO_E_EMPTY = 1 << 5,
+
+ SSR_REG_TX_FIFO_FULL = 1 << 0,
+
+ SYSC_REG_SOFTRESET = 1 << 1,
+
+ SYSC_REG_RESETDONE = 1 << 0,
+ };
+
+
+ unsigned long Uart_omap35x::rd(unsigned long reg) const
+ {
+ volatile unsigned long *r = (unsigned long*)(_base + reg);
+ return *r;
+ }
+
+ void Uart_omap35x::wr(unsigned long reg, unsigned long val) const
+ {
+ volatile unsigned long *r = (unsigned long*)(_base + reg);
+ *r = val;
+ }
+
+ bool Uart_omap35x::startup(unsigned long base)
+ {
+ _base = base;
+
+ // Reset UART
+ //wr(SYSC_REG, rd(SYSC_REG) | SYSC_REG_SOFTRESET);
+ //while (!(rd(SYSS_REG) & SYSC_REG_RESETDONE))
+ // ;
+
+ return true;
+ }
+
+ void Uart_omap35x::shutdown()
+ {
+ }
+
+ bool Uart_omap35x::enable_rx_irq(bool enable)
+ {
+ wr(IER_REG, enable ? 1 : 0);
+ return true;
+ }
+ bool Uart_omap35x::enable_tx_irq(bool /*enable*/) { return false; }
+ bool Uart_omap35x::change_mode(Transfer_mode, Baud_rate r)
+ {
+ if (r != 115200)
+ return false;
+
+ return true;
+ }
+
+ int Uart_omap35x::get_char(bool blocking) const
+ {
+ while (!char_avail())
+ if (!blocking)
+ return -1;
+
+ return rd(RHR_REG);
+ }
+
+ int Uart_omap35x::char_avail() const
+ {
+ return rd(LSR_REG) & LSR_REG_RX_FIFO_E_AVAIL;
+ }
+
+ void Uart_omap35x::out_char(char c) const
+ {
+ wr(THR_REG, c);
+ while (!(rd(LSR_REG) & LSR_REG_TX_FIFO_E_EMPTY))
+ ;
+ }
+
+ int Uart_omap35x::write(char const *s, unsigned long count) const
+ {
+ unsigned long c = count;
+ while (c)
+ {
+ if (*s == 10)
+ out_char(13);
+ out_char(*s++);
+ --c;
+ }
+ // while (rd(UART01x_FR) & UART01x_FR_BUSY)
+ // ;
+
+ return count;
+ }
+
+};
+
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_pl011.h"
+
+namespace L4
+{
+ enum {
+ UART011_RXIM = 1 << 4,
+ UART011_TXIM = 1 << 5,
+ UART011_RTIM = 1 << 6,
+ UART011_FEIM = 1 << 7,
+ UART011_PEIM = 1 << 8,
+ UART011_BEIM = 1 << 9,
+ UART011_OEIM = 1 << 10,
+
+ UART011_RXIS = 1 << 4,
+ UART011_RTIS = 1 << 6,
+
+ UART011_RXIC = 1 << 4,
+ UART011_RTIC = 1 << 6,
+
+ UART01x_CR_UARTEN = 1, // UART enable
+ UART011_CR_LBE = 0x080, // loopback enable
+ UART011_CR_TXE = 0x100, // transmit enable
+ UART011_CR_RXE = 0x200, // receive enable
+
+ UART01x_FR_BUSY = 0x008,
+ UART01x_FR_RXFE = 0x010,
+ UART01x_FR_TXFF = 0x020,
+
+ UART01x_LCRH_PEN = 0x02, // parity enable
+ UART01x_LCRH_FEN = 0x10, // FIFO enable
+ UART01x_LCRH_WLEN_8 = 0x60,
+
+ UART01x_DR = 0x00,
+ UART011_ECR = 0x04,
+ UART01x_FR = 0x18,
+ UART011_IBRD = 0x24,
+ UART011_FBRD = 0x28,
+ UART011_LCRH = 0x2c,
+ UART011_CR = 0x30,
+ UART011_IMSC = 0x38,
+ UART011_MIS = 0x40,
+ UART011_ICR = 0x44,
+ };
+
+
+ unsigned long Uart_pl011::rd(unsigned long reg) const
+ {
+ volatile unsigned long *r = (unsigned long*)(_base + reg);
+ return *r;
+ }
+
+ void Uart_pl011::wr(unsigned long reg, unsigned long val) const
+ {
+ volatile unsigned long *r = (unsigned long*)(_base + reg);
+ *r = val;
+ }
+
+ bool Uart_pl011::startup(unsigned long base)
+ {
+ _base = base;
+ wr(UART011_CR, UART01x_CR_UARTEN | UART011_CR_TXE | UART011_CR_RXE);
+ wr(UART011_FBRD, 2);
+ wr(UART011_IBRD, 13);
+ wr(UART011_LCRH, 0x60);
+ wr(UART011_IMSC, 0);
+ while (rd(UART01x_FR) & UART01x_FR_BUSY)
+ ;
+ return true;
+ }
+
+ void Uart_pl011::shutdown()
+ {
+ wr(UART011_IMSC,0);
+ wr(UART011_ICR, 0xffff);
+ wr(UART011_CR, 0);
+ }
+
+ bool Uart_pl011::enable_rx_irq(bool enable)
+ {
+ unsigned long mask = UART011_RXIM | UART011_RTIM;
+
+ wr(UART011_ICR, 0xffff);
+ wr(UART011_ECR, 0xff);
+ if (enable)
+ wr(UART011_IMSC, rd(UART011_IMSC) | mask);
+ else
+ wr(UART011_IMSC, rd(UART011_IMSC) & ~mask);
+ return true;
+ }
+ bool Uart_pl011::enable_tx_irq(bool /*enable*/) { return false; }
+ bool Uart_pl011::change_mode(Transfer_mode, Baud_rate r)
+ {
+ if (r != 115200)
+ return false;
+
+ unsigned long old_cr = rd(UART011_CR);
+ wr(UART011_CR, 0);
+
+ wr(UART011_FBRD, 2);
+ wr(UART011_IBRD, 13);
+ wr(UART011_LCRH, UART01x_LCRH_WLEN_8 | UART01x_LCRH_FEN);
+
+ wr(UART011_CR, old_cr);
+
+ return true;
+ }
+
+ int Uart_pl011::get_char(bool blocking) const
+ {
+ while (!char_avail())
+ if (!blocking) return -1;
+
+ //wr(UART011_ICR, UART011_RXIC | UART011_RTIC);
+
+ int c = rd(UART01x_DR);
+ wr(UART011_ECR, 0xff);
+ return c;
+ }
+
+ int Uart_pl011::char_avail() const
+ {
+ return !(rd(UART01x_FR) & UART01x_FR_RXFE);
+ }
+
+ void Uart_pl011::out_char(char c) const
+ {
+ while (rd(UART01x_FR) & UART01x_FR_TXFF)
+ ;
+ wr(UART01x_DR,c);
+ }
+
+ int Uart_pl011::write(char const *s, unsigned long count) const
+ {
+ unsigned long c = count;
+ while (c)
+ {
+ if (*s == 10)
+ out_char(13);
+ out_char(*s++);
+ --c;
+ }
+ while (rd(UART01x_FR) & UART01x_FR_BUSY)
+ ;
+
+ return count;
+ }
+
+};
+
--- /dev/null
+/*!
+ * \file uart_pxa.cc
+ * \brief PXA UART implementation
+ *
+ * \date 2008-01-04
+ * \author Adam Lackorznynski <adam@os.inf.tu-dresden.de>
+ * Alexander Warg <alexander.warg@os.inf.tu-dresden.de>
+ *
+ */
+/*
+ * (c) 2008-2009 Author(s)
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_pxa.h"
+
+namespace L4
+{
+ enum Registers {
+ TRB = 0x00, // Transmit/Receive Buffer (read/write)
+ BRD_LOW = 0x00, // Baud Rate Divisor LSB if bit 7 of LCR is set (read/write)
+ IER = 0x04, // Interrupt Enable Register (read/write)
+ BRD_HIGH = 0x04, // Baud Rate Divisor MSB if bit 7 of LCR is set (read/write)
+ IIR = 0x08, // Interrupt Identification Register (read only)
+ FCR = 0x08, // 16550 FIFO Control Register (write only)
+ LCR = 0x0c, // Line Control Register (read/write)
+ MCR = 0x10, // Modem Control Register (read/write)
+ LSR = 0x14, // Line Status Register (read only)
+ MSR = 0x18, // Modem Status Register (read only)
+ SPR = 0x1c, // Scratch Pad Register (read/write)
+ };
+
+ enum {
+ Base_rate = 921600,
+ Base_ier_bits = 1 << 6,
+ };
+
+ enum {
+ PAR_NONE = 0x00,
+ PAR_EVEN = 0x18,
+ PAR_ODD = 0x08,
+ DAT_5 = 0x00,
+ DAT_6 = 0x01,
+ DAT_7 = 0x02,
+ DAT_8 = 0x03,
+ STOP_1 = 0x00,
+ STOP_2 = 0x04,
+
+ MODE_8N1 = PAR_NONE | DAT_8 | STOP_1,
+ MODE_7E1 = PAR_EVEN | DAT_7 | STOP_1,
+
+ // these two values are to leave either mode
+ // or baud rate unchanged on a call to change_mode
+ MODE_NC = 0x1000000,
+ BAUD_NC = 0x1000000,
+ };
+
+ unsigned long Uart_pxa::rd(unsigned long reg) const
+ { return *(volatile unsigned long*)(_base + reg); }
+
+ void Uart_pxa::wr(unsigned long reg, unsigned long val) const
+ { *(volatile unsigned long*)(_base + reg) = val; }
+
+ bool Uart_pxa::startup(unsigned long base)
+ {
+ _base = base;
+
+ char scratch, scratch2, scratch3;
+
+ scratch = rd(IER);
+ wr(IER, 0);
+
+ scratch2 = rd(IER);
+ wr(IER, 0xf);
+
+ scratch3 = rd(IER);
+ wr(IER, scratch);
+
+ if (!(scratch2 == 0x00 && scratch3 == 0x0f))
+ return false; // this is not the uart
+
+ //proc_status o = proc_cli_save();
+ wr(IER, Base_ier_bits);/* disable all rs-232 interrupts */
+ wr(MCR, 0x0b); /* out2, rts, and dtr enabled */
+ wr(FCR, 1); /* enable fifo */
+ wr(FCR, 0x07); /* clear rcv xmit fifo */
+ wr(FCR, 1); /* enable fifo */
+ wr(LCR, 0); /* clear line control register */
+
+ /* clearall interrupts */
+ /*read*/ rd(MSR); /* IRQID 0*/
+ /*read*/ rd(IIR); /* IRQID 1*/
+ /*read*/ rd(TRB); /* IRQID 2*/
+ /*read*/ rd(LSR); /* IRQID 3*/
+
+ while (rd(LSR) & 1/*DATA READY*/)
+ /*read*/ rd(TRB);
+ //proc_sti_restore(o);
+
+ return true;
+ }
+
+ void Uart_pxa::shutdown()
+ {
+ //proc_status o = proc_cli_save();
+ wr(MCR, 6);
+ wr(FCR, 0);
+ wr(LCR, 0);
+ wr(IER, 0);
+ //proc_sti_restore(o);
+ }
+
+ bool Uart_pxa::enable_rx_irq(bool /*enable*/) { return true; }
+ bool Uart_pxa::enable_tx_irq(bool /*enable*/) { return false; }
+ bool Uart_pxa::change_mode(Transfer_mode m, Baud_rate r)
+ {
+ //proc_status o = proc_cli_save();
+ unsigned long old_lcr = rd(LCR);
+ if(r != BAUD_NC) {
+ unsigned short divisor = Base_rate / r;
+ wr(LCR, old_lcr | 0x80/*DLAB*/);
+ wr(TRB, divisor & 0x0ff ); /* BRD_LOW */
+ wr(IER, (divisor >> 8) & 0x0ff ); /* BRD_HIGH */
+ wr(LCR, old_lcr);
+ }
+ if (m != MODE_NC)
+ wr(LCR, m & 0x07f);
+
+ //proc_sti_restore(o);
+ return true;
+ }
+
+ int Uart_pxa::get_char(bool blocking) const
+ {
+ char old_ier, ch;
+
+ if (!blocking && !char_avail())
+ return -1;
+
+ old_ier = rd(IER);
+ wr(IER, old_ier & ~0xf);
+ while (!char_avail())
+ ;
+ ch = rd(TRB);
+ wr(IER, old_ier);
+ return ch;
+ }
+
+ int Uart_pxa::char_avail() const
+ {
+ return rd(LSR) & 1; // DATA READY
+ }
+
+ void Uart_pxa::out_char(char c) const
+ {
+ // hmm
+ write(&c, 1);
+ }
+
+ int Uart_pxa::write(char const *s, unsigned long count) const
+ {
+ /* disable uart irqs */
+ char old_ier;
+ unsigned i;
+ old_ier = rd(IER);
+ wr(IER, old_ier & ~0x0f);
+
+ /* transmission */
+ for (i = 0; i < count; i++) {
+ while (!(rd(LSR) & 0x20 /* THRE */))
+ ;
+ if (s[i] == '\346')
+ wr(TRB, '\265');
+ else
+ wr(TRB, s[i]);
+ if (s[i]=='\n') {
+ while (!(rd(LSR) & 0x20 /* THRE */))
+ ;
+ wr(TRB, '\r');
+ }
+ }
+
+ /* wait till everything is transmitted */
+ while (!(rd(LSR) & 0x40 /* TSRE */))
+ ;
+
+ wr(IER, old_ier);
+ return 1;
+ }
+
+};
+
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include "uart_s3c2410.h"
+
+namespace L4
+{
+ enum {
+ ULCON = 0x0, // line control register
+ UCON = 0x4, // control register
+ UFCON = 0x8, // FIFO control register
+ UMCON = 0xc, // modem control register
+ UTRSTAT = 0x10, // Tx/Rx status register
+ UERSTAT = 0x14, // Rx error status register
+ UFSTAT = 0x18, // FIFO status register
+ UMSTAT = 0x1c, // modem status register
+ UTXH = 0x20, // transmit buffer register (little endian, 0x23 for BE)
+ URXH = 0x24, // receive buffer register (little endian, 0x27 for BE)
+ UBRDIV = 0x28, // baud rate divisor register
+
+ ULCON_8N1_MODE = 0x3,
+
+ UCON_MODE = 0x245,
+
+ UFSTAT_Rx_COUNT_MASK = 0x00f,
+ UFSTAT_Tx_COUNT_MASK = 0x0f0,
+ UFSTAT_RxFULL = 0x100,
+ UFSTAT_TxFULL = 0x200,
+
+ UMCON_AFC = 1 << 4,
+
+ UTRSTAT_Rx_RDY = 1 << 0,
+ UTRSTAT_Tx_RDY = 1 << 1,
+ };
+
+
+ unsigned long Uart_s3c2410::rd(unsigned long reg) const
+ {
+ return *(volatile unsigned long*)(_base + reg);
+ }
+
+ void Uart_s3c2410::wr(unsigned long reg, unsigned long val) const
+ {
+ *(volatile unsigned long *)(_base + reg) = val;
+ }
+
+ void Uart_s3c2410::fifo_reset()
+ {
+ wr(UFCON, 7); // enable + fifo reset
+ }
+
+ bool Uart_s3c2410::startup(unsigned long base)
+ {
+ _base = base;
+
+ fifo_reset();
+ wr(UMCON, 0);
+
+ wr(ULCON, ULCON_8N1_MODE);
+ wr(UCON, UCON_MODE);
+
+ wr(UBRDIV, 0x23);
+ for (int i=0; i < 1000; ++i)
+ ;
+
+ return true;
+ }
+
+ void Uart_s3c2410::shutdown()
+ {
+ // more
+ }
+
+ bool Uart_s3c2410::enable_rx_irq(bool /*enable*/)
+ {
+ return true;
+ }
+
+ bool Uart_s3c2410::enable_tx_irq(bool /*enable*/) { return false; }
+
+ bool Uart_s3c2410::change_mode(Transfer_mode, Baud_rate r)
+ {
+ if (r != 115200)
+ return false;
+
+ wr(ULCON, ULCON_8N1_MODE);
+ wr(UCON, UCON_MODE);
+ wr(UFCON, 1);
+
+ wr(UBRDIV, 0x23);
+
+ return true;
+ }
+
+ int Uart_s3c2410::get_char(bool blocking) const
+ {
+ while (!char_avail())
+ if (!blocking)
+ return -1;
+
+ int uer = rd(UERSTAT);
+ int d = rd(URXH);
+
+ if (uer & 1)
+ d = '@';
+ else if (uer & 4)
+ d = '$';
+
+ return d;
+ }
+
+ int Uart_s3c2410::char_avail() const
+ {
+ //return rd(UTRSTAT) & UTRSTAT_Rx_RDY;
+ //return rd(UFSTAT) & UFSTAT_Rx_COUNT_MASK;
+ return rd(UFSTAT) & (UFSTAT_Rx_COUNT_MASK | UFSTAT_RxFULL);
+ }
+
+ void Uart_s3c2410::out_char(char c) const
+ {
+ //while (!(rd(UTRSTAT) & UTRSTAT_Tx_RDY))
+ while (rd(UFSTAT) & UFSTAT_TxFULL)
+ ;
+ //while (!(rd(UMSTAT) & 0x1))
+ // ;
+ wr(UTXH, c);
+ }
+
+ int Uart_s3c2410::write(char const *s, unsigned long count) const
+ {
+ unsigned long c = count;
+ while (c)
+ {
+ if (*s == 10)
+ out_char(13);
+ out_char(*s++);
+ --c;
+ }
+ while (!(rd(UTRSTAT) & UTRSTAT_Tx_RDY))
+ //while (rd(UFSTAT) & UFSTAT_Tx_COUNT_MASK)
+ ;
+
+ return count;
+ }
+
+ void Uart_s3c2410::auto_flow_control(bool on)
+ {
+ wr(UMCON, (rd(UMCON) & ~UMCON_AFC) | (on ? UMCON_AFC : 0));
+ }
+
+};
+
--- /dev/null
+/*!
+ * \file uart_sa1000.cc
+ * \brief SA1000 Uart
+ *
+ * \date 2008-01-02
+ * \author Adam Lackorznynski <adam@os.inf.tu-dresden.de>
+ * Alexander Warg <alexander.warg@os.inf.tu-dresden.de>
+ *
+ */
+/*
+ * (c) 2008-2009 Author(s)
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+
+#include "uart_sa1000.h"
+
+namespace L4
+{
+ enum {
+ PAR_NONE = 0x00,
+ PAR_EVEN = 0x03,
+ PAR_ODD = 0x01,
+ DAT_5 = (unsigned)-1,
+ DAT_6 = (unsigned)-1,
+ DAT_7 = 0x00,
+ DAT_8 = 0x08,
+ STOP_1 = 0x00,
+ STOP_2 = 0x04,
+
+ MODE_8N1 = PAR_NONE | DAT_8 | STOP_1,
+ MODE_7E1 = PAR_EVEN | DAT_7 | STOP_1,
+
+ // these two values are to leave either mode
+ // or baud rate unchanged on a call to change_mode
+ MODE_NC = 0x1000000,
+ BAUD_NC = 0x1000000,
+ };
+
+ enum {
+ UTCR0 = 0x00,
+ UTCR1 = 0x04,
+ UTCR2 = 0x08,
+ UTCR3 = 0x0c,
+ UTCR4 = 0x10,
+ UTDR = 0x14,
+ UTSR0 = 0x1c,
+ UTSR1 = 0x20,
+
+
+ UTCR0_PE = 0x01,
+ UTCR0_OES = 0x02,
+ UTCR0_SBS = 0x04,
+ UTCR0_DSS = 0x08,
+ UTCR0_SCE = 0x10,
+ UTCR0_RCE = 0x20,
+ UTCR0_TCE = 0x40,
+
+ UTCR3_RXE = 0x01,
+ UTCR3_TXE = 0x02,
+ UTCR3_BRK = 0x04,
+ UTCR3_RIE = 0x08,
+ UTCR3_TIE = 0x10,
+ UTCR3_LBM = 0x20,
+
+
+ UTSR0_TFS = 0x01,
+ UTSR0_RFS = 0x02,
+ UTSR0_RID = 0x04,
+ UTSR0_RBB = 0x08,
+ UTSR0_REB = 0x10,
+ UTSR0_EIF = 0x20,
+
+ UTSR1_TBY = 0x01,
+ UTSR1_RNE = 0x02,
+ UTSR1_TNF = 0x04,
+ UTSR1_PRE = 0x08,
+ UTSR1_FRE = 0x10,
+ UTSR1_ROR = 0x20,
+
+ UARTCLK = 3686400,
+ };
+
+ unsigned long Uart_sa1000::rd(unsigned long reg) const
+ {
+ volatile unsigned long *r = (unsigned long*)(_base + reg);
+ return *r;
+ }
+
+ void Uart_sa1000::wr(unsigned long reg, unsigned long val) const
+ {
+ volatile unsigned long *r = (unsigned long*)(_base + reg);
+ *r = val;
+ }
+
+ bool Uart_sa1000::startup(unsigned long base)
+ {
+ _base = base;
+ wr(UTSR0, ~0UL); // clear pending status bits
+ wr(UTCR3, UTCR3_RXE | UTCR3_TXE); //enable transmitter and receiver
+ return true;
+ }
+
+ void Uart_sa1000::shutdown()
+ {
+ wr(UTCR3, 0);
+ }
+
+ bool Uart_sa1000::enable_rx_irq(bool /*enable*/)
+ {
+ return true;
+ }
+ bool Uart_sa1000::enable_tx_irq(bool /*enable*/) { return false; }
+ bool Uart_sa1000::change_mode(Transfer_mode m, Baud_rate baud)
+ {
+ unsigned old_utcr3, quot;
+ //proc_status st;
+
+ if (baud == (Baud_rate)-1)
+ return false;
+ if (baud != BAUD_NC && (baud>115200 || baud<96))
+ return false;
+ if (m == (Transfer_mode)-1)
+ return false;
+
+ //st = proc_cli_save();
+ old_utcr3 = rd(UTCR3);
+ wr(UTCR3, (old_utcr3 & ~(UTCR3_RIE|UTCR3_TIE)));
+ //proc_sti_restore(st);
+
+ while (rd(UTSR1) & UTSR1_TBY)
+ ;
+
+ /* disable all */
+ wr(UTCR3, 0);
+
+ /* set parity, data size, and stop bits */
+ if(m != MODE_NC)
+ wr(UTCR0, m & 0x0ff);
+
+ /* set baud rate */
+ if(baud!=BAUD_NC)
+ {
+ quot = (UARTCLK / (16*baud)) -1;
+ wr(UTCR1, (quot & 0xf00) >> 8);
+ wr(UTCR2, quot & 0x0ff);
+ }
+
+ wr(UTSR0, (unsigned)-1);
+ wr(UTCR3, old_utcr3);
+ return true;
+
+ }
+
+ int Uart_sa1000::get_char(bool blocking) const
+ {
+ int ch;
+ unsigned long old_utcr3 = rd(UTCR3);
+ wr(UTCR3, old_utcr3 & ~(UTCR3_RIE|UTCR3_TIE));
+
+ while (!(rd(UTSR1) & UTSR1_RNE))
+ if(!blocking)
+ return -1;
+
+ ch = rd(UTDR);
+ wr(UTCR3, old_utcr3);
+ return ch;
+
+ }
+
+ int Uart_sa1000::char_avail() const
+ {
+ return !!(rd(UTSR1) & UTSR1_RNE);
+ }
+
+ void Uart_sa1000::out_char(char c) const
+ {
+ // do UTCR3 thing here as well?
+ while(!(rd(UTSR1) & UTSR1_TNF))
+ ;
+ wr(UTDR, c);
+ }
+
+ int Uart_sa1000::write(char const *s, unsigned long count) const
+ {
+ unsigned old_utcr3;
+ //proc_status st;
+ unsigned i;
+
+ //st = proc_cli_save();
+ old_utcr3 = rd(UTCR3);
+ wr(UTCR3, (old_utcr3 & ~(UTCR3_RIE|UTCR3_TIE)) | UTCR3_TXE );
+
+ /* transmission */
+ for(i = 0; i < count; i++)
+ {
+ out_char(s[i]);
+ if (s[i] == '\n')
+ out_char('\r');
+ }
+
+ /* wait till everything is transmitted */
+ while (rd(UTSR1) & UTSR1_TBY)
+ ;
+
+ wr(UTCR3, old_utcr3);
+ //proc_sti_restore(st);
+ return count;
+ }
+};
--- /dev/null
+provides: libdrivers-lcd libdrivers-input
+requires: libc_r l4re_c libio input
+Maintainer: adam@os.inf.tu-dresden.de
--- /dev/null
+PKGDIR = .
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET = generic lcd input
+
+include $(L4DIR)/mk/subdir.mk
+
+lcd: generic
+input: generic
--- /dev/null
+PKGDIR ?= ..
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET := include src
+
+include $(L4DIR)/mk/subdir.mk
+
+src: include
--- /dev/null
+PKGDIR = ../..
+L4DIR ?= $(PKGDIR)/../..
+
+include $(L4DIR)/mk/include.mk
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU Lesser General Public License 2.1.
+ * Please see the COPYING-LGPL-2.1 file for details.
+ */
+#ifndef __ARM_DRIVERS__GENERIC__INCLUDE__AMBA_H__
+#define __ARM_DRIVERS__GENERIC__INCLUDE__AMBA_H__
+
+#include <sys/cdefs.h>
+#include <l4/sys/types.h>
+#include <stdint.h>
+
+EXTERN_C_BEGIN
+
+void amba_read_id(l4_addr_t address, uint32_t *periphid, uint32_t *cellid);
+
+EXTERN_C_END
+
+#endif /* ! __ARM_DRIVERS__LCD__INCLUDE__LCD_H__ */
--- /dev/null
+/*
+ * (c) 2009 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU Lesser General Public License 2.1.
+ * Please see the COPYING-LGPL-2.1 file for details.
+ */
+#ifndef __ARM_DRIVERS__GENERIC__INCLUDE__IO_H__
+#define __ARM_DRIVERS__GENERIC__INCLUDE__IO_H__
+
+#include <sys/cdefs.h>
+#include <l4/sys/types.h>
+
+EXTERN_C_BEGIN
+
+L4_INLINE
+l4_umword_t io_read_mword(l4_addr_t addr);
+
+L4_INLINE
+void io_write_mword(l4_addr_t addr, l4_addr_t val);
+
+
+
+L4_INLINE
+l4_umword_t io_read_mword(l4_addr_t addr)
+{
+ return *(volatile l4_umword_t *)addr;
+}
+
+
+L4_INLINE
+void io_write_mword(l4_addr_t addr, l4_umword_t val)
+{
+ *(volatile l4_umword_t *)addr = val;
+}
+
+EXTERN_C_END
+
+#endif /* ! __ARM_DRIVERS__LCD__INCLUDE__LCD_H__ */
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+SRC_C := amba.c
+TARGET = libarm_generic.a
+PC_FILENAME := libdrivers-generic
+
+include $(L4DIR)/mk/lib.mk
--- /dev/null
+
+#include <l4/drivers/io.h>
+#include <l4/drivers/amba.h>
+
+
+void amba_read_id(l4_addr_t address, uint32_t *periphid, uint32_t *cellid)
+{
+ *periphid = ((io_read_mword((l4_addr_t)address + 0) & 0xff) << 0)
+ | ((io_read_mword((l4_addr_t)address + 4) & 0xff) << 8)
+ | ((io_read_mword((l4_addr_t)address + 8) & 0xff) << 16)
+ | ((io_read_mword((l4_addr_t)address + 12) & 0xff) << 24);
+
+ *cellid = ((io_read_mword((l4_addr_t)address + 16) & 0xff) << 0)
+ | ((io_read_mword((l4_addr_t)address + 20) & 0xff) << 8)
+ | ((io_read_mword((l4_addr_t)address + 24) & 0xff) << 16)
+ | ((io_read_mword((l4_addr_t)address + 28) & 0xff) << 24);
+}
--- /dev/null
+PKGDIR ?= ..
+L4DIR ?= $(PKGDIR)/../..
+
+include $(L4DIR)/mk/subdir.mk
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+SRC_C := tsc-omap3.c kp-omap3.c
+
+TARGET = libarm_input.o.a
+PC_FILENAME := libdrivers-input
+REQUIRES_LIBS = l4re_c-util libio
+
+include $(L4DIR)/mk/lib.mk
--- /dev/null
+#pragma once
+
+/* Module ids */
+#define TWL4030_MODULE_USB 0x00
+#define TWL4030_MODULE_AUDIO_VOICE 0x01
+#define TWL4030_MODULE_GPIO 0x02
+#define TWL4030_MODULE_INTBR 0x03
+#define TWL4030_MODULE_PIH 0x04
+#define TWL4030_MODULE_TEST 0x05
+#define TWL4030_MODULE_KEYPAD 0x06
+#define TWL4030_MODULE_MADC 0x07
+#define TWL4030_MODULE_INTERRUPTS 0x08
+#define TWL4030_MODULE_LED 0x09
+#define TWL4030_MODULE_MAIN_CHARGE 0x0A
+#define TWL4030_MODULE_PRECHARGE 0x0B
+#define TWL4030_MODULE_PWM0 0x0C
+#define TWL4030_MODULE_PWM1 0x0D
+#define TWL4030_MODULE_PWMA 0x0E
+#define TWL4030_MODULE_PWMB 0x0F
+#define TWL4030_MODULE_BACKUP 0x10
+#define TWL4030_MODULE_INT 0x11
+#define TWL4030_MODULE_PM_MASTER 0x12
+#define TWL4030_MODULE_PM_RECEIVER 0x13
+#define TWL4030_MODULE_RTC 0x14
+#define TWL4030_MODULE_SECURED_REG 0x15
+#define TWL4030_MODULES TWL4030_MODULE_SECURED_REG
+
+/* Module address bases */
+/* USB ID */
+#define TWL4030_BASE_USB 0x00
+/* AUD ID */
+#define TWL4030_BASE_AUDIO_VOICE 0x00
+#define TWL4030_BASE_GPIO 0x98
+#define TWL4030_BASE_INTBR 0x85
+#define TWL4030_BASE_PIH 0x80
+#define TWL4030_BASE_TEST 0x4C
+/* AUX ID */
+#define TWL4030_BASE_INTERRUPTS 0xB9
+#define TWL4030_BASE_LED 0xEE
+#define TWL4030_BASE_MADC 0x00
+#define TWL4030_BASE_MAIN_CHARGE 0x74
+#define TWL4030_BASE_PRECHARGE 0xAA
+#define TWL4030_BASE_PWM0 0xF8
+#define TWL4030_BASE_PWM1 0xFB
+#define TWL4030_BASE_PWMA 0xEF
+#define TWL4030_BASE_PWMB 0xF1
+#define TWL4030_BASE_KEYPAD 0xD2
+/* POWER ID */
+#define TWL4030_BASE_BACKUP 0x14
+#define TWL4030_BASE_INT 0x2E
+#define TWL4030_BASE_PM_MASTER 0x36
+#define TWL4030_BASE_PM_RECIEVER 0x5B
+#define TWL4030_BASE_RTC 0x1C
+#define TWL4030_BASE_SECURED_REG 0x00
+
+/* Primary Interrupt Handler registers */
+#define REG_PIH_ISR_P1 0x01
+#define REG_PIH_ISR_P2 0x02
+#define REG_PIH_SIR 0x03
+
+/* Keypad module registers */
+#define REG_KEYP_CTRL_REG 0x00
+#define REG_KEY_DEB_REG 0x01
+#define REG_LONG_KEY_REG1 0x02
+#define REG_LK_PTV_REG 0x03
+#define REG_TIME_OUT_REG1 0x04
+#define REG_TIME_OUT_REG2 0x05
+#define REG_KBC_REG 0x06
+#define REG_KBR_REG 0x07
+#define REG_KEYP_SMS 0x08
+#define REG_FULL_CODE_7_0 0x09
+#define REG_FULL_CODE_7_0 0x09
+#define REG_FULL_CODE_15_8 0x0A
+#define REG_FULL_CODE_23_16 0x0B
+#define REG_FULL_CODE_31_24 0x0C
+#define REG_FULL_CODE_39_32 0x0D
+#define REG_FULL_CODE_47_40 0x0E
+#define REG_FULL_CODE_55_48 0x0F
+#define REG_FULL_CODE_63_56 0x10
+#define REG_KEYP_ISR1 0x11
+#define REG_KEYP_IMR1 0x12
+#define REG_KEYP_ISR2 0x13
+#define REG_KEYP_IMR2 0x14
+#define REG_KEYP_SIR 0x15
+#define REG_KEYP_EDR 0x16
+#define REG_KEYP_SIH_CTRL 0x17
+
+#if 0
+/* Keypad registers */
+#define KEYP_CTRL_REG 0xD2
+#define KEY_DEB_REG 0xD3
+#define LONG_KEY_REG1 0xD4
+#define LK_PTV_REG 0xD5
+#define TIME_OUT_REG1 0xD6
+#define TIME_OUT_REG2 0xD7
+#define KBC_REG 0xD8
+#define KBR_REG 0xD9
+#define KEYP_SMS 0xDA
+#define FULL_CODE_7_0 0xDB
+#define FULL_CODE_15_8 0xDC
+#define FULL_CODE_23_16 0xDD
+#define FULL_CODE_31_24 0xDE
+#define FULL_CODE_39_32 0xDF
+#define FULL_CODE_47_40 0xE0
+#define FULL_CODE_55_48 0xE1
+#define FULL_CODE_63_56 0xE2
+#define KEYP_ISR1 0xE3
+#define KEYP_IMR1 0xE4
+#define KEYP_ISR2 0xE5
+#define KEYP_IMR2 0xE6
+#define KEYP_SIR 0xE7
+#define KEYP_EDR 0xE8
+#define KEYP_SIH_CTRL 0xE9
+#endif
--- /dev/null
+/*
+ * OMAP keypad driver
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <pthread.h>
+#include <pthread-l4.h>
+
+#include <l4/input/drv_reg.h>
+#include <l4/io/io.h>
+#include <l4/re/c/namespace.h>
+#include <l4/re/c/util/cap_alloc.h>
+#include <l4/re/event_enums.h>
+#include <l4/util/util.h>
+#include <l4/sys/irq.h>
+#include <l4/sys/thread.h>
+#include <l4/sys/debugger.h>
+#include <l4/vbus/vbus.h>
+#include <l4/vbus/vbus_i2c.h>
+
+#include "kp-omap.h"
+
+
+#define NUM_ROWS 4
+#define NUM_COLS 4
+
+static unsigned char kp_keycode[16] = {
+
+ L4RE_KEY_1, L4RE_KEY_2, L4RE_KEY_3, L4RE_KEY_4,
+ L4RE_KEY_5, L4RE_KEY_6, L4RE_KEY_7, L4RE_KEY_8,
+ L4RE_KEY_9, L4RE_KEY_0, L4RE_KEY_A, L4RE_KEY_B,
+ L4RE_KEY_C, L4RE_KEY_D, L4RE_KEY_E, L4RE_KEY_F,
+};
+
+static Input_handler kp_handler;
+static void* kp_priv;
+static pthread_t _pthread;
+
+static l4_cap_idx_t vbus = L4_INVALID_CAP;
+static l4vbus_device_handle_t i2c_handle = 0;
+
+/* I2C slave ID */
+#define TWL4030_SLAVENUM_NUM0 0x48
+#define TWL4030_SLAVENUM_NUM1 0x49
+#define TWL4030_SLAVENUM_NUM2 0x4a
+#define TWL4030_SLAVENUM_NUM3 0x4b
+
+/* Module Mapping */
+struct twl4030mapping
+{
+ unsigned char sid; /* Slave ID */
+ unsigned char base; /* base address */
+};
+
+/* mapping the module id to slave id and base address */
+static struct twl4030mapping twl4030_map[TWL4030_MODULES + 1] = {
+ { TWL4030_SLAVENUM_NUM0, TWL4030_BASE_USB },
+ { TWL4030_SLAVENUM_NUM1, TWL4030_BASE_AUDIO_VOICE },
+ { TWL4030_SLAVENUM_NUM1, TWL4030_BASE_GPIO },
+ { TWL4030_SLAVENUM_NUM1, TWL4030_BASE_INTBR },
+ { TWL4030_SLAVENUM_NUM1, TWL4030_BASE_PIH },
+ { TWL4030_SLAVENUM_NUM1, TWL4030_BASE_TEST },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_KEYPAD },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_MADC },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_INTERRUPTS },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_LED },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_MAIN_CHARGE },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_PRECHARGE },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_PWM0 },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_PWM1 },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_PWMA },
+ { TWL4030_SLAVENUM_NUM2, TWL4030_BASE_PWMB },
+ { TWL4030_SLAVENUM_NUM3, TWL4030_BASE_BACKUP },
+ { TWL4030_SLAVENUM_NUM3, TWL4030_BASE_INT },
+ { TWL4030_SLAVENUM_NUM3, TWL4030_BASE_PM_MASTER },
+ { TWL4030_SLAVENUM_NUM3, TWL4030_BASE_PM_RECIEVER },
+ { TWL4030_SLAVENUM_NUM3, TWL4030_BASE_RTC },
+ { TWL4030_SLAVENUM_NUM3, TWL4030_BASE_SECURED_REG },
+};
+
+#if 1
+static int twl4030_i2c_write_u8(unsigned mod_no, l4_uint8_t value, l4_uint8_t reg)
+{
+ return l4vbus_i2c_write(vbus, i2c_handle, twl4030_map[mod_no].sid, twl4030_map[mod_no].base + reg, &value, 1);
+}
+
+static int twl4030_i2c_read_u8(unsigned mod_no, l4_uint8_t *value, l4_uint8_t reg)
+{
+ unsigned long size = 1;
+ return l4vbus_i2c_read(vbus, i2c_handle, twl4030_map[mod_no].sid, twl4030_map[mod_no].base + reg, value, &size);
+}
+#endif
+
+static int twl4030_i2c_read_u32(int mod_no, l4_uint8_t *value, l4_uint8_t reg)
+{
+ unsigned long size = 4;
+ return l4vbus_i2c_read(vbus, i2c_handle, twl4030_map[mod_no].sid, twl4030_map[mod_no].base + reg, value, &size);
+}
+
+static int kp_read(int reg, l4_uint8_t *val)
+{
+ unsigned long size = 1;
+ return l4vbus_i2c_read(vbus, i2c_handle, twl4030_map[TWL4030_MODULE_KEYPAD].sid,
+ twl4030_map[TWL4030_MODULE_KEYPAD].base + reg, val, &size);
+}
+
+static int kp_write(int reg, l4_uint8_t val)
+{
+ return l4vbus_i2c_write(vbus, i2c_handle, twl4030_map[TWL4030_MODULE_KEYPAD].sid,
+ twl4030_map[TWL4030_MODULE_KEYPAD].base + reg, &val, 1);
+}
+
+#if 1
+static int twl_init_irq(void)
+{
+ int ret = 0;
+
+ /* PWR_ISR1 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x00);
+ /* PWR_ISR2 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x02);
+ /* PWR_IMR1 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x1);
+ /* PWR_IMR2 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x3);
+ /* PWR_ISR1 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x00);
+ /* PWR_ISR2 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INT, 0xFF, 0x02);
+
+ /* BCIIMR1_1 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x3);
+ /* BCIIMR1_2 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x4);
+ /* BCIIMR2_1 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x7);
+ /* BCIIMR2_2 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_INTERRUPTS, 0xFF, 0x8);
+
+ /* MADC */
+ /* MADC_IMR1 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xFF, 0x62);
+ /* MADC_IMR2 */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_MADC, 0xFF, 0x64);
+ /* GPIO_IMR1A */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, 0x1C);
+ /* GPIO_IMR2A */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, 0x1D);
+ /* GPIO_IMR3A */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, 0x1E);
+ /* GPIO_IMR1B */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, 0x22);
+ /* GPIO_IMR2B */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, 0x23);
+ /* GPIO_IMR3B */
+ ret |= twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, 0xFF, 0x24);
+
+ return ret;
+}
+#endif
+
+static int init_keypad(void)
+{
+ int ret = 0;
+
+ twl_init_irq();
+
+ // Enable software mode and keypad power on
+ ret = kp_write(REG_KEYP_CTRL_REG, 0x43);
+ // Mask all interrupts
+ ret |= kp_write(REG_KEYP_IMR1, 0x0f);
+ {
+ /* Clear ISR */
+ l4_uint8_t v;
+ kp_read(REG_KEYP_ISR1, &v);
+ kp_read(REG_KEYP_ISR1, &v);
+ }
+ // Trigger interrupts on rising edge
+ ret |= kp_write(REG_KEYP_EDR, 0xaa);
+ // Set pre scalar field
+ ret |= kp_write(REG_LK_PTV_REG, 4 << 5);
+ // Set key debounce time
+ ret |= kp_write(REG_KEY_DEB_REG, 0x3f);
+ // Enable COR-mode
+ ret |= kp_write(REG_KEYP_SIH_CTRL, 0x4);
+ // unmask all interrupts
+ ret |= kp_write(REG_KEYP_IMR1, 0);
+
+ return ret;
+}
+
+static void drive_vibr(void)
+{
+ // VIBRATOR_CFG
+ l4_uint8_t v = (1<<3)|(1<<2)|1;
+ unsigned long s = 1;
+ l4vbus_i2c_write(vbus, i2c_handle, 0x4b, 0x60, &v, 1);
+ // configure mux
+ //v = 0x10;
+ //l4vbus_i2c_write(vbus, i2c_handle, 0x49, 0x92, &v, 1);
+
+ l4_uint16_t w = (0x4 << 13)|(0x1 << 12)|(0x1 << 4)|(0xe);
+ l4_uint8_t *p = (l4_uint8_t *)(&w);
+ l4vbus_i2c_write(vbus, i2c_handle, 0x4b, 0x4b, &(p[1]), 1);
+ l4vbus_i2c_write(vbus, i2c_handle, 0x4b, 0x4c, &(p[0]), 1);
+ printf("WRITE:%x %x\n", p[1], p[0]);
+
+ l4vbus_i2c_read(vbus, i2c_handle, 0x4b, 0x73, &v, &s);
+ printf("VAUX1_TYPE:%x\n", v);
+ l4vbus_i2c_read(vbus, i2c_handle, 0x4b, 0x74, &v, &s);
+ printf("VAUX1_REMAP:%x\n", v);
+ l4vbus_i2c_read(vbus, i2c_handle, 0x4b, 0x75, &v, &s);
+ printf("VAUX1_DEDICATED:%x\n", v);
+ l4vbus_i2c_read(vbus, i2c_handle, 0x4b, 0x76, &v, &s);
+ printf("VAUX1_DEV_GRP:%x\n", v);
+}
+
+static void reset_keypad(void)
+{
+ kp_write(REG_KEYP_IMR1, 0xf);
+}
+
+static l4_uint8_t old_state[NUM_ROWS] = { 0 };
+
+static int scan_key(void)
+{
+ l4_uint8_t new_state[NUM_ROWS];
+ //unsigned long size = NUM_ROWS;
+
+ twl4030_i2c_read_u32(TWL4030_MODULE_KEYPAD, new_state, REG_FULL_CODE_7_0);
+ printf("[KEYP] state:%x %x %x %x %x\n",
+ new_state[0], new_state[1], new_state[2], new_state[3], new_state[4]);
+
+ /* check for changes and print those */
+ int row = 0;
+ for (row = 0; row < NUM_ROWS; row++)
+ {
+ int changed = new_state[row] ^ old_state[row];
+
+ if (!changed)
+ continue;
+
+ int col = 0;
+ for (col = 0; col < NUM_COLS; col++)
+ {
+ if (!(changed & (1 << col)))
+ continue;
+ int key_pressed = new_state[row] & (1 << col);
+
+ printf("***********************key %s:row:%d col:%d\n", key_pressed ? "pressed" : "released", row, col);
+ Input_event ev = { L4RE_EV_KEY, kp_keycode[row * NUM_COLS + col], key_pressed };
+ kp_handler(ev, kp_priv);
+ }
+ }
+
+ memcpy(old_state, new_state, NUM_ROWS);
+
+ return 0;
+}
+
+static int kp_irq_func(void)
+{
+ l4_cap_idx_t irq_cap = l4re_util_cap_alloc();
+ l4_cap_idx_t thread_cap = pthread_getl4cap(_pthread);
+ l4_msgtag_t tag;
+
+ l4_debugger_set_object_name(thread_cap, "kp-omap3.irq");
+
+ if (l4io_request_irq(7, irq_cap) < 0)
+ return -2;
+ // was L4_IRQ_F_LEVEL_LOW
+ tag = l4_irq_attach(irq_cap, 0, thread_cap);
+ if (l4_ipc_error(tag, l4_utcb()))
+ return -3;
+
+ while (1)
+ {
+ tag = l4_irq_receive(irq_cap, L4_IPC_NEVER);
+ if (l4_ipc_error(tag, l4_utcb()))
+ {
+ printf("[KEYP] Error: Receive irq failed\n");
+ continue;
+ }
+
+ kp_write(REG_KEYP_IMR1, 0xf);
+
+ if (kp_handler)
+ scan_key();
+
+ l4_uint8_t value = 0;
+ kp_read(REG_KEYP_ISR1, &value);
+ kp_write(REG_KEYP_IMR1, 0x0);
+ }
+}
+
+static void* __irq_func(void *data)
+{
+ (void)data;
+ int ret = kp_irq_func();
+ printf("[KEYP] Warning: irq handler returned with:%d\n", ret);
+ l4_sleep_forever();
+}
+
+static
+int kp_init(void)
+{
+ vbus = l4re_get_env_cap("vbus");
+
+ if (l4_is_invalid_cap(vbus))
+ {
+ printf("[KEYP] Failed to query vbus\n");
+ return -1;
+ }
+
+ if (l4vbus_get_device_by_hid(vbus, 0, &i2c_handle, "i2c", 0, 0))
+ {
+ printf("[KEYP] ##### Cannot find I2C\n");
+ }
+
+ return init_keypad();
+}
+
+static const char *kp_get_info(void)
+{ return "ARM OMAP3EVM Keypad"; }
+
+static int kp_probe(const char *name)
+{
+ if (strcmp("OMAP_KP", name))
+ {
+ printf("[KEYP] I'm not the right driver for %s\n", name);
+ return 0;
+ }
+ return !l4io_lookup_device("OMAP_KP", NULL, 0, 0);
+}
+
+static void kp_attach(Input_handler handler, void *priv)
+{
+ kp_handler = handler;
+ kp_priv = priv;
+ pthread_attr_t thread_attr;
+
+ int err;
+ if ((err = pthread_attr_init(&thread_attr)) != 0)
+ printf("[KEYP] Error: Initializing pthread attr: %d\n", err);
+
+ struct sched_param sp;
+ sp.sched_priority = 0x20;
+ pthread_attr_setschedpolicy(&thread_attr, SCHED_L4);
+ pthread_attr_setschedparam(&thread_attr, &sp);
+ pthread_attr_setinheritsched(&thread_attr, PTHREAD_EXPLICIT_SCHED);
+
+ err = pthread_create(&_pthread, &thread_attr, __irq_func, 0);
+ if (err != 0)
+ printf("[KEYP] Error: Creating thread\n");
+}
+
+static void kp_enable(void)
+{
+ if (kp_init())
+ {
+ printf("[KEYP] Error: Init failed!\n");
+ return;
+ }
+}
+
+static void kp_disable(void)
+{
+ reset_keypad();
+}
+
+static struct arm_input_ops arm_kp_ops_omap3 = {
+ .get_info = kp_get_info,
+ .probe = kp_probe,
+ .attach = kp_attach,
+ .enable = kp_enable,
+ .disable = kp_disable,
+};
+
+arm_input_register(&arm_kp_ops_omap3);
--- /dev/null
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <pthread.h>
+#include <pthread-l4.h>
+
+#include <l4/input/drv_reg.h>
+#include <l4/re/c/dataspace.h>
+#include <l4/re/c/mem_alloc.h>
+#include <l4/re/c/rm.h>
+#include <l4/re/c/namespace.h>
+#include <l4/re/c/util/cap_alloc.h>
+#include <l4/re/event_enums.h>
+#include <l4/io/io.h>
+#include <l4/sys/icu.h>
+#include <l4/sys/irq.h>
+#include <l4/sys/thread.h>
+#include <l4/sys/debugger.h>
+#include <l4/util/util.h>
+#include <l4/vbus/vbus.h>
+#include <l4/vbus/vbus_gpio.h>
+#include <l4/vbus/vbus_mcspi.h>
+
+#include "tsc-omap3.h"
+
+typedef struct {
+ int x;
+ int y;
+} Tsc_coord;
+
+typedef struct {
+ Tsc_coord ul; // upper left coordinate
+ Tsc_coord lr; // lower right coordinate
+} Tsc_disp;
+
+static int get_width(Tsc_disp *d)
+{ return d->lr.x - d->ul.x; }
+
+static int get_height(Tsc_disp *d)
+{ return d->lr.y - d->ul.y; }
+
+static int is_valid(Tsc_disp *d, int x, int y)
+{
+ if ((x >= d->ul.x) && (x <= d->lr.x) &&
+ (y >= d->ul.y) && (y <= d->lr.y))
+ return 1;
+ else
+ return 0;
+}
+
+static char *omap_dev_name = "OMAP_TSC";
+
+static Input_handler tsc_handler;
+static void *tsc_priv;
+static pthread_t _pthread;
+
+static l4_cap_idx_t vbus = L4_INVALID_CAP;
+static l4vbus_device_handle_t tsc_handle;
+static l4vbus_device_handle_t gpio_handle;
+static l4vbus_device_handle_t mcspi_handle;
+static unsigned irq = 175;
+static unsigned channel = 0; // This is fixed
+
+// FIXME: the physical display depends on the touchscreen device
+static Tsc_disp disp_phys = {{ 3856, 3856}, { 176, 176 }};
+// FIXME: the virtual display depends on the LCD device
+static Tsc_disp disp_virt = {{ 0, 0 }, { 480, 640 }};
+
+static int tsc_init(void)
+{
+ vbus = l4re_get_env_cap("vbus");
+
+ if (l4_is_invalid_cap(vbus))
+ {
+ printf("Failed to query vbus\n");
+ return -1;
+ }
+
+ if (l4vbus_get_device_by_hid(vbus, 0, &tsc_handle, omap_dev_name, 0, 0))
+ {
+ printf("[TSC] Cannot find TSC device\n");
+ return -L4_ENODEV;
+ }
+
+ if (l4vbus_get_device_by_hid(vbus, 0, &gpio_handle, "gpio", 0, 0))
+ {
+ printf("[TSC] Cannot find GPIO bus\n");
+ return -L4_ENODEV;
+ }
+
+ if (l4vbus_get_device_by_hid(vbus, 0, &mcspi_handle, "mcspi", 0, 0))
+ {
+ printf("[TSC] Cannot find McSPI bus\n");
+ return -L4_ENODEV;
+ }
+
+ return 0;
+}
+
+#if 0
+static void tsc_get_pen_position(int *x, int *y)
+{
+ l4_umword_t data1 = 0, data2 = 0, data3 = 0, data4 = 0;
+
+ l4vbus_bus_read(2, 0x8000, &data1);
+ l4vbus_bus_read(2, 0xd300, &data2);
+ l4vbus_bus_read(2, 0x9300, &data3);
+ l4vbus_bus_read(2, 0x8000, &data4);
+
+ // convert physical display coordinates to virtual display coordinates
+ *x = ((*x - disp_phys.ul.x) * get_width(&disp_virt))/get_width(&disp_phys) + disp_virt.ul.x;
+ *y = ((*y - disp_phys.ul.y) * get_height(&disp_virt))/get_height(&disp_phys) + disp_virt.ul.y;
+}
+#endif
+
+static void tsc_get_pen_position(int *x, int *y)
+{
+ l4_umword_t data1 = 0, data2 = 0, data3 = 0, data4 = 0;
+
+ l4vbus_mcspi_write(vbus, mcspi_handle, channel, 0x8000);
+ l4vbus_mcspi_read(vbus, mcspi_handle, channel, &data1);
+
+ l4vbus_mcspi_write(vbus, mcspi_handle, channel, 0xd300);
+ l4vbus_mcspi_read(vbus, mcspi_handle, channel, &data2);
+
+ l4vbus_mcspi_write(vbus, mcspi_handle, channel, 0x9300);
+ l4vbus_mcspi_read(vbus, mcspi_handle, channel, &data3);
+
+ l4vbus_mcspi_write(vbus, mcspi_handle, channel, 0x8000);
+ l4vbus_mcspi_read(vbus, mcspi_handle, channel, &data4);
+
+ *x = ((data2 & 0x7f) << 5) | ((data3 & 0xf800) >> 11);
+ *y = ((data3 & 0x7f) << 5) | ((data4 & 0xf800) >> 11);
+
+ // XXX convert physical display coordinates to virtual display coordinates
+ *x = ((*x - disp_phys.ul.x) * get_width(&disp_virt))/get_width(&disp_phys) + disp_virt.ul.x;
+ *y = ((*y - disp_phys.ul.y) * get_height(&disp_virt))/get_height(&disp_phys) + disp_virt.ul.y;
+
+ //printf ("[TSC] Info: (x,y)=(%d,%d)\n", *x, *y);
+}
+
+l4_cap_idx_t get_icu(void);
+
+static void create_motion_event(void)
+{
+ int x = 0, y = 0;
+ tsc_get_pen_position(&x, &y);
+ if (is_valid(&disp_virt, x, y))
+ {
+ Input_event ev_x = { L4RE_EV_ABS, L4RE_ABS_X, x };
+ tsc_handler(ev_x, tsc_priv);
+ Input_event ev_y = { L4RE_EV_ABS, L4RE_ABS_Y, y };
+ tsc_handler(ev_y, tsc_priv);
+ }
+}
+
+static int tsc_irq_func(void)
+{
+ l4_cap_idx_t irq_cap = l4re_util_cap_alloc();
+ l4_cap_idx_t thread_cap = pthread_getl4cap(_pthread);
+ l4_msgtag_t tag;
+
+ l4_debugger_set_object_name(thread_cap, "tsc-omap3.irq");
+
+#if 0
+ if (l4io_request_irq2(irq, irq_cap, L4_IRQ_F_NEG_EDGE) < 0)
+ return -2;
+#endif
+ // was L4_IRQ_F_LEVEL_HIGH
+ tag = l4_irq_attach(irq_cap, 0, thread_cap);
+ if (l4_ipc_error(tag, l4_utcb()))
+ return -3;
+
+
+ while (1)
+ {
+ tag = l4_irq_receive(irq_cap, L4_IPC_NEVER);
+ if (l4_ipc_error(tag, l4_utcb()))
+ {
+ printf("[TSC] Error: Receive irq failed\n");
+ continue;
+ }
+
+ if (!tsc_handler)
+ continue;
+
+ create_motion_event();
+ // generate touch start event;
+ Input_event ev = { L4RE_EV_KEY, L4RE_BTN_LEFT, 1 };
+ tsc_handler(ev, tsc_priv);
+
+ int pen_up = 0;
+ if (l4vbus_gpio_read(vbus, gpio_handle, irq, &pen_up))
+ return -6;
+ while (!pen_up)
+ {
+ create_motion_event();
+ l4_usleep(2);
+
+ if (l4vbus_gpio_read(vbus, gpio_handle, irq, &pen_up))
+ return -6;
+ }
+
+ // generate touch end event;
+ Input_event ev2 = { L4RE_EV_KEY, L4RE_BTN_LEFT, 0 };
+ tsc_handler(ev2, tsc_priv);
+
+#if 0
+ l4_umword_t label = 0;
+ l4_icu_unmask(get_icu(), irq, &label, L4_IPC_NEVER);
+#endif
+ }
+}
+
+static void* __irq_func(void *data)
+{
+ (void)data;
+ int ret = tsc_irq_func();
+ printf("[TSC] Warning: irq handler returned with:%d\n", ret);
+ l4_sleep_forever();
+}
+
+static const char *tsc_get_info(void)
+{ return "ARM OMAP3EVM TSC"; }
+
+static int tsc_probe(const char *name)
+{
+ if (strcmp(omap_dev_name, name)) {
+ printf("[TSC] I'm not the right driver for [%s]\n", name);
+ return 0;
+ }
+ return !l4io_lookup_device(omap_dev_name, NULL, 0, 0);
+}
+
+static void tsc_attach(Input_handler handler, void *priv)
+{
+ tsc_handler = handler;
+ tsc_priv = priv;
+ pthread_attr_t thread_attr;
+
+ int err;
+ if ((err = pthread_attr_init(&thread_attr)) != 0)
+ printf("[TSC] Error: Initializing pthread attr: %d", err);
+
+ struct sched_param sp;
+ sp.sched_priority = 0x20;
+ pthread_attr_setschedpolicy(&thread_attr, SCHED_L4);
+ pthread_attr_setschedparam(&thread_attr, &sp);
+ pthread_attr_setinheritsched(&thread_attr, PTHREAD_EXPLICIT_SCHED);
+
+ err = pthread_create(&_pthread, &thread_attr, __irq_func, 0);
+ if (err != 0)
+ printf("[TSC] Error: Creating thread");
+}
+
+static void tsc_enable(void)
+{
+ if (tsc_init())
+ {
+ printf("[TSC] Init failed!\n");
+ return;
+ }
+}
+
+static void tsc_disable(void)
+{}
+
+static struct arm_input_ops arm_tsc_ops_omap3 = {
+ .get_info = tsc_get_info,
+ .probe = tsc_probe,
+ .attach = tsc_attach,
+ .enable = tsc_enable,
+ .disable = tsc_disable,
+};
+
+arm_input_register(&arm_tsc_ops_omap3);
--- /dev/null
+#pragma once
+
+#define GPIO_NUM_VDD 153
+
+enum {
+ Tsc2046_start = 0x1 << 7,
+ Tsc2046_x = 0x1 << 4,
+ Tsc2046_z1 = 0x3 << 4,
+ Tsc2046_z2 = 0x4 << 4,
+ Tsc2046_y = 0x5 << 4,
+};
--- /dev/null
+PKGDIR ?= ..
+L4DIR ?= $(PKGDIR)/../..
+
+TARGET := include src
+
+include $(L4DIR)/mk/subdir.mk
+
+src: include
--- /dev/null
+PKGDIR = ../..
+L4DIR ?= $(PKGDIR)/../..
+
+include $(L4DIR)/mk/include.mk
--- /dev/null
+#ifndef __ARM_DRIVERS__LCD__INCLUDE__LCD_H__
+#define __ARM_DRIVERS__LCD__INCLUDE__LCD_H__
+
+#include <l4/sys/types.h>
+#include <l4/re/c/video/view.h>
+
+EXTERN_C_BEGIN
+
+struct arm_lcd_ops {
+ int (*probe)(const char *configstr);
+ void * (*get_fb)(void);
+ unsigned int (*get_video_mem_size)(void);
+ const char * (*get_info)(void);
+
+ int (*get_fbinfo)(l4re_video_view_info_t *vinfo);
+
+ void (*enable)(void);
+ void (*disable)(void);
+};
+
+struct arm_lcd_ops *arm_lcd_probe(const char *configstr);
+
+void arm_lcd_register_driver(struct arm_lcd_ops *);
+
+/* Callable once per file (should be enough?) */
+#define arm_lcd_register(ops) \
+ static void __attribute__((constructor)) __register_ops(void) \
+ { arm_lcd_register_driver(ops); }
+
+EXTERN_C_END
+
+#endif /* ! __ARM_DRIVERS__LCD__INCLUDE__LCD_H__ */
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+SRC_C := lcd.c lcd-virtual.c lcd-amba.c lcd-s3c2410.c lcd-omap3.c #lcd-h3800.c
+SRC_C += lcd-tegra2.c
+TARGET = libarm_lcd.o.a
+PC_FILENAME := libdrivers-lcd
+REQUIRES_LIBS := libio l4re_c l4re_c-util libdrivers-generic
+
+PRIVATE_INCDIR += $(PKGDIR)/lcd/src
+
+include $(L4DIR)/mk/lib.mk
--- /dev/null
+/*
+ *
+ * Definitions for H3600 Handheld Computer
+ *
+ * Copyright 2000 Compaq Computer Corporation.
+ *
+ * Use consistent with the GNU GPL is permitted,
+ * provided that this copyright notice is
+ * preserved in its entirety in all copies and derived works.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Jamey Hicks.
+ *
+ * History:
+ *
+ * 2001-10-?? Andrew Christian Added support for iPAQ H3800
+ *
+ */
+
+#ifndef _INCLUDE_H3600_H_
+#define _INCLUDE_H3600_H_
+
+#ifndef __ASSEMBLY__
+//#include "serial.h"
+#endif
+
+/* generalized support for H3xxx series Compaq Pocket PC's */
+#define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800())
+
+/* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */
+// #define H3600_EGPIO_VIRT 0xf0000000
+// #define H3600_BANK_2_VIRT 0xf1000000
+// #define H3600_BANK_4_VIRT 0xf3800000
+
+/*
+ Machine-independent GPIO definitions
+ --- these are common across all current iPAQ platforms
+*/
+
+#define GPIO_H3600_NPOWER_BUTTON GPIO_GPIO (0) /* Also known as the "off button" */
+
+#define GPIO_H3600_PCMCIA_CD1 GPIO_GPIO (10)
+#define GPIO_H3600_PCMCIA_IRQ1 GPIO_GPIO (11)
+
+/* UDA1341 L3 Interface */
+#define GPIO_H3600_L3_DATA GPIO_GPIO (14)
+#define GPIO_H3600_L3_MODE GPIO_GPIO (15)
+#define GPIO_H3600_L3_CLOCK GPIO_GPIO (16)
+
+#define GPIO_H3600_PCMCIA_CD0 GPIO_GPIO (17)
+#define GPIO_H3600_SYS_CLK GPIO_GPIO (19)
+#define GPIO_H3600_PCMCIA_IRQ0 GPIO_GPIO (21)
+
+#define GPIO_H3600_COM_DCD GPIO_GPIO (23)
+#define GPIO_H3600_OPT_IRQ GPIO_GPIO (24)
+#define GPIO_H3600_COM_CTS GPIO_GPIO (25)
+#define GPIO_H3600_COM_RTS GPIO_GPIO (26)
+
+#define IRQ_GPIO_H3600_NPOWER_BUTTON IRQ_GPIO0
+#define IRQ_GPIO_H3600_PCMCIA_CD1 IRQ_GPIO10
+#define IRQ_GPIO_H3600_PCMCIA_IRQ1 IRQ_GPIO11
+#define IRQ_GPIO_H3600_PCMCIA_CD0 IRQ_GPIO17
+#define IRQ_GPIO_H3600_PCMCIA_IRQ0 IRQ_GPIO21
+#define IRQ_GPIO_H3600_COM_DCD IRQ_GPIO23
+#define IRQ_GPIO_H3600_OPT_IRQ IRQ_GPIO24
+#define IRQ_GPIO_H3600_COM_CTS IRQ_GPIO25
+
+
+#ifndef __ASSEMBLY__
+
+enum ipaq_egpio_type {
+ IPAQ_EGPIO_LCD_ON, /* Power to the LCD panel */
+ IPAQ_EGPIO_CODEC_NRESET, /* Clear to reset the audio codec (remember to return high) */
+ IPAQ_EGPIO_AUDIO_ON, /* Audio power */
+ IPAQ_EGPIO_QMUTE, /* Audio muting */
+ IPAQ_EGPIO_OPT_NVRAM_ON, /* Non-volatile RAM on extension sleeves (SPI interface) */
+ IPAQ_EGPIO_OPT_ON, /* Power to extension sleeves */
+ IPAQ_EGPIO_CARD_RESET, /* Reset PCMCIA cards on extension sleeve (???) */
+ IPAQ_EGPIO_OPT_RESET, /* Reset option pack (???) */
+ IPAQ_EGPIO_IR_ON, /* IR sensor/emitter power */
+ IPAQ_EGPIO_IR_FSEL, /* IR speed selection 1->fast, 0->slow */
+ IPAQ_EGPIO_RS232_ON, /* Maxim RS232 chip power */
+ IPAQ_EGPIO_VPP_ON, /* Turn on power to flash programming */
+ IPAQ_EGPIO_COM_DSR, /* only on H3800 */
+};
+
+struct ipaq_model_ops {
+ const char *generic_name;
+ void (*control)(enum ipaq_egpio_type, int);
+ unsigned long (*read)(void);
+ void (*blank_callback)(int blank);
+ int (*pm_callback)(int req); /* Primary model callback */
+ int (*pm_callback_aux)(int req); /* Secondary callback (used by HAL modules) */
+};
+
+extern struct ipaq_model_ops ipaq_model_ops;
+
+static __inline__ const char * h3600_generic_name( void ) {
+ return ipaq_model_ops.generic_name;
+}
+
+static __inline__ void assign_h3600_egpio( enum ipaq_egpio_type x, int level ) {
+ if (ipaq_model_ops.control)
+ ipaq_model_ops.control(x,level);
+ else
+ putstr("no control function\r\n");
+}
+
+static __inline__ void clr_h3600_egpio( enum ipaq_egpio_type x ) {
+ if (ipaq_model_ops.control)
+ ipaq_model_ops.control(x,0);
+ else
+ putstr("no control function\r\n");
+}
+
+static __inline__ void set_h3600_egpio( enum ipaq_egpio_type x ) {
+ if (ipaq_model_ops.control)
+ ipaq_model_ops.control(x,1);
+ else
+ putstr("no control function\r\n");
+}
+
+static __inline__ unsigned long read_h3600_egpio( void ) {
+ if (ipaq_model_ops.read)
+ return ipaq_model_ops.read();
+ return 0;
+}
+
+static __inline__ int h3600_register_blank_callback( void (*f)(int) ) {
+ ipaq_model_ops.blank_callback = f;
+ return 0;
+}
+
+static __inline__ void h3600_unregister_blank_callback( void (*f)(int) ) {
+ ipaq_model_ops.blank_callback = NULL;
+}
+
+
+static __inline__ int h3600_register_pm_callback( int (*f)(int) ) {
+ ipaq_model_ops.pm_callback_aux = f;
+ return 0;
+}
+
+static __inline__ void h3600_unregister_pm_callback( int (*f)(int) ) {
+ ipaq_model_ops.pm_callback_aux = NULL;
+}
+
+static __inline__ int h3600_power_management( int req ) {
+ if ( ipaq_model_ops.pm_callback )
+ return ipaq_model_ops.pm_callback(req);
+ return 0;
+}
+
+#endif /* ASSEMBLY */
+
+#endif /* _INCLUDE_H3600_H_ */
--- /dev/null
+/*
+ *
+ * Definitions for H3600 Handheld Computer
+ *
+ * Copyright 2001 Compaq Computer Corporation.
+ *
+ * Use consistent with the GNU GPL is permitted,
+ * provided that this copyright notice is
+ * preserved in its entirety in all copies and derived works.
+ *
+ * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
+ * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
+ * FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ * Author: Andrew Christian
+ *
+ */
+
+#ifndef _INCLUDE_H3600_ASIC_H_
+#define _INCLUDE_H3600_ASIC_H_
+
+//#include <asm-arm/arch-sa1100/h3600.h>
+#include <arch-sa1100/h3600.h>
+
+/*
+ * GPIO lines that are common across ALL iPAQ models are in "h3600.h"
+ * This file contains machine-specific definitions for the H3800
+ */
+
+#define GPIO_H3800_ASIC GPIO_GPIO (1)
+#define GPIO_H3800_AC_IN GPIO_GPIO (12)
+#define GPIO_H3800_COM_DSR GPIO_GPIO (13)
+#define GPIO_H3800_MMC_INT GPIO_GPIO (18)
+#define GPIO_H3800_NOPT_IND GPIO_GPIO (20) /* Almost exactly the same as GPIO_H3600_OPT_DET */
+#define GPIO_H3800_OPT_BAT_FAULT GPIO_GPIO (22)
+#define GPIO_H3800_CLK_OUT GPIO_GPIO (27)
+
+/****************************************************/
+
+#define IRQ_GPIO_H3800_ASIC IRQ_GPIO1
+#define IRQ_GPIO_H3800_AC_IN IRQ_GPIO12
+#define IRQ_GPIO_H3800_MMC_INT IRQ_GPIO18
+#define IRQ_GPIO_H3800_NOPT_IND IRQ_GPIO20 /* almost same as OPT_DET */
+
+/********************* H3800, ASIC #2 ********************/
+
+#define _H3800_ASIC2_Base (H3600_EGPIO_VIRT)
+#define H3800_ASIC2_OFFSET(s,x,y) \
+ (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC2_ ## x ## _Base + _H3800_ASIC2_ ## x ## _ ## y)))
+#define H3800_ASIC2_NOFFSET(s,x,n,y) \
+ (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC2_ ## x ## _ ## n ## _Base + _H3800_ASIC2_ ## x ## _ ## y)))
+
+#define _H3800_ASIC2_GPIO_Base 0x0000
+#define _H3800_ASIC2_GPIO_Direction 0x0000 /* R/W, 16 bits 1:input, 0:output */
+#define _H3800_ASIC2_GPIO_InterruptType 0x0004 /* R/W, 12 bits 1:edge, 0:level */
+#define _H3800_ASIC2_GPIO_InterruptEdgeType 0x0008 /* R/W, 12 bits 1:rising, 0:falling */
+#define _H3800_ASIC2_GPIO_InterruptLevelType 0x000C /* R/W, 12 bits 1:high, 0:low */
+#define _H3800_ASIC2_GPIO_InterruptClear 0x0010 /* W, 12 bits */
+#define _H3800_ASIC2_GPIO_InterruptFlag 0x0010 /* R, 12 bits - reads int status */
+#define _H3800_ASIC2_GPIO_Data 0x0014 /* R/W, 16 bits */
+#define _H3800_ASIC2_GPIO_BattFaultOut 0x0018 /* R/W, 16 bit - sets level on batt fault */
+#define _H3800_ASIC2_GPIO_InterruptEnable 0x001c /* R/W, 12 bits 1:enable interrupt */
+#define _H3800_ASIC2_GPIO_Alternate 0x003c /* R/W, 12+1 bits - set alternate functions */
+
+#define H3800_ASIC2_GPIODIR H3800_ASIC2_OFFSET( u16, GPIO, Direction )
+#define H3800_ASIC2_GPIINTTYPE H3800_ASIC2_OFFSET( u16, GPIO, InterruptType )
+#define H3800_ASIC2_GPIINTESEL H3800_ASIC2_OFFSET( u16, GPIO, InterruptEdgeType )
+#define H3800_ASIC2_GPIINTALSEL H3800_ASIC2_OFFSET( u16, GPIO, InterruptLevelType )
+#define H3800_ASIC2_GPIINTCLR H3800_ASIC2_OFFSET( u16, GPIO, InterruptClear )
+#define H3800_ASIC2_GPIINTFLAG H3800_ASIC2_OFFSET( u16, GPIO, InterruptFlag )
+#define H3800_ASIC2_GPIOPIOD H3800_ASIC2_OFFSET( u16, GPIO, Data )
+#define H3800_ASIC2_GPOBFSTAT H3800_ASIC2_OFFSET( u16, GPIO, BattFaultOut )
+#define H3800_ASIC2_GPIINTSTAT H3800_ASIC2_OFFSET( u16, GPIO, InterruptEnable )
+#define H3800_ASIC2_GPIOALT H3800_ASIC2_OFFSET( u16, GPIO, Alternate )
+
+#define GPIO2_IN_Y1_N (1 << 0) /* Output: Touchscreen Y1 */
+#define GPIO2_IN_X0 (1 << 1) /* Output: Touchscreen X0 */
+#define GPIO2_IN_Y0 (1 << 2) /* Output: Touchscreen Y0 */
+#define GPIO2_IN_X1_N (1 << 3) /* Output: Touchscreen X1 */
+#define GPIO2_BT_RST (1 << 4) /* Output: Bluetooth reset */
+#define GPIO2_PEN_IRQ (1 << 5) /* Input : Pen down */
+#define GPIO2_SD_DETECT (1 << 6) /* Input : SD detect */
+#define GPIO2_EAR_IN_N (1 << 7) /* Input : Audio jack plug inserted */
+#define GPIO2_OPT_PCM_RESET (1 << 8) /* Output: Card reset (pin 2 on expansion) */
+#define GPIO2_OPT_RESET (1 << 9) /* Output: Option pack reset (pin 8 on expansion) */
+#define GPIO2_USB_DETECT_N (1 << 10) /* Input : */
+#define GPIO2_SD_CON_SLT (1 << 11) /* Input : */
+#define GPIO2_OPT_ON (1 << 12) /* Output: Option jacket power */
+#define GPIO2_OPT_ON_NVRAM (1 << 13) /* Output: Option jacket NVRAM power */
+
+#define _H3800_ASIC2_KPIO_Base 0x0200
+#define _H3800_ASIC2_KPIO_Direction 0x0000 /* R/W, 12 bits 1:input, 0:output */
+#define _H3800_ASIC2_KPIO_InterruptType 0x0004 /* R/W, 12 bits 1:edge, 0:level */
+#define _H3800_ASIC2_KPIO_InterruptEdgeType 0x0008 /* R/W, 12 bits 1:rising, 0:falling */
+#define _H3800_ASIC2_KPIO_InterruptLevelType 0x000C /* R/W, 12 bits 1:high, 0:low */
+#define _H3800_ASIC2_KPIO_InterruptClear 0x0010 /* W, 20 bits - 8 special */
+#define _H3800_ASIC2_KPIO_InterruptFlag 0x0010 /* R, 20 bits - 8 special - reads int status */
+#define _H3800_ASIC2_KPIO_Data 0x0014 /* R/W, 16 bits */
+#define _H3800_ASIC2_KPIO_BattFaultOut 0x0018 /* R/W, 16 bit - sets level on batt fault */
+#define _H3800_ASIC2_KPIO_InterruptEnable 0x001c /* R/W, 20 bits - 8 special (DON'T TRY TO READ!) */
+#define _H3800_ASIC2_KPIO_Alternate 0x003c /* R/W, 6 bits */
+
+#define H3800_ASIC2_KPIODIR H3800_ASIC2_OFFSET( u16, KPIO, Direction )
+#define H3800_ASIC2_KPIINTTYPE H3800_ASIC2_OFFSET( u16, KPIO, InterruptType )
+#define H3800_ASIC2_KPIINTESEL H3800_ASIC2_OFFSET( u16, KPIO, InterruptEdgeType )
+#define H3800_ASIC2_KPIINTALSEL H3800_ASIC2_OFFSET( u16, KPIO, InterruptLevelType )
+#define H3800_ASIC2_KPIINTCLR H3800_ASIC2_OFFSET( u32, KPIO, InterruptClear )
+#define H3800_ASIC2_KPIINTFLAG H3800_ASIC2_OFFSET( u32, KPIO, InterruptFlag )
+#define H3800_ASIC2_KPIOPIOD H3800_ASIC2_OFFSET( u16, KPIO, Data )
+#define H3800_ASIC2_KPOBFSTAT H3800_ASIC2_OFFSET( u16, KPIO, BattFaultOut )
+#define H3800_ASIC2_KPIINTSTAT H3800_ASIC2_OFFSET( u32, KPIO, InterruptEnable )
+#define H3800_ASIC2_KPIOALT H3800_ASIC2_OFFSET( u16, KPIO, Alternate )
+
+#define KPIO_SPI_INT (1 << 16)
+#define KPIO_OWM_INT (1 << 17)
+#define KPIO_ADC_INT (1 << 18)
+#define KPIO_UART_0_INT (1 << 19)
+#define KPIO_UART_1_INT (1 << 20)
+#define KPIO_TIMER_0_INT (1 << 21)
+#define KPIO_TIMER_1_INT (1 << 22)
+#define KPIO_TIMER_2_INT (1 << 23)
+
+#define KPIO_RECORD_BTN_N (1 << 0) /* Record button */
+#define KPIO_KEY_5W1_N (1 << 1) /* Keypad */
+#define KPIO_KEY_5W2_N (1 << 2) /* */
+#define KPIO_KEY_5W3_N (1 << 3) /* */
+#define KPIO_KEY_5W4_N (1 << 4) /* */
+#define KPIO_KEY_5W5_N (1 << 5) /* */
+#define KPIO_KEY_LEFT_N (1 << 6) /* */
+#define KPIO_KEY_RIGHT_N (1 << 7) /* */
+#define KPIO_KEY_AP1_N (1 << 8) /* Old "Calendar" */
+#define KPIO_KEY_AP2_N (1 << 9) /* Old "Schedule" */
+#define KPIO_KEY_AP3_N (1 << 10) /* Old "Q" */
+#define KPIO_KEY_AP4_N (1 << 11) /* Old "Undo" */
+#define KPIO_KEY_ALL 0x0fff
+
+/* Alternate KPIO functions (set by default) */
+#define KPIO_ALT_KEY_5W1_N (1 << 1) /* Action key */
+#define KPIO_ALT_KEY_5W2_N (1 << 2) /* J1 of keypad input */
+#define KPIO_ALT_KEY_5W3_N (1 << 3) /* J2 of keypad input */
+#define KPIO_ALT_KEY_5W4_N (1 << 4) /* J3 of keypad input */
+#define KPIO_ALT_KEY_5W5_N (1 << 5) /* J4 of keypad input */
+#define KPIO_ALT_KEY_ALL 0x003e
+
+#define _H3800_ASIC2_SPI_Base 0x0400
+#define _H3800_ASIC2_SPI_Control 0x0000 /* R/W 8 bits */
+#define _H3800_ASIC2_SPI_Data 0x0004 /* R/W 8 bits */
+#define _H3800_ASIC2_SPI_ChipSelectDisabled 0x0008 /* W 8 bits */
+
+#define H3800_ASIC2_SPI_Control H3800_ASIC2_OFFSET( u8, SPI, Control )
+#define H3800_ASIC2_SPI_Data H3800_ASIC2_OFFSET( u8, SPI, Data )
+#define H3800_ASIC2_SPI_ChipSelectDisabled H3800_ASIC2_OFFSET( u8, SPI, ChipSelectDisabled )
+
+#define SPI_CONTROL_SPR(clk) ((clk) & 0x0f) /* Clock rate: valid from 0000 (8kHz) to 1000 (2.048 MHz) */
+#define SPI_CONTROL_SPE (1 << 4) /* SPI Enable (1:enable, 0:disable) */
+#define SPI_CONTROL_SPIE (1 << 5) /* SPI Interrupt enable (1:enable, 0:disable) */
+#define SPI_CONTROL_SEL (1 << 6) /* Chip select: 1:SPI_CS1 enable, 0:SPI_CS0 enable */
+#define SPI_CONTROL_SEL_CS0 (0 << 6) /* Set CS0 low */
+#define SPI_CONTROL_SEL_CS1 (1 << 6) /* Set CS0 high */
+#define SPI_CONTROL_CPOL (1 << 7) /* Clock polarity, 1:SCK high when idle */
+
+#define _H3800_ASIC2_PWM_0_Base 0x0600
+#define _H3800_ASIC2_PWM_1_Base 0x0700
+#define _H3800_ASIC2_PWM_TimeBase 0x0000 /* R/W 6 bits */
+#define _H3800_ASIC2_PWM_PeriodTime 0x0004 /* R/W 12 bits */
+#define _H3800_ASIC2_PWM_DutyTime 0x0008 /* R/W 12 bits */
+
+#define H3800_ASIC2_PWM_0_TimeBase H3800_ASIC2_NOFFSET( u8, PWM, 0, TimeBase )
+#define H3800_ASIC2_PWM_0_PeriodTime H3800_ASIC2_NOFFSET( u16, PWM, 0, PeriodTime )
+#define H3800_ASIC2_PWM_0_DutyTime H3800_ASIC2_NOFFSET( u16, PWM, 0, DutyTime )
+
+#define H3800_ASIC2_PWM_1_TimeBase H3800_ASIC2_NOFFSET( u8, PWM, 1, TimeBase )
+#define H3800_ASIC2_PWM_1_PeriodTime H3800_ASIC2_NOFFSET( u16, PWM, 1, PeriodTime )
+#define H3800_ASIC2_PWM_1_DutyTime H3800_ASIC2_NOFFSET( u16, PWM, 1, DutyTime )
+
+#define PWM_TIMEBASE_VALUE(x) ((x)&0xf) /* Low 4 bits sets time base, max = 8 */
+#define PWM_TIMEBASE_ENABLE ( 1 << 4 ) /* Enable clock */
+#define PWM_TIMEBASE_CLEAR ( 1 << 5 ) /* Clear the PWM */
+
+#define _H3800_ASIC2_LED_0_Base 0x0800
+#define _H3800_ASIC2_LED_1_Base 0x0880
+#define _H3800_ASIC2_LED_2_Base 0x0900
+#define _H3800_ASIC2_LED_TimeBase 0x0000 /* R/W 7 bits */
+#define _H3800_ASIC2_LED_PeriodTime 0x0004 /* R/W 12 bits */
+#define _H3800_ASIC2_LED_DutyTime 0x0008 /* R/W 12 bits */
+#define _H3800_ASIC2_LED_AutoStopCount 0x000c /* R/W 16 bits */
+
+#define H3800_ASIC2_LED_0_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 0, TimeBase )
+#define H3800_ASIC2_LED_0_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 0, PeriodTime )
+#define H3800_ASIC2_LED_0_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 0, DutyTime )
+#define H3800_ASIC2_LED_0_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 0, AutoStopClock )
+
+#define H3800_ASIC2_LED_1_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 1, TimeBase )
+#define H3800_ASIC2_LED_1_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 1, PeriodTime )
+#define H3800_ASIC2_LED_1_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 1, DutyTime )
+#define H3800_ASIC2_LED_1_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 1, AutoStopClock )
+
+#define H3800_ASIC2_LED_2_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 2, TimeBase )
+#define H3800_ASIC2_LED_2_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 2, PeriodTime )
+#define H3800_ASIC2_LED_2_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 2, DutyTime )
+#define H3800_ASIC2_LED_2_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 2, AutoStopClock )
+
+#define LEDTBS_MASK 0x0f /* Low 4 bits sets time base, max = 13 */
+#define LEDTBS_BLINK ( 1 << 4 ) /* Enable blinking */
+#define LEDTBS_AUTOSTOP ( 1 << 5 )
+#define LEDTBS_ALWAYS ( 1 << 6 ) /* Enable blink always */
+
+#define _H3800_ASIC2_UART_0_Base 0x0A00
+#define _H3800_ASIC2_UART_1_Base 0x0C00
+#define _H3800_ASIC2_UART_Receive 0x0000 /* R 8 bits */
+#define _H3800_ASIC2_UART_Transmit 0x0000 /* W 8 bits */
+#define _H3800_ASIC2_UART_IntEnable 0x0004 /* R/W 8 bits */
+#define _H3800_ASIC2_UART_IntVerify 0x0008 /* R/W 8 bits */
+#define _H3800_ASIC2_UART_FIFOControl 0x000c /* R/W 8 bits */
+#define _H3800_ASIC2_UART_LineControl 0x0010 /* R/W 8 bits */
+#define _H3800_ASIC2_UART_ModemStatus 0x0014 /* R/W 8 bits */
+#define _H3800_ASIC2_UART_LineStatus 0x0018 /* R/W 8 bits */
+#define _H3800_ASIC2_UART_ScratchPad 0x001c /* R/W 8 bits */
+#define _H3800_ASIC2_UART_DivisorLatchL 0x0020 /* R/W 8 bits */
+#define _H3800_ASIC2_UART_DivisorLatchH 0x0024 /* R/W 8 bits */
+
+#define H3800_ASIC2_UART_0_Receive H3800_ASIC2_NOFFSET( u8, UART, 0, Receive )
+#define H3800_ASIC2_UART_0_Transmit H3800_ASIC2_NOFFSET( u8, UART, 0, Transmit )
+#define H3800_ASIC2_UART_0_IntEnable H3800_ASIC2_NOFFSET( u8, UART, 0, IntEnable )
+#define H3800_ASIC2_UART_0_IntVerify H3800_ASIC2_NOFFSET( u8, UART, 0, IntVerify )
+#define H3800_ASIC2_UART_0_FIFOControl H3800_ASIC2_NOFFSET( u8, UART, 0, FIFOControl )
+#define H3800_ASIC2_UART_0_LineControl H3800_ASIC2_NOFFSET( u8, UART, 0, LineControl )
+#define H3800_ASIC2_UART_0_ModemStatus H3800_ASIC2_NOFFSET( u8, UART, 0, ModemStatus )
+#define H3800_ASIC2_UART_0_LineStatus H3800_ASIC2_NOFFSET( u8, UART, 0, LineStatus )
+#define H3800_ASIC2_UART_0_ScratchPad H3800_ASIC2_NOFFSET( u8, UART, 0, ScratchPad )
+#define H3800_ASIC2_UART_0_DivisorLatchL H3800_ASIC2_NOFFSET( u8, UART, 0, DivisorLatchL )
+#define H3800_ASIC2_UART_0_DivisorLatchH H3800_ASIC2_NOFFSET( u8, UART, 0, DivisorLatchH )
+
+#define H3800_ASIC2_UART_1_Receive H3800_ASIC2_NOFFSET( u8, UART, 1, Receive )
+#define H3800_ASIC2_UART_1_Transmit H3800_ASIC2_NOFFSET( u8, UART, 1, Transmit )
+#define H3800_ASIC2_UART_1_IntEnable H3800_ASIC2_NOFFSET( u8, UART, 1, IntEnable )
+#define H3800_ASIC2_UART_1_IntVerify H3800_ASIC2_NOFFSET( u8, UART, 1, IntVerify )
+#define H3800_ASIC2_UART_1_FIFOControl H3800_ASIC2_NOFFSET( u8, UART, 1, FIFOControl )
+#define H3800_ASIC2_UART_1_LineControl H3800_ASIC2_NOFFSET( u8, UART, 1, LineControl )
+#define H3800_ASIC2_UART_1_ModemStatus H3800_ASIC2_NOFFSET( u8, UART, 1, ModemStatus )
+#define H3800_ASIC2_UART_1_LineStatus H3800_ASIC2_NOFFSET( u8, UART, 1, LineStatus )
+#define H3800_ASIC2_UART_1_ScratchPad H3800_ASIC2_NOFFSET( u8, UART, 1, ScratchPad )
+#define H3800_ASIC2_UART_1_DivisorLatchL H3800_ASIC2_NOFFSET( u8, UART, 1, DivisorLatchL )
+#define H3800_ASIC2_UART_1_DivisorLatchH H3800_ASIC2_NOFFSET( u8, UART, 1, DivisorLatchH )
+
+#define _H3800_ASIC2_TIMER_Base 0x0E00 /* 8254-compatible timers */
+#define _H3800_ASIC2_TIMER_Counter0 0x0000 /* R/W 8 bits */
+#define _H3800_ASIC2_TIMER_Counter1 0x0004 /* R/W 8 bits */
+#define _H3800_ASIC2_TIMER_Counter2 0x0008 /* R/W 8 bits */
+#define _H3800_ASIC2_TIMER_Control 0x000a /* W 8 bits */
+#define _H3800_ASIC2_TIMER_Command 0x0010 /* R/W 8 bits */
+
+#define H3800_ASIC2_TIMER_Counter0 H3800_ASIC2_OFFSET( u8, TIMER, Counter0 )
+#define H3800_ASIC2_TIMER_Counter1 H3800_ASIC2_OFFSET( u8, TIMER, Counter1 )
+#define H3800_ASIC2_TIMER_Counter2 H3800_ASIC2_OFFSET( u8, TIMER, Counter2 )
+#define H3800_ASIC2_TIMER_Control H3800_ASIC2_OFFSET( u8, TIMER, Control )
+#define H3800_ASIC2_TIMER_Command H3800_ASIC2_OFFSET( u8, TIMER, Command )
+
+/* These defines are likely incorrect - in particular, TIMER_CNTL_MODE_4 might
+ need to be 0x04 */
+#define TIMER_CNTL_SELECT(x) (((x)&0x3)<<6) /* Select counter */
+#define TIMER_CNTL_RW(x) (((x)&0x3)<<4) /* Read/write mode */
+#define TIMER_CNTL_RW_LATCH TIMER_CNTL_RW(0)
+#define TIMER_CNTL_RW_LSB_MSB TIMER_CNTL_RW(3) /* LSB first, then MSB */
+#define TIMER_CNTL_MODE(x) (((x)&0x7)<<1) /* Mode */
+#define TIMER_CNTL_MODE_0 TIMER_CNTL_MODE(0) /* Supported for 0 & 1 */
+#define TIMER_CNTL_MODE_2 TIMER_CNTL_MODE(2) /* Supported for all timers */
+#define TIMER_CNTL_MODE_4 TIMER_CNTL_MODE(4) /* Supported for all timers */
+#define TIMER_CNTL_BCD ( 1 << 0 ) /* 1=Use BCD counter, 4 decades */
+
+#define TIMER_CMD_GAT_0 ( 1 << 0 ) /* Gate enable, counter 0 */
+#define TIMER_CMD_GAT_1 ( 1 << 1 ) /* Gate enable, counter 1 */
+#define TIMER_CMD_GAT_2 ( 1 << 2 ) /* Gate enable, counter 2 */
+#define TIMER_CMD_CLK_0 ( 1 << 3 ) /* Clock enable, counter 0 */
+#define TIMER_CMD_CLK_1 ( 1 << 4 ) /* Clock enable, counter 1 */
+#define TIMER_CMD_CLK_2 ( 1 << 5 ) /* Clock enable, counter 2 */
+#define TIMER_CMD_MODE_0 ( 1 << 6 ) /* Mode 0 enable, counter 0 */
+#define TIMER_CMD_MODE_1 ( 1 << 7 ) /* Mode 0 enable, counter 1 */
+
+#define _H3800_ASIC2_CLOCK_Base 0x1000
+#define _H3800_ASIC2_CLOCK_Enable 0x0000 /* R/W 18 bits */
+
+#define H3800_ASIC2_CLOCK_Enable H3800_ASIC2_OFFSET( u32, CLOCK, Enable )
+
+#define ASIC2_CLOCK_AUDIO_1 0x01 /* Enable 4.1 MHz clock for 8Khz and 4khz sample rate */
+#define ASIC2_CLOCK_AUDIO_2 0x02 /* Enable 12.3 MHz clock for 48Khz and 32khz sample rate */
+#define ASIC2_CLOCK_AUDIO_3 0x04 /* Enable 5.6 MHz clock for 11 kHZ sample rate */
+#define ASIC2_CLOCK_AUDIO_4 0x08 /* Enable 11.289 MHz clock for 44 and 22 kHz sample rate */
+#define ASIC2_CLOCK_AUDIO_MASK 0x0f /* Bottom four bits are for audio */
+#define ASIC2_CLOCK_ADC ( 1 << 4 ) /* 1.024 MHz clock to ADC (CX4) */
+#define ASIC2_CLOCK_SPI ( 1 << 5 ) /* 4.096 MHz clock to SPI (CX5) */
+#define ASIC2_CLOCK_OWM ( 1 << 6 ) /* 4.096 MHz clock to OWM (CX6) */
+#define ASIC2_CLOCK_PWM ( 1 << 7 ) /* 2.048 MHz clock to PWM (CX7) */
+#define ASIC2_CLOCK_UART_1 ( 1 << 8 ) /* 24.576 MHz clock to UART1 (turn off bit 16) (CX8) */
+#define ASIC2_CLOCK_UART_0 ( 1 << 9 ) /* 24.576 MHz clock to UART0 (turn off bit 17) (CX9) */
+#define ASIC2_CLOCK_SD_1 ( 1 << 10 ) /* 16.934 MHz to SD */
+#define ASIC2_CLOCK_SD_2 ( 2 << 10 ) /* 24.576 MHz to SD */
+#define ASIC2_CLOCK_SD_3 ( 3 << 10 ) /* 33.869 MHz to SD */
+#define ASIC2_CLOCK_SD_4 ( 4 << 10 ) /* 49.152 MHz to SD */
+#define ASIC2_CLOCK_SD_MASK 0x1c00 /* Bits 10 through 12 are for SD */
+#define ASIC2_CLOCK_EX0 ( 1 << 13 ) /* Enable 32.768 kHz (LED,Timer,Interrupt) */
+#define ASIC2_CLOCK_EX1 ( 1 << 14 ) /* Enable 24.576 MHz (ADC,PCM,SPI,PWM,UART,SD,Audio) */
+#define ASIC2_CLOCK_EX2 ( 1 << 15 ) /* Enable 33.869 MHz (SD,Audio) */
+#define ASIC2_CLOCK_SLOW_UART_1 ( 1 << 16 ) /* Enable 3.686 MHz to UART1 (turn off bit 8) */
+#define ASIC2_CLOCK_SLOW_UART_0 ( 1 << 17 ) /* Enable 3.686 MHz to UART0 (turn off bit 9) */
+
+#define _H3800_ASIC2_ADC_Base 0x1200
+#define _H3800_ASIC2_ADC_Multiplexer 0x0000 /* R/W 4 bits - low 3 bits set channel */
+#define _H3800_ASIC2_ADC_ControlStatus 0x0004 /* R/W 8 bits */
+#define _H3800_ASIC2_ADC_Data 0x0008 /* R 10 bits */
+
+#define H3800_ASIC2_ADMUX H3800_ASIC2_OFFSET( u32, ADC, Multiplexer )
+#define H3800_ASIC2_ADCSR H3800_ASIC2_OFFSET( u8, ADC, ControlStatus )
+#define H3800_ASIC2_ADCDR H3800_ASIC2_OFFSET( u16, ADC, Data )
+
+#define ASIC2_ADMUX(x) ((x)&0x07) /* Low 3 bits sets channel. max = 4 */
+#define ASIC2_ADMUX_MASK 0x07
+#define ASIC2_ADMUX_0_LIGHTSENSOR ASIC2_ADMUX(0)
+#define ASIC2_ADMUX_1_IMIN ASIC2_ADMUX(1)
+#define ASIC2_ADMUX_2_VS_MBAT ASIC2_ADMUX(2)
+#define ASIC2_ADMUX_3_TP_X0 ASIC2_ADMUX(3) /* Touchpanel X0 */
+#define ASIC2_ADMUX_4_TP_Y1 ASIC2_ADMUX(4) /* Touchpanel Y1 */
+#define ASIC2_ADMUX_CLKEN ( 1 << 3 ) /* Enable clock */
+
+#define ASIC2_ADCSR_ADPS(x) ((x)&0x0f) /* Low 4 bits sets prescale, max = 8 */
+#define ASIC2_ADCSR_FREE_RUN ( 1 << 4 )
+#define ASIC2_ADCSR_INT_ENABLE ( 1 << 5 )
+#define ASIC2_ADCSR_START ( 1 << 6 ) /* Set to start conversion. Goes to 0 when done */
+#define ASIC2_ADCSR_ENABLE ( 1 << 7 ) /* 1:power up ADC, 0:power down */
+
+
+#define _H3800_ASIC2_INTR_Base 0x1600
+#define _H3800_ASIC2_INTR_MaskAndFlag 0x0000 /* R/(W) 8bits */
+#define _H3800_ASIC2_INTR_ClockPrescale 0x0004 /* R/(W) 5bits */
+#define _H3800_ASIC2_INTR_TimerSet 0x0008 /* R/(W) 8bits */
+
+#define H3800_ASIC2_INTR_MaskAndFlag H3800_ASIC2_OFFSET( u8, INTR, MaskAndFlag )
+#define H3800_ASIC2_INTR_ClockPrescale H3800_ASIC2_OFFSET( u8, INTR, ClockPrescale )
+#define H3800_ASIC2_INTR_TimerSet H3800_ASIC2_OFFSET( u16, INTR, TimerSet )
+
+#define ASIC2_INTMASK_GLOBAL ( 1 << 0 ) /* Global interrupt mask */
+//#define ASIC2_INTR_POWER_ON_RESET ( 1 << 1 ) /* 01: Power on reset (bits 1 & 2 ) */
+//#define ASIC2_INTR_EXTERNAL_RESET ( 2 << 1 ) /* 10: External reset (bits 1 & 2 ) */
+#define ASIC2_INTMASK_UART_0 ( 1 << 4 )
+#define ASIC2_INTMASK_UART_1 ( 1 << 5 )
+#define ASIC2_INTMASK_TIMER ( 1 << 6 )
+#define ASIC2_INTMASK_OWM ( 1 << 7 )
+
+#define ASIC2_INTCPS_CPS(x) ((x)&0x0f) /* 4 bits, max 14 */
+#define ASIC2_INTCPS_SET ( 1 << 4 ) /* Time base enable */
+
+#define _H3800_ASIC2_OWM_Base 0x1800
+#define _H3800_ASIC2_OWM_Command 0x0000 /* R/W 4 bits command register */
+#define _H3800_ASIC2_OWM_Data 0x0004 /* R/W 8 bits, transmit / receive buffer */
+#define _H3800_ASIC2_OWM_Interrupt 0x0008 /* R/W Command register */
+#define _H3800_ASIC2_OWM_InterruptEnable 0x000c /* R/W Command register */
+#define _H3800_ASIC2_OWM_ClockDivisor 0x0010 /* R/W 5 bits of divisor and pre-scale */
+
+#define H3800_ASIC2_OWM_Command H3800_ASIC2_OFFSET( u8, OWM, Command )
+#define H3800_ASIC2_OWM_Data H3800_ASIC2_OFFSET( u8, OWM, Data )
+#define H3800_ASIC2_OWM_Interrupt H3800_ASIC2_OFFSET( u8, OWM, Interrupt )
+#define H3800_ASIC2_OWM_InterruptEnable H3800_ASIC2_OFFSET( u8, OWM, InterruptEnable )
+#define H3800_ASIC2_OWM_ClockDivisor H3800_ASIC2_OFFSET( u8, OWM, ClockDivisor )
+
+#define OWM_CMD_ONE_WIRE_RESET ( 1 << 0 ) /* Set to force reset on 1-wire bus */
+#define OWM_CMD_SRA ( 1 << 1 ) /* Set to switch to Search ROM accelerator mode */
+#define OWM_CMD_DQ_OUTPUT ( 1 << 2 ) /* Write only - forces bus low */
+#define OWM_CMD_DQ_INPUT ( 1 << 3 ) /* Read only - reflects state of bus */
+
+#define OWM_INT_PD ( 1 << 0 ) /* Presence detect */
+#define OWM_INT_PDR ( 1 << 1 ) /* Presence detect result */
+#define OWM_INT_TBE ( 1 << 2 ) /* Transmit buffer empty */
+#define OWM_INT_TEMT ( 1 << 3 ) /* Transmit shift register empty */
+#define OWM_INT_RBF ( 1 << 4 ) /* Receive buffer full */
+
+#define OWM_INTEN_EPD ( 1 << 0 ) /* Enable presence detect interrupt */
+#define OWM_INTEN_IAS ( 1 << 1 ) /* INTR active state */
+#define OWM_INTEN_ETBE ( 1 << 2 ) /* Enable transmit buffer empty interrupt */
+#define OWM_INTEN_ETMT ( 1 << 3 ) /* Enable transmit shift register empty interrupt */
+#define OWM_INTEN_ERBF ( 1 << 4 ) /* Enable receive buffer full interrupt */
+
+#define _H3800_ASIC2_FlashCtl_Base 0x1A00
+
+/****************************************************/
+/* H3800, ASIC #1
+ * This ASIC is accesed through ASIC #2, and
+ * mapped into the 1c00 - 1f00 region
+ */
+
+#define H3800_ASIC1_OFFSET(s,x,y) \
+ (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC1_ ## x ## _Base + (_H3800_ASIC1_ ## x ## _ ## y))))
+
+#define _H3800_ASIC1_MMC_Base 0x1c00
+
+#define _H3800_ASIC1_MMC_StartStopClock 0x00 /* R/W 8bit */
+#define _H3800_ASIC1_MMC_Status 0x04 /* R See below, default 0x0040 */
+#define _H3800_ASIC1_MMC_ClockRate 0x08 /* R/W 8bit, low 3 bits are clock divisor */
+#define _H3800_ASIC1_MMC_SPIRegister 0x10 /* R/W 8bit, see below */
+#define _H3800_ASIC1_MMC_CmdDataCont 0x14 /* R/W 8bit, write to start MMC adapter */
+#define _H3800_ASIC1_MMC_ResponseTimeout 0x18 /* R/W 8bit, clocks before response timeout */
+#define _H3800_ASIC1_MMC_ReadTimeout 0x1c /* R/W 16bit, clocks before received data timeout */
+#define _H3800_ASIC1_MMC_BlockLength 0x20 /* R/W 10bit */
+#define _H3800_ASIC1_MMC_NumOfBlocks 0x24 /* R/W 16bit, in block mode, number of blocks */
+#define _H3800_ASIC1_MMC_InterruptMask 0x34 /* R/W 8bit */
+#define _H3800_ASIC1_MMC_CommandNumber 0x38 /* R/W 6 bits */
+#define _H3800_ASIC1_MMC_ArgumentH 0x3c /* R/W 16 bits */
+#define _H3800_ASIC1_MMC_ArgumentL 0x40 /* R/W 16 bits */
+#define _H3800_ASIC1_MMC_ResFifo 0x44 /* R 8 x 16 bits - contains response FIFO */
+#define _H3800_ASIC1_MMC_BufferPartFull 0x50 /* R/W 8 bits */
+
+#define H3800_ASIC1_MMC_StartStopClock H3800_ASIC1_OFFSET( u8, MMC, StartStopClock )
+#define H3800_ASIC1_MMC_Status H3800_ASIC1_OFFSET( u16, MMC, Status )
+#define H3800_ASIC1_MMC_ClockRate H3800_ASIC1_OFFSET( u8, MMC, ClockRate )
+#define H3800_ASIC1_MMC_SPIRegister H3800_ASIC1_OFFSET( u8, MMC, SPIRegister )
+#define H3800_ASIC1_MMC_CmdDataCont H3800_ASIC1_OFFSET( u8, MMC, CmdDataCont )
+#define H3800_ASIC1_MMC_ResponseTimeout H3800_ASIC1_OFFSET( u8, MMC, ResponseTimeout )
+#define H3800_ASIC1_MMC_ReadTimeout H3800_ASIC1_OFFSET( u16, MMC, ReadTimeout )
+#define H3800_ASIC1_MMC_BlockLength H3800_ASIC1_OFFSET( u16, MMC, BlockLength )
+#define H3800_ASIC1_MMC_NumOfBlocks H3800_ASIC1_OFFSET( u16, MMC, NumOfBlocks )
+#define H3800_ASIC1_MMC_InterruptMask H3800_ASIC1_OFFSET( u8, MMC, InterruptMask )
+#define H3800_ASIC1_MMC_CommandNumber H3800_ASIC1_OFFSET( u8, MMC, CommandNumber )
+#define H3800_ASIC1_MMC_ArgumentH H3800_ASIC1_OFFSET( u16, MMC, ArgumentH )
+#define H3800_ASIC1_MMC_ArgumentL H3800_ASIC1_OFFSET( u16, MMC, ArgumentL )
+#define H3800_ASIC1_MMC_ResFifo H3800_ASIC1_OFFSET( u16, MMC, ResFifo )
+#define H3800_ASIC1_MMC_BufferPartFull H3800_ASIC1_OFFSET( u8, MMC, BufferPartFull )
+
+#define H3800_ASIC1_MMC_STOP_CLOCK (1 << 0) /* Write to "StartStopClock" register */
+#define H3800_ASIC1_MMC_START_CLOCK (1 << 1)
+
+#define H3800_ASIC1_MMC_STATUS_READ_TIMEOUT (1 << 0)
+#define H3800_ASIC1_MMC_STATUS_RESPONSE_TIMEOUT (1 << 1)
+#define H3800_ASIC1_MMC_STATUS_CRC_WRITE_ERROR (1 << 2)
+#define H3800_ASIC1_MMC_STATUS_CRC_READ_ERROR (1 << 3)
+#define H3800_ASIC1_MMC_STATUS_SPI_READ_ERROR (1 << 4) /* SPI data token error received */
+#define H3800_ASIC1_MMC_STATUS_CRC_RESPONSE_ERROR (1 << 5)
+#define H3800_ASIC1_MMC_STATUS_FIFO_EMPTY (1 << 6)
+#define H3800_ASIC1_MMC_STATUS_FIFO_FULL (1 << 7)
+#define H3800_ASIC1_MMC_STATUS_CLOCK_ENABLE (1 << 8) /* MultiMediaCard clock stopped */
+#define H3800_ASIC1_MMC_STATUS_DATA_TRANSFER_DONE (1 << 11) /* Write operation, indicates transfer finished */
+#define H3800_ASIC1_MMC_STATUS_END_PROGRAM (1 << 12) /* End write and read operations */
+#define H3800_ASIC1_MMC_STATUS_END_COMMAND_RESPONSE (1 << 13) /* End command response */
+
+#define H3800_ASIC1_MMC_SPI_REG_SPI_ENABLE (1 << 0) /* Enables SPI mode */
+#define H3800_ASIC1_MMC_SPI_REG_CRC_ON (1 << 1) /* 1:turn on CRC */
+#define H3800_ASIC1_MMC_SPI_REG_SPI_CS_ENABLE (1 << 2) /* 1:turn on SPI CS */
+#define H3800_ASIC1_MMC_SPI_REG_CS_ADDRESS_MASK 0x38 /* Bits 3,4,5 are the SPI CS relative address */
+
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_NO_RESPONSE 0x00
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R1 0x01
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R2 0x02
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R3 0x03
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_DATA_ENABLE (1 << 2) /* This command contains a data transfer */
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_WRITE (1 << 3) /* This data transfer is a write */
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_STREAM_MODE (1 << 4) /* This data transfer is in stream mode */
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_BUSY_BIT (1 << 5) /* Busy signal expected after current cmd */
+#define H3800_ASIC1_MMC_CMD_DATA_CONT_INITIALIZE (1 << 6) /* Enables the 80 bits for initializing card */
+
+#define H3800_ASIC1_MMC_INT_MASK_DATA_TRANSFER_DONE (1 << 0)
+#define H3800_ASIC1_MMC_INT_MASK_PROGRAM_DONE (1 << 1)
+#define H3800_ASIC1_MMC_INT_MASK_END_COMMAND_RESPONSE (1 << 2)
+#define H3800_ASIC1_MMC_INT_MASK_BUFFER_READY (1 << 3)
+
+#define H3800_ASIC1_MMC_BUFFER_PART_FULL (1 << 0)
+
+/********* GPIO **********/
+
+#define _H3800_ASIC1_GPIO_Base 0x1e00
+
+#define _H3800_ASIC1_GPIO_Mask 0x60 /* R/W 0:don't mask, 1:mask interrupt */
+#define _H3800_ASIC1_GPIO_Direction 0x64 /* R/W 0:input, 1:output */
+#define _H3800_ASIC1_GPIO_Out 0x68 /* R/W 0:output low, 1:output high */
+#define _H3800_ASIC1_GPIO_TriggerType 0x6c /* R/W 0:level, 1:edge */
+#define _H3800_ASIC1_GPIO_EdgeTrigger 0x70 /* R/W 0:falling, 1:rising */
+#define _H3800_ASIC1_GPIO_LevelTrigger 0x74 /* R/W 0:low, 1:high level detect */
+#define _H3800_ASIC1_GPIO_LevelStatus 0x78 /* R/W 0:none, 1:detect */
+#define _H3800_ASIC1_GPIO_EdgeStatus 0x7c /* R/W 0:none, 1:detect */
+#define _H3800_ASIC1_GPIO_State 0x80 /* R See masks below (default 0) */
+#define _H3800_ASIC1_GPIO_Reset 0x84 /* R/W See masks below (default 0x04) */
+#define _H3800_ASIC1_GPIO_SleepMask 0x88 /* R/W 0:don't mask, 1:mask trigger in sleep mode */
+#define _H3800_ASIC1_GPIO_SleepDir 0x8c /* R/W direction 0:input, 1:ouput in sleep mode */
+#define _H3800_ASIC1_GPIO_SleepOut 0x90 /* R/W level 0:low, 1:high in sleep mode */
+#define _H3800_ASIC1_GPIO_Status 0x94 /* R Pin status */
+#define _H3800_ASIC1_GPIO_BattFaultDir 0x98 /* R/W direction 0:input, 1:output in batt_fault */
+#define _H3800_ASIC1_GPIO_BattFaultOut 0x9c /* R/W level 0:low, 1:high in batt_fault */
+
+#define H3800_ASIC1_GPIO_MASK H3800_ASIC1_OFFSET( u16, GPIO, Mask )
+#define H3800_ASIC1_GPIO_DIR H3800_ASIC1_OFFSET( u16, GPIO, Direction )
+#define H3800_ASIC1_GPIO_OUT H3800_ASIC1_OFFSET( u16, GPIO, Out )
+#define H3800_ASIC1_GPIO_LEVELTRI H3800_ASIC1_OFFSET( u16, GPIO, TriggerType )
+#define H3800_ASIC1_GPIO_RISING H3800_ASIC1_OFFSET( u16, GPIO, EdgeTrigger )
+#define H3800_ASIC1_GPIO_LEVEL H3800_ASIC1_OFFSET( u16, GPIO, LevelTrigger )
+#define H3800_ASIC1_GPIO_LEVEL_STATUS H3800_ASIC1_OFFSET( u16, GPIO, LevelStatus )
+#define H3800_ASIC1_GPIO_EDGE_STATUS H3800_ASIC1_OFFSET( u16, GPIO, EdgeStatus )
+#define H3800_ASIC1_GPIO_STATE H3800_ASIC1_OFFSET( u8, GPIO, State )
+#define H3800_ASIC1_GPIO_RESET H3800_ASIC1_OFFSET( u8, GPIO, Reset )
+#define H3800_ASIC1_GPIO_SLEEP_MASK H3800_ASIC1_OFFSET( u16, GPIO, SleepMask )
+#define H3800_ASIC1_GPIO_SLEEP_DIR H3800_ASIC1_OFFSET( u16, GPIO, SleepDir )
+#define H3800_ASIC1_GPIO_SLEEP_OUT H3800_ASIC1_OFFSET( u16, GPIO, SleepOut )
+#define H3800_ASIC1_GPIO_STATUS H3800_ASIC1_OFFSET( u16, GPIO, Status )
+#define H3800_ASIC1_GPIO_BATT_FAULT_DIR H3800_ASIC1_OFFSET( u16, GPIO, BattFaultDir )
+#define H3800_ASIC1_GPIO_BATT_FAULT_OUT H3800_ASIC1_OFFSET( u16, GPIO, BattFaultOut )
+
+#define H3800_ASIC1_GPIO_STATE_MASK (1 << 0)
+#define H3800_ASIC1_GPIO_STATE_DIRECTION (1 << 1)
+#define H3800_ASIC1_GPIO_STATE_OUT (1 << 2)
+#define H3800_ASIC1_GPIO_STATE_TRIGGER_TYPE (1 << 3)
+#define H3800_ASIC1_GPIO_STATE_EDGE_TRIGGER (1 << 4)
+#define H3800_ASIC1_GPIO_STATE_LEVEL_TRIGGER (1 << 5)
+
+#define H3800_ASIC1_GPIO_RESET_SOFTWARE (1 << 0)
+#define H3800_ASIC1_GPIO_RESET_AUTO_SLEEP (1 << 1)
+#define H3800_ASIC1_GPIO_RESET_FIRST_PWR_ON (1 << 2)
+
+/* These are all outputs */
+#define GPIO1_IR_ON_N (1 << 0) /* Apply power to the IR Module */
+#define GPIO1_SD_PWR_ON (1 << 1) /* Secure Digital power on */
+#define GPIO1_RS232_ON (1 << 2) /* Turn on power to the RS232 chip ? */
+#define GPIO1_PULSE_GEN (1 << 3) /* Goes to speaker / earphone */
+#define GPIO1_CH_TIMER (1 << 4) /* Charger */
+#define GPIO1_LCD_5V_ON (1 << 5) /* Enables LCD_5V */
+#define GPIO1_LCD_ON (1 << 6) /* Enables LCD_3V */
+#define GPIO1_LCD_PCI (1 << 7) /* Connects to PDWN on LCD controller */
+#define GPIO1_VGH_ON (1 << 8) /* Drives VGH on the LCD (+9??) */
+#define GPIO1_VGL_ON (1 << 9) /* Drivers VGL on the LCD (-6??) */
+#define GPIO1_FL_PWR_ON (1 << 10) /* Frontlight power on */
+#define GPIO1_BT_PWR_ON (1 << 11) /* Bluetooth power on */
+#define GPIO1_SPK_ON (1 << 12) /* Built-in speaker on */
+#define GPIO1_EAR_ON_N (1 << 13) /* Headphone jack on */
+#define GPIO1_AUD_PWR_ON (1 << 14) /* All audio power */
+
+/* Write enable for the flash */
+
+#define _H3800_ASIC2_FlashWP_Base 0x1f00
+#define _H3800_ASIC2_FlashWP_VPP_ON 0x00 /* R 1: write, 0: protect */
+#define H3800_ASIC2_FlashWP_VPP_ON H3800_ASIC2_OFFSET( u8, FlashWP, VPP_ON )
+
+/****************************************************/
+/* H3900, ASIC #3, replaces ASIC #1
+ * This ASIC is at CS5# + 0x00000000
+ */
+#ifdef CONFIG_MACH_H3900
+
+#define H3900_ASIC3_OFFSET(s,x,y) \
+ (*((volatile s *) (H3900_ASIC3_VIRT + _H3900_ASIC3_ ## x ## _Base + (_H3900_ASIC3_ ## x ## _ ## y))))
+
+#define _H3900_ASIC3_GPIO_A_Base 0x0000
+#define _H3900_ASIC3_GPIO_B_Base 0x0100
+
+#define _H3900_ASIC3_GPIO_B_Mask 0x00 /* R/W 0:don't mask, 1:mask interrupt */
+#define _H3900_ASIC3_GPIO_B_Direction 0x04 /* R/W 0:input, 1:output */
+#define _H3900_ASIC3_GPIO_B_Out 0x08 /* R/W 0:output low, 1:output high */
+#define _H3900_ASIC3_GPIO_B_TriggerType 0x0c /* R/W 0:level, 1:edge */
+#define _H3900_ASIC3_GPIO_B_EdgeTrigger 0x10 /* R/W 0:falling, 1:rising */
+#define _H3900_ASIC3_GPIO_B_LevelTrigger 0x14 /* R/W 0:low, 1:high level detect */
+#define _H3900_ASIC3_GPIO_B_SleepMask 0x18 /* R/W 0:don't mask, 1:mask trigger in sleep mode */
+#define _H3900_ASIC3_GPIO_B_SleepOut 0x1c /* R/W level 0:low, 1:high in sleep mode */
+#define _H3900_ASIC3_GPIO_B_BattFaultOut 0x20 /* R/W level 0:low, 1:high in batt_fault */
+#define _H3900_ASIC3_GPIO_B_IntStatus 0x24 /* R/W 0:none, 1:detect */
+/* no 0x28 */
+#define _H3900_ASIC3_GPIO_B_SleepConf 0x2c /* R/W bit 1: autosleep 0: disable gposlpout in normal mode, enable gposlpout in sleep mode */
+#define _H3900_ASIC3_GPIO_B_Status 0x30 /* R Pin status */
+
+#define H3900_ASIC3_GPIO_B_MASK H3900_ASIC3_OFFSET( u16, GPIO_B, Mask )
+#define H3900_ASIC3_GPIO_B_DIR H3900_ASIC3_OFFSET( u16, GPIO_B, Direction )
+#define H3900_ASIC3_GPIO_B_OUT H3900_ASIC3_OFFSET( u16, GPIO_B, Out )
+#define H3900_ASIC3_GPIO_B_LEVELTRI H3900_ASIC3_OFFSET( u16, GPIO_B, TriggerType )
+#define H3900_ASIC3_GPIO_B_RISING H3900_ASIC3_OFFSET( u16, GPIO_B, EdgeTrigger )
+#define H3900_ASIC3_GPIO_B_LEVEL H3900_ASIC3_OFFSET( u16, GPIO_B, LevelTrigger )
+#define H3900_ASIC3_GPIO_B_SLEEP_MASK H3900_ASIC3_OFFSET( u16, GPIO_B, SleepMask )
+#define H3900_ASIC3_GPIO_B_SLEEP_OUT H3900_ASIC3_OFFSET( u16, GPIO_B, SleepOut )
+#define H3900_ASIC3_GPIO_B_BATT_FAULT_OUT H3900_ASIC3_OFFSET( u16, GPIO_B, BattFaultOut )
+#define H3900_ASIC3_GPIO_B_INT_STATUS H3900_ASIC3_OFFSET( u16, GPIO_B, IntStatus )
+#define H3900_ASIC3_GPIO_B_SLEEP_CONF H3900_ASIC3_OFFSET( u16, GPIO_B, SleepConf )
+#define H3900_ASIC3_GPIO_B_STATUS H3900_ASIC3_OFFSET( u16, GPIO_B, Status )
+
+/* these gpio's are on GPIO_B */
+
+#define GPIO3_IR_ON_N (1 << 0) /* Apply power to the IR Module */
+#define GPIO3_LCD_9V_ON (1 << 1)
+#define GPIO3_RS232_ON (1 << 2) /* Turn on power to the RS232 chip ? */
+#define GPIO3_LCD_NV_ON (1 << 3)
+#define GPIO3_CH_TIMER (1 << 4) /* Charger */
+#define GPIO3_LCD_5V_ON (1 << 5) /* Enables LCD_5V */
+#define GPIO3_LCD_ON (1 << 6) /* Enables LCD_3V */
+#define GPIO3_LCD_PCI (1 << 7) /* Connects to PDWN on LCD controller */
+// 8 is not connected
+#define GPIO3_CIR_CTL_PWR_ON (1 << 9)
+#define GPIO3_AUD_RESET (1 << 10)
+#define GPIO3_BT_PWR_ON (1 << 11) /* Bluetooth power on */
+#define GPIO3_SPK_ON (1 << 12) /* Built-in speaker on */
+#define GPIO3_FL_PWR_ON (1 << 13) /* Frontlight power on */
+#define GPIO3_AUD_PWR_ON (1 << 14) /* All audio power */
+
+#define _H3900_ASIC3_GPIO_B_Base 0x0100
+#define _H3900_ASIC3_GPIO_C_Base 0x0200
+#define _H3900_ASIC3_GPIO_D_Base 0x0300
+#define _H3900_ASIC3_CLOCK_Base 0x0A00
+#define _H3900_ASIC3_INTR_Base 0x0B00
+#define _H3900_ASIC3_SDHWCTRL_Base 0x0E00
+#define _H3900_ASIC3_HWPROTECT_Base 0x1000
+#define _H3900_ASIC3_EXTCF_Base 0x1100
+
+#define ASIC3GPIO_INIT_DIR 0xFFFF // initial status, sleep direction
+#define ASIC3GPIO_INIT_OUT 0x8200 // Strain 2001.12.15
+#define ASIC3GPIO_BATFALT_OUT 0x8000
+#define ASIC3GPIO_SLEEP_OUT 0x8000
+#define ASIC3CLOCK_INIT 0x0
+
+#endif
+
+#endif /* _INCLUDE_H3600_GPIO_H_ */
--- /dev/null
+#define EGPIO_IPAQ_VPEN (1 << 0) /* enables erasing and programming flash. active high. */
+#define EGPIO_IPAQ_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */
+#define EGPIO_IPAQ_OPT_RESET (1 << 2) /* reset the attached option pack. active high. */
+#define EGPIO_IPAQ_CODEC_nRESET (1 << 3) /* reset the onboard UDA1341. active low. */
+#define EGPIO_IPAQ_OPT_NVRAM_ON (1 << 4) /* apply power to optionpack nvram, active high. */
+#define EGPIO_IPAQ_OPT_ON (1 << 5) /* full power to option pack. active high. */
+#define EGPIO_IPAQ_LCD_ON (1 << 6) /* enable 3.3V to LCD. active high. */
+#define EGPIO_IPAQ_RS232_ON (1 << 7) /* UART3 transceiver force on. Active high. */
+#define EGPIO_IPAQ_LCD_PCI (1 << 8) /* LCD control IC enable. active high. */
+#define EGPIO_IPAQ_IR_ON (1 << 9) /* apply power to IR module. active high. */
+#define EGPIO_IPAQ_AUD_AMP_ON (1 << 10) /* apply power to audio power amp. active high. */
+#define EGPIO_IPAQ_AUD_PWR_ON (1 << 11) /* apply poewr to reset of audio circuit. active high. */
+#define EGPIO_IPAQ_QMUTE (1 << 12) /* mute control for onboard UDA1341. active high. */
+#define EGPIO_IPAQ_IR_FSEL (1 << 13) /* IR speed select: 1->fast, 0->slow */
+#define EGPIO_IPAQ_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */
+#define EGPIO_IPAQ_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */
+
--- /dev/null
+#ifndef _SA1100_LCD_H_
+#define _SA1100_LCD_H_
+
+/*
+ * ganked from:
+ * FILE SA-1100.h
+ *
+ * Version 1.2
+ * Author Copyright (c) Marc A. Viredaz, 1998
+ * DEC Western Research Laboratory, Palo Alto, CA
+ * Date January 1998 (April 1997)
+ * System StrongARM SA-1100
+ * Language C or ARM Assembly
+ * Purpose Definition of constants related to the StrongARM
+ * SA-1100 microprocessor (Advanced RISC Machine (ARM)
+ * architecture version 4). This file is based on the
+ * StrongARM SA-1100 data sheet version 2.2.
+ *
+ * Language-specific definitions are selected by the
+ * macro "LANGUAGE", which should be defined as either
+ * "C" (default) or "Assembly".
+ *
+ * and hacked by davep@crl.dec.com
+ */
+
+#define Fld(Size, Shft) (((Size) << 16) + (Shft))
+#define FSize(Field) ((Field) >> 16)
+#define FShft(Field) ((Field) & 0x0000FFFF)
+#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field))
+#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1)
+#define F1stBit(Field) (UData (1) << FShft (Field))
+
+#define LCD_MAX_BPP (16) /* that we allow in this simple situation */
+#define LCD_BPP (16)
+#define LCD_MONO_BPP (4)
+#define LCD_XRES (320)
+#define LCD_YRES (240)
+
+#define MAX_PALETTE_COLORS() (1<<12)
+#define NUM_PALETTE_ENTRIES(bpp) ((bpp)==8?256:16)
+#define PALETTE_MEM_SIZE(bpp) (NUM_PALETTE_ENTRIES(bpp)<<1)
+#define PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9)
+
+#define LCD_PALETTE_SIZExx (512)
+#define LCD_NUM_PIXELS() (LCD_XRES * LCD_YRES)
+#define LCD_NUM_DISPLAY_BYTES(bpp) ((LCD_NUM_PIXELS() * (bpp) + 7)/8)
+
+#define LCD_FB_SIZE(bpp) ((LCD_NUM_DISPLAY_BYTES(bpp) + \
+ PALETTE_MEM_SIZE(bpp) + 3) & ~3)
+
+#define LCD_FB_MAX() LCD_FB_SIZE(LCD_MAX_BPP)
+#define LCD_FB_IMAGE_OFFSET(bpp) PALETTE_MEM_SIZE(bpp)
+#define LCD_FB_IMAGE(p, bpp) (((char*)(p)) + LCD_FB_IMAGE_OFFSET(bpp))
+
+#define io_p2v(a) a
+typedef unsigned long u_long;
+typedef unsigned long Word;
+typedef unsigned long Address;
+
+/*
+ * Liquid Crystal Display (LCD) control registers
+ *
+ * Registers
+ * LCCR0 Liquid Crystal Display (LCD) Control Register 0
+ * (read/write).
+ * [Bits LDM, BAM, and ERM are only implemented in
+ * versions 2.0 (rev. = 8) and higher of the StrongARM
+ * SA-1100.]
+ * LCSR Liquid Crystal Display (LCD) Status Register
+ * (read/write).
+ * [Bit LDD can be only read in versions 1.0 (rev. = 1)
+ * and 1.1 (rev. = 2) of the StrongARM SA-1100, it can be
+ * read and written (cleared) in versions 2.0 (rev. = 8)
+ * and higher.]
+ * DBAR1 Liquid Crystal Display (LCD) Direct Memory Access
+ * (DMA) Base Address Register channel 1 (read/write).
+ * DCAR1 Liquid Crystal Display (LCD) Direct Memory Access
+ * (DMA) Current Address Register channel 1 (read).
+ * DBAR2 Liquid Crystal Display (LCD) Direct Memory Access
+ * (DMA) Base Address Register channel 2 (read/write).
+ * DCAR2 Liquid Crystal Display (LCD) Direct Memory Access
+ * (DMA) Current Address Register channel 2 (read).
+ * LCCR1 Liquid Crystal Display (LCD) Control Register 1
+ * (read/write).
+ * [The LCCR1 register can be only written in
+ * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the
+ * StrongARM SA-1100, it can be written and read in
+ * versions 2.0 (rev. = 8) and higher.]
+ * LCCR2 Liquid Crystal Display (LCD) Control Register 2
+ * (read/write).
+ * [The LCCR1 register can be only written in
+ * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the
+ * StrongARM SA-1100, it can be written and read in
+ * versions 2.0 (rev. = 8) and higher.]
+ * LCCR3 Liquid Crystal Display (LCD) Control Register 3
+ * (read/write).
+ * [The LCCR1 register can be only written in
+ * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the
+ * StrongARM SA-1100, it can be written and read in
+ * versions 2.0 (rev. = 8) and higher. Bit PCP is only
+ * implemented in versions 2.0 (rev. = 8) and higher of
+ * the StrongARM SA-1100.]
+ *
+ * Clocks
+ * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK).
+ * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2).
+ * fpix, Tpix Frequency, period of the pixel clock.
+ * fln, Tln Frequency, period of the line clock.
+ * fac, Tac Frequency, period of the AC bias clock.
+ */
+
+#define LCD_PEntrySp 2 /* LCD Palette Entry Space [byte] */
+#define LCD_4BitPSp /* LCD 4-Bit pixel Palette Space */ \
+ /* [byte] */ \
+ (16*LCD_PEntrySp)
+#define LCD_8BitPSp /* LCD 8-Bit pixel Palette Space */ \
+ /* [byte] */ \
+ (256*LCD_PEntrySp)
+#define LCD_12_16BitPSp /* LCD 12/16-Bit pixel */ \
+ /* dummy-Palette Space [byte] */ \
+ (16*LCD_PEntrySp)
+
+#define LCD_PGrey Fld (4, 0) /* LCD Palette entry Grey value */
+#define LCD_PBlue Fld (4, 0) /* LCD Palette entry Blue value */
+#define LCD_PGreen Fld (4, 4) /* LCD Palette entry Green value */
+#define LCD_PRed Fld (4, 8) /* LCD Palette entry Red value */
+#define LCD_PBS Fld (2, 12) /* LCD Pixel Bit Size */
+#define LCD_4Bit /* LCD 4-Bit pixel mode */ \
+ (0 << FShft (LCD_PBS))
+#define LCD_8Bit /* LCD 8-Bit pixel mode */ \
+ (1 << FShft (LCD_PBS))
+#define LCD_12_16Bit /* LCD 12/16-Bit pixel mode */ \
+ (2 << FShft (LCD_PBS))
+
+#define LCD_Int0_0 0x0 /* LCD Intensity = 0.0% = 0 */
+#define LCD_Int11_1 0x1 /* LCD Intensity = 11.1% = 1/9 */
+#define LCD_Int20_0 0x2 /* LCD Intensity = 20.0% = 1/5 */
+#define LCD_Int26_7 0x3 /* LCD Intensity = 26.7% = 4/15 */
+#define LCD_Int33_3 0x4 /* LCD Intensity = 33.3% = 3/9 */
+#define LCD_Int40_0 0x5 /* LCD Intensity = 40.0% = 2/5 */
+#define LCD_Int44_4 0x6 /* LCD Intensity = 44.4% = 4/9 */
+#define LCD_Int50_0 0x7 /* LCD Intensity = 50.0% = 1/2 */
+#define LCD_Int55_6 0x8 /* LCD Intensity = 55.6% = 5/9 */
+#define LCD_Int60_0 0x9 /* LCD Intensity = 60.0% = 3/5 */
+#define LCD_Int66_7 0xA /* LCD Intensity = 66.7% = 6/9 */
+#define LCD_Int73_3 0xB /* LCD Intensity = 73.3% = 11/15 */
+#define LCD_Int80_0 0xC /* LCD Intensity = 80.0% = 4/5 */
+#define LCD_Int88_9 0xD /* LCD Intensity = 88.9% = 8/9 */
+#define LCD_Int100_0 0xE /* LCD Intensity = 100.0% = 1 */
+#define LCD_Int100_0A 0xF /* LCD Intensity = 100.0% = 1 */
+ /* (Alternative) */
+
+#define _LCCR0 0xB0100000 /* LCD Control Reg. 0 */
+#define _LCSR 0xB0100004 /* LCD Status Reg. */
+#define _DBAR1 0xB0100010 /* LCD DMA Base Address Reg. */
+ /* channel 1 */
+#define _DCAR1 0xB0100014 /* LCD DMA Current Address Reg. */
+ /* channel 1 */
+#define _DBAR2 0xB0100018 /* LCD DMA Base Address Reg. */
+ /* channel 2 */
+#define _DCAR2 0xB010001C /* LCD DMA Current Address Reg. */
+ /* channel 2 */
+#define _LCCR1 0xB0100020 /* LCD Control Reg. 1 */
+#define _LCCR2 0xB0100024 /* LCD Control Reg. 2 */
+#define _LCCR3 0xB0100028 /* LCD Control Reg. 3 */
+
+#if LANGUAGE == C
+#define LCCR0 /* LCD Control Reg. 0 */ \
+ (*((volatile Word *) io_p2v (_LCCR0)))
+#define LCSR /* LCD Status Reg. */ \
+ (*((volatile Word *) io_p2v (_LCSR)))
+#define DBAR1 /* LCD DMA Base Address Reg. */ \
+ /* channel 1 */ \
+ (*((volatile Address *) io_p2v (_DBAR1)))
+#define DCAR1 /* LCD DMA Current Address Reg. */ \
+ /* channel 1 */ \
+ (*((volatile Address *) io_p2v (_DCAR1)))
+#define DBAR2 /* LCD DMA Base Address Reg. */ \
+ /* channel 2 */ \
+ (*((volatile Address *) io_p2v (_DBAR2)))
+#define DCAR2 /* LCD DMA Current Address Reg. */ \
+ /* channel 2 */ \
+ (*((volatile Address *) io_p2v (_DCAR2)))
+#define LCCR1 /* LCD Control Reg. 1 */ \
+ (*((volatile Word *) io_p2v (_LCCR1)))
+#define LCCR2 /* LCD Control Reg. 2 */ \
+ (*((volatile Word *) io_p2v (_LCCR2)))
+#define LCCR3 /* LCD Control Reg. 3 */ \
+ (*((volatile Word *) io_p2v (_LCCR3)))
+#endif /* LANGUAGE == C */
+
+#define LCCR0_LEN 0x00000001 /* LCD ENable */
+#define LCCR0_CMS 0x00000002 /* Color/Monochrome display Select */
+#define LCCR0_Color (LCCR0_CMS*0) /* Color display */
+#define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */
+#define LCCR0_SDS 0x00000004 /* Single/Dual panel display */
+ /* Select */
+#define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */
+#define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */
+#define LCCR0_LDM 0x00000008 /* LCD Disable done (LDD) */
+ /* interrupt Mask (disable) */
+#define LCCR0_BAM 0x00000010 /* Base Address update (BAU) */
+ /* interrupt Mask (disable) */
+#define LCCR0_ERM 0x00000020 /* LCD ERror (BER, IOL, IUL, IOU, */
+ /* IUU, OOL, OUL, OOU, and OUU) */
+ /* interrupt Mask (disable) */
+#define LCCR0_PAS 0x00000080 /* Passive/Active display Select */
+#define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */
+#define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */
+#define LCCR0_BLE 0x00000100 /* Big/Little Endian select */
+#define LCCR0_LtlEnd (LCCR0_BLE*0) /* Little Endian frame buffer */
+#define LCCR0_BigEnd (LCCR0_BLE*1) /* Big Endian frame buffer */
+#define LCCR0_DPD 0x00000200 /* Double Pixel Data (monochrome */
+ /* display mode) */
+#define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome */
+ /* display */
+#define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome */
+ /* display */
+#define LCCR0_PDD Fld (8, 12) /* Palette DMA request Delay */
+ /* [Tmem] */
+#define LCCR0_DMADel(Tcpu) /* palette DMA request Delay */ \
+ /* [0..510 Tcpu] */ \
+ ((Tcpu)/2 << FShft (LCCR0_PDD))
+
+#define LCSR_LDD 0x00000001 /* LCD Disable Done */
+#define LCSR_BAU 0x00000002 /* Base Address Update (read) */
+#define LCSR_BER 0x00000004 /* Bus ERror */
+#define LCSR_ABC 0x00000008 /* AC Bias clock Count */
+#define LCSR_IOL 0x00000010 /* Input FIFO Over-run Lower */
+ /* panel */
+#define LCSR_IUL 0x00000020 /* Input FIFO Under-run Lower */
+ /* panel */
+#define LCSR_IOU 0x00000040 /* Input FIFO Over-run Upper */
+ /* panel */
+#define LCSR_IUU 0x00000080 /* Input FIFO Under-run Upper */
+ /* panel */
+#define LCSR_OOL 0x00000100 /* Output FIFO Over-run Lower */
+ /* panel */
+#define LCSR_OUL 0x00000200 /* Output FIFO Under-run Lower */
+ /* panel */
+#define LCSR_OOU 0x00000400 /* Output FIFO Over-run Upper */
+ /* panel */
+#define LCSR_OUU 0x00000800 /* Output FIFO Under-run Upper */
+ /* panel */
+
+#define LCCR1_PPL Fld (6, 4) /* Pixels Per Line/16 - 1 */
+#define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \
+ (((Pixel) - 16)/16 << FShft (LCCR1_PPL))
+#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */
+ /* pulse Width - 2 [Tpix] (L_LCLK) */
+#define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \
+ /* pulse Width [2..65 Tpix] */ \
+ (((Tpix) - 2) << FShft (LCCR1_HSW))
+#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */
+ /* count - 1 [Tpix] */
+#define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \
+ /* [1..256 Tpix] */ \
+ (((Tpix) - 1) << FShft (LCCR1_ELW))
+#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */
+ /* Wait count - 1 [Tpix] */
+#define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \
+ /* [1..256 Tpix] */ \
+ (((Tpix) - 1) << FShft (LCCR1_BLW))
+
+#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */
+#define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \
+ (((Line) - 1) << FShft (LCCR2_LPP))
+#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */
+ /* Width - 1 [Tln] (L_FCLK) */
+#define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \
+ /* Width [1..64 Tln] */ \
+ (((Tln) - 1) << FShft (LCCR2_VSW))
+#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */
+ /* count [Tln] */
+#define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \
+ /* [0..255 Tln] */ \
+ ((Tln) << FShft (LCCR2_EFW))
+#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */
+ /* Wait count [Tln] */
+#define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \
+ /* [0..255 Tln] */ \
+ ((Tln) << FShft (LCCR2_BFW))
+
+#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */
+ /* [1..255] (L_PCLK) */
+ /* fpix = fcpu/(2*(PCD + 2)) */
+ /* Tpix = 2*(PCD + 2)*Tcpu */
+#define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor [6..514] */ \
+ (((Div) - 4)/2 << FShft (LCCR3_PCD))
+ /* fpix = fcpu/(2*Floor (Div/2)) */
+ /* Tpix = 2*Floor (Div/2)*Tcpu */
+#define LCCR3_CeilPixClkDiv(Div) /* Ceil. of PixClkDiv [6..514] */ \
+ (((Div) - 3)/2 << FShft (LCCR3_PCD))
+ /* fpix = fcpu/(2*Ceil (Div/2)) */
+ /* Tpix = 2*Ceil (Div/2)*Tcpu */
+#define LCCR3_ACB Fld (8, 8) /* AC Bias clock half period - 1 */
+ /* [Tln] (L_BIAS) */
+#define LCCR3_ACBsDiv(Div) /* AC Bias clock Divisor [2..512] */ \
+ (((Div) - 2)/2 << FShft (LCCR3_ACB))
+ /* fac = fln/(2*Floor (Div/2)) */
+ /* Tac = 2*Floor (Div/2)*Tln */
+#define LCCR3_CeilACBsDiv(Div) /* Ceil. of ACBsDiv [2..512] */ \
+ (((Div) - 1)/2 << FShft (LCCR3_ACB))
+ /* fac = fln/(2*Ceil (Div/2)) */
+ /* Tac = 2*Ceil (Div/2)*Tln */
+#define LCCR3_API Fld (4, 16) /* AC bias Pin transitions per */
+ /* Interrupt */
+#define LCCR3_ACBsCntOff /* AC Bias clock transition Count */ \
+ /* Off */ \
+ (0 << FShft (LCCR3_API))
+#define LCCR3_ACBsCnt(Trans) /* AC Bias clock transition Count */ \
+ /* [1..15] */ \
+ ((Trans) << FShft (LCCR3_API))
+#define LCCR3_VSP 0x00100000 /* Vertical Synchronization pulse */
+ /* Polarity (L_FCLK) */
+#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */
+ /* active High */
+#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */
+ /* active Low */
+#define LCCR3_HSP 0x00200000 /* Horizontal Synchronization */
+ /* pulse Polarity (L_LCLK) */
+#define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */
+ /* pulse active High */
+#define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */
+ /* pulse active Low */
+#define LCCR3_PCP 0x00400000 /* Pixel Clock Polarity (L_PCLK) */
+#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */
+#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */
+#define LCCR3_OEP 0x00800000 /* Output Enable Polarity (L_BIAS, */
+ /* active display mode) */
+#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */
+#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */
+
+#endif /* _SA1100_LCD_H_ */
--- /dev/null
+/****************************************************************************/
+/* Copyright 2000 Compaq Computer Corporation. */
+/* . */
+/* Copying or modifying this code for any purpose is permitted, */
+/* provided that this copyright notice is preserved in its entirety */
+/* in all copies or modifications. COMPAQ COMPUTER CORPORATION */
+/* MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, AS TO THE USEFULNESS */
+/* OR CORRECTNESS OF THIS CODE OR ITS FITNESS FOR ANY PARTICULAR */
+/* PURPOSE. */
+/****************************************************************************/
+#ifndef SA1100_H_INCLUDED
+#define SA1100_H_INCLUDED
+
+
+#define UTCR0 0x00
+#define UTCR1 0x04
+#define UTCR2 0x08
+#define UTCR3 0x0C
+#define UTCR4 0x10
+#define UTDR 0x14
+#define UTSR0 0x1c
+#define UTSR1 0x20
+
+#define UTCR0_PE (1 << 0) /* parity enable */
+#define UTCR0_OES (1 << 1) /* 1 for even parity */
+#define UTCR0_2STOP (1 << 2) /* 1 for 2 stop bits */
+#define UTCR0_8BIT (1 << 3) /* 1 for 8 bit data */
+#define UTCR0_SCE (1 << 4) /* sample clock enable */
+#define UTCR0_RCE (1 << 5) /* receive clock edge select */
+#define UTCR0_TCE (1 << 6) /* transmit clock edge select */
+
+#define UTCR1_BRDHIMASK 0xF
+#define UTCR2_BRDLoMASK 0xFF
+
+#define UTCR3_RXE (1 << 0) /* receiver enable */
+#define UTCR3_TXE (1 << 1) /* transmit enable */
+#define UTCR3_BRK (1 << 2) /* send a BRK */
+#define UTCR3_RIE (1 << 3) /* receive FIFO interrupt enable */
+#define UTCR3_TIE (1 << 4) /* transmit FIFO interrupt enable */
+#define UTCR3_LBM (1 << 5) /* loopback mode */
+
+/* [1] 11.11.6 */
+#define UTDR_PRE (1 << 8) /* parity error */
+#define UTDR_FRE (1 << 9) /* framing error */
+#define UTDR_ROR (1 << 10) /* receiver overrun */
+
+/* [1] 11.11.7 */
+#define UTSR0_TFS 0x00000001 /* transmit FIFO service request */
+#define UTSR0_RFS 0x00000002 /* Receive FIFO 1/3-to-2/3-full or */
+ /* more Service request (read) */
+#define UTSR0_RID 0x00000004 /* Receiver IDle */
+#define UTSR0_RBB 0x00000008 /* Receive Beginning of Break */
+#define UTSR0_REB 0x00000010 /* Receive End of Break */
+#define UTSR0_EIF 0x00000020 /* Error In FIFO (read) */
+
+/* [1] 11.11.8 */
+#define UTSR1_TBY (1 << 0) /* transmit FIFO busy */
+#define UTSR1_RNE (1 << 1) /* receive FIFO not empty */
+#define UTSR1_TNF (1 << 2) /* transmit FIFO not full */
+#define UTSR1_PRE (1 << 3) /* parity error */
+#define UTSR1_FRE (1 << 4) /* framing error */
+#define UTSR1_ROR (1 << 5) /* receiver overrun */
+
+/* infrared */
+#define HSCR0_ITR 0x00000001 /* IrDA Transmission Rate */
+#define HSCR0_UART (HSCR0_ITR*0) /* UART mode (115.2 kb/s if IrDA) */
+#define HSCR0_HSSP (HSCR0_ITR*1) /* HSSP mode (4 Mb/s) */
+
+/* (HP-SIR) modulation Enable */
+#define UTCR4_HSE 0x00000001 /* Hewlett-Packard Serial InfraRed */
+#define UTCR4_NRZ (UTCR4_HSE*0) /* Non-Return to Zero modulation */
+#define UTCR4_HPSIR (UTCR4_HSE*1) /* HP-SIR modulation */
+#define UTCR4_LPM 0x00000002 /* Low-Power Mode */
+#define UTCR4_Z3_16Bit (UTCR4_LPM*0) /* Zero pulse = 3/16 Bit time */
+#define UTCR4_Z1_6us (UTCR4_LPM*1) /* Zero pulse = 1.6 us */
+
+
+#define UTSR1_ERROR_MASK 0x38
+
+#define SDLCBASE 0x80020060
+#define UART1BASE 0x80010000
+#define UART2BASE 0x80030000
+#define UART3BASE 0x80050000
+
+#define UART1_UTCR0 (UART1BASE + UTCR0)
+#define UART1_UTCR1 (UART1BASE + UTCR1)
+#define UART1_UTCR2 (UART1BASE + UTCR2)
+#define UART1_UTCR3 (UART1BASE + UTCR3)
+#define UART1_UTDR (UART1BASE + UTDR)
+#define UART1_UTSR0 (UART1BASE + UTSR0)
+#define UART1_UTSR1 (UART1BASE + UTSR1)
+
+#define UART2_UTCR0 (UART2BASE + UTCR0)
+#define UART2_UTCR1 (UART2BASE + UTCR1)
+#define UART2_UTCR2 (UART2BASE + UTCR2)
+#define UART2_UTCR3 (UART2BASE + UTCR3)
+/* the IR uart has an extra control register */
+#define UART2_UTCR4 (UART2BASE + UTCR4)
+#define UART2_UTDR (UART2BASE + UTDR)
+#define UART2_UTSR0 (UART2BASE + UTSR0)
+#define UART2_UTSR1 (UART2BASE + UTSR1)
+
+#define UART3_UTCR0 (UART3BASE + UTCR0)
+#define UART3_UTCR1 (UART3BASE + UTCR1)
+#define UART3_UTCR2 (UART3BASE + UTCR2)
+#define UART3_UTCR3 (UART3BASE + UTCR3)
+#define UART3_UTDR (UART3BASE + UTDR)
+#define UART3_UTSR0 (UART3BASE + UTSR0)
+#define UART3_UTSR1 (UART3BASE + UTSR1)
+
+
+/*
+ * Operating System (OS) timer control registers
+ *
+ * Registers
+ * OSMR0 Operating System (OS) timer Match Register 0
+ * (read/write).
+ * OSMR1 Operating System (OS) timer Match Register 1
+ * (read/write).
+ * OSMR2 Operating System (OS) timer Match Register 2
+ * (read/write).
+ * OSMR3 Operating System (OS) timer Match Register 3
+ * (read/write).
+ * OSCR Operating System (OS) timer Counter Register
+ * (read/write).
+ * OSSR Operating System (OS) timer Status Register
+ * (read/write).
+ * OWER Operating System (OS) timer Watch-dog Enable Register
+ * (read/write).
+ * OIER Operating System (OS) timer Interrupt Enable Register
+ * (read/write).
+ */
+
+#define OSMR0 *(long*)(0x90000000) /* OS timer Match Reg. 0 */
+#define OSMR1 *(long*)(0x90000004) /* OS timer Match Reg. 1 */
+#define OSMR2 *(long*)(0x90000008) /* OS timer Match Reg. 2 */
+#define OSMR3 *(long*)(0x9000000c) /* OS timer Match Reg. 3 */
+#define OSCR *(volatile long*)(0x90000010) /* OS timer Counter Reg. */
+#define OSSR *(volatile long*)(0x90000014 ) /* OS timer Status Reg. */
+#define OWER *(volatile long*)(0x90000018 ) /* OS timer Watch-dog Enable Reg. */
+#define OIER *(volatile long*)(0x9000001C ) /* OS timer Interrupt Enable Reg. */
+
+
+/*
+ * DRAM Configuration values
+ */
+
+/* [1] 10.2 */
+#define DRAM_CONFIGURATION_BASE 0xA0000000
+
+#define MDCNFG 0x00 /* must be initialized */
+#define MDCAS00 0x04 /* must be initialized */
+#define MDCAS01 0x08 /* must be initialized */
+#define MDCAS02 0x0c /* must be initialized */
+
+#define MSC0 0x10 /* must be initialized */
+#define MSC1 0x14 /* must be initialized */
+#define MECR 0x18 /* should be initialized */
+#define MDREFR 0x1c /* must be initialized */
+
+#define MDCAS20 0x20 /* OK not to initialize this register, because the enable bits are cleared on reset */
+#define MDCAS21 0x24 /* OK not to initialize this register, because the enable bits are cleared on reset */
+#define MDCAS22 0x28 /* OK not to initialize this register, because the enable bits are cleared on reset */
+
+#define MSC2 0x2C /* must be initialized */
+
+#define SMCNFG 0x30 /* should be initialized */
+
+#define ABS_MDCNFG *(volatile unsigned long*)(((char*)DRAM_CONFIGURATION_BASE)+MDCNFG)
+#define ABS_MSC0 *(volatile unsigned long*)(((char*)DRAM_CONFIGURATION_BASE)+MSC0)
+#define ABS_MSC1 *(volatile unsigned long*)(((char*)DRAM_CONFIGURATION_BASE)+MSC1)
+#define ABS_MSC2 *(volatile unsigned long*)(((char*)DRAM_CONFIGURATION_BASE)+MSC2)
+
+#define MDCNFG_BANK0_ENABLE (1 << 0)
+#define MDCNFG_BANK1_ENABLE (1 << 1)
+#define MDCNFG_DTIM0_SDRAM (1 << 2)
+#define MDCNFG_DWID0_32B (0 << 3)
+#define MDCNFG_DWID0_16B (1 << 3)
+#define MDCNFG_DRAC0(n_) (((n_) & 7) << 4)
+#define MDCNFG_TRP0(n_) (((n_) & 0xF) << 8)
+#define MDCNFG_TDL0(n_) (((n_) & 3) << 12)
+#define MDCNFG_TWR0(n_) (((n_) & 3) << 14)
+
+/* DRAM Refresh Control Register (MDREFR) [1] 10.2.2 */
+#define MDREFR_TRASR(n_) (((n_) & 0xF) << 0)
+#define MDREFR_DRI(n_) (((n_) & 0xFFF) << 4)
+#define MDREFR_E0PIN (1 << 16)
+#define MDREFR_K0RUN (1 << 17)
+#define MDREFR_K0DB2 (1 << 18)
+#define MDREFR_E1PIN (1 << 20) /* SDRAM clock enable pin 1 (banks 0-1) */
+#define MDREFR_K1RUN (1 << 21) /* SDRAM clock pin 1 run (banks 0-1) */
+#define MDREFR_K1DB2 (1 << 22) /* SDRAM clock pin 1 divide-by-two (banks 0-1) */
+#define MDREFR_K2RUN (1 << 25) /* SDRAM clock enable pin 2 (banks 2-3) */
+#define MDREFR_K2DB2 (1 << 26) /* SDRAM clock pin 2 run (banks 2-3) */
+#define MDREFR_EAPD (1 << 28) /* SDRAM clock pin 2 divide-by-two (banks 2-3) */
+#define MDREFR_KAPD (1 << 29)
+#define MDREFR_SLFRSH (1 << 31) /* SDRAM self refresh */
+
+
+#define MSC_RT_ROMFLASH 0
+#define MSC_RT_SRAM_012 1
+#define MSC_RT_VARLAT_345 1
+#define MSC_RT_BURST4 2
+#define MSC_RT_BURST8 3
+
+#define MSC_RBW32 (0 << 2)
+#define MSC_RBW16 (1 << 2)
+
+#define MSC_RDF(n_) (((n_)&0x1f)<<3)
+#define MSC_RDN(n_) (((n_)&0x1f)<<8)
+#define MSC_RRR(n_) (((n_)&0x7)<<13)
+
+#define RCSR_REG 0x90030004
+#define RCSR_HWR (1 << 0)
+#define RCSR_SWR (1 << 1)
+#define RCSR_WDR (1 << 2)
+#define RCSR_SMR (1 << 3)
+
+#define PSSR_REG 0x90020004
+#define PSSR_SSS (1 << 0)
+#define PSSR_BFS (1 << 1)
+#define PSSR_VFS (1 << 2)
+#define PSSR_DH (1 << 3)
+#define PSSR_PH (1 << 4)
+
+#define PSPR_REG 0x90020008
+
+#define ICMR_REG 0x90050004
+
+#define PPCR_REG 0x90020014
+
+#define PPCR_59MHZ 0
+#define PPCR_73MHZ 1
+#define PPCR_88MHZ 2
+#define PPCR_103MHZ 3
+#define PPCR_118MHZ 4
+#define PPCR_132MHZ 5
+#define PPCR_147MHZ 6
+#define PPCR_162MHZ 7
+#define PPCR_176MHZ 8
+#define PPCR_191MHZ 9
+#define PPCR_206MHZ 10
+#define PPCR_221MHZ 11
+
+/* ser. port 2: */
+#define PPC_TXD2 0x00004000 /* IPC Transmit Data 2 */
+#define PPC_RXD2 0x00008000 /* IPC Receive Data 2 */
+
+#define PPDR_REG 0x90060000 /* PPC Pin Direction Reg. */
+#define PPDR_LFCLK 0x400
+
+#define PPSR_REG 0x90060004 /* PPC Pin State Reg. */
+
+
+#define GPIO_GPIO(Nb) /* GPIO [0..27] */ \
+ (0x00000001 << (Nb))
+
+#if defined(CONFIG_MACH_IPAQ)
+/* The EGPIO is a write only control register at physical address 0x49000000
+ * See the hardware spec for more details.
+ */
+#define IPAQ_EGPIO 0x49000000
+#define H3600_EGPIO_VIRT 0x49000000
+#define H3800_ASIC_BASE 0x49000000
+//3800 stuff
+#define H3800_FLASH_VPP_ADDR (H3800_ASIC_BASE + _H3800_ASIC2_FlashWP_Base)
+#define H3800_FLASH_VPP_ON 0xf1e1;
+#define H3800_FLASH_VPP_OFF 0xf1e0;
+// defines for our access to the 3800 asics. requires h3600_asic.h andh3600_gpio.h from linux.
+#define H3800_ASIC1_GPIO_MASK_ADDR (H3800_ASIC_BASE + _H3800_ASIC1_GPIO_Base + _H3800_ASIC1_GPIO_Mask)
+#define H3800_ASIC1_GPIO_DIR_ADDR (H3800_ASIC_BASE + _H3800_ASIC1_GPIO_Base + _H3800_ASIC1_GPIO_Direction)
+#define H3800_ASIC1_GPIO_OUT_ADDR (H3800_ASIC_BASE + _H3800_ASIC1_GPIO_Base + _H3800_ASIC1_GPIO_Out)
+#define _H3800_ASIC2_KPIO_Base 0x0200
+#define _H3800_ASIC2_KPIO_Data 0x0014 /* R/W, 16 bits */
+#define _H3800_ASIC2_KPIO_Alternate 0x003c /* R/W, 6 bits */
+#define H3800_ASIC2_KPIO_ADDR (H3800_ASIC_BASE + _H3800_ASIC2_KPIO_Base + _H3800_ASIC2_KPIO_Data)
+#define H3800_ASIC1_GPIO_MASK_INIT 0x7fff
+#define H3800_ASIC1_GPIO_DIR_INIT 0x7fff
+#define H3800_ASIC1_GPIO_OUT_INIT 0x2405
+
+#include "ipaq-egpio.h"
+
+#endif
+
+#if defined(CONFIG_MACH_ASSABET) || defined(CONFIG_NEPONSET)
+
+#define ASSABET_BCR 0x12000000
+#define BCR_CF_PWR (1 << 0)
+#define BCR_CF_RST (1 << 1)
+#define BCR_SOFT_RST (1 << 2)
+#define BCR_IRDA_FSEL (1 << 3)
+#define BCR_CF_BUS_ON (1 << 7)
+#define BCR_RS232EN (1 << 12)
+#endif
+
+#if defined(CONFIG_MACH_JORNADA56X) || defined(CONFIG_MACH_IPAQ)
+#define JORNADA56X_ASIC_BASE_PHYSICAL 0x40000000
+#ifdef __ASSEMBLY__
+#define JORNADA_E_GPIO_BASE_PHYSICAL(A) (JORNADA56X_ASIC_BASE_PHYSICAL+0x700 + (A * 4))
+#else
+#define JORNADA_E_GPIO_BASE_PHYSICAL(A) (*(long*)(JORNADA56X_ASIC_BASE_PHYSICAL+0x700 + (A * 4)))
+#endif
+#define JORNADA_GPDPSR_PHYSICAL JORNADA_E_GPIO_BASE_PHYSICAL(24)
+#define JORNADA_GPDPCR_PHYSICAL JORNADA_E_GPIO_BASE_PHYSICAL(25)
+#define JORNADA_GPDPLR_PHYSICAL JORNADA_E_GPIO_BASE_PHYSICAL(26)
+#define JORNADA_GPDPDR_PHYSICAL JORNADA_E_GPIO_BASE_PHYSICAL(27)
+#define JORNADA_RS232_ON (1 << 1) /* ASIC GPIO D */
+
+#define JORNADA_ASIC_RESET (1 << 20) /* SA-1110 GPIO */
+#endif
+
+
+#if defined(CONFIG_MACH_SKIFF)
+#define GPIO_BASE (0x41800000)
+#else
+#define GPIO_BASE (0x90040000)
+#endif
+
+
+#define GPIO_GPLR_OFF (0)
+#define GPIO_GPDR_OFF (4)
+#define GPIO_GPSR_OFF (8)
+#define GPIO_GPCR_OFF (0xc)
+#define GPIO_GRER_OFF (0x10)
+#define GPIO_GFER_OFF (0x14)
+#define GPIO_GEDR_OFF (0x18)
+#define GPIO_GAFR_OFF (0x1c)
+
+
+#define GPIO_SET(off, bits) \
+ ((*((volatile unsigned long *)(((char*)GPIO_BASE)+(off))))|=(bits))
+
+#define GPIO_CLR(off, bits) \
+ ((*((volatile unsigned long *)(((char*)GPIO_BASE)+(off))))&=~(bits))
+
+#define GPIO_READ(off) \
+ (*((volatile unsigned long *)(((char*)GPIO_BASE)+(off))))
+
+#define GPIO_WRITE(off, v) \
+ ((*((volatile unsigned long *)(((char*)GPIO_BASE)+(off)))) = (v))
+
+#define GPIO_GAFR_LCD_BITS (0xff << 2)
+#define GPIO_GPDR_LCD_BITS (0xff << 2)
+
+#define GPIO_GPLR_READ() GPIO_READ(GPIO_GPLR_OFF)
+#define GPIO_GPDR_READ() GPIO_READ(GPIO_GPDR_OFF)
+#define GPIO_GPSR_READ() GPIO_READ(GPIO_GPSR_OFF)
+#define GPIO_GPCR_READ() GPIO_READ(GPIO_GPCR_OFF)
+#define GPIO_GRER_READ() GPIO_READ(GPIO_GRER_OFF)
+#define GPIO_GFER_READ() GPIO_READ(GPIO_GFER_OFF)
+#define GPIO_GEDR_READ() GPIO_READ(GPIO_GEDR_OFF)
+#define GPIO_GAFR_READ() GPIO_READ(GPIO_GAFR_OFF)
+
+#define GPIO_GPLR_WRITE(v) GPIO_WRITE(GPIO_GPLR_OFF,v)
+#define GPIO_GPDR_WRITE(v) GPIO_WRITE(GPIO_GPDR_OFF,v)
+#define GPIO_GPSR_WRITE(v) GPIO_WRITE(GPIO_GPSR_OFF,v)
+#define GPIO_GPCR_WRITE(v) GPIO_WRITE(GPIO_GPCR_OFF,v)
+#define GPIO_GRER_WRITE(v) GPIO_WRITE(GPIO_GRER_OFF,v)
+#define GPIO_GFER_WRITE(v) GPIO_WRITE(GPIO_GFER_OFF,v)
+#define GPIO_GEDR_WRITE(v) GPIO_WRITE(GPIO_GEDR_OFF,v)
+#define GPIO_GAFR_WRITE(v) GPIO_WRITE(GPIO_GAFR_OFF,v)
+
+#define GPIO_GPLR_SET(v) GPIO_SET(GPIO_GPLR_OFF,v)
+#define GPIO_GPDR_SET(v) GPIO_SET(GPIO_GPDR_OFF,v)
+#define GPIO_GPSR_SET(v) GPIO_SET(GPIO_GPSR_OFF,v)
+#define GPIO_GPCR_SET(v) GPIO_SET(GPIO_GPCR_OFF,v)
+#define GPIO_GRER_SET(v) GPIO_SET(GPIO_GRER_OFF,v)
+#define GPIO_GFER_SET(v) GPIO_SET(GPIO_GFER_OFF,v)
+#define GPIO_GEDR_SET(v) GPIO_SET(GPIO_GEDR_OFF,v)
+#define GPIO_GAFR_SET(v) GPIO_SET(GPIO_GAFR_OFF,v)
+
+#define GPIO_GPLR_CLR(v) GPIO_CLR(GPIO_GPLR_OFF,v)
+#define GPIO_GPDR_CLR(v) GPIO_CLR(GPIO_GPDR_OFF,v)
+#define GPIO_GPSR_CLR(v) GPIO_CLR(GPIO_GPSR_OFF,v)
+#define GPIO_GPCR_CLR(v) GPIO_CLR(GPIO_GPCR_OFF,v)
+#define GPIO_GRER_CLR(v) GPIO_CLR(GPIO_GRER_OFF,v)
+#define GPIO_GFER_CLR(v) GPIO_CLR(GPIO_GFER_OFF,v)
+#define GPIO_GEDR_CLR(v) GPIO_CLR(GPIO_GEDR_OFF,v)
+#define GPIO_GAFR_CLR(v) GPIO_CLR(GPIO_GAFR_OFF,v)
+
+#define GPIO_LDD8 (1 << 2)
+#define GPIO_LDD9 (1 << 3)
+#define GPIO_LDD10 (1 << 4)
+#define GPIO_LDD11 (1 << 5)
+#define GPIO_LDD12 (1 << 6)
+#define GPIO_LDD13 (1 << 7)
+#define GPIO_LDD14 (1 << 8)
+#define GPIO_LDD15 (1 << 9)
+
+#define GAFR *(volatile unsigned long*)(((char*)GPIO_BASE)+(GPIO_GAFR_OFF))
+#define GPCR *(volatile unsigned long*)(((char*)GPIO_BASE)+(GPIO_GPCR_OFF))
+#define GPDR *(volatile unsigned long*)(((char*)GPIO_BASE)+(GPIO_GPDR_OFF))
+#define GPLR *(volatile unsigned long*)(((char*)GPIO_BASE)+(GPIO_GPLR_OFF))
+#define GPSR *(volatile unsigned long*)(((char*)GPIO_BASE)+(GPIO_GPSR_OFF))
+
+/*
+ * power management reggies
+ */
+
+#define PMCR 0x90020000 /* Power manager control register */
+#define PSSR 0x90020004 /* Power manager sleep status register */
+#define PSPR 0x90020008 /* Power manager scratch pad register */
+#define PWER 0x9002000C /* Power manager wake-up enable register */
+#define PCFR 0x90020010 /* Power manager general configuration reg */
+#define PCFR_OPDE (1<<0) /* power down 3.6MHz osc */
+#define PCFR_FP (1<<1) /* float PCMCIA controls during sleep */
+#define PCFR_FS (1<<2) /* float static chip selects during sleep */
+#define PCFR_FO (1<<3) /* force 32KHz osc enable on */
+
+#define PPCR 0x90020014 /* Power manager PLL configuration register */
+#define PGSR 0x90020018 /* Power manager GPIO sleep state register */
+#define POSR 0x9002001C /* Power manager oscillator status register */
+
+
+#define RSRR_SWR (1<<0) /* software reset bit */
+#define RSRR 0x90030000 /* Reset controller software reset register */
+#define RCSR 0x90030004 /* Reset controller status register */
+
+
+#define ICIP 0x90050000 /* interrupt controller IRQ pend reg */
+#define ICFP 0x90050010 /* interrupt controller FIQ pend reg */
+#define ICMR 0x90050004 /* interrupt controller mask reg */
+#define ICLR 0x90050008 /* interrupt controller level reg */
+#define ICCR 0x9005000C /* interrupt controller control reg */
+
+#define RTC_BASE 0x90010000
+#define RTAR_OFFSET 0 /* RTC alarm reg */
+#define RTAR (RTC_BASE + RTAR_OFFSET)
+#define RCNR_OFFSET 4 /* RTC count reg */
+#define RCNR (RTC_BASE + RCNR_OFFSET)
+#define RTTR_OFFSET 8 /* RTC timer trim reg */
+#define RTTR (RTC_BASE + RTTR_OFFSET)
+#define RTSR_OFFSET 0x10 /* RTC status reg */
+#define RTSR (RTC_BASE + RTSR_OFFSET)
+#define UART2_HSCR0_OFFSET 0x80040060
+#define UART2_HSCR0 (RTC_BASE + UART2_HSCR0_OFFSET)
+
+
+#endif /* SA1100_H_INCLUDED */
--- /dev/null
+/*
+ * AMBA CLCD PL110 driver
+ */
+
+#include <l4/drivers/lcd.h>
+#include <l4/drivers/amba.h>
+#include <l4/drivers/io.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <l4/re/c/dataspace.h>
+#include <l4/re/c/util/cap_alloc.h>
+#include <l4/re/c/mem_alloc.h>
+#include <l4/re/c/rm.h>
+#include <l4/io/io.h>
+
+#include "lcd-amba.h"
+
+int config_do_bgr;
+int config_request_xga;
+int config_use_565;
+
+enum pl11x_type
+{
+ UNINITIALIZED, PL110, PL111, PL_UNKNOWN
+};
+
+static enum pl11x_type type;
+static void *fb_vaddr;
+static l4_addr_t fb_paddr;
+static int is_qemu;
+static int use_xga;
+
+
+static void config(const char *c)
+{
+ // this driver scans for the following:
+ // 1024: XGA mode, VGA mode otherwise
+ // BGR: do bgr mode instead of rgb
+ // 565: mode (if PL111 available)
+ if (!c)
+ return;
+
+ config_request_xga = strcasestr(c, "1024") != NULL;
+ config_do_bgr = strcasestr(c, "bgr") != NULL;
+ config_use_565 = strcasestr(c, "565") != NULL;
+}
+
+
+
+static void set_colors(l4re_video_view_info_t *vinfo,
+ int wr, int wg, int wb,
+ int sr, int sg, int sb)
+{
+ vinfo->pixel_info.r.shift = sr;
+ vinfo->pixel_info.r.size = wr;
+ vinfo->pixel_info.g.shift = sg;
+ vinfo->pixel_info.g.size = wg;
+ vinfo->pixel_info.b.shift = sb;
+ vinfo->pixel_info.b.size = wb;
+
+ printf("Color mode: %d:%d:%d %d:%d:%d\n", sr, sg, sb, wr, wg, wb);
+}
+
+static int get_fbinfo(l4re_video_view_info_t *vinfo)
+{
+
+ vinfo->width = use_xga ? 1024 : 640;
+ vinfo->height = use_xga ? 768 : 480;
+ vinfo->pixel_info.bytes_per_pixel = 2;
+ vinfo->bytes_per_line = 2 * vinfo->width;
+
+ if ((config_use_565 && type == PL111) || (is_qemu && type == PL110))
+ {
+ if (config_do_bgr)
+ set_colors(vinfo, 5, 6, 5, 11, 5, 0);
+ else
+ set_colors(vinfo, 5, 6, 5, 0, 5, 11);
+ }
+ else
+ {
+ if (config_do_bgr)
+ set_colors(vinfo, 5, 5, 5, 10, 5, 0);
+ else
+ set_colors(vinfo, 5, 5, 5, 0, 5, 10);
+ }
+
+ return 0;
+}
+
+static int probe(const char *c)
+{
+ config(c);
+
+ return !l4io_lookup_device("AMBA PL110", NULL, 0, 0);
+}
+
+static unsigned int fbmem_size(void)
+{ return use_xga ? (1024 * 768 * 2) : (480 * 640 * 2); }
+
+unsigned long amba_pl110_lcd_control_virt_base;
+unsigned long amba_pl110_sys_base_virt;
+
+static void setup_type(void)
+{
+ uint32_t cellid, periphid;
+
+ amba_read_id(amba_pl110_lcd_control_virt_base + 0xfe0, &periphid, &cellid);
+
+ if (periphid == 0x00041111 && cellid == 0xb105f00d)
+ type = PL111;
+ else if (periphid == 0x00041110 && cellid == 0xb105f00d)
+ type = PL110;
+ else
+ type = PL_UNKNOWN;
+}
+
+static const char *arm_lcd_get_info(void)
+{
+ return "ARM AMBA PrimeCell 11x";
+}
+
+static
+l4_umword_t read_sys_reg(unsigned reg)
+{
+ return io_read_mword(amba_pl110_sys_base_virt + reg);
+}
+
+static
+void write_sys_reg(unsigned reg, l4_umword_t val)
+{
+ io_write_mword(amba_pl110_sys_base_virt + reg, val);
+}
+
+static
+void set_clcd_clock(l4_umword_t val)
+{
+ write_sys_reg(Reg_sys_lock, Sys_lock_unlock);
+ write_sys_reg(Reg_sys_osc4, val);
+ write_sys_reg(Reg_sys_lock, Sys_lock_lock);
+}
+
+static
+l4_umword_t read_clcd_reg(unsigned reg)
+{
+ return *((volatile l4_umword_t *)(amba_pl110_lcd_control_virt_base + reg));
+}
+
+static
+void write_clcd_reg(unsigned reg, l4_umword_t val)
+{
+ *((volatile l4_umword_t *)(amba_pl110_lcd_control_virt_base + reg)) = val;
+}
+
+static
+int init(unsigned long fb_phys_addr)
+{
+ l4_umword_t id;
+
+ id = read_sys_reg(Reg_sys_clcd) & Sys_clcd_idmask;
+ switch (id)
+ {
+ case Sys_clcd_id84:
+ case Sys_clcd_idmask:
+ case 0x1000: // (strange?) qemu value, should be 0x100, or did they think BE?
+ printf("Configure 8.4 CLCD\n");
+ if (use_xga)
+ {
+ set_clcd_clock(Sys_osc4_xga);
+ write_clcd_reg(Reg_clcd_tim0, Clcd_tim0_84_xga);
+ write_clcd_reg(Reg_clcd_tim1, Clcd_tim1_84_xga);
+ write_clcd_reg(Reg_clcd_tim2, Clcd_tim2_84_xga);
+ write_clcd_reg(Reg_clcd_tim3, Clcd_tim3_84_xga);
+ }
+ else
+ {
+ set_clcd_clock(Sys_osc4_25mhz);
+ write_clcd_reg(Reg_clcd_tim0, Clcd_tim0_84_vga);
+ write_clcd_reg(Reg_clcd_tim1, Clcd_tim1_84_vga);
+ write_clcd_reg(Reg_clcd_tim2, Clcd_tim2_84_vga);
+ write_clcd_reg(Reg_clcd_tim3, Clcd_tim3_84_vga);
+ }
+ break;
+
+ case Sys_clcd_id38:
+ printf("Configure 3.8 CLCD\n");
+ set_clcd_clock(Sys_osc4_10mhz);
+ write_clcd_reg(Reg_clcd_tim0, Clcd_tim0_38);
+ write_clcd_reg(Reg_clcd_tim1, Clcd_tim1_38);
+ write_clcd_reg(Reg_clcd_tim2, Clcd_tim2_38);
+ write_clcd_reg(Reg_clcd_tim3, Clcd_tim3_38);
+ break;
+
+ case Sys_clcd_id25:
+ printf("Configure 2.5 CLCD\n");
+ set_clcd_clock(Sys_osc4_5p4mhz);
+ write_clcd_reg(Reg_clcd_tim0, Clcd_tim0_25);
+ write_clcd_reg(Reg_clcd_tim1, Clcd_tim1_25);
+ write_clcd_reg(Reg_clcd_tim2, Clcd_tim2_25);
+ write_clcd_reg(Reg_clcd_tim3, Clcd_tim3_25);
+
+ // Turn the backlight on
+ //write_ib2_reg(Reg_ib2_ctrl, read_ib2_reg(Reg_ib2_ctrl) | 0x01);
+ break;
+
+ default:
+ printf("Error: Unknown display type (ID: %lx)\n", id >> 8);
+ return 0;
+ }
+
+ // Set physical framebuffer address
+ write_clcd_reg(Reg_clcd_ubas, fb_phys_addr);
+ write_clcd_reg(Reg_clcd_lbas, 0);
+ write_clcd_reg(Reg_clcd_ienb, 0);
+
+ // Switch power off and configure
+ write_clcd_reg(Reg_clcd_cntl,
+ ((type == PL111 && config_use_565 && !is_qemu)
+ ? Clcd_cntl_lcdbpp16_pl111_565
+ : Clcd_cntl_lcdbpp16)
+ | Clcd_cntl_lcden | Clcd_cntl_lcdbw
+ | Clcd_cntl_lcdtft | Clcd_cntl_lcdvcomp
+ | (config_do_bgr ? Clcd_cntl_lcdbgr : 0));
+
+ // Switch power on
+ write_clcd_reg(Reg_clcd_cntl, read_clcd_reg(Reg_clcd_cntl) | Clcd_cntl_lcdpwr);
+
+ return 1;
+}
+
+static void setup_memory(void)
+{
+ l4_size_t phys_size;
+ l4io_device_handle_t dh;
+ l4io_resource_handle_t hdl;
+
+ if (fb_vaddr)
+ return;
+
+ if (l4io_lookup_device("System Control", &dh, 0, &hdl))
+ {
+ printf("Could not get system controller space\n");
+ return;
+ }
+
+ /* System controller -- XXX Wrong Place XXX */
+ amba_pl110_sys_base_virt
+ = l4io_request_resource_iomem(dh, &hdl);
+ if (amba_pl110_sys_base_virt == 0)
+ {
+ printf("Could not map system controller space\n");
+ return;
+ }
+
+ if (l4io_lookup_device("AMBA PL110", &dh, 0, &hdl))
+ {
+ printf("Could not get PL110 LCD device\n");
+ return;
+ }
+
+ amba_pl110_lcd_control_virt_base
+ = l4io_request_resource_iomem(dh, &hdl);
+ if (amba_pl110_lcd_control_virt_base == 0)
+ {
+ printf("Could not map controller space for '%s'\n", arm_lcd_get_info());
+ return;
+ }
+
+ setup_type();
+
+ if ((read_sys_reg(Reg_sys_clcd) & Sys_clcd_idmask) == 0x1000)
+ {
+ is_qemu = 1; // remember if we run on qemu because of the different
+ // handling of the bpp16 mode with PL110: my hardware has
+ // 5551 mode, qemu does 565
+ type = PL111; // also set the type to PL111 because qemu only
+ // announces a PL110 but can do the 1024 resolution too
+ printf("Running on QEmu (assuming PL111).\n");
+ }
+
+ if (config_request_xga && type == PL111)
+ use_xga = 1;
+
+ // get some frame buffer
+ l4re_ds_t mem = l4re_util_cap_alloc();
+ if (l4_is_invalid_cap(mem))
+ return;
+
+ if (l4re_ma_alloc(fbmem_size(), mem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED))
+ {
+ printf("Error allocating memory\n");
+ return;
+ }
+
+ fb_vaddr = 0;
+ if (l4re_rm_attach(&fb_vaddr, fbmem_size(),
+ L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP,
+ mem, 0, L4_PAGESHIFT))
+ {
+ printf("Error getting memory\n");
+ return;
+ }
+
+ printf("Video memory is at virtual %p (size: 0x%x Bytes)\n",
+ fb_vaddr, fbmem_size());
+
+ // get physical address
+ if (l4re_ds_phys(mem, 0, &fb_paddr, &phys_size)
+ || phys_size != fbmem_size())
+ {
+ printf("Getting the physical address failed or not contiguous\n");
+ return;
+ }
+ printf("Physical video memory is at %p\n", (void *)fb_paddr);
+}
+
+static void *fb(void)
+{
+ if (!fb_vaddr)
+ setup_memory();
+
+ return fb_vaddr;
+}
+
+static void pl110_enable(void)
+{
+ const char *s;
+
+ setup_memory();
+
+ switch (type)
+ {
+ case PL110: s = "ARM AMBA PrimeCell PL110"; break;
+ case PL111: s = "ARM AMBA PrimeCell PL111"; break;
+ default: s = "Unknown"; break;
+ }
+
+ printf("Detected a '%s' device.\n", s);
+
+ if (!fb_vaddr || !init(fb_paddr))
+ {
+ printf("CLCD init failed!\n");
+ return;
+ }
+}
+
+static void pl110_disable(void)
+{
+}
+static struct arm_lcd_ops arm_lcd_ops_pl11x = {
+ .probe = probe,
+ .get_fbinfo = get_fbinfo,
+ .get_fb = fb,
+ .get_video_mem_size = fbmem_size,
+ .get_info = arm_lcd_get_info,
+ .enable = pl110_enable,
+ .disable = pl110_disable,
+};
+
+arm_lcd_register(&arm_lcd_ops_pl11x);
--- /dev/null
+// System Controller Registers
+enum
+{
+ Reg_sys_id = 0x00,
+ Reg_sys_sw = 0x04,
+ Reg_sys_led = 0x08,
+ Reg_sys_osc0 = 0x0C,
+ Reg_sys_osc1 = 0x10,
+ Reg_sys_osc2 = 0x14,
+ Reg_sys_osc3 = 0x18,
+ Reg_sys_osc4 = 0x1C,
+ Reg_sys_lock = 0x20,
+ Reg_sys_mci = 0x48,
+ Reg_sys_misc = 0x60,
+ Reg_sys_clcd = 0x50,
+};
+
+enum
+{
+ Sys_clcd_idmask = 0x1F00,
+ Sys_clcd_id84 = 0x0100,
+ Sys_clcd_id38 = 0x0000,
+ Sys_clcd_id25 = 0x0700,
+};
+
+enum
+{
+ Sys_lock_unlock = 0xA05F,
+ Sys_lock_lock = 0x0000,
+};
+
+enum
+{
+ Sys_osc4_xga = 0x15c77,
+ Sys_osc4_25mhz = 0x2C77,
+ Sys_osc4_10mhz = 0x2C2A,
+ Sys_osc4_5p4mhz = 0x2C13,
+};
+
+// CLCD Controller Registers
+enum
+{
+ Reg_clcd_tim0 = 0x000,
+ Reg_clcd_tim1 = 0x004,
+ Reg_clcd_tim2 = 0x008,
+ Reg_clcd_tim3 = 0x00C,
+ Reg_clcd_ubas = 0x010,
+ Reg_clcd_lbas = 0x014,
+ Reg_clcd_cntl = 0x018,
+ Reg_clcd_ienb = 0x01c,
+ Reg_clcd_stat = 0x020,
+ Reg_clcd_intr = 0x024,
+ Reg_clcd_ucur = 0x028,
+ Reg_clcd_lcur = 0x02C,
+ Reg_clcd_pal = 0x200,
+};
+
+enum
+{
+ Clcd_tim0_ppl84_xga = ((1024 / 16) - 1) << 2,
+ Clcd_tim0_ppl84_vga = (( 640 / 16) - 1) << 2,
+ Clcd_tim0_hsw84 = 63 << 8, // hsync
+ Clcd_tim0_hfp84 = 31 << 16, // hfront
+ Clcd_tim0_hbp84 = 63 << 24, // hback
+ Clcd_tim0_ppl38 = ((320/16)-1) << 2,
+ Clcd_tim0_hsw38 = 5 << 8,
+ Clcd_tim0_hfp38 = 5 << 16,
+ Clcd_tim0_hbp38 = 5 << 24,
+ Clcd_tim0_ppl25 = ((240/16)-1) << 2,
+ Clcd_tim0_hsw25 = 10 << 8,
+ Clcd_tim0_hfp25 = 30 << 16,
+ Clcd_tim0_hbp25 = 20 << 24,
+ Clcd_tim0_84_xga = Clcd_tim0_hbp84 | Clcd_tim0_hfp84| Clcd_tim0_hsw84 | Clcd_tim0_ppl84_xga,
+ Clcd_tim0_84_vga = Clcd_tim0_hbp84 | Clcd_tim0_hfp84| Clcd_tim0_hsw84 | Clcd_tim0_ppl84_vga,
+ Clcd_tim0_38 = Clcd_tim0_hbp38 | Clcd_tim0_hfp38| Clcd_tim0_hfp38 | Clcd_tim0_ppl38,
+ Clcd_tim0_25 = Clcd_tim0_hbp25 | Clcd_tim0_hfp25| Clcd_tim0_hsw25 | Clcd_tim0_ppl25,
+};
+
+enum
+{
+ Clcd_tim1_lpp84_xga = (768-1),
+ Clcd_tim1_lpp84_vga = (480-1),
+ Clcd_tim1_vsw84 = 24 << 10, // vsync
+ Clcd_tim1_vfp84 = 11 << 16, // vfront
+ Clcd_tim1_vbp84 = 9 << 24, // vback
+ Clcd_tim1_lpp38 = (240-1),
+ Clcd_tim1_vsw38 = 5 << 10,
+ Clcd_tim1_vfp38 = 5 << 16,
+ Clcd_tim1_vbp38 = 5 << 24,
+ Clcd_tim1_lpp25 = (320-1),
+ Clcd_tim1_vsw25 = 2 << 10,
+ Clcd_tim1_vfp25 = 2 << 16,
+ Clcd_tim1_vbp25 = 1 << 24,
+ Clcd_tim1_84_xga = Clcd_tim1_vbp84 | Clcd_tim1_vfp84 | Clcd_tim1_vsw84 | Clcd_tim1_lpp84_xga,
+ Clcd_tim1_84_vga = Clcd_tim1_vbp84 | Clcd_tim1_vfp84 | Clcd_tim1_vsw84 | Clcd_tim1_lpp84_vga,
+ Clcd_tim1_38 = Clcd_tim1_vbp38 | Clcd_tim1_vfp38 | Clcd_tim1_vsw38 | Clcd_tim1_lpp38,
+ Clcd_tim1_25 = Clcd_tim1_vbp25 | Clcd_tim1_vfp25 | Clcd_tim1_vsw25 | Clcd_tim1_lpp25,
+};
+
+enum
+{
+ Clcd_tim2_ivs = 1 << 11,
+ Clcd_tim2_ihs = 1 << 12,
+ Clcd_tim2_cpl84_xga = (1024-1) << 16,
+ Clcd_tim2_cpl84_vga = (640-1) << 16,
+ Clcd_tim2_cpl38 = (320-1) << 16,
+ Clcd_tim2_cpl25 = (240-1) << 16,
+ Clcd_tim2_bcd = 1 << 26,
+ Clcd_tim2_84_xga = Clcd_tim2_bcd | Clcd_tim2_cpl84_xga | Clcd_tim2_ihs | Clcd_tim2_ivs,
+ Clcd_tim2_84_vga = Clcd_tim2_bcd | Clcd_tim2_cpl84_vga | Clcd_tim2_ihs | Clcd_tim2_ivs,
+ Clcd_tim2_38 = Clcd_tim2_bcd | Clcd_tim2_cpl38 | Clcd_tim2_ihs | Clcd_tim2_ivs,
+ Clcd_tim2_25 = Clcd_tim2_bcd | Clcd_tim2_cpl25 | Clcd_tim2_ihs | Clcd_tim2_ivs,
+};
+
+enum
+{
+ Clcd_tim3_84_xga = 0,
+ Clcd_tim3_84_vga = 0,
+ Clcd_tim3_38 = 0,
+ Clcd_tim3_25 = 0,
+};
+
+enum
+{
+ Clcd_cntl_lcden = 1,
+ Clcd_cntl_lcdbpp4 = 2 << 1,
+ Clcd_cntl_lcdbpp8 = 3 << 1,
+ Clcd_cntl_lcdbpp16 = 4 << 1,
+ Clcd_cntl_lcdbpp24 = 5 << 1,
+ Clcd_cntl_lcdbpp16_pl111_565 = 6 << 1,
+ Clcd_cntl_lcdbpp12_pl111_444 = 7 << 1,
+ Clcd_cntl_lcdbw = 0 << 4,
+ Clcd_cntl_lcdtft = 1 << 5,
+ Clcd_cntl_lcdbgr = 1 << 8,
+ Clcd_cntl_lcdbebo = 1 << 9,
+ Clcd_cntl_lcdbepo = 1 << 10,
+ Clcd_cntl_lcdpwr = 1 << 11,
+ Clcd_cntl_lcdvcomp = 1 << 12,
+};
--- /dev/null
+/*
+ * Some routines to enable the LCD in an IPAQ H3800 (and maybe others).
+ *
+ * Contains stuff taken from Linux and bootldr.
+ *
+ */
+
+#include <l4/drivers/lcd.h>
+#include <stdio.h>
+
+/* Gnah... */
+void putstr(const char *);
+
+#define CONFIG_MACH_IPAQ 1
+#include <arch-sa1100/sa1100.h>
+#include <arch-sa1100/sa1100-lcd.h>
+#define __SERIAL_H__ /* don't include serial.h */
+#include <arch-sa1100/h3600.h>
+#include <arch-sa1100/h3600_asic.h>
+
+typedef unsigned short u16;
+
+#define SET_ASIC1(x) \
+ do {if ( setp ) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0)
+
+#define CTL_REG_READ(addr) (*(volatile unsigned long *)(addr))
+#define CTL_REG_WRITE(addr, val) (*(volatile unsigned long *)(addr) = (val))
+
+#define CTL_REG_READ_BYTE(addr) (*(volatile unsigned char *)(addr))
+#define CTL_REG_WRITE_BYTE(addr, val) (*(volatile unsigned char *)(addr) = (val))
+
+#define TIMEOUT 350000
+
+static void sa_lcd_light(int on, int level)
+{
+ (void)on; (void)level;
+}
+
+static void sa_control_egpio(enum ipaq_egpio_type x, int setp)
+{
+ switch (x) {
+ case IPAQ_EGPIO_LCD_ON:
+ SET_ASIC1( GPIO1_LCD_5V_ON
+ | GPIO1_LCD_ON
+ | GPIO1_LCD_PCI
+ | GPIO1_VGH_ON
+ | GPIO1_VGL_ON);
+ case IPAQ_EGPIO_CODEC_NRESET:
+ case IPAQ_EGPIO_AUDIO_ON:
+ case IPAQ_EGPIO_QMUTE:
+ case IPAQ_EGPIO_OPT_NVRAM_ON:
+ case IPAQ_EGPIO_OPT_ON:
+ case IPAQ_EGPIO_CARD_RESET:
+ case IPAQ_EGPIO_OPT_RESET:
+ case IPAQ_EGPIO_IR_ON:
+ case IPAQ_EGPIO_IR_FSEL:
+ case IPAQ_EGPIO_RS232_ON:
+ case IPAQ_EGPIO_VPP_ON:
+ case IPAQ_EGPIO_COM_DSR:
+ break;
+ }
+}
+
+static void arm_lcd_h3800_disable(void)
+{
+ sa_lcd_light(0, 0);
+
+ LCSR = 0; /* Clear LCD Status Register */
+ LCCR0 &= ~(LCCR0_LDM); /* Enable LCD Disable Done Interrupt */
+ LCCR0 &= ~(LCCR0_LEN); /* Disable LCD Controller */
+ CTL_REG_WRITE(GPIO_BASE+GPIO_GPCR_OFF, 0 /*params->gpio*/);
+ sa_control_egpio(IPAQ_EGPIO_LCD_ON, 0);
+}
+
+#define GPIO_WRITE(off, v) \
+ ((*((volatile unsigned long *)(((char*)GPIO_BASE)+(off)))) = (v))
+
+#define GPIO_GAFR_WRITE(v) GPIO_WRITE(GPIO_GAFR_OFF,v)
+#define GPIO_GPDR_WRITE(v) GPIO_WRITE(GPIO_GPDR_OFF,v)
+
+static unsigned long *sa_vidmem;
+
+static void arm_lcd_h3800_enable(void)
+{
+ //arm_lcd_h3800_disable();
+
+ //printf("Enabling LCD controller.\n");
+
+#if 0
+ GPIO_GAFR_WRITE(0xff << 2);
+ GPIO_GPDR_WRITE(0xff << 2);
+
+ sa_vidmem[0] = 0x2077;
+
+ LCCR3 = 0x10 | LCCR3_VrtSnchL | LCCR3_HorSnchL;
+ LCCR2 = LCCR2_DisHght(VESA_YRES + 1) + LCCR2_VrtSnchWdth(3)
+ + LCCR2_BegFrmDel(10) + LCCR2_EndFrmDel(1);
+ LCCR1 = LCCR1_DisWdth(VESA_XRES) + LCCR1_HorSnchWdth(4) +
+ LCCR1_BegLnDel(0xC) + LCCR1_EndLnDel(0x11);
+ LCCR0 = (LCCR0_LEN + LCCR0_Color + LCCR0_Sngl + LCCR0_Act +
+ LCCR0_LtlEnd + LCCR0_LDM + LCCR0_BAM + LCCR0_ERM +
+ LCCR0_DMADel(0))
+ & ~LCCR0_LEN;
+
+#endif
+ {
+ l4_size_t phys_size;
+
+ if (!l4dm_mem_phys_addr(sa_vidmem, 4, &phys, 1, &pnum)
+ || !pnum)
+ {
+ printf("Cannot get physical address of vidmem.\n");
+ return;
+ }
+ printf("Physical address of vidmem is %08lx\n", phys.addr);
+
+ DBAR1 = phys.addr;
+ }
+
+#if 0
+ LCCR0 |= LCCR0_LEN;
+
+ sa_control_egpio(IPAQ_EGPIO_LCD_ON, 1);
+
+ CTL_REG_WRITE(GPIO_BASE+GPIO_GPDR_OFF, 0xff << 2);
+ CTL_REG_WRITE(GPIO_BASE+GPIO_GPSR_OFF, 0);
+
+ sa_control_egpio(IPAQ_EGPIO_LCD_ON, 1);
+
+#endif
+ sa_lcd_light(1, 5);
+}
+
+/*
+ * Returns the address to the framebuffer, and does some initialisation
+ * stuff.
+ */
+static void *arm_lcd_h3800_fb(void)
+{
+ if (arm_driver_reserve_region(H3800_ASIC_BASE, 0x100000))
+ return NULL;
+ if (arm_driver_reserve_region(_LCCR0, 0x100000))
+ return NULL;
+ if (arm_driver_reserve_region(GPIO_BASE, 0x100000))
+ return NULL;
+
+ // get some frame buffer memory
+ if (!(sa_vidmem = l4dm_mem_allocate(0x100000,
+ L4DM_PINNED | L4DM_CONTIGUOUS |
+ L4RM_MAP | L4RM_LOG2_ALLOC)))
+ {
+ printf("Could not get video memory.\n");
+ return NULL;
+ }
+ printf("Video memory is at virtual %p\n", sa_vidmem);
+
+ // --------------------------------------------------------------------
+
+ //H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ | GPIO2_SD_DETECT | GPIO2_EAR_IN_N | GPIO2_USB_DETECT_N | GPIO2_SD_CON_SLT;
+
+ // This is all for the H3800 display
+ //*((unsigned short *) H3800_ASIC1_GPIO_MASK_ADDR) = H3800_ASIC1_GPIO_MASK_INIT;
+ //*((unsigned short *) H3800_ASIC1_GPIO_OUT_ADDR) = H3800_ASIC1_GPIO_OUT_INIT;
+ //*((unsigned short *) H3800_ASIC1_GPIO_DIR_ADDR) = H3800_ASIC1_GPIO_DIR_INIT;
+ //*((unsigned short *) H3800_ASIC1_GPIO_OUT_ADDR) = H3800_ASIC1_GPIO_OUT_INIT;
+
+ //sa_disable_controller();
+
+ {
+ int num_pixels;
+ unsigned short* bufp = (unsigned short*)LCD_FB_IMAGE(sa_vidmem, 16);
+
+ for (num_pixels = LCD_NUM_PIXELS(); num_pixels; num_pixels--)
+ {
+ *bufp++ = (unsigned short)num_pixels;
+ }
+ }
+
+
+ arm_lcd_h3800_enable();
+
+ return LCD_FB_IMAGE(sa_vidmem, 16);
+}
+
+static unsigned int arm_lcd_h3800_video_mem_size(void)
+{ return LCD_XRES * LCD_YRES * ((LCD_BPP + 7) >> 3); }
+
+static unsigned int arm_lcd_h3800_get_screen_width(void)
+{ return LCD_XRES; }
+
+static unsigned int arm_lcd_h3800_get_screen_height(void)
+{ return LCD_YRES; }
+
+static unsigned int arm_lcd_h3800_get_bpp(void)
+{ return LCD_BPP; }
+
+static unsigned int arm_lcd_h3800_get_bytes_per_line(void)
+{ return LCD_XRES * ((LCD_BPP + 7) >> 3); }
+
+static int get_fbinfo(l4re_fb_info_t *fbinfo)
+{
+
+ fbinfo->x_res = LCD_XRES;
+ fbinfo->y_res = LCD_YRES;
+ fbinfo->bits_per_pixel = LCD_BPP;
+ fbinfo->bytes_per_pixel = (LCD_BPP + 7) >> 3;
+ fbinfo->bytes_per_scan_line = ((LCD_BPP + 7) >> 3) * fbinfo->x_res;
+
+ fbinfo->r.shift = 0;
+ fbinfo->r.size = 5;
+ fbinfo->g.shift = 5;
+ fbinfo->g.size = 6;
+ fbinfo->b.shift = 11;
+ fbinfo->b.size = 5;
+
+ return 0;
+}
+
+
+static const char *arm_lcd_h3800_get_info(void)
+{ return "ARM LCD driver for IPAQ H3800 series"; }
+
+static int arm_lcd_h3800_probe(const char *configstr)
+{
+ (void)configstr;
+ return !l4io_lookup_device("H3800 LCD", NULL, 0, 0);
+}
+
+struct arm_lcd_ops arm_lcd_ops_h3800 = {
+ .probe = arm_lcd_h3800_probe,
+ .get_fb = arm_lcd_h3800_fb,
+ .get_fbinfo = get_fbinfo,
+ .get_video_mem_size = arm_lcd_h3800_video_mem_size,
+ .get_info = arm_lcd_h3800_get_info,
+ .enable = arm_lcd_h3800_enable,
+ .disable = arm_lcd_h3800_disable,
+};
+
+arm_lcd_register(&arm_lcd_ops_h3800);
--- /dev/null
+/*
+ * OMAP3 CLCD driver
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <l4/drivers/lcd.h>
+#include <l4/io/io.h>
+#include <l4/re/c/dataspace.h>
+#include <l4/re/c/mem_alloc.h>
+#include <l4/re/c/namespace.h>
+#include <l4/re/c/rm.h>
+#include <l4/re/c/util/cap_alloc.h>
+#include <l4/util/util.h>
+#include <l4/vbus/vbus.h>
+#include <l4/vbus/vbus_gpio.h>
+#include <l4/vbus/vbus_i2c.h>
+
+#include "lcd-omap3.h"
+
+enum {
+ /* Beagleboard mode assumes that U-Boot has set up everything and we
+ * basically just need to set the framebuffer address */
+ MODE_BEAGLEBOARD = 0,
+ MODE_EVM = 1,
+};
+
+static int lcd_mode;
+
+static inline int is_omap3evm(void) { return lcd_mode == MODE_EVM; }
+static inline int is_beagleboard(void) { return lcd_mode == MODE_BEAGLEBOARD; }
+
+static inline int width(void)
+{
+ if (is_omap3evm())
+ return 480;
+ if (is_beagleboard())
+ return 1280;
+ return 0;
+}
+
+static inline int height(void)
+{
+ if (is_omap3evm())
+ return 640;
+ if (is_beagleboard())
+ return 720;
+ return 0;
+}
+
+static inline int bytes_per_pixel(void)
+{ return 2; }
+
+static unsigned int fbmem_size(void)
+{ return height() * width() * bytes_per_pixel(); }
+
+
+static l4_addr_t omap_dss_virt_base;
+static void *fb_vaddr;
+static l4_addr_t fb_paddr;
+static l4_cap_idx_t vbus = L4_INVALID_CAP;
+static l4vbus_device_handle_t i2c_handle;
+static l4vbus_device_handle_t gpio_handle;
+
+static l4_umword_t read_dss_reg(unsigned reg)
+{
+ return *((volatile l4_umword_t *)(omap_dss_virt_base + reg));
+}
+
+static void write_dss_reg(unsigned reg, l4_umword_t val)
+{
+ *((volatile l4_umword_t *)(omap_dss_virt_base + reg)) = val;
+}
+
+static int disable_dss(void)
+{
+ l4_umword_t val = read_dss_reg(Reg_dispc_control);
+
+ /* check if digital output or the lcd output are enabled */
+ if (val & (Dispc_control_digitalenable | Dispc_control_lcdenable))
+ {
+ /*Disable the lcd output and digital output*/
+ val &= ~(Dispc_control_digitalenable | Dispc_control_lcdenable);
+ write_dss_reg(Reg_dispc_control, val);
+ write_dss_reg(Reg_dispc_irqstatus, Dispc_irqstatus_framedone);
+
+ l4_usleep(100);
+ if (!(read_dss_reg(Reg_dispc_irqstatus) & Dispc_irqstatus_framedone))
+ {
+ printf("OMAP LCD: Disable DSS timeout.\n");
+ return -1;
+ }
+ }
+ return 0;
+}
+
+static void reset_display_controller(void)
+{
+ disable_dss();
+
+ /* Reset the display controller. */
+ write_dss_reg(Reg_dispc_sysconfig, Dispc_sysconfig_softreset);
+
+ /* Wait until reset completes OR timeout occurs. */
+ l4_usleep(100);
+ if (!(read_dss_reg(Reg_dispc_sysstatus) & Dispc_sysstatus_resetdone))
+ {
+ printf("[LCD]: Warning: Reset DISPC timeout.\n");
+ }
+
+ l4_uint32_t reg_val = read_dss_reg(Reg_dispc_sysconfig);
+ reg_val &= ~Dispc_sysconfig_softreset;
+ write_dss_reg(Reg_dispc_sysconfig, reg_val);
+}
+
+static int enable_lcd_backlight(void)
+{
+ l4_uint8_t val;
+
+ val = 0x32;
+ if (l4vbus_i2c_write(vbus, i2c_handle, T2_I2C_LED_ADDR_GROUP, TRITON2_LED_LEDEN_REG, &val, 1))
+ return -1;
+
+ val = 0x7f;
+ if (l4vbus_i2c_write(vbus, i2c_handle, T2_I2C_LED_ADDR_GROUP, TRITON2_LED_PWMAON_REG, &val, 1))
+ return -1;
+
+ val = 0x7f;
+ if (l4vbus_i2c_write(vbus, i2c_handle, T2_I2C_LED_ADDR_GROUP, TRITON2_LED_PWMBON_REG, &val, 1))
+ return -1;
+
+ val = 0x7f;
+ if (l4vbus_i2c_write(vbus, i2c_handle, T2_I2C_LED_ADDR_GROUP, TRITON2_LED_PWMAOFF_REG, &val, 1))
+ return -1;
+
+ val = 0x7f;
+ if (l4vbus_i2c_write(vbus, i2c_handle, T2_I2C_LED_ADDR_GROUP, TRITON2_LED_PWMBOFF_REG, &val, 1))
+ return -1;
+
+ val = 0x0b;
+ if (l4vbus_i2c_write(vbus, i2c_handle, 0x4b, TRITON2_VDAC_DEDICATED, &val, 1))
+ return -1;
+
+ val = 0xe0;
+ if (l4vbus_i2c_write(vbus, i2c_handle, 0x4b, TRITON2_VDAC_DEV_GRP, &val, 1))
+ return -1;
+
+ return 0;
+}
+
+static int enable_lcd_power(void)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_VDD, 0))
+ return -1;
+ return 0;
+}
+
+#if 0
+static int disable_lcd_power(void)
+{
+ if (l4vbus_gpio_write(vbus, GPIO_NUM_VDD, 1))
+ return -1;
+ return 0;
+}
+#endif
+
+static int configure_vga_mode(void)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_QVGA_nVGA, 0))
+ return -1;
+ return 0;
+}
+
+static int configure_vert_scan_direction(int direction)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_UD, direction))
+ return -1;
+ return 0;
+}
+
+static int configure_horiz_scan_direction(int direction)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_LR, direction))
+ return -1;
+ return 0;
+}
+
+static int disable_lcd_reset(void)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_RESB, 0))
+ return -1;
+ l4_usleep(100);
+ return 0;
+}
+
+static int enable_lcd_HVIF(void)
+{
+ l4_umword_t val = read_dss_reg(Reg_dispc_pol_freq);
+ val |= ((0 << Dispc_pol_freq_rf_shift) |
+ (1 << Dispc_pol_freq_onoff_shift));
+ write_dss_reg(Reg_dispc_pol_freq, val);
+
+ return 0;
+}
+
+static int enable_lcd_reset(void)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_RESB, 1))
+ return -1;
+ return 0;
+}
+
+static int enable_INI(void)
+{
+ if (l4vbus_gpio_write(vbus, gpio_handle, GPIO_NUM_INI, 1))
+ return -1;
+ return 0;
+}
+
+#if 0
+static int disble_INI(void)
+{
+ if (l4vbus_gpio_write(vbus, GPIO_NUM_INI, 0))
+ return -1;
+ return 0;
+}
+#endif
+
+static void issue_go_lcd(void)
+{
+ l4_umword_t val = read_dss_reg(Reg_dispc_control);
+ val |= Dispc_control_golcd;
+ write_dss_reg(Reg_dispc_control, val);
+
+ l4_usleep(1000);
+ if (read_dss_reg(Reg_dispc_control) & Dispc_control_golcd)
+ {
+ printf("[LCD] Info: Update DISPC timeout.\n");
+ }
+}
+
+static void configure_dss_omap3evm(l4_addr_t frame_buffer)
+{
+ l4_uint32_t val;
+
+ val = read_dss_reg(Reg_dss_control);
+ val &= 0xfffffffe;
+ write_dss_reg(Reg_dss_control, val);
+
+ /* No standby, No idle,mormal mode, ocp clock free running */
+ //val = Dispc_sysconfig_midlemode_nstandby | Dispc_sysconfig_sidlemode_nidle;
+ //val &= ~Dispc_sysconfig_softreset ;
+ //write_dss_reg(Reg_dispc_sysconfig, val);
+ write_dss_reg(Reg_dispc_sysconfig, 0x2015);
+
+ /* Not enabling any interrupts */
+ write_dss_reg(Reg_dispc_irqenable, 0x00);
+
+ /* 2:1 - Frame Data only loaded every frame (10) */
+ write_dss_reg(Reg_dispc_config, Dispc_config_loadmode_frdatlefr);
+
+ /* Default Color is white */
+ write_dss_reg(Reg_dispc_default_colour0, 0xffffff & Default_colour_mask);
+
+ /* Default Transparency Color is black */
+ write_dss_reg(Reg_dispc_trans_colour0, 0xffffff & Transparency_colour_mask);
+
+ /*timing logic for HSYNC signal */
+ val = (38 << Dispc_timing_h_hbp_shift) |
+ (44 << Dispc_timing_h_hfp_shift) |
+ (2 << Dispc_timing_h_hsw_shift);
+ write_dss_reg(Reg_dispc_timing_h, val);
+
+ /*timing logic for VSYNC signal */
+ val = (1 << Dispc_timing_v_vbp_shift) |
+ (2 << Dispc_timing_v_vfp_shift) |
+ (1 << Dispc_timing_v_vsw_shift) ;
+ write_dss_reg(Reg_dispc_timing_v, val);
+
+ /*signal configuration*/
+ val = read_dss_reg(Reg_dispc_pol_freq);
+ val |= (0 << Dispc_pol_freq_rf_shift) |
+ (1 << Dispc_pol_freq_onoff_shift) |
+ (1 << Dispc_pol_freq_ipc_shift) |
+ (1 << Dispc_pol_freq_ihs_shift) |
+ (1 << Dispc_pol_freq_ivs_shift);
+ write_dss_reg(Reg_dispc_pol_freq, val);
+
+ /*configure the divisor*/
+ //val = (1 << Dispc_divisor_lcd_shift) | (3 << Dispc_divisor_pcd_shift);
+ //write_dss_reg(Dispc_divisor, val);
+ write_dss_reg(Reg_dispc_divisor, 0x10012);
+
+ /* Set panel size */
+ val = (((width() - 1) << Dispc_size_lcd_ppl_shift) & Dispc_size_lcd_ppl) |
+ (((height() - 1) << Dispc_size_lcd_lpp_shift) & Dispc_size_lcd_lpp);
+ write_dss_reg(Reg_dispc_size_lcd, val);
+
+ /* Set tft interface width */
+ val = read_dss_reg(Reg_dispc_control);
+ val &= ~Dispc_control_tftdatalines_oalsb16b;
+ val |= Dispc_control_tftdatalines_oalsb18b;
+ write_dss_reg(Reg_dispc_control, val);
+
+ /* Configure Graphics Window. */
+ write_dss_reg(Reg_dispc_gfx_ba0, frame_buffer);
+ write_dss_reg(Reg_dispc_gfx_ba1, frame_buffer);
+ write_dss_reg(Reg_dispc_gfx_position, 0);
+ val = (((width() - 1) << Dispc_gfx_size_ppl_shift) & Dispc_gfx_size_ppl) |
+ (((height() - 1) << Dispc_gfx_size_lpp_shift) & Dispc_gfx_size_lpp);
+ write_dss_reg(Reg_dispc_gfx_size, val);
+
+ val = read_dss_reg(Reg_dispc_gfx_attributes);
+ val |= (RGB16 << 1);
+ write_dss_reg(Reg_dispc_gfx_attributes, val);
+
+ val = (252 << Dispc_gfx_fifo_threshold_high_shift) |
+ (192 << Dispc_gfx_fifo_threshold_low_shift);
+ write_dss_reg(Reg_dispc_gfx_fifo_threshold, val);
+
+ /* Default row inc = 1. */
+ write_dss_reg(Reg_dispc_gfx_row_inc, 1);
+ /* Default pixel inc = 1. */
+ write_dss_reg(Reg_dispc_gfx_pixel_inc, 1);
+
+ /* Enable GFX pipeline */
+ val = read_dss_reg(Reg_dispc_gfx_attributes);
+ val |= Attributes_enable;
+ write_dss_reg(Reg_dispc_gfx_attributes, val);
+}
+
+
+static void configure_dss_beagleboard(l4_addr_t frame_buffer)
+{
+ // for beagleboard just set the framebuffer address and let it run,
+ // everything else is already configured by U-Boot
+ write_dss_reg(Reg_dispc_gfx_ba0, frame_buffer);
+ write_dss_reg(Reg_dispc_gfx_ba1, frame_buffer);
+}
+
+static void configure_dss(l4_addr_t frame_buffer)
+{
+ if (is_omap3evm())
+ configure_dss_omap3evm(frame_buffer);
+
+ if (is_beagleboard())
+ configure_dss_beagleboard(frame_buffer);
+
+ printf("[LCD] Info: Configured display controller.\n");
+}
+
+static void display_lcd_image(void)
+{
+
+ if (is_omap3evm())
+ {
+ l4_umword_t val;
+ /* Lcd output enabled, active display, 16-bit output */
+ val = Dispc_control_gpout1 |
+ Dispc_control_gpout0 |
+ Dispc_control_tftdatalines_oalsb18b |
+ Dispc_control_stntft |
+ Dispc_control_lcdenable;
+ val &= ~Dispc_control_rfbimode;
+ write_dss_reg(Reg_dispc_control, val);
+ }
+
+ issue_go_lcd();
+}
+
+static int configure_lcd(l4_addr_t frame_buffer)
+{
+ if (is_omap3evm())
+ {
+ reset_display_controller();
+ if (enable_lcd_backlight())
+ return -1;
+ if (enable_lcd_power())
+ return -1;
+ if (configure_vga_mode())
+ return -1;
+ disable_lcd_reset();
+ enable_lcd_HVIF();
+ enable_lcd_reset();
+ enable_INI();
+ configure_vert_scan_direction(CONV_SCAN_DIRECTION);
+ configure_horiz_scan_direction(CONV_SCAN_DIRECTION);
+ }
+
+ configure_dss(frame_buffer);
+
+ //enable_replication_logic(GFX_PIPELINE);
+ display_lcd_image();
+
+ return 0;
+}
+
+static
+int clcd_init(void)
+{
+ if (is_omap3evm())
+ {
+ vbus = l4re_get_env_cap("vbus");
+
+ if (l4_is_invalid_cap(vbus))
+ {
+ printf("[LCD] Error: Could not query <vbus> capability\n");
+ return -1;
+ }
+
+ if (l4vbus_get_device_by_hid(vbus, 0, &i2c_handle, "i2c", 0, 0))
+ {
+ printf("[LCD] Error: Could not find <i2c> vbus device\n");
+ return -1;
+ }
+
+ if (l4vbus_get_device_by_hid(vbus, 0, &gpio_handle, "gpio", 0, 0))
+ {
+ printf("[LCD] Error: Could not find <gpio> vbus device\n");
+ return -L4_ENODEV;
+ }
+ }
+
+ return configure_lcd(fb_paddr);
+}
+
+static void setup_memory(void)
+{
+ int ret;
+
+ l4_size_t phys_size;
+
+ if (fb_vaddr)
+ return;
+
+ ret = l4io_request_iomem(0x48050000, 0x1000, 0, &omap_dss_virt_base);
+ if (ret)
+ {
+ printf("[LCD] Error: Could not map device memory\n");
+ return;
+ }
+
+ // get some frame buffer
+ l4re_ds_t mem = l4re_util_cap_alloc();
+ if (l4_is_invalid_cap(mem))
+ return;
+
+ if (l4re_ma_alloc(fbmem_size(), mem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED))
+ {
+ printf("[LCD] Error: Could not allocate memory\n");
+ return;
+ }
+
+ fb_vaddr = 0;
+ if (l4re_rm_attach(&fb_vaddr, fbmem_size(),
+ L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP,
+ mem, 0, L4_PAGESHIFT))
+ {
+ printf("[LCD] Error: Could not attach memory\n");
+ return;
+ }
+
+ printf("[LCD] Info: Video memory is at virtual %p (size: 0x%x Bytes)\n",
+ fb_vaddr, fbmem_size());
+
+ // get physical address
+ if (l4re_ds_phys(mem, 0, &fb_paddr, &phys_size)
+ || phys_size != fbmem_size())
+ {
+ printf("[LCD] Error: Could not get physical address\n");
+ return;
+ }
+ printf("[LCD] Info: Physical video memory is at %p\n", (void *)fb_paddr);
+}
+
+
+static int lcd_probe(const char *configstr)
+{
+ lcd_mode = MODE_BEAGLEBOARD;
+
+ if (configstr &&
+ (strstr(configstr, "evm")
+ || strstr(configstr, "init")))
+ lcd_mode = MODE_EVM;
+
+ return !l4io_lookup_device("OMAP_LCD", NULL, 0, 0);
+}
+
+static void *lcd_get_fb(void)
+{
+ if (!fb_vaddr)
+ setup_memory();
+
+ return fb_vaddr;
+}
+
+static unsigned int lcd_fbmem_size(void) { return fbmem_size(); }
+
+static const char *lcd_get_info(void)
+{
+ if (is_beagleboard())
+ return "ARM OMAP3 Beagleboard LCD";
+
+ if (is_omap3evm())
+ return "ARM OMAP3EVM LCD";
+
+ return "ARM OMAP3EVM unknown";
+}
+
+static int get_fbinfo(l4re_video_view_info_t *vinfo)
+{
+ vinfo->width = width();
+ vinfo->height = height();
+ vinfo->bytes_per_line = bytes_per_pixel() * vinfo->width;
+
+ vinfo->pixel_info.bytes_per_pixel = bytes_per_pixel();
+ vinfo->pixel_info.r.shift = 0;
+ vinfo->pixel_info.r.size = 5;
+ vinfo->pixel_info.g.shift = 5;
+ vinfo->pixel_info.g.size = 6;
+ vinfo->pixel_info.b.shift = 11;
+ vinfo->pixel_info.b.size = 5;
+ vinfo->pixel_info.a.shift = 0;
+ vinfo->pixel_info.a.size = 0;
+ return 0;
+}
+
+static void lcd_enable(void)
+{
+ setup_memory();
+
+ if (clcd_init())
+ {
+ printf("CLCD init failed!\n");
+ return;
+ }
+}
+
+static void lcd_disable(void)
+{
+ printf("%s unimplemented.\n", __func__);
+}
+
+static struct arm_lcd_ops arm_lcd_ops_omap3 = {
+ .probe = lcd_probe,
+ .get_fb = lcd_get_fb,
+ .get_fbinfo = get_fbinfo,
+ .get_video_mem_size = lcd_fbmem_size,
+ .get_info = lcd_get_info,
+ .enable = lcd_enable,
+ .disable = lcd_disable,
+};
+
+arm_lcd_register(&arm_lcd_ops_omap3);
--- /dev/null
+#pragma once
+
+enum
+{
+ Reg_dss_control = 0x40,
+};
+
+enum
+{
+ Reg_dispc_revision = 0x400,
+ Reg_dispc_sysconfig = 0x410,
+ Reg_dispc_sysstatus = 0x414,
+ Reg_dispc_irqstatus = 0x418,
+ Reg_dispc_irqenable = 0x41C,
+ Reg_dispc_control = 0x440,
+ Reg_dispc_config = 0x444,
+ Reg_dispc_capable = 0x448,
+ Reg_dispc_default_colour0 = 0x44C,
+ Reg_dispc_default_colour1 = 0x450,
+ Reg_dispc_trans_colour0 = 0x454,
+ Reg_dispc_trans_colour1 = 0x458,
+ Reg_dispc_line_status = 0x45C,
+ Reg_dispc_line_number = 0x460,
+ Reg_dispc_timing_h = 0x464,
+ Reg_dispc_timing_v = 0x468,
+ Reg_dispc_pol_freq = 0x46C,
+ Reg_dispc_divisor = 0x470,
+ Reg_dispc_size_dig = 0x478,
+ Reg_dispc_size_lcd = 0x47C,
+ Reg_dispc_gfx_ba0 = 0x480,
+ Reg_dispc_gfx_ba1 = 0x484,
+ Reg_dispc_gfx_position = 0x488,
+ Reg_dispc_gfx_size = 0x48C,
+ Reg_dispc_gfx_attributes = 0x4A0,
+ Reg_dispc_gfx_fifo_threshold = 0x4A4,
+ Reg_dispc_gfx_fifo_size_status = 0x4A8,
+ Reg_dispc_gfx_row_inc = 0x4AC,
+ Reg_dispc_gfx_pixel_inc = 0x4B0,
+ Reg_dispc_gfx_window_skip = 0x4B4,
+ Reg_dispc_gfx_table_ba = 0x4B8,
+};
+
+enum
+{
+ Default_colour_mask = 0x0FFFFFF,
+ Transparency_colour_mask = 0x0FFFFFF,
+ X_pos_mask = 0x00007FF,
+ Y_pos_mask = 0x00007FF,
+ Pixel_inc_mask = 0x000FFFF,
+ Attributes_enable = (1 << 0),
+};
+
+/* DISPC_CONTROL register fields. */
+#define Dispc_control_gpout1 (1 << 16)
+#define Dispc_control_gpout0 (1 << 15)
+#define Dispc_control_rfbimode (1 << 11)
+#define Dispc_control_tftdatalines_oalsb24b (3 << 8)
+#define Dispc_control_tftdatalines_oalsb18b (2 << 8)
+#define Dispc_control_tftdatalines_oalsb16b (1 << 8)
+#define Dispc_control_godigital (1 << 6)
+#define Dispc_control_golcd (1 << 5)
+#define Dispc_control_stntft (1 << 3)
+#define Dispc_control_digitalenable (1 << 1)
+#define Dispc_control_lcdenable (1 << 0)
+
+/* DISPC_SYSCONFIG register fields. */
+#define Dispc_sysconfig_midlemode_nstandby (1 << 12)
+#define Dispc_sysconfig_sidlemode_nidle (1 << 3)
+#define Dispc_sysconfig_softreset (1 << 1)
+
+/* DISPC_SYSSTATUS register field. */
+#define Dispc_sysstatus_resetdone (1 << 0)
+
+/* DISPC_CONFIG register fields. */
+#define Dispc_config_palettegammatable (1 << 3)
+#define Dispc_config_loadmode_frdatlefr (1 << 2)
+#define Dispc_config_loadmode_pgtabusetb (1 << 1)
+
+/* DISPC_TIMING_H register fields. */
+#define Dispc_timing_h_hbp_shift (20)
+#define Dispc_timing_h_hfp_shift (8)
+#define Dispc_timing_h_hsw_shift (0)
+
+/* DISPC_TIMING_V register fields. */
+#define Dispc_timing_v_vbp_shift (20)
+#define Dispc_timing_v_vfp_shift (8)
+#define Dispc_timing_v_vsw_shift (0)
+
+/* DISPC_POL_FREQ register fields. */
+#define Dispc_pol_freq_ihs (1 << 13)
+#define Dispc_pol_freq_rf_shift (16)
+#define Dispc_pol_freq_onoff_shift (17)
+#define Dispc_pol_freq_ipc_shift (14)
+#define Dispc_pol_freq_ihs_shift (13)
+#define Dispc_pol_freq_ivs_shift (12)
+
+/* DISPC_DIVISOR. */
+#define Dispc_divisor_lcd_shift (16)
+#define Dispc_divisor_pcd_shift (0)
+
+/* DISPC_SIZE_LCD register fields. */
+#define Dispc_size_lcd_lpp (0x7FF << 16)
+#define Dispc_size_lcd_lpp_shift (16)
+#define Dispc_size_lcd_ppl (0x7FF)
+#define Dispc_size_lcd_ppl_shift (0)
+
+/* DISPC_GFX_SIZE register fields. */
+#define Dispc_gfx_size_lpp (0x7FF << 16)
+#define Dispc_gfx_size_lpp_shift (16)
+#define Dispc_gfx_size_ppl (0x7FF)
+#define Dispc_gfx_size_ppl_shift (0)
+
+/* DISPC_ATTRIBUTES register fields. */
+#define Dispc_attributes_gfxenable (1 << 0)
+#define Dispc_gfx_attributes_replication_en (1 << 5)
+#define Dispc_vid_attributes_replication_en (1 << 10)
+
+/* DISPC_GFX_FIFO_THRESHOLD register fields. */
+#define Dispc_gfx_fifo_threshold_high_shift (16)
+#define Dispc_gfx_fifo_threshold_low_shift (0)
+#define Dispc_fifo_threshold_high (225)
+#define Dispc_fifo_threshold_low (194)
+
+/* DISPC_IRQSTATUS registerr fields. */
+#define Dispc_irqstatus_framedone (1 << 0)
+
+/* Image Formats. */
+#define BITMAP1 (0x0)
+#define BITMAP2 (0x1)
+#define BITMAP4 (0x2)
+#define BITMAP8 (0x3)
+#define RGB12 (0x4)
+#define RGB16 (0x6)
+#define RGB24 (0x8)
+#define YUV422 (0xA)
+#define UYVY422 (0xB)
+
+
+#define GPIO_NUM_RESB 155
+#define GPIO_NUM_QVGA_nVGA 154
+#define GPIO_NUM_VDD 153
+#define GPIO_NUM_INI 152
+#define GPIO_NUM_LR 2
+#define GPIO_NUM_UD 3
+
+
+#define CONV_SCAN_DIRECTION 1
+#define INVR_SCAN_DIRECTION 0
+
+#define T2_I2C_LED_ADDR_GROUP 0x4a
+#define T2_I2C_XXX_ADDR_GROUP 0x4b
+
+/* Triton2 power module registers */
+#define TRITON2_LED_LEDEN_REG 0xee
+#define TRITON2_LED_PWMAON_REG 0xef
+#define TRITON2_LED_PWMAOFF_REG 0xf0
+#define TRITON2_LED_PWMBON_REG 0xf1
+#define TRITON2_LED_PWMBOFF_REG 0xf2
+#define TRITON2_VDAC_DEDICATED 0x91
+#define TRITON2_VDAC_DEV_GRP 0x8e
--- /dev/null
+/*
+ * LCD driver for s3c2410
+ */
+
+#include <l4/drivers/lcd.h>
+#include <stdlib.h>
+#include <stdio.h>
+
+#include <l4/re/c/dataspace.h>
+#include <l4/re/c/rm.h>
+#include <l4/re/c/util/cap_alloc.h>
+#include <l4/re/c/mem_alloc.h>
+#include <l4/io/io.h>
+
+#define LCD_NAME "LCD s3c2410"
+
+static void *fb_vaddr;
+static l4_addr_t fb_paddr;
+
+enum {
+ LCDCON1 = 0x00,
+ LCDCON2 = 0x04,
+ LCDCON3 = 0x08,
+ LCDCON4 = 0x0c,
+ LCDCON5 = 0x10,
+ LCDSADDR1 = 0x14,
+ LCDSADDR2 = 0x18,
+ LCDSADDR3 = 0x1c,
+
+ WIDTH = 480,
+ HEIGHT = 640,
+
+ LCDCON1_ENABLE_BIT = 1,
+ LCDCON1_BPPMODE_16BPP = 0xc << 1,
+ LCDCON1_PNRMODE_LCD = 3 << 5,
+ LCDCON1_CLKVAL = 0,
+ LCDCON1_ENABLE_VALUE = LCDCON1_ENABLE_BIT | LCDCON1_BPPMODE_16BPP
+ | LCDCON1_PNRMODE_LCD | LCDCON1_CLKVAL,
+
+ LCDCON2_LINEVAL = (HEIGHT-1) << 14,
+ LCDCON2_ENABLE_VALUE = LCDCON2_LINEVAL,
+
+ LCDCON3_HOZVAL = (WIDTH-1) << 8,
+ LCDCON3_ENABLE_VALUE = LCDCON3_HOZVAL,
+
+ LCDCON4_ENABLE_VALUE = 7,
+
+ LCDCON5_PWREN = 1 << 3,
+ LCDCON5_FRM565 = 1 << 11,
+ LCDCON5_ENABLE_VALUE = LCDCON5_PWREN | LCDCON5_FRM565 | 1,
+
+
+// wr(0x00000179 & ~LCDCON1_ENABLE_BIT, LCDCON1);
+// wr(0x019fc3c1, LCDCON2);
+// wr(0x0039df67, LCDCON3);
+// wr(0x00000007, LCDCON4);
+// wr(0x00000f09, LCDCON5);
+};
+
+static const char *arm_lcd_get_info(void)
+{ return "S3C2410"; }
+
+static int probe(const char *configstr)
+{
+ (void)configstr;
+ return !l4io_lookup_device(LCD_NAME, NULL, 0, 0);
+}
+
+static unsigned int fbmem_size(void) { return (1 << 22); } //height() * bpl(); }
+
+static unsigned long lcd_control_virt_base;
+
+static int get_fbinfo(l4re_video_view_info_t *vinfo)
+{
+ vinfo->width = 480;
+ vinfo->width = 640;
+ vinfo->bytes_per_line = 2 * vinfo->width;
+
+ vinfo->pixel_info.bytes_per_pixel = 2;
+ vinfo->pixel_info.r.shift = 0;
+ vinfo->pixel_info.r.size = 5;
+ vinfo->pixel_info.g.shift = 5;
+ vinfo->pixel_info.g.size = 6;
+ vinfo->pixel_info.b.shift = 11;
+ vinfo->pixel_info.b.size = 5;
+ vinfo->pixel_info.a.shift = 0;
+ vinfo->pixel_info.a.size = 0;
+
+ return 0;
+}
+
+
+static void setup_memory(void)
+{
+ l4_size_t phys_size;
+ l4io_device_handle_t dh;
+ l4io_resource_handle_t hdl;
+
+
+ if (fb_vaddr)
+ return;
+
+ if (l4io_lookup_device(LCD_NAME, &dh, 0, &hdl))
+ {
+ printf("Could not get s3c2410fb\n");
+ return;
+ }
+ lcd_control_virt_base = l4io_request_resource_iomem(dh, &hdl);
+
+ if (lcd_control_virt_base == 0)
+ {
+ printf("Could not map controller space for '%s'\n", arm_lcd_get_info());
+ return;
+ }
+
+ // get some frame buffer
+ l4re_ds_t mem = l4re_util_cap_alloc();
+ if (l4_is_invalid_cap(mem))
+ return;
+
+ if (l4re_ma_alloc(fbmem_size(), mem, L4RE_MA_CONTINUOUS | L4RE_MA_PINNED))
+ {
+ printf("Could not get video memory.\n");
+ return;
+ }
+
+ fb_vaddr = 0;
+ if (l4re_rm_attach(&fb_vaddr, fbmem_size(),
+ L4RE_RM_SEARCH_ADDR | L4RE_RM_EAGER_MAP,
+ mem, 0, L4_PAGESHIFT))
+
+ {
+ printf("Could not map fb\n");
+ return;
+ }
+
+ printf("Video memory is at virtual %p (size: 0x%x Bytes)\n",
+ fb_vaddr, fbmem_size());
+
+ // get physical address
+ if (l4re_ds_phys(mem, 0, &fb_paddr, &phys_size)
+ || phys_size != fbmem_size())
+ {
+ printf("Getting the physical address failed or not contiguous\n");
+ return;
+ }
+ printf("Physical video memory is at %p\n", (void *)fb_paddr);
+}
+
+static inline void wr(unsigned long val, unsigned long regoff)
+{ *(volatile unsigned long *)(lcd_control_virt_base + regoff) = val; }
+static inline unsigned long rd(unsigned long regoff)
+{ return *(volatile unsigned long *)(lcd_control_virt_base + regoff); }
+
+static void *fb(void)
+{
+ if (!fb_vaddr)
+ setup_memory();
+
+ return fb_vaddr;
+}
+
+#if 0
+s3c2410fb: devinit
+s3c2410fb: got LCD region
+s3c2410fb: got and enabled clock
+s3c2410fb: map_video_memory(fbi=c04ce274)
+ s3c2410fb: map_video_memory: clear ffc00000:0012c000
+ s3c2410fb: map_video_memory: dma=30600000 cpu=ffc00000 size=0012c000
+ s3c2410fb: got video memory
+ s3c2410fb: LCDSADDR1 = 0x18300000
+ s3c2410fb: LCDSADDR2 = 0x1834b000
+ s3c2410fb: LCDSADDR3 = 0x000001e0
+ s3c2410fb: LPCSEL = 0x00000cf0
+ s3c2410fb: replacing TPAL 00000000
+ s3c2410fb: check_var(var=c04ce008, info=c04ce000)
+ s3c2410fb: s3c2410fb_activate_var: var->xres = 480
+ s3c2410fb: s3c2410fb_activate_var: var->yres = 640
+ s3c2410fb: s3c2410fb_activate_var: var->bpp = 16
+ s3c2410fb: setting vert: up=2, low=16, sync=2
+ s3c2410fb: setting horz: lft=104, rt=8, sync=8
+ s3c2410fb: new register set:
+ s3c2410fb: lcdcon[1] = 0x00000179
+ s3c2410fb: lcdcon[2] = 0x019fc3c1
+ s3c2410fb: lcdcon[3] = 0x0039df67
+ s3c2410fb: lcdcon[4] = 0x00000007
+ s3c2410fb: lcdcon[5] = 0x00000f09
+ s3c2410fb: LCDSADDR1 = 0x18300000
+ s3c2410fb: LCDSADDR2 = 0x1834b000
+ s3c2410fb: LCDSADDR3 = 0x000001e0
+ Console: switching to colour frame buffer device 80x58
+ fb0: s3c2410fb frame buffer device
+#endif
+
+static void pl110_enable(void)
+{
+ setup_memory();
+
+ wr(0x00000179 & ~LCDCON1_ENABLE_BIT, LCDCON1);
+ wr(0x019fc3c1, LCDCON2);
+ wr(0x0039df67, LCDCON3);
+ wr(0x00000007, LCDCON4);
+ wr(0x00000f09, LCDCON5);
+#if 0
+ wr(LCDCON1_ENABLE_VALUE & ~LCDCON1_ENABLE_BIT, LCDCON1);
+ wr(LCDCON2_ENABLE_VALUE, LCDCON2);
+ wr(LCDCON3_ENABLE_VALUE, LCDCON3);
+ wr(LCDCON4_ENABLE_VALUE, LCDCON4);
+ wr(LCDCON5_ENABLE_VALUE, LCDCON5);
+#endif
+
+
+ wr(fb_paddr >> 1, LCDSADDR1);
+ wr((fb_paddr + 640*480*2) >> 1, LCDSADDR2);
+ wr(480, LCDSADDR3);
+
+ wr(0x00000179, LCDCON1);
+ {
+// int i = 0;
+ // for (; i < 0x20; i+=4)
+ // printf("%02x: %08lx\n", i, rd(i));
+ }
+}
+
+static void pl110_disable(void)
+{
+}
+static struct arm_lcd_ops arm_lcd_ops_pl110 = {
+ .probe = probe,
+ .get_fb = fb,
+ .get_fbinfo = get_fbinfo,
+ .get_video_mem_size = fbmem_size,
+ .get_info = arm_lcd_get_info,
+ .enable = pl110_enable,
+ .disable = pl110_disable,
+};
+
+arm_lcd_register(&arm_lcd_ops_pl110);
--- /dev/null
+/*
+ * Tegra2 FB driver (just pass-through, must be init'ed by boot-loader)
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <l4/drivers/lcd.h>
+#include <l4/io/io.h>
+#include <l4/util/util.h>
+
+static inline int width(void) { return 1280; }
+static inline int height(void) { return 900; }
+static inline int bytes_per_pixel(void) { return 2; }
+
+static unsigned int fbmem_size(void)
+{ return height() * width() * bytes_per_pixel(); }
+
+static void *fb_vaddr;
+
+static void setup_memory(void)
+{
+ l4_addr_t fb_paddr;
+ l4_addr_t a = 0;
+ int ret;
+
+ if (fb_vaddr)
+ return;
+
+ fb_paddr = 0x1c012000;
+ ret = l4io_request_iomem(fb_paddr, 0x500000, 0, &a);
+ if (ret)
+ {
+ printf("[LCD] Error: Could not map device memory\n");
+ return;
+ }
+
+ fb_vaddr = (void *)a;
+
+ printf("[LCD] Info: Video memory is at virtual %p (size: 0x%x Bytes)\n",
+ fb_vaddr, fbmem_size());
+ printf("[LCD] Info: Physical video memory is at %p\n", (void *)fb_paddr);
+}
+
+
+static int lcd_probe(const char *configstr)
+{
+ (void)configstr;
+ return !l4io_lookup_device("FBMEM", NULL, 0, 0);
+}
+
+static void *lcd_get_fb(void)
+{
+ if (!fb_vaddr)
+ setup_memory();
+
+ return fb_vaddr;
+}
+
+static unsigned int lcd_fbmem_size(void) { return fbmem_size(); }
+
+static const char *lcd_get_info(void)
+{
+ return "TEGRA2 FASTBOOT init'ed FB";
+}
+
+static int get_fbinfo(l4re_video_view_info_t *vinfo)
+{
+ vinfo->width = width();
+ vinfo->height = height();
+ vinfo->bytes_per_line = bytes_per_pixel() * vinfo->width;
+
+ vinfo->pixel_info.bytes_per_pixel = bytes_per_pixel();
+ vinfo->pixel_info.r.shift = 11;
+ vinfo->pixel_info.r.size = 5;
+ vinfo->pixel_info.g.shift = 5;
+ vinfo->pixel_info.g.size = 6;
+ vinfo->pixel_info.b.shift = 0;
+ vinfo->pixel_info.b.size = 5;
+ vinfo->pixel_info.a.shift = 0;
+ vinfo->pixel_info.a.size = 0;
+ return 0;
+}
+
+static void lcd_enable(void)
+{
+ setup_memory();
+}
+
+static void lcd_disable(void)
+{
+ printf("%s unimplemented.\n", __func__);
+}
+
+static struct arm_lcd_ops arm_lcd_ops_omap3 = {
+ .probe = lcd_probe,
+ .get_fb = lcd_get_fb,
+ .get_fbinfo = get_fbinfo,
+ .get_video_mem_size = lcd_fbmem_size,
+ .get_info = lcd_get_info,
+ .enable = lcd_enable,
+ .disable = lcd_disable,
+};
+
+arm_lcd_register(&arm_lcd_ops_omap3);
--- /dev/null
+/*
+ * Dummy LCD driver
+ */
+
+#include <l4/drivers/lcd.h>
+#include <stdlib.h>
+
+static const char *arm_lcd_none_get_info(void)
+{ return "ARM LCD virtual driver"; }
+
+static void void_dummy(void) {}
+
+static int probe(const char *c) { (void)c; return 0; }
+static unsigned int mem_size(void) { return 200 * 320 * 4; }
+static void *fb(void) { return malloc(mem_size()); }
+
+static int get_fbinfo(l4re_video_view_info_t *vinfo)
+{
+ vinfo->width = 320;
+ vinfo->width = 200;
+ vinfo->bytes_per_line = 4 * vinfo->width;
+
+ vinfo->pixel_info.bytes_per_pixel = 4;
+ vinfo->pixel_info.r.shift = 0;
+ vinfo->pixel_info.r.size = 8;
+ vinfo->pixel_info.g.shift = 8;
+ vinfo->pixel_info.g.size = 8;
+ vinfo->pixel_info.b.shift = 16;
+ vinfo->pixel_info.b.size = 8;
+ vinfo->pixel_info.a.shift = 0;
+ vinfo->pixel_info.a.size = 0;
+
+ return 0;
+}
+
+static struct arm_lcd_ops arm_lcd_ops_virtual = {
+ .probe = probe,
+ .get_fbinfo = get_fbinfo,
+ .get_fb = fb,
+ .get_video_mem_size = mem_size,
+ .get_info = arm_lcd_none_get_info,
+ .enable = void_dummy,
+ .disable = void_dummy,
+};
+
+arm_lcd_register(&arm_lcd_ops_virtual);
--- /dev/null
+/*
+ * Some generic functions for LCD drivers.
+ */
+
+#include <l4/drivers/lcd.h>
+
+enum { nr_drivers = 10 };
+static struct arm_lcd_ops *ops[nr_drivers];
+static int ops_alloced;
+
+struct arm_lcd_ops *arm_lcd_probe(const char *configstr)
+{
+ int i;
+
+ for (i = 0; i < ops_alloced; i++)
+ if (ops[i]->probe && ops[i]->probe(configstr))
+ return ops[i];
+
+ return NULL;
+}
+
+void arm_lcd_register_driver(struct arm_lcd_ops *_ops)
+{
+ if (ops_alloced < nr_drivers)
+ ops[ops_alloced++] = _ops;
+}
L4DIR ?= $(PKGDIR)/../..
TARGET = ex_vcpu
-SYSTEMS = amd64-l4f arm-l4f x86-l4f
SRC_CC = vcpu.cc
+REQUIRES_LIBS = libvcpu
include $(L4DIR)/mk/prog.mk
#include <l4/sys/ipc.h>
#include <l4/sys/thread>
#include <l4/sys/factory>
+#include <l4/sys/scheduler>
#include <l4/sys/utcb.h>
#include <l4/sys/kdebug.h>
#include <l4/util/util.h>
#include <l4/re/env>
#include <l4/re/util/cap_alloc>
#include <l4/sys/debugger.h>
+#include <l4/vcpu/vcpu>
#include <l4/re/error_helper>
using L4Re::chksys;
+using L4Re::chkcap;
static L4::Cap<L4::Irq> irq;
static char thread_stack[8 << 10];
static char hdl_stack[8 << 10];
-static L4::Cap<L4::Thread> vcpu;
static L4::Cap<L4::Task> vcpu_task;
+static L4vcpu::Vcpu *vcpu;
-typedef l4_vcpu_state_t SSA;
+const l4_addr_t super_code_map_addr = 0x10000;
+extern char my_super_code[];
+extern char my_super_code_excp[];
+extern char my_super_code_excp_after[];
+
+#if defined(ARCH_x86) || defined(ARCH_amd64)
-static SSA *vcpu_state;
-static l4_umword_t volatile *vcpu_psr;
static unsigned long gs;
static unsigned long ds;
-
-
-extern char my_super_code[];
-
-#if defined __amd64__ || defined __i386__
asm
(
- ".p2align 12\n"
- ".global my_super_code \n"
- "my_super_code: \n"
- "1: add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; add $4, %eax; ud2a; add $4, %eax; add $4, %eax;add $4, %eax; add $4, %eax; jmp 1b \n"
+ ".p2align 12 \t\n"
+ ".global my_super_code \t\n"
+ ".global my_super_code_excp \t\n"
+ ".global my_super_code_excp_after \t\n"
+ "my_super_code: \t\n"
+ "1: add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ "my_super_code_excp: \t\n"
+ " ud2a \t\n"
+ "my_super_code_excp_after: \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " add $4, %eax \t\n"
+ " jmp 1b \t\n"
);
-static void print_upc()
+static void setup_user_state_arch(L4vcpu::Vcpu *v)
{
- printf("upcall %lx %lx %lx\n", vcpu_state->r.trapno, vcpu_state->r.err, vcpu_state->r.pfa);
-}
-
-static void print_state()
-{
- l4_umword_t psr = *vcpu_psr;
- printf("EIP=%08lx ESP=%08lx PSR=%08lx\n"
- "EAX=%08lx EBX=%08lx ECX=%08lx EDX=%08lx\n"
- "ESI=%08lx EDI=%08lx EBP=%08lx\n"
-#ifndef __amd64__
- "DS=%04lx ES=%04lx FS=%04lx GS=%04lx\n"
-#endif
- "TAG=%08lx SRC=%08lx SPSR=%08lx\n",
- vcpu_state->r.ip,
- vcpu_state->r.sp,
- psr,
- vcpu_state->r.ax,
- vcpu_state->r.bx,
- vcpu_state->r.cx,
- vcpu_state->r.dx,
- vcpu_state->r.si,
- vcpu_state->r.di,
- vcpu_state->r.bp,
+ asm volatile ("mov %%gs, %0" : "=r"(gs));
+ asm volatile ("mov %%ds, %0" : "=r"(ds));
#ifndef __amd64__
- vcpu_state->r.ds,
- vcpu_state->r.es,
- vcpu_state->r.fs,
- vcpu_state->r.gs,
+ v->r()->gs = ds;
+ v->r()->fs = ds;
+ v->r()->es = ds;
+ v->r()->ds = ds;
#endif
- vcpu_state->i.tag.raw,
- vcpu_state->i.label,
- vcpu_state->saved_state);
+ v->r()->ss = ds;
}
-static bool is_page_fault(SSA const *v)
-{ return v->r.trapno == 0xe; }
-
-
-static void setup_user_state(SSA *v)
+static void handler_prolog()
{
- asm volatile ("mov %%gs, %0" : "=r"(gs));
- asm volatile ("mov %%ds, %0" : "=r"(ds));
- v->saved_state = 0x27;
-#ifndef __amd64__
- v->r.gs = ds;
- v->r.fs = ds;
- v->r.es = ds;
- v->r.ds = ds;
-#endif
- v->r.ss = ds;
- v->r.ip = 0x10000;
- v->r.sp = 0x40000;
+ asm volatile ("mov %0, %%es \t\n"
+ "mov %0, %%ds \t\n"
+ "mov %1, %%gs \t\n"
+ : : "r"(ds), "r"(gs));
}
-#elif defined __arm__
+#elif defined(ARCH_arm)
asm
(
- ".p2align 12\n"
- ".global my_super_code \n"
- "my_super_code: \n"
- "1: add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4; swi 0; mrc 8, 0, r0, cr7, cr14\n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " add r0, r0, #4 \n"
- " b 1b \n"
+ ".p2align 12 \t\n"
+ ".global my_super_code \t\n"
+ ".global my_super_code_excp \t\n"
+ ".global my_super_code_excp_after \t\n"
+ "my_super_code: \t\n"
+ "1: add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ "my_super_code_excp: \t\n"
+ " swi 0 \t\n"
+ "my_super_code_excp_after: \t\n"
+ " mrc 8, 0, r0, cr7, cr14 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " add r0, r0, #4 \t\n"
+ " b 1b \t\n"
);
-static void print_upc()
-{
- printf("upcall %lx %lx\n", vcpu_state->r.err, vcpu_state->r.pfa);
-}
+static void setup_user_state_arch(L4vcpu::Vcpu *) { }
+static void handler_prolog() {}
-static void print_state()
-{
- l4_umword_t psr = *vcpu_psr;
- printf("R[00]: %08lx %08lx %08lx %08lx\n"
- "R[04]: %08lx %08lx %08lx %08lx\n"
- "R[08]: %08lx %08lx %08lx %08lx\n"
- "R[12]: %08lx %08lx %08lx %08lx\n"
- "PSR=%08lx\n"
- "TAG=%08lx SRC=%08lx SPSR=%08lx\n",
- vcpu_state->r.r[0],
- vcpu_state->r.r[1],
- vcpu_state->r.r[2],
- vcpu_state->r.r[3],
- vcpu_state->r.r[4],
- vcpu_state->r.r[5],
- vcpu_state->r.r[6],
- vcpu_state->r.r[7],
- vcpu_state->r.r[8],
- vcpu_state->r.r[9],
- vcpu_state->r.r[10],
- vcpu_state->r.r[11],
- vcpu_state->r.r[12],
- vcpu_state->r.sp,
- vcpu_state->r.lr,
- vcpu_state->r.ip,
- psr,
- vcpu_state->i.tag.raw,
- vcpu_state->i.label,
- vcpu_state->saved_state);
-}
-
-static bool is_page_fault(SSA const *v)
-{ return (v->r.err & 0xf00000) == 0x300000; }
-
-static void setup_user_state(SSA *v)
-{
- v->saved_state = 0x27;
- v->r.ip = 0x10000;
- v->r.sp = 0x40000;
-}
+#elif defined(ARCH_ppc32)
+asm
+(
+ ".p2align 12 \t\n"
+ ".global my_super_code \t\n"
+ ".global my_super_code_excp \t\n"
+ ".global my_super_code_excp_after \t\n"
+ "my_super_code: \t\n"
+ "1: addi %r4, %r4, 4 \t\n"
+ " addi %r4, %r4, 4 \t\n"
+ " addi %r4, %r4, 4 \t\n"
+ "my_super_code_excp: \t\n"
+ " trap \t\n"
+ "my_super_code_excp_after: \t\n"
+ " addi %r4, %r4, 4 \t\n"
+ " addi %r4, %r4, 4 \t\n"
+ " addi %r4, %r4, 4 \t\n"
+ " b 1b \t\n"
+ );
+static void setup_user_state_arch(L4vcpu::Vcpu *) { }
+static void handler_prolog() {}
+#else
+#error Add your architecture.
#endif
static void handler(void)
{
+ handler_prolog();
-#if defined __amd64__ || defined __i386__
- asm volatile (
- "mov %0, %%es \t\n"
- "mov %0, %%ds \t\n"
- "mov %1, %%gs \t\n" : : "r"(ds), "r"(gs));
-#endif
-//upc:
- print_upc();
-#if 0
- l4_umword_t psr = *vcpu_psr;
-#endif
- print_state();
+ vcpu->state()->clear(L4_VCPU_F_EXCEPTIONS);
-#if 0
- *vcpu_psr |= 1;
- if (psr & 2)
- {
- vcpu_state->tag = l4_ipc_wait(l4_utcb(), &vcpu_state->label, L4_IPC_NEVER); //L4_IPC_RECV_TIMEOUT_0);
- goto upc;
+ if (0)
+ vcpu->print_state();
+ // very simple page-fault hanlding
+ // we're just replying with the only page we have, without checking any
+ // values
+ if (vcpu->is_page_fault_entry())
+ {
+ vcpu_task->map(L4Re::This_task, l4_fpage((l4_addr_t)my_super_code,
+ L4_PAGESHIFT, L4_FPAGE_RWX),
+ super_code_map_addr);
+ vcpu->saved_state()->add(L4_VCPU_F_PAGE_FAULTS);
}
-#endif
-
- l4_addr_t a = (l4_addr_t)my_super_code;
-
- if (is_page_fault(vcpu_state))
+ else if (vcpu->is_irq_entry())
{
- vcpu_task->map(L4Re::This_task, l4_fpage(a, 12, L4_FPAGE_RWX), 0x10000);
+ // We use the label 2000 for our IRQ
+ if (vcpu->i()->label == 2000)
+ printf("Our triggered IRQ\n");
+ else if (vcpu->i()->label == 0)
+ // direct IPC message to vCPU without
+ // going through an IPCgate, label is set to 0
+ printf("IPC: %lx\n", vcpu->i()->tag.label());
+ else
+ printf("Unclassifiable message\n");
}
+ else
+ // we should also check the exception number here
+ if (vcpu->r()->ip == (l4_addr_t)my_super_code_excp - (l4_addr_t)my_super_code + super_code_map_addr)
+ vcpu->r()->ip += my_super_code_excp_after - my_super_code_excp;
- vcpu_state->saved_state |= L4_VCPU_F_PAGE_FAULTS;
-
- printf("resume\n");
+ //printf("resume\n");
L4::Cap<L4::Thread> self;
- self.invalidate();
self->vcpu_resume_commit(self->vcpu_resume_start());
while(1)
;
static void vcpu_thread(void)
{
- //*vcpu_psr |= 2;
- printf("HELLO VCPU\n");
+ printf("Hello vCPU\n");
+
memset(hdl_stack, 0, sizeof(hdl_stack));
- setup_user_state(vcpu_state);
+
+ setup_user_state_arch(vcpu);
+ vcpu->saved_state()->set(L4_VCPU_F_USER_MODE
+ | L4_VCPU_F_EXCEPTIONS
+ | L4_VCPU_F_PAGE_FAULTS
+ | L4_VCPU_F_IRQ);
+ vcpu->r()->ip = super_code_map_addr;
+ vcpu->r()->sp = 0x40000; // actually doesn't matter, we're not using any
+ // stack memory in our code
L4::Cap<L4::Thread> self;
+
printf("IRET\n");
- vcpu_state->user_task = vcpu_task.cap();
+
+ vcpu->task(vcpu_task);
self->vcpu_resume_commit(self->vcpu_resume_start());
- printf("IRET uh?!\n");
- *vcpu_psr |= 3;
+ printf("IRET: failed!\n");
while (1)
- {
- }
-
- l4_msgtag_t x;
- while (1) {
- x = l4_ipc_call(0x1234 << L4_CAP_SHIFT, l4_utcb(), l4_msgtag(0, 0, 0, 0), L4_IPC_NEVER);
- l4_sleep(1000);
- outstring("An int3 -- you should see this\n");
- outnstring("345", 3);
- }
-
+ ;
}
int main(void)
{
- l4_msgtag_t tag;
l4_utcb_t *u = l4_utcb();
- l4_exc_regs_t exc;
- l4_umword_t mr0, mr1;
+ L4::Cap<L4::Thread> vcpu_cap;
printf("vCPU example\n");
l4_debugger_set_object_name(l4re_env()->main_thread, "vcputest");
// new task
- vcpu_task = L4Re::Util::cap_alloc.alloc<L4::Task>();
- if (!vcpu_task.is_valid())
- return 2;
+ vcpu_task = chkcap(L4Re::Util::cap_alloc.alloc<L4::Task>(),
+ "Task cap alloc");
- chksys(L4Re::Env::env()->factory()->create_task(vcpu_task, l4_fpage_invalid()), "create task");
- l4_debugger_set_object_name(vcpu_task.cap(), "vcpu task");
+ chksys(L4Re::Env::env()->factory()->create_task(vcpu_task,
+ l4_fpage_invalid()),
+ "create task");
+ l4_debugger_set_object_name(vcpu_task.cap(), "vcpu 'user' task");
- /* new thread */
- vcpu = L4Re::Util::cap_alloc.alloc<L4::Thread>();
- if (!vcpu.is_valid())
- return 1;
+ /* new thread/vCPU */
+ vcpu_cap = chkcap(L4Re::Util::cap_alloc.alloc<L4::Thread>(),
+ "vCPU cap alloc");
l4_touch_rw(thread_stack, sizeof(thread_stack));
- chksys(L4Re::Env::env()->factory()->create_thread(vcpu), "create thread");
- l4_debugger_set_object_name(vcpu.cap(), "vcpu thread");
+ chksys(L4Re::Env::env()->factory()->create_thread(vcpu_cap), "create thread");
+ l4_debugger_set_object_name(vcpu_cap.cap(), "vcpu thread");
- // use two consecurity UTCBs
+ // get an IRQ
+ irq = chkcap(L4Re::Util::cap_alloc.alloc<L4::Irq>(),
+ "Irq cap alloc");
+ chksys(L4Re::Env::env()->factory()->create_irq(irq), "irq");
+ l4_debugger_set_object_name(irq.cap(), "some irq");
+
+ // use two consecutive UTCBs
l4_utcb_t *vcpu_utcb = (l4_utcb_t *)l4re_env()->first_free_utcb;
- vcpu_state = reinterpret_cast<SSA*>((l4_umword_t)vcpu_utcb + L4_UTCB_OFFSET);
- vcpu_state->entry_sp = (l4_umword_t)hdl_stack + sizeof(hdl_stack);
- vcpu_state->entry_ip = (l4_umword_t)handler;
- vcpu_psr = &vcpu_state->state;
+ vcpu = L4vcpu::Vcpu::vcpu_from_utcb(vcpu_utcb);
+ vcpu->entry_sp((l4_umword_t)hdl_stack + sizeof(hdl_stack));
+ vcpu->entry_ip((l4_umword_t)handler);
- printf("VCPU: utcb = %p, vcpu_state = %p\n", vcpu_utcb, vcpu_state);
+ printf("VCPU: utcb = %p, vcpu = %p\n", vcpu_utcb, vcpu);
- // control thread
+ // Create and start vCPU thread
L4::Thread::Attr attr;
attr.pager(L4::cap_reinterpret_cast<L4::Thread>(L4Re::Env::env()->rm()));
attr.exc_handler(L4Re::Env::env()->main_thread());
attr.vcpu_enable(1);
attr.bind(vcpu_utcb, L4Re::This_task);
+ chksys(vcpu_cap->control(attr), "control");
- chksys(vcpu->control(attr), "control");
-
- // launch thread
- tag = vcpu->ex_regs((l4_umword_t)vcpu_thread,
- (l4_umword_t)thread_stack + sizeof(thread_stack),
- 0);
+ chksys(vcpu_cap->ex_regs((l4_umword_t)vcpu_thread,
+ (l4_umword_t)thread_stack + sizeof(thread_stack),
+ 0));
+ chksys(L4Re::Env::env()->scheduler()->run_thread(vcpu_cap,
+ l4_sched_param(2)));
- chksys(irq->attach(200, vcpu));
+ // Attach irq to our vCPU thread
+ chksys(irq->attach(2000, vcpu_cap));
- if (l4_msgtag_has_error(tag))
- return 3;
- l4_sleep(10);
- for (int i = 0; i < 20; ++i)
- {
- l4_ipc_send(vcpu.cap(), u, l4_msgtag(10 + i, 0, 0, 0), L4_IPC_NEVER);
- }
+ // Send some IPCs to the vCPU
l4_sleep(10);
for (int i = 0; i < 20; ++i)
- {
- l4_ipc_send(vcpu.cap(), u, l4_msgtag(40 + i, 0, 0, 0), L4_IPC_NEVER);
- }
+ l4_ipc_send(vcpu_cap.cap(), u, l4_msgtag(10 + i, 0, 0, 0), L4_IPC_NEVER);
- /* Pager/Exception loop */
- if (l4_msgtag_has_error(tag = l4_ipc_receive(vcpu.cap(), u, L4_IPC_NEVER)))
- {
- printf("l4_ipc_receive failed");
- return 1;
- }
+ // Some IRQ inbetween
+ irq->trigger();
- memcpy(&exc, l4_utcb_exc(), sizeof(exc));
- mr0 = l4_utcb_mr()->mr[0];
- mr1 = l4_utcb_mr()->mr[1];
+ l4_sleep(10);
+ for (int i = 21; i < 40; ++i)
+ l4_ipc_send(vcpu_cap.cap(), u, l4_msgtag(10 + i, 0, 0, 0), L4_IPC_NEVER);
- for (;;)
+ // finally, trigger IRQs
+ while (1)
{
+ irq->trigger();
+ l4_sleep(500);
}
+
+ l4_sleep_forever();
return 0;
}
* Please see the COPYING-GPL-2 file for details.
*/
-#include <l4/arm_drivers/lcd.h>
+#include <l4/drivers/lcd.h>
#include <l4/sys/cache.h>
#include <cstdio>
#
# List of PCI ID's
#
-# Version: 2010.07.02
-# Date: 2010-07-02 03:15:08
+# Version: 2010.08.27
+# Date: 2010-08-27 03:15:02
#
# Maintained by Martin Mares <mj@ucw.cz> and other volunteers from the
# PCI ID Project at http://pciids.sf.net/.
0064 SAS2116 PCI-Express Fusion-MPT SAS-2 [Meteor]
0065 SAS2116 PCI-Express Fusion-MPT SAS-2 [Meteor]
0070 SAS2004 PCI-Express Fusion-MPT SAS-2 [Spitfire]
+ 0071 MR SAS HBA
0072 SAS2008 PCI-Express Fusion-MPT SAS-2 [Falcon]
1028 1f1c 6Gbps SAS HBA Adapter
1028 1f1d PERC H200 Adapter
1000 9240 MegaRAID SAS 9240-4i
1000 9241 MegaRAID SAS 9240-4i
1014 03b1 ServeRAID M1015 SAS/SATA Controller
+ 1028 1f4e PERC H310 Adapter
+ 1028 1f4f PERC H310 Integrated
+ 1028 1f50 PERC H310 Mini Blades
+ 1028 1f51 PERC H310 Mini Monolithics
+ 1028 1f52 PERC H310 Embedded1
+ 1028 1f53 PERC H310 Embedded2
+ 1028 1f54 PERC H310 Reserved
1054 3035 LSI MegaRAID SAS 9240-8i
+ 1137 0072 2004 iMR ROMB
1137 0073 2008 ROMB
1734 1177 RAID Ctrl SAS 6G 0/1 (D2607)
8086 9240 RAID Controller RS2WC080
1028 0520 MegaRAID 520 DELL PERC 4/SC RAID Controller
1028 0531 PowerEdge Expandable RAID Controller 4/QC
1028 0533 PowerEdge Expandable RAID Controller 4/QC
- 8086 0520 MegaRAIDRAID Controller SRCU41L
+ 8086 0520 MegaRAID RAID Controller SRCU41L
8086 0523 MegaRAID RAID Controller SRCS16
6001 DX1 Multiformat Broadcast HD/SD Encoder/Decoder
1001 Kolter Electronic
68c1 Redwood [Radeon HD 5600 Series]
1025 0347 Aspire 7740G
103c 1521 Madison Pro [FirePro M5800]
+ 68c8 FirePro V4800
68d8 Redwood [Radeon HD 5670]
68d9 Redwood PRO [Radeon HD 5500 Series]
68da Redwood PRO [Radeon HD 5500 Series]
161f 3017 HDAMB
746e AMD-8111 MC97 Modem
756b AMD-8111 ACPI
+ 7800 Hudson SATA Controller [IDE mode]
+ 7801 Hudson SATA Controller [AHCI mode]
+ 7802 Hudson SATA Controller [RAID mode]
+ 7803 Hudson SATA Controller [RAID mode]
+ 7804 Hudson SATA Controller [AHCI mode]
+ 7805 Hudson SATA Controller [RAID mode]
+ 7806 Hudson SD Flash Controller
+ 7807 Hudson USB OHCI Controller
+ 7808 Hudson USB EHCI Controller
+ 7809 Hudson USB OHCI Controller
+ 780b Hudson SMBus Controller
+ 780c Hudson IDE Controller
+ 780d Hudson Azalia Controller
+ 780e Hudson LPC Bridge
+ 780f Hudson PCI Bridge
+ 7812 Hudson USB XHCI Controller
9600 RS780 Host Bridge
9601 RS780 Host Bridge Alternate
9602 RS780 PCI to PCI bridge (int gfx)
8000 10GbE Converged Network Adapter (TCP/IP Networking)
8001 10GbE Converged Network Adapter (FCoE)
8020 cLOM8214 1/10GbE Controller
+ 103c 3733 NC523SFP 10Gb 2-port Flex-10 Server Adapter
1077 0203 8200 Series Single Port 10GbE Converged Network Adapter (TCP/IP Networking)
1077 0207 8200 Series Dual Port 10GbE Converged Network Adapter (TCP/IP Networking)
1077 020b 3200 Series Dual Port 10Gb Intelligent Ethernet Adapter
a001 Psycho UPA-PCI Bus Module [pcipsy]
108e a001 Ultra IIe on Blade 100 motherboard
a801 Schizo Fireplane-PCI bus bridge module [pcisch]
+ aaaa Multithreaded Shared 10GbE Ethernet Network Controller
abba Cassini 10/100/1000
abcd Multithreaded 10-Gigabit Ethernet Network Controller
c416 Sun Fire System/System Controller Interface chip [sbbc]
10b5 2906 Alpermann+Velte PCI TS (3V/5V): Time Synchronisation Board
10b5 2940 Alpermann+Velte PCL PCI D (3V/5V): Timecode Reader Board
10b5 2977 IXXAT iPC-I XC16/PCI CAN Board
- 10b5 2978 SH ARC-PCIu SOHARD ARCNET card
+ 10b5 2978 SH ARC-PCIu/SH ARC-PCI104/SH ARC-PCIe SOHARD ARCNET card
10b5 3025 Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board
10b5 3068 Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board
+ 10b5 3463 Alpermann+Velte PCL PCI D (v2) (3V/5V): Timecode Reader Board
12fe 0111 CPCI-ASIO4 (ESD 4-port Serial Interface Board)
1369 9c01 VX222v2
1369 9d01 VX222-Mic
13a2 8006 LANEPIC Cardbus Fast Ethernet Adapter
1000 FDC 37c665
1001 FDC 37C922
- 2802 SMC2802W [EZ Connect g]
a011 83C170QF
b106 SMC34C90
10b9 ALi Corporation
056f MCP73 PCI Express bridge
05b1 NF200 PCIe 2.0 switch for mainboards
05b8 NF200 PCIe 2.0 switch for GTX 295
- 05be NF200 PCIe 2.0 switch for Quadro Plex S4 / Tesla S870 / Tesla S1070
+ 05be NF200 PCIe 2.0 switch for Quadro Plex S4 / Tesla S870 / Tesla S1070 / Tesla S2050
05e0 GT200b [GeForce GTX 295]
05e1 GT200 [GeForce GTX 280]
# GT200 [GTX 260] or GT200 [GTX 260-216] or GT200b [GTX 260-216]
06c0 GF100 [GeForce GTX 480]
06cd GF100 [GeForce GTX 470]
06d1 GF100 [Tesla C2050]
+ 06de GF100 [Tesla S2050]
06e0 G98 [GeForce 9300 GE]
06e1 G98 [GeForce 9300 GS]
06e2 G98 [GeForce 8400]
0be3 High Definition Audio Controller
0be4 High Definition Audio Controller
0be5 GF100 High Definition Audio Controller
+ 0beb GF104 High Definition Audio Controller
0ca0 GT215 [GeForce GT 330]
0ca2 GT215 [GeForce GT 320]
0ca3 GT215 [GeForce GT 240]
0d94 MCP89 High Definition Audio
0d9c MCP89 OHCI USB 1.1 Controller
0d9d MCP89 EHCI USB 2.0 Controller
+ 0e22 GF104 [GeForce GTX 460]
10df Emulex Corporation
1ae5 LP6000 Fibre Channel Host Adapter
e100 Proteus-X: LightPulse IOV Fibre Channel Host Adapter
8407 PCIcan II CAN interface (A1021, PCB-07, PCB-08) [Kvaser AB]
8851 S5933 on Innes Corp FM Radio Capture card
10e9 Alps Electric Co., Ltd.
-10ea Intergraphics Systems
+10ea Integraphics
1680 IGA-1680
1682 IGA-1682
1683 IGA-1683
1462 368c K9AG Neo2
1775 11cc CC11/CL11
1849 8168 Motherboard (one of many)
+ 8086 d615 DeskTop Board D510MO
8169 RTL-8169 Gigabit Ethernet
1025 0079 Aspire 5024WLMi
10bd 3202 EP-320G-TX1 32-bit PCI Gigabit Ethernet Adapter
0314 Wildcard TE405P/TE410P (1st Gen)
0405 Wildcard TE405P (2nd Gen)
0410 Wildcard TE410P (2nd Gen)
+ 2b00 Zomojo Zcard
3fc0 RME Digi96
3fc1 RME Digi96/8
3fc2 RME Digi96/8 Pro
1540 DFE-680TX
1541 DFE-680TXD CardBus PC Card
1561 DRP-32TXD Cardbus PC Card
- 2027 AirPlus Xtreme G DWL-G520 Adapter
- 3203 AirPlus Xtreme G DWL-G520 Adapter
3300 DWL-510 2.4GHz Wireless PCI Adapter
3a03 AirPro DWL-A650 Wireless Cardbus Adapter(rev.B)
3a04 AirPro DWL-AB650 Multimode Wireless Cardbus Adapter
3a10 AirXpert DWL-AG650 Wireless Cardbus Adapter(rev.B)
3a11 AirXpert DWL-AG520 Wireless PCI Adapter(rev.B)
3a12 AirPlus DWL-G650 Wireless Cardbus Adapter(rev.C)
- 3a13 AirPlus DWL-G520 Wireless PCI Adapter(rev.B)
3a14 AirPremier DWL-AG530 Wireless PCI Adapter
3a63 AirXpert DWL-AG660 Wireless Cardbus Adapter
3a70 DWA-556 Xtreme N PCI Express Desktop Adapter
2211 88SB2211 PCI Express to PCI Bridge
2a01 88W8335 [Libertas] 802.11b/g Wireless
2a02 88W8361 [TopDog] 802.11n Wireless
+ 2a0a 88W8363 [TopDog] 802.11n Wireless
2a0c 88W8363 [TopDog] 802.11n Wireless
+ 2a2b 88W8687 [TopDog] 802.11b/g Wireless
2a30 88W8687 [TopDog] 802.11b/g Wireless
2a40 88W8366 [TopDog] 802.11n Wireless
2a43 88W8366 [TopDog] 802.11n Wireless
3886 ISL3886 [Prism Javelin/Prism Xbow]
17cf 0037 XG-901 and clones Wireless Adapter
3890 ISL3890 [Prism GT/Prism Duette]/ISL3886 [Prism Javelin/Prism Xbow]
- 10b8 2802 SMC2802W Wireless PCI Adapter
+ 10b8 2802 SMC2802W V1 Wireless PCI Adapter [ISL3890]
10b8 2835 SMC2835W Wireless Cardbus Adapter
10b8 a835 SMC2835W V2 Wireless Cardbus Adapter
1113 4203 WN4201B
0203 GPS169PCI GPS Receiver
0204 GPS170PCI GPS Receiver
0205 GPS170PEX GPS Receiver (PCI Express)
+ 0206 GPS180PEX GPS Receiver (PCI Express)
0301 TCR510PCI IRIG Timecode Reader
0302 TCR167PCI IRIG Timecode Reader
0303 TCR511PCI IRIG Timecode Reader
0304 TCR511PEX IRIG Timecode Reader (PCI Express)
0305 TCR170PEX IRIG Timecode Reader (PCI Express)
+ 0306 TCR180PEX IRIG Timecode Reader (PCI Express)
0501 PTP270PEX PTP/IEEE1588 slave card (PCI Express)
0601 FRC511PEX Free Running Clock (PCI Express)
1361 Soliton Systems K.K.
13a3 1615 DR1615 Acceleration Card
13a3 1620 DR1620 Acceleration Card
13a3 1625 DR1625 Acceleration Card
- 0033 8201 Compression and Security Processor
+ 0033 8201 Acceleration Processor
13a3 0036 DX1710 Acceleration Card
- 0034 8202 Compression and Security Processor
+ 0034 8202 Acceleration Processor
13a3 0036 DX1720 Acceleration Card
- 0035 8203 Compression and Security Processor
+ 0035 8203 Acceleration Processor
13a3 0036 DX1730 Acceleration Card
+ 0037 8204 Acceleration Processor
+ 13a3 0036 DX1740 Acceleration Card
13a4 Rascom Inc
13a5 Audio Digital Imaging Inc
13a6 Videonics Inc
103c 3226 NC150T 4-port Gigabit Combo Switch & Adapter
1655 NetXtreme BCM5717 Gigabit Ethernet PCIe
1656 NetXtreme BCM5718 Gigabit Ethernet PCIe
+ 1657 NetXtreme BCM5719 Gigabit Ethernet PCIe
1658 NetXtreme BCM5720 Gigabit Ethernet
1659 NetXtreme BCM5721 Gigabit Ethernet PCI Express
1014 02c6 eServer xSeries server mainboard
103c 099c NX6110/NC6120
10cf 1279 LifeBook E8010D
1662 NetXtreme II BCM57712 10 Gigabit Ethernet
+ 1663 NetXtreme II BCM57712 10 Gigabit Ethernet Multi Function
1668 NetXtreme BCM5714 Gigabit Ethernet
103c 7039 NC324i PCIe Dual Port Gigabit Server Adapter
1669 NetXtreme 5714S Gigabit Ethernet
103c 7035 NC325i Integrated Dual port PCIe Express Gigabit Server Adapter
166b NetXtreme BCM5780S Gigabit Ethernet
166e 570x 10/100 Integrated Controller
+ 166f NetXtreme II BCM57712 10 Gigabit Ethernet Virtual Function
1672 NetXtreme BCM5754M Gigabit Ethernet PCI Express
1673 NetXtreme BCM5755M Gigabit Ethernet PCI Express
1674 NetXtreme BCM5756ME Gigabit Ethernet PCI Express
1028 01de Precision 390
1028 01df PowerEdge SC440
1028 0214 Precision T3400
+ 1028 021e Precision T5400
167b NetXtreme BCM5755 Gigabit Ethernet PCI Express
103c 280a DC5750 Microtower
167c NetXtreme BCM5750M Gigabit Ethernet
5051 High Definition Audio (HERMOSA)
5b7a CX23418 Single-Chip MPEG-2 Encoder with Integrated Analog Video/Broadcast Audio Decoder
0070 7444 WinTV HVR-1600
+ 8200 CX25850
8234 RS8234 ATM SAR Controller [ServiceSAR Plus]
8800 CX23880/1/2/3 PCI Video and Audio Decoder
0070 2801 Hauppauge WinTV 28xxx (Roslyn) models
1612 Telesynergy Research Inc.
1618 Stone Ridge Technology
0001 RDX 11
+ 0002 HFT-01
0400 FarSync T2P (2 port X.21/V.35/V.24)
0440 FarSync T4P (4 port X.21/V.35/V.24)
0610 FarSync T1U (1 port X.21/V.35/V.24)
1113 ee23 SMCWPCIT-G 108Mbps Wireless PCI adapter
1154 033b Buffalo WLI-CB-AMG54
1186 3202 DWL-G650 (Rev B3,B5) Wireless cardbus adapter
- 1186 3203 DWL-G520 Wireless PCI Adapter
+ 1186 3203 AirPlus DWL-G520 Wireless PCI Adapter (rev. A)
1186 3a12 D-Link AirPlus DWL-G650 Wireless Cardbus Adapter(rev.C)
- 1186 3a13 D-Link AirPlus DWL-G520 Wireless PCI Adapter(rev.B)
+ 1186 3a13 AirPlus DWL-G520 Wireless PCI Adapter (rev. B)
1186 3a14 D-Link AirPremier DWL-AG530 Wireless PCI Adapter
1186 3a17 D-Link AirPremier DWL-G680 Wireless Cardbus Adapter
1186 3a18 D-Link AirPremier DWL-G550 Wireless PCI Adapter
168c 1042 Ubiquiti Networks SuperRange a/b/g Cardbus Adapter
168c 1051 EZ Connect g 802.11g 108Mbps Wireless PCI Adapter
168c 2026 Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter
+ 168c 2027 D-Link AirPlus DWL-G520 Wireless PCI Adapter (rev. A)
168c 2041 Engenius 5354MP Plus ARIES2 b/g MiniPCI Adapter
168c 2042 Engenius 5354MP Plus ARIES2 a/b/g MiniPCI Adapter
168c 2051 TRENDnet TEW-443PI Wireless PCI Adapter
17d3 1221 ARC-1221 8-Port PCI-Express to SATA RAID Controller
1300 ARC-1300ix-16 16-Port PCI-Express to SAS Non-RAID Host Adapter
1680 ARC-1680 8 port PCIe/PCI-X to SAS/SATA II RAID Controller
-# Nee S2io Inc.
-17d5 Neterion Inc.
+# nee Neterion Inc., previously S2io Inc.
+17d5 Exar Corp.
5731 Xframe 10-Gigabit Ethernet PCI-X
5732 Xframe II 10-Gigabit Ethernet PCI-X 2.0
5831 Xframe 10-Gigabit Ethernet PCI-X
1737 0055 WMP54G ver 4.1
1814 2561 EW-7108PCg
0302 RT2561/RT61 rev B 802.11g
+ 1186 3a71 DWA-510 Wireless G Desktop Adapter
1186 3c08 AirPlus G DWL-G630 Wireless Cardbus Adapter (rev.E2)
1186 3c09 AirPlus G DWL-G510 Wireless Network Adapter (Rev.C)
1462 b834 PC54G3 Wireless 11g PCI Card
18f4 Napatech A/S
0051 NT20-X Capture Card
0061 NT20E Capture Card
+ 0064 NT20E Inline Card
0071 NT4E Capture Card
+ 0074 NT4E Inline Card
0081 NT4E 4-port Expansion Card
0091 NT20X Capture Card [New Rev]
00a1 NT4E-STD Capture Card
+ 00a4 NT4E-STD Inline Card
18f6 NextIO
1000 [Nexsis] Switch Virtual P2P PCIe Bridge
1050 [Nexsis] Switch Virtual P2P PCI Bridge
0813 SFL9021 [Solarstorm]
1924 6100 SFN5121T-R0
1924 6102 SFN5121T-R2
+ 1924 6103 SFN5121T-R3
+ 1924 6104 SFN5121T-R4
1924 6902 SFN5111T-R2
+ 1924 6904 SFN5111T-R4
6703 SFC4000 rev A iSCSI/Onload [Solarstorm]
10b8 0102 SMC10GPCIe-10BT (A2) [TigerCard]
10b8 0103 SMC10GPCIe-10BT (A3) [TigerCard]
a00d PWRficient PCI-Express Internal Endpoint
1966 Orad Hi-Tec Systems
1975 DVG64 family
+ 1977 DVG128 family
# nee Attansic Technology Corp.
1969 Atheros Communications
1026 AR8121/AR8113/AR8114 Gigabit or Fast Ethernet
1043 8226 P5KPL-VM Motherboard
1062 AR8132 Fast Ethernet
1063 AR8131 Gigabit Ethernet
+ 1458 e000 GA-G31M-ES2L Motherboard
1066 L2c Gigabit Ethernet
1067 L1c Gigabit Ethernet
1073 AR8151 v1.0 Gigabit Ethernet
197b JMicron Technology Corp.
0250 JMC250 PCI Express Gigabit Ethernet Controller
0260 JMC260 PCI Express Fast Ethernet Controller
+ 0368 JMB368 IDE controller
2360 JMB360 AHCI Controller
2361 JMB361 AHCI/IDE
1462 7235 P965 Neo MS-7235 mainboard
1043 81e4 P5B [JMB363]
1458 b000 GA-EP45-DS5 Motherboard
1849 2363 Motherboard (one of many)
+ 2364 JMB364 AHCI Controller
2365 JMB365 AHCI/IDE
2366 JMB366 AHCI/IDE
2368 JMB368 IDE controller
+ 2369 JMB369 Serial ATA Controller
2380 IEEE 1394 Host Controller
2381 Standard SD Host Controller
2382 SD/MMC Host Controller
4c53 4000 PMCCARR1 carrier board
0022 HiNT HB4 PCI-PCI Bridge (PCI6150)
0026 HB2 PCI-PCI Bridge
+ 1018 Audiotrak INCA88
+ 1019 Miditrak 2120
101a E.Band [AudioTrak Inca88]
101b E.Band [AudioTrak Inca88]
8011 VXPro II Chipset
1022 4 photo couple 4 relay Card
1025 16 photo couple 16 relay Card
4000 WatchDog Card
-6900 Qumranet
+# nee Qumranet
+6900 Red Hat, Inc.
7063 pcHDTV
2000 HD-2000
3000 HD-3000
010c Sandy Bridge DRAM Controller
010d Sandy Bridge PCI Express Root Port
010e Sandy Bridge Integrated Graphics Controller
- 0122 82437FX
+ 0112 Sandy Bridge Integrated Graphics Controller
+ 0116 Sandy Bridge Integrated Graphics Controller
+ 0122 Sandy Bridge Integrated Graphics Controller
+ 0126 Sandy Bridge Integrated Graphics Controller
0309 80303 I/O Processor PCI-to-PCI Bridge
030d 80312 I/O Companion Chip PCI-to-PCI Bridge
0326 6700/6702PXH I/OxAPIC Interrupt Controller A
10ec 82598EB 10-Gigabit AT CX4 Network Connection
8086 a01f 10-Gigabit CX4 Dual Port Server Adapter
8086 a11f 10-Gigabit CX4 Dual Port Server Adapter
- 10ed 82559 Ethernet Controller Virtual Function
+ 10ed 82599 Ethernet Controller Virtual Function
10ef 82578DM Gigabit Network Connection
10f0 82578DC Gigabit Network Connection
10f1 82598EB 10-Gigabit AF Dual Port Network Connection
1c5c Cougar Point LPC Controller
1c5d Cougar Point LPC Controller
1c5f Cougar Point LPC Controller
+ 1d00 Patsburg 4 Port SATA IDE Controller
+ 1d02 Patsburg 6 Port SATA AHCI Controller
+ 1d04 Patsburg SATA RAID Controller
+ 1d06 Patsburg SATA Premium RAID Controller
+ 1d08 Patsburg 2 Port SATA IDE Controller
+ 1d10 Patsburg PCI Express Root Port 1
+ 1d11 Patsburg PCI Express Root Port 1
+ 1d12 Patsburg PCI Express Root Port 2
+ 1d13 Patsburg PCI Express Root Port 2
+ 1d14 Patsburg PCI Express Root Port 3
+ 1d15 Patsburg PCI Express Root Port 3
+ 1d16 Patsburg PCI Express Root Port 4
+ 1d17 Patsburg PCI Express Root Port 4
+ 1d18 Patsburg PCI Express Root Port 5
+ 1d19 Patsburg PCI Express Root Port 5
+ 1d1a Patsburg PCI Express Root Port 6
+ 1d1b Patsburg PCI Express Root Port 6
+ 1d1c Patsburg PCI Express Root Port 7
+ 1d1d Patsburg PCI Express Root Port 7
+ 1d1e Patsburg PCI Express Root Port 8
+ 1d1f Patsburg PCI Express Root Port 8
+ 1d20 Patsburg High Definition Audio Controller
+ 1d22 Patsburg SMBus Controller
+ 1d24 Patsburg Thermal Management Controller
+ 1d25 Patsburg DMI to PCI Bridge
+ 1d26 Patsburg USB2 Enhanced Host Controller #1
+ 1d2d Patsburg USB2 Enhanced Host Controller #2
+ 1d33 Patsburg LAN Controller
+ 1d35 Patsburg VECI Controller
+ 1d3a Patsburg HECI Controller #1
+ 1d3b Patsburg HECI Controller #2
+ 1d3c Patsburg IDE-r Controller
+ 1d3d Patsburg KT Controller
+ 1d3e Patsburg PCI Express Virtual Root Port
+ 1d3f Patsburg PCI Express Virtual Switch Port
+ 1d40 Patsburg LPC Controller
+ 1d60 Patsburg SAS Storage Control Unit 0
+ 1d61 Patsburg SAS Storage Control Unit 1
+ 1d70 Patsburg SCU0 SMBus Controller
+ 1d71 Patsburg SCU1 SMBus Controller
+ 1d72 Patsburg SMB2
+ 1d73 Patsburg Integrated NVSRAM Controller
+ 1d74 Patsburg PCI Express Upstream Port
+ 1d76 Patsburg Integrated Device Function
2410 82801AA ISA Bridge (LPC)
2411 82801AA IDE Controller
2412 82801AA USB Controller
10f7 8338 Panasonic CF-Y5 laptop
17aa 2009 ThinkPad T60/R60 series
27bc NM10 Family LPC Controller
+ 8086 4f4d DeskTop Board D510MO
27bd 82801GHM (ICH7-M DH) LPC Interface Bridge
1025 006c 9814 WKMI
27c0 N10/ICH7 Family SATA IDE Controller
27c1 N10/ICH7 Family SATA AHCI Controller
1028 01df PowerEdge SC440
1775 11cc CC11/CL11
+ 8086 4f4d DeskTop Board D510MO
8086 5842 DeskTop Board D975XBX
27c3 82801GR/GH (ICH7 Family) SATA RAID Controller
1775 11cc CC11/CL11
107b 5048 E4500
1775 11cc CC11/CL11
17aa 200a ThinkPad T60/R60 series
+ 8086 4f4d DeskTop Board D510MO
8086 544e DeskTop Board D945GTP
27c9 N10/ICH 7 Family USB UHCI Controller #2
1025 006c 9814 WKMI
107b 5048 E4500
1775 11cc CC11/CL11
17aa 200a ThinkPad T60/R60 series
+ 8086 4f4d DeskTop Board D510MO
8086 544e DeskTop Board D945GTP
27ca N10/ICH 7 Family USB UHCI Controller #3
1025 006c 9814 WKMI
107b 5048 E4500
1775 11cc CC11/CL11
17aa 200a ThinkPad T60/R60 series
+ 8086 4f4d DeskTop Board D510MO
8086 544e DeskTop Board D945GTP
27cb N10/ICH 7 Family USB UHCI Controller #4
1025 006c 9814 WKMI
107b 5048 E4500
1775 11cc CC11/CL11
17aa 200a ThinkPad T60/R60 series
+ 8086 4f4d DeskTop Board D510MO
8086 544e DeskTop Board D945GTP
27cc N10/ICH 7 Family USB2 EHCI Controller
1025 006c 9814 WKMI
1043 8179 P5KPL-VM,P5LD2-VM Mainboard
1775 11cc CC11/CL11
17aa 200b ThinkPad T60/R60 series
+ 8086 4f4d DeskTop Board D510MO
8086 544e DeskTop Board D945GTP
27d0 N10/ICH 7 Family PCI Express Port 1
103c 309f Compaq nx9420 Notebook
17aa 3802 Lenovo 3000 C200 audio [Realtek ALC861VD]
8086 1112 DeskTop Board D945GTP
8086 27d8 DeskTop Board D945GTP
+ 8086 d618 DeskTop Board D510MO
27da N10/ICH 7 Family SMBus Controller
1025 006c 9814 WKMI
1028 01ad OptiPlex GX620
1458 5001 GA-8I945PG-RH Mainboard
1775 11cc CC11/CL11
17aa 200f ThinkPad T60/R60 series
+ 8086 4f4d DeskTop Board D510MO
8086 544e DeskTop Board D945GTP
8086 5842 DeskTop Board D975XBX
27dc N10/ICH 7 Family LAN Controller
2b62 Xeon 7500 SMI Physical Port 0: Misc control/status
2b64 Xeon 7500 SMI Physical Port 0: REUT control/status
2b66 Xeon 7500 SMI Physical Port 1: Misc control/status
+ 2b68 Westmere-EX Last Level Cache Coherence Engine 8
+ 2b6c Westmere-EX Last Level Cache Coherence Engine 9
2c01 Xeon 5500/Core i7 QuickPath Architecture System Address Decoder
2c10 Xeon 5500/Core i7 QPI Link 0
2c11 Xeon 5500/Core i7 QPI Physical 0
3b65 5 Series/3400 Series Chipset HECI Controller
3b66 5 Series/3400 Series Chipset PT IDER Controller
3b67 5 Series/3400 Series Chipset KT Controller
+ 3c00 Sandy Bridge DMI2
+ 3c01 Sandy Bridge DMI2 in PCI Express Mode
+ 3c02 Sandy Bridge IIO PCI Express Root Port 1a
+ 3c03 Sandy Bridge IIO PCI Express Root Port 1b
+ 3c04 Sandy Bridge IIO PCI Express Root Port 2a
+ 3c05 Sandy Bridge IIO PCI Express Root Port 2b
+ 3c06 Sandy Bridge IIO PCI Express Root Port 2c
+ 3c07 Sandy Bridge IIO PCI Express Root Port 2d
+ 3c08 Sandy Bridge IIO PCI Express Root Port 3a in PCI Express Mode
+ 3c09 Sandy Bridge IIO PCI Express Root Port 3b
+ 3c0a Sandy Bridge IIO PCI Express Root Port 3c
+ 3c0b Sandy Bridge IIO PCI Express Root Port 3d
+ 3c0d Sandy Bridge Non-Transparent Bridge
+ 3c0e Sandy Bridge Non-Transparent Bridge
+ 3c0f Sandy Bridge Non-Transparent Bridge
+ 3c20 Sandy Bridge DMA Channel 0
+ 3c21 Sandy Bridge DMA Channel 1
+ 3c22 Sandy Bridge DMA Channel 2
+ 3c23 Sandy Bridge DMA Channel 3
+ 3c24 Sandy Bridge DMA Channel 4
+ 3c25 Sandy Bridge DMA Channel 5
+ 3c26 Sandy Bridge DMA Channel 6
+ 3c27 Sandy Bridge DMA Channel 7
+ 3c28 Sandy Bridge Address Map, VTd_Misc, System Management
+ 3c2a Sandy Bridge Control Status and Global Errors
+ 3c2c Sandy Bridge I/O APIC
+ 3c2e Sandy Bridge DMA
+ 3c2f Sandy Bridge DMA
+ 3c43 Sandy Bridge Ring to PCI Express Performance Monitor
+ 3c44 Sandy Bridge Ring to QuickPath Interconnect Link 0 Performance Monitor
+ 3c45 Sandy Bridge Ring to QuickPath Interconnect Link 1 Performance Monitor
+ 3c46 Sandy Bridge Processor Home Agent Performance Monitoring
+ 3c71 Sandy Bridge Integrated Memory Controller RAS Registers
+ 3c80 Sandy Bridge QPI Link 0
+ 3c88 Sandy Bridge QPI Link 1
+ 3ca0 Sandy Bridge Processor Home Agent
+ 3ca8 Sandy Bridge Integrated Memory Controller Registers
+ 3caa Sandy Bridge Integrated Memory Controller Target Address Decoder 0
+ 3cab Sandy Bridge Integrated Memory Controller Target Address Decoder 1
+ 3cac Sandy Bridge Integrated Memory Controller Target Address Decoder 2
+ 3cad Sandy Bridge Integrated Memory Controller Target Address Decoder 3
+ 3cb0 Sandy Bridge Integrated Memory Controller Channel 0-3 Thermal Control 0
+ 3cb1 Sandy Bridge Integrated Memory Controller Channel 0-3 Thermal Control 1
+ 3cb2 Sandy Bridge Integrated Memory Controller ERROR Registers 0
+ 3cb3 Sandy Bridge Integrated Memory Controller ERROR Registers 1
+ 3cb4 Sandy Bridge Integrated Memory Controller Channel 0-3 Thermal Control 2
+ 3cb5 Sandy Bridge Integrated Memory Controller Channel 0-3 Thermal Control 3
+ 3cb6 Sandy Bridge Integrated Memory Controller ERROR Registers 2
+ 3cb7 Sandy Bridge Integrated Memory Controller ERROR Registers 3
+ 3cc0 Sandy Bridge Power Control Unit 0
+ 3cc1 Sandy Bridge Power Control Unit 1
+ 3cc2 Sandy Bridge Power Control Unit 2
+ 3ce0 Sandy Bridge Interrupt Control Registers
+ 3ce3 Sandy Bridge Semaphore and Scratchpad Configuration Registers
+ 3ce6 Sandy Bridge QuickPath Interconnect Agent Ring Registers
+ 3cf4 Sandy Bridge Integrated Memory Controller System Address Decoder 0
+ 3cf5 Sandy Bridge Integrated Memory Controller System Address Decoder 1
+ 3cf6 Sandy Bridge System Address Decoder
4000 5400 Chipset Memory Controller Hub
4001 5400 Chipset Memory Controller Hub
4003 5400 Chipset Memory Controller Hub
8086 1014 PRO/Wireless 3945BG Network Connection
4229 PRO/Wireless 4965 AG or AGN [Kedron] Network Connection
8086 1100 Vaio VGN-SZ79SN_C
+ 8086 1101 PRO/Wireless 4965 AG or AGN
422b Centrino Ultimate-N 6300
8086 1101 Centrino Ultimate-N 6300 3x3 AGN
8086 1121 Centrino Ultimate-N 6300 3x3 AGN
9641 Integrated RAID
96a1 Integrated RAID
a000 N10 Family DMI Bridge
+ 8086 4f4d DeskTop Board D510MO
a001 N10 Family Integrated Graphics Controller
+ 8086 4f4d DeskTop Board D510MO
a002 N10 Family Integrated Graphics Controller
a003 N10 Family CHAPS counter
a010 N10 Family DMI Bridge
10 Communication synchronizer
20 Signal processing management
80 Signal processing controller
+C ff Unassigned class
#include <stdlib.h>
#include <l4/sys/l4int.h>
-#include <l4/arm_drivers/lcd.h>
+#include <l4/drivers/lcd.h>
#include <l4/util/macros.h>
#include "gmode.h"
/**
- * \defgroup l4re_elf_aux_api L4Re ELF Auxiliary Information
+ * \defgroup api_l4re_elf_aux L4Re ELF Auxiliary Information
+ * \ingroup api_l4re
* \brief API for embedding auxiliary information into
* binary programs.
*
/**
* \defgroup l4re_cap_api L4Re Capability API
+ * \ingroup api_l4re_util
*/
/*@{*/
/**
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>,
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#pragma once
+
+#include <l4/sys/types.h>
+
+/**
+ * \brief vCPU registers.
+ * \ingroup l4_vcpu_api
+ */
+typedef struct l4_vcpu_regs_t
+{
+ l4_umword_t pfa;
+ l4_umword_t err;
+
+ l4_umword_t r[28];
+ l4_umword_t sp;
+ l4_umword_t lr;
+ l4_umword_t _dummy;
+ l4_umword_t ip;
+ l4_umword_t flags;
+
+ /* And some more */
+} l4_vcpu_regs_t;
+
+/**
+ * \brief vCPU message registers.
+ * \ingroup l4_vcpu_api
+ */
+typedef struct l4_vcpu_ipc_regs_t
+{
+ l4_msgtag_t tag;
+ l4_umword_t _d1[3];
+ l4_umword_t label;
+ l4_umword_t _d2[8];
+} l4_vcpu_ipc_regs_t;
#define L4_stringify(x) L4_stringify_helper(x) ///< stringify. \hideinitializer
#ifndef __ASSEMBLER__
+/**
+ * \brief Memory barrier.
+ */
+L4_INLINE void l4_barrier(void);
+
/**
* \brief Memory barrier.
*/
/* Implementations */
+L4_INLINE void l4_barrier(void)
+{
+ __asm__ __volatile__ ("" : : : "memory");
+}
+
L4_INLINE void l4_mb(void)
{
__asm__ __volatile__ ("" : : : "memory");
*/
typedef struct l4_vcpu_state_t
{
- l4_vcpu_regs_t r;
- l4_vcpu_ipc_regs_t i;
+ l4_vcpu_regs_t r; ///< Register state
+ l4_vcpu_ipc_regs_t i; ///< IPC state
- l4_umword_t state;
- l4_umword_t saved_state;
+ l4_umword_t state; ///< Current vCPU state
+ l4_umword_t saved_state; ///< Saved vCPU state
- l4_umword_t sticky_flags;
+ l4_umword_t sticky_flags; ///< Pending flags
- l4_cap_idx_t user_task;
+ l4_cap_idx_t user_task; ///< User task to use
- l4_umword_t entry_sp;
- l4_umword_t entry_ip;
- l4_umword_t reserved_sp;
+ l4_umword_t entry_sp; ///< Stack pointer for entry
+ l4_umword_t entry_ip; ///< IP for entry (when coming from user task)
+ l4_umword_t reserved_sp; ///< \internal
} l4_vcpu_state_t;
/**
*/
enum L4_vcpu_state_flags
{
- L4_VCPU_F_IRQ = 0x01,
- L4_VCPU_F_PAGE_FAULTS = 0x02,
- L4_VCPU_F_EXCEPTIONS = 0x04,
- L4_VCPU_F_DEBUG_EXC = 0x08,
- L4_VCPU_F_USER_MODE = 0x20,
- L4_VCPU_F_FPU_ENABLED = 0x80,
+ L4_VCPU_F_IRQ = 0x01, ///< IRQs (events) enabled
+ L4_VCPU_F_PAGE_FAULTS = 0x02, ///< Page faults enabled
+ L4_VCPU_F_EXCEPTIONS = 0x04, ///< Exception enabled
+ L4_VCPU_F_DEBUG_EXC = 0x08, ///< Debug exception enabled
+ L4_VCPU_F_USER_MODE = 0x20, ///< User task will be used
+ L4_VCPU_F_FPU_ENABLED = 0x80, ///< FPU enabled
};
/**
*/
enum L4_vcpu_sticky_flags
{
- L4_VCPU_SF_IRQ_PENDING = 0x01,
+ L4_VCPU_SF_IRQ_PENDING = 0x01, ///< An event (e.g. IRQ) is pending
};
--- /dev/null
+provides: libvcpu
+requires: l4sys libc
+maintainer: adam@os.inf.tu-dresden.de
--- /dev/null
+PKGDIR = .
+L4DIR ?= $(PKGDIR)/../..
+
+include $(L4DIR)/mk/subdir.mk
--- /dev/null
+INPUT += l4/vcpu
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#pragma once
+
+L4_INLINE
+int
+l4vcpu_is_irq_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return vcpu->r.trapno == 0xfe;
+}
+
+L4_INLINE
+int
+l4vcpu_is_page_fault_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return vcpu->r.trapno == 0xe;
+}
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#pragma once
+
+L4_INLINE
+int
+l4vcpu_is_irq_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return vcpu->r.err == 0x00600000;
+}
+
+L4_INLINE
+int
+l4vcpu_is_page_fault_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return vcpu->r.err & 0x00010000;
+}
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#pragma once
+
+#warning This file needs to be implemented.
+
+L4_INLINE
+int
+l4vcpu_is_irq_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return 0; // TBD
+}
+
+L4_INLINE
+int
+l4vcpu_is_page_fault_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return 0; // TBD
+}
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#pragma once
+
+L4_INLINE
+int
+l4vcpu_is_irq_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return vcpu->r.trapno == 0xfe;
+}
+
+L4_INLINE
+int
+l4vcpu_is_page_fault_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ return vcpu->r.trapno == 0xe;
+}
--- /dev/null
+PKGDIR = ..
+L4DIR ?= $(PKGDIR)/../..
+
+PKGNAME = vcpu
+EXTRA_TARGET += vcpu
+
+include $(L4DIR)/mk/include.mk
--- /dev/null
+// vi:se ft=cpp:
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+
+#pragma once
+
+#include <l4/vcpu/vcpu.h>
+
+namespace L4vcpu {
+
+/**
+ * \brief C++ implementation of state word in the vCPU area
+ * \ingroup api_libvcpu
+ */
+class State
+{
+public:
+ State() {}
+ explicit State(l4vcpu_state_t v) : _s(v) {}
+
+ /**
+ * \brief Add flags.
+ *
+ * \param bits Bits to add to the word.
+ */
+ void add(unsigned bits) throw() { _s |= bits; }
+
+ /**
+ * \brief Clear flags.
+ *
+ * \param bits Bits to clear in the word.
+ */
+ void clear(unsigned bits) throw() { _s &= ~bits; }
+
+ /**
+ * \brief Set flags.
+ *
+ * \param v Set the word to the value of v.
+ */
+ void set(l4vcpu_state_t v) throw() { _s = v; }
+
+private:
+ l4vcpu_state_t _s;
+};
+
+/**
+ * \brief C++ implementation of the vCPU save state area
+ * \ingroup api_libvcpu
+ */
+class Vcpu : private l4_vcpu_state_t
+{
+public:
+ typedef l4vcpu_irq_state_t Irq_state;
+
+ /**
+ * \brief Disable the vCPU for event delivery.
+ */
+ void irq_disable() throw()
+ { l4vcpu_irq_disable(this); }
+
+ /**
+ * \brief Disable the vCPU for event delivery and return previous state.
+ * \return IRQ state before disabling IRQs.
+ */
+ Irq_state irq_disable_save() throw()
+ { return l4vcpu_irq_disable_save(this); }
+
+ /**
+ * \brief Get state word
+ * \return Pointer to state word in the vCPU
+ */
+ State *state() throw()
+ { return reinterpret_cast<State *>(&(l4_vcpu_state_t::state)); }
+
+ /**
+ * \brief Get state word
+ * \return Pointer to state word in the vCPU
+ */
+ State state() const throw()
+ { return static_cast<State>(l4_vcpu_state_t::state); }
+
+ /**
+ * \brief Get saved_state word
+ * \return Pointer to saved_state word in the vCPU
+ */
+ State *saved_state() throw()
+ { return reinterpret_cast<State *>(&(l4_vcpu_state_t::saved_state)); }
+
+ /**
+ * \brief Get saved_state word
+ * \return Pointer to saved_state word in the vCPU
+ */
+ State saved_state() const throw()
+ { return static_cast<State>(l4_vcpu_state_t::saved_state); }
+
+ /**
+ * \brief Enable the vCPU for event delivery.
+ *
+ * \param do_event_work_cb Call-back function that is called in case an
+ * event (such as an interrupt) is pending.
+ */
+ void irq_enable(l4vcpu_event_hndl_t do_event_work_cb) throw()
+ { l4vcpu_irq_enable(this, do_event_work_cb); }
+
+ /**
+ * \brief Restore a previously saved IRQ/event state.
+ *
+ * \param s IRQ state to be restored.
+ * \param do_event_work_cb Call-back function that is called in case an
+ * event (such as an interrupt) is pending.
+ */
+ void irq_restore(Irq_state s, l4vcpu_event_hndl_t do_event_work_cb) throw()
+ { l4vcpu_irq_restore(this, s, do_event_work_cb); }
+
+ void halt(l4vcpu_event_hndl_t do_event_work_cb) throw()
+ { l4vcpu_halt(this, do_event_work_cb); }
+
+ /**
+ * \brief Set the task of the vCPU.
+ * \param task Task to set, defaults to invalid task.
+ */
+ void task(L4::Cap<L4::Task> const task = L4::Cap<L4::Task>::Invalid) throw()
+ { user_task = task.cap(); }
+
+ /**
+ * \brief Return whether the entry reason was a page fault.
+ * return 0 if not, !=0 otherwise.
+ */
+ int is_page_fault_entry()
+ { return l4vcpu_is_page_fault_entry(this); }
+
+ /**
+ * \brief Return whether the entry reason was an IRQ/IPC message.
+ * return 0 if not, !=0 otherwise.
+ */
+ int is_irq_entry()
+ { return l4vcpu_is_irq_entry(this); }
+
+ /**
+ * \brief Return pointer to register state.
+ * \return Pointer to register state.
+ */
+ l4_vcpu_regs_t *r() throw()
+ { return &(l4_vcpu_state_t::r); }
+
+ /**
+ * \brief Return pointer to register state.
+ * \return Pointer to register state.
+ */
+ l4_vcpu_regs_t const *r() const throw()
+ { return &(l4_vcpu_state_t::r); }
+
+ /**
+ * \brief Return pointer to IPC state.
+ * \return Pointer to IPC state.
+ */
+ l4_vcpu_ipc_regs_t *i() throw()
+ { return &(l4_vcpu_state_t::i); }
+
+ /**
+ * \brief Return pointer to IPC state.
+ * \return Pointer to IPC state.
+ */
+ l4_vcpu_ipc_regs_t const *i() const throw()
+ { return &(l4_vcpu_state_t::i); }
+
+
+ /**
+ * \brief Set vCPU entry stack pointer.
+ * \param sp Stack pointer address to set.
+ *
+ * \note The value is only used when entering from a user-task.
+ */
+ void entry_sp(l4_umword_t sp)
+ { l4_vcpu_state_t::entry_sp = sp; }
+
+ /**
+ * \brief Set vCPU entry instruction pointer.
+ * \param sp Instruction pointer address to set.
+ */
+ void entry_ip(l4_umword_t ip)
+ { l4_vcpu_state_t::entry_ip = ip; }
+
+
+ /**
+ * \brief Print the state of the vCPU.
+ */
+ void print_state(const char *prefix = "") throw()
+ { l4vcpu_print_state(this, prefix); }
+
+ /**
+ * \brief Return a vCPU given the thread UTCB pointer.
+ * \return A pointer to a vCPU.
+ */
+ static Vcpu *vcpu_from_utcb(l4_utcb_t const *utcb) throw()
+ { return reinterpret_cast<Vcpu *>((l4_umword_t)utcb + L4_UTCB_OFFSET); }
+};
+
+
+}
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#pragma once
+
+#include <l4/sys/vcpu.h>
+
+__BEGIN_DECLS
+
+/**
+ * \defgroup api_libvcpu vCPU Support Library
+ * \brief vCPU handling functionality.
+ *
+ * This library provides convenience functionality on top of the l4sys vCPU
+ * interface to ease programming. It wraps commonly used code and abstracts
+ * architecture depends parts as far as reasonable.
+ */
+
+/**
+ * \brief IRQ/Event enable and disable flags.
+ * \ingroup api_libvcpu
+ */
+typedef enum l4vcpu_irq_state_t
+{
+ L4VCPU_IRQ_STATE_DISABLED = 0, ///< IRQ/Event delivery disabled
+ L4VCPU_IRQ_STATE_ENABLED = L4_VCPU_F_IRQ, ///< IRQ/Event delivery enabled
+} l4vcpu_irq_state_t;
+
+typedef l4_umword_t l4vcpu_state_t;
+typedef void (*l4vcpu_event_hndl_t)(l4_vcpu_state_t *vcpu);
+
+/**
+ * \brief Return the state flags of a vCPU.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ */
+L4_INLINE
+l4vcpu_state_t
+l4vcpu_state(l4_vcpu_state_t const *vcpu) L4_NOTHROW;
+
+/**
+ * \brief Disable a vCPU for event delivery.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ */
+L4_INLINE
+void
+l4vcpu_irq_disable(l4_vcpu_state_t *vcpu) L4_NOTHROW;
+
+/**
+ * \brief Disable a vCPU for event delivery and return previous state.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ *
+ * \return IRQ state before disabling IRQs.
+ */
+L4_INLINE
+l4vcpu_irq_state_t
+l4vcpu_irq_disable_save(l4_vcpu_state_t *vcpu) L4_NOTHROW;
+
+/**
+ * \brief Enable a vCPU for event delivery.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ * \param do_event_work_cb Call-back function that is called in case an
+ * event (such as an interrupt) is pending.
+ */
+L4_INLINE
+void
+l4vcpu_irq_enable(l4_vcpu_state_t *vcpu,
+ l4vcpu_event_hndl_t do_event_work_cb) L4_NOTHROW;
+
+/**
+ * \brief Restore a previously saved IRQ/event state.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ * \param s IRQ state to be restored.
+ * \param do_event_work_cb Call-back function that is called in case an
+ * event (such as an interrupt) is pending after
+ * enabling.
+ */
+L4_INLINE
+void
+l4vcpu_irq_restore(l4_vcpu_state_t *vcpu, l4vcpu_irq_state_t s,
+ l4vcpu_event_hndl_t do_event_work_cb) L4_NOTHROW;
+
+/**
+ * \brief Halt the vCPU (sleep).
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ * \param do_event_work_cb Call-back function that is called when the vCPU
+ * awakes and needs to handle an event/IRQ.
+ */
+L4_INLINE
+void
+l4vcpu_halt(l4_vcpu_state_t *vcpu,
+ l4vcpu_event_hndl_t do_event_work_cb) L4_NOTHROW;
+
+
+/**
+ * \brief Print the state of a vCPU.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ * \param prefix A prefix for each line printed.
+ */
+void
+l4vcpu_print_state(l4_vcpu_state_t *vcpu, const char *prefix) L4_NOTHROW;
+
+/**
+ * \internal
+ */
+void
+l4vcpu_print_state_arch(l4_vcpu_state_t *vcpu, const char *prefix) L4_NOTHROW;
+
+
+/**
+ * \brief Return whether the entry reason was an IRQ/IPC message.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ *
+ * return 0 if not, !=0 otherwise.
+ */
+L4_INLINE
+int
+l4vcpu_is_irq_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW;
+
+/**
+ * \brief Return whether the entry reason was a page fault.
+ * \ingroup api_libvcpu
+ *
+ * \param vcpu Pointer to vCPU area.
+ *
+ * return 0 if not, !=0 otherwise.
+ */
+L4_INLINE
+int
+l4vcpu_is_page_fault_entry(l4_vcpu_state_t *vcpu) L4_NOTHROW;
+
+
+/* ===================================================================== */
+/* Implementations */
+
+#include <l4/sys/ipc.h>
+#include <l4/vcpu/vcpu_arch.h>
+
+L4_INLINE
+l4vcpu_state_t
+l4vcpu_state(l4_vcpu_state_t const *vcpu) L4_NOTHROW
+{
+ return vcpu->state;
+}
+
+L4_INLINE
+void
+l4vcpu_irq_disable(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ vcpu->state &= ~L4_VCPU_F_IRQ;
+ l4_barrier();
+}
+
+L4_INLINE
+l4vcpu_irq_state_t
+l4vcpu_irq_disable_save(l4_vcpu_state_t *vcpu) L4_NOTHROW
+{
+ l4vcpu_irq_state_t s = (l4vcpu_irq_state_t)l4vcpu_state(vcpu);
+ l4vcpu_irq_disable(vcpu);
+ return s;
+}
+
+L4_INLINE
+void
+l4vcpu_irq_enable(l4_vcpu_state_t *vcpu,
+ void (*do_event_work_cb)(l4_vcpu_state_t *vcpu)) L4_NOTHROW
+{
+ while (1)
+ {
+ vcpu->state |= L4_VCPU_F_IRQ;
+ l4_barrier();
+
+ if (!(vcpu->sticky_flags & L4_VCPU_SF_IRQ_PENDING))
+ break;
+
+ l4vcpu_irq_disable(vcpu);
+ vcpu->i.tag = l4_ipc_wait(l4_utcb(), &vcpu->i.label, L4_IPC_NEVER);
+ if (!l4_msgtag_has_error(vcpu->i.tag))
+ do_event_work_cb(vcpu);
+ }
+}
+
+L4_INLINE
+void
+l4vcpu_irq_restore(l4_vcpu_state_t *vcpu, l4vcpu_irq_state_t s,
+ l4vcpu_event_hndl_t do_event_work_cb) L4_NOTHROW
+{
+ if (s & L4_VCPU_F_IRQ)
+ l4vcpu_irq_enable(vcpu, do_event_work_cb);
+}
+
+L4_INLINE
+void
+l4vcpu_halt(l4_vcpu_state_t *vcpu,
+ l4vcpu_event_hndl_t do_event_work_cb) L4_NOTHROW
+{
+ l4vcpu_irq_disable(vcpu);
+ vcpu->i.tag = l4_ipc_wait(l4_utcb(), &vcpu->i.label, L4_IPC_NEVER);
+ if (!l4_msgtag_has_error(vcpu->i.tag))
+ do_event_work_cb(vcpu);
+ l4vcpu_irq_enable(vcpu, do_event_work_cb);
+}
+
+__END_DECLS
--- /dev/null
+PKGDIR = ..
+L4DIR ?= $(PKGDIR)/../..
+
+include $(L4DIR)/mk/subdir.mk
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+
+#include <l4/vcpu/vcpu.h>
+#include <stdio.h>
+
+void l4vcpu_print_state_arch(l4_vcpu_state_t *vcpu,
+ const char *prefix) L4_NOTHROW
+{
+ printf("%svcpu=%p ip=%08lx sp=%08lx trapno=%08lx label=%lx\n",
+ prefix, vcpu, vcpu->r.ip, vcpu->r.sp, vcpu->r.trapno, vcpu->i.label);
+ printf("%sax=%08lx dx=%08lx bx=%08lx cx=%08lx\n",
+ prefix, vcpu->r.ax, vcpu->r.dx, vcpu->r.bx, vcpu->r.cx);
+ printf("%ssi=%08lx di=%08lx bp=%08lx flags=%08lx\n",
+ prefix, vcpu->r.si, vcpu->r.di, vcpu->r.bp, vcpu->r.flags);
+}
+
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+
+#include <l4/vcpu/vcpu.h>
+
+#include <stdio.h>
+
+void l4vcpu_print_state_arch(l4_vcpu_state_t *vcpu,
+ const char *prefix) L4_NOTHROW
+{
+ printf("%svcpu=%p ip=%08lx sp=%08lx err=%08lx label=%08lx\n",
+ prefix, vcpu, vcpu->r.ip, vcpu->r.sp, vcpu->r.err, vcpu->i.label);
+ printf("%s r0=%08lx r1=%08lx r2=%08lx r3=%08lx\n",
+ prefix, vcpu->r.r[0], vcpu->r.r[1], vcpu->r.r[2], vcpu->r.r[3]);
+ printf("%s r4=%08lx r5=%08lx r6=%08lx r7=%08lx\n",
+ prefix, vcpu->r.r[4], vcpu->r.r[5], vcpu->r.r[6], vcpu->r.r[7]);
+ printf("%s r8=%08lx r9=%08lx r10=%08lx r11=%08lx\n",
+ prefix, vcpu->r.r[8], vcpu->r.r[9], vcpu->r.r[10], vcpu->r.r[11]);
+ printf("%sr12=%08lx lr=%08lx flags=%08lx\n",
+ prefix, vcpu->r.r[12], vcpu->r.lr, vcpu->r.flags);
+}
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+#include <l4/vcpu/vcpu.h>
+
+#include <stdio.h>
+
+void l4vcpu_print_state_arch(l4_vcpu_state_t *vcpu,
+ const char *prefix) L4_NOTHROW
+{
+ (void)vcpu;
+ printf("%sTBD\n", prefix);
+}
+
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+
+#include <l4/vcpu/vcpu.h>
+#include <stdio.h>
+
+void l4vcpu_print_state_arch(l4_vcpu_state_t *vcpu,
+ const char *prefix) L4_NOTHROW
+{
+ printf("%sip=%08lx sp=%08lx trapno=%08lx\n",
+ prefix, vcpu->r.ip, vcpu->r.sp, vcpu->r.trapno);
+ printf("%sax=%08lx dx=%08lx bx=%08lx cx=%08lx\n",
+ prefix, vcpu->r.ax, vcpu->r.dx, vcpu->r.bx, vcpu->r.cx);
+ printf("%ssi=%08lx di=%08lx bp=%08lx flags=%08lx\n",
+ prefix, vcpu->r.si, vcpu->r.di, vcpu->r.bp, vcpu->r.flags);
+ printf("%sds=%08lx es=%08lx gs=%08lx fs=%08lx\n",
+ prefix, vcpu->r.ds, vcpu->r.es, vcpu->r.gs, vcpu->r.fs);
+}
+
--- /dev/null
+PKGDIR ?= ../..
+L4DIR ?= $(PKGDIR)/../..
+
+PC_FILENAME = libvcpu
+TARGET = libvcpu.a libvcpu.so
+SRC_CC = vcpu.cc ARCH-$(ARCH)/arch.cc
+
+include $(L4DIR)/mk/lib.mk
--- /dev/null
+/*
+ * (c) 2010 Adam Lackorzynski <adam@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ *
+ * As a special exception, you may use this file as part of a free software
+ * library without restriction. Specifically, if other files instantiate
+ * templates or use macros or inline functions from this file, or you compile
+ * this file and link it with other files to produce an executable, this
+ * file does not by itself cause the resulting executable to be covered by
+ * the GNU General Public License. This exception does not however
+ * invalidate any other reasons why the executable file might be covered by
+ * the GNU General Public License.
+ */
+
+#include <l4/vcpu/vcpu.h>
+#include <stdio.h>
+
+void l4vcpu_print_state(l4_vcpu_state_t *vcpu,
+ const char *prefix) L4_NOTHROW
+{
+ printf("%svcpu=%p state=%lx savedstate=%lx label=%lx\n",
+ prefix, vcpu, vcpu->state, vcpu->saved_state, vcpu->i.label);
+ printf("%ssticky=%lx user_task=%lx\n",
+ prefix, vcpu->sticky_flags, vcpu->user_task << L4_CAP_SHIFT);
+ printf("%sentry_sp=%lx entry_ip=%lx\n",
+ prefix, vcpu->entry_sp, vcpu->entry_ip);
+ l4vcpu_print_state_arch(vcpu, prefix);
+}
{
Utcb_area_start = 0xb3000000,
Default_max_threads = 16,
- Total_max_threads = 256,
+ Total_max_threads = 128,
Kip_address = 0xa0000000,
};
L4DIR ?= $(PKGDIR)/../..
EXTRA_TARGET := \
+ basic_window \
box_layout \
doc/block \
doc/item \
titlebar \
user_state \
widget \
- window
+ window \
+ simple_window_deco
include $(L4DIR)/mk/include.mk
--- /dev/null
+// vi:ft=cpp
+/*
+ * (c) 2010 Alexander Warg <warg@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+
+#pragma once
+
+#include <l4/mag-gfx/geometry>
+
+#include <l4/scout-gfx/widget>
+#include <l4/scout-gfx/layout>
+#include <l4/mag-gfx/clip_guard>
+
+namespace Scout_gfx {
+
+/**********************
+ ** Basic_window interface **
+ **********************/
+
+
+class View
+{
+public:
+ virtual Rect geometry() const = 0;
+ virtual Rect set_geometry(Rect const &, bool redraw = false) = 0;
+ virtual void top() = 0;
+ virtual void redraw(Rect const &r) = 0;
+ virtual Mag_gfx::Pixel_info const *pixel_info() const = 0;
+ virtual ~View() {}
+
+};
+
+class Basic_window : public Scout_gfx::Parent_widget
+{
+private:
+
+ View *_view;
+ Area _max_sz;
+ Widget *_mfocus;
+ Widget *_active;
+ Point _active_pos;
+
+protected:
+ Area _min_sz;
+ View *view() { return _view; }
+
+public:
+
+ Area preferred_size() const
+ { return child_layout() ? child_layout()->preferred_size() : _max_sz; }
+ Area min_size() const
+ { return child_layout() ? _min_sz.max(child_layout()->min_size()) : _min_sz; }
+ Area max_size() const { return _max_sz; }
+
+ void child_invalidate()
+ {
+ if (!child_layout())
+ return;
+
+ Area s = _size.min(child_layout()->max_size()).max(child_layout()->min_size());
+ int h = child_layout()->min_height_for_width(s.w());
+ if (h > 0)
+ s.h(std::max(s.h(), h));
+
+ child_layout()->set_geometry(Rect(Point(0, 0), s));
+ _size = s;
+ }
+
+ Orientations expanding() const { return Orientations(); }
+ bool empty() const { return false; }
+
+ void set_geometry(Rect const &r, bool force)
+ {
+ bool need_redraw = false;
+ Area s = r.area().min(max_size());
+
+ if (child_layout() && (force || s != _size))
+ {
+ _size = s;
+ child_layout()->set_geometry(Rect(s));
+ child_invalidate();
+ need_redraw = true;
+ }
+ else
+ _size = s;
+
+ //_pos = r.p1(); _size = s;
+ Rect ng = _view->set_geometry(Rect(r.p1(), _size), need_redraw);
+ _pos = ng.p1(); _size = ng.area();
+ }
+
+ void set_geometry(Rect const &r)
+ { set_geometry(r, false); }
+
+ Rect geometry() const { return Rect(_pos, _size); }
+
+ Basic_window(View *view, Area const &max_sz)
+ : _view(view), _max_sz(max_sz)
+ {
+ /* init element attributes */
+ _size = view->geometry().area();
+ }
+
+ virtual ~Basic_window() { }
+
+ /**
+ * Return current window position
+ */
+ virtual Rect view_pos() const { return _view->geometry(); }
+
+ /**
+ * Accessors
+ */
+ //Platform *pf() const { return _pf; }
+ Area max() const { return _max_sz; }
+
+ /**
+ * Bring window to front
+ */
+ virtual void top() { _view->top(); }
+
+ /**
+ * Element interface
+ *
+ * This function just collects the specified regions to be
+ * redrawn but does not perform any immediate drawing
+ * operation. The actual drawing must be initiated by
+ * calling the process_redraw function.
+ */
+ void redraw_area(Rect const &r) const
+ { _view->redraw(r + _pos); }
+
+ void draw(Mag_gfx::Canvas *c, Point const &p)
+ {
+ Mag_gfx::Clip_guard g(c, Rect(p, size()));
+ Parent_widget::draw(c, p);
+ }
+
+ Widget *handle_event(Event const &ev);
+
+private:
+ void _assign_mfocus(Widget *e, int force = 0);
+};
+
+
+/********************
+ ** Event handlers **
+ ********************/
+
+class Drag_event_handler : public Scout_gfx::Event_handler
+{
+protected:
+ Point _cm; /* original mouse position */
+ Point _om; /* current mouse positon */
+
+ virtual void start_drag() = 0;
+ virtual void do_drag() = 0;
+
+ Point diff() const { return _cm - _om; }
+
+public:
+ /**
+ * Event handler interface
+ */
+ bool handle(Scout_gfx::Event const &ev)
+ {
+ if (ev.key_cnt == 0)
+ return false;
+
+ /* first click starts dragging */
+ if ((ev.type == Scout_gfx::Event::PRESS) && (ev.key_cnt == 1))
+ {
+ _cm = ev.m;
+ _om = ev.m;
+ start_drag();
+ }
+
+ /* check if mouse was moved */
+ if (ev.m == _cm)
+ return true;
+
+ /* remember current mouse position */
+ _cm = ev.m;
+
+ do_drag();
+ return true;
+ }
+
+ virtual ~Drag_event_handler() {}
+};
+
+
+class Sizer_event_handler : public Drag_event_handler
+{
+protected:
+
+ Basic_window *_window;
+ Area _osz; /* original window size */
+
+ /**
+ * Event handler interface
+ */
+ void start_drag()
+ { _osz = _window->view_pos().area(); }
+
+ void do_drag()
+ {
+ /* calculate new window size */
+ Area nsz = _osz.grow(diff());
+
+ _window->set_geometry(Rect(_window->geometry().p1(), nsz));
+ }
+
+public:
+
+ /**
+ * Constructor
+ */
+ Sizer_event_handler(Basic_window *window)
+ {
+ _window = window;
+ }
+};
+
+
+class Mover_event_handler : public Drag_event_handler
+{
+protected:
+
+ Basic_window *_window;
+ Point _ob; /* original launchpad position */
+
+
+ void start_drag()
+ {
+ _ob = _window->view_pos().p1();
+ _window->top();
+ }
+
+ void do_drag()
+ {
+ Point nb = _ob + diff();
+
+ _window->set_geometry(Rect(nb, _window->geometry().area()));
+ }
+
+public:
+
+ /**
+ * Constructor
+ */
+ Mover_event_handler(Basic_window *window)
+ {
+ _window = window;
+ }
+};
+
+}
--- /dev/null
+// vi:ft=cpp
+
+#pragma once
+
+#include <l4/scout-gfx/window>
+
+namespace Scout_gfx {
+
+class Factory;
+
+class Simple_window_deco_policy : public Window::Deco_policy
+{
+private:
+ Factory *_f;
+
+public:
+ Simple_window_deco_policy(Factory *factory) : _f(factory) {}
+ Widget *create_deco(Window *) const;
+ void set_deco_mode(Window::Mode mode, Widget *deco, Insets *insets);
+};
+
+}
#pragma once
#include <l4/scout-gfx/widget>
-#include <l4/scout-gfx/window>
namespace Scout_gfx {
Event_handler *_evh;
struct
{
- int mfocus : 1; /* element has mouse focus */
- int selected : 1; /* element has selected state */
- int takes_focus : 1; /* element highlights mouse focus */
- int findable : 1; /* regard element in find function */
+ int mfocus : 1; ///< Widget has mouse focus
+ int selected : 1; ///< Widget is currently selected
+ int takes_focus : 1; ///< Widget highlights mouse focus
+ int findable : 1; ///< Regard element in find function
+ int visible : 1; ///< Widget is visible
} _flags;
public:
_flags.mfocus = 0;
_flags.selected = 0;
_flags.findable = 1;
+ _flags.visible = 1;
}
virtual ~Widget();
void findable(int flag) { _flags.findable = flag; }
- bool findable() { return _flags.findable; }
+ bool findable() const { return _flags.findable; }
+
+ void visible(bool flag) { _flags.visible = flag; }
+ bool visible() const { return _flags.visible; }
virtual void draw(Canvas *c, Point const &p) = 0;
virtual Widget *find(Point const &p);
*/
void try_draw(Canvas *c, Point const &p)
{
+ if (!visible())
+ return;
#if 0
/* check if element is completely outside the clipping area */
if (!(c->clip() & Rect(p + _pos, _size)).valid())
--- /dev/null
+// vi:ft=cpp
+
+#pragma once
+
+#include <l4/scout-gfx/basic_window>
+
+namespace Scout_gfx {
+
+class Window : public Basic_window
+{
+public:
+ enum Mode
+ {
+ Normal,
+ Maximized,
+ Minimized,
+ Fullscreen
+ };
+
+
+ class Deco_policy
+ {
+ public:
+ struct Insets { Area tl, br; };
+
+ virtual Widget *create_deco(Window *) const = 0;
+ virtual void set_deco_mode(Mode mode, Widget *deco, Insets *insets) = 0;
+ };
+
+private:
+ Rect _normal_pos;
+
+ Parent_widget _content;
+ Widget *_deco;
+ Deco_policy::Insets *_insets;
+ Deco_policy *_deco_policy;
+
+protected:
+ // hide those functions, use content_pane()->... instead
+ using Basic_window::set_child_layout;
+ using Basic_window::child_layout;
+
+public:
+ Window(Deco_policy *deco_policy, View *v, Area const &max_size);
+
+// Widget *handle_event(Event const &e);
+
+ virtual void set_window_mode(Mode mode);
+
+ Parent_widget *content_pane() { return &_content; }
+ Deco_policy::Insets const &insets() const { return *_insets; }
+
+
+ void set_geometry(Rect const &g)
+ {
+ Basic_window::set_geometry(g);
+ _deco->set_geometry(Rect(geometry().area()));
+ }
+
+ void append(Widget *w) { _content.append(w); }
+ void remove(Widget *w) { _content.remove(w); }
+ void forget(Widget *w) { _content.forget(w); }
+
+ Area preferred_size() const
+ { return Basic_window::child_layout()->preferred_size(); }
+
+ Area min_size() const
+ { return _min_sz.max(Basic_window::child_layout()->min_size()); }
+
+ Area max_size() const
+ { return Basic_window::max_size().min(Basic_window::child_layout()->max_size()); }
+
+ Orientations expanding() const
+ { return Basic_window::child_layout()->expanding(); }
+
+ bool empty() const
+ { return false; }
+
+ bool has_height_for_width() const
+ { return Basic_window::child_layout()->has_height_for_width(); }
+
+ int height_for_width(int w) const
+ { return Basic_window::child_layout()->height_for_width(w); }
+
+ int min_height_for_width(int w) const
+ { return Basic_window::child_layout()->min_height_for_width(w); }
+
+};
+
+}
loadbar.cc \
redraw_manager.cc \
grid_layout.cc \
- window.cc
+ basic_window.cc \
+ window.cc \
+ simple_window_deco.cc
SRC_BIN = vera16.tff \
verai16.tff \
nav_prev.rgba \
loadbar.rgba \
redbar.rgba \
- whitebar.rgba
+ whitebar.rgba \
+ sizer.rgba
SRC_BIN += $(SRC_RGBA)
--- /dev/null
+/*
+ * (c) 2010 Alexander Warg <warg@os.inf.tu-dresden.de>
+ * economic rights: Technische Universität Dresden (Germany)
+ *
+ * This file is part of TUD:OS and distributed under the terms of the
+ * GNU General Public License 2.
+ * Please see the COPYING-GPL-2 file for details.
+ */
+#include <l4/scout-gfx/basic_window>
+
+namespace Scout_gfx {
+
+void
+Basic_window::_assign_mfocus(Widget *e, int force)
+{
+ /* return if mouse focus did not change */
+ if (!force && e == _mfocus)
+ return;
+
+ /* tell old mouse focus to release focus */
+ if (_mfocus)
+ _mfocus->mfocus(0);
+
+ /* assign new current mouse focus */
+ _mfocus = e;
+
+ /* notify new mouse focus */
+ if (_mfocus)
+ _mfocus->mfocus(1);
+
+#if 0
+ /* determine new current link destination */
+ Widget *old_dst = _dst;
+ Link_token *lt;
+ if (_mfocus && (lt = dynamic_cast<Link_token*>(_mfocus)))
+ {
+ _dst = lt->dst();
+ }
+ else
+ _dst = 0;
+ /* nofify element tree about new link destination */
+ if (_dst != old_dst)
+ _root->curr_link_destination(_dst);
+#endif
+}
+
+Widget *
+Basic_window::handle_event(Event const &ev)
+{
+ Parent_widget::handle_event(ev);
+ if (_active)
+ {
+ Event re = ev;
+ re.m -= _active_pos;
+ _active->handle_event(re);
+ }
+
+ Widget *e = 0;
+ if (ev.type != 4)
+ e = find(ev.m);
+
+ if (e == this)
+ e = 0;
+
+ switch (ev.type)
+ {
+
+ case Event::PRESS:
+ if (ev.key_cnt != 1 || !e)
+ break;
+
+ {
+ _active_pos = e->map_to_parent(Point(0,0));
+ _active = e;
+
+ Event re = ev;
+ re.m -= _active_pos;
+ _active->handle_event(re);
+ }
+
+ _assign_mfocus(e, 1);
+
+ break;
+
+ case Event::RELEASE:
+ if (ev.key_cnt == 0)
+ {
+ _active = 0;
+ _assign_mfocus(e);
+ }
+ break;
+
+ case Event::WHEEL:
+#if 0
+ if (Widget *x = find_child(m))
+ {
+ Event re = ev;
+ re.m = x->map_from_parent(ev.m);
+ x->handle_event(re);
+ }
+ break;
+#endif
+ case Event::MOTION:
+ if (!_active && e)
+ {
+ Event re = ev;
+ re.m = e->map_from_parent(ev.m);
+ e->handle_event(re);
+ }
+
+ if (ev.key_cnt == 0)
+ _assign_mfocus(e);
+ break;
+
+ default:
+
+ break;
+ }
+
+ return this;
+}
+}
+
--- /dev/null
+
+#include <l4/scout-gfx/simple_window_deco>
+#include <l4/scout-gfx/icon>
+#include <l4/scout-gfx/factory>
+
+#define SIZER_RGBA _binary_sizer_rgba_start
+extern unsigned char SIZER_RGBA[];
+
+
+namespace Scout_gfx {
+
+namespace {
+
+class Deco_widget : public Parent_widget
+{
+public:
+ enum { th = 16 };
+ Icon *_sizer;
+
+ Sizer_event_handler _sevh;
+ Mover_event_handler _mevh;
+
+ Deco_widget(Factory *f, Window *w)
+ : _sevh(w), _mevh(w)
+ {
+ _sizer = f->create_icon(SIZER_RGBA, Area(32, 32));
+ _sizer->alpha(100);
+ _sizer->event_handler(&_sevh);
+ append(_sizer);
+ }
+
+ Mag_gfx::Area preferred_size() const { return Mag_gfx::Area(0,0); }
+ Mag_gfx::Area min_size() const { return Mag_gfx::Area(0,0); }
+ Mag_gfx::Area max_size() const { return Mag_gfx::Area(Mag_gfx::Area::Max_w, Mag_gfx::Area::Max_h); }
+ Mag_gfx::Orientations expanding() const { return Mag_gfx::Horz; }
+ bool empty() const { return false; }
+
+ void draw(Mag_gfx::Canvas *c, Mag_gfx::Point const &p)
+ {
+ using namespace Mag_gfx;
+ static const Mag_gfx::Rgba32::Color grey(42, 62, 62);
+ static const Mag_gfx::Rgba32::Color black(0, 0, 0);
+
+ c->draw_box(Rect(p, Area(size().w(), th)), grey);
+
+ c->draw_box(Rect(p + Point(0, size().h() - 1), Area(size().w(), 1)), black);
+ Area hl(1, size().h() - th);
+ c->draw_box(Rect(p + Point(0, th), hl), black);
+ c->draw_box(Rect(p + Point(size().w() - 1, th), hl), black);
+
+ Parent_widget::draw(c, p);
+
+ // _sizer->draw(c, p + Point(size() - _sizer->size()));
+ }
+
+ Rect title_rect() const
+ {
+ Rect r = geometry();
+ r = Rect(r.p1(), Area(r.w(), th));
+ return r;
+ }
+
+ Widget *find(Point const &p)
+ {
+ if (!findable() || !geometry().contains(p))
+ return 0;
+
+ if (title_rect().contains(p))
+ return this;
+
+ return _sizer->find(p - pos());
+ }
+
+ Widget *handle_event(Event const &e)
+ {
+ if (!visible())
+ return 0;
+
+ _mevh.handle(e);
+ return this;
+ }
+
+ void set_geometry(Rect const &r)
+ {
+ Widget::set_geometry(r);
+ _sizer->set_geometry(Rect(Point(size() - _sizer->size()), _sizer->size()));
+ }
+};
+
+}
+
+Widget *
+Simple_window_deco_policy::create_deco(Window *w) const
+{
+ return new Deco_widget(_f, w);
+}
+
+void
+Simple_window_deco_policy::set_deco_mode(Window::Mode mode, Widget *deco,
+ Insets *insets)
+{
+ if (mode == Window::Fullscreen)
+ {
+ insets->tl = Area(0, 0);
+ insets->br = Area(0, 0);
+ deco->findable(false);
+ deco->visible(false);
+ }
+ else
+ {
+ insets->tl = Area(1, 16);
+ insets->br = Area(1, 1);
+ deco->findable(true);
+ deco->visible(true);
+ }
+}
+
+}
Widget *
Parent_widget::find(Point const &p)
{
+ if (!findable())
+ return 0;
+
/* check if position is outside the parent element */
if (!geometry().contains(p))
return 0;
--- /dev/null
+#include <l4/scout-gfx/window>
+
+#include <l4/re/event_enums.h>
+namespace Scout_gfx {
+
+using namespace Mag_gfx;
+
+namespace {
+
+class Win_layout : public Layout
+{
+private:
+ Window::Deco_policy::Insets _inset;
+
+ Layout_item *_child;
+
+public:
+ Win_layout(Layout_item *child, Window::Deco_policy::Insets **insets)
+ : _inset(), _child(child)
+ {
+ _inset.tl = Area(0,0);
+ _inset.br = Area(0,0);
+ _child->set_parent_layout_item(this);
+ *insets = &_inset;
+ }
+
+ virtual ~Win_layout() {}
+
+ Area preferred_size() const
+ { return _child->preferred_size() + _inset.tl + _inset.br; }
+
+ Area min_size() const
+ { return _child->min_size() + _inset.tl + _inset.br; }
+
+ Area max_size() const
+ { return _child->max_size() + _inset.tl + _inset.br; }
+
+ Orientations expanding() const { return _child->expanding(); }
+ bool empty() const { return false; }
+ bool has_height_for_width() const
+ { return _child->has_height_for_width(); }
+
+ int height_for_width(int w) const
+ { return _child->height_for_width(w); }
+
+ int min_height_for_width(int w) const
+ { return _child->min_height_for_width(w); }
+
+ //void child_invalidate() { _child->invalidate(); }
+ //void invalidate() { _child->invalidate(); }
+
+ void set_geometry(Rect const &r)
+ {
+ Rect x
+ = r.offset(_inset.tl.w(), _inset.tl.h(), -_inset.br.w(), -_inset.br.h());
+
+ _child->set_geometry(x);
+ }
+
+ Rect geometry() const
+ {
+ return _child->geometry().offset(-_inset.tl.w(), -_inset.tl.h(),
+ _inset.br.w(), _inset.br.h());
+ }
+
+ void add_item(Layout_item *) {}
+ Layout_item *remove_item(int) { return 0; }
+ Layout_item *item(int) const { return _child; }
+};
+
+}
+
+Window::Window(Window::Deco_policy *dp, View *v,
+ Area const &max_size)
+: Basic_window(v, max_size),
+ // this is some stupid hack, needs to be defined by the app
+ _normal_pos(Point(100, 100), Area(300, 200)),
+ _deco_policy(dp)
+{
+ _deco = _deco_policy->create_deco(this);
+ Basic_window::set_child_layout(new Win_layout(&_content, &_insets));
+ _deco_policy->set_deco_mode(Window::Fullscreen, _deco, _insets);
+
+ Basic_window::append(&_content);
+ Basic_window::append(_deco);
+}
+
+
+void
+Window::set_window_mode(Mode mode)
+{
+ _deco_policy->set_deco_mode(mode, _deco, _insets);
+ if (mode == Normal)
+ set_geometry(_normal_pos);
+ else
+ {
+ _normal_pos = geometry();
+ switch (mode)
+ {
+ case Fullscreen:
+ case Maximized:
+ set_geometry(Rect(Point(0,0), max_size()));
+ break;
+ case Minimized:
+ set_geometry(Rect(pos(), min_size()));
+ break;
+ default:
+ break;
+ }
+ }
+ redraw_area(Rect(Point(0, 0), size()));
+}
+
+}
History _history;
int _voffset;
+
/**
* Define content to present in browser window
*/
virtual ~Scout_browser() { }
+ char const *title() const { return _document->title; }
+
void voffset(int voffset)
{ _voffset = voffset; }
Scout_gfx::Document *initial_content,
Scout_gfx::View *pf,
Area const &max_sz, int attr)
-: Window(pf, max_sz),
+: Basic_window(pf, max_sz),
_titlebar(f, &title_font), _cont(0)
{
using namespace Mag_gfx;
#include "platform.h"
#include <l4/scout-gfx/redraw_manager>
#include "browser.h"
-#include <l4/scout-gfx/window>
+#include <l4/scout-gfx/basic_window>
#include <l4/scout-gfx/titlebar>
class Factory;
class Browser_window
: public Scout_browser,
- public Scout_gfx::Window
+ public Scout_gfx::Basic_window
{
private:
void draw(Mag_gfx::Canvas *c, Point const &p)
{
using Scout_gfx::Color;
- Window::draw(c, p);
+ Basic_window::draw(c, p);
if (_attr & ATTR_BORDER)
{
Scout_gfx::View *view = pf->create_view(Rect(Point(0,0), Area(Browser_width, Browser_height)));
/* create instance of browser window */
- Scout_gfx::Window *browser =
+ Scout_gfx::Basic_window *browser =
new Browser_window(f,
doc, /* initial document */
view, /* platform */
return -L4_ENOENT;
}
- if (l4re_ns_query_to_srv(nssrv, "shm", shmarea->_shm_ds, timeout_ms))
+ if ((r = l4re_ns_query_to_srv(nssrv, "shm", shmarea->_shm_ds, timeout_ms)))
{
- printf("shm: did not find shm-ds 'shm'\n");
+ printf("shm: did not find shm-ds 'shm' (%ld)\n", r);
return -L4_ENOENT;
}
-# Doxyfile 1.2.8.1
+# Doxyfile 1.7.1
# This file describes the settings to be used by the documentation system
# doxygen (www.doxygen.org) for a project
# Values that contain spaces should be placed between quotes (" ")
#---------------------------------------------------------------------------
-# General configuration options
+# Project related configuration options
#---------------------------------------------------------------------------
-# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
+# This tag specifies the encoding used for all characters in the config file
+# that follow. The default is UTF-8 which is also the encoding used for all
+# text before the first occurrence of this tag. Doxygen uses libiconv (or the
+# iconv built into libc) for the transcoding. See
+# http://www.gnu.org/software/libiconv for the list of possible encodings.
+
+DOXYFILE_ENCODING = UTF-8
+
+# The PROJECT_NAME tag is a single word (or a sequence of words surrounded
# by quotes) that should identify the project.
PROJECT_NAME = "libgendep"
-# The PROJECT_NUMBER tag can be used to enter a project or revision number.
-# This could be handy for archiving the generated documentation or
+# The PROJECT_NUMBER tag can be used to enter a project or revision number.
+# This could be handy for archiving the generated documentation or
# if some version control system is used.
PROJECT_NUMBER = "Version 0.2"
-# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
-# base path where the generated documentation will be put.
-# If a relative path is entered, it will be relative to the location
+# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
+# base path where the generated documentation will be put.
+# If a relative path is entered, it will be relative to the location
# where doxygen was started. If left blank the current directory will be used.
-OUTPUT_DIRECTORY =
+OUTPUT_DIRECTORY =
+
+# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create
+# 4096 sub-directories (in 2 levels) under the output directory of each output
+# format and will distribute the generated files over these directories.
+# Enabling this option can be useful when feeding doxygen a huge amount of
+# source files, where putting all generated files in the same directory would
+# otherwise cause performance problems for the file system.
-# The OUTPUT_LANGUAGE tag is used to specify the language in which all
-# documentation generated by doxygen is written. Doxygen will use this
-# information to generate all constant output in the proper language.
-# The default language is English, other supported languages are:
-# Brazilian, Chinese, Croatian, Czech, Danish, Dutch, Finnish, French,
-# German, Hungarian, Italian, Japanese, Korean, Norwegian, Polish,
-# Portuguese, Romanian, Russian, Slovak, Slovene, Spanish and Swedish.
+CREATE_SUBDIRS = NO
+
+# The OUTPUT_LANGUAGE tag is used to specify the language in which all
+# documentation generated by doxygen is written. Doxygen will use this
+# information to generate all constant output in the proper language.
+# The default language is English, other supported languages are:
+# Afrikaans, Arabic, Brazilian, Catalan, Chinese, Chinese-Traditional,
+# Croatian, Czech, Danish, Dutch, Esperanto, Farsi, Finnish, French, German,
+# Greek, Hungarian, Italian, Japanese, Japanese-en (Japanese with English
+# messages), Korean, Korean-en, Lithuanian, Norwegian, Macedonian, Persian,
+# Polish, Portuguese, Romanian, Russian, Serbian, Serbian-Cyrilic, Slovak,
+# Slovene, Spanish, Swedish, Ukrainian, and Vietnamese.
OUTPUT_LANGUAGE = English
-# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
-# documentation are documented, even if no documentation was available.
-# Private class members and static file members will be hidden unless
-# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
+# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
+# include brief member descriptions after the members that are listed in
+# the file and class documentation (similar to JavaDoc).
+# Set to NO to disable this.
-EXTRACT_ALL = NO
+BRIEF_MEMBER_DESC = YES
-# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
-# will be included in the documentation.
+# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
+# the brief description of a member or function before the detailed description.
+# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
+# brief descriptions will be completely suppressed.
-EXTRACT_PRIVATE = NO
+REPEAT_BRIEF = YES
-# If the EXTRACT_STATIC tag is set to YES all static members of a file
-# will be included in the documentation.
+# This tag implements a quasi-intelligent brief description abbreviator
+# that is used to form the text in various listings. Each string
+# in this list, if found as the leading text of the brief description, will be
+# stripped from the text and the result after processing the whole list, is
+# used as the annotated text. Otherwise, the brief description is used as-is.
+# If left blank, the following values are used ("$name" is automatically
+# replaced with the name of the entity): "The $name class" "The $name widget"
+# "The $name file" "is" "provides" "specifies" "contains"
+# "represents" "a" "an" "the"
-EXTRACT_STATIC = NO
+ABBREVIATE_BRIEF =
-# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
-# undocumented members of documented classes, files or namespaces.
-# If set to NO (the default) these members will be included in the
-# various overviews, but no documentation section is generated.
-# This option has no effect if EXTRACT_ALL is enabled.
+# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
+# Doxygen will generate a detailed section even if there is only a brief
+# description.
-HIDE_UNDOC_MEMBERS = NO
+ALWAYS_DETAILED_SEC = NO
-# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
-# undocumented classes that are normally visible in the class hierarchy.
-# If set to NO (the default) these class will be included in the various
-# overviews. This option has no effect if EXTRACT_ALL is enabled.
+# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all
+# inherited members of a class in the documentation of that class as if those
+# members were ordinary class members. Constructors, destructors and assignment
+# operators of the base classes will not be shown.
-HIDE_UNDOC_CLASSES = NO
+INLINE_INHERITED_MEMB = NO
-# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will
-# include brief member descriptions after the members that are listed in
-# the file and class documentation (similar to JavaDoc).
-# Set to NO to disable this.
+# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
+# path before files name in the file list and in the header files. If set
+# to NO the shortest path that makes the file name unique will be used.
-BRIEF_MEMBER_DESC = YES
+FULL_PATH_NAMES = NO
-# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend
-# the brief description of a member or function before the detailed description.
-# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the
-# brief descriptions will be completely suppressed.
+# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
+# can be used to strip a user-defined part of the path. Stripping is
+# only done if one of the specified strings matches the left-hand part of
+# the path. The tag can be used to show relative paths in the file list.
+# If left blank the directory from which doxygen is run is used as the
+# path to strip.
-REPEAT_BRIEF = YES
+STRIP_FROM_PATH =
-# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then
-# Doxygen will generate a detailed section even if there is only a brief
-# description.
+# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of
+# the path mentioned in the documentation of a class, which tells
+# the reader which header file to include in order to use a class.
+# If left blank only the name of the header file containing the class
+# definition is used. Otherwise one should specify the include paths that
+# are normally passed to the compiler using the -I flag.
-ALWAYS_DETAILED_SEC = NO
+STRIP_FROM_INC_PATH =
-# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full
-# path before files name in the file list and in the header files. If set
-# to NO the shortest path that makes the file name unique will be used.
+# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
+# (but less readable) file names. This can be useful is your file systems
+# doesn't support long names like on DOS, Mac, or CD-ROM.
-FULL_PATH_NAMES = NO
+SHORT_NAMES = NO
-# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag
-# can be used to strip a user defined part of the path. Stripping is
-# only done if one of the specified strings matches the left-hand part of
-# the path. It is allowed to use relative paths in the argument list.
+# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
+# will interpret the first line (until the first dot) of a JavaDoc-style
+# comment as the brief description. If set to NO, the JavaDoc
+# comments will behave just like regular Qt-style comments
+# (thus requiring an explicit @brief command for a brief description.)
-STRIP_FROM_PATH =
+JAVADOC_AUTOBRIEF = NO
-# The INTERNAL_DOCS tag determines if documentation
-# that is typed after a \internal command is included. If the tag is set
-# to NO (the default) then the documentation will be excluded.
-# Set it to YES to include the internal documentation.
+# If the QT_AUTOBRIEF tag is set to YES then Doxygen will
+# interpret the first line (until the first dot) of a Qt-style
+# comment as the brief description. If set to NO, the comments
+# will behave just like regular Qt-style comments (thus requiring
+# an explicit \brief command for a brief description.)
-INTERNAL_DOCS = NO
+QT_AUTOBRIEF = NO
-# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
-# generate a class diagram (in Html and LaTeX) for classes with base or
-# super classes. Setting the tag to NO turns the diagrams off.
+# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen
+# treat a multi-line C++ special comment block (i.e. a block of //! or ///
+# comments) as a brief description. This used to be the default behaviour.
+# The new default is to treat a multi-line C++ comment block as a detailed
+# description. Set this tag to YES if you prefer the old behaviour instead.
-CLASS_DIAGRAMS = YES
+MULTILINE_CPP_IS_BRIEF = NO
-# If the SOURCE_BROWSER tag is set to YES then a list of source files will
-# be generated. Documented entities will be cross-referenced with these sources.
+# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
+# member inherits the documentation from any documented member that it
+# re-implements.
-SOURCE_BROWSER = NO
+INHERIT_DOCS = YES
-# Setting the INLINE_SOURCES tag to YES will include the body
-# of functions and classes directly in the documentation.
+# If the SEPARATE_MEMBER_PAGES tag is set to YES, then doxygen will produce
+# a new page for each member. If set to NO, the documentation of a member will
+# be part of the file/class/namespace that contains it.
-INLINE_SOURCES = NO
+SEPARATE_MEMBER_PAGES = NO
-# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
-# doxygen to hide any special comment blocks from generated source code
-# fragments. Normal C and C++ comments will always remain visible.
+# The TAB_SIZE tag can be used to set the number of spaces in a tab.
+# Doxygen uses this value to replace tabs by spaces in code fragments.
-STRIP_CODE_COMMENTS = YES
+TAB_SIZE = 8
-# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
-# file names in lower case letters. If set to YES upper case letters are also
-# allowed. This is useful if you have classes or files whose names only differ
-# in case and if your file system supports case sensitive file names. Windows
-# users are adviced to set this option to NO.
+# This tag can be used to specify a number of aliases that acts
+# as commands in the documentation. An alias has the form "name=value".
+# For example adding "sideeffect=\par Side Effects:\n" will allow you to
+# put the command \sideeffect (or @sideeffect) in the documentation, which
+# will result in a user-defined paragraph with heading "Side Effects:".
+# You can put \n's in the value part of an alias to insert newlines.
-CASE_SENSE_NAMES = YES
+ALIASES =
-# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter
-# (but less readable) file names. This can be useful is your file systems
-# doesn't support long names like on DOS, Mac, or CD-ROM.
+# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C
+# sources only. Doxygen will then generate output that is more tailored for C.
+# For instance, some of the names that are used will be different. The list
+# of all members will be omitted, etc.
-SHORT_NAMES = NO
+OPTIMIZE_OUTPUT_FOR_C = NO
-# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
-# will show members with their full class and namespace scopes in the
-# documentation. If set to YES the scope will be hidden.
+# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java
+# sources only. Doxygen will then generate output that is more tailored for
+# Java. For instance, namespaces will be presented as packages, qualified
+# scopes will look different, etc.
-HIDE_SCOPE_NAMES = NO
+OPTIMIZE_OUTPUT_JAVA = NO
-# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
-# will generate a verbatim copy of the header file for each class for
-# which an include is specified. Set to NO to disable this.
+# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran
+# sources only. Doxygen will then generate output that is more tailored for
+# Fortran.
-VERBATIM_HEADERS = YES
+OPTIMIZE_FOR_FORTRAN = NO
-# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
-# will put list of the files that are included by a file in the documentation
-# of that file.
+# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL
+# sources. Doxygen will then generate output that is tailored for
+# VHDL.
-SHOW_INCLUDE_FILES = YES
+OPTIMIZE_OUTPUT_VHDL = NO
-# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen
-# will interpret the first line (until the first dot) of a JavaDoc-style
-# comment as the brief description. If set to NO, the JavaDoc
-# comments will behave just like the Qt-style comments (thus requiring an
-# explict @brief command for a brief description.
+# Doxygen selects the parser to use depending on the extension of the files it
+# parses. With this tag you can assign which parser to use for a given extension.
+# Doxygen has a built-in mapping, but you can override or extend it using this
+# tag. The format is ext=language, where ext is a file extension, and language
+# is one of the parsers supported by doxygen: IDL, Java, Javascript, CSharp, C,
+# C++, D, PHP, Objective-C, Python, Fortran, VHDL, C, C++. For instance to make
+# doxygen treat .inc files as Fortran files (default is PHP), and .f files as C
+# (default is Fortran), use: inc=Fortran f=C. Note that for custom extensions
+# you also need to set FILE_PATTERNS otherwise the files are not read by doxygen.
-JAVADOC_AUTOBRIEF = NO
+EXTENSION_MAPPING =
-# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented
-# member inherits the documentation from any documented member that it
-# reimplements.
+# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want
+# to include (a tag file for) the STL sources as input, then you should
+# set this tag to YES in order to let doxygen match functions declarations and
+# definitions whose arguments contain STL classes (e.g. func(std::string); v.s.
+# func(std::string) {}). This also make the inheritance and collaboration
+# diagrams that involve STL classes more complete and accurate.
-INHERIT_DOCS = YES
+BUILTIN_STL_SUPPORT = NO
+
+# If you use Microsoft's C++/CLI language, you should set this option to YES to
+# enable parsing support.
+
+CPP_CLI_SUPPORT = NO
+
+# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only.
+# Doxygen will parse them like normal C++ but will assume all classes use public
+# instead of private inheritance when no explicit protection keyword is present.
+
+SIP_SUPPORT = NO
+
+# For Microsoft's IDL there are propget and propput attributes to indicate getter
+# and setter methods for a property. Setting this option to YES (the default)
+# will make doxygen to replace the get and set methods by a property in the
+# documentation. This will only work if the methods are indeed getting or
+# setting a simple type. If this is not the case, or you want to show the
+# methods anyway, you should set this option to NO.
+
+IDL_PROPERTY_SUPPORT = YES
+
+# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
+# tag is set to YES, then doxygen will reuse the documentation of the first
+# member in the group (if any) for the other members of the group. By default
+# all members of a group must be documented explicitly.
+
+DISTRIBUTE_GROUP_DOC = NO
+
+# Set the SUBGROUPING tag to YES (the default) to allow class member groups of
+# the same type (for instance a group of public functions) to be put as a
+# subgroup of that type (e.g. under the Public Functions section). Set it to
+# NO to prevent subgrouping. Alternatively, this can be done per class using
+# the \nosubgrouping command.
+
+SUBGROUPING = YES
+
+# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum
+# is documented as struct, union, or enum with the name of the typedef. So
+# typedef struct TypeS {} TypeT, will appear in the documentation as a struct
+# with name TypeT. When disabled the typedef will appear as a member of a file,
+# namespace, or class. And the struct will be named TypeS. This can typically
+# be useful for C code in case the coding convention dictates that all compound
+# types are typedef'ed and only the typedef is referenced, never the tag name.
+
+TYPEDEF_HIDES_STRUCT = NO
+
+# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to
+# determine which symbols to keep in memory and which to flush to disk.
+# When the cache is full, less often used symbols will be written to disk.
+# For small to medium size projects (<1000 input files) the default value is
+# probably good enough. For larger projects a too small cache size can cause
+# doxygen to be busy swapping symbols to and from disk most of the time
+# causing a significant performance penality.
+# If the system has enough physical memory increasing the cache will improve the
+# performance by keeping more symbols in memory. Note that the value works on
+# a logarithmic scale so increasing the size by one will rougly double the
+# memory usage. The cache size is given by this formula:
+# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0,
+# corresponding to a cache size of 2^16 = 65536 symbols
+
+SYMBOL_CACHE_SIZE = 0
+
+#---------------------------------------------------------------------------
+# Build related configuration options
+#---------------------------------------------------------------------------
+
+# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in
+# documentation are documented, even if no documentation was available.
+# Private class members and static file members will be hidden unless
+# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES
+
+EXTRACT_ALL = NO
+
+# If the EXTRACT_PRIVATE tag is set to YES all private members of a class
+# will be included in the documentation.
+
+EXTRACT_PRIVATE = NO
+
+# If the EXTRACT_STATIC tag is set to YES all static members of a file
+# will be included in the documentation.
-# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
+EXTRACT_STATIC = NO
+
+# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs)
+# defined locally in source files will be included in the documentation.
+# If set to NO only classes defined in header files are included.
+
+EXTRACT_LOCAL_CLASSES = YES
+
+# This flag is only useful for Objective-C code. When set to YES local
+# methods, which are defined in the implementation section but not in
+# the interface are included in the documentation.
+# If set to NO (the default) only methods in the interface are included.
+
+EXTRACT_LOCAL_METHODS = NO
+
+# If this flag is set to YES, the members of anonymous namespaces will be
+# extracted and appear in the documentation as a namespace called
+# 'anonymous_namespace{file}', where file will be replaced with the base
+# name of the file that contains the anonymous namespace. By default
+# anonymous namespace are hidden.
+
+EXTRACT_ANON_NSPACES = NO
+
+# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all
+# undocumented members of documented classes, files or namespaces.
+# If set to NO (the default) these members will be included in the
+# various overviews, but no documentation section is generated.
+# This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_MEMBERS = NO
+
+# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all
+# undocumented classes that are normally visible in the class hierarchy.
+# If set to NO (the default) these classes will be included in the various
+# overviews. This option has no effect if EXTRACT_ALL is enabled.
+
+HIDE_UNDOC_CLASSES = NO
+
+# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all
+# friend (class|struct|union) declarations.
+# If set to NO (the default) these declarations will be included in the
+# documentation.
+
+HIDE_FRIEND_COMPOUNDS = NO
+
+# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any
+# documentation blocks found inside the body of a function.
+# If set to NO (the default) these blocks will be appended to the
+# function's detailed documentation block.
+
+HIDE_IN_BODY_DOCS = NO
+
+# The INTERNAL_DOCS tag determines if documentation
+# that is typed after a \internal command is included. If the tag is set
+# to NO (the default) then the documentation will be excluded.
+# Set it to YES to include the internal documentation.
+
+INTERNAL_DOCS = NO
+
+# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate
+# file names in lower-case letters. If set to YES upper-case letters are also
+# allowed. This is useful if you have classes or files whose names only differ
+# in case and if your file system supports case sensitive file names. Windows
+# and Mac users are advised to set this option to NO.
+
+CASE_SENSE_NAMES = YES
+
+# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen
+# will show members with their full class and namespace scopes in the
+# documentation. If set to YES the scope will be hidden.
+
+HIDE_SCOPE_NAMES = NO
+
+# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen
+# will put a list of the files that are included by a file in the documentation
+# of that file.
+
+SHOW_INCLUDE_FILES = YES
+
+# If the FORCE_LOCAL_INCLUDES tag is set to YES then Doxygen
+# will list include files with double quotes in the documentation
+# rather than with sharp brackets.
+
+FORCE_LOCAL_INCLUDES = NO
+
+# If the INLINE_INFO tag is set to YES (the default) then a tag [inline]
# is inserted in the documentation for inline members.
INLINE_INFO = YES
-# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
-# will sort the (detailed) documentation of file and class members
-# alphabetically by member name. If set to NO the members will appear in
+# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen
+# will sort the (detailed) documentation of file and class members
+# alphabetically by member name. If set to NO the members will appear in
# declaration order.
SORT_MEMBER_DOCS = YES
-# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC
-# tag is set to YES, then doxygen will reuse the documentation of the first
-# member in the group (if any) for the other members of the group. By default
-# all members of a group must be documented explicitly.
+# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the
+# brief documentation of file, namespace and class members alphabetically
+# by member name. If set to NO (the default) the members will appear in
+# declaration order.
-DISTRIBUTE_GROUP_DOC = NO
+SORT_BRIEF_DOCS = NO
-# The TAB_SIZE tag can be used to set the number of spaces in a tab.
-# Doxygen uses this value to replace tabs by spaces in code fragments.
+# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen
+# will sort the (brief and detailed) documentation of class members so that
+# constructors and destructors are listed first. If set to NO (the default)
+# the constructors will appear in the respective orders defined by
+# SORT_MEMBER_DOCS and SORT_BRIEF_DOCS.
+# This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO
+# and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO.
-TAB_SIZE = 8
+SORT_MEMBERS_CTORS_1ST = NO
-# The ENABLED_SECTIONS tag can be used to enable conditional
-# documentation sections, marked by \if sectionname ... \endif.
+# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the
+# hierarchy of group names into alphabetical order. If set to NO (the default)
+# the group names will appear in their defined order.
+
+SORT_GROUP_NAMES = NO
+
+# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be
+# sorted by fully-qualified names, including namespaces. If set to
+# NO (the default), the class list will be sorted only by class name,
+# not including the namespace part.
+# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES.
+# Note: This option applies only to the class list, not to the
+# alphabetical list.
-ENABLED_SECTIONS =
+SORT_BY_SCOPE_NAME = NO
-# The GENERATE_TODOLIST tag can be used to enable (YES) or
-# disable (NO) the todo list. This list is created by putting \todo
+# The GENERATE_TODOLIST tag can be used to enable (YES) or
+# disable (NO) the todo list. This list is created by putting \todo
# commands in the documentation.
GENERATE_TODOLIST = YES
-# The GENERATE_TESTLIST tag can be used to enable (YES) or
-# disable (NO) the test list. This list is created by putting \test
+# The GENERATE_TESTLIST tag can be used to enable (YES) or
+# disable (NO) the test list. This list is created by putting \test
# commands in the documentation.
GENERATE_TESTLIST = YES
-# The GENERATE_BUGLIST tag can be used to enable (YES) or
-# disable (NO) the bug list. This list is created by putting \bug
+# The GENERATE_BUGLIST tag can be used to enable (YES) or
+# disable (NO) the bug list. This list is created by putting \bug
# commands in the documentation.
GENERATE_BUGLIST = YES
-# This tag can be used to specify a number of aliases that acts
-# as commands in the documentation. An alias has the form "name=value".
-# For example adding "sideeffect=\par Side Effects:\n" will allow you to
-# put the command \sideeffect (or @sideeffect) in the documentation, which
-# will result in a user defined paragraph with heading "Side Effects:".
-# You can put \n's in the value part of an alias to insert newlines.
+# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or
+# disable (NO) the deprecated list. This list is created by putting
+# \deprecated commands in the documentation.
-ALIASES =
+GENERATE_DEPRECATEDLIST= YES
-# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
-# the initial value of a variable or define consist of for it to appear in
-# the documentation. If the initializer consists of more lines than specified
-# here it will be hidden. Use a value of 0 to hide initializers completely.
-# The appearance of the initializer of individual variables and defines in the
-# documentation can be controlled using \showinitializer or \hideinitializer
-# command in the documentation regardless of this setting.
+# The ENABLED_SECTIONS tag can be used to enable conditional
+# documentation sections, marked by \if sectionname ... \endif.
-MAX_INITIALIZER_LINES = 30
+ENABLED_SECTIONS =
-# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources
-# only. Doxygen will then generate output that is more tailored for C.
-# For instance some of the names that are used will be different. The list
-# of all members will be omitted, etc.
+# The MAX_INITIALIZER_LINES tag determines the maximum number of lines
+# the initial value of a variable or define consists of for it to appear in
+# the documentation. If the initializer consists of more lines than specified
+# here it will be hidden. Use a value of 0 to hide initializers completely.
+# The appearance of the initializer of individual variables and defines in the
+# documentation can be controlled using \showinitializer or \hideinitializer
+# command in the documentation regardless of this setting.
-OPTIMIZE_OUTPUT_FOR_C = NO
+MAX_INITIALIZER_LINES = 30
-# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
-# at the bottom of the documentation of classes and structs. If set to YES the
+# Set the SHOW_USED_FILES tag to NO to disable the list of files generated
+# at the bottom of the documentation of classes and structs. If set to YES the
# list will mention the files that were used to generate the documentation.
SHOW_USED_FILES = YES
+# If the sources in your project are distributed over multiple directories
+# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy
+# in the documentation. The default is NO.
+
+SHOW_DIRECTORIES = NO
+
+# Set the SHOW_FILES tag to NO to disable the generation of the Files page.
+# This will remove the Files entry from the Quick Index and from the
+# Folder Tree View (if specified). The default is YES.
+
+SHOW_FILES = YES
+
+# Set the SHOW_NAMESPACES tag to NO to disable the generation of the
+# Namespaces page.
+# This will remove the Namespaces entry from the Quick Index
+# and from the Folder Tree View (if specified). The default is YES.
+
+SHOW_NAMESPACES = YES
+
+# The FILE_VERSION_FILTER tag can be used to specify a program or script that
+# doxygen should invoke to get the current version for each file (typically from
+# the version control system). Doxygen will invoke the program by executing (via
+# popen()) the command <command> <input-file>, where <command> is the value of
+# the FILE_VERSION_FILTER tag, and <input-file> is the name of an input file
+# provided by doxygen. Whatever the program writes to standard output
+# is used as the file version. See the manual for examples.
+
+FILE_VERSION_FILTER =
+
+# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed
+# by doxygen. The layout file controls the global structure of the generated
+# output files in an output format independent way. The create the layout file
+# that represents doxygen's defaults, run doxygen with the -l option.
+# You can optionally specify a file name after the option, if omitted
+# DoxygenLayout.xml will be used as the name of the layout file.
+
+LAYOUT_FILE =
+
#---------------------------------------------------------------------------
# configuration options related to warning and progress messages
#---------------------------------------------------------------------------
-# The QUIET tag can be used to turn on/off the messages that are generated
+# The QUIET tag can be used to turn on/off the messages that are generated
# by doxygen. Possible values are YES and NO. If left blank NO is used.
QUIET = YES
-# The WARNINGS tag can be used to turn on/off the warning messages that are
-# generated by doxygen. Possible values are YES and NO. If left blank
+# The WARNINGS tag can be used to turn on/off the warning messages that are
+# generated by doxygen. Possible values are YES and NO. If left blank
# NO is used.
WARNINGS = YES
-# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
-# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
+# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings
+# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
# automatically be disabled.
WARN_IF_UNDOCUMENTED = YES
-# The WARN_FORMAT tag determines the format of the warning messages that
-# doxygen can produce. The string should contain the $file, $line, and $text
-# tags, which will be replaced by the file and line number from which the
-# warning originated and the warning text.
+# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
+# potential errors in the documentation, such as not documenting some
+# parameters in a documented function, or documenting parameters that
+# don't exist or using markup commands wrongly.
-WARN_FORMAT =
+WARN_IF_DOC_ERROR = YES
-# The WARN_LOGFILE tag can be used to specify a file to which warning
-# and error messages should be written. If left blank the output is written
+# This WARN_NO_PARAMDOC option can be abled to get warnings for
+# functions that are documented, but have no documentation for their parameters
+# or return value. If set to NO (the default) doxygen will only warn about
+# wrong or incomplete parameter documentation, but not about the absence of
+# documentation.
+
+WARN_NO_PARAMDOC = NO
+
+# The WARN_FORMAT tag determines the format of the warning messages that
+# doxygen can produce. The string should contain the $file, $line, and $text
+# tags, which will be replaced by the file and line number from which the
+# warning originated and the warning text. Optionally the format may contain
+# $version, which will be replaced by the version of the file (if it could
+# be obtained via FILE_VERSION_FILTER)
+
+WARN_FORMAT =
+
+# The WARN_LOGFILE tag can be used to specify a file to which warning
+# and error messages should be written. If left blank the output is written
# to stderr.
-WARN_LOGFILE =
+WARN_LOGFILE =
#---------------------------------------------------------------------------
# configuration options related to the input files
#---------------------------------------------------------------------------
-# The INPUT tag can be used to specify the files and/or directories that contain
-# documented source files. You may enter file names like "myfile.cpp" or
-# directories like "/usr/src/myproject". Separate the files or directories
+# The INPUT tag can be used to specify the files and/or directories that contain
+# documented source files. You may enter file names like "myfile.cpp" or
+# directories like "/usr/src/myproject". Separate the files or directories
# with spaces.
INPUT = manpage.dox
-# If the value of the INPUT tag contains directories, you can use the
-# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
-# blank all files are included.
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is
+# also the default input encoding. Doxygen uses libiconv (or the iconv built
+# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for
+# the list of possible encodings.
-FILE_PATTERNS =
+INPUT_ENCODING = UTF-8
-# The RECURSIVE tag can be used to turn specify whether or not subdirectories
-# should be searched for input files as well. Possible values are YES and NO.
+# If the value of the INPUT tag contains directories, you can use the
+# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
+# blank the following patterns are tested:
+# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx
+# *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.py *.f90
+
+FILE_PATTERNS =
+
+# The RECURSIVE tag can be used to turn specify whether or not subdirectories
+# should be searched for input files as well. Possible values are YES and NO.
# If left blank NO is used.
RECURSIVE = NO
-# The EXCLUDE tag can be used to specify files and/or directories that should
-# excluded from the INPUT source files. This way you can easily exclude a
+# The EXCLUDE tag can be used to specify files and/or directories that should
+# excluded from the INPUT source files. This way you can easily exclude a
# subdirectory from a directory tree whose root is specified with the INPUT tag.
-EXCLUDE =
+EXCLUDE =
+
+# The EXCLUDE_SYMLINKS tag can be used select whether or not files or
+# directories that are symbolic links (a Unix filesystem feature) are excluded
+# from the input.
+
+EXCLUDE_SYMLINKS = NO
+
+# If the value of the INPUT tag contains directories, you can use the
+# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
+# certain files from those directories. Note that the wildcards are matched
+# against the file with absolute path, so to exclude all test directories
+# for example use the pattern */test/*
-# If the value of the INPUT tag contains directories, you can use the
-# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude
-# certain files from those directories.
+EXCLUDE_PATTERNS =
-EXCLUDE_PATTERNS =
+# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
+# (namespaces, classes, functions, etc.) that should be excluded from the
+# output. The symbol name can be a fully qualified name, a word, or if the
+# wildcard * is used, a substring. Examples: ANamespace, AClass,
+# AClass::ANamespace, ANamespace::*Test
-# The EXAMPLE_PATH tag can be used to specify one or more files or
-# directories that contain example code fragments that are included (see
+EXCLUDE_SYMBOLS =
+
+# The EXAMPLE_PATH tag can be used to specify one or more files or
+# directories that contain example code fragments that are included (see
# the \include command).
-EXAMPLE_PATH =
+EXAMPLE_PATH =
-# If the value of the EXAMPLE_PATH tag contains directories, you can use the
-# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
-# and *.h) to filter out the source-files in the directories. If left
+# If the value of the EXAMPLE_PATH tag contains directories, you can use the
+# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp
+# and *.h) to filter out the source-files in the directories. If left
# blank all files are included.
-EXAMPLE_PATTERNS =
+EXAMPLE_PATTERNS =
+
+# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be
+# searched for input files to be used with the \include or \dontinclude
+# commands irrespective of the value of the RECURSIVE tag.
+# Possible values are YES and NO. If left blank NO is used.
+
+EXAMPLE_RECURSIVE = NO
-# The IMAGE_PATH tag can be used to specify one or more files or
-# directories that contain image that are included in the documentation (see
+# The IMAGE_PATH tag can be used to specify one or more files or
+# directories that contain image that are included in the documentation (see
# the \image command).
-IMAGE_PATH =
+IMAGE_PATH =
-# The INPUT_FILTER tag can be used to specify a program that doxygen should
-# invoke to filter for each input file. Doxygen will invoke the filter program
-# by executing (via popen()) the command <filter> <input-file>, where <filter>
-# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
-# input file. Doxygen will then use the output that the filter program writes
+# The INPUT_FILTER tag can be used to specify a program that doxygen should
+# invoke to filter for each input file. Doxygen will invoke the filter program
+# by executing (via popen()) the command <filter> <input-file>, where <filter>
+# is the value of the INPUT_FILTER tag, and <input-file> is the name of an
+# input file. Doxygen will then use the output that the filter program writes
# to standard output.
+# If FILTER_PATTERNS is specified, this tag will be
+# ignored.
+
+INPUT_FILTER =
+
+# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern
+# basis.
+# Doxygen will compare the file name with each pattern and apply the
+# filter if there is a match.
+# The filters are a list of the form:
+# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further
+# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER
+# is applied to all files.
-INPUT_FILTER =
+FILTER_PATTERNS =
-# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
-# INPUT_FILTER) will be used to filter the input files when producing source
-# files to browse.
+# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using
+# INPUT_FILTER) will be used to filter the input files when producing source
+# files to browse (i.e. when SOURCE_BROWSER is set to YES).
FILTER_SOURCE_FILES = NO
+#---------------------------------------------------------------------------
+# configuration options related to source browsing
+#---------------------------------------------------------------------------
+
+# If the SOURCE_BROWSER tag is set to YES then a list of source files will
+# be generated. Documented entities will be cross-referenced with these sources.
+# Note: To get rid of all source code in the generated output, make sure also
+# VERBATIM_HEADERS is set to NO.
+
+SOURCE_BROWSER = NO
+
+# Setting the INLINE_SOURCES tag to YES will include the body
+# of functions and classes directly in the documentation.
+
+INLINE_SOURCES = NO
+
+# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct
+# doxygen to hide any special comment blocks from generated source code
+# fragments. Normal C and C++ comments will always remain visible.
+
+STRIP_CODE_COMMENTS = YES
+
+# If the REFERENCED_BY_RELATION tag is set to YES
+# then for each documented function all documented
+# functions referencing it will be listed.
+
+REFERENCED_BY_RELATION = NO
+
+# If the REFERENCES_RELATION tag is set to YES
+# then for each documented function all documented entities
+# called/used by that function will be listed.
+
+REFERENCES_RELATION = NO
+
+# If the REFERENCES_LINK_SOURCE tag is set to YES (the default)
+# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from
+# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will
+# link to the source code.
+# Otherwise they will link to the documentation.
+
+REFERENCES_LINK_SOURCE = YES
+
+# If the USE_HTAGS tag is set to YES then the references to source code
+# will point to the HTML generated by the htags(1) tool instead of doxygen
+# built-in source browser. The htags tool is part of GNU's global source
+# tagging system (see http://www.gnu.org/software/global/global.html). You
+# will need version 4.8.6 or higher.
+
+USE_HTAGS = NO
+
+# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen
+# will generate a verbatim copy of the header file for each class for
+# which an include is specified. Set to NO to disable this.
+
+VERBATIM_HEADERS = YES
+
#---------------------------------------------------------------------------
# configuration options related to the alphabetical class index
#---------------------------------------------------------------------------
-# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
-# of all compounds will be generated. Enable this if the project
+# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index
+# of all compounds will be generated. Enable this if the project
# contains a lot of classes, structs, unions or interfaces.
ALPHABETICAL_INDEX = NO
-# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
-# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
+# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then
+# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns
# in which this list will be split (can be a number in the range [1..20])
COLS_IN_ALPHA_INDEX = 5
-# In case all classes in a project start with a common prefix, all
-# classes will be put under the same header in the alphabetical index.
-# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
+# In case all classes in a project start with a common prefix, all
+# classes will be put under the same header in the alphabetical index.
+# The IGNORE_PREFIX tag can be used to specify one or more prefixes that
# should be ignored while generating the index headers.
-IGNORE_PREFIX =
+IGNORE_PREFIX =
#---------------------------------------------------------------------------
# configuration options related to the HTML output
#---------------------------------------------------------------------------
-# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
+# If the GENERATE_HTML tag is set to YES (the default) Doxygen will
# generate HTML output.
GENERATE_HTML = YES
-# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# The HTML_OUTPUT tag is used to specify where the HTML docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
# put in front of it. If left blank `html' will be used as the default path.
-HTML_OUTPUT =
+HTML_OUTPUT =
+
+# The HTML_FILE_EXTENSION tag can be used to specify the file extension for
+# each generated HTML page (for example: .htm,.php,.asp). If it is left blank
+# doxygen will generate files with .html extension.
+
+HTML_FILE_EXTENSION = .html
-# The HTML_HEADER tag can be used to specify a personal HTML header for
-# each generated HTML page. If it is left blank doxygen will generate a
+# The HTML_HEADER tag can be used to specify a personal HTML header for
+# each generated HTML page. If it is left blank doxygen will generate a
# standard header.
-HTML_HEADER =
+HTML_HEADER =
-# The HTML_FOOTER tag can be used to specify a personal HTML footer for
-# each generated HTML page. If it is left blank doxygen will generate a
+# The HTML_FOOTER tag can be used to specify a personal HTML footer for
+# each generated HTML page. If it is left blank doxygen will generate a
# standard footer.
-HTML_FOOTER =
+HTML_FOOTER =
+
+# The HTML_STYLESHEET tag can be used to specify a user-defined cascading
+# style sheet that is used by each HTML page. It can be used to
+# fine-tune the look of the HTML output. If the tag is left blank doxygen
+# will generate a default style sheet. Note that doxygen will try to copy
+# the style sheet file to the HTML output directory, so don't put your own
+# stylesheet in the HTML output directory as well, or it will be erased!
+
+HTML_STYLESHEET =
+
+# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output.
+# Doxygen will adjust the colors in the stylesheet and background images
+# according to this color. Hue is specified as an angle on a colorwheel,
+# see http://en.wikipedia.org/wiki/Hue for more information.
+# For instance the value 0 represents red, 60 is yellow, 120 is green,
+# 180 is cyan, 240 is blue, 300 purple, and 360 is red again.
+# The allowed range is 0 to 359.
+
+HTML_COLORSTYLE_HUE = 220
+
+# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of
+# the colors in the HTML output. For a value of 0 the output will use
+# grayscales only. A value of 255 will produce the most vivid colors.
+
+HTML_COLORSTYLE_SAT = 100
+
+# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to
+# the luminance component of the colors in the HTML output. Values below
+# 100 gradually make the output lighter, whereas values above 100 make
+# the output darker. The value divided by 100 is the actual gamma applied,
+# so 80 represents a gamma of 0.8, The value 220 represents a gamma of 2.2,
+# and 100 does not change the gamma.
+
+HTML_COLORSTYLE_GAMMA = 80
-# The HTML_STYLESHEET tag can be used to specify a user defined cascading
-# style sheet that is used by each HTML page. It can be used to
-# fine-tune the look of the HTML output. If the tag is left blank doxygen
-# will generate a default style sheet
+# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
+# page will contain the date and time when the page was generated. Setting
+# this to NO can help when comparing the output of multiple runs.
-HTML_STYLESHEET =
+HTML_TIMESTAMP = YES
-# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
-# files or namespaces will be aligned in HTML using tables. If set to
+# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes,
+# files or namespaces will be aligned in HTML using tables. If set to
# NO a bullet list will be used.
HTML_ALIGN_MEMBERS = YES
-# If the GENERATE_HTMLHELP tag is set to YES, additional index files
-# will be generated that can be used as input for tools like the
-# Microsoft HTML help workshop to generate a compressed HTML help file (.chm)
+# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
+# documentation will contain sections that can be hidden and shown after the
+# page has loaded. For this to work a browser that supports
+# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox
+# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari).
+
+HTML_DYNAMIC_SECTIONS = NO
+
+# If the GENERATE_DOCSET tag is set to YES, additional index files
+# will be generated that can be used as input for Apple's Xcode 3
+# integrated development environment, introduced with OSX 10.5 (Leopard).
+# To create a documentation set, doxygen will generate a Makefile in the
+# HTML output directory. Running make will produce the docset in that
+# directory and running "make install" will install the docset in
+# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find
+# it at startup.
+# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
+# for more information.
+
+GENERATE_DOCSET = NO
+
+# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the
+# feed. A documentation feed provides an umbrella under which multiple
+# documentation sets from a single provider (such as a company or product suite)
+# can be grouped.
+
+DOCSET_FEEDNAME = "Doxygen generated docs"
+
+# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that
+# should uniquely identify the documentation set bundle. This should be a
+# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen
+# will append .docset to the name.
+
+DOCSET_BUNDLE_ID = org.doxygen.Project
+
+# When GENERATE_PUBLISHER_ID tag specifies a string that should uniquely identify
+# the documentation publisher. This should be a reverse domain-name style
+# string, e.g. com.mycompany.MyDocSet.documentation.
+
+DOCSET_PUBLISHER_ID = org.doxygen.Publisher
+
+# The GENERATE_PUBLISHER_NAME tag identifies the documentation publisher.
+
+DOCSET_PUBLISHER_NAME = Publisher
+
+# If the GENERATE_HTMLHELP tag is set to YES, additional index files
+# will be generated that can be used as input for tools like the
+# Microsoft HTML help workshop to generate a compiled HTML help file (.chm)
# of the generated HTML documentation.
GENERATE_HTMLHELP = NO
-# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
-# controls if a separate .chi index file is generated (YES) or that
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can
+# be used to specify the file name of the resulting .chm file. You
+# can add a path in front of the file if the result should not be
+# written to the html output directory.
+
+CHM_FILE =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can
+# be used to specify the location (absolute path including file name) of
+# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run
+# the HTML help compiler on the generated index.hhp.
+
+HHC_LOCATION =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag
+# controls if a separate .chi index file is generated (YES) or that
# it should be included in the master .chm file (NO).
GENERATE_CHI = NO
-# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
-# controls whether a binary table of contents is generated (YES) or a
+# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING
+# is used to encode HtmlHelp index (hhk), content (hhc) and project file
+# content.
+
+CHM_INDEX_ENCODING =
+
+# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag
+# controls whether a binary table of contents is generated (YES) or a
# normal table of contents (NO) in the .chm file.
BINARY_TOC = NO
-# The TOC_EXPAND flag can be set to YES to add extra items for group members
-# to the contents of the Html help documentation and to the tree view.
+# The TOC_EXPAND flag can be set to YES to add extra items for group members
+# to the contents of the HTML help documentation and to the tree view.
TOC_EXPAND = NO
-# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
-# top of each HTML page. The value NO (the default) enables the index and
+# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
+# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated
+# that can be used as input for Qt's qhelpgenerator to generate a
+# Qt Compressed Help (.qch) of the generated HTML documentation.
+
+GENERATE_QHP = NO
+
+# If the QHG_LOCATION tag is specified, the QCH_FILE tag can
+# be used to specify the file name of the resulting .qch file.
+# The path specified is relative to the HTML output folder.
+
+QCH_FILE =
+
+# The QHP_NAMESPACE tag specifies the namespace to use when generating
+# Qt Help Project output. For more information please see
+# http://doc.trolltech.com/qthelpproject.html#namespace
+
+QHP_NAMESPACE = org.doxygen.Project
+
+# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating
+# Qt Help Project output. For more information please see
+# http://doc.trolltech.com/qthelpproject.html#virtual-folders
+
+QHP_VIRTUAL_FOLDER = doc
+
+# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to
+# add. For more information please see
+# http://doc.trolltech.com/qthelpproject.html#custom-filters
+
+QHP_CUST_FILTER_NAME =
+
+# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the
+# custom filter to add. For more information please see
+# <a href="http://doc.trolltech.com/qthelpproject.html#custom-filters">
+# Qt Help Project / Custom Filters</a>.
+
+QHP_CUST_FILTER_ATTRS =
+
+# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
+# project's
+# filter section matches.
+# <a href="http://doc.trolltech.com/qthelpproject.html#filter-attributes">
+# Qt Help Project / Filter Attributes</a>.
+
+QHP_SECT_FILTER_ATTRS =
+
+# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can
+# be used to specify the location of Qt's qhelpgenerator.
+# If non-empty doxygen will try to run qhelpgenerator on the generated
+# .qhp file.
+
+QHG_LOCATION =
+
+# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files
+# will be generated, which together with the HTML files, form an Eclipse help
+# plugin. To install this plugin and make it available under the help contents
+# menu in Eclipse, the contents of the directory containing the HTML and XML
+# files needs to be copied into the plugins directory of eclipse. The name of
+# the directory within the plugins directory should be the same as
+# the ECLIPSE_DOC_ID value. After copying Eclipse needs to be restarted before
+# the help appears.
+
+GENERATE_ECLIPSEHELP = NO
+
+# A unique identifier for the eclipse help plugin. When installing the plugin
+# the directory name containing the HTML and XML files should also have
+# this name.
+
+ECLIPSE_DOC_ID = org.doxygen.Project
+
+# The DISABLE_INDEX tag can be used to turn on/off the condensed index at
+# top of each HTML page. The value NO (the default) enables the index and
# the value YES disables it.
DISABLE_INDEX = NO
-# This tag can be used to set the number of enum values (range [1..20])
+# This tag can be used to set the number of enum values (range [1..20])
# that doxygen will group on one line in the generated HTML documentation.
ENUM_VALUES_PER_LINE = 4
-# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be
-# generated containing a tree-like index structure (just like the one that
-# is generated for HTML Help). For this to work a browser that supports
-# JavaScript and frames is required (for instance Netscape 4.0+
-# or Internet explorer 4.0+).
+# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index
+# structure should be generated to display hierarchical information.
+# If the tag value is set to YES, a side panel will be generated
+# containing a tree-like index structure (just like the one that
+# is generated for HTML Help). For this to work a browser that supports
+# JavaScript, DHTML, CSS and frames is required (i.e. any modern browser).
+# Windows users are probably better off using the HTML help feature.
GENERATE_TREEVIEW = NO
-# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
-# used to set the initial width (in pixels) of the frame in which the tree
+# By enabling USE_INLINE_TREES, doxygen will generate the Groups, Directories,
+# and Class Hierarchy pages using a tree view instead of an ordered list.
+
+USE_INLINE_TREES = NO
+
+# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be
+# used to set the initial width (in pixels) of the frame in which the tree
# is shown.
TREEVIEW_WIDTH = 250
+# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open
+# links to external symbols imported via tag files in a separate window.
+
+EXT_LINKS_IN_WINDOW = NO
+
+# Use this tag to change the font size of Latex formulas included
+# as images in the HTML documentation. The default is 10. Note that
+# when you change the font size after a successful doxygen run you need
+# to manually remove any form_*.png images from the HTML output directory
+# to force them to be regenerated.
+
+FORMULA_FONTSIZE = 10
+
+# Use the FORMULA_TRANPARENT tag to determine whether or not the images
+# generated for formulas are transparent PNGs. Transparent PNGs are
+# not supported properly for IE 6.0, but are supported on all modern browsers.
+# Note that when changing this option you need to delete any form_*.png files
+# in the HTML output before the changes have effect.
+
+FORMULA_TRANSPARENT = YES
+
+# When the SEARCHENGINE tag is enabled doxygen will generate a search box
+# for the HTML output. The underlying search engine uses javascript
+# and DHTML and should work on any modern browser. Note that when using
+# HTML help (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets
+# (GENERATE_DOCSET) there is already a search function so this one should
+# typically be disabled. For large projects the javascript based search engine
+# can be slow, then enabling SERVER_BASED_SEARCH may provide a better solution.
+
+SEARCHENGINE = NO
+
+# When the SERVER_BASED_SEARCH tag is enabled the search engine will be
+# implemented using a PHP enabled web server instead of at the web client
+# using Javascript. Doxygen will generate the search PHP script and index
+# file to put on the web server. The advantage of the server
+# based approach is that it scales better to large projects and allows
+# full text search. The disadvances is that it is more difficult to setup
+# and does not have live searching capabilities.
+
+SERVER_BASED_SEARCH = NO
+
#---------------------------------------------------------------------------
# configuration options related to the LaTeX output
#---------------------------------------------------------------------------
-# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
+# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will
# generate Latex output.
GENERATE_LATEX = NO
-# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
# put in front of it. If left blank `latex' will be used as the default path.
-LATEX_OUTPUT =
+LATEX_OUTPUT =
-# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
-# LaTeX documents. This may be useful for small projects and may help to
+# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
+# invoked. If left blank `latex' will be used as the default command name.
+# Note that when enabling USE_PDFLATEX this option is only used for
+# generating bitmaps for formulas in the HTML output, but not in the
+# Makefile that is written to the output directory.
+
+LATEX_CMD_NAME = latex
+
+# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to
+# generate index for LaTeX. If left blank `makeindex' will be used as the
+# default command name.
+
+MAKEINDEX_CMD_NAME = makeindex
+
+# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact
+# LaTeX documents. This may be useful for small projects and may help to
# save some trees in general.
COMPACT_LATEX = NO
-# The PAPER_TYPE tag can be used to set the paper type that is used
-# by the printer. Possible values are: a4, a4wide, letter, legal and
+# The PAPER_TYPE tag can be used to set the paper type that is used
+# by the printer. Possible values are: a4, a4wide, letter, legal and
# executive. If left blank a4wide will be used.
PAPER_TYPE = a4wide
-# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
+# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX
# packages that should be included in the LaTeX output.
-EXTRA_PACKAGES =
+EXTRA_PACKAGES =
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
-# the generated latex document. The header should contain everything until
-# the first chapter. If it is left blank doxygen will generate a
+# The LATEX_HEADER tag can be used to specify a personal LaTeX header for
+# the generated latex document. The header should contain everything until
+# the first chapter. If it is left blank doxygen will generate a
# standard header. Notice: only use this tag if you know what you are doing!
-LATEX_HEADER =
+LATEX_HEADER =
-# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
-# is prepared for conversion to pdf (using ps2pdf). The pdf file will
-# contain links (just like the HTML output) instead of page references
+# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated
+# is prepared for conversion to pdf (using ps2pdf). The pdf file will
+# contain links (just like the HTML output) instead of page references
# This makes the output suitable for online browsing using a pdf viewer.
PDF_HYPERLINKS = NO
-# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
-# plain latex in the generated Makefile. Set this option to YES to get a
+# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of
+# plain latex in the generated Makefile. Set this option to YES to get a
# higher quality PDF documentation.
USE_PDFLATEX = NO
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
-# command to the generated LaTeX files. This will instruct LaTeX to keep
-# running if errors occur, instead of asking the user for help.
+# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode.
+# command to the generated LaTeX files. This will instruct LaTeX to keep
+# running if errors occur, instead of asking the user for help.
# This option is also used when generating formulas in HTML.
LATEX_BATCHMODE = NO
+# If LATEX_HIDE_INDICES is set to YES then doxygen will not
+# include the index chapters (such as File Index, Compound Index, etc.)
+# in the output.
+
+LATEX_HIDE_INDICES = NO
+
+# If LATEX_SOURCE_CODE is set to YES then doxygen will include
+# source code with syntax highlighting in the LaTeX output.
+# Note that which sources are shown also depends on other settings
+# such as SOURCE_BROWSER.
+
+LATEX_SOURCE_CODE = NO
+
#---------------------------------------------------------------------------
# configuration options related to the RTF output
#---------------------------------------------------------------------------
-# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
-# The RTF output is optimised for Word 97 and may not look very pretty with
+# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output
+# The RTF output is optimized for Word 97 and may not look very pretty with
# other RTF readers or editors.
GENERATE_RTF = NO
-# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# The RTF_OUTPUT tag is used to specify where the RTF docs will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
# put in front of it. If left blank `rtf' will be used as the default path.
-RTF_OUTPUT =
+RTF_OUTPUT =
-# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
-# RTF documents. This may be useful for small projects and may help to
+# If the COMPACT_RTF tag is set to YES Doxygen generates more compact
+# RTF documents. This may be useful for small projects and may help to
# save some trees in general.
COMPACT_RTF = NO
-# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
-# will contain hyperlink fields. The RTF file will
-# contain links (just like the HTML output) instead of page references.
-# This makes the output suitable for online browsing using WORD or other
-# programs which support those fields.
+# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated
+# will contain hyperlink fields. The RTF file will
+# contain links (just like the HTML output) instead of page references.
+# This makes the output suitable for online browsing using WORD or other
+# programs which support those fields.
# Note: wordpad (write) and others do not support links.
RTF_HYPERLINKS = NO
-# Load stylesheet definitions from file. Syntax is similar to doxygen's
-# config file, i.e. a series of assigments. You only have to provide
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# config file, i.e. a series of assignments. You only have to provide
# replacements, missing definitions are set to their default value.
-RTF_STYLESHEET_FILE =
+RTF_STYLESHEET_FILE =
-# Set optional variables used in the generation of an rtf document.
+# Set optional variables used in the generation of an rtf document.
# Syntax is similar to doxygen's config file.
-RTF_EXTENSIONS_FILE =
+RTF_EXTENSIONS_FILE =
#---------------------------------------------------------------------------
# configuration options related to the man page output
#---------------------------------------------------------------------------
-# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
+# If the GENERATE_MAN tag is set to YES (the default) Doxygen will
# generate man pages
GENERATE_MAN = YES
-# The MAN_OUTPUT tag is used to specify where the man pages will be put.
-# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# The MAN_OUTPUT tag is used to specify where the man pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
# put in front of it. If left blank `man' will be used as the default path.
-MAN_OUTPUT =
+MAN_OUTPUT =
-# The MAN_EXTENSION tag determines the extension that is added to
+# The MAN_EXTENSION tag determines the extension that is added to
# the generated man pages (default is the subroutine's section .3)
MAN_EXTENSION = .7
MAN_LINKS = YES
#---------------------------------------------------------------------------
-# Configuration options related to the preprocessor
+# configuration options related to the XML output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_XML tag is set to YES Doxygen will
+# generate an XML file that captures the structure of
+# the code including all documentation.
+
+GENERATE_XML = NO
+
+# The XML_OUTPUT tag is used to specify where the XML pages will be put.
+# If a relative path is entered the value of OUTPUT_DIRECTORY will be
+# put in front of it. If left blank `xml' will be used as the default path.
+
+XML_OUTPUT = xml
+
+# The XML_SCHEMA tag can be used to specify an XML schema,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_SCHEMA =
+
+# The XML_DTD tag can be used to specify an XML DTD,
+# which can be used by a validating XML parser to check the
+# syntax of the XML files.
+
+XML_DTD =
+
+# If the XML_PROGRAMLISTING tag is set to YES Doxygen will
+# dump the program listings (including syntax highlighting
+# and cross-referencing information) to the XML output. Note that
+# enabling this will significantly increase the size of the XML output.
+
+XML_PROGRAMLISTING = YES
+
+#---------------------------------------------------------------------------
+# configuration options for the AutoGen Definitions output
#---------------------------------------------------------------------------
-# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
-# evaluate all C-preprocessor directives found in the sources and include
+# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will
+# generate an AutoGen Definitions (see autogen.sf.net) file
+# that captures the structure of the code including all
+# documentation. Note that this feature is still experimental
+# and incomplete at the moment.
+
+GENERATE_AUTOGEN_DEF = NO
+
+#---------------------------------------------------------------------------
+# configuration options related to the Perl module output
+#---------------------------------------------------------------------------
+
+# If the GENERATE_PERLMOD tag is set to YES Doxygen will
+# generate a Perl module file that captures the structure of
+# the code including all documentation. Note that this
+# feature is still experimental and incomplete at the
+# moment.
+
+GENERATE_PERLMOD = NO
+
+# If the PERLMOD_LATEX tag is set to YES Doxygen will generate
+# the necessary Makefile rules, Perl scripts and LaTeX code to be able
+# to generate PDF and DVI output from the Perl module output.
+
+PERLMOD_LATEX = NO
+
+# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be
+# nicely formatted so it can be parsed by a human reader.
+# This is useful
+# if you want to understand what is going on.
+# On the other hand, if this
+# tag is set to NO the size of the Perl module output will be much smaller
+# and Perl will parse it just the same.
+
+PERLMOD_PRETTY = YES
+
+# The names of the make variables in the generated doxyrules.make file
+# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX.
+# This is useful so different doxyrules.make files included by the same
+# Makefile don't overwrite each other's variables.
+
+PERLMOD_MAKEVAR_PREFIX =
+
+#---------------------------------------------------------------------------
+# Configuration options related to the preprocessor
+#---------------------------------------------------------------------------
+
+# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will
+# evaluate all C-preprocessor directives found in the sources and include
# files.
ENABLE_PREPROCESSING = YES
-# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
-# names in the source code. If set to NO (the default) only conditional
-# compilation will be performed. Macro expansion can be done in a controlled
+# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro
+# names in the source code. If set to NO (the default) only conditional
+# compilation will be performed. Macro expansion can be done in a controlled
# way by setting EXPAND_ONLY_PREDEF to YES.
MACRO_EXPANSION = NO
-# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
-# then the macro expansion is limited to the macros specified with the
-# PREDEFINED and EXPAND_AS_PREDEFINED tags.
+# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES
+# then the macro expansion is limited to the macros specified with the
+# PREDEFINED and EXPAND_AS_DEFINED tags.
EXPAND_ONLY_PREDEF = NO
-# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
+# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files
# in the INCLUDE_PATH (see below) will be search if a #include is found.
SEARCH_INCLUDES = YES
-# The INCLUDE_PATH tag can be used to specify one or more directories that
-# contain include files that are not input files but should be processed by
+# The INCLUDE_PATH tag can be used to specify one or more directories that
+# contain include files that are not input files but should be processed by
# the preprocessor.
-INCLUDE_PATH =
+INCLUDE_PATH =
-# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
-# patterns (like *.h and *.hpp) to filter out the header-files in the
-# directories. If left blank, the patterns specified with FILE_PATTERNS will
+# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard
+# patterns (like *.h and *.hpp) to filter out the header-files in the
+# directories. If left blank, the patterns specified with FILE_PATTERNS will
# be used.
-INCLUDE_FILE_PATTERNS =
+INCLUDE_FILE_PATTERNS =
-# The PREDEFINED tag can be used to specify one or more macro names that
-# are defined before the preprocessor is started (similar to the -D option of
-# gcc). The argument of the tag is a list of macros of the form: name
-# or name=definition (no spaces). If the definition and the = are
-# omitted =1 is assumed.
+# The PREDEFINED tag can be used to specify one or more macro names that
+# are defined before the preprocessor is started (similar to the -D option of
+# gcc). The argument of the tag is a list of macros of the form: name
+# or name=definition (no spaces). If the definition and the = are
+# omitted =1 is assumed. To prevent a macro definition from being
+# undefined via #undef or recursively expanded use the := operator
+# instead of the = operator.
-PREDEFINED =
+PREDEFINED =
-# If the MACRO_EXPANSION and EXPAND_PREDEF_ONLY tags are set to YES then
-# this tag can be used to specify a list of macro names that should be expanded.
-# The macro definition that is found in the sources will be used.
+# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then
+# this tag can be used to specify a list of macro names that should be expanded.
+# The macro definition that is found in the sources will be used.
# Use the PREDEFINED tag if you want to use a different macro definition.
-EXPAND_AS_DEFINED =
+EXPAND_AS_DEFINED =
-#---------------------------------------------------------------------------
-# Configuration::addtions related to external references
-#---------------------------------------------------------------------------
+# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then
+# doxygen's preprocessor will remove all function-like macros that are alone
+# on a line, have an all uppercase name, and do not end with a semicolon. Such
+# function macros are typically used for boiler-plate code, and will confuse
+# the parser if not removed.
-# The TAGFILES tag can be used to specify one or more tagfiles.
+SKIP_FUNCTION_MACROS = YES
-TAGFILES =
+#---------------------------------------------------------------------------
+# Configuration::additions related to external references
+#---------------------------------------------------------------------------
-# When a file name is specified after GENERATE_TAGFILE, doxygen will create
+# The TAGFILES option can be used to specify one or more tagfiles.
+# Optionally an initial location of the external documentation
+# can be added for each tagfile. The format of a tag file without
+# this location is as follows:
+#
+# TAGFILES = file1 file2 ...
+# Adding location for the tag files is done as follows:
+#
+# TAGFILES = file1=loc1 "file2 = loc2" ...
+# where "loc1" and "loc2" can be relative or absolute paths or
+# URLs. If a location is present for each tag, the installdox tool
+# does not have to be run to correct the links.
+# Note that each tag file must have a unique name
+# (where the name does NOT include the path)
+# If a tag file is not located in the directory in which doxygen
+# is run, you must also specify the path to the tagfile here.
+
+TAGFILES =
+
+# When a file name is specified after GENERATE_TAGFILE, doxygen will create
# a tag file that is based on the input files it reads.
-GENERATE_TAGFILE =
+GENERATE_TAGFILE =
-# If the ALLEXTERNALS tag is set to YES all external classes will be listed
-# in the class index. If set to NO only the inherited external classes
+# If the ALLEXTERNALS tag is set to YES all external classes will be listed
+# in the class index. If set to NO only the inherited external classes
# will be listed.
ALLEXTERNALS = NO
-# The PERL_PATH should be the absolute path and name of the perl script
+# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed
+# in the modules index. If set to NO, only the current project's groups will
+# be listed.
+
+EXTERNAL_GROUPS = YES
+
+# The PERL_PATH should be the absolute path and name of the perl script
# interpreter (i.e. the result of `which perl').
-PERL_PATH =
+PERL_PATH =
#---------------------------------------------------------------------------
-# Configuration options related to the dot tool
+# Configuration options related to the dot tool
#---------------------------------------------------------------------------
-# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
-# available from the path. This tool is part of Graphviz, a graph visualization
-# toolkit from AT&T and Lucent Bell Labs. The other options in this section
+# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will
+# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base
+# or super classes. Setting the tag to NO turns the diagrams off. Note that
+# this option is superseded by the HAVE_DOT option below. This is only a
+# fallback. It is recommended to install and use dot, since it yields more
+# powerful graphs.
+
+CLASS_DIAGRAMS = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. Doxygen will then run the mscgen tool (see
+# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the
+# documentation. The MSCGEN_PATH tag allows you to specify the directory where
+# the mscgen tool resides. If left empty the tool is assumed to be found in the
+# default search path.
+
+MSCGEN_PATH =
+
+# If set to YES, the inheritance and collaboration graphs will hide
+# inheritance and usage relations if the target is undocumented
+# or is not a class.
+
+HIDE_UNDOC_RELATIONS = YES
+
+# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
+# available from the path. This tool is part of Graphviz, a graph visualization
+# toolkit from AT&T and Lucent Bell Labs. The other options in this section
# have no effect if this option is set to NO (the default)
HAVE_DOT = NO
-# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect inheritance relations. Setting this tag to YES will force the
+# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is
+# allowed to run in parallel. When set to 0 (the default) doxygen will
+# base this on the number of processors available in the system. You can set it
+# explicitly to a value larger than 0 to get control over the balance
+# between CPU load and processing speed.
+
+DOT_NUM_THREADS = 0
+
+# By default doxygen will write a font called FreeSans.ttf to the output
+# directory and reference it in all dot files that doxygen generates. This
+# font does not include all possible unicode characters however, so when you need
+# these (or just want a differently looking font) you can specify the font name
+# using DOT_FONTNAME. You need need to make sure dot is able to find the font,
+# which can be done by putting it in a standard location or by setting the
+# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory
+# containing the font.
+
+DOT_FONTNAME = FreeSans.ttf
+
+# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs.
+# The default size is 10pt.
+
+DOT_FONTSIZE = 10
+
+# By default doxygen will tell dot to use the output directory to look for the
+# FreeSans.ttf font (which doxygen will put there itself). If you specify a
+# different font using DOT_FONTNAME you can set the path where dot
+# can find it using this tag.
+
+DOT_FONTPATH =
+
+# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect inheritance relations. Setting this tag to YES will force the
# the CLASS_DIAGRAMS tag to NO.
CLASS_GRAPH = YES
-# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
-# will generate a graph for each documented class showing the direct and
-# indirect implementation dependencies (inheritance, containment, and
+# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for each documented class showing the direct and
+# indirect implementation dependencies (inheritance, containment, and
# class references variables) of the class with other documented classes.
COLLABORATION_GRAPH = YES
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
-# tags are set to YES then doxygen will generate a graph for each documented
-# file showing the direct and indirect include dependencies of the file with
+# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen
+# will generate a graph for groups, showing the direct groups dependencies
+
+GROUP_GRAPHS = YES
+
+# If the UML_LOOK tag is set to YES doxygen will generate inheritance and
+# collaboration diagrams in a style similar to the OMG's Unified Modeling
+# Language.
+
+UML_LOOK = NO
+
+# If set to YES, the inheritance and collaboration graphs will show the
+# relations between templates and their instances.
+
+TEMPLATE_RELATIONS = NO
+
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT
+# tags are set to YES then doxygen will generate a graph for each documented
+# file showing the direct and indirect include dependencies of the file with
# other documented files.
INCLUDE_GRAPH = YES
-# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
-# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
-# documented header file showing the documented files that directly or
+# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and
+# HAVE_DOT tags are set to YES then doxygen will generate a graph for each
+# documented header file showing the documented files that directly or
# indirectly include this file.
INCLUDED_BY_GRAPH = YES
-# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
-# will graphical hierarchy of all classes instead of a textual one.
-
-GRAPHICAL_HIERARCHY = YES
+# If the CALL_GRAPH and HAVE_DOT options are set to YES then
+# doxygen will generate a call dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable call graphs
+# for selected functions only using the \callgraph command.
-# The tag DOT_PATH can be used to specify the path where the dot tool can be
-# found. If left blank, it is assumed the dot tool can be found on the path.
+CALL_GRAPH = NO
-DOT_PATH =
+# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then
+# doxygen will generate a caller dependency graph for every global function
+# or class method. Note that enabling this option will significantly increase
+# the time of a run. So in most cases it will be better to enable caller
+# graphs for selected functions only using the \callergraph command.
-# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width
-# (in pixels) of the graphs generated by dot. If a graph becomes larger than
-# this value, doxygen will try to truncate the graph, so that it fits within
-# the specified constraint. Beware that most browsers cannot cope with very
-# large images.
+CALLER_GRAPH = NO
-MAX_DOT_GRAPH_WIDTH = 1024
+# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen
+# will graphical hierarchy of all classes instead of a textual one.
-# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height
-# (in pixels) of the graphs generated by dot. If a graph becomes larger than
-# this value, doxygen will try to truncate the graph, so that it fits within
-# the specified constraint. Beware that most browsers cannot cope with very
-# large images.
+GRAPHICAL_HIERARCHY = YES
-MAX_DOT_GRAPH_HEIGHT = 1024
+# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES
+# then doxygen will show the dependencies a directory has on other directories
+# in a graphical way. The dependency relations are determined by the #include
+# relations between the files in the directories.
-# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
-# generate a legend page explaining the meaning of the various boxes and
-# arrows in the dot generated graphs.
+DIRECTORY_GRAPH = YES
-GENERATE_LEGEND = YES
+# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
+# generated by dot. Possible values are png, jpg, or gif
+# If left blank png will be used.
-# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
-# remove the intermedate dot files that are used to generate
-# the various graphs.
+DOT_IMAGE_FORMAT = png
-DOT_CLEANUP = YES
+# The tag DOT_PATH can be used to specify the path where the dot tool can be
+# found. If left blank, it is assumed the dot tool can be found in the path.
-#---------------------------------------------------------------------------
-# Configuration::addtions related to the search engine
-#---------------------------------------------------------------------------
+DOT_PATH =
-# The SEARCHENGINE tag specifies whether or not a search engine should be
-# used. If set to NO the values of all tags below this one will be ignored.
+# The DOTFILE_DIRS tag can be used to specify one or more directories that
+# contain dot files that are included in the documentation (see the
+# \dotfile command).
-SEARCHENGINE = NO
+DOTFILE_DIRS =
-# The CGI_NAME tag should be the name of the CGI script that
-# starts the search engine (doxysearch) with the correct parameters.
-# A script with this name will be generated by doxygen.
+# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of
+# nodes that will be shown in the graph. If the number of nodes in a graph
+# becomes larger than this value, doxygen will truncate the graph, which is
+# visualized by representing a node as a red box. Note that doxygen if the
+# number of direct children of the root node in a graph is already larger than
+# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note
+# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH.
-CGI_NAME =
+DOT_GRAPH_MAX_NODES = 50
-# The CGI_URL tag should be the absolute URL to the directory where the
-# cgi binaries are located. See the documentation of your http daemon for
-# details.
+# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the
+# graphs generated by dot. A depth value of 3 means that only nodes reachable
+# from the root by following a path via at most 3 edges will be shown. Nodes
+# that lay further from the root node will be omitted. Note that setting this
+# option to 1 or 2 may greatly reduce the computation time needed for large
+# code bases. Also note that the size of a graph can be further restricted by
+# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction.
-CGI_URL =
+MAX_DOT_GRAPH_DEPTH = 0
-# The DOC_URL tag should be the absolute URL to the directory where the
-# documentation is located. If left blank the absolute path to the
-# documentation, with file:// prepended to it, will be used.
+# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
+# background. This is disabled by default, because dot on Windows does not
+# seem to support this out of the box. Warning: Depending on the platform used,
+# enabling this option may lead to badly anti-aliased labels on the edges of
+# a graph (i.e. they become hard to read).
-DOC_URL =
+DOT_TRANSPARENT = NO
-# The DOC_ABSPATH tag should be the absolute path to the directory where the
-# documentation is located. If left blank the directory on the local machine
-# will be used.
+# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output
+# files in one run (i.e. multiple -o and -T options on the command line). This
+# makes dot run faster, but since only newer versions of dot (>1.8.10)
+# support this, this feature is disabled by default.
-DOC_ABSPATH =
+DOT_MULTI_TARGETS = YES
-# The BIN_ABSPATH tag must point to the directory where the doxysearch binary
-# is installed.
+# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will
+# generate a legend page explaining the meaning of the various boxes and
+# arrows in the dot generated graphs.
-BIN_ABSPATH =
+GENERATE_LEGEND = YES
-# The EXT_DOC_PATHS tag can be used to specify one or more paths to
-# documentation generated for other projects. This allows doxysearch to search
-# the documentation for these projects as well.
+# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will
+# remove the intermediate dot files that are used to generate
+# the various graphs.
-EXT_DOC_PATHS =
+DOT_CLEANUP = YES
l4re => { paths => [ map { "l4/pkg/$_" } qw(
boehm_gc bootstrap crtn cxx cxx_libc_io cxx_thread
- drivers hello
+ drivers-frst hello
ldscripts
l4re l4re_c l4re_kernel l4re_vfs l4sys l4util
ldscripts ldso
dde
dde-libinput
dope
+ drivers
expat2
fb-drv
fbterminal
libpng
libsdl
libsdl-image
+ libvcpu
linux-26-headers
lxfuxlibc
mag
projects / l4.git / commitdiff