6 #include "mapped_alloc.h"
20 Valid = 0x00000001, ///< Valid
21 Writable = 0x00000002, ///< Writable
22 User = 0x00000004, ///< User accessible
23 Write_through = 0x00000008, ///< Write through
24 Cacheable = 0x00000000, ///< Cache is enabled
25 Noncacheable = 0x00000010, ///< Caching is off
26 Referenced = 0x00000020, ///< Page was referenced
27 Dirty = 0x00000040, ///< Page was modified
28 Pse_bit = 0x00000080, ///< Indicates a super page
29 Cpu_global = 0x00000100, ///< pinned in the TLB
30 L4_global = 0x00000200, ///< pinned in the TLB
31 Pfn = 0xfffff000, ///< page frame number
34 Mword addr() const { return _raw & Pfn; }
40 static Unsigned32 _cpu_global;
43 class Pt_entry : public Pte_base
46 enum { Page_shift = Config::PAGE_SHIFT };
47 Mword leaf() const { return true; }
48 void set(Address p, bool intermed, bool present, unsigned long attrs = 0)
50 _raw = (p & Pfn) | (present ? 1 : 0)
51 | (intermed ? (Writable | User | Cacheable) : 0) | attrs;
55 class Pd_entry : public Pte_base
58 enum { Page_shift = Config::SUPERPAGE_SHIFT };
59 Mword leaf() const { return _raw & Pse_bit; }
60 void set(Address p, bool intermed, bool present, unsigned long attrs = 0)
62 _raw = (p & Pfn) | (present ? 1 : 0)
63 | (intermed ? (Writable | User | Cacheable) : Pse_bit) | attrs;
69 typedef Ptab::List< Ptab::Traits<Pd_entry, 22, 10, true, false>,
70 Ptab::Traits<Pt_entry, 12, 10, true> > Ptab_traits;
72 typedef Ptab::Shift<Ptab_traits, Virt_addr::Shift>::List Ptab_traits_vpn;
73 typedef Ptab::Page_addr_wrap<Page_number, Virt_addr::Shift> Ptab_va_vpn;