]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/ip/sja1000_1.0
scripts: include script for applying new FPGA design at runtime.
[fpga/zynq/canbench-sw.git] / system / ip / sja1000_1.0 /
2016-05-24 Martin Jerabeksja1000: added module can_top for backward compatibility
2016-05-12 Martin Jerabeksja1000: IP fixes, corrected device-tree entry, it...
2016-05-12 Martin Jerabeksja1000: synchronous with AXI, duplex register access...
2016-05-12 Martin Jerabeksja1000 core, linux drivers
2016-05-12 Martin Jerabekadded sja1000 IP