]> rtime.felk.cvut.cz Git - fpga/openmsp430.git/commit
New top module with external data bus
authorVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 14 Apr 2011 17:41:27 +0000 (19:41 +0200)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Thu, 14 Apr 2011 17:41:27 +0000 (19:41 +0200)
commitac1e809c7d20e745adf13f7d707db6bcf2de606f
treec217c4bcf1e530bb6cca7cb75a601cac388f14f0
parent1d36f415d2d1fc107ebb177307984fc10e52962c
New top module with external data bus

See README.
top/top_8_32_mul_dbus/README [new file with mode: 0644]
top/top_8_32_mul_dbus/openMSP430_8_32_mul_dbus.bmm [new file with mode: 0644]
top/top_8_32_mul_dbus/openMSP430_8_32_mul_dbus.prj [new file with mode: 0644]
top/top_8_32_mul_dbus/openMSP430_8_32_mul_dbus.vhd [new file with mode: 0644]
top/top_8_32_mul_dbus/openMSP430_defines.v [new file with mode: 0644]