]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/lx-rocon.git/commit
projects / fpga / lx-cpu1 / lx-rocon.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 48904b2) | patch
Implement reset properly with correct polarity inside the modules
authorMartin Meloun <meloumar@cmp.felk.cvut.cz>
Mon, 26 Aug 2013 10:46:59 +0000 (12:46 +0200)
committerMartin Meloun <meloumar@cmp.felk.cvut.cz>
Mon, 26 Aug 2013 10:46:59 +0000 (12:46 +0200)
commitdcdda297369b38c6a5b9c0fb5094cb5f219b1f32
tree05b7e355d96b193f14d7c91dc42b11f34ff563d4tree | snapshot
parent48904b210d09623c385d7a8da08006a236d4884dcommit | diff
Implement reset properly with correct polarity inside the modules
hw/bcd.vhd diff | blob | history
hw/irc_register.vhd diff | blob | history
hw/lx_rocon_top.vhd diff | blob | history
hw/qcounter.vhd diff | blob | history
Unnamed repository; edit this file 'description' to name the repository.