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Re-implemented ADC start logic to enable multiple samples per pixel mode.
[fpga/lx-cpu1/lx-dad.git] / hw / lx_adc_if.vhd
2015-11-03 Pavel PisaRe-implemented ADC start logic to enable multiple sampl... blob | commitdiff | raw
2015-05-20 Jan Novotnyfixed FPGA buggs, added support for single shot measure... blob | commitdiff | raw | diff to current
2015-04-30 Jan Novotnyadded sensor clock generation files addn ADC readout... blob | commitdiff | raw | diff to current