# switch to regexp syntax.\r
syntax: regexp\r
^.*obj_.*\.[h|c|s]\r
-\r
-\r
+^\.lib.*\.arxml\r
syntax: regexp
^.project$
\ No newline at end of file
#include "Det.h"\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#endif\r
\r
\r
\r
if (E_OK == Adc_CheckReadGroup (group))\r
{\r
- if ((ADC_CONV_MODE_CONTINOUS == AdcConfigPtr->groupConfigPtr[group].conversionMode) &&\r
+ if ((ADC_CONV_MODE_CONTINUOUS == AdcConfigPtr->groupConfigPtr[group].conversionMode) &&\r
((ADC_STREAM_COMPLETED == AdcConfigPtr->groupConfigPtr[group].status->groupStatus) ||\r
(ADC_COMPLETED == AdcConfigPtr->groupConfigPtr[group].status->groupStatus)))\r
{\r
#include <stdlib.h>\r
#include <string.h>\r
#include "Os.h"
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"
\r
#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId / 16)\r
#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId % 16))\r
\r
-#if ( DIO_VERSION_INFO_API == STD_ON )\r
-static Std_VersionInfoType _Dio_VersionInfo =\r
-{\r
- .vendorID = (uint16)1,\r
- .moduleID = (uint16)1,\r
- .instanceID = (uint8)1,\r
- .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
- .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
- .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
- .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
- .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
- .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
-};\r
-#endif\r
+#define CHANNEL_PTR (&DioChannelConfigData)\r
+#define PORT_PTR (&DioPortConfigData)\r
+#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
static int Channel_Config_Contains(Dio_ChannelType channelId)\r
\r
level = GPIO_ReadInputData(GPIO_ports[portId]);\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
\r
GPIO_Write(GPIO_ports[portId], level);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
level = STD_LOW;\r
}\r
\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
\r
Dio_WritePort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId), portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
// Shift down\r
level = level >> channelGroupIdPtr->offset;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
\r
Dio_WritePort(channelGroupIdPtr->port, portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
#include <string.h>\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"\r
#endif\r
#include "stm32f10x.h"\r
#include "Det.h"\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#endif\r
\r
// Implementation specific\r
/* STM32 helper arrays\r
- *
+ *\r
*/\r
TIM_TypeDef * const TimAddr[] =\r
{\r
TimAddr[channel]->CR1 |= (TIM_CR1_CEN | TIM_CR1_URS | TIM_CR1_DIR);\r
TimAddr[channel]->CR1 &= ~TIM_CR1_UDIS;\r
}\r
-\r
+ #if ( GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON )\r
if( Gpt_Global.config[confCh].GptNotification != NULL )\r
{\r
// GPT275\r
Gpt_EnableNotification(channel);\r
}\r
-\r
+ #endif\r
Gpt_Unit[channel].state = GPT_STATE_STARTED;\r
}\r
\r
// Disable timer\r
TimAddr[channel]->CR1 &= ~TIM_CR1_CEN;\r
}\r
-\r
+ #if ( GPT_ENABLE_DISABLE_NOTIFICATION_API == STD_ON )\r
Gpt_DisableNotification(channel);\r
+ #endif\r
Gpt_Unit[channel].state = GPT_STATE_STOPPED;\r
}\r
\r
#include <string.h>\r
#include "Ramlog.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
{\r
return (((uint32_t)pll - 2) << 18);\r
}\r
+\r
+#ifdef STM32F10X_CL\r
static uint32_t GetPll2ValueFromMult(uint8_t pll)\r
{\r
return (((uint32_t)pll - 2) << 8);\r
}\r
+#endif\r
\r
/**\r
* Set bus clocks. SysClk,AHBClk,APB1Clk,APB2Clk\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#else\r
#define VALIDATE_PARAM_PIN(_api)\r
#endif\r
\r
+#if (PORT_VERSION_INFO_API == STD_ON)\r
static Std_VersionInfoType _Port_VersionInfo =\r
{ .vendorID = (uint16)1, .moduleID = (uint16) MODULE_ID_PORT,\r
.instanceID = (uint8)1,\r
.ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
.ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
.ar_patch_version = (uint8)PORT_AR_PATCH_VERSION, };\r
+#endif\r
\r
/** @req PORT140 */\r
/** @req PORT041 Comment: To reduce flash usage the configuration tool can disable configuration of some ports */\r
\r
_portState = PORT_INITIALIZED;\r
_configPtr = (Port_ConfigType *)configType;\r
- cleanup: return;\r
+ return;\r
}\r
\r
/** @req PORT141 */\r
*gpioAddr |= (GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF) << bit; // TODO shall this be added to conf?\r
}\r
\r
- cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
VALIDATE_STATE_INIT(PORT_REFRESH_PORT_DIRECTION_ID);\r
\r
/* TODO Not implemented yet */\r
- cleanup: return;\r
+ return;\r
}\r
\r
/** req PORT143 */\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_MODE_ID, PORT_E_MODE_UNCHANGEABLE );\r
#endif\r
\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------\r
+ * Wdg.c\r
+ *\r
+ * Created on: 22 feb 2010\r
+ * Author: Fredrik\r
+ */\r
+\r
+#include "stm32f10x.h"\r
+#include "Wdg.h"\r
+\r
+/* Independant WD. */\r
+static const Wdg_IWDG_ConfigType *configIWDGPtr;\r
+static const Wdg_IWDG_SettingsType *modeIWDGConfig;\r
+/* Windowed WD. */\r
+static const Wdg_WWDG_ConfigType *configWWDGPtr;\r
+static const Wdg_WWDG_SettingsType *modeWWDGConfig;\r
+\r
+\r
+void Wdg_IWDG_Init (const Wdg_IWDG_ConfigType* ConfigPtr)\r
+{\r
+ /* Keep a pointer to the config. */\r
+ configIWDGPtr = ConfigPtr;\r
+\r
+ Wdg_IWDG_SetMode(ConfigPtr->Wdg_IWDGModeConfig->Wdg_DefaultMode);\r
+}\r
+\r
+void Wdg_WWDG_Init (const Wdg_WWDG_ConfigType* ConfigPtr)\r
+{\r
+ /* Keep a pointer to the config. */\r
+ configWWDGPtr = ConfigPtr;\r
+\r
+ /* TODO: Move to Mcu.. */\r
+ RCC->APB1ENR |= (1 << 11);\r
+\r
+ Wdg_WWDG_SetMode(ConfigPtr->Wdg_WWDGModeConfig->Wdg_DefaultMode);\r
+}\r
+\r
+void Wdg_Init (const Wdg_ConfigType* ConfigPtr)\r
+{\r
+ Wdg_IWDG_Init(ConfigPtr->Wdg_IWDG_Config);\r
+ Wdg_WWDG_Init(ConfigPtr->Wdg_WWDG_Config);\r
+}\r
+\r
+void Wdg_IWDG_Trigger (void)\r
+{\r
+ IWDG->KR = 0xAAAA;\r
+}\r
+\r
+void Wdg_WWDG_Trigger (void)\r
+{\r
+ volatile uint32 temp;\r
+\r
+ if (modeWWDGConfig != 0)\r
+ {\r
+ temp = WWDG->CR;\r
+\r
+ /* Set counter to preset value. */\r
+ temp |= (modeWWDGConfig->CounterPreset & WWDG_CR_T);\r
+\r
+ WWDG->CR = temp;\r
+ }\r
+}\r
+\r
+Std_ReturnType Wdg_IWDG_SetMode (WdgIf_ModeType Mode)\r
+{\r
+ Std_ReturnType res = E_NOT_OK;\r
+ switch (Mode)\r
+ {\r
+ case WDGIF_OFF_MODE:\r
+ modeIWDGConfig = &configIWDGPtr->Wdg_IWDGModeConfig->WdgSettingsOff;\r
+ break;\r
+ case WDGIF_FAST_MODE:\r
+ modeIWDGConfig = &configIWDGPtr->Wdg_IWDGModeConfig->WdgSettingsFast;\r
+ break;\r
+ case WDGIF_SLOW_MODE:\r
+ modeIWDGConfig = &(configIWDGPtr->Wdg_IWDGModeConfig->WdgSettingsSlow);\r
+ break;\r
+ default:\r
+ modeIWDGConfig = 0;\r
+ break;\r
+ }\r
+ if (modeIWDGConfig != 0)\r
+ {\r
+ /* Unlock the iwdg registers. */\r
+ IWDG->KR = 0x5555;\r
+\r
+ /* Configure prescaler and reload value. */\r
+ IWDG->PR = modeIWDGConfig->TimerBase;\r
+ IWDG->RLR = modeIWDGConfig->ReloadValue;\r
+\r
+ /* Lock the iwdg registers again. */\r
+ IWDG->KR = 0x0;\r
+\r
+ /* Enable watchdog if config tell us to.. */\r
+ if (modeIWDGConfig->ActivationBit)\r
+ {\r
+ /* IWDG is started by writing 0xCCCC to key register. */\r
+ IWDG->KR = 0xCCCC;\r
+ }\r
+ else\r
+ {\r
+ /* There is no way to disable this watchdog.. */\r
+ }\r
+ res = E_OK;\r
+ }\r
+ return res;\r
+}\r
+\r
+Std_ReturnType Wdg_WWDG_SetMode (WdgIf_ModeType Mode)\r
+{\r
+ Std_ReturnType res = E_NOT_OK;\r
+ switch (Mode)\r
+ {\r
+ case WDGIF_OFF_MODE:\r
+ modeWWDGConfig = &configWWDGPtr->Wdg_WWDGModeConfig->WdgSettingsOff;\r
+ break;\r
+ case WDGIF_FAST_MODE:\r
+ modeWWDGConfig = &configWWDGPtr->Wdg_WWDGModeConfig->WdgSettingsFast;\r
+ break;\r
+ case WDGIF_SLOW_MODE:\r
+ modeWWDGConfig = &configWWDGPtr->Wdg_WWDGModeConfig->WdgSettingsSlow;\r
+ break;\r
+ default:\r
+ modeWWDGConfig = 0;\r
+ break;\r
+ }\r
+ if (modeWWDGConfig != 0)\r
+ {\r
+ /* Enable watchdog in system reset mode. */\r
+ volatile uint32 temp;\r
+ temp = WWDG->CFR;\r
+ /* Clear prescaler bits. */\r
+ temp &= ~WWDG_CFR_WDGTB;\r
+ temp |= ((modeWWDGConfig->TimerBase << 7) & WWDG_CFR_WDGTB);\r
+\r
+ /* Configure window. */\r
+ temp &= ~WWDG_CFR_W;\r
+ temp |= (modeWWDGConfig->WindowValue & WWDG_CFR_W);\r
+\r
+ WWDG->CFR = temp;\r
+\r
+ temp = WWDG->CR;\r
+ temp &= ~WWDG_CR_T;\r
+ /* Set counter. */\r
+ temp |= (modeWWDGConfig->CounterPreset & WWDG_CR_T);\r
+\r
+ /* Enable watchdog if config tell us to.. */\r
+ if (modeWWDGConfig->ActivationBit)\r
+ {\r
+ temp |= WWDG_CR_WDGA;\r
+ }\r
+ else\r
+ {\r
+ temp &= ~WWDG_CR_WDGA;\r
+ }\r
+ WWDG->CR = temp;\r
+\r
+ /* Clear EWI flag. */\r
+ WWDG->SR = 0;\r
+ res = E_OK;\r
+ }\r
+ return res;\r
+}\r
+\r
+\r
+void Wdg_IWDG_GetVersionInfo (void /*Std_VersionInfoType* versioninfo*/)\r
+{\r
+\r
+}\r
+\r
+void Wdg_WWDG_GetVersionInfo (void /*Std_VersionInfoType* versioninfo*/)\r
+{\r
+\r
+}\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------\r
+ * Wdg.h\r
+ *\r
+ * Created on: 27 maj 2010\r
+ * Author: Fredrik\r
+ */\r
+\r
+#ifndef WDG_H_\r
+#define WDG_H_\r
+\r
+#include "Wdg_Cfg.h"\r
+\r
+void Wdg_IWDG_Init (const Wdg_IWDG_ConfigType* ConfigPtr);\r
+void Wdg_IWDG_Trigger (void);\r
+Std_ReturnType Wdg_IWDG_SetMode (WdgIf_ModeType Mode);\r
+void Wdg_IWDG_GetVersionInfo (void /* TODO Std_VersionInfoType* versioninfo*/);\r
+\r
+void Wdg_WWDG_Init (const Wdg_WWDG_ConfigType* ConfigPtr);\r
+void Wdg_WWDG_Trigger (void);\r
+Std_ReturnType Wdg_WWDG_SetMode (WdgIf_ModeType Mode);\r
+void Wdg_WWDG_GetVersionInfo (void /* TODO Std_VersionInfoType* versioninfo*/);\r
+\r
+void Wdg_Init (const Wdg_ConfigType* ConfigPtr);\r
+\r
+#endif /* WDG_H_ */\r
{\r
// TODO: make switch here... for now just call func.\r
Irq_Enable();\r
- os_sys.curr_pcb->entry();\r
+ Os_Sys.currTaskPtr->entry();\r
}\r
\r
void *Os_ArchGetStackPtr( void ) {\r
return SC_SIZE;\r
}\r
\r
-void Os_ArchSetTaskEntry(OsPcbType *pcbPtr ) {\r
+void Os_ArchSetTaskEntry(OsTaskVarType *pcbPtr ) {\r
// TODO: Add lots of things here, see ppc55xx\r
uint32_t *context = (uint32_t *)pcbPtr->stack.curr;\r
\r
\r
}\r
\r
-void Os_ArchSetupContext( OsPcbType *pcb ) {\r
+void Os_ArchSetupContext( OsTaskVarType *pcb ) {\r
// TODO: Add lots of things here, see ppc55xx\r
// uint32_t *context = (uint32_t *)pcb->stack.curr;\r
\r
#include "arch_offset.h"\r
#include "stack.h"\r
\r
-.extern os_sys\r
+.extern Os_Sys\r
.extern TailChaining\r
\r
.syntax unified\r
mov r0,sp // stack as first arg\r
\r
// When at interrupt nest count = 0, load interrupt stack \r
- ldr r4,=os_sys\r
+ ldr r4,=Os_Sys\r
ldr r5,[r4,#SYS_INT_NEST_CNT]\r
cmp r5, #0\r
bgt arggg \r
\r
// TODO: Fix this for all arch's..call pre,post hooks. Done here or after?\r
// Set new current pcb\r
- ldr r5,= os_sys\r
+ ldr r5,= Os_Sys\r
str r1,[r5,#SYS_CURR_PCB_P]\r
\r
// Restore C context\r
#include "task_i.h"
#include "hooks.h"
#include "stm32f10x.h"
-#include "irq.h"
+#include "isr.h"
extern void *Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];
* @param vector
*/
void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {
- OsPcbType *pcb;
+ OsTaskVarType *pcb;
- pcb = os_find_task(tid);
+ pcb = Os_TaskGet(tid);
Irq_VectorTable[vector+16] = (void *)pcb;
NVIC_InitVector(vector, osPrioToCpuPio(pcb->prio));
#include "Os.h"\r
#include "internal.h"\r
#include "stm32f10x.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"\r
\r
\r
#include "Det.h"\r
#include "CanIf_Cbk.h"\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "Mcu.h"\r
+#include "arc.h"\r
\r
#define DCAN1_MAX_MESSAGEBOXES 64\r
#define DCAN2_MAX_MESSAGEBOXES 64\r
return 0;\r
}\r
\r
-uint32 usedBoxes[64] = {0};\r
+#define DCAN_MC_NEWDAT 15\r
+#define DCAN_MC_EOB 7\r
+\r
+uint32 usedRxBoxes[64] = {0};\r
+uint32 usedTxBoxes[64] = {0};\r
+\r
+static inline Can_ReturnType handleRxMsgObject(uint8 MsgNr, const Can_HardwareObjectType *hoh, CanControllerIdType controller) {\r
+ uint32 MsgId;\r
+ uint8 MsgDlc;\r
+ uint8 DataByteIndex;\r
+ uint8 *SduPtr;\r
+\r
+ /* Wait until Busy Flag is 0 */\r
+ DCAN_WAIT_UNTIL_NOT_BUSY_NO_RV(controller, IfRegId);\r
+\r
+ // Read message control\r
+ uint32 mc = CanRegs[controller]->IFx[IfRegId].MC;\r
+ uint32 arb = CanRegs[controller]->IFx[IfRegId].ARB;\r
+\r
+ // Is there a new message waiting?\r
+ if (!(mc & (1 << DCAN_MC_NEWDAT))) {\r
+ return CAN_NOT_OK; // Nothing more to be done.\r
+ }\r
+\r
+ // For debug\r
+ if (MsgNr == 0) {\r
+ usedRxBoxes[MsgNr]++;\r
+ } else {\r
+ usedRxBoxes[MsgNr]++;\r
+ }\r
+\r
+\r
+ /* Extended Id */\r
+ if(arb & 0x40000000) {\r
+ /* Bring Id to standardized format (MSB marks extended Id) */\r
+ MsgId = (arb & 0x1FFFFFFF) | 0x80000000;\r
+\r
+ } else { /* Standard Id */\r
+ /* Bring Id to standardized format (MSB marks extended Id) */\r
+ MsgId = (arb & 0x1FFC0000) >> 18;\r
+ }\r
+\r
+ /* DLC (Max 8) */\r
+ MsgDlc = mc & 0x000F;\r
+ if(MsgDlc > 8) {\r
+ MsgDlc = 8;\r
+ }\r
+\r
+ /* Let SduPtr point to Shadow Buffer */\r
+ SduPtr = RxShadowBuf[controller];\r
+\r
+ /* Copy Message Data to Shadow Buffer */\r
+ for(DataByteIndex = 0; DataByteIndex < MsgDlc; DataByteIndex++)\r
+ {\r
+ SduPtr[DataByteIndex] = CanRegs[controller]->IFx[IfRegId].DATx[ElementIndex[DataByteIndex]];\r
+ }\r
+\r
+ /* Indicate successful Reception */\r
+ CanIf_RxIndication(hoh->CanObjectId, MsgId, MsgDlc, SduPtr);\r
+\r
+ // Is this the last message object of the FIFO?\r
+ if (mc & (1 << DCAN_MC_EOB)) {\r
+ return CAN_NOT_OK;\r
+ }\r
+\r
+ return CAN_OK;\r
+}\r
+\r
\r
void Can_InterruptHandler(CanControllerIdType controller)\r
{\r
uint32 MsgNr;\r
- uint32 MsgId;\r
- uint8 MsgDlc;\r
- uint8 DataByteIndex;\r
- uint8 *SduPtr;\r
-\r
- //Can_DisableControllerInterrupts(controller);\r
\r
uint32 ir = CanRegs[controller]->IR;\r
\r
- if(ir == 0x8000)\r
- {\r
+\r
+ if(ir == 0x8000) { // This is an error interrupt\r
+\r
uint32 sr = CanRegs[controller]->SR;\r
- /* WakeUp Pending */\r
- if(sr & 0x00000200) {\r
+\r
+ if(sr & 0x00000200) { /* WakeUp Pending */\r
/* Set Init Bit, so that Controller is in Stop state */\r
CanRegs[controller]->CTL |= 0x1;\r
// EcuM_CheckWakeUp(ControllerConfig[0].WakeupSrc);\r
\r
}\r
- /* Bus Off */\r
- if(sr & 0x00000080) {\r
+\r
+ if(sr & 0x00000080) { /* Bus Off */\r
Can_SetControllerMode(controller, CAN_T_STOP); // CANIF272\r
//CanIf_ControllerBusOff(0); // Not implemented in Arctic Core\r
\r
}\r
- }\r
- else\r
- {\r
- MsgNr = ir;\r
-\r
\r
- if (MsgNr == 0) {\r
- usedBoxes[MsgNr]++;\r
- } else {\r
- usedBoxes[MsgNr]++;\r
- }\r
- \r
+ } else if (ir > 0 && ir < 0x8000){ // This interrupt is from a message object.\r
+ MsgNr = ir;\r
\r
- /* Read Arbitration, Control and Data Bits and clear IntPnd and NewDat*/\r
- CanRegs[controller]->IFx[IfRegId].COM = 0x003F0000 | MsgNr;\r
+ /* Read Arbitration and control */\r
+ CanRegs[controller]->IFx[IfRegId].COM = 0x003F0000 | MsgNr;\r
\r
- /* Wait until Busy Flag is 0 */\r
- DCAN_WAIT_UNTIL_NOT_BUSY_NO_RV(controller, IfRegId);\r
+ /* Wait until Busy Flag is 0 */\r
+ DCAN_WAIT_UNTIL_NOT_BUSY_NO_RV(controller, IfRegId);\r
\r
/* Transmit Object */\r
if(CanRegs[controller]->IFx[IfRegId].ARB & 0x20000000)\r
{\r
+ // For debug\r
+ if (MsgNr == 0) {\r
+ usedTxBoxes[MsgNr]++;\r
+ } else {\r
+ usedTxBoxes[MsgNr]++;\r
+ }\r
+\r
/* Reset TxRqst-Array Element */\r
ControllerConfig[controller].TxPtr[MsgNr - 1] = 0;\r
/* A Message was successfully transmitted */\r
CanIf_TxConfirmation(ControllerConfig[controller].PduPtr[MsgNr - 1].swPduHandle);\r
- }\r
+\r
/* Receive Object */\r
- else\r
- {\r
- /* Extended Id */\r
- if(CanRegs[controller]->IFx[IfRegId].ARB & 0x40000000)\r
- {\r
- /* Bring Id to standardized format (MSB marks extended Id) */\r
- MsgId = (CanRegs[controller]->IFx[IfRegId].ARB & 0x1FFFFFFF) | 0x80000000;\r
- }\r
- /* Standard Id */\r
- else\r
- {\r
- /* Bring Id to standardized format (MSB marks extended Id) */\r
- MsgId = (CanRegs[controller]->IFx[IfRegId].ARB & 0x1FFC0000) >> 18;\r
- }\r
- /* DLC (Max 8) */\r
- MsgDlc = CanRegs[controller]->IFx[IfRegId].MC & 0x000F;\r
- if(MsgDlc > 8)\r
- {\r
- MsgDlc = 8;\r
- }\r
- /* Let SduPtr point to Shadow Buffer */\r
- SduPtr = RxShadowBuf[controller];\r
+ } else {\r
\r
- /* Copy Message Data to Shadow Buffer */\r
- for(DataByteIndex = 0; DataByteIndex < MsgDlc; DataByteIndex++)\r
- {\r
- SduPtr[DataByteIndex] = CanRegs[controller]->IFx[IfRegId].DATx[ElementIndex[DataByteIndex]];\r
- }\r
- /* Indicate successful Reception */\r
- const Can_HardwareObjectType *hoh = Can_FindRxHoh(controller, MsgNr);\r
- CanIf_RxIndication(hoh->CanObjectId, MsgId, MsgDlc, SduPtr);\r
+ // Handle all of the message objects in this FIFO buffer.\r
+ const Can_HardwareObjectType *hoh = Can_FindRxHoh(controller, MsgNr);\r
+ for(; MsgNr < ControllerConfig[controller].MaxBoxes; MsgNr++) {\r
+ if (!(hoh->Can_Arc_MbMask & (1 << (MsgNr - 1)))) {\r
+ continue;\r
+ }\r
+\r
+ /* Read setup hardware to read arbitration, control and data Bits of the message object.\r
+ * Clear IntPnd and Tx */\r
+ if (MsgNr != ir) { // Don't do this the first time.\r
+ CanRegs[controller]->IFx[IfRegId].COM = 0x003F0000 | MsgNr;\r
+ }\r
+\r
+ if (handleRxMsgObject(MsgNr, hoh, controller) == CAN_NOT_OK) {\r
+ break; // We have parsed the last object of this FIFO.\r
+ }\r
+ }\r
\r
}\r
}\r
- //Can_EnableControllerInterrupts(controller);\r
}\r
\r
void Can1_InterruptHandler() {\r
return;\r
}\r
#endif \r
- \r
+\r
+ imask_t i_state = McuE_EnterCriticalSection();\r
+\r
// TODO This should be used instead of other variables in the Can_Lcfg file.\r
CurConfig = Config;\r
\r
ModuleState = CAN_READY;\r
#endif\r
\r
-\r
+ McuE_ExitCriticalSection(i_state);\r
\r
}\r
\r
}\r
#endif \r
\r
+ imask_t i_state = McuE_EnterCriticalSection();\r
+\r
ErrCounter = CAN_TIMEOUT_DURATION;\r
\r
//for(MsgNr = 0; MsgNr < ControllerConfig[Controller].MessageBoxCount; MsgNr++)\r
/* Clear CCE Bit */\r
CanRegs[Controller]->CTL &= ~0x00000040;\r
\r
+ McuE_ExitCriticalSection(i_state);\r
}\r
\r
\r
break;\r
}\r
\r
+ /* Check if TxRqst Bit of MsgObject is set */\r
+ if(CanRegs[ControllerId]->TRx[MsgNr >> 5] & (1 << (MsgNr & 0x1F)))\r
+ {\r
+ return CAN_BUSY;\r
+ }\r
+\r
CurPduArrayPtr = ControllerConfig[ControllerId].PduPtr + (MsgNr - 1);\r
CurCancelRqstPtr = ControllerConfig[ControllerId].CancelPtr + (MsgNr - 1);\r
CurTxRqstPtr = ControllerConfig[ControllerId].TxPtr + (MsgNr - 1);\r
ArbRegValue = 0xA0000000 | ((PduInfo->id & 0x7FF) << 18);\r
}\r
\r
- /* Check if TxRqst Bit of MsgObject is set */\r
- if(CanRegs[ControllerId]->TRx[MsgNr >> 5] & (1 << (MsgNr & 0x1F)))\r
- {\r
- return CAN_BUSY;\r
- }\r
\r
DCAN_WAIT_UNTIL_NOT_BUSY(ControllerId, IfRegId);\r
\r
+ // We cannot allow an interrupt or other task to play with the COM, MC and ARB registers here.\r
+ imask_t i_state = McuE_EnterCriticalSection();\r
+\r
\r
/* Set NewDat, TxIE (dep on ControllerConfig), TxRqst, EoB and DLC */\r
CanRegs[ControllerId]->IFx[IfRegId].MC = 0x00000100 // Tx request\r
\r
IfRegId ^= 1;\r
\r
+ McuE_ExitCriticalSection(i_state);\r
return CAN_OK;\r
}\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "Std_Types.h"\r
+#include "Dio.h"\r
+#include "Det.h"\r
+#include "Cpu.h"\r
+#include <string.h>\r
+\r
+GIO_RegisterType *GPIO_ports[] = { GIO_PORTA_BASE, GIO_PORTB_BASE };\r
+\r
+#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId >> 8)\r
+#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId & 0x1F))\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+static int Channel_Config_Contains(Dio_ChannelType channelId)\r
+{\r
+ Dio_ChannelType* ch_ptr=(Dio_ChannelType*)(&DioChannelConfigData);\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*ch_ptr)\r
+ {\r
+ if (*ch_ptr==channelId)\r
+ {\r
+ rv=1;\r
+ break;\r
+ }\r
+ ch_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Port_Config_Contains(Dio_PortType portId)\r
+{\r
+ Dio_PortType* port_ptr=(Dio_PortType*)(&DioPortConfigData);\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*port_ptr)\r
+ {\r
+ if (*port_ptr==portId)\r
+ { rv=1; break;}\r
+ port_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Channel_Group_Config_Contains(const Dio_ChannelGroupType* _channelGroupIdPtr)\r
+{\r
+ Dio_ChannelGroupType* chGrp_ptr=(Dio_ChannelGroupType*)(&DioConfigData);\r
+ int rv=0;\r
+\r
+ while (DIO_END_OF_LIST!=chGrp_ptr->port)\r
+ {\r
+ if (chGrp_ptr->port==_channelGroupIdPtr->port&&\r
+ chGrp_ptr->offset==_channelGroupIdPtr->offset&&\r
+ chGrp_ptr->mask==_channelGroupIdPtr->mask)\r
+ { rv=1; break;}\r
+ chGrp_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+#define VALIDATE_CHANNEL(_channelId, _api) \\r
+ if(0==Channel_Config_Contains(channelId)) { \\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_CHANNEL_ID ); \\r
+ level = 0; \\r
+ goto cleanup; \\r
+ }\r
+#define VALIDATE_PORT(_portId, _api)\\r
+ if(0==Port_Config_Contains(_portId)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_PORT_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\\r
+ if(0==Channel_Group_Config_Contains(_channelGroupIdPtr)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_GROUP_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#else\r
+#define VALIDATE_CHANNEL(_channelId, _api)\r
+#define VALIDATE_PORT(_portId, _api)\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\r
+#endif\r
+\r
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
+{\r
+ Dio_PortLevelType level = 0;\r
+ VALIDATE_PORT(portId, DIO_READPORT_ID);\r
+\r
+ level = (uint8)GPIO_ports[portId]->DIN;\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
+}\r
+\r
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
+{\r
+ VALIDATE_PORT(portId, DIO_WRITEPORT_ID);\r
+\r
+ GPIO_ports[portId]->DOUT = (uint32)level;\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
+}\r
+\r
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId));\r
+ Dio_PortLevelType bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if ((portVal & bit) != STD_LOW){\r
+ level = STD_HIGH;\r
+ } else{\r
+ level = STD_LOW;\r
+ }\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
+}\r
+\r
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
+{\r
+ VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
+\r
+ Dio_PortType port = DIO_GET_PORT_FROM_CHANNEL_ID(channelId);\r
+ uint16 bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if (!( GPIO_ports[port]->DIR & bit)) { // This is an input channel.\r
+ goto cleanup;\r
+ }\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(port);\r
+\r
+ if(level == STD_HIGH){\r
+ portVal |= bit;\r
+ }else{\r
+ portVal &= ~bit;\r
+ }\r
+\r
+ Dio_WritePort(port, portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+\r
+Dio_PortLevelType Dio_ReadChannelGroup(\r
+ const Dio_ChannelGroupType *channelGroupIdPtr)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_READCHANNELGROUP_ID);\r
+\r
+ // Get masked values\r
+ level = Dio_ReadPort(channelGroupIdPtr->port) & channelGroupIdPtr->mask;\r
+\r
+ // Shift down\r
+ level = level >> channelGroupIdPtr->offset;\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
+}\r
+\r
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
+ Dio_PortLevelType level)\r
+{\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);\r
+\r
+ // Shift up and apply mask so that no unwanted bits are affected\r
+ level = (level << channelGroupIdPtr->offset) & channelGroupIdPtr->mask;\r
+\r
+ // Read port and clear out masked bits\r
+ Dio_PortLevelType portVal = Dio_ReadPort(channelGroupIdPtr->port) & (~channelGroupIdPtr->mask);\r
+\r
+ // Or in the upshifted masked level\r
+ portVal |= level;\r
+\r
+ Dio_WritePort(channelGroupIdPtr->port, portVal);\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
+}\r
+\r
+\r
\r
#include "core_cr4.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "Std_Types.h"\r
+#include "Port.h"\r
+#include "Det.h"\r
+#include "Cpu.h"\r
+#include <string.h>\r
+\r
+#define GET_PIN_PORT(_pin) (_pin >> 8)\r
+#define GET_PIN_PIN(_pin) (_pin & 0x1F)\r
+#define GET_PIN_MASK(_pin) (1 << (_pin & 0x1F))\r
+\r
+typedef enum\r
+{\r
+ PORT_UNINITIALIZED = 0, PORT_INITIALIZED,\r
+} Port_StateType;\r
+\r
+\r
+typedef volatile struct\r
+{\r
+ uint32 FUN;\r
+ uint32 DIR;\r
+ uint32 DIN;\r
+ uint32 DOUT;\r
+ uint32 DSET;\r
+ uint32 DCLR;\r
+ uint32 PDR;\r
+ uint32 PULDIS;\r
+ uint32 PSL;\r
+} Port_RegisterType;\r
+\r
+\r
+#define PORT_NOT_CONFIGURED 0x00000000\r
+\r
+#define PORT_0_BASE ((Port_RegisterType *)0xFFF7BC30)\r
+#define PORT_1_BASE ((Port_RegisterType *)0xFFF7BC50)\r
+#define PORT_2_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_3_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_4_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_5_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_6_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_7_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_8_BASE ((Port_RegisterType *)0xFFF7DDE0)\r
+#define PORT_9_BASE ((Port_RegisterType *)0xFFF7DFE0)\r
+#define PORT_10_BASE ((Port_RegisterType *)0xFFF7E1E0)\r
+#define PORT_NUMBER_OF_PORTS 11\r
+\r
+static Port_RegisterType * const Port_Base[] =\r
+{\r
+ PORT_0_BASE,\r
+ PORT_1_BASE,\r
+ PORT_2_BASE,\r
+ PORT_3_BASE,\r
+ PORT_4_BASE,\r
+ PORT_5_BASE,\r
+ PORT_6_BASE,\r
+ PORT_7_BASE,\r
+ PORT_8_BASE,\r
+ PORT_9_BASE,\r
+ PORT_10_BASE,\r
+};\r
+\r
+\r
+\r
+static Port_StateType _portState = PORT_UNINITIALIZED;\r
+static const Port_ConfigType * _configPtr = &PortConfigData;\r
+\r
+#if PORT_DEV_ERROR_DETECT == STD_ON\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
+ if( (_ptr)==((void *)0) ) { \\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
+ return; \\r
+ }\r
+\r
+#define VALIDATE_STATE_INIT(_api)\\r
+ if(PORT_INITIALIZED!=_portState){\\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
+ return; \\r
+ }\r
+\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\\r
+ if(GET_PIN_PORT(_pin) >= PORT_NUMBER_OF_PORTS || Port_Base[GET_PIN_PORT(_pin)] == PORT_NOT_CONFIGURED || GET_PIN_PIN(_pin) > 7 ){\\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
+ return; \\r
+ }\r
+\r
+#else\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
+#define VALIDATE_STATE_INIT(_api)\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\r
+#endif\r
+\r
+#if PORT_VERSION_INFO_API == STD_ON\r
+static Std_VersionInfoType _Port_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16) MODULE_ID_PORT,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)PORT_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)PORT_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)PORT_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)PORT_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+void Port_RefreshPin(uint16 pinNumber) {\r
+ uint8 port = GET_PIN_PORT(_configPtr->pins[pinNumber].pin);\r
+ uint32 mask = GET_PIN_MASK(_configPtr->pins[pinNumber].pin);\r
+ uint16 conf = _configPtr->pins[pinNumber].conf;\r
+\r
+ if (conf & PORT_FUNC) {\r
+ // Don't do anything, let each driver configure???\r
+ return;\r
+ }\r
+\r
+ // Set pin direction\r
+ if (conf & PORT_PIN_OUT) {\r
+ Port_Base[port]->DIR |= mask;\r
+\r
+ // Set open drain\r
+ if (conf & PORT_ODE_ENABLE) {\r
+ Port_Base[port]->PDR |= mask;\r
+ } else {\r
+ Port_Base[port]->PDR &= ~mask;\r
+ }\r
+\r
+ } else {\r
+ Port_Base[port]->DIR &= ~mask;\r
+ }\r
+\r
+ // Set pull up or down or nothing.\r
+ if (conf & PORT_PULL_NONE) {\r
+ Port_Base[port]->PULDIS |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->PULDIS &= ~mask;\r
+ if (conf & PORT_PULL_UP) {\r
+ Port_Base[port]->PSL |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->PSL &= ~mask;\r
+ }\r
+ }\r
+}\r
+\r
+\r
+\r
+void Port_Init(const Port_ConfigType *configType) {\r
+ VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID);\r
+\r
+ _configPtr = (Port_ConfigType *)configType;\r
+\r
+ // Bring GIO register out of reset.\r
+ gioREG->GCR0 = 1;\r
+\r
+ for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+ Port_RefreshPin(i);\r
+ }\r
+\r
+ _portState = PORT_INITIALIZED;\r
+\r
+ return;\r
+}\r
+\r
+#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
+void Port_SetPinDirection( Port_PinType pin, Port_PinDirectionType direction )\r
+{\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_DIRECTION_ID);\r
+ VALIDATE_PARAM_PIN(pin, PORT_SET_PIN_DIRECTION_ID);\r
+\r
+ uint8 port = GET_PIN_PORT(pin);\r
+ uint32 mask = GET_PIN_MASK(pin);\r
+\r
+ if (direction & PORT_PIN_IN) {\r
+ Port_Base[port]->DIR |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->DIR &= ~mask;\r
+\r
+ }\r
+\r
+ return;\r
+}\r
+#endif\r
+\r
+void Port_RefreshPortDirection( void )\r
+{\r
+ VALIDATE_STATE_INIT(PORT_REFRESH_PORT_DIRECTION_ID);\r
+ for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+ if (!(_configPtr->pins[i].conf & PORT_DIRECTION_CHANGEABLE)) {\r
+ Port_RefreshPin(i);\r
+ }\r
+ }\r
+ return;\r
+}\r
+\r
+\r
+#if PORT_VERSION_INFO_API == STD_ON\r
+void Port_GetVersionInfo(Std_VersionInfoType* versionInfo)\r
+{\r
+ VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
+ memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
+ return;\r
+}\r
+#endif\r
+\r
+#if (PORT_SET_PIN_MODE_API == STD_ON)\r
+void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode) {\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_MODE_ID);\r
+ VALIDATE_PARAM_PIN(Pin, PORT_SET_PIN_MODE_ID);\r
+\r
+ uint8 port = GET_PIN_PORT(Pin);\r
+ uint8 pin = GET_PIN_PIN(Pin);\r
+ uint32 mask = GET_PIN_MASK(Pin);\r
+\r
+ Port_Base[port]->FUN &= ~mask;\r
+ Port_Base[port]->FUN |= ((Mode & 1) << pin);\r
+ return;\r
+}\r
+#endif\r
{\r
// TODO: make switch here... for now just call func.\r
Irq_Enable();\r
- os_sys.curr_pcb->entry();\r
+ Os_Sys.currTaskPtr->entry();\r
}\r
\r
void *Os_ArchGetStackPtr( void ) {\r
return SC_SIZE;\r
}\r
\r
-void Os_ArchSetTaskEntry(OsPcbType *pcbPtr ) {\r
+void Os_ArchSetTaskEntry(OsTaskVarType *pcbPtr ) {\r
// TODO: Add lots of things here, see ppc55xx\r
uint32_t *context = (uint32_t *)pcbPtr->stack.curr;\r
\r
\r
}\r
\r
-void Os_ArchSetupContext( OsPcbType *pcb ) {\r
+void Os_ArchSetupContext( OsTaskVarType *pcb ) {\r
// TODO: Add lots of things here, see ppc55xx\r
// uint32_t *context = (uint32_t *)pcb->stack.curr;\r
\r
#include "kernel_offset.h"\r
#include "stack.h"\r
\r
-.extern os_sys\r
+.extern Os_Sys\r
\r
.syntax unified\r
.cpu cortex-r4\r
mov r0,sp \r
\r
// When at interrupt nest count = 0, load interrupt stack \r
- ldr r4,=os_sys\r
+ ldr r4,=Os_Sys\r
ldr r5,[r4,#SYS_INT_NEST_CNT]\r
cmp r5, #0\r
bgt arggg\r
mov.w sp,r2\r
\r
// Set new current pcb\r
- ldr r5,= os_sys\r
+ ldr r5,= Os_Sys\r
str r1,[r5,#SYS_CURR_PCB_P]\r
\r
// Restore C context\r
unsigned FLG; /**< 0x0020: Interrupt Flag Register */\r
unsigned OFFSET0; /**< 0x0024: Interrupt Offset A Register */\r
unsigned OFFSET1; /**< 0x0028: Interrupt Offset B Register */\r
-} gioBASE_t;\r
+} GIO_Base_RegisterType;\r
\r
\r
/** @struct gioPort\r
unsigned PDR; /**< 0x0014: Open Drain Regsiter */\r
unsigned PULDIS; /**< 0x0018: Pullup Disable Register */\r
unsigned PSL; /**< 0x001C: Pull Up/Down Selection Register */\r
-} gioPORT_t;\r
+} GIO_RegisterType;\r
+\r
+#define GIO_PORTA_BASE ((GIO_RegisterType *)0xFFF7BC34)\r
+#define GIO_PORTB_BASE ((GIO_RegisterType *)0xFFF7BC54)\r
\r
\r
/** @def gioREG\r
*\r
* This pointer is used by the GIO driver to access the gio module registers.\r
*/\r
-#define gioREG ((gioBASE_t *)0xFFF7BC00U)\r
+#define gioREG ((GIO_Base_RegisterType *)0xFFF7BC00U)\r
\r
/** @def gioPORTA\r
* @brief GIO Port (A) Register Pointer\r
#include "internal.h"
#include "task_i.h"
#include "hooks.h"
-#include "irq.h"
+#include "isr.h"
#include "core_cr4.h"
extern TaskType Os_Arc_CreateIsr( void (*entry)(void ), uint8_t prio, const char *name );
}
stack = (uint32_t *)stack_p;
- struct OsPcb * pcb = (struct OsPcb *)Irq_VectorTable[virtualChannel];
+ struct OsTaskVar * pcb = (struct OsTaskVar *)Irq_VectorTable[virtualChannel];
// Save the hardware channel in the PCB, so that Os_Isr knows which interrupt channel to deactivate.
pcb->vector = channel;
stack = Os_Isr(stack, (void *)pcb);
* @param vector
*/
void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {
- OsPcbType *pcb;
+ OsTaskVarType *pcb;
- pcb = os_find_task(tid);
+ pcb = Os_TaskGet(tid);
Irq_VectorTable[vector] = (void *)pcb;
IrqActivateChannel(vector);
#include "Os.h"\r
#include "internal.h"\r
#include "core_cr4.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"\r
\r
#define RTICLK_PRESCALER 10\r
}\r
\r
void McuE_ExitCriticalSection(imask_t old_state) {\r
-\r
+ (void)old_state; // Nothing to be done. This is just to avoid PC-Lint warning.\r
}\r
#include "Adc.h"\r
#include "Det.h"\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "regs.h"\r
#include "arc.h"\r
\r
#include <stdlib.h>\r
#include <string.h>\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"\r
\r
// bits in CANxCTL0:\r
#include "Det.h"\r
#include "Os.h"\r
#include "arc.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
\r
#define FIRST_OC_REG 0x50\r
\r
#include <string.h>\r
#include "Ramlog.h"\r
\r
-#define USE_TRACE 1\r
#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#else\r
\r
_portState = PORT_INITIALIZED;\r
_configPtr = configType;\r
-#if (PORT_DEV_ERROR_DETECT == STD_ON)\r
- cleanup:\r
-#endif\r
+\r
return;\r
}\r
\r
Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_DIRECTION_ID, PORT_E_PARAM_PIN );\r
}\r
\r
- cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
DDRT = curValue;\r
#endif\r
\r
-#if (PORT_DEV_ERROR_DETECT == STD_ON)\r
- cleanup:\r
-#endif\r
return;\r
}\r
\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_MODE_ID, PORT_E_MODE_UNCHANGEABLE );\r
#endif\r
\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
{\r
// TODO: make switch here... for now just call func.\r
Irq_Enable();\r
- os_sys.curr_pcb->entry();\r
+ Os_Sys.currTaskPtr->entry();\r
}\r
\r
void *Os_ArchGetStackPtr( void ) {\r
}\r
\r
\r
-void Os_ArchSetupContext( OsPcbType *pcb ) {\r
+void Os_ArchSetupContext( OsTaskVarType *pcb ) {\r
// Nothing to be done here\r
}\r
\r
* @param pcbPtr\r
*/\r
\r
-void Os_ArchSetTaskEntry(OsPcbType *pcbPtr ) {\r
+void Os_ArchSetTaskEntry(OsTaskVarType *pcbPtr ) {\r
uint8_t *context_bytes = (uint8_t *)pcbPtr->stack.curr;\r
uint16_t temp;\r
\r
#include "context.h"\r
#include "irq_defines.h"\r
\r
-.extern os_sys\r
+.extern Os_Sys\r
\r
\r
/* \r
#include "asm_hc1x.sx"\r
#include "context.sx"\r
\r
-.extern os_sys\r
+.extern Os_Sys\r
.extern os_proc_start_extended\r
\r
#define IRQ_ENABLE() cpsie i\r
\r
Os_ArchSwapContextTo_do:\r
// Set current process\r
- sty os_sys // new (Y) --> os_sys.curr_pcb\r
+ sty Os_Sys // new (Y) --> Os_Sys.curr_pcb\r
// Restore context\r
lds PCB_STACK_CURR_P, y // new->stack.curr --> SP\r
\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
#include "internal.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "irq_types.h"\r
#include "regs.h"\r
\r
* @param vector\r
*/\r
void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {\r
- OsPcbType *pcb;\r
+ OsTaskVarType *pcb;\r
\r
- pcb = os_find_task(tid);\r
+ pcb = Os_TaskGet(tid);\r
Irq_VectorTable[vector] = (void *)pcb;\r
Irq_IsrTypeTable[vector] = PROC_ISR2;\r
\r
\r
#include "Os.h"\r
#include "internal.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"\r
#include "regs.h"\r
#include "Mcu.h"\r
*(.gnu.linkonce.b.*)\r
*(COMMON)\r
PROVIDE (_end = .);\r
- } > data AT>bank_FIX2_lma\r
+ } > data /* AT>bank_FIX2_lma */\r
__bss_size = SIZEOF(.bss);\r
PROVIDE (__bss_size = SIZEOF(.bss));\r
.eeprom :\r
#include "asm_ppc.h"\r
\r
+#if defined(__GNUC__)\r
.section ".rcw","ax"\r
+.balign 4\r
+#elif defined(__CWCC__)\r
+.section .rcw,4,"r"\r
+#endif\r
+\r
.global _resetconfiguration\r
_resetconfiguration:\r
.byte 0x00 #no watchdog\r
.long _start\r
\r
\r
+ .extern _SDA_BASE_\r
+ .extern _SDA2_BASE_\r
+ .extern __SP_INIT\r
+ .extern __DATA_RAM\r
+ .extern __DATA_END\r
+ .extern __BSS_START\r
+ .extern __BSS_END\r
+ .extern __DATA_ROM\r
+ .extern exit\r
+ .extern main\r
+ \r
.text\r
.align 4\r
\r
stw r0, 8(r3)\r
b _exit\r
\r
+__start:\r
_start:\r
// Set up the reserved registers in EABI: r1,r2 and r13\r
\r
lbz r4,0(r3)\r
#endif\r
\r
- # Clear all SRAM\r
+ /* Clear all SRAM */\r
init_RAM:\r
lis r11,0x4000 # base address of the SRAM, 64-bit word aligned\r
ori r11,r11,0 # not needed for this address but could be for others\r
li r12,640 # loop counter to get all of SRAM;\r
- # 80k/4 bytes/32 GPRs = 640\r
+ /* 80k/4 bytes/32 GPRs = 640 */\r
mtctr r12\r
\r
init_ram_loop:\r
beq skip_data\r
subi r3,r3,1\r
subi r4,r4,1\r
-1:\r
+copy_data:\r
lbzu r6,1(r3)\r
stbu r6,1(r4)\r
cmplw r4,r5\r
- bne+ 1b\r
+ bne+ copy_data\r
skip_data:\r
\r
- # Clear uninitialized data( holds both bss and sbss )\r
+ /* Clear uninitialized data( holds both bss and sbss ) */\r
lis r3,__BSS_START@h\r
ori r3,r3,__BSS_START@l\r
lis r4,__BSS_END@h\r
ori r4,r4,__BSS_END@l\r
cmplw r3,r4\r
- beq 3f\r
+ beq skip_bss\r
li r0,0\r
subi r3,r3,1\r
-2:\r
+copy_bss:\r
stbu r0,1(r3)\r
cmplw r3,r4\r
- bne+ 2b\r
-3:\r
- # Call main() with argc set to 1 and argv ignored\r
+ bne+ copy_bss\r
+skip_bss:\r
+ /* Call main() with argc set to 1 and argv ignored */\r
li r3,1\r
bl main\r
\r
- # Call exit() with the return value from main() as argument\r
+ /* Call exit() with the return value from main() as argument */\r
b exit\r
\r
.globl _exit\r
#include "Det.h"\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
+#include "arc.h"\r
#endif\r
\r
\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
#include "Can.h"\r
\r
#ifndef USE_CAN_STUB\r
#include <string.h>\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
+#include "arc.h"\r
#endif\r
\r
\r
\r
#define GET_CONTROLLER_CNT() (CAN_CONTROLLER_CNT)\r
\r
+#if 0\r
+#define _INSTALL_HANDLER(_can_entry, _unique, _vector,_priority,_app ) \\r
+ do { \\r
+ const OsIsrConstType _can_entry ## _unique = { \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_2, \\r
+ .priority = _priority, \\r
+ .entry = _can_entry, \\r
+ .name = "Can", \\r
+ .resourceMask = 0, \\r
+ .timingProtPtr = NULL, \\r
+ .appOwner = _app, \\r
+ }; \\r
+ Os_IsrAdd( & _can_entry ## _unique); \\r
+ } while(0);\r
+#endif\r
+\r
+#define INSTALL_HANDLER4(_name,_can_entry, _vector,_priority,_app)\\r
+ ISR_INSTALL_ISR2(_name,_can_entry, _vector+0,_priority,_app) \\r
+ ISR_INSTALL_ISR2(_name,_can_entry, _vector+1,_priority,_app) \\r
+ ISR_INSTALL_ISR2(_name,_can_entry, _vector+2,_priority,_app) \\r
+ ISR_INSTALL_ISR2(_name,_can_entry, _vector+3,_priority,_app)\r
+\r
+#define INSTALL_HANDLER16(_name,_can_entry, _vector,_priority,_app)\\r
+ INSTALL_HANDLER4(_name,_can_entry, _vector+0,_priority,_app) \\r
+ INSTALL_HANDLER4(_name,_can_entry, _vector+4,_priority,_app) \\r
+ INSTALL_HANDLER4(_name,_can_entry, _vector+8,_priority,_app) \\r
+ INSTALL_HANDLER4(_name,_can_entry, _vector+12,_priority,_app)\r
+\r
+\r
//-------------------------------------------------------------------\r
\r
#if ( CAN_DEV_ERROR_DETECT == STD_ON )\r
\r
} Can_UnitType;\r
\r
-#if defined(CFG_MPC5567)\r
-Can_UnitType CanUnit[CAN_CONTROLLER_CNT] =\r
-{\r
- {\r
- .state = CANIF_CS_UNINIT,\r
- },{\r
- .state = CANIF_CS_UNINIT,\r
- },{\r
- .state = CANIF_CS_UNINIT,\r
- },{\r
- .state = CANIF_CS_UNINIT,\r
- },{\r
- .state = CANIF_CS_UNINIT,\r
- },\r
-};\r
-#else\r
Can_UnitType CanUnit[CAN_CONTROLLER_CNT] =\r
{\r
{\r
.state = CANIF_CS_UNINIT,\r
},{\r
.state = CANIF_CS_UNINIT,\r
- },{\r
+ }\r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
+ ,{\r
.state = CANIF_CS_UNINIT,\r
}\r
-};\r
#endif\r
+};\r
\r
//-------------------------------------------------------------------\r
\r
void Can_C_Isr( void ) { Can_Isr(CAN_CTRL_C); }\r
void Can_D_Isr( void ) { Can_Isr(CAN_CTRL_D); }\r
void Can_E_Isr( void ) { Can_Isr(CAN_CTRL_E); }\r
-#if defined(CFG_MPC5567)\r
-#else\r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
void Can_F_Isr( void ) { Can_Isr(CAN_CTRL_F); }\r
#endif\r
\r
void Can_C_Err( void ) { Can_Err(CAN_CTRL_C); }\r
void Can_D_Err( void ) { Can_Err(CAN_CTRL_D); }\r
void Can_E_Err( void ) { Can_Err(CAN_CTRL_E); }\r
-#if defined(CFG_MPC5567)\r
-#else\r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
void Can_F_Err( void ) { Can_Err(CAN_CTRL_F); }\r
#endif\r
\r
void Can_C_BusOff( void ) { Can_BusOff(CAN_CTRL_C); }\r
void Can_D_BusOff( void ) { Can_BusOff(CAN_CTRL_D); }\r
void Can_E_BusOff( void ) { Can_BusOff(CAN_CTRL_E); }\r
-#if defined(CFG_MPC5567)\r
-#else\r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
void Can_F_BusOff( void ) { Can_BusOff(CAN_CTRL_F); }\r
#endif\r
//-------------------------------------------------------------------\r
}\r
\r
if (canHwConfig->Can_Arc_Fifo) {\r
+ /*\r
+ * NOTE!!!\r
+ * Do not enable RxFIFO. See [Freescale Device Errata MPC5510ACE, Rev. 10 APR 2009, errata ID: 14593].\r
+ */\r
+ \r
/* Note\r
* NOT tested at all\r
*/\r
}\r
}\r
\r
+\r
//-------------------------------------------------------------------\r
\r
-#if defined(USE_KERNEL)\r
-#define INSTALL_HANDLERS( _can_name,_boff,_err,_start,_stop) \\r
- do { \\r
- TaskType tid; \\r
- tid = Os_Arc_CreateIsr(_can_name ## _BusOff,2/*prio*/,"Can"); \\r
- Irq_AttachIsr2(tid,NULL,_boff); \\r
- tid = Os_Arc_CreateIsr(_can_name ## _Err,2/*prio*/,"Can"); \\r
- Irq_AttachIsr2(tid,NULL,_err); \\r
- for(i=_start;i<=_stop;i++) { \\r
- tid = Os_Arc_CreateIsr(_can_name ## _Isr,2/*prio*/,"Can"); \\r
- Irq_AttachIsr2(tid,NULL,i); \\r
- } \\r
- } while(0);\r
-#else\r
-#define INSTALL_HANDLERS( _can_name,_boff,_err,_start,_stop) \\r
- Irq_InstallVector(_can_name ## _BusOff, _boff, 1, CPU_Z1); \\r
- Irq_InstallVector(_can_name ## _Err, _err, 1, CPU_Z1); \\r
- for(i=_start;i<=_stop;i++) { \\r
- Irq_InstallVector(_can_name ## _Isr, i, 1, CPU_Z1); \\r
- }\r
-#endif\r
\r
// This initiates ALL can controllers\r
void Can_Init( const Can_ConfigType *config ) {\r
}\r
} while (!hoh->Can_Arc_EOL);\r
\r
+\r
+\r
// Note!\r
// Could install handlers depending on HW objects to trap more errors\r
// in configuration\r
-#if defined(CFG_MPC5567)\r
switch( canHwConfig->CanControllerId ) {\r
case CAN_CTRL_A:\r
- INSTALL_HANDLERS(Can_A, FLEXCAN_A_ESR_BOFF_INT, FLEXCAN_A_ESR_ERR_INT, FLEXCAN_A_IFLAG1_BUF0I, FLEXCAN_A_IFLAG1_BUF31_16I); break;\r
+ ISR_INSTALL_ISR2( "Can", Can_A_BusOff, FLEXCAN_A_ESR_BOFF_INT, 2, 0);\r
+ ISR_INSTALL_ISR2( "Can", Can_A_Err, FLEXCAN_A_ESR_ERR_INT, 2, 0 );\r
+ INSTALL_HANDLER16( "Can", Can_A_Isr, FLEXCAN_A_IFLAG1_BUF0I, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_A_Isr, FLEXCAN_A_IFLAG1_BUF31_16I, 2, 0 );\r
+ break;\r
case CAN_CTRL_B:\r
- INSTALL_HANDLERS(Can_B, FLEXCAN_B_ESR_BOFF_INT, FLEXCAN_B_ESR_ERR_INT, FLEXCAN_B_IFLAG1_BUF0I, FLEXCAN_B_IFLAG1_BUF31_16I); break;\r
+ ISR_INSTALL_ISR2( "Can", Can_B_BusOff, FLEXCAN_B_ESR_BOFF_INT, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_B_Err, FLEXCAN_B_ESR_ERR_INT, 2, 0 );\r
+ INSTALL_HANDLER16( "Can", Can_B_Isr, FLEXCAN_B_IFLAG1_BUF0I, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_B_Isr, FLEXCAN_B_IFLAG1_BUF31_16I, 2, 0 );\r
+ break;\r
case CAN_CTRL_C:\r
- INSTALL_HANDLERS(Can_C, FLEXCAN_C_ESR_BOFF_INT, FLEXCAN_C_ESR_ERR_INT, FLEXCAN_C_IFLAG1_BUF0I, FLEXCAN_C_IFLAG1_BUF31_16I); break;\r
+ ISR_INSTALL_ISR2( "Can", Can_C_BusOff, FLEXCAN_C_ESR_BOFF_INT, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_C_Err, FLEXCAN_C_ESR_ERR_INT, 2, 0 );\r
+ INSTALL_HANDLER16( "Can", Can_C_Isr, FLEXCAN_C_IFLAG1_BUF0I, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_C_Isr, FLEXCAN_C_IFLAG1_BUF31_16I, 2, 0 );\r
+ break;\r
case CAN_CTRL_D:\r
- INSTALL_HANDLERS(Can_D, FLEXCAN_D_ESR_BOFF_INT, FLEXCAN_D_ESR_ERR_INT, FLEXCAN_D_IFLAG1_BUF0I, FLEXCAN_D_IFLAG1_BUF31_16I); break;\r
+ ISR_INSTALL_ISR2( "Can", Can_D_BusOff, FLEXCAN_D_ESR_BOFF_INT, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_D_Err, FLEXCAN_D_ESR_ERR_INT, 2, 0 );\r
+ INSTALL_HANDLER16( "Can", Can_D_Isr, FLEXCAN_D_IFLAG1_BUF0I, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_D_Isr, FLEXCAN_D_IFLAG1_BUF31_16I, 2, 0 );\r
+ break;\r
case CAN_CTRL_E:\r
- INSTALL_HANDLERS(Can_E, FLEXCAN_E_ESR_BOFF_INT, FLEXCAN_E_ESR_ERR_INT, FLEXCAN_E_IFLAG1_BUF0I, FLEXCAN_E_IFLAG1_BUF31_16I); break;\r
- default:\r
- assert(0);\r
- }\r
-#else\r
- switch( canHwConfig->CanControllerId ) {\r
- case CAN_CTRL_A:\r
- INSTALL_HANDLERS(Can_A, FLEXCAN_A_ESR_BOFF_INT, FLEXCAN_A_ESR_ERR_INT, FLEXCAN_A_IFLAG1_BUF0I, FLEXCAN_A_IFLAG1_BUF31_16I); break;\r
- case CAN_CTRL_B:\r
- INSTALL_HANDLERS(Can_B, FLEXCAN_B_ESR_BOFF_INT, FLEXCAN_B_ESR_ERR_INT, FLEXCAN_B_IFLAG1_BUF0I, FLEXCAN_B_IFLAG1_BUF31_16I); break;\r
- case CAN_CTRL_C:\r
- INSTALL_HANDLERS(Can_C, FLEXCAN_C_ESR_BOFF_INT, FLEXCAN_C_ESR_ERR_INT, FLEXCAN_C_IFLAG1_BUF0I, FLEXCAN_C_IFLAG1_BUF31_16I); break;\r
- case CAN_CTRL_D:\r
- INSTALL_HANDLERS(Can_D, FLEXCAN_D_ESR_BOFF_INT, FLEXCAN_D_ESR_ERR_INT, FLEXCAN_D_IFLAG1_BUF0I, FLEXCAN_D_IFLAG1_BUF31_16I); break;\r
- case CAN_CTRL_E:\r
- INSTALL_HANDLERS(Can_E, FLEXCAN_E_ESR_BOFF_INT, FLEXCAN_E_ESR_ERR_INT, FLEXCAN_E_IFLAG1_BUF0I, FLEXCAN_E_IFLAG1_BUF31_16I); break;\r
+ ISR_INSTALL_ISR2( "Can", Can_E_BusOff, FLEXCAN_E_ESR_BOFF_INT, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_E_Err, FLEXCAN_E_ESR_ERR_INT, 2, 0 );\r
+ INSTALL_HANDLER16( "Can", Can_E_Isr, FLEXCAN_E_IFLAG1_BUF0I, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_E_Isr, FLEXCAN_E_IFLAG1_BUF31_16I, 2, 0 );\r
+ break;\r
+#if defined(CFG_MPC5516) || defined(CFG_MPC5517)\r
case CAN_CTRL_F:\r
- INSTALL_HANDLERS(Can_F, FLEXCAN_F_ESR_BOFF_INT, FLEXCAN_F_ESR_ERR_INT, FLEXCAN_F_IFLAG1_BUF0I, FLEXCAN_F_IFLAG1_BUF31_16I); break;\r
+ ISR_INSTALL_ISR2( "Can", Can_F_BusOff, FLEXCAN_F_ESR_BOFF_INT, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_F_Err, FLEXCAN_F_ESR_ERR_INT, 2, 0 );\r
+ INSTALL_HANDLER16( "Can", Can_F_Isr, FLEXCAN_F_IFLAG1_BUF0I, 2, 0 );\r
+ ISR_INSTALL_ISR2( "Can", Can_F_Isr, FLEXCAN_F_IFLAG1_BUF31_16I, 2, 0 );\r
+ break;\r
+#endif\r
default:\r
assert(0);\r
}\r
-#endif\r
}\r
return;\r
}\r
canUnit->state = CANIF_CS_STARTED;\r
imask_t state = McuE_EnterCriticalSection();\r
if (canUnit->lock_cnt == 0) // REQ CAN196\r
+ {\r
Can_EnableControllerInterrupts(controller);\r
+ }\r
McuE_ExitCriticalSection(state);\r
break;\r
case CAN_T_WAKEUP: //CAN267\r
{\r
Dio_LevelType level;\r
VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);\r
- // Read level from SIU.\r
- if (SIU.GPDI [channelId].R)\r
- {\r
- level = STD_HIGH;\r
- } else\r
- {\r
- level = STD_LOW;\r
+ if (SIU.PCR[channelId].B.IBE) {\r
+ // Read level from SIU.\r
+ if (SIU.GPDI [channelId].R) {\r
+ level = STD_HIGH;\r
+ } else {\r
+ level = STD_LOW;\r
+ }\r
+ } else if(SIU.PCR[channelId].B.OBE) {\r
+ // Read level from SIU.\r
+ if (SIU.GPDO [channelId].R) {\r
+ level = STD_HIGH;\r
+ } else {\r
+ level = STD_LOW;\r
+ }\r
}\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
{\r
VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
// Write level to SIU.\r
- SIU.GPDO [channelId].R = level;\r
- cleanup: return;\r
+ if(SIU.PCR[channelId].B.OBE) {\r
+ SIU.GPDO [channelId].R = level;\r
+ }\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
vuint16_t *ptr = (vuint16_t *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
#endif\r
level = ptr[portId]; // Read the bit pattern (16bits) to the port\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
vuint16_t *ptr = (vuint16_t *)&SIU.PGPDO0; // The GPDO 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
#endif\r
ptr[portId] = level; // Write the bit pattern (16bits) to the port\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_PortLevelType Dio_ReadChannelGroup(\r
\r
// Shift down\r
level<<=channelGroupIdPtr->offset;\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
// Build the 32 bits Mask_Valule, and write to masked output register\r
ptr[channelGroupIdPtr->port] = (channelGroupIdPtr->mask << 16)&((level\r
<<channelGroupIdPtr->offset)|0xFFFF);\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
#else\r
return;\r
#endif\r
}\r
}\r
\r
-struct tcd_t * Dma_GetTcd( Dma_ChannelType channel ) {\r
+volatile struct tcd_t * Dma_GetTcd( Dma_ChannelType channel ) {\r
return &EDMA.TCD[channel];\r
}\r
\r
void Dma_StartChannel (Dma_ChannelType channel);\r
void Dma_StopChannel (Dma_ChannelType channel);\r
Std_ReturnType Dma_ChannelDone (Dma_ChannelType channel);\r
-struct tcd_t * Dma_GetTcd( Dma_ChannelType channel );\r
+volatile struct tcd_t * Dma_GetTcd( Dma_ChannelType channel );\r
boolean Dma_CheckConfig( void );\r
\r
#endif /* DMA_H_ */\r
#if ( EEP_DEV_ERROR_DETECT == STD_ON ) // Report DEV errors\r
#define VALIDATE(_exp,_api,_err ) \\r
if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_GPT,0,_api,_err); \\r
+ Det_ReportError(MODULE_ID_EEP,0,_api,_err); \\r
return; \\r
}\r
\r
#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \\r
if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_GPT,0,_api,_err); \\r
+ Det_ReportError(MODULE_ID_EEP,0,_api,_err); \\r
return (_rv); \\r
}\r
\r
Eep_Arc_JobType mainState;\r
Spi_SequenceType currSeq;\r
uint32 chunkSize;\r
+ uint32 pageSize;
} Eep_JobInfoType;\r
\r
#define JOB_SET_STATE(_x,_y) job->state=(_x);job->mainState=(_y)\r
\r
} Eep_GlobalType;\r
\r
-#if 0\r
+#if 0 // Use SPI synchronous transmit
#define SPI_TRANSMIT_FUNC(_x) Spi_SyncTransmit(_x)\r
-#else\r
+#else // Use SPI asynchronous transmit
#define SPI_TRANSMIT_FUNC(_x,_y) Eep_AsyncTransmit(_x,_y)\r
\r
Std_ReturnType Eep_AsyncTransmit(Spi_SequenceType Sequence,Eep_JobInfoType *job) {\r
Eep_Global.status = MEMIF_IDLE;\r
Eep_Global.jobResultType = MEMIF_JOB_OK;\r
\r
+ Eep_SetMode( CFG_P()->EepDefaultMode );
+
}\r
\r
\r
job->chunkSize = Eep_Global.config->EepNormalWriteBlockSize;\r
}\r
\r
+ job->pageSize = Eep_Global.config->EepPageSize;
job->eepAddr = EepromAddress;\r
job->targetAddr = (uint8 *)DataBufferPtr;\r
job->left = Length;\r
job->chunkSize = Eep_Global.config->EepNormalReadBlockSize;\r
}\r
\r
+ job->pageSize = Eep_Global.config->EepPageSize; // Not relevant to compare/read operations, but set anyways.
job->eepAddr = EepromAddress;\r
job->targetAddr = TargetAddressPtr;\r
job->left = Length;\r
}\r
\r
\r
-void Eep_Cancel( void ){\r
- EEP_JOB_END_NOTIFICATION();\r
+void Eep_Cancel( void ) {
+ EEP_JOB_ERROR_NOTIFICATION();
\r
if (MEMIF_JOB_PENDING==Eep_Global.jobResultType) {\r
Eep_Global.jobResultType=MEMIF_JOB_CANCELLED;\r
static Spi_SeqResultType Eep_ProcessJob( Eep_JobInfoType *job ) {\r
Spi_SeqResultType rv;\r
_Bool done = 0;\r
+ uint32 chunkSize = 0;
+ uint32 sizeLeftInPage = 0;
\r
/* Check if previous sequence is OK */\r
rv = Spi_GetSequenceResult(job->currSeq);\r
/* Check status from erase cmd, read status from flash */\r
Spi_SetupEB( CFG_P()->EepDataChannel, NULL, &Eep_Global.ebReadStatus, 1);\r
Eep_Global.ebCmd = E2_RDSR;\r
- if( SPI_TRANSMIT_FUNC(CFG_P()->EepCmd2Sequence,job ) != E_OK ) {\r
- assert(0);\r
+ if( SPI_TRANSMIT_FUNC(CFG_P()->EepCmd2Sequence,job ) == E_OK )
+ {
+ SET_STATE(1,JOB_READ_STATUS_RESULT);
+ }
+ else
+ {
+ SET_STATE(1,JOB_READ_STATUS);
}\r
- SET_STATE(1,JOB_READ_STATUS_RESULT);\r
break;\r
\r
case JOB_READ_STATUS_RESULT:\r
DEBUG(DEBUG_LOW,"%s: READ_STATUS_RESULT\n",MODULE_NAME);\r
- if( Eep_Global.ebReadStatus&1 ) {\r
+ if( Eep_Global.ebReadStatus & 1 ) {\r
SET_STATE(0,JOB_READ_STATUS);\r
} else {\r
SET_STATE(0,JOB_MAIN);\r
break;\r
\r
case JOB_MAIN:\r
- if( job->left != 0 ) {\r
- if( job->left <= job->chunkSize ) {\r
- job->chunkSize = job->left;\r
+ if( job->left > 0 ) {
+ if( job->left <= job->chunkSize ) {
+ chunkSize = job->left;
+ } else {
+ chunkSize = job->chunkSize;
}\r
\r
Spi_ConvertToSpiAddr(Eep_Global.ebE2Addr,job->eepAddr);\r
\r
- switch(job->mainState) {\r
+ BOOL spiTransmitOK = FALSE;
\r
+ switch(job->mainState)
+ {
case EEP_ERASE:\r
/* NOT USED */\r
break;\r
case EEP_READ:\r
case EEP_COMPARE:\r
- DEBUG(DEBUG_LOW,"%s: READ s:%04x d:%04x l:%04x\n",MODULE_NAME,job->eepAddr, job->targetAddr, job->left);\r
+ DEBUG(DEBUG_LOW,"%s: READ s:%04x d:%04x l:%04x\n",MODULE_NAME,job->eepAddr, job->targetAddr, job->left);\r
Eep_Global.ebCmd = E2_READ;\r
- Spi_SetupEB( CFG_P()->EepDataChannel, NULL ,job->targetAddr,job->chunkSize);\r
- SPI_TRANSMIT_FUNC(CFG_P()->EepReadSequence,job );\r
+ Spi_SetupEB( CFG_P()->EepDataChannel, NULL ,(Spi_DataType*)job->targetAddr,chunkSize);
+ if (SPI_TRANSMIT_FUNC(CFG_P()->EepReadSequence,job) == E_OK) {
+ spiTransmitOK = TRUE;
+ }
break;\r
\r
case EEP_WRITE:\r
DEBUG(DEBUG_LOW,"%s: WRITE d:%04x s:%04x first data:%02x\n",MODULE_NAME,job->eepAddr,job->targetAddr,*job->targetAddr);\r
+
+ // Calculate how much space there is left in the current EEPROM page.
+ sizeLeftInPage = job->pageSize - (job->eepAddr % job->pageSize);
+
+ // Handle EEPROM page boundaries, i.e. make sure that we limit the chunk
+ // size so we don't write over the page boundary.
+ if (chunkSize > sizeLeftInPage) {\r
+ chunkSize = sizeLeftInPage;
+ } else {
+ // Do nothing since the size of the chunk to write is less than the
+ // available space left in the page.
+ }
+
Eep_Global.ebCmd = E2_WRITE;\r
Spi_ConvertToSpiAddr(Eep_Global.ebE2Addr,job->eepAddr);\r
- Spi_SetupEB( CFG_P()->EepDataChannel, job->targetAddr, NULL, job->chunkSize);\r
- SPI_TRANSMIT_FUNC(CFG_P()->EepWriteSequence,job );\r
+ Spi_SetupEB( CFG_P()->EepDataChannel, (const Spi_DataType*)job->targetAddr, NULL, chunkSize);
+ if (SPI_TRANSMIT_FUNC(CFG_P()->EepWriteSequence,job ) == E_OK) {
+ spiTransmitOK = TRUE;
+ }
break;\r
\r
default:\r
break;\r
}\r
\r
- job->eepAddr += job->chunkSize;\r
- job->targetAddr += job->chunkSize;\r
- job->left -= job->chunkSize;\r
- SET_STATE(1,JOB_READ_STATUS);\r
+ if (spiTransmitOK) {
+ job->eepAddr += chunkSize;
+ job->targetAddr += chunkSize;
+ job->left -= chunkSize;
+
+ SET_STATE(1,JOB_READ_STATUS);\r
+ } else {
+ SET_STATE(1,JOB_MAIN);
+ }
\r
} else {\r
/* We are done :) */\r
readJob.targetAddr = Eep_CompareBuffer;\r
} else {\r
// all other cases are bad\r
- firstTime = 1;\r
- Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Eep_Global.jobType = EEP_NONE;\r
- Eep_Global.status = MEMIF_IDLE;\r
+ firstTime = 1;\r
+ Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
+ Eep_Global.jobType = EEP_NONE;\r
+ Eep_Global.status = MEMIF_IDLE;\r
\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_COMPARE_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_COMPARE_ID, MEMIF_JOB_FAILED );
EEP_JOB_ERROR_NOTIFICATION();\r
}\r
}\r
Eep_Global.jobResultType = MEMIF_JOB_OK;\r
Eep_Global.jobType = EEP_NONE;\r
Eep_Global.status = MEMIF_IDLE;\r
- EEP_JOB_END_NOTIFICATION();\r
- } else if( jobResult == SPI_SEQ_PENDING ) {\r
- /* Busy, Do nothing */\r
- } else {\r
- // Error\r
- Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Eep_Global.jobType = EEP_NONE;\r
- Eep_Global.status = MEMIF_IDLE;\r
-\r
- switch(Eep_Global.jobType) {\r
- case EEP_ERASE:\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ EEP_JOB_END_NOTIFICATION();\r
+ } else if( jobResult == SPI_SEQ_PENDING ) {\r
+ /* Busy, Do nothing */\r
+ } else {\r
+ // Error\r
+\r
+ Eep_EcoreJobType failedJobType = Eep_Global.jobType;
+
+ Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
+ Eep_Global.jobType = EEP_NONE;\r
+ Eep_Global.status = MEMIF_IDLE;\r
+\r
+ switch(failedJobType) {
+ case EEP_ERASE:\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_ERASE_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_ERASE_ID, MEMIF_JOB_FAILED );
break;\r
- case EEP_READ:\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ case EEP_READ:\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_READ_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_READ_ID, MEMIF_JOB_FAILED );
break;\r
- case EEP_WRITE:\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ case EEP_WRITE:\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_WRITE_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_WRITE_ID, MEMIF_JOB_FAILED );
break;\r
- default:\r
- assert(0);\r
+ default:\r
+ assert(0);\r
}\r
\r
EEP_JOB_ERROR_NOTIFICATION();\r
#define SHADOW_ROW_SIZE 0x00008000\r
#define FLASH_PAGE_SIZE H7FB_PAGE_SIZE\r
\r
+#define FLASH_TOTAL_BLOCKS ( 20 )\r
+\r
#if 0\r
#define VFLAGS_ADDR_SECT (1<<0)\r
#define VFLAGS_ADDR_PAGE (1<<1)\r
}\r
\r
#define FLS_VALIDATE_PARAM_DATA_W_RV(_ptr,_api, _rv) \\r
- if( (_ptr)==((void *)0)) { \\r
+ if(( (uint32)(_ptr)%FLS_READ_PAGE_SIZE != 0 ) || ( (_ptr)==((void *)0))) { \
Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_DATA); \\r
return _rv; \\r
}\r
endBlock = address_to_block( addr + size - 1,&rem );\r
\r
// Check so our implementation holds..\r
- assert( endBlock<=32 );\r
+ assert( endBlock <= FLASH_TOTAL_BLOCKS );\r
\r
#define BLOCK_MASK 0x0003ffffUL\r
\r
\r
\r
// shift things in to make freescale driver happy\r
- eraseBlocks->lowEnabledBlocks = mask&0x3f; // ????\r
- eraseBlocks->midEnabledBlocks = (mask>>10)&3; // ????\r
- eraseBlocks->highEnabledBlocks = mask>>12;\r
+ eraseBlocks->lowEnabledBlocks = mask&0x3ff; // Bits 0..9 indicats low blocks
+ eraseBlocks->midEnabledBlocks = (mask>>10)&3; // Bits 10..11 indicats mid blocks
+ eraseBlocks->highEnabledBlocks = mask>>12; // Bits 12..19 indicats high blocks
\r
\r
return ;\r
Std_ReturnType Fls_Erase( Fls_AddressType TargetAddress,\r
Fls_LengthType Length )\r
{\r
- uint32 block;\r
- uint32 sBlock;\r
+ uint32 endBlock;\r
+ uint32 startBlock;\r
uint32 rem;\r
Fls_EraseBlockType eraseBlock;\r
Fls_EraseInfoType eraseInfo;\r
return E_NOT_OK;\r
\r
// TargetAddress\r
- sBlock = address_to_block(TargetAddress,&rem);\r
+ startBlock = address_to_block(TargetAddress,&rem);\r
\r
- if( (sBlock == (-1)) || (rem!=0) ) {\r
+ if( (startBlock == (-1)) || (rem!=0) ) {\r
DET_REPORTERROR(MODULE_ID_FLS,0,0x0,FLS_E_PARAM_ADDRESS );\r
return E_NOT_OK;\r
}\r
\r
- block = address_to_block(TargetAddress+Length,&rem);\r
+ endBlock = address_to_block(TargetAddress+Length,&rem);\r
\r
// Check if we trying to erase a partition that we are executing in\r
pc = Fls_GetPc();\r
uint32 pcBlock = address_to_block(pc,&rem);\r
uint8 *partMap = Fls_Global.config->FlsBlockToPartitionMap;\r
\r
- if( (partMap[pcBlock] >= partMap[sBlock]) && (partMap[pcBlock] <= partMap[block]) ) {\r
-// if( address_to_block(pc,&rem) == Fls_Global.config->FlsBlockToPartitionMap[block] ) {\r
+ if( (partMap[pcBlock] >= partMap[startBlock]) && (partMap[pcBlock] <= partMap[endBlock]) ) {\r
// Can't erase and in the same partition we are executing\r
assert(0);\r
}\r
memcpy(VersioninfoPtr, &_Fls_VersionInfo, sizeof(Std_VersionInfoType));\r
}\r
\r
+void Fls_Check( uint32 flsBaseAddress, uint32 flsTotalSize )\r
+{\r
+ // ECC checking is always on by default.\r
+ // If a non correctable error is discovered\r
+ // we will get an IVOR2 exception.\r
+\r
+ // Enable Flash Non_Correctible Reporting,\r
+ // Not really necessary but makes more information\r
+ // available in the MCM registers if an error occurs.\r
+ MCM.ECR.B.EFNCR = 1;\r
+\r
+ // Read flash in 32bit chunks, it's most efficient.\r
+ uint32* memoryChunkPtr = (uint32*)flsBaseAddress;\r
+ uint32* flsTotalSizePtr = (uint32*)flsTotalSize;\r
+ uint32 memoryChunk = *memoryChunkPtr; // The first read\r
+\r
+ // Read the rest of the flash, chunk by chunk\r
+ while(memoryChunkPtr < flsTotalSizePtr)\r
+ {\r
+ memoryChunk=*(memoryChunkPtr++);\r
+ }\r
+}\r
\r
\r
returnCode = Fls_H7F_ProgramStatus(pSSDConfig,pInfo);\r
break;\r
default:\r
+ returnCode = 0;\r
assert(0);\r
break;\r
}\r
#include "Det.h"\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#endif\r
\r
// Implementation specific\r
\r
//-------------------------------------------------------------------\r
\r
-\r
-/**\r
- * ISR helper-function that handles the HW channels( 0 to 8 )\r
- *\r
- * @param channel - Channel that the raised the interrupt\r
+/*\r
+ * ISR for a given PIT channel (macro)\r
*/\r
-\r
-static void Gpt_IsrCh(Gpt_ChannelType channel)\r
-{\r
- const Gpt_ConfigType *config;\r
- int confCh;\r
-\r
- confCh = Gpt_Global.channelMap[channel];\r
- assert(confCh != GPT_CHANNEL_ILL);\r
-\r
- config = &Gpt_Global.config[confCh];\r
-\r
- if (config->GptChannelMode == GPT_MODE_ONESHOT)\r
- {\r
- // Disable the channel\r
- PIT.EN.R &= ~(1<<channel);\r
-\r
- Gpt_Unit[channel].state = GPT_STATE_STOPPED;\r
+#define GPT_ISR( _channel ) \\r
+ static void Gpt_Isr_Channel##_channel( void ) \\r
+ { \\r
+ const Gpt_ConfigType *config; \\r
+ int confCh; \\r
+ \\r
+ /* Find the config entry for the PIT channel. */ \\r
+ confCh = Gpt_Global.channelMap[ _channel ]; \\r
+ assert(confCh != GPT_CHANNEL_ILL); \\r
+ config = &Gpt_Global.config[ confCh ]; \\r
+ \\r
+ if( config->GptChannelMode == GPT_MODE_ONESHOT ) \\r
+ { \\r
+ /* Disable the channel. */ \\r
+ PIT.EN.R &= ~( 1 << _channel ); \\r
+ \\r
+ Gpt_Unit[_channel].state = GPT_STATE_STOPPED; \\r
+ } \\r
+ config->GptNotification(); \\r
+ \\r
+ /* Clear interrupt. */ \\r
+ PIT.FLG.R = ( 1 << _channel ); \\r
}\r
- config->GptNotification();\r
\r
- // Clear interrupt\r
- PIT.FLG.R = (1<<channel); // Added by Mattias 2009-01\r
-}\r
-\r
-//-------------------------------------------------------------------\r
-// Macro that counts leading zeroes.\r
-#define CNTLZW_INV(x) (31-cntlzw(x))\r
+#define STR__(x) #x\r
+#define XSTR__(x) STR__(x)\r
\r
-/**\r
- * ISR that handles all interrupts to the PIT channels\r
- * ( NOT the decrementer )\r
+/*\r
+ * Create instances of the ISR for each PIT channel.\r
*/\r
-\r
-static void Gpt_Isr(void)\r
-{\r
- uint32 flgMask= PIT.FLG.R;\r
- uint8 chNr = 0;\r
-\r
- // Loop over all interrupts\r
- for (; flgMask; flgMask&=~(1<<chNr))\r
- {\r
- // Find first channel that is requesting service.\r
- chNr = CNTLZW_INV(flgMask);\r
- Gpt_IsrCh(chNr);\r
- // Clear interrupt\r
- PIT.FLG.R = (1<<chNr);\r
- }\r
+GPT_ISR( 0 );\r
+GPT_ISR( 1 );\r
+GPT_ISR( 2 );\r
+GPT_ISR( 3 );\r
+GPT_ISR( 4 );\r
+GPT_ISR( 5 );\r
+GPT_ISR( 6 );\r
+GPT_ISR( 7 );\r
+GPT_ISR( 8 );\r
+\r
+#define GPT_ISR_INSTALL( _channel, _prio ) \\r
+{ \\r
+ TaskType tid; \\r
+ tid = Os_Arc_CreateIsr(Gpt_Isr_Channel##_channel, _prio, XSTR__(Gpt_##_channel)); \\r
+ Irq_AttachIsr2(tid, NULL, PIT_PITFLG_RTIF + _channel); \\r
}\r
\r
//-------------------------------------------------------------------\r
{\r
if (cfg->GptNotification != NULL)\r
{\r
-\r
-#if defined(USE_KERNEL)\r
- TaskType tid;\r
- tid = Os_Arc_CreateIsr(Gpt_Isr, 2, "Gpt_Isr");\r
- Irq_AttachIsr2(tid, NULL, PIT_PITFLG_RTIF + ch);\r
-#else\r
- IntCtrl_InstallVector(Gpt_Isr, PIT_PITFLG_RTIF + ch, 1, CPU_Z1);\r
-#endif\r
+ switch( ch )\r
+ {\r
+ case 0: GPT_ISR_INSTALL( 0, cfg->GptNotificationPriority ); break;\r
+ case 1: GPT_ISR_INSTALL( 1, cfg->GptNotificationPriority ); break;\r
+ case 2: GPT_ISR_INSTALL( 2, cfg->GptNotificationPriority ); break;\r
+ case 3: GPT_ISR_INSTALL( 3, cfg->GptNotificationPriority ); break;\r
+ case 4: GPT_ISR_INSTALL( 4, cfg->GptNotificationPriority ); break;\r
+ case 5: GPT_ISR_INSTALL( 5, cfg->GptNotificationPriority ); break;\r
+ case 6: GPT_ISR_INSTALL( 6, cfg->GptNotificationPriority ); break;\r
+ case 7: GPT_ISR_INSTALL( 7, cfg->GptNotificationPriority ); break;\r
+ case 8: GPT_ISR_INSTALL( 8, cfg->GptNotificationPriority ); break;\r
+ default:\r
+ {\r
+ // Unknown PIT channel.\r
+ assert( 0 );\r
+ break;\r
+ }\r
+ }\r
}\r
}\r
#if defined(USE_KERNEL)\r
{\r
remaining = get_spr(SPR_DEC);\r
}\r
+ else\r
+ {\r
+ /* We have written a fault in the fault log. Return 0. */\r
+ remaining = 0;\r
+ }\r
\r
return remaining;\r
}\r
{\r
timer = get_spr(SPR_DECAR) - get_spr(SPR_DEC);\r
}\r
+ else\r
+ {\r
+ /* We have written a fault in the fault log. Return 0. */\r
+ timer = 0;\r
+ }\r
\r
return (timer);\r
}\r
#include "LinIf_Cbk.h"\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#endif\r
\r
#define ESCI(exp) (volatile struct ESCI_tag *)(0xFFFA0000 + (0x4000 * exp))\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
+/* ----------------------------[includes]------------------------------------*/\r
#include <assert.h>\r
#include <string.h>\r
#include "Std_Types.h"\r
#include "Cpu.h"\r
#include "Ramlog.h"\r
#include "Os.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
\r
-//#define USE_TRACE 1\r
+/* ----------------------------[private define]------------------------------*/\r
//#define USE_LDEBUG_PRINTF 1\r
#include "debug.h"\r
\r
#define SYSCLOCK_SELECT_PLL 0x2\r
\r
+/* ----------------------------[private macro]-------------------------------*/\r
+\r
#if defined(CFG_MPC5567)\r
#define CALC_SYSTEM_CLOCK(_extal,_emfd,_eprediv,_erfd) \\r
( (_extal) * ((_emfd)+4) / (((_eprediv)+1)*(1<<(_erfd))) )\r
( (_extal) * ((_emfd)+16) / (((_eprediv)+1)*((_erfd)+1)) )\r
#endif\r
\r
-typedef void (*vfunc_t)();\r
+/* Development error macros. */\r
+#if ( MCU_DEV_ERROR_DETECT == STD_ON )\r
+#define VALIDATE(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_MCU,0,_api,_err); \\r
+ return; \\r
+ }\r
\r
-/* Function declarations. */\r
-static void Mcu_ConfigureFlash(void);\r
+#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_MCU,0,_api,_err); \\r
+ return (_rv); \\r
+ }\r
+#else\r
+#define VALIDATE(_exp,_api,_err )\r
+#define VALIDATE_W_RV(_exp,_api,_err,_rv )\r
+#endif\r
\r
\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+typedef void (*vfunc_t)();\r
+\r
typedef struct {\r
uint32 lossOfLockCnt;\r
uint32 lossOfClockCnt;\r
\r
} Mcu_GlobalType;\r
\r
-/* Development error macros. */\r
-#if ( MCU_DEV_ERROR_DETECT == STD_ON )\r
-#define VALIDATE(_exp,_api,_err ) \\r
- if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_MCU,0,_api,_err); \\r
- return; \\r
- }\r
\r
-#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \\r
- if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_MCU,0,_api,_err); \\r
- return (_rv); \\r
- }\r
-#else\r
-#define VALIDATE(_exp,_api,_err )\r
-#define VALIDATE_W_RV(_exp,_api,_err,_rv )\r
-#endif\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+static void Mcu_ConfigureFlash(void);\r
+/* ----------------------------[private variables]---------------------------*/\r
\r
// Global config\r
Mcu_GlobalType Mcu_Global =\r
.config = &McuConfigData[0],\r
};\r
\r
-//-------------------------------------------------------------------\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
\r
-static void Mcu_LossOfLock( void ) {\r
+/**\r
+ * ISR wh\r
+ */\r
+void Mcu_LossOfLock( void ) {\r
#if defined(USE_DEM)\r
Dem_ReportErrorStatus(MCU_E_CLOCK_FAILURE, DEM_EVENT_STATUS_FAILED);\r
#endif\r
\r
+ /*\r
+ * NOTE!!!\r
+ * This interrupt may be triggered more than expected.\r
+ * If you are going to use this interrupt, see [Freescale Device Errata MPC5510ACE, Rev. 10 APR 2009, errata ID: 6764].\r
+ *\r
+ */\r
+\r
Mcu_Global.stats.lossOfLockCnt++;\r
// Clear interrupt\r
FMPLL.SYNSR.B.LOLF = 1;\r
\r
}\r
\r
-//-------------------------------------------------------------------\r
-static void Mcu_LossOfCLock( void ) {\r
+/**\r
+ *\r
+ */\r
+void Mcu_LossOfClock( void ) {\r
\r
/* Should report MCU_E_CLOCK_FAILURE with DEM here */\r
\r
}\r
\r
\r
+\r
//-------------------------------------------------------------------\r
\r
-void Mcu_Init(const Mcu_ConfigType *configPtr)\r
-{\r
- VALIDATE( ( NULL != configPtr ), MCU_INIT_SERVICE_ID, MCU_E_PARAM_CONFIG );\r
+void Mcu_Init(const Mcu_ConfigType *configPtr) {\r
+#if 0\r
+ IRQ_DECL_ISR1( "LossOfLock", PLL_SYNSR_LOLF, CPU_CORE0, 10, Mcu_LossOfLock );\r
+ IRQ_DECL_ISR1( "LossOfClock", PLL_SYNSR_LOCF, CPU_CORE0, 10, Mcu_LossOfClock );\r
+#endif\r
\r
- if( !SIMULATOR() ) {\r
- Mcu_CheckCpu();\r
- }\r
+ VALIDATE( ( NULL != configPtr ), MCU_INIT_SERVICE_ID, MCU_E_PARAM_CONFIG );\r
\r
- memset(&Mcu_Global.stats,0,sizeof(Mcu_Global.stats));\r
+ if (!SIMULATOR()) {\r
+ Mcu_CheckCpu();\r
+ }\r
\r
+ memset(&Mcu_Global.stats, 0, sizeof(Mcu_Global.stats));\r
\r
- //\r
- // Setup memories\r
- //\r
- Mcu_ConfigureFlash();\r
+ //\r
+ // Setup memories\r
+ //\r
+ Mcu_ConfigureFlash();\r
\r
- Mcu_Global.config = configPtr;\r
- Mcu_Global.initRun = 1;\r
+ Mcu_Global.config = configPtr;\r
+ Mcu_Global.initRun = 1;\r
\r
- if( Mcu_Global.config->McuClockSrcFailureNotification == TRUE ){\r
- // Enable loss of lock interrupt\r
+ if (Mcu_Global.config->McuClockSrcFailureNotification == TRUE) {\r
+ // Enable loss of lock interrupt\r
\r
- Irq_AttachIsr1(Mcu_LossOfLock, NULL, PLL_SYNSR_LOLF,10 );\r
+// IRQ_ATTACH( PLL_SYNSR_LOLF );\r
+ //Irq_Attach( &IRQ_NAME(PLL_SYNSR_LOLF) );\r
+// Irq_AttachIsr1(Mcu_LossOfLock, NULL, PLL_SYNSR_LOLF, 10);\r
#if defined(CFG_MPC5516)\r
-// FMPLL.SYNCR.B.LOCIRQ = 1; TODO: Kolla denna bortkommentering med Mårten.\r
- FMPLL.ESYNCR2.B.LOLIRQ = 1;\r
+ FMPLL.ESYNCR2.B.LOLIRQ = 1;\r
#elif defined(CFG_MPC5554) || defined(CFG_MPC5567)\r
- FMPLL.SYNCR.B.LOLIRQ = 1;\r
+ FMPLL.SYNCR.B.LOLIRQ = 1;\r
#endif\r
- Irq_AttachIsr1(Mcu_LossOfCLock, NULL, PLL_SYNSR_LOCF,10 );\r
+\r
+// IRQ_ATTACH( PLL_SYNSR_LOLF );\r
+// Irq_Attach( &IRQ_NAME(PLL_SYNSR_LOLF));\r
+// Irq_AttachIsr1(Mcu_LossOfClock, NULL, PLL_SYNSR_LOCF, 10);\r
#if defined(CFG_MPC5516)\r
-// FMPLL.SYNCR.B.LOCIRQ = 1; TODO: Kolla denna bortkommentering med Mårten.\r
- FMPLL.ESYNCR2.B.LOCIRQ = 1;\r
+ FMPLL.ESYNCR2.B.LOCIRQ = 1;\r
#elif defined(CFG_MPC5554) || defined(CFG_MPC5567)\r
- FMPLL.SYNCR.B.LOCIRQ = 1;\r
+ FMPLL.SYNCR.B.LOCIRQ = 1;\r
#endif\r
- }\r
+ }\r
}\r
//-------------------------------------------------------------------\r
\r
\r
/**\r
* Get the peripheral clock in Hz for a specific device\r
+ *\r
+ * @param type\r
+ * @return\r
*/\r
-\r
uint32_t McuE_GetPeripheralClock(McuE_PeriperalClock_t type)\r
{\r
#if defined(CFG_MPC5567)\r
+++ /dev/null
-\r
-#define _ASSEMBLER_\r
-#include "asm_ppc.h"\r
-#include "asm_book_e.h"\r
-#ifdef USE_KERNEL\r
-#include "asm_offset.h"\r
-#endif\r
-\r
-#define INTC_IACKR 0xfff48010\r
-#define INTC_EOIR 0xfff48018\r
-\r
-#define SIU_MIDR 0xfffe8004\r
-#define SIMULATOR(_reg,_inst,_label) \\r
- lis _reg, SIU_MIDR@ha; \\r
- lwz _reg, SIU_MIDR@l(_reg); \\r
- cmpwi 0,_reg,0; \\r
- _inst _label;\r
-\r
- .section .text\r
-//---------------------------------------------------------------\r
-// just a small decrementer exception to trigger soft interrupt\r
-// in the INTC( simluator addon )\r
-\r
-\r
- #define INTC_SSCIR7 0xFFF48027\r
- .global dec_exception\r
-\r
-dec_exception:\r
- stwu r3,-8(sp)\r
- stw r4,4(sp)\r
-\r
- # ack dec int\r
- lis r3,0x0800\r
- mtspr SPR_TSR,r3\r
-\r
- # Set soft int\r
- li r4,2\r
- lis r3, INTC_SSCIR7@ha\r
- stb r4, INTC_SSCIR7@l(r3)\r
-\r
- lwz r3,0(sp)\r
- lwz r4,4(sp)\r
- addi sp,sp,8\r
- rfi\r
-\r
-\r
-EXCEPTION_CSRRx(exception_IVOR0,320) //#CRITICAL_INPUT_EXCEPTION\r
-EXCEPTION_CSRRx(exception_IVOR1,321) //#MACHINE_CHECK_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR2,322) //#DATA_STORAGE_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR3,323) //#INSTRUCTION_STORAGE_EXCEPTION\r
-// IVOR4, defined elsewhere\r
-EXCEPTION_SRRx(exception_IVOR5,325) //#ALIGNMENT_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR6,326) //#PROGRAM_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR7,327) //#FLOATING_POINT_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR8,328) //#SYSTEM_CALL_EXCEPTION)\r
-EXCEPTION_SRRx(exception_IVOR9,329)\r
-// IVOR10, defined elsewhere\r
-EXCEPTION_SRRx(exception_IVOR11,331) //#FIXED_INTERVAL_TIMER_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR12,332) //#WATCHDOG_TIMER_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR13,333) //#DATA_TLB_EXCEPTION\r
-EXCEPTION_SRRx(exception_IVOR14,334) //#INSTRUCTION_TLB_EXCEPTION\r
-\r
-\r
-//\r
-// EXC_FRAME\r
-// VGPR_FRAME\r
-// NVGPR_FRAME\r
-//\r
-\r
- .global exception_IVOR4\r
- .global os_lc_restore\r
- .balign 16\r
-exception_IVOR4:\r
-\r
- SAVE_WORK_AND_MORE\r
- // Save registers NOT preserved by functions\r
- SAVE_VGPR(1,C_SIZE);\r
- // Save registers preserved by functions\r
- addi r1,r1,C_SIZE\r
- SAVE_NVGPR(1,0);\r
- addi r1,r1,-C_SIZE\r
-\r
- // TODO: Why 0, can't remember\r
- li r3,0\r
- stw r3,EXC_VECTOR_OFF(r4)\r
- mr r4,r1 // save stack\r
-\r
-#ifdef USE_KERNEL\r
- li r3,LC_PATTERN\r
- stw r3,C_CONTEXT_OFF(sp)\r
-\r
- // Switch to interrupt stack if at depth 0\r
- LOAD_IND_32(3,os_sys+SYS_INT_NEST_CNT)\r
- cmpli 0,r3,0\r
- bne- on_int_stack\r
- // Load the interrupt stack\r
- LOAD_IND_32(sp,os_sys+SYS_INT_STACK)\r
-on_int_stack:\r
-\r
-#endif\r
-\r
- lis r3, Irq_Entry@h\r
- ori r3, r3,Irq_Entry@l\r
-\r
- mtlr r3\r
- mr r3,r4 /* "old" stack as arg1 */\r
- blrl\r
-\r
-#ifdef USE_KERNEL\r
-// Set the retun value as new stack\r
- mr sp,r3\r
-#endif\r
- addi r1,r1,C_SIZE\r
- RESTORE_NVGPR(1,0)\r
- addi r1,r1,-C_SIZE\r
- RESTORE_VGPR(1,C_SIZE)\r
-\r
- RESTORE_WORK_AND_MORE\r
- rfi\r
-\r
-bad_int:\r
- b bad_int\r
-\r
-# Force this jump table to this address to match the\r
-# value written to z1 IVPR\r
-.section ".exception_tbl","ax"\r
-.balign 0x0800 //TODO: 1000 eller 800?\r
-.global exception_tbl\r
-\r
-# The .skip directive aligns the branch instructions\r
-# to the irq vector offsets\r
-exception_tbl:\r
- b exception_IVOR0\r
- .skip +0xc\r
- b exception_IVOR1\r
- .skip +0xc\r
- b exception_IVOR2\r
- .skip +0xc\r
- b exception_IVOR3\r
- .skip +0xc\r
- b exception_IVOR4\r
- .skip +0xc\r
- b exception_IVOR5\r
- .skip +0xc\r
- b exception_IVOR6\r
- .skip +0xc\r
- b exception_IVOR7\r
- .skip +0xc\r
- b exception_IVOR8\r
- .skip +0xc\r
- b exception_IVOR9\r
- .skip +0xc\r
- b dec_exception\r
- //b exception_IVOR10\r
- .skip +0xc\r
- b exception_IVOR11\r
- .skip +0xc\r
- b exception_IVOR12\r
- .skip +0xc\r
- b exception_IVOR13\r
- .skip +0xc\r
- b exception_IVOR14\r
- .skip +0xc\r
- b bad_int\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
if( (_ptr)==((void *)0) ) { \\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_STATE_INIT(_api)\\r
if(PORT_INITIALIZED!=_portState){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
\r
#define VALIDATE_PARAM_PIN(_pin, _api)\\r
if(_pin>sizeof(SIU.PCR)){\\r
Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
- goto cleanup; \\r
+ return; \\r
}\r
#else\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
// Pointers to the register memory areas\r
vuint16_t * padConfig = &(SIU.PCR[0].R);\r
vuint8_t * outConfig = &(SIU.GPDO[0].R);\r
-// vuint8_t * inConfig = &(SIU.GPDI[0].R);\r
+// vuint8_t * inConfig = &(SIU.GPDI[0].R); // Read only\r
\r
// Copy config to register areas\r
memcpy((void *)outConfig, configType->outConfig, configType->outCnt);\r
//memcpy((void *)inConfig, configType->inConfig, configType->inCnt);\r
_portState = PORT_INITIALIZED;\r
_configPtr = configType;\r
- cleanup: return;\r
+ return;\r
}\r
\r
#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
SIU.PCR[pin].B.OBE = 1;\r
_Irq_Disable_restore(state); // Restore interrupts\r
}\r
-cleanup:return;\r
+ return;\r
}\r
#endif\r
\r
padCfgPtr++;\r
}\r
\r
- cleanup:return;\r
+ return;\r
}\r
\r
#if PORT_VERSION_INFO_API == STD_ON\r
{\r
VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
\r
//characteristics of external pins. The PCRs can select the multiplexed function of a pin, selection of pullup\r
//or pulldown devices, the slew rate of I/O signals, open drain mode for output pins, and hysteresis.\r
SIU.PCR[Pin].R = Mode; // Put the selected mode to the PCR register\r
- cleanup: return;\r
+ return;\r
}\r
#endif\r
#include "Os.h"\r
#endif\r
#include "Mcu.h"\r
+#if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
+#include "irq.h"\r
+#include "arc.h"\r
+#endif\r
+\r
\r
#if PWM_DEV_EROR_DETECT==STD_ON\r
#define PWM_VALIDATE(_exp, _errid) \\r
#include "Det.h"\r
#include <stdlib.h>\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_HIGH\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#include "WdgM.h"\r
-#include "Mcu.h"\r
-\r
-const WdgM_ConfigType *wdgMConfigPtr;\r
-static WdgM_SupervisedStatusType WdgM_GlobalSupervisionStatus = WDBG_ALIVE_OK;\r
-\r
-Std_ReturnType WdgM_UpdateAliveCounter (WdgM_SupervisedEntityIdType SEid)\r
-{\r
- Wdgm_SupervisionType *supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
-\r
- if (supervisionPtr->ActivationStatus == WDBG_SUPERVISION_ENABLED)\r
- {\r
- supervisionPtr->AliveCounter++;\r
- }\r
- return (E_OK);\r
-}\r
-\r
-Std_ReturnType WdgM_ActivateAliveSupervision (WdgM_SupervisedEntityIdType SEid)\r
-{\r
- Wdgm_SupervisionType *supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
-\r
- supervisionPtr->ActivationStatus = WDBG_SUPERVISION_ENABLED;\r
-\r
- return (E_OK);\r
-}\r
-\r
-Std_ReturnType WdgM_DeactivateAliveSupervision (WdgM_SupervisedEntityIdType SEid)\r
-{\r
- Wdgm_SupervisionType *supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
-\r
- supervisionPtr->ActivationStatus = WDBG_SUPERVISION_DISABLED;\r
- return (E_OK);\r
-}\r
-\r
-void WdgM_Init(const WdgM_ConfigType *ConfigPtr)\r
-{\r
- WdgM_SupervisedEntityIdType SEid;\r
- Wdgm_SupervisionType *supervisionPtr;\r
- WdgM_SupervisedEntityType* supervisedEntityPtr;\r
-\r
- for (SEid = 0; SEid < WDBG_NBR_OF_ALIVE_SIGNALS; SEid++)\r
- {\r
- supervisionPtr = &(ConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
- supervisedEntityPtr = (WdgM_SupervisedEntityType*)&(ConfigPtr->WdgM_SupervisedEntityPtr)[SEid];\r
- supervisionPtr->ActivationStatus = supervisedEntityPtr->WdgM_ActivationStatus;\r
- }\r
- wdgMConfigPtr = ConfigPtr;\r
-\r
-}\r
-\r
-void WdgM_MainFunction_AliveSupervision (void)\r
-{\r
- WdgM_SupervisedEntityIdType SEid;\r
- Wdgm_SupervisionType *supervisionPtr;\r
- const WdgM_SupervisedEntityType *entityPtr;\r
- WdgM_SupervisionCounterType aliveCalc, nSC, nAl, eai;\r
- WdgM_SupervisedStatusType maxLocal = WDBG_ALIVE_OK;\r
- static WdgM_SupervisionCounterType expiredSupervisionCycles = 0;\r
-\r
- for (SEid = 0; SEid < WDBG_NBR_OF_ALIVE_SIGNALS; SEid++)\r
- {\r
- supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
- entityPtr = &(wdgMConfigPtr->WdgM_SupervisedEntityPtr)[SEid];\r
-\r
- if (WDBG_SUPERVISION_ENABLED == supervisionPtr->ActivationStatus)\r
- {\r
- supervisionPtr->SupervisionCycle++;\r
- /* Only perform supervision on the reference cycle. */\r
- if (supervisionPtr->SupervisionCycle == entityPtr->WdgM_SupervisionReferenceCycle)\r
- {\r
- /* Alive algorithm. *\r
- * n (Al) - n(SC) + EAI == 0 */\r
- if (entityPtr->WdgM_ExpectedAliveIndications > entityPtr->WdgM_SupervisionReferenceCycle)\r
- {\r
- /* Scenario A */\r
- eai = -entityPtr->WdgM_ExpectedAliveIndications + 1;\r
-\r
- }\r
- else\r
- {\r
- /* Scenario B */\r
- eai = entityPtr->WdgM_SupervisionReferenceCycle - 1;\r
- }\r
- nSC = supervisionPtr->SupervisionCycle;\r
- nAl = supervisionPtr->AliveCounter;\r
- aliveCalc = nAl - nSC + eai;\r
-\r
- if ((aliveCalc <= entityPtr->WdgM_MaxMargin) &&\r
- (aliveCalc >= -entityPtr->WdgM_MinMargin))\r
- {\r
- /* Entity alive OK. */\r
- supervisionPtr->SupervisionStatus = WDBG_ALIVE_OK;\r
- }\r
- else\r
- {\r
- /* Entity alive NOK. */\r
- supervisionPtr->SupervisionStatus = WDBG_ALIVE_FAILED;\r
- if (WDBG_ALIVE_FAILED > maxLocal)\r
- {\r
- maxLocal = WDBG_ALIVE_FAILED;\r
- }\r
- }\r
-\r
- if (WDBG_ALIVE_FAILED == supervisionPtr->SupervisionStatus)\r
- {\r
- if (supervisionPtr->NbrOfFailedRefCycles > entityPtr->WdgM_FailedSupervisionReferenceCycleTolerance)\r
- {\r
- supervisionPtr->SupervisionStatus = WDBG_ALIVE_EXPIRED;\r
- if (WDBG_ALIVE_EXPIRED > maxLocal)\r
- {\r
- maxLocal = WDBG_ALIVE_EXPIRED;\r
- }\r
- }\r
- else\r
- {\r
- supervisionPtr->NbrOfFailedRefCycles++;\r
- }\r
- }\r
-\r
- /* Reset counters. */\r
- supervisionPtr->SupervisionCycle = 0;\r
- supervisionPtr->AliveCounter = 0;\r
- }\r
- }\r
- }\r
-\r
- /* Try to heal global status. */\r
- if (WDBG_ALIVE_EXPIRED != WdgM_GlobalSupervisionStatus)\r
- {\r
- WdgM_GlobalSupervisionStatus = maxLocal;\r
- }\r
- else\r
- {\r
- WdgM_GlobalSupervisionStatus = WDBG_ALIVE_EXPIRED;\r
- }\r
-\r
- if (WDBG_ALIVE_EXPIRED == WdgM_GlobalSupervisionStatus)\r
- {\r
- expiredSupervisionCycles++;\r
- }\r
-\r
- if (expiredSupervisionCycles >= wdgMConfigPtr->WdgM_ExpiredSupervisionCycleTolerance)\r
- {\r
- WdgM_GlobalSupervisionStatus = WDBG_ALIVE_STOPPED;\r
- }\r
-}\r
-\r
-boolean WdgM_IsAlive(void)\r
-{\r
-\r
- if ( WDBG_ALIVE_STOPPED > WdgM_GlobalSupervisionStatus )\r
- {\r
- return (TRUE);\r
- }\r
- else\r
- {\r
- return (FALSE);\r
- }\r
-}\r
-\r
-void WdgM_MainFunction_Trigger (void)\r
-{\r
- if ( WdgM_IsAlive() )\r
- {\r
- KickWatchdog();\r
- }\r
-}\r
-\r
-\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#ifndef WDGM_CFG_H_\r
-#define WDGM_CFG_H_\r
-\r
-#include "Std_Types.h"\r
-#include "WdgM_Lcfg.h"\r
-\r
-typedef enum\r
-{\r
- WDBG_ALIVE_OK,\r
- WDBG_ALIVE_FAILED,\r
- WDBG_ALIVE_EXPIRED,\r
- WDBG_ALIVE_STOPPED,\r
- WDBG_ALIVE_DEACTIVATED,\r
-}WdgM_SupervisedStatusType;\r
-\r
-typedef enum\r
-{\r
- WDBG_SUPERVISION_DISABLED,\r
- WDBG_SUPERVISION_ENABLED\r
-}WdgM_ActivationStatusType;\r
-\r
-typedef int16_t WdgM_SupervisionCounterType ;\r
-\r
-typedef struct\r
-{\r
- WdgM_SupervisionCounterType AliveCounter;\r
- WdgM_SupervisionCounterType SupervisionCycle;\r
- WdgM_SupervisedStatusType SupervisionStatus;\r
- WdgM_SupervisionCounterType NbrOfFailedRefCycles;\r
- WdgM_ActivationStatusType ActivationStatus;\r
-}Wdgm_SupervisionType;\r
-\r
-typedef struct\r
-{\r
- const WdgM_SupervisedEntityIdType WdgM_SupervisedEntityID;\r
- const WdgM_ActivationStatusType WdgM_ActivationStatus;\r
- const WdgM_SupervisionCounterType WdgM_ExpectedAliveIndications;\r
- const WdgM_SupervisionCounterType WdgM_SupervisionReferenceCycle;\r
- const WdgM_SupervisionCounterType WdgM_FailedSupervisionReferenceCycleTolerance;\r
- const WdgM_SupervisionCounterType WdgM_MinMargin;\r
- const WdgM_SupervisionCounterType WdgM_MaxMargin;\r
-}WdgM_SupervisedEntityType;\r
-\r
-typedef struct\r
-{\r
- uint16 WdgM_SupervisionCycle;\r
- uint16 WdgM_NumberOfSupervisedEntities;\r
- uint16 WdgM_ExpiredSupervisionCycleTolerance;\r
- const WdgM_SupervisedEntityType *WdgM_SupervisedEntityPtr;\r
- Wdgm_SupervisionType *Wdgm_SupervisionPtr;\r
-}WdgM_ConfigType;\r
-\r
-extern const WdgM_ConfigType WdgMAliveSupervision;\r
-\r
-#endif /* WDGM_CFG_H_ */\r
\r
#define MPC5516 1\r
\r
+#include "Compiler.h"\r
#include "typedefs.h"\r
\r
#ifdef __cplusplus\r
/****************************************************************************/\r
/* MODULE : CRP */\r
/****************************************************************************/\r
- struct CRP_tag {\r
+CC_EXTENSION struct CRP_tag {\r
\r
union {\r
vuint32_t R;\r
/****************************************************************************/\r
/* MODULE : DMAMUX */\r
/****************************************************************************/\r
- struct DMAMUX_tag {\r
+CC_EXTENSION struct DMAMUX_tag {\r
union {\r
vuint8_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : DSPI */\r
/****************************************************************************/\r
- struct DSPI_tag {\r
+CC_EXTENSION struct DSPI_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : External Bus Interface (EBI) */\r
/****************************************************************************/\r
- struct CS_tag {\r
+CC_EXTENSION struct CS_tag {\r
union { /* Base Register Bank */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : eDMA */\r
/****************************************************************************/\r
- struct EDMA_tag {\r
+CC_EXTENSION struct EDMA_tag {\r
union {\r
vuint32_t R;\r
struct {\r
\r
};\r
\r
- struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
+ CC_EXTENSION struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
\r
struct tcd_alt1_t {\r
vuint32_t SADDR; /* source address */\r
/****************************************************************************/\r
/* MODULE : EMIOS */\r
/****************************************************************************/\r
- struct EMIOS_tag {\r
+ CC_EXTENSION struct EMIOS_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : EQADC */\r
/****************************************************************************/\r
- struct EQADC_tag {\r
+CC_EXTENSION struct EQADC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : eSCI */\r
/****************************************************************************/\r
- struct ESCI_tag {\r
+CC_EXTENSION struct ESCI_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FLASH */\r
/****************************************************************************/\r
- struct FLASH_tag {\r
+CC_EXTENSION struct FLASH_tag {\r
union { /* Module Configuration Register */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FlexCAN */\r
/****************************************************************************/\r
- struct FLEXCAN_tag {\r
+CC_EXTENSION struct FLEXCAN_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FMPLL */\r
/****************************************************************************/\r
- struct FMPLL_tag {\r
+CC_EXTENSION struct FMPLL_tag {\r
union { /* JRichard */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : i2c */\r
/****************************************************************************/\r
- struct I2C_tag {\r
+CC_EXTENSION struct I2C_tag {\r
union {\r
vuint8_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : INTC */\r
/****************************************************************************/\r
- struct INTC_tag {\r
+CC_EXTENSION struct INTC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : MCM */\r
/****************************************************************************/\r
- struct MCM_tag {\r
+CC_EXTENSION struct MCM_tag {\r
\r
uint32_t mcm_reserved1[5];\r
\r
/****************************************************************************/\r
/* MODULE : MPU */\r
/****************************************************************************/\r
- struct MPU_tag {\r
+CC_EXTENSION struct MPU_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : pit */\r
/****************************************************************************/\r
- struct PIT_tag {\r
+CC_EXTENSION struct PIT_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : sem4 */\r
/****************************************************************************/\r
- struct SEMA4_tag {\r
+CC_EXTENSION struct SEMA4_tag {\r
union {\r
vuint8_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : SIU */\r
/****************************************************************************/\r
- struct SIU_tag {\r
+CC_EXTENSION struct SIU_tag {\r
int32_t SIU_reserved0;\r
\r
union { /* MCU ID Register */\r
/* MODULE : FlexRay */\r
/****************************************************************************/\r
\r
- typedef union uMVR {\r
+CC_EXTENSION typedef union uMVR {\r
vuint16_t R;\r
struct {\r
vuint16_t CHIVER:8; /* CHI Version Number */\r
} B;\r
} MVR_t;\r
\r
- typedef union uMCR {\r
+CC_EXTENSION typedef union uMCR {\r
vuint16_t R;\r
struct {\r
vuint16_t MEN:1; /* module enable */\r
vuint16_t:1;\r
} B;\r
} MCR_t;\r
- typedef union uSTBSCR {\r
+CC_EXTENSION typedef union uSTBSCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STBPSEL:2; /* strobe port select */\r
} B;\r
} STBSCR_t;\r
- typedef union uSTBPCR {\r
+CC_EXTENSION typedef union uSTBPCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} STBPCR_t;\r
\r
- typedef union uMBDSR {\r
+CC_EXTENSION typedef union uMBDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} MBDSR_t;\r
\r
- typedef union uMBSSUTR {\r
+CC_EXTENSION typedef union uMBSSUTR {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBSSUTR_t;\r
\r
- typedef union uPOCR {\r
+CC_EXTENSION typedef union uPOCR {\r
vuint16_t R;\r
vuint8_t byte[2];\r
struct {\r
} B;\r
} POCR_t;\r
/* protocol commands */\r
- typedef union uGIFER {\r
+CC_EXTENSION typedef union uGIFER {\r
vuint16_t R;\r
struct {\r
vuint16_t MIF:1; /* module interrupt flag */\r
vuint16_t TBIE:1; /* transmit buffer interrupt enable */\r
} B;\r
} GIFER_t;\r
- typedef union uPIFR0 {\r
+\r
+CC_EXTENSION typedef union uPIFR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIF:1; /* fatal protocol error interrupt flag */\r
vuint16_t CYSIF:1; /* cycle start interrupt flag */\r
} B;\r
} PIFR0_t;\r
- typedef union uPIFR1 {\r
+\r
+ CC_EXTENSION typedef union uPIFR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIF:1; /* error mode changed interrupt flag */\r
vuint16_t:4;\r
} B;\r
} PIFR1_t;\r
- typedef union uPIER0 {\r
+CC_EXTENSION typedef union uPIER0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIE:1; /* fatal protocol error interrupt enable */\r
vuint16_t CYSIE:1; /* cycle start interrupt enable */\r
} B;\r
} PIER0_t;\r
- typedef union uPIER1 {\r
+CC_EXTENSION typedef union uPIER1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIE:1; /* error mode changed interrupt enable */\r
vuint16_t:4;\r
} B;\r
} PIER1_t;\r
- typedef union uCHIERFR {\r
+ CC_EXTENSION typedef union uCHIERFR {\r
vuint16_t R;\r
struct {\r
vuint16_t FRLBEF:1; /* flame lost channel B error flag */\r
vuint16_t ILSAEF:1; /* illegal access error flag */\r
} B;\r
} CHIERFR_t;\r
- typedef union uMBIVEC {\r
+ CC_EXTENSION typedef union uMBIVEC {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBIVEC_t;\r
\r
- typedef union uPSR0 {\r
+ CC_EXTENSION typedef union uPSR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ERRMODE:2; /* error mode */\r
/* protocol states */\r
/* protocol sub-states */\r
/* wakeup status */\r
- typedef union uPSR1 {\r
+ CC_EXTENSION typedef union uPSR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t CSAA:1; /* cold start attempt abort flag */\r
vuint16_t APTAC:5; /* allow passive to active counter */\r
} B;\r
} PSR1_t;\r
- typedef union uPSR2 {\r
+ CC_EXTENSION typedef union uPSR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t NBVB:1; /* NIT boundary violation on channel B */\r
vuint16_t CLKCORRFAILCNT:4; /* clock correction failed counter */\r
} B;\r
} PSR2_t;\r
- typedef union uPSR3 {\r
+ CC_EXTENSION typedef union uPSR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
vuint16_t AVFA:1; /* aggregated valid frame on channel A */\r
} B;\r
} PSR3_t;\r
- typedef union uCIFRR {\r
+ CC_EXTENSION typedef union uCIFRR {\r
vuint16_t R;\r
struct {\r
vuint16_t:8;\r
vuint16_t TBIFR:1; /* transmit buffer interrupt flag */\r
} B;\r
} CIFRR_t;\r
- typedef union uSFCNTR {\r
+ CC_EXTENSION typedef union uSFCNTR {\r
vuint16_t R;\r
struct {\r
vuint16_t SFEVB:4; /* sync frames channel B, even cycle */\r
} B;\r
} SFCNTR_t;\r
\r
- typedef union uSFTCCSR {\r
+ CC_EXTENSION typedef union uSFTCCSR {\r
vuint16_t R;\r
struct {\r
vuint16_t ELKT:1; /* even cycle tables lock and unlock trigger */\r
vuint16_t SIDEN:1; /* sync frame ID table enable */\r
} B;\r
} SFTCCSR_t;\r
- typedef union uSFIDRFR {\r
+ CC_EXTENSION typedef union uSFIDRFR {\r
vuint16_t R;\r
struct {\r
vuint16_t:6;\r
} B;\r
} SFIDRFR_t;\r
\r
- typedef union uTICCR {\r
+ CC_EXTENSION typedef union uTICCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
\r
} B;\r
} TICCR_t;\r
- typedef union uTI1CYSR {\r
+ CC_EXTENSION typedef union uTI1CYSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} TI1CYSR_t;\r
\r
- typedef union uSSSR {\r
+ CC_EXTENSION typedef union uSSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} SSSR_t;\r
\r
- typedef union uSSCCR {\r
+ CC_EXTENSION typedef union uSSCCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STATUSMASK:4; /* slot status mask */\r
} B;\r
} SSCCR_t;\r
- typedef union uSSR {\r
+ CC_EXTENSION typedef union uSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t VFB:1; /* valid frame on channel B */\r
vuint16_t TCA:1; /* tx conflict on channel A */\r
} B;\r
} SSR_t;\r
- typedef union uMTSCFR {\r
+ CC_EXTENSION typedef union uMTSCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t MTE:1; /* media access test symbol transmission enable */\r
} B;\r
} MTSCFR_t;\r
\r
- typedef union uRSBIR {\r
+ CC_EXTENSION typedef union uRSBIR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} RSBIR_t;\r
\r
- typedef union uRFDSR {\r
+ CC_EXTENSION typedef union uRFDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t FIFODEPTH:8; /* fifo depth */\r
} B;\r
} RFDSR_t;\r
\r
- typedef union uRFRFCFR {\r
+ CC_EXTENSION typedef union uRFRFCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} RFRFCFR_t;\r
\r
- typedef union uRFRFCTR {\r
+ CC_EXTENSION typedef union uRFRFCTR {\r
vuint16_t R;\r
struct {\r
vuint16_t:4;\r
vuint16_t F0EN:1; /* filter enable */\r
} B;\r
} RFRFCTR_t;\r
- typedef union uPCR0 {\r
+ CC_EXTENSION typedef union uPCR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR0_t;\r
\r
- typedef union uPCR1 {\r
+ CC_EXTENSION typedef union uPCR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} PCR1_t;\r
\r
- typedef union uPCR2 {\r
+ CC_EXTENSION typedef union uPCR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_AFTER_ACTION_POINT:6;\r
} B;\r
} PCR2_t;\r
\r
- typedef union uPCR3 {\r
+ CC_EXTENSION typedef union uPCR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_SYMBOL_RX_LOW:6;\r
} B;\r
} PCR3_t;\r
\r
- typedef union uPCR4 {\r
+ CC_EXTENSION typedef union uPCR4 {\r
vuint16_t R;\r
struct {\r
vuint16_t CAS_RX_LOW_MAX:7;\r
} B;\r
} PCR4_t;\r
\r
- typedef union uPCR5 {\r
+ CC_EXTENSION typedef union uPCR5 {\r
vuint16_t R;\r
struct {\r
vuint16_t TSS_TRANSMITTER:4;\r
} B;\r
} PCR5_t;\r
\r
- typedef union uPCR6 {\r
+ CC_EXTENSION typedef union uPCR6 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR6_t;\r
\r
- typedef union uPCR7 {\r
+ CC_EXTENSION typedef union uPCR7 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_B:9;\r
} B;\r
} PCR7_t;\r
\r
- typedef union uPCR8 {\r
+ CC_EXTENSION typedef union uPCR8 {\r
vuint16_t R;\r
struct {\r
vuint16_t MAX_WITHOUT_CLOCK_CORRECTION_FATAL:4;\r
} B;\r
} PCR8_t;\r
\r
- typedef union uPCR9 {\r
+ CC_EXTENSION typedef union uPCR9 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_EXISTS:1;\r
} B;\r
} PCR9_t;\r
\r
- typedef union uPCR10 {\r
+ CC_EXTENSION typedef union uPCR10 {\r
vuint16_t R;\r
struct {\r
vuint16_t SINGLE_SLOT_ENABLED:1;\r
} B;\r
} PCR10_t;\r
\r
- typedef union uPCR11 {\r
+ CC_EXTENSION typedef union uPCR11 {\r
vuint16_t R;\r
struct {\r
vuint16_t KEY_SLOT_USED_FOR_STARTUP:1;\r
} B;\r
} PCR11_t;\r
\r
- typedef union uPCR12 {\r
+ CC_EXTENSION typedef union uPCR12 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_PASSIVE_TO_ACTIVE:5;\r
} B;\r
} PCR12_t;\r
\r
- typedef union uPCR13 {\r
+ CC_EXTENSION typedef union uPCR13 {\r
vuint16_t R;\r
struct {\r
vuint16_t FIRST_MINISLOT_ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR13_t;\r
\r
- typedef union uPCR14 {\r
+ CC_EXTENSION typedef union uPCR14 {\r
vuint16_t R;\r
struct {\r
vuint16_t RATE_CORRECTION_OUT:11;\r
} B;\r
} PCR14_t;\r
\r
- typedef union uPCR15 {\r
+ CC_EXTENSION typedef union uPCR15 {\r
vuint16_t R;\r
struct {\r
vuint16_t LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR15_t;\r
\r
- typedef union uPCR16 {\r
+ CC_EXTENSION typedef union uPCR16 {\r
vuint16_t R;\r
struct {\r
vuint16_t MACRO_INITIAL_OFFSET_B:7;\r
} B;\r
} PCR16_t;\r
\r
- typedef union uPCR17 {\r
+ CC_EXTENSION typedef union uPCR17 {\r
vuint16_t R;\r
struct {\r
vuint16_t NOISE_LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR17_t;\r
\r
- typedef union uPCR18 {\r
+ CC_EXTENSION typedef union uPCR18 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_PATTERN:6;\r
} B;\r
} PCR18_t;\r
\r
- typedef union uPCR19 {\r
+ CC_EXTENSION typedef union uPCR19 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_A:9;\r
} B;\r
} PCR19_t;\r
\r
- typedef union uPCR20 {\r
+ CC_EXTENSION typedef union uPCR20 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_INITIAL_OFFSET_B:8;\r
} B;\r
} PCR20_t;\r
\r
- typedef union uPCR21 {\r
+ CC_EXTENSION typedef union uPCR21 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_RATE_CORRECTION:3;\r
} B;\r
} PCR21_t;\r
\r
- typedef union uPCR22 {\r
+ CC_EXTENSION typedef union uPCR22 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR22_t;\r
\r
- typedef union uPCR23 {\r
+ CC_EXTENSION typedef union uPCR23 {\r
vuint16_t R;\r
struct {\r
vuint16_t micro_per_cycle_l:16;\r
} B;\r
} PCR23_t;\r
\r
- typedef union uPCR24 {\r
+ CC_EXTENSION typedef union uPCR24 {\r
vuint16_t R;\r
struct {\r
vuint16_t CLUSTER_DRIFT_DAMPING:5;\r
} B;\r
} PCR24_t;\r
\r
- typedef union uPCR25 {\r
+ CC_EXTENSION typedef union uPCR25 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MIN_L:16;\r
} B;\r
} PCR25_t;\r
\r
- typedef union uPCR26 {\r
+ CC_EXTENSION typedef union uPCR26 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_HALT_DUE_TO_CLOCK:1;\r
} B;\r
} PCR26_t;\r
\r
- typedef union uPCR27 {\r
+ CC_EXTENSION typedef union uPCR27 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MAX_L:16;\r
} B;\r
} PCR27_t;\r
\r
- typedef union uPCR28 {\r
+ CC_EXTENSION typedef union uPCR28 {\r
vuint16_t R;\r
struct {\r
vuint16_t DYNAMIC_SLOT_IDLE_PHASE:2;\r
} B;\r
} PCR28_t;\r
\r
- typedef union uPCR29 {\r
+ CC_EXTENSION typedef union uPCR29 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_OFFSET_CORRECTION:3;\r
} B;\r
} PCR29_t;\r
\r
- typedef union uPCR30 {\r
+ CC_EXTENSION typedef union uPCR30 {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} PCR30_t;\r
\r
- typedef struct uMSG_BUFF_CCS {\r
+ CC_EXTENSION typedef struct uMSG_BUFF_CCS {\r
union {\r
vuint16_t R;\r
struct {\r
} B;\r
} MBIDXR;\r
} MSG_BUFF_CCS_t;\r
- typedef union uSYSBADHR {\r
+ CC_EXTENSION typedef union uSYSBADHR {\r
vuint16_t R;\r
} SYSBADHR_t;\r
- typedef union uSYSBADLR {\r
+ CC_EXTENSION typedef union uSYSBADLR {\r
vuint16_t R;\r
} SYSBADLR_t;\r
- typedef union uPADR {\r
+ CC_EXTENSION typedef union uPADR {\r
vuint16_t R;\r
} PADR_t;\r
- typedef union uPDAR {\r
+ CC_EXTENSION typedef union uPDAR {\r
vuint16_t R;\r
} PDAR_t;\r
- typedef union uCASERCR {\r
+ CC_EXTENSION typedef union uCASERCR {\r
vuint16_t R;\r
} CASERCR_t;\r
- typedef union uCBSERCR {\r
+ CC_EXTENSION typedef union uCBSERCR {\r
vuint16_t R;\r
} CBSERCR_t;\r
- typedef union uCYCTR {\r
+ CC_EXTENSION typedef union uCYCTR {\r
vuint16_t R;\r
} CYCTR_t;\r
- typedef union uMTCTR {\r
+ CC_EXTENSION typedef union uMTCTR {\r
vuint16_t R;\r
} MTCTR_t;\r
- typedef union uSLTCTAR {\r
+ CC_EXTENSION typedef union uSLTCTAR {\r
vuint16_t R;\r
} SLTCTAR_t;\r
- typedef union uSLTCTBR {\r
+ CC_EXTENSION typedef union uSLTCTBR {\r
vuint16_t R;\r
} SLTCTBR_t;\r
- typedef union uRTCORVR {\r
+ CC_EXTENSION typedef union uRTCORVR {\r
vuint16_t R;\r
} RTCORVR_t;\r
- typedef union uOFCORVR {\r
+ CC_EXTENSION typedef union uOFCORVR {\r
vuint16_t R;\r
} OFCORVR_t;\r
- typedef union uSFTOR {\r
+ CC_EXTENSION typedef union uSFTOR {\r
vuint16_t R;\r
} SFTOR_t;\r
- typedef union uSFIDAFVR {\r
+ CC_EXTENSION typedef union uSFIDAFVR {\r
vuint16_t R;\r
} SFIDAFVR_t;\r
- typedef union uSFIDAFMR {\r
+ CC_EXTENSION typedef union uSFIDAFMR {\r
vuint16_t R;\r
} SFIDAFMR_t;\r
- typedef union uNMVR {\r
+ CC_EXTENSION typedef union uNMVR {\r
vuint16_t R;\r
} NMVR_t;\r
- typedef union uNMVLR {\r
+ CC_EXTENSION typedef union uNMVLR {\r
vuint16_t R;\r
} NMVLR_t;\r
- typedef union uT1MTOR {\r
+ CC_EXTENSION typedef union uT1MTOR {\r
vuint16_t R;\r
} T1MTOR_t;\r
- typedef union uTI2CR0 {\r
+ CC_EXTENSION typedef union uTI2CR0 {\r
vuint16_t R;\r
} TI2CR0_t;\r
- typedef union uTI2CR1 {\r
+ CC_EXTENSION typedef union uTI2CR1 {\r
vuint16_t R;\r
} TI2CR1_t;\r
- typedef union uSSCR {\r
+ CC_EXTENSION typedef union uSSCR {\r
vuint16_t R;\r
} SSCR_t;\r
- typedef union uRFSR {\r
+ CC_EXTENSION typedef union uRFSR {\r
vuint16_t R;\r
} RFSR_t;\r
- typedef union uRFSIR {\r
+ CC_EXTENSION typedef union uRFSIR {\r
vuint16_t R;\r
} RFSIR_t;\r
- typedef union uRFARIR {\r
+ CC_EXTENSION typedef union uRFARIR {\r
vuint16_t R;\r
} RFARIR_t;\r
- typedef union uRFBRIR {\r
+ CC_EXTENSION typedef union uRFBRIR {\r
vuint16_t R;\r
} RFBRIR_t;\r
- typedef union uRFMIDAFVR {\r
+ CC_EXTENSION typedef union uRFMIDAFVR {\r
vuint16_t R;\r
} RFMIDAFVR_t;\r
- typedef union uRFMIAFMR {\r
+ CC_EXTENSION typedef union uRFMIAFMR {\r
vuint16_t R;\r
} RFMIAFMR_t;\r
- typedef union uRFFIDRFVR {\r
+ CC_EXTENSION typedef union uRFFIDRFVR {\r
vuint16_t R;\r
} RFFIDRFVR_t;\r
- typedef union uRFFIDRFMR {\r
+ CC_EXTENSION typedef union uRFFIDRFMR {\r
vuint16_t R;\r
} RFFIDRFMR_t;\r
- typedef union uLDTXSLAR {\r
+ CC_EXTENSION typedef union uLDTXSLAR {\r
vuint16_t R;\r
} LDTXSLAR_t;\r
- typedef union uLDTXSLBR {\r
+ CC_EXTENSION typedef union uLDTXSLBR {\r
vuint16_t R;\r
} LDTXSLBR_t;\r
\r
volatile MSG_BUFF_CCS_t MBCCS[128]; /* message buffer configuration, control & status registers 0-31 *//*100 */\r
} FR_tag_t;\r
\r
- typedef union uF_HEADER /* frame header */\r
+ CC_EXTENSION typedef union uF_HEADER /* frame header */\r
{\r
struct {\r
vuint16_t:5;\r
} B;\r
vuint16_t WORDS[3];\r
} F_HEADER_t;\r
- typedef union uS_STSTUS /* slot status */\r
+ CC_EXTENSION typedef union uS_STSTUS /* slot status */\r
{\r
struct {\r
vuint16_t VFB:1; /* Valid Frame on channel B */\r
#define FLASH_END 0xFFFFF\r
\r
/* Define instances of modules */\r
-//#define PBRIDGE_A (*( struct PBRIDGE_A_tag *) 0xC3F00000)\r
-#define MPU (*( struct MPU_tag *) 0xFFF10000)\r
-#define SEMA4 (*( struct SEMA4_tag *) 0xFFF14000)\r
-\r
-#define MCM (*( struct MCM_tag *) 0xFFF40000)\r
-#define EDMA (*( struct EDMA_tag *) 0xFFF44000)\r
-#define INTC (*( struct INTC_tag *) 0xFFF48000)\r
-\r
-#define EQADC (*( struct EQADC_tag *) 0xFFF80000)\r
-\r
-#define I2C (*( struct I2C_tag *) 0xFFF88000)\r
-\r
-#define DSPI_A (*( struct DSPI_tag *) 0xFFF90000)\r
-#define DSPI_B (*( struct DSPI_tag *) 0xFFF94000)\r
-#define DSPI_C (*( struct DSPI_tag *) 0xFFF98000)\r
-#define DSPI_D (*( struct DSPI_tag *) 0xFFF9C000)\r
-\r
-#define ESCI_A (*( struct ESCI_tag *) 0xFFFA0000)\r
-#define ESCI_B (*( struct ESCI_tag *) 0xFFFA4000)\r
-#define ESCI_C (*( struct ESCI_tag *) 0xFFFA8000)\r
-#define ESCI_D (*( struct ESCI_tag *) 0xFFFAC000)\r
-#define ESCI_E (*( struct ESCI_tag *) 0xFFFB0000)\r
-#define ESCI_F (*( struct ESCI_tag *) 0xFFFB4000)\r
-#define ESCI_G (*( struct ESCI_tag *) 0xFFFB8000)\r
-#define ESCI_H (*( struct ESCI_tag *) 0xFFFBC000)\r
-\r
-#define CAN_A (*( struct FLEXCAN_tag *) 0xFFFC0000)\r
-#define CAN_B (*( struct FLEXCAN_tag *) 0xFFFC4000)\r
-#define CAN_C (*( struct FLEXCAN_tag *) 0xFFFC8000)\r
-#define CAN_D (*( struct FLEXCAN_tag *) 0xFFFCC000)\r
-#define CAN_E (*( struct FLEXCAN_tag *) 0xFFFD0000)\r
-#define CAN_F (*( struct FLEXCAN_tag *) 0xFFFD4000)\r
-#define FR (*( struct FR_tag *) 0xFFFD8000)\r
-#define DMAMUX (*( struct DMAMUX_tag *) 0xFFFDC000)\r
-#define PIT (*( struct PIT_tag *) 0xFFFE0000)\r
-#define EMIOS (*( struct EMIOS_tag *) 0xFFFE4000)\r
-#define SIU (*( struct SIU_tag *) 0xFFFE8000)\r
-#define CRP (*( struct CRP_tag *) 0xFFFEC000)\r
-#define FMPLL (*( struct FMPLL_tag *) 0xFFFF0000)\r
-#define EBI (*( struct EBI_tag *) 0xFFFF4000)\r
-#define FLASH (*( struct FLASH_tag *) 0xFFFF8000)\r
+//#define PBRIDGE_A (*( volatile struct PBRIDGE_A_tag *) 0xC3F00000)\r
+#define MPU (*( volatile struct MPU_tag *) 0xFFF10000)\r
+#define SEMA4 (*( volatile struct SEMA4_tag *) 0xFFF14000)\r
+\r
+#define MCM (*( volatile struct MCM_tag *) 0xFFF40000)\r
+#define EDMA (*( volatile struct EDMA_tag *) 0xFFF44000)\r
+#define INTC (*( volatile struct INTC_tag *) 0xFFF48000)\r
+\r
+#define EQADC (*( volatile struct EQADC_tag *) 0xFFF80000)\r
+\r
+#define I2C (*( volatile struct I2C_tag *) 0xFFF88000)\r
+\r
+#define DSPI_A (*( volatile struct DSPI_tag *) 0xFFF90000)\r
+#define DSPI_B (*( volatile struct DSPI_tag *) 0xFFF94000)\r
+#define DSPI_C (*( volatile struct DSPI_tag *) 0xFFF98000)\r
+#define DSPI_D (*( volatile struct DSPI_tag *) 0xFFF9C000)\r
+\r
+#define ESCI_A (*( volatile struct ESCI_tag *) 0xFFFA0000)\r
+#define ESCI_B (*( volatile struct ESCI_tag *) 0xFFFA4000)\r
+#define ESCI_C (*( volatile struct ESCI_tag *) 0xFFFA8000)\r
+#define ESCI_D (*( volatile struct ESCI_tag *) 0xFFFAC000)\r
+#define ESCI_E (*( volatile struct ESCI_tag *) 0xFFFB0000)\r
+#define ESCI_F (*( volatile struct ESCI_tag *) 0xFFFB4000)\r
+#define ESCI_G (*( volatile struct ESCI_tag *) 0xFFFB8000)\r
+#define ESCI_H (*( volatile struct ESCI_tag *) 0xFFFBC000)\r
+\r
+#define CAN_A (*( volatile struct FLEXCAN_tag *) 0xFFFC0000)\r
+#define CAN_B (*( volatile struct FLEXCAN_tag *) 0xFFFC4000)\r
+#define CAN_C (*( volatile struct FLEXCAN_tag *) 0xFFFC8000)\r
+#define CAN_D (*( volatile struct FLEXCAN_tag *) 0xFFFCC000)\r
+#define CAN_E (*( volatile struct FLEXCAN_tag *) 0xFFFD0000)\r
+#define CAN_F (*( volatile struct FLEXCAN_tag *) 0xFFFD4000)\r
+#define FR (*( volatile struct FR_tag *) 0xFFFD8000)\r
+#define DMAMUX (*( volatile struct DMAMUX_tag *) 0xFFFDC000)\r
+#define PIT (*( volatile struct PIT_tag *) 0xFFFE0000)\r
+#define EMIOS (*( volatile struct EMIOS_tag *) 0xFFFE4000)\r
+#define SIU (*( volatile struct SIU_tag *) 0xFFFE8000)\r
+#define CRP (*( volatile struct CRP_tag *) 0xFFFEC000)\r
+#define FMPLL (*( volatile struct FMPLL_tag *) 0xFFFF0000)\r
+#define EBI (*( volatile struct EBI_tag *) 0xFFFF4000)\r
+#define FLASH (*( volatile struct FLASH_tag *) 0xFFFF8000)\r
\r
#ifdef __MWERKS__\r
#pragma pop\r
#ifndef _MPC5554_H_\r
#define _MPC5554_H_\r
\r
+#include "Compiler.h"\r
#include "typedefs.h"\r
\r
#ifdef __cplusplus\r
#ifndef _MPC5567_H_\r
#define _MPC5567_H_\r
\r
+#include "Compiler.h"\r
#include "typedefs.h"\r
\r
#ifdef __cplusplus\r
/****************************************************************************/\r
/* MODULE : PBRIDGE_A Peripheral Bridge */\r
/****************************************************************************/\r
- struct PBRIDGE_A_tag {\r
+ CC_EXTENSION struct PBRIDGE_A_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : PBRIDGE_B Peripheral Bridge */\r
/****************************************************************************/\r
- struct PBRIDGE_B_tag {\r
+ CC_EXTENSION struct PBRIDGE_B_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FMPLL */\r
/****************************************************************************/\r
- struct FMPLL_tag {\r
+ CC_EXTENSION struct FMPLL_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : External Bus Interface (EBI) */\r
/****************************************************************************/\r
- struct CS_tag {\r
+ CC_EXTENSION struct CS_tag {\r
union { /* Base Register Bank */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FLASH */\r
/****************************************************************************/\r
- struct FLASH_tag {\r
+ CC_EXTENSION struct FLASH_tag {\r
union { /* Module Configuration Register */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : SIU */\r
/****************************************************************************/\r
- struct SIU_tag {\r
+ CC_EXTENSION struct SIU_tag {\r
int32_t SIU_reserved0;\r
\r
union { /* MCU ID Register */\r
/****************************************************************************/\r
/* MODULE : EMIOS */\r
/****************************************************************************/\r
- struct EMIOS_tag {\r
+ CC_EXTENSION struct EMIOS_tag {\r
union {\r
vuint32_t R;\r
struct {\r
\r
/***************************Configuration Registers**************************/\r
\r
- struct ETPU_tag {\r
+ CC_EXTENSION struct ETPU_tag {\r
union { /* MODULE CONFIGURATION REGISTER */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : XBAR CrossBar */\r
/****************************************************************************/\r
- struct XBAR_tag {\r
+ CC_EXTENSION struct XBAR_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : ECSM */\r
/****************************************************************************/\r
- struct ECSM_tag {\r
+ CC_EXTENSION struct ECSM_tag {\r
\r
uint32_t ecsm_reserved1[5];\r
\r
/****************************************************************************/\r
/* MODULE : eDMA */\r
/****************************************************************************/\r
- struct EDMA_tag {\r
+ CC_EXTENSION struct EDMA_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/* DMA2 Transfer Control Descriptor */\r
/****************************************************************************/\r
\r
- struct tcd_t { /*for "standard" format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=0 && EDMA.EMLM=0 ) */\r
+ CC_EXTENSION struct tcd_t { /*for "standard" format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=0 && EDMA.EMLM=0 ) */\r
vuint32_t SADDR; /* source address */\r
\r
vuint16_t SMOD:5; /* source address modulo */\r
\r
};\r
\r
- struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
+ CC_EXTENSION struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
\r
struct tcd_alt1_t {\r
vuint32_t SADDR; /* source address */\r
/****************************************************************************/\r
/* MODULE : INTC */\r
/****************************************************************************/\r
- struct INTC_tag {\r
+ CC_EXTENSION struct INTC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : EQADC */\r
/****************************************************************************/\r
- struct EQADC_tag {\r
+ CC_EXTENSION struct EQADC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : eSCI */\r
/****************************************************************************/\r
- struct ESCI_tag {\r
+ CC_EXTENSION struct ESCI_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FlexCAN */\r
/****************************************************************************/\r
- struct FLEXCAN2_tag {\r
+ CC_EXTENSION struct FLEXCAN2_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FEC */\r
/****************************************************************************/\r
- struct FEC_tag {\r
+ CC_EXTENSION struct FEC_tag {\r
\r
uint32_t fec_reserved_start[0x1];\r
\r
/* MODULE : FlexRay */\r
/****************************************************************************/\r
\r
- typedef union uMVR {\r
+ CC_EXTENSION typedef union uMVR {\r
vuint16_t R;\r
struct {\r
vuint16_t CHIVER:8; /* CHI Version Number */\r
} B;\r
} MVR_t;\r
\r
- typedef union uMCR {\r
+ CC_EXTENSION typedef union uMCR {\r
vuint16_t R;\r
struct {\r
vuint16_t MEN:1; /* module enable */\r
vuint16_t:1;\r
} B;\r
} MCR_t;\r
- typedef union uSTBSCR {\r
+ CC_EXTENSION typedef union uSTBSCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STBPSEL:2; /* strobe port select */\r
} B;\r
} STBSCR_t;\r
- typedef union uSTBPCR {\r
+ CC_EXTENSION typedef union uSTBPCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} STBPCR_t;\r
\r
- typedef union uMBDSR {\r
+ CC_EXTENSION typedef union uMBDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
vuint16_t MBSEG1DS:7; /* message buffer segment 1 data size */\r
} B;\r
} MBDSR_t;\r
- typedef union uMBSSUTR {\r
+ CC_EXTENSION typedef union uMBSSUTR {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBSSUTR_t;\r
\r
- typedef union uPOCR {\r
+ CC_EXTENSION typedef union uPOCR {\r
vuint16_t R;\r
vuint8_t byte[2];\r
struct {\r
} B;\r
} POCR_t;\r
/* protocol commands */\r
- typedef union uGIFER {\r
+ CC_EXTENSION typedef union uGIFER {\r
vuint16_t R;\r
struct {\r
vuint16_t MIF:1; /* module interrupt flag */\r
vuint16_t TBIE:1; /* transmit buffer interrupt enable */\r
} B;\r
} GIFER_t;\r
- typedef union uPIFR0 {\r
+ CC_EXTENSION typedef union uPIFR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIF:1; /* fatal protocol error interrupt flag */\r
vuint16_t CYSIF:1; /* cycle start interrupt flag */\r
} B;\r
} PIFR0_t;\r
- typedef union uPIFR1 {\r
+ CC_EXTENSION typedef union uPIFR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIF:1; /* error mode changed interrupt flag */\r
vuint16_t:4;\r
} B;\r
} PIFR1_t;\r
- typedef union uPIER0 {\r
+ CC_EXTENSION typedef union uPIER0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIE:1; /* fatal protocol error interrupt enable */\r
vuint16_t CYSIE:1; /* cycle start interrupt enable */\r
} B;\r
} PIER0_t;\r
- typedef union uPIER1 {\r
+ CC_EXTENSION typedef union uPIER1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIE:1; /* error mode changed interrupt enable */\r
vuint16_t:4;\r
} B;\r
} PIER1_t;\r
- typedef union uCHIERFR {\r
+ CC_EXTENSION typedef union uCHIERFR {\r
vuint16_t R;\r
struct {\r
vuint16_t FRLBEF:1; /* flame lost channel B error flag */\r
vuint16_t ILSAEF:1; /* illegal access error flag */\r
} B;\r
} CHIERFR_t;\r
- typedef union uMBIVEC {\r
+ CC_EXTENSION typedef union uMBIVEC {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBIVEC_t;\r
\r
- typedef union uPSR0 {\r
+ CC_EXTENSION typedef union uPSR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ERRMODE:2; /* error mode */\r
/* protocol states */\r
/* protocol sub-states */\r
/* wakeup status */\r
- typedef union uPSR1 {\r
+ CC_EXTENSION typedef union uPSR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t CSAA:1; /* cold start attempt abort flag */\r
vuint16_t APTAC:5; /* allow passive to active counter */\r
} B;\r
} PSR1_t;\r
- typedef union uPSR2 {\r
+ CC_EXTENSION typedef union uPSR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t NBVB:1; /* NIT boundary violation on channel B */\r
vuint16_t CLKCORRFAILCNT:4; /* clock correction failed counter */\r
} B;\r
} PSR2_t;\r
- typedef union uPSR3 {\r
+ CC_EXTENSION typedef union uPSR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
vuint16_t AVFA:1; /* aggregated valid frame on channel A */\r
} B;\r
} PSR3_t;\r
- typedef union uCIFRR {\r
+ CC_EXTENSION typedef union uCIFRR {\r
vuint16_t R;\r
struct {\r
vuint16_t:8;\r
vuint16_t TBIFR:1; /* transmit buffer interrupt flag */\r
} B;\r
} CIFRR_t;\r
- typedef union uSFCNTR {\r
+ CC_EXTENSION typedef union uSFCNTR {\r
vuint16_t R;\r
struct {\r
vuint16_t SFEVB:4; /* sync frames channel B, even cycle */\r
} B;\r
} SFCNTR_t;\r
\r
- typedef union uSFTCCSR {\r
+ CC_EXTENSION typedef union uSFTCCSR {\r
vuint16_t R;\r
struct {\r
vuint16_t ELKT:1; /* even cycle tables lock and unlock trigger */\r
vuint16_t SIDEN:1; /* sync frame ID table enable */\r
} B;\r
} SFTCCSR_t;\r
- typedef union uSFIDRFR {\r
+ CC_EXTENSION typedef union uSFIDRFR {\r
vuint16_t R;\r
struct {\r
vuint16_t:6;\r
} B;\r
} SFIDRFR_t;\r
\r
- typedef union uTICCR {\r
+ CC_EXTENSION typedef union uTICCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
\r
} B;\r
} TICCR_t;\r
- typedef union uTI1CYSR {\r
+ CC_EXTENSION typedef union uTI1CYSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} TI1CYSR_t;\r
\r
- typedef union uSSSR {\r
+ CC_EXTENSION typedef union uSSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} SSSR_t;\r
\r
- typedef union uSSCCR {\r
+ CC_EXTENSION typedef union uSSCCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STATUSMASK:4; /* slot status mask */\r
} B;\r
} SSCCR_t;\r
- typedef union uSSR {\r
+ CC_EXTENSION typedef union uSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t VFB:1; /* valid frame on channel B */\r
vuint16_t TCA:1; /* tx conflict on channel A */\r
} B;\r
} SSR_t;\r
- typedef union uMTSCFR {\r
+ CC_EXTENSION typedef union uMTSCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t MTE:1; /* media access test symbol transmission enable */\r
vuint16_t CYCCNTVAL:6; /* cycle counter value */\r
} B;\r
} MTSCFR_t;\r
- typedef union uRSBIR {\r
+ CC_EXTENSION typedef union uRSBIR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t RSBIDX:8; /* receive shadow buffer index */\r
} B;\r
} RSBIR_t;\r
- typedef union uRFDSR {\r
+ CC_EXTENSION typedef union uRFDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t FIFODEPTH:8; /* fifo depth */\r
} B;\r
} RFDSR_t;\r
\r
- typedef union uRFRFCFR {\r
+ CC_EXTENSION typedef union uRFRFCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} RFRFCFR_t;\r
\r
- typedef union uRFRFCTR {\r
+ CC_EXTENSION typedef union uRFRFCTR {\r
vuint16_t R;\r
struct {\r
vuint16_t:4;\r
vuint16_t F0EN:1; /* filter enable */\r
} B;\r
} RFRFCTR_t;\r
- typedef union uPCR0 {\r
+ CC_EXTENSION typedef union uPCR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR0_t;\r
\r
- typedef union uPCR1 {\r
+ CC_EXTENSION typedef union uPCR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} PCR1_t;\r
\r
- typedef union uPCR2 {\r
+ CC_EXTENSION typedef union uPCR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_AFTER_ACTION_POINT:6;\r
} B;\r
} PCR2_t;\r
\r
- typedef union uPCR3 {\r
+ CC_EXTENSION typedef union uPCR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_SYMBOL_RX_LOW:6;\r
} B;\r
} PCR3_t;\r
\r
- typedef union uPCR4 {\r
+ CC_EXTENSION typedef union uPCR4 {\r
vuint16_t R;\r
struct {\r
vuint16_t CAS_RX_LOW_MAX:7;\r
} B;\r
} PCR4_t;\r
\r
- typedef union uPCR5 {\r
+ CC_EXTENSION typedef union uPCR5 {\r
vuint16_t R;\r
struct {\r
vuint16_t TSS_TRANSMITTER:4;\r
} B;\r
} PCR5_t;\r
\r
- typedef union uPCR6 {\r
+ CC_EXTENSION typedef union uPCR6 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR6_t;\r
\r
- typedef union uPCR7 {\r
+ CC_EXTENSION typedef union uPCR7 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_B:9;\r
} B;\r
} PCR7_t;\r
\r
- typedef union uPCR8 {\r
+ CC_EXTENSION typedef union uPCR8 {\r
vuint16_t R;\r
struct {\r
vuint16_t MAX_WITHOUT_CLOCK_CORRECTION_FATAL:4;\r
} B;\r
} PCR8_t;\r
\r
- typedef union uPCR9 {\r
+ CC_EXTENSION typedef union uPCR9 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_EXISTS:1;\r
} B;\r
} PCR9_t;\r
\r
- typedef union uPCR10 {\r
+ CC_EXTENSION typedef union uPCR10 {\r
vuint16_t R;\r
struct {\r
vuint16_t SINGLE_SLOT_ENABLED:1;\r
} B;\r
} PCR10_t;\r
\r
- typedef union uPCR11 {\r
+ CC_EXTENSION typedef union uPCR11 {\r
vuint16_t R;\r
struct {\r
vuint16_t KEY_SLOT_USED_FOR_STARTUP:1;\r
} B;\r
} PCR11_t;\r
\r
- typedef union uPCR12 {\r
+ CC_EXTENSION typedef union uPCR12 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_PASSIVE_TO_ACTIVE:5;\r
} B;\r
} PCR12_t;\r
\r
- typedef union uPCR13 {\r
+ CC_EXTENSION typedef union uPCR13 {\r
vuint16_t R;\r
struct {\r
vuint16_t FIRST_MINISLOT_ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR13_t;\r
\r
- typedef union uPCR14 {\r
+ CC_EXTENSION typedef union uPCR14 {\r
vuint16_t R;\r
struct {\r
vuint16_t RATE_CORRECTION_OUT:11;\r
} B;\r
} PCR14_t;\r
\r
- typedef union uPCR15 {\r
+ CC_EXTENSION typedef union uPCR15 {\r
vuint16_t R;\r
struct {\r
vuint16_t LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR15_t;\r
\r
- typedef union uPCR16 {\r
+ CC_EXTENSION typedef union uPCR16 {\r
vuint16_t R;\r
struct {\r
vuint16_t MACRO_INITIAL_OFFSET_B:7;\r
} B;\r
} PCR16_t;\r
\r
- typedef union uPCR17 {\r
+ CC_EXTENSION typedef union uPCR17 {\r
vuint16_t R;\r
struct {\r
vuint16_t NOISE_LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR17_t;\r
\r
- typedef union uPCR18 {\r
+ CC_EXTENSION typedef union uPCR18 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_PATTERN:6;\r
} B;\r
} PCR18_t;\r
\r
- typedef union uPCR19 {\r
+ CC_EXTENSION typedef union uPCR19 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_A:9;\r
} B;\r
} PCR19_t;\r
\r
- typedef union uPCR20 {\r
+ CC_EXTENSION typedef union uPCR20 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_INITIAL_OFFSET_B:8;\r
} B;\r
} PCR20_t;\r
\r
- typedef union uPCR21 {\r
+ CC_EXTENSION typedef union uPCR21 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_RATE_CORRECTION:3;\r
} B;\r
} PCR21_t;\r
\r
- typedef union uPCR22 {\r
+ CC_EXTENSION typedef union uPCR22 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR22_t;\r
\r
- typedef union uPCR23 {\r
+ CC_EXTENSION typedef union uPCR23 {\r
vuint16_t R;\r
struct {\r
vuint16_t micro_per_cycle_l:16;\r
} B;\r
} PCR23_t;\r
\r
- typedef union uPCR24 {\r
+ CC_EXTENSION typedef union uPCR24 {\r
vuint16_t R;\r
struct {\r
vuint16_t CLUSTER_DRIFT_DAMPING:5;\r
} B;\r
} PCR24_t;\r
\r
- typedef union uPCR25 {\r
+ CC_EXTENSION typedef union uPCR25 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MIN_L:16;\r
} B;\r
} PCR25_t;\r
\r
- typedef union uPCR26 {\r
+ CC_EXTENSION typedef union uPCR26 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_HALT_DUE_TO_CLOCK:1;\r
} B;\r
} PCR26_t;\r
\r
- typedef union uPCR27 {\r
+ CC_EXTENSION typedef union uPCR27 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MAX_L:16;\r
} B;\r
} PCR27_t;\r
\r
- typedef union uPCR28 {\r
+ CC_EXTENSION typedef union uPCR28 {\r
vuint16_t R;\r
struct {\r
vuint16_t DYNAMIC_SLOT_IDLE_PHASE:2;\r
} B;\r
} PCR28_t;\r
\r
- typedef union uPCR29 {\r
+ CC_EXTENSION typedef union uPCR29 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_OFFSET_CORRECTION:3;\r
} B;\r
} PCR29_t;\r
\r
- typedef union uPCR30 {\r
+ CC_EXTENSION typedef union uPCR30 {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} PCR30_t;\r
\r
- typedef struct uMSG_BUFF_CCS {\r
+ CC_EXTENSION typedef struct uMSG_BUFF_CCS {\r
union {\r
vuint16_t R;\r
struct {\r
volatile MSG_BUFF_CCS_t MBCCS[128]; /* message buffer configuration, control & status registers 0-31 *//*100 */\r
} FR_tag_t;\r
\r
- typedef union uF_HEADER /* frame header */\r
+ CC_EXTENSION typedef union uF_HEADER /* frame header */\r
{\r
struct {\r
vuint16_t:5;\r
} B;\r
vuint16_t WORDS[3];\r
} F_HEADER_t;\r
- typedef union uS_STSTUS /* slot status */\r
+ CC_EXTENSION typedef union uS_STSTUS /* slot status */\r
{\r
struct {\r
vuint16_t VFB:1; /* Valid Frame on channel B */\r
\r
#include "Os.h"\r
#include "internal.h"\r
-#include "irq.h"\r
+#include "isr.h"\r
#include "arc.h"\r
\r
/**\r
* Init of free running timer.\r
*/\r
void Os_SysTickInit( void ) {\r
- TaskType tid;\r
+// TaskType tid;\r
+\r
+// Irq_Attach(INTC_SSCIR0_CLR7);\r
+// Irq_Attach2( INTC_SSCIR0_CLR7 );\r
+\r
+#if 0\r
+ IRQ_DECL_ISR2("MyIsr", 7 , CPU_CORE0, 6 , OsTick, 0 , NULL );\r
+ IRQ_ATTACH(7);\r
+\r
+// else\r
tid = Os_Arc_CreateIsr(OsTick,6/*prio*/,"OsTick");\r
Irq_AttachIsr2(tid,NULL,7);\r
+#endif\r
}\r
\r
/**\r
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+/* ----------------------------[includes]------------------------------------*/\r
+\r
#include "internal.h"\r
#include "asm_ppc.h"\r
#include "mpc55xx.h"\r
-#include "asm_book_e.h"\r
+#include "arch_stack.h"\r
+#include "arch_offset.h"\r
\r
#define USE_LDEBUG_PRINTF\r
#include "debug.h"\r
\r
+/* ----------------------------[includes]------------------------------------*/\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
+\r
+\r
+/**\r
+ * NOT complete yet.....\r
+ *\r
+ * @param err The error code.\r
+ * @param errFramePtr Pointer to extra information about the error, if any.\r
+ * @param excFramePtr Pointer to the exception frame, that cause the error.\r
+ */\r
+void Os_ArchPanic( uint32_t err, void *errFramePtr , Os_ExceptionFrameType *excFramePtr) {\r
+ switch(err) {\r
+ case OS_ERR_BAD_CONTEXT:\r
+ while(1);\r
+ break;\r
+ case OS_ERR_SPURIOUS_INTERRUPT:\r
+ fputs("Spurious interrupt\n",stdout);\r
+ printf(" vector : %02lx\n", excFramePtr->vector);\r
+ printf(" srr0 : %08lx\n", excFramePtr->srr0);\r
+ printf(" srr1 : %08lx\n", excFramePtr->srr1);\r
+ while(1);\r
+ break;\r
+ default:\r
+ while(1);\r
+ break;\r
+ }\r
+}\r
+\r
/**\r
* Function make sure that we switch to supervisor mode(rfi) before\r
* we call a task for the first time.\r
#else\r
// TODO: This really depends on if scheduling policy\r
Irq_Enable();\r
- os_sys.curr_pcb->entry();\r
+ Os_Sys.currTaskPtr->constPtr->entry();\r
+ //os_sys.curr_pcb->entry();\r
#endif\r
}\r
\r
}\r
\r
unsigned int Os_ArchGetScSize( void ) {\r
- return SC_SIZE;\r
-}\r
-\r
-extern void os_arch_setup_context_asm( void *context,unsigned int msr);\r
-\r
-// TODO: I have no clue why I wrote this????\r
-void os_arch_stack_to_small(OsPcbType *pcb ,uint32_t size_min) {\r
- OsPcbType *t;\r
- uint32_t min;\r
-\r
- while(1) {\r
- t = pcb;\r
- min = size_min;\r
- }\r
+ return FUNC_FRM_SIZE;\r
}\r
\r
-/*\r
- * Stack grows from high -> low addresses\r
- *\r
\r
+/**\r
+ * Setup a context for a task.\r
*\r
- *\r
-\r
-\r
- * ---------------- bottom of the stack( high address )\r
- * small context\r
- * ----------------\r
- *\r
- * ---------------- top of the stack( low address )\r
- *\r
+ * @param pcb Pointer to the pcb to setup\r
*/\r
-\r
-void Os_ArchSetupContext( OsPcbType *pcb ) {\r
+void Os_ArchSetupContext( OsTaskVarType *pcbPtr ) {\r
+ Os_FuncFrameType *cPtr = (Os_FuncFrameType *)pcbPtr->stack.curr;\r
uint32_t msr;\r
-\r
msr = MSR_EE;\r
\r
#if defined(CFG_SPE)\r
msr |= MSR_SPE;\r
#endif\r
\r
-#if ( OS_SC3 == STD_ON) || ( OS_SC4== STD_ON)\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+#if 0\r
if( !pcb->application->trusted ) {\r
// Non-trusted = User mode..\r
msr |= MSR_PR | MSR_DS | MSR_IS;\r
}\r
#endif\r
- pcb->regs[0] = msr;\r
+#endif\r
+ pcbPtr->regs[0] = msr;\r
+\r
+ cPtr->pattern = FUNC_PATTERN;\r
}\r
\r
/**\r
* @param pcbPtr\r
*/\r
\r
-void Os_ArchSetTaskEntry(OsPcbType *pcbPtr ) {\r
- uint32_t *context = (uint32_t *)pcbPtr->stack.curr;\r
+void Os_ArchSetTaskEntry(OsTaskVarType *pcbPtr ) {\r
+ Os_FuncFrameType *cPtr = (Os_FuncFrameType *)pcbPtr->stack.curr;\r
\r
- context[C_CONTEXT_OFF/4] = SC_PATTERN;\r
-\r
- /* Set LR to start function */\r
- if( pcbPtr->proc_type == PROC_EXTENDED ) {\r
- context[C_LR_OFF/4] = (uint32_t)Os_TaskStartExtended;\r
- } else if( pcbPtr->proc_type == PROC_BASIC ) {\r
- context[C_LR_OFF/4] = (uint32_t)Os_TaskStartBasic;\r
+ if( pcbPtr->constPtr->proc_type == PROC_EXTENDED ) {\r
+ cPtr->lr = (uint32_t)Os_TaskStartExtended;\r
+ } else if( pcbPtr->constPtr->proc_type == PROC_BASIC ) {\r
+ cPtr->lr = (uint32_t)Os_TaskStartBasic;\r
}\r
-}\r
\r
-\r
-#define C_CONTEXT_OFF 12\r
-#define C_LR_OFF 16\r
-#define C_CR_OFF 20\r
-\r
-void os_arch_print_context( char *str, OsPcbType *pcb ) {\r
- uint32_t *stack;\r
-\r
- LDEBUG_PRINTF("%s CONTEXT: %d\n",str, pcb->pid);\r
- LDEBUG_PRINTF(" stack: curr=%p top=%p bottom=%p\n",\r
- pcb->stack.curr,\r
- pcb->stack.top,\r
- pcb->stack.top+ pcb->stack.size);\r
- stack = pcb->stack.curr;\r
- LDEBUG_PRINTF(" val : context=%08x LR=%08x CR=%08x\n",\r
- (unsigned)stack[C_CONTEXT_OFF/4],\r
- (unsigned)stack[C_LR_OFF/4],\r
- (unsigned)stack[C_CR_OFF/4]\r
- );\r
}\r
\r
-\r
void Os_ArchInit( void ) {\r
#if defined(CFG_SPE)\r
uint32_t msr = get_msr();\r
#endif\r
}\r
\r
-#define EXC_VECTOR_CRITICAL_INPUT_OFF 0\r
-#define EXC_VECTOR_MACHINE_CHECK_OFF 1\r
-#define EXC_VECTOR_PROGRAM_OFF 6\r
-#define EXC_VECTOR_DECREMENTER_OFF 10\r
-#define EXC_VECTOR_DATA_TLB_OFF 13\r
-#define EXC_VECTOR_INSTRUCTION_TLB_OFF 14\r
-\r
-\r
-typedef void (*exc_func_t)(uint32_t *);\r
-\r
-/* How do I construct the PTE table ??\r
- *\r
- * 1. Calculate the section sizes for each application\r
- * ( objdump on the object file)\r
- * 2. Generate a Table for each application\r
- *\r
- * OS207\r
- * Trusted OS-applications CAN write to\r
- *\r
- * What do I do with the global data ???\r
- *\r
- *\r
- */\r
-\r
-\r
-/* Move these somewhere else if we need the speed */\r
-void os_arch_data_tlb( uint32_t *regs ) {\r
- uint32_t dear = regs[EXC_DEAR_OFF];\r
- (void)dear;\r
-}\r
-\r
-void os_arch_instruction_tlb( uint32_t *regs ) {\r
- uint32_t srr0 = regs[EXC_SRR0_OFF];\r
- (void)srr0;\r
- /* What information can I get here??\r
- * - The pcb to MMU mapping ???\r
- */\r
-\r
- /* TODO: How do I construct the PTE(Page Table Entry) ??*/\r
-\r
-}\r
-\r
-void os_arch_exc_program( uint32_t *regs ) {\r
- uint32_t esr = regs[EXC_ESR_OFF];\r
-\r
- if( esr & ESR_PTR ) {\r
- // Trap\r
- if( !(regs[EXC_SRR1_OFF] & MSR_PR) ) {\r
- // User -> Supervisor\r
- regs[EXC_SRR1_OFF] |= MSR_PR;\r
- }\r
- }\r
-}\r
\r
\r
-\r
-/*\r
- * IVOR4\r
- * 1. Save stack frames: EXC, VGPR, NVGPR and C\r
- * 2. Call Irq_Entry(void *curr_stack)\r
- * 2.1 Check for exception\r
- * 2.2 If softint, clear it.\r
- * 2.3 If PROC_ISR1, then just call the function\r
- * 2.4 If PROC_ISR2 -> it's a PCB, let the OS handle it.\r
+/* \r
+ *\r
+ * The Irq_IsrTypeTable does not exist any more.\r
+ * The Irq_VectorTable is now a pure function table (not mixed pcb and functions )\r
+ * The PPC interrupt handling is a bit faster.\r
+ * \r
+ *\r
+ * New files for arch offsets? \r
+ * Bypassed Irq_Entry()...\r
+ * TODO:\r
+ * Move pre/post hooks into swap code?\r
+ *\r
+ *\r
+ * IMPLEMENTATION NOTES\r
+ * OPT: For ISR1 (interrupts always off) the there is no need to save r13-r31 since\r
+ * it will be saved by the C-function. \r
*/\r
-\r
-#define _ASSEMBLER_\r
-#include "asm_ppc.h"\r
-#include "asm_offset.h"\r
-#include "asm_book_e.h"\r
-.extern os_intc_pcb_tbl\r
-.extern os_intc_types_tbl\r
-.extern os_sys\r
-\r
-\r
+ \r
/*\r
* Small assembler school\r
- * Compare imm(32-bit)\r
- * > cmpwi rA,100\r
- * Extract bits and right adjust\r
- * > extrwi rA,rS,n,b ( n-number of bits, b- startbit )\r
+ * Compare imm(32-bit)\r
+ * $ cmpwi rA,100\r
+ * Extract bits and right adjust\r
+ * $ extrwi rA,rS,n,b ( n-number of bits, b- startbit )\r
+ * Use of @ha,@h,@l. Use @ha for arithmetic instructions to compensate for sign.\r
+ * To cause less confusion use load and logical instructions instead of arithmetic ones.\r
+ * $ lis r3,0x8000@h \r
+ * $ ori r3,r3,0x08000@l\r
+ * is the same as \r
+ * $ addis r3,0x8000@ha \r
+ * $ addi r3,r3,0x08000@l\r
*\r
* Note!\r
- * The offset's (d or D)for SPE instructins are rediculously low.\r
+ * The offset's (d or D)for SPE instructions are ridiculously low.\r
* Normally you have 16-bits offset, but when using spe load and store\r
* you can use only 8-bit.\r
*/\r
\r
-#define LOCK() wrteei 0\r
-#define UNLOCK() wrteei 1\r
\r
+/* ----------------------------[includes]------------------------------------*/\r
+#define _ASSEMBLER_\r
+#include "asm_ppc.h"\r
+#include "arch_offset.h"\r
+#include "asm_offset.h"\r
+#include "arch_stack.h"\r
\r
-.extern os_proc_start_extended\r
+// #include "asm_book_e.h"\r
+.extern os_intc_pcb_tbl\r
+.extern os_intc_types_tbl\r
+.extern Os_Sys\r
+.extern Os_ArchPanic\r
\r
-//-------------------------------------------------------------------\r
+#if defined(CFG_VLE)\r
+#define lis e_lis\r
+#define li se_li\r
+#define lwz e_lwz\r
+#define stwu e_stwu\r
+#define stw e_stw\r
+#define b e_b\r
+#define addi e_addi /* true ?*/\r
+#define subi e_subi /* true ?*/\r
+#endif \r
\r
- .global os_exception_IVOR8\r
- .balign 16\r
-os_exception_IVOR8:\r
- stwu sp,-(EXC_SIZE+VGPR_SIZE)(sp)\r
- stw r3,EXC_R3_OFF(r1)\r
- stw r4,EXC_R4_OFF(r1)\r
- SAVE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1)\r
- SAVE_VGPR(1,EXC_SIZE);\r
- li r3,328\r
- stw r3,EXC_VECTOR_OFF(r1)\r
+/* ----------------------------[private define]------------------------------*/\r
\r
- rfi\r
+//#define OLD_CALL \r
\r
-dummy_int:\r
- b dummy_int\r
+#define INTC_IACKR_PRC0 0xfff48010 \r
+#define INTC_EOIR_PRC0 0xfff48018\r
+#define INTC_IACKR 0xfff48010\r
+#define INTC_EOIR 0xfff48018\r
+#define INTC_SSCIR0 0xfff48020\r
\r
-/*--------------------------------------------------------------------\r
- * void os_swap_context(pcb_t *old, pcb_t *new )\r
- *\r
- * Saves a small context on current stack, pops a new one from new context\r
- *\r
- * r3 - pcb for old process\r
- * r4 - pcb for new process\r
- *\r
- *--------------------------------------------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+\r
+#define LOCK() wrteei 0\r
+#define UNLOCK() wrteei 1\r
+\r
+#define EXC_TABLE_CODE(_exc_nr) \\r
+ stwu sp,-EXC_FRM_SIZE(sp); \\r
+ stw r3,EXC_FRM_R3(sp); \\r
+ li r3,_exc_nr; \\r
+ b handleException \r
\r
-// TODO: this assumes that both are in user mode?.. can this happen under trusted functions?\r
-// When I get here we're ALWAYS in kernel mode\r
+#if ISR_FRM_PATTERN!=FUNC_FRM_PATTERN\r
+#error Context pattern must be in the same place\r
+#endif\r
+\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
+.extern Os_Isr\r
\r
-.global Os_ArchSwapContextToW\r
.global Os_ArchSwapContextTo\r
.global Os_ArchSwapContext\r
.global Os_ArchSetSpAndCall\r
mtlr r4\r
blr\r
\r
-Os_ArchSwapContextToW:\r
- mr r1,r5\r
- b Os_ArchSwapContextTo\r
-\r
+/**\r
+ * void Os_ArchSwapContext(pcb_t *old, pcb_t *new )\r
+ *\r
+ * Saves a function context on current stack, pops a new one from new context\r
+ *\r
+ * r3 - pcb for old task\r
+ * r4 - pcb for new task\r
+ *\r
+ */\r
Os_ArchSwapContext:\r
- // allocate space for context+nvgpr\r
- // (no need for proper stack-frame here)\r
- stwu r1,-(C_SIZE+NVGPR_SIZE)(r1)\r
- // save lr and cr */\r
- mflr r0\r
- stw r0,C_LR_OFF(sp)\r
- mfcr r0\r
- stw r0,C_CR_OFF(sp)\r
- // Save small-context pattern\r
- li r0,SC_PATTERN\r
- stw r0,C_CONTEXT_OFF(sp)\r
- // Save registers preserved by function call\r
- SAVE_NVGPR(sp,(C_SIZE-14*GPR_SIZE))\r
-// Save stack ptr...\r
- stw sp,PCB_STACK_CURR_P(r3)\r
-\r
-// Stack frame here\r
-// --------- bottom( high address )\r
-// SC_xxx\r
-// C_xxx\r
-// --------- <- stack.curr\r
-//\r
-// --------- top( low address )\r
-\r
-\r
-// TODO: If we change application we must change mmu setup\r
+ stwu sp,-FUNC_FRM_SIZE(sp)\r
+ mflr r0\r
+ stw r0,FUNC_FRM_LR(sp)\r
+ mfcr r0\r
+ stw r0,FUNC_FRM_CR(sp)\r
+ \r
+ /* Save context indicator */\r
+ li r0,FUNC_PATTERN\r
+ stw r0,FUNC_FRM_PATTERN(sp)\r
+\r
+#if defined(CFG_SPE)\r
+ stw r14, FUNC_FRM_R14(sp)\r
+ stw r15, FUNC_FRM_R15(sp)\r
+ stw r16, FUNC_FRM_R16(sp)\r
+ stw r17, FUNC_FRM_R17(sp)\r
+ stw r18, FUNC_FRM_R18(sp)\r
+ stw r19, FUNC_FRM_R19(sp)\r
+ stw r20, FUNC_FRM_R20(sp)\r
+ stw r21, FUNC_FRM_R21(sp)\r
+ stw r22, FUNC_FRM_R22(sp)\r
+ stw r23, FUNC_FRM_R23(sp)\r
+ stw r24, FUNC_FRM_R24(sp)\r
+ stw r25, FUNC_FRM_R25(sp)\r
+ stw r26, FUNC_FRM_R26(sp)\r
+ stw r27, FUNC_FRM_R27(sp)\r
+ stw r28, FUNC_FRM_R28(sp)\r
+ stw r29, FUNC_FRM_R29(sp)\r
+ stw r30, FUNC_FRM_R30(sp)\r
+ stw r31, FUNC_FRM_R31(sp)\r
+\r
+#else\r
+ /* Save registers preserved by function call */\r
+ stw r14, FUNC_FRM_R14(sp)\r
+ stw r15, FUNC_FRM_R15(sp)\r
+ stw r16, FUNC_FRM_R16(sp)\r
+ stw r17, FUNC_FRM_R17(sp)\r
+ stw r18, FUNC_FRM_R18(sp)\r
+ stw r19, FUNC_FRM_R19(sp)\r
+ stw r20, FUNC_FRM_R20(sp)\r
+ stw r21, FUNC_FRM_R21(sp)\r
+ stw r22, FUNC_FRM_R22(sp)\r
+ stw r23, FUNC_FRM_R23(sp)\r
+ stw r24, FUNC_FRM_R24(sp)\r
+ stw r25, FUNC_FRM_R25(sp)\r
+ stw r26, FUNC_FRM_R26(sp)\r
+ stw r27, FUNC_FRM_R27(sp)\r
+ stw r28, FUNC_FRM_R28(sp)\r
+ stw r29, FUNC_FRM_R29(sp)\r
+ stw r30, FUNC_FRM_R30(sp)\r
+ stw r31, FUNC_FRM_R31(sp)\r
+#endif\r
+\r
+ /* Save stack ptr... */\r
+ stw sp,PCB_STACK_CURR_P(r3)\r
+\r
+ /* TODO: Call Os_PretaskHook()? */ \r
+ \r
+ /* Flow down */\r
+ \r
+/**\r
+ * void Os_ArchSwapContextTo( NULL, pcb_t *new )\r
+ * r3 - always NULL\r
+ * r4 - The pcb to switch to.\r
+ */ \r
Os_ArchSwapContextTo:\r
-// Get stack for new task\r
- lwz sp,PCB_STACK_CURR_P(r4)\r
-\r
-// Set new current process\r
- LOAD_ADDR_32(3,os_sys)\r
- stw r4,SYS_CURR_PCB_P(r3)\r
-\r
-// Restore C context\r
- lwz r0,C_CR_OFF(sp)\r
- mtcr r0\r
- lwz r0,C_LR_OFF (sp)\r
- mtlr r0\r
-\r
-// Get the context type\r
- lwz r0,C_CONTEXT_OFF(sp)\r
- cmpli 0,r0,SC_PATTERN\r
- beq+ os_sc_restore\r
- cmpli 0,r0,LC_PATTERN\r
- beq+ os_lc_restore\r
- b os_bad_bad\r
-\r
-\r
-// SC_xxx\r
-// C_xxxx <- We point here\r
-\r
-os_sc_restore:\r
- RESTORE_NVGPR(sp,(C_SIZE-14*GPR_SIZE))\r
- addi sp,sp,(C_SIZE+NVGPR_SIZE)\r
- // TODO: The blr will not do the trick if swapping to a user land task.\r
- blr\r
-\r
-os_lc_restore:\r
- addi r1,r1,C_SIZE\r
- RESTORE_NVGPR(1,0)\r
- addi r1,r1,-C_SIZE\r
- RESTORE_VGPR(1,C_SIZE)\r
-\r
- RESTORE_WORK_AND_MORE\r
+ /* Get stack for new task */\r
+ lwz sp,PCB_STACK_CURR_P(r4)\r
+\r
+ /* Set new current task */\r
+ LOAD_ADDR_32(3,Os_Sys)\r
+ stw r4,SYS_CURR_PCB_P(r3)\r
+\r
+ /* Restore C context */\r
+ lwz r0,FUNC_FRM_CR(sp)\r
+ mtcr r0\r
+ lwz r0,FUNC_FRM_LR (sp)\r
+ mtlr r0\r
+\r
+ /* Get the context type */\r
+ lwz r0, FUNC_FRM_PATTERN(sp)\r
+ cmpli 0, r0, FUNC_PATTERN\r
+ beq+ restoreFuncContext\r
+ cmpli 0, r0,ISR_PATTERN\r
+ beq+ restoreIsrContext\r
+ li r3, OS_ERR_BAD_CONTEXT\r
+ b Os_ArchPanic\r
+\r
+restoreFuncContext:\r
+#if defined(CFG_SPE)\r
+ evldd r14, FUNC_FRM_R14(sp)\r
+ evldd r15, FUNC_FRM_R15(sp)\r
+ evldd r16, FUNC_FRM_R16(sp)\r
+ evldd r17, FUNC_FRM_R17(sp)\r
+ evldd r18, FUNC_FRM_R18(sp)\r
+ evldd r19, FUNC_FRM_R19(sp)\r
+ evldd r20, FUNC_FRM_R20(sp)\r
+ evldd r21, FUNC_FRM_R21(sp)\r
+ evldd r22, FUNC_FRM_R22(sp)\r
+ evldd r23, FUNC_FRM_R23(sp)\r
+ evldd r24, FUNC_FRM_R24(sp)\r
+ evldd r25, FUNC_FRM_R25(sp)\r
+ evldd r26, FUNC_FRM_R26(sp)\r
+ evldd r27, FUNC_FRM_R27(sp)\r
+ evldd r28, FUNC_FRM_R28(sp)\r
+ evldd r29, FUNC_FRM_R29(sp)\r
+ evldd r30, FUNC_FRM_R30(sp)\r
+ evldd r31, FUNC_FRM_R31(sp)\r
+ addi sp,sp,(FUNC_FRM_SIZE)\r
+#else \r
+ lwz r14, FUNC_FRM_R14(sp)\r
+ lwz r15, FUNC_FRM_R15(sp)\r
+ lwz r16, FUNC_FRM_R16(sp)\r
+ lwz r17, FUNC_FRM_R17(sp)\r
+ lwz r18, FUNC_FRM_R18(sp)\r
+ lwz r19, FUNC_FRM_R19(sp)\r
+ lwz r20, FUNC_FRM_R20(sp)\r
+ lwz r21, FUNC_FRM_R21(sp)\r
+ lwz r22, FUNC_FRM_R22(sp)\r
+ lwz r23, FUNC_FRM_R23(sp)\r
+ lwz r24, FUNC_FRM_R24(sp)\r
+ lwz r25, FUNC_FRM_R25(sp)\r
+ lwz r26, FUNC_FRM_R26(sp)\r
+ lwz r27, FUNC_FRM_R27(sp)\r
+ lwz r28, FUNC_FRM_R28(sp)\r
+ lwz r29, FUNC_FRM_R29(sp)\r
+ lwz r30, FUNC_FRM_R30(sp)\r
+ lwz r31, FUNC_FRM_R31(sp)\r
+ addi sp,sp,(FUNC_FRM_SIZE)\r
+#endif \r
+ /* TODO: Call Os_PosttaskHook()? */\r
+ \r
+ blr\r
+\r
+\r
+/**\r
+ * External input exception handlers \r
+ */ \r
+ .global exception_IVOR4\r
+ .global restoreIsrContext\r
+ .balign 16\r
+exception_IVOR4:\r
+\r
+ /* Save the exception frame */\r
+ stwu sp,-EXC_FRM_SIZE(sp)\r
+\r
+ stw r3,EXC_FRM_R3(sp)\r
+\r
+ mfsrr0 r3\r
+ stw r3, EXC_FRM_SRR0(sp)\r
+ mfsrr1 r3\r
+ stw r3, EXC_FRM_SRR1(sp)\r
+\r
+ mfcr r3\r
+ stw r3, EXC_FRM_CR(sp) \r
+ mfxer r3 \r
+ stw r3, EXC_FRM_XER(sp)\r
+ mfctr r3\r
+ stw r3, EXC_FRM_CTR(sp)\r
+ mflr r3\r
+ stw r3, EXC_FRM_LR(sp) \r
+ \r
+ li r3,4\r
+ stw r3, EXC_FRM_VECTOR(sp)\r
+#if defined(CFG_SPE) \r
+\r
+ /* Enable SPE (exceptions turns it off) */\r
+ mfmsr r3\r
+ oris r3,r3,0x0200\r
+ mtmsr r3\r
+ isync\r
+\r
+ /* Create the frame */\r
+ addi sp,sp,-ISR_FRM_SIZE\r
+ evstdd r3, ISR_FRM_R3(sp) /* Save work reg */ \r
+ \r
+ /* SPEFSCR */\r
+ mfspr r3,SPR_SPEFSCR\r
+ clrlwi r3,r3,24 /* Mask off non-status bits */\r
+ stw r3,ISR_FRM_SPE_FSCR(sp)\r
+\r
+ /* Save SPE acc */\r
+ evsubfw r3,r3,r3 /* zero r3 */\r
+ evaddumiaaw r3,r3 /* Add r3 = r3 + acc -> r3 = acc */\r
+ evstdd r3,ISR_FRM_SPE_ACC(r1)\r
+ \r
+ evstdd r0, ISR_FRM_R0(sp)\r
+ evstdd r4, ISR_FRM_R4(sp)\r
+ evstdd r5, ISR_FRM_R5(sp)\r
+ evstdd r6, ISR_FRM_R6(sp)\r
+ evstdd r7, ISR_FRM_R7(sp)\r
+ evstdd r8, ISR_FRM_R8(sp)\r
+ evstdd r9, ISR_FRM_R9(sp)\r
+ evstdd r10, ISR_FRM_R10(sp)\r
+ evstdd r11, ISR_FRM_R11(sp)\r
+ evstdd r12, ISR_FRM_R12(sp)\r
+ evstdd r14, ISR_FRM_R14(sp)\r
+ evstdd r15, ISR_FRM_R15(sp)\r
+ evstdd r16, ISR_FRM_R16(sp)\r
+ evstdd r17, ISR_FRM_R17(sp)\r
+ evstdd r18, ISR_FRM_R18(sp)\r
+ evstdd r19, ISR_FRM_R19(sp)\r
+ evstdd r20, ISR_FRM_R20(sp)\r
+ evstdd r21, ISR_FRM_R21(sp)\r
+ evstdd r22, ISR_FRM_R22(sp)\r
+ evstdd r23, ISR_FRM_R23(sp)\r
+ evstdd r24, ISR_FRM_R24(sp)\r
+ evstdd r25, ISR_FRM_R25(sp)\r
+ evstdd r26, ISR_FRM_R26(sp)\r
+ evstdd r27, ISR_FRM_R27(sp)\r
+ evstdd r28, ISR_FRM_R28(sp)\r
+ evstdd r29, ISR_FRM_R29(sp)\r
+ evstdd r30, ISR_FRM_R30(sp)\r
+ addi sp,sp,8\r
+ evstdd r31, (ISR_FRM_R31-8)(sp)\r
+ addi sp,sp,-8\r
+#else\r
+ /* Save the ISR frame */\r
+ addi sp,sp,-ISR_FRM_SIZE\r
+ stw r0, ISR_FRM_R0(sp)\r
+ stw r4, ISR_FRM_R4(sp)\r
+ stw r5, ISR_FRM_R5(sp)\r
+ stw r6, ISR_FRM_R6(sp)\r
+ stw r7, ISR_FRM_R7(sp)\r
+ stw r8, ISR_FRM_R8(sp)\r
+ stw r9, ISR_FRM_R9(sp)\r
+ stw r10, ISR_FRM_R10(sp)\r
+ stw r11, ISR_FRM_R11(sp)\r
+ stw r12, ISR_FRM_R12(sp)\r
+ stw r14, ISR_FRM_R14(sp)\r
+ stw r15, ISR_FRM_R15(sp)\r
+ stw r16, ISR_FRM_R16(sp)\r
+ stw r17, ISR_FRM_R17(sp)\r
+ stw r18, ISR_FRM_R18(sp)\r
+ stw r19, ISR_FRM_R19(sp)\r
+ stw r20, ISR_FRM_R20(sp)\r
+ stw r21, ISR_FRM_R21(sp)\r
+ stw r22, ISR_FRM_R22(sp)\r
+ stw r23, ISR_FRM_R23(sp)\r
+ stw r24, ISR_FRM_R24(sp)\r
+ stw r25, ISR_FRM_R25(sp)\r
+ stw r26, ISR_FRM_R26(sp)\r
+ stw r27, ISR_FRM_R27(sp)\r
+ stw r28, ISR_FRM_R28(sp)\r
+ stw r29, ISR_FRM_R29(sp)\r
+ stw r30, ISR_FRM_R30(sp)\r
+ stw r31, ISR_FRM_R31(sp)\r
+#endif\r
+ \r
+ li r3,ISR_PATTERN\r
+ stw r3,ISR_FRM_PATTERN(sp)\r
+ /* Save the stack so it later can be saved in the pcb */ \r
+ mr r4,sp \r
+ \r
+ /* Switch to interrupt stack if at depth 0 */\r
+ /* Load the value Os_Sys.int_nest_cnt */\r
+ LOAD_IND_32(r3,Os_Sys+SYS_INT_NEST_CNT)\r
+ cmpli 0,r3,0\r
+ bne- on_int_stack\r
+\r
+ /* Load the interrupt stack */\r
+ LOAD_IND_32(r1,Os_Sys+SYS_INT_STACK)\r
+\r
+on_int_stack:\r
+\r
+#if defined(CFG_MPC5516)\r
+ lis r6, INTC_IACKR_PRC0@ha\r
+ lwz r6, INTC_IACKR_PRC0@l(r6)\r
+#elif defined(CFG_MPC5554) || defined(CFG_MPC5567)\r
+ lis r6, INTC_IACKR@ha \r
+ lwz r6, INTC_IACKR@l(r6)\r
+#endif\r
+ /* Check for 0 entry */\r
+ mr r5,r6\r
+ cmpli 0,r5,0\r
+ bne+ vectorOk\r
+ /* The entry was 0, call panic */\r
+ li r3,OS_ERR_SPURIOUS_INTERRUPT\r
+ li r4, 0\r
+ mr r5,r1\r
+ b Os_ArchPanic\r
+ \r
+vectorOk:\r
+ extrwi r5,r5,9,21\r
+ /* Check for soft INT */\r
+ cmpli 0,r5,7\r
+ bgt noSoftInt\r
+ /* Clear soft interrupt */\r
+ li r0,1 \r
+ lis r3, INTC_SSCIR0@h\r
+ ori r3, r3, INTC_SSCIR0@l\r
+ stbx r0,r5,r3 \r
+ \r
+noSoftInt: \r
+\r
+ lis r3, Os_Isr@h\r
+ ori r3, r3,Os_Isr@l\r
+ mtlr r3\r
+ mr r3,r4 /* "old" stack as arg1 */\r
+#if defined(OLD_CALL) \r
+ lwz r4, 0x0(r6) /* Read the address from the for function/pcb entry */\r
+#else\r
+ mr r4,r5\r
+#endif \r
+ blrl /* Call the entry */\r
+\r
+ /* Notes!\r
+ * The OS interrupt is ACK'd in Os_Isr(). For ISR1 it needs to call Irq_EOI()\r
+ */\r
+ \r
+ /* Irq_Entry have returned the stack we shall use */\r
+ mr sp,r3\r
+\r
+ /* Restore */\r
+restoreIsrContext:\r
+#if defined(CFG_SPE) \r
+\r
+ // Restore SPE control/status reg.\r
+ lwz r3,ISR_FRM_SPE_FSCR(sp)\r
+ mtspr SPR_CSRR0,r3\r
+\r
+ /* Restore SPE acc */\r
+ evldd r3,ISR_FRM_SPE_ACC(r1)\r
+ evmra r3,r3\r
+ \r
+\r
+ evldd r0, ISR_FRM_R0(sp)\r
+ evldd r3, ISR_FRM_R4(sp)\r
+ evldd r4, ISR_FRM_R4(sp)\r
+ evldd r5, ISR_FRM_R5(sp)\r
+ evldd r6, ISR_FRM_R6(sp)\r
+ evldd r7, ISR_FRM_R7(sp)\r
+ evldd r8, ISR_FRM_R8(sp)\r
+ evldd r9, ISR_FRM_R9(sp)\r
+ evldd r10, ISR_FRM_R10(sp)\r
+ evldd r11, ISR_FRM_R11(sp)\r
+ evldd r12, ISR_FRM_R12(sp)\r
+ evldd r14, ISR_FRM_R14(sp)\r
+ evldd r15, ISR_FRM_R15(sp)\r
+ evldd r16, ISR_FRM_R16(sp)\r
+ evldd r17, ISR_FRM_R17(sp)\r
+ evldd r18, ISR_FRM_R18(sp)\r
+ evldd r19, ISR_FRM_R19(sp)\r
+ evldd r20, ISR_FRM_R20(sp)\r
+ evldd r21, ISR_FRM_R21(sp)\r
+ evldd r22, ISR_FRM_R22(sp)\r
+ evldd r23, ISR_FRM_R23(sp)\r
+ evldd r24, ISR_FRM_R24(sp)\r
+ evldd r25, ISR_FRM_R25(sp)\r
+ evldd r26, ISR_FRM_R26(sp)\r
+ evldd r27, ISR_FRM_R27(sp)\r
+ evldd r28, ISR_FRM_R28(sp)\r
+ evldd r29, ISR_FRM_R29(sp)\r
+ evldd r30, ISR_FRM_R30(sp)\r
+ addi sp,sp,8\r
+ evldd r31, (ISR_FRM_R31-8)(sp)\r
+ addi sp,sp,-8\r
+#else\r
+ lwz r0, ISR_FRM_R0(sp)\r
+ lwz r4, ISR_FRM_R4(sp)\r
+ lwz r5, ISR_FRM_R5(sp)\r
+ lwz r6, ISR_FRM_R6(sp)\r
+ lwz r7, ISR_FRM_R7(sp)\r
+ lwz r8, ISR_FRM_R8(sp)\r
+ lwz r9, ISR_FRM_R9(sp)\r
+ lwz r10, ISR_FRM_R10(sp)\r
+ lwz r11, ISR_FRM_R11(sp)\r
+ lwz r12, ISR_FRM_R12(sp)\r
+ lwz r14, ISR_FRM_R14(sp)\r
+ lwz r15, ISR_FRM_R15(sp)\r
+ lwz r16, ISR_FRM_R16(sp)\r
+ lwz r17, ISR_FRM_R17(sp)\r
+ lwz r18, ISR_FRM_R18(sp)\r
+ lwz r19, ISR_FRM_R19(sp)\r
+ lwz r20, ISR_FRM_R20(sp)\r
+ lwz r21, ISR_FRM_R21(sp)\r
+ lwz r22, ISR_FRM_R22(sp)\r
+ lwz r23, ISR_FRM_R23(sp)\r
+ lwz r24, ISR_FRM_R24(sp)\r
+ lwz r25, ISR_FRM_R25(sp)\r
+ lwz r26, ISR_FRM_R26(sp)\r
+ lwz r27, ISR_FRM_R27(sp)\r
+ lwz r28, ISR_FRM_R28(sp)\r
+ lwz r29, ISR_FRM_R29(sp)\r
+ lwz r30, ISR_FRM_R30(sp)\r
+ lwz r31, ISR_FRM_R31(sp)\r
+#endif \r
+ \r
+ /* back to the exception frame */\r
+ addi sp,sp,ISR_FRM_SIZE\r
+ \r
+ lwz r3, EXC_FRM_LR(sp)\r
+ mtlr r3\r
+ lwz r3, EXC_FRM_CTR(sp)\r
+ mtctr r3\r
+ lwz r3, EXC_FRM_XER(sp)\r
+ mtxer r3\r
+ lwz r3, EXC_FRM_CR(sp)\r
+ mtcr r3\r
+ lwz r3, EXC_FRM_SRR0(sp)\r
+ mtsrr0 r3\r
+ lwz r3, EXC_FRM_SRR1(sp)\r
+ mtsrr1 r3\r
+ lwz r3, EXC_FRM_R3(sp)\r
+ addi sp,sp,EXC_FRM_SIZE\r
rfi\r
\r
-// When something really bad happens we end up here for the moment\r
-os_bad_bad:\r
- b os_bad_bad\r
-\r
-\r
\r
\r
-// ------------------------------------------------------------------\r
-\r
-/*\r
- * Trap interface !!!! See article http://www.linuxjournal.com/article/6516\r
- * http://www.osweekly.com/index.php?option=com_content&task=view&id=2229\r
+/**\r
+ * Decrementer exception. It just triggers soft interrupt 7.\r
+ *\r
*/\r
+exception_IVOR10:\r
+ stwu r3,-8(sp)\r
+ stw r4,4(sp)\r
\r
-/* The T32 instruction sim can't handle trap's so we have to make something\r
- * - write SRR0, SRR1, MSR\r
- * - jump to there routines\r
- */\r
+ /* ack dec int */\r
+ lis r3,0x0800\r
+ mtspr SPR_TSR,r3\r
\r
-// ------------------------------------------------------------------\r
+ /* Set soft int */\r
+ li r4,2\r
+ lis r3, INTC_SSCIR7@ha\r
+ stb r4, INTC_SSCIR7@l(r3)\r
\r
+ lwz r3,0(sp)\r
+ lwz r4,4(sp)\r
+ addi sp,sp,8\r
+ rfi\r
\r
-// System call, use this for trusted function ???\r
-// TODO: The example in autosar is not neccesary.. sc here here instead??\r
-//\r
-// NOTE!!!!!\r
-// Since the sc is a sync call, it should be enough to save NV regs(14->)\r
-// If I don't use the NV regs here I shouldn't need to save them\r
-// TODO: Inform compiler in SC_CALL() that I clobber volatile regs( r0, r3->\r
-// (since the compiler does not know it's a function call)\r
-// TODO: Could probably do this shorter....only NV regs that I use need saving\r
-// ( only cr2->cr4 according to e500 ABI )\r
\r
+/* Getting here means that the exception stack is started with:\r
+ * sp - saved\r
+ * r3 - saved and contains the exception number \r
+ */\r
+handleException:\r
+ b handleException \r
+ \r
+#if defined(__GNUC__) \r
+.section ".exception_tbl","ax"\r
+#elif defined(__CWCC__)\r
+.section .exception_tbl,4,"rw"\r
+#endif\r
+.balign 0x1000\r
+.global exception_tbl\r
+\r
+exception_tbl:\r
+ EXC_TABLE_CODE(0)\r
+ EXC_TABLE_CODE(1)\r
+ EXC_TABLE_CODE(2)\r
+ EXC_TABLE_CODE(3)\r
+ b exception_IVOR4\r
+ .skip +0xc\r
+ EXC_TABLE_CODE(5)\r
+ EXC_TABLE_CODE(6)\r
+ EXC_TABLE_CODE(7)\r
+ EXC_TABLE_CODE(8)\r
+ EXC_TABLE_CODE(9)\r
+ b exception_IVOR10\r
+ .skip +0xc\r
+ EXC_TABLE_CODE(11)\r
+ EXC_TABLE_CODE(12)\r
+ EXC_TABLE_CODE(13)\r
+ EXC_TABLE_CODE(14)\r
+#if defined(CFG_SPE)\r
+ EXC_TABLE_CODE(32)\r
+ EXC_TABLE_CODE(33)\r
+ EXC_TABLE_CODE(34)\r
+#endif\r
\r
\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include <stddef.h>\r
+#include "internal.h"\r
+#include "arch_stack.h"\r
+\r
+\r
+\r
+\r
+\r
+#if defined(__GNUC__)\r
+#define DECLARE(sym,val) \\r
+ __asm("#define " #sym " %0" : : "i" ((val)))\r
+\r
+#elif defined(__CWCC__)\r
+\r
+#pragma section ".apa" ".apa"\r
+\r
+#define DECLARE(_var,_offset) \\r
+ __declspec(section ".apa") char _var[100+_offset]\r
+#endif\r
+\r
+#if defined(__GNUC__)\r
+void oil_foo(void) {\r
+#endif\r
+\r
+/* Exceptions */\r
+ DECLARE(EXC_FRM_SIZE, sizeof(Os_ExceptionFrameType));\r
+ DECLARE(EXC_FRM_SP, offsetof(Os_ExceptionFrameType, sp));\r
+ DECLARE(EXC_FRM_SRR0, offsetof(Os_ExceptionFrameType, srr0));\r
+ DECLARE(EXC_FRM_SRR1, offsetof(Os_ExceptionFrameType, srr1));\r
+ DECLARE(EXC_FRM_LR, offsetof(Os_ExceptionFrameType, lr));\r
+ DECLARE(EXC_FRM_CTR, offsetof(Os_ExceptionFrameType, ctr));\r
+ DECLARE(EXC_FRM_XER, offsetof(Os_ExceptionFrameType, xer));\r
+ DECLARE(EXC_FRM_CR, offsetof(Os_ExceptionFrameType, cr));\r
+ DECLARE(EXC_FRM_R3, offsetof(Os_ExceptionFrameType, r3));\r
+ DECLARE(EXC_FRM_VECTOR, offsetof(Os_ExceptionFrameType, vector));\r
+\r
+\r
+ DECLARE(FUNC_FRM_SIZE, sizeof(Os_FuncFrameType));\r
+ DECLARE(FUNC_FRM_CR, offsetof(Os_FuncFrameType,cr));\r
+ DECLARE(FUNC_FRM_LR, offsetof(Os_FuncFrameType,lr));\r
+ DECLARE(FUNC_FRM_PATTERN, offsetof(Os_FuncFrameType,pattern));\r
+ DECLARE(FUNC_FRM_R14, offsetof(Os_FuncFrameType,r14));\r
+ DECLARE(FUNC_FRM_R15, offsetof(Os_FuncFrameType,r15));\r
+ DECLARE(FUNC_FRM_R16, offsetof(Os_FuncFrameType,r16));\r
+ DECLARE(FUNC_FRM_R17, offsetof(Os_FuncFrameType,r17));\r
+ DECLARE(FUNC_FRM_R18, offsetof(Os_FuncFrameType,r18));\r
+ DECLARE(FUNC_FRM_R19, offsetof(Os_FuncFrameType,r19));\r
+ DECLARE(FUNC_FRM_R20, offsetof(Os_FuncFrameType,r20));\r
+ DECLARE(FUNC_FRM_R21, offsetof(Os_FuncFrameType,r21));\r
+ DECLARE(FUNC_FRM_R22, offsetof(Os_FuncFrameType,r22));\r
+ DECLARE(FUNC_FRM_R23, offsetof(Os_FuncFrameType,r23));\r
+ DECLARE(FUNC_FRM_R24, offsetof(Os_FuncFrameType,r24));\r
+ DECLARE(FUNC_FRM_R25, offsetof(Os_FuncFrameType,r25));\r
+ DECLARE(FUNC_FRM_R26, offsetof(Os_FuncFrameType,r26));\r
+ DECLARE(FUNC_FRM_R27, offsetof(Os_FuncFrameType,r27));\r
+ DECLARE(FUNC_FRM_R28, offsetof(Os_FuncFrameType,r28));\r
+ DECLARE(FUNC_FRM_R29, offsetof(Os_FuncFrameType,r29));\r
+ DECLARE(FUNC_FRM_R30, offsetof(Os_FuncFrameType,r30));\r
+ DECLARE(FUNC_FRM_R31, offsetof(Os_FuncFrameType,r31));\r
+\r
+#if defined(CFG_SPE)\r
+ DECLARE(ISR_FRM_SPE_FSCR, offsetof(Os_IsrFrameType,fscr));\r
+ DECLARE(ISR_FRM_SPE_ACC, offsetof(Os_IsrFrameType,acc));\r
+ DECLARE(ISR_FRM_R3, offsetof(Os_IsrFrameType,acc));\r
+#endif\r
+\r
+ DECLARE(ISR_FRM_SIZE, sizeof(Os_IsrFrameType));\r
+ DECLARE(ISR_FRM_R0, offsetof(Os_IsrFrameType,r0));\r
+ DECLARE(ISR_FRM_R4, offsetof(Os_IsrFrameType,r4));\r
+ DECLARE(ISR_FRM_R5, offsetof(Os_IsrFrameType,r5));\r
+ DECLARE(ISR_FRM_R6, offsetof(Os_IsrFrameType,r6));\r
+ DECLARE(ISR_FRM_R7, offsetof(Os_IsrFrameType,r7));\r
+ DECLARE(ISR_FRM_R8, offsetof(Os_IsrFrameType,r8));\r
+ DECLARE(ISR_FRM_R9, offsetof(Os_IsrFrameType,r9));\r
+ DECLARE(ISR_FRM_R10, offsetof(Os_IsrFrameType,r10));\r
+ DECLARE(ISR_FRM_R11, offsetof(Os_IsrFrameType,r11));\r
+ DECLARE(ISR_FRM_R12, offsetof(Os_IsrFrameType,r12));\r
+ DECLARE(ISR_FRM_R14, offsetof(Os_IsrFrameType,r14));\r
+ DECLARE(ISR_FRM_R15, offsetof(Os_IsrFrameType,r15));\r
+ DECLARE(ISR_FRM_R16, offsetof(Os_IsrFrameType,r16));\r
+ DECLARE(ISR_FRM_R17, offsetof(Os_IsrFrameType,r17));\r
+ DECLARE(ISR_FRM_R18, offsetof(Os_IsrFrameType,r18));\r
+ DECLARE(ISR_FRM_R19, offsetof(Os_IsrFrameType,r19));\r
+ DECLARE(ISR_FRM_R20, offsetof(Os_IsrFrameType,r20));\r
+ DECLARE(ISR_FRM_R21, offsetof(Os_IsrFrameType,r21));\r
+ DECLARE(ISR_FRM_R22, offsetof(Os_IsrFrameType,r22));\r
+ DECLARE(ISR_FRM_R23, offsetof(Os_IsrFrameType,r23));\r
+ DECLARE(ISR_FRM_R24, offsetof(Os_IsrFrameType,r24));\r
+ DECLARE(ISR_FRM_R25, offsetof(Os_IsrFrameType,r25));\r
+ DECLARE(ISR_FRM_R26, offsetof(Os_IsrFrameType,r26));\r
+ DECLARE(ISR_FRM_R27, offsetof(Os_IsrFrameType,r27));\r
+ DECLARE(ISR_FRM_R28, offsetof(Os_IsrFrameType,r28));\r
+ DECLARE(ISR_FRM_R29, offsetof(Os_IsrFrameType,r29));\r
+ DECLARE(ISR_FRM_R30, offsetof(Os_IsrFrameType,r30));\r
+ DECLARE(ISR_FRM_R31, offsetof(Os_IsrFrameType,r31));\r
+ DECLARE(ISR_FRM_PATTERN, offsetof(Os_IsrFrameType,pattern));\r
+\r
+#if defined(__GNUC__)\r
+}\r
+#endif\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/*\r
+ * REF\r
+ * PowerPC e500 Application Binary Interface User\92s Guide\r
+ *\r
+ * DESCRIPTION\r
+ *\r
+ * REGISTER USE\r
+ * # V Description\r
+ * ---------------------------------------\r
+ * r0 Volatile\r
+ * r1 Stackframe\r
+ * r2 Special\r
+ * r3-r10 Arguments\r
+ * r3,r4 Return values\r
+ * r13 Small data ptr\r
+ * r14-31 SC Local variables\r
+ * CR SC Condition register\r
+ * LR Link resister\r
+ * CTR Counter registers\r
+ * XER Integer exception register\r
+ * SPEFSCR SPE status register *1\r
+ * ACC SPE accumulator *1\r
+ *\r
+ * *1 - Only for a MCU with SPE (e.g 5554)\r
+ * SC - Saved by callee\r
+ *\r
+ *\r
+ * EXCEPTION\r
+ * USAGE\r
+ * IVOR4 External int exceptions branches directly to the INTC handler\r
+ * IVOR8 System call Is called directly with some kind of argument.\r
+ * We need to save ISR context?\r
+ * IVOR10 Decrementer Probably just a small assembler routine to trigger a\r
+ * software interrupt.\r
+ * IVOR11 FIT ?\r
+ * IVOR12 Watchdog ?\r
+ * IVOR13 Data TLB Small assembler routine..\r
+ * IVOR14 Instr TLB Small assembler routine..\r
+ *\r
+ * For IVOR11 and IVOR14 it would probably be nice with a\r
+ * INTC (ISR1) direct function call.\r
+ *\r
+ * This leaves us with saving the lot for an IVOR4, for the rest we don't really\r
+ * care and just call Os_Panic( void *stack )\r
+ *\r
+ * FRAME\r
+ *\r
+ * Offs Reg\r
+ * ...\r
+ * ....\r
+ * 0x10 SCC1\r
+ * 0x0c SCC0\r
+ * 0x08 padding\r
+ * 0x04 Reserved (backchain)\r
+ * 0x00 SP\r
+ *\r
+ *\r
+ *\r
+ *\r
+ * EXCEPTION/IRQ TABLE\r
+ *\r
+ * EXCEPTION/IRQ FLOW\r
+ *
+ */\r
+\r
+\r
+#ifndef ARCH_STACK_H_\r
+#define ARCH_STACK_H_\r
+\r
+\r
+/*\r
+ * FULL_PATTERN is used indicate that a full register context is on the stack.\r
+ * FUNC_PATTERN indicates that a function register context is on the stack
+ */\r
+#define ISR_SPE_PATTERN 0x12\r
+#define FUNC_SPE_PATTERN 0x32\r
+#define ISR_PATTERN 0xde\r
+#define FUNC_PATTERN 0xad\r
+\r
+\r
+/* An interrupt that is not mapped */\r
+#define OS_ERR_SPURIOUS_INTERRUPT 1\r
+/* The context indicator is missing */\r
+#define OS_ERR_BAD_CONTEXT 2\r
+\r
+#if !defined(_ASSEMBLER_)\r
+#include <stdint.h>\r
+\r
+typedef struct {\r
+ uint32_t sp;\r
+ uint32_t backchain; /* TODO: Useless since we don't make any c-call from the frame? */\r
+ uint32_t padding; /* TODO: Useless since we don't make any c-call from the frame? */\r
+ uint32_t srr0;\r
+ uint32_t srr1;\r
+ uint32_t lr;\r
+ uint32_t ctr;\r
+ uint32_t xer;\r
+ uint32_t cr;\r
+ uint32_t vector;\r
+ uint32_t r3; /*11*4 = 44 < 48*/\r
+ uint32_t pad;\r
+} Os_ExceptionFrameType;\r
+\r
+#if defined(CFG_SPE)\r
+typedef struct {\r
+ uint32_t sp;\r
+ uint32_t backchain;\r
+ uint32_t padding;\r
+ uint32_t pattern;\r
+ uint32_t cr;\r
+ uint32_t lr;\r
+ uint64_t r14;\r
+ uint64_t r15;\r
+ uint64_t r16;\r
+ uint64_t r17;\r
+ uint64_t r18;\r
+ uint64_t r19;\r
+ uint64_t r20;\r
+ uint64_t r21;\r
+ uint64_t r22;\r
+ uint64_t r23;\r
+ uint64_t r24;\r
+ uint64_t r25;\r
+ uint64_t r26;\r
+ uint64_t r27;\r
+ uint64_t r28;\r
+ uint64_t r29;\r
+ uint64_t r30;\r
+ uint64_t r31;\r
+} Os_FuncFrameType;\r
+\r
+typedef struct {\r
+ uint32_t sr;\r
+ uint32_t backchain;\r
+ uint32_t padding;\r
+ uint32_t pattern;\r
+ uint64_t fscr;\r
+ uint64_t acc;\r
+ uint64_t r0;\r
+ /* r1 */\r
+ /* r2 */\r
+ uint64_t r3;\r
+ uint64_t r4;\r
+ uint64_t r5;\r
+ uint64_t r6;\r
+ uint64_t r7;\r
+ uint64_t r8;\r
+ uint64_t r9;\r
+ uint64_t r10;\r
+ uint64_t r11;\r
+ uint64_t r12;\r
+ /* r13 */\r
+ uint64_t r14;\r
+ uint64_t r15;\r
+ uint64_t r16;\r
+ uint64_t r17;\r
+ uint64_t r18;\r
+ uint64_t r19;\r
+ uint64_t r20;\r
+ uint64_t r21;\r
+ uint64_t r22;\r
+ uint64_t r23;\r
+ uint64_t r24;\r
+ uint64_t r25;\r
+ uint64_t r26;\r
+ uint64_t r27;\r
+ uint64_t r28;\r
+ uint64_t r29;\r
+ uint64_t r30;\r
+ uint64_t r31;\r
+} Os_IsrFrameType;\r
+#else\r
+typedef struct {\r
+ uint32_t sp;\r
+ uint32_t backchain;\r
+ uint32_t padding;\r
+ uint32_t pattern;\r
+ uint32_t cr;\r
+ uint32_t lr;\r
+ uint32_t r14;\r
+ uint32_t r15;\r
+ uint32_t r16;\r
+ uint32_t r17;\r
+ uint32_t r18;\r
+ uint32_t r19;\r
+ uint32_t r20;\r
+ uint32_t r21;\r
+ uint32_t r22;\r
+ uint32_t r23;\r
+ uint32_t r24;\r
+ uint32_t r25;\r
+ uint32_t r26;\r
+ uint32_t r27;\r
+ uint32_t r28;\r
+ uint32_t r29;\r
+ uint32_t r30;\r
+ uint32_t r31;\r
+} Os_FuncFrameType;\r
+\r
+typedef struct {\r
+ uint32_t sr;\r
+ uint32_t backchain;\r
+ uint32_t padding;\r
+ uint32_t pattern;\r
+ uint32_t r0;\r
+ /* r1 */\r
+ /* r2 */\r
+ /* r3, already save in exception frame */\r
+ uint32_t r4;\r
+ uint32_t r5;\r
+ uint32_t r6;\r
+ uint32_t r7;\r
+ uint32_t r8;\r
+ uint32_t r9;\r
+ uint32_t r10;\r
+ uint32_t r11;\r
+ uint32_t r12;\r
+ /* r13 */\r
+ uint32_t r14;\r
+ uint32_t r15;\r
+ uint32_t r16;\r
+ uint32_t r17;\r
+ uint32_t r18;\r
+ uint32_t r19;\r
+ uint32_t r20;\r
+ uint32_t r21;\r
+ uint32_t r22;\r
+ uint32_t r23;\r
+ uint32_t r24;\r
+ uint32_t r25;\r
+ uint32_t r26;\r
+ uint32_t r27;\r
+ uint32_t r28;\r
+ uint32_t r29;\r
+ uint32_t r30;\r
+ uint32_t r31; /* 3+32-4 + 1= 31 */\r
+} Os_IsrFrameType;\r
+\r
+#endif /* defined(CFG_SPE) */\r
+\r
+#endif /* !defined(_ASSEMLBER_) */\r
+\r
+\r
+\r
+#endif /* ARCH_STACK_H_ */\r
+\r
/* -------------------------------- Arctic Core ------------------------------\r
* Arctic Core - the open source AUTOSAR platform http://arccore.com\r
*\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+/* ----------------------------[includes]------------------------------------*/\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
+\r
+/* ----------------------------[includes]------------------------------------*/\r
+\r
#include "internal.h"\r
-#include "asm_book_e.h"\r
#include "irq_types.h"\r
#include "mpc55xx.h"\r
-#if !defined(USE_KERNEL)\r
-#include "Mcu.h"\r
-#endif\r
-\r
-#if defined(USE_KERNEL)\r
#include "pcb.h"\r
#include "sys.h"\r
#include "internal.h"\r
#include "task_i.h"\r
#include "hooks.h"\r
-\r
-#if 0\r
-#define INTC_SSCIR0_CLR7 7\r
-#define MLB_SERVICE_REQUEST 293\r
-#define CRITICAL_INPUT_EXCEPTION 320\r
-#define DEBUG_EXCEPTION 335\r
-#define NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS 336\r
-#endif\r
-\r
#include "debug.h"\r
-#endif\r
-#include "irq.h"\r
-\r
-static void dump_exception_regs( uint32_t *regs );\r
+#include "isr.h"\r
+#include <stdint.h>\r
\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+/* ----------------------------[private typedef]-----------------------------*/\r
typedef void (*f_t)( uint32_t *);\r
-//typedef void (*func_t)();\r
-//extern vfunc_t Irq_VectorTable[];\r
-extern void exception_tbl(void);\r
\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+//extern uintptr_t Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
+//extern uint8 Irq_IsrTypeTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
+//extern const OsIsrConstType *Irq_Map[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
\r
+static void dumpExceptionRegs( uint32_t *regs );\r
\r
-#if defined(USE_KERNEL)\r
-extern void * Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
-extern uint8 Irq_IsrTypeTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
-#else\r
-extern func_t Irq_VectorTable[];\r
-#endif\r
+/* ----------------------------[private variables]---------------------------*/\r
+extern void exception_tbl(void);\r
+\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
\r
// write 0 to pop INTC stack\r
void Irq_Init( void ) {\r
INTC.MCR.B.VTES = 0; // 4 byte offset between entries\r
#endif\r
\r
-\r
- // Pointless in software vector more???\r
-#if 0\r
- // Check alignment requirements for the INTC table\r
- assert( (((uint32_t)&Irq_VectorTable[0]) & 0x7ff) == 0 );\r
- #if defined(CFG_MPC5516)\r
- INTC.IACKR_PRC0.R = (uint32_t) & Irq_VectorTable[0]; // Set INTC ISR vector table\r
- #elif defined(CFG_MPC5554) || defined(CFG_MPC5567)\r
- INTC.IACKR.R = (uint32_t) & Irq_VectorTable[0]; // Set INTC ISR vector table\r
- #endif\r
-#endif\r
// Pop the FIFO queue\r
for (int i = 0; i < 15; i++)\r
{\r
#elif defined(CFG_MPC5554) || defined(CFG_MPC5567)\r
INTC.CPR.B.PRI = 0;\r
#endif\r
-\r
}\r
\r
void Irq_EOI( void ) {\r
#if defined(CFG_MPC5516)\r
- struct INTC_tag *intc = &INTC;\r
+ volatile struct INTC_tag *intc = &INTC;\r
intc->EOIR_PRC0.R = 0;\r
#elif defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
volatile struct INTC_tag *intc = &INTC;\r
#endif\r
}\r
\r
-\r
+#if 0\r
/**\r
*\r
* @param stack_p Ptr to the current stack.\r
uint32_t vector;\r
uint32_t *stack = (uint32_t *)stack_p;\r
uint32_t exc_vector = (EXC_OFF_FROM_BOTTOM+EXC_VECTOR_OFF) / sizeof(uint32_t);\r
+ const OsIsrConstType *isr;\r
\r
// Check for exception\r
if( stack[exc_vector]>=CRITICAL_INPUT_EXCEPTION )\r
}\r
}\r
\r
-#if defined(USE_KERNEL)\r
-\r
- if( Irq_GetIsrType(vector) == ISR_TYPE_1 ) {\r
- // It's a function, just call it.\r
- ((func_t)Irq_VectorTable[vector])();\r
+ isr = Os_IsrGet(exc_vector);\r
+ if( isr->type == ISR_TYPE_1 ) {\r
+ isr->entry();\r
return stack;\r
} else {\r
- // It's a PCB\r
- // Let the kernel handle the rest,\r
- return Os_Isr(stack, (void *)Irq_VectorTable[vector]);\r
- }\r
-\r
-\r
-#else\r
- //read address\r
- t = (func_t)Irq_VectorTable[vector];\r
-\r
- if( t == ((void *)0) )\r
- {\r
- while(1);\r
+ return Os_Isr(stack, vector);\r
}\r
-\r
- // Enable nestling interrupts\r
- Irq_Enable();\r
- t();\r
- Irq_Disable();\r
-\r
- if( vector < INTC_NUMBER_OF_INTERRUPTS )\r
- {\r
- // write 0 to pop INTC stack\r
- intc->EOIR_PRC0.R = 0;\r
- }\r
- return NULL;\r
-\r
-#endif\r
}\r
-\r
-\r
-\r
-#if defined(USE_KERNEL)\r
-\r
+#endif\r
\r
\r
static inline int osPrioToCpuPio( uint8_t prio ) {\r
\r
\r
\r
+#if 0\r
/**\r
* Attach an ISR type 1 to the interrupt controller.\r
*\r
}\r
\r
}\r
+#endif\r
+\r
+\r
+void Irq_EnableVector( int16_t vector, int priority, int core ) {\r
+\r
+ if (vector < INTC_NUMBER_OF_INTERRUPTS) {\r
+ Irq_SetPriority(core,vector + IRQ_INTERRUPT_OFFSET, osPrioToCpuPio(priority));\r
+ } else if ((vector >= CRITICAL_INPUT_EXCEPTION)\r
+ && (vector<= DEBUG_EXCEPTION)) {\r
+ } else {\r
+ /* Invalid vector! */\r
+ assert(0);\r
+ }\r
+}\r
+\r
+\r
+\r
+#if 0\r
+\r
+/**\r
+ *\r
+ * @param isrPtr\r
+ * @param type\r
+ * @param int_ctrl\r
+ */\r
+ISRType Irq_Attach( int vector ) {\r
+// Os_Sys.isrCnt\r
+// uint32_t vector = isrPtr->vector;\r
+\r
+ //Irq_VectorTable[vector] = (uintptr_t)isrPtr;\r
+// Irq_IsrTypeTable[vector] = type;\r
+// Irq_VectorTable[vector] = isrPtr;\r
+\r
+\r
+ if (vector < INTC_NUMBER_OF_INTERRUPTS) {\r
+ Irq_SetPriority(Irq_Map[vector]->core ,vector + IRQ_INTERRUPT_OFFSET, osPrioToCpuPio(Irq_Map[vector]->priority));\r
+ } else if ((vector >= CRITICAL_INPUT_EXCEPTION)\r
+ && (vector<= DEBUG_EXCEPTION)) {\r
+ } else {\r
+ /* Invalid vector! */\r
+ assert(0);\r
+ }\r
+\r
+\r
+ return;\r
+}\r
+#endif\r
\r
+#if 0\r
/**\r
* Attach a ISR type 2 to the interrupt controller.\r
*\r
* @param vector\r
*/\r
void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {\r
- OsPcbType *pcb;\r
+ OsTaskVarType *pcb;\r
\r
- pcb = os_find_task(tid);\r
+ pcb = Os_TaskGet(tid);\r
Irq_VectorTable[vector] = (void *)pcb;\r
Irq_IsrTypeTable[vector] = PROC_ISR2;\r
\r
assert(0);\r
}\r
}\r
-\r
-#endif /* defined(USE_KERNEL) */\r
-\r
-#if !defined(USE_KERNEL)\r
-/**\r
- * Installs a vector in intc vector table. It also sets the priority in the INTC\r
- * internal registers.\r
- *\r
- * This does NOT use the kernel\r
- *\r
- * @param func The function to install\r
- * @param vector INTC vector to install it to\r
- * @param priority INTC priority. 0 - Low prio. 15- Highest( NMI )\r
- * @param cpu\r
- */\r
-\r
-void Irq_InstallVector(void(*func)(), IrqType vector,\r
- uint8_t priority, Cpu_t cpu)\r
-{\r
- VALIDATE( ( 1 == Mcu_Global.initRun ), MCU_INTCVECTORINSTALL_SERVICE_ID, MCU_E_UNINIT );\r
- DEBUG(DEBUG_LOW,"Installing INTC vector:%d,prio:%d,cpu,%d\n",vector,priority,cpu);\r
- Irq_VectorTable[vector] = func;\r
-\r
- if (vector <= MLB_SERVICE_REQUEST)\r
- {\r
- INTC.PSR[vector].B.PRC_SEL = cpu;\r
- INTC.PSR[vector].B.PRI = priority;\r
-\r
- Irq_VectorTable[vector] = func;\r
- } else if ((vector >= CRITICAL_INPUT_EXCEPTION)\r
- && (vector <= DEBUG_EXCEPTION))\r
- {\r
- Irq_VectorTable[vector] = func;\r
- } else\r
- {\r
- /* Invalid vector! */\r
- assert(0);\r
- }\r
-}\r
#endif\r
\r
\r
-\r
/**\r
* Generates a soft interrupt\r
* @param vector\r
// ExceptionSave(srr0,srr1,esr,mcsr,dear;)\r
// CSRR0, CSSR1\r
// Nothing more\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
{\r
// CSRR0, CSSR1\r
// MCSR - Source of machine check\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
// Data Storage Interrupt\r
{\r
// SRR0, SRR1\r
// ESR - lots of stuff\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
{\r
// SRR0, SRR1\r
// ESR - lots of stuff\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
// SRR0, SRR1\r
// ESR - lots of stuff\r
// DEAR - Address of load store that caused the exception\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
{\r
// SRR0, SRR1\r
// ESR - lots of stuff\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
void IVOR7Exception (uint32_t *regs)\r
{\r
// SRR0, SRR1\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
{\r
// SRR0, SRR1\r
// ESR\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
void IVOR9Exception (uint32_t *regs)\r
{\r
// Does not happen on e200\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
#if 0\r
void IVOR11Exception (uint32_t *regs)\r
{\r
// SRR0, SRR1\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
void IVOR12Exception (uint32_t *regs)\r
{\r
// SRR0, SRR1\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
{\r
// SRR0, SRR1\r
// ESR - MIF set, All others cleared\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
void IVOR15Exception (uint32_t *regs)\r
{\r
// Debug\r
- dump_exception_regs(regs);\r
+ dumpExceptionRegs(regs);\r
while (1);\r
}\r
\r
\r
\r
\r
-static void dump_exception_regs( uint32_t *regs ) {\r
+static void dumpExceptionRegs( uint32_t *regs ) {\r
exc_stack_t *r = (exc_stack_t *)regs;\r
\r
LDEBUG_PRINTF("sp %08x srr0 %08x srr1 %08x\n",r->sp,r->srr0,r->srr1);\r
}\r
\r
#else\r
-static void dump_exception_regs( uint32_t *regs ) {\r
+static void dumpExceptionRegs( uint32_t *regs ) {\r
}\r
#endif\r
\r
-#if !defined(USE_KERNEL)\r
-func_t Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS] __attribute__ ((aligned (0x800))) = {\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 00 - 04 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 05 - 09 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 10 - 14 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 15 - 19 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 20 - 24 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 25 - 29 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 30 - 34 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 35 - 39 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 40 - 44 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 45 - 49 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 50 - 54 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 55 - 59 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 60 - 64 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 55 - 69 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 70 - 74 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 75 - 79 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 80 - 84 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 85 - 89 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 90 - 94 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 95 - 99 */\r
-\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 100 - 104 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 105 - 109 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 110 - 114 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 115 - 119 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 120 - 124 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 125 - 129 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 130 - 134 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 135 - 139 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 140 - 144 */\r
- dummy, dummy, dummy, dummy, dummy /* PIT1 */, /* ISRs 145 - 149 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 150 - 154 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 155 - 159 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 160 - 164 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 155 - 169 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 170 - 174 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 175 - 179 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 180 - 184 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 185 - 189 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 190 - 194 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 195 - 199 */\r
-\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 200 - 204 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 205 - 209 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 210 - 214 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 215 - 219 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 220 - 224 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 225 - 229 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 230 - 234 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 235 - 239 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 240 - 244 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 245 - 249 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 250 - 254 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 255 - 259 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 260 - 264 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 255 - 269 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 270 - 274 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 275 - 279 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 280 - 284 */\r
- dummy, dummy, dummy, dummy, dummy, /* ISRs 285 - 289 */\r
- dummy, dummy, dummy, dummy, /* ISRs 290 - 293 */\r
-\r
- /* Some reserved vectors between INC interrupts and exceptions. */\r
- dummy, /* INTC_NUMBER_OF_INTERRUPTS */\r
-\r
- dummy, dummy, dummy, dummy, dummy,\r
- dummy, dummy, dummy, dummy, dummy,\r
- dummy, dummy, dummy, dummy, dummy,\r
- dummy, dummy, dummy, dummy, dummy,\r
- dummy, dummy, dummy, dummy, dummy,\r
-\r
- IVOR0Exception, /* CRITICAL_INPUT_EXCEPTION, */\r
- IVOR1Exception, /* MACHINE_CHECK_EXCEPTION */\r
- IVOR2Exception, /* DATA_STORAGE_EXCEPTION */\r
- IVOR3Exception, /* INSTRUCTION_STORAGE_EXCEPTION */\r
- dummy, /* EXTERNAL_INTERRUPT */\r
- /* This is the place where the "normal" interrupts will hit the CPU... */\r
- IVOR5Exception, /* ALIGNMENT_EXCEPTION */\r
- IVOR6Exception, /* PROGRAM_EXCEPTION */\r
- IVOR7Exception, /* FLOATING_POINT_EXCEPTION */\r
- IVOR8Exception, /* SYSTEM_CALL_EXCEPTION */\r
- dummy, /* AUX_EXCEPTION Not implemented in MPC5516. */\r
- dummy, /* DECREMENTER_EXCEPTION */\r
- IVOR11Exception, /* FIXED_INTERVAL_TIMER_EXCEPTION */\r
- IVOR12Exception, /* WATCHDOG_TIMER_EXCEPTION */\r
- IVOR13Exception, /* DATA_TLB_EXCEPTION */\r
- IVOR14Exception, /* INSTRUCTION_TLB_EXCEPTION */\r
- IVOR15Exception, /* DEBUG_EXCEPTION */\r
-};\r
-\r
-void dummy (void) {\r
- while (1){\r
- /* TODO: Rename and check for what spurious interrupt have happend */\r
- };\r
- }\r
-\r
-#endif\r
-\r
DATA_TLB_EXCEPTION,\r
INSTRUCTION_TLB_EXCEPTION,\r
DEBUG_EXCEPTION,\r
- NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS,\r
+ NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS\r
}IrqType;\r
\r
typedef enum {\r
PERIPHERAL_CLOCK_ESCI_G,\r
PERIPHERAL_CLOCK_ESCI_H,\r
PERIPHERAL_CLOCK_IIC_A,\r
- PERIPHERAL_CLOCK_MLB,\r
+ PERIPHERAL_CLOCK_MLB\r
} McuE_PeriperalClock_t;\r
\r
\r
\r
typedef enum {\r
CPU_CORE0,\r
- CPU_CORE1,\r
+ CPU_CORE1\r
} Cpu_t;\r
\r
#define IRQ_INTERRUPT_OFFSET 0\r
--- /dev/null
+\r
+MEMORY\r
+{\r
+ flash: org = 0x00000000, len = 0x00060000 \r
+ sram: org = 0x40000000, len = 0x00008000 \r
+}\r
+\r
+SECTIONS\r
+{\r
+ GROUP : {\r
+ .rcw : { *(.rcw) }\r
+ .text : { \r
+ *(.exception_tbl)\r
+ *(.text)\r
+ *(.rodata)\r
+ *(.ctors)\r
+ *(.dtors) \r
+ *(.init) \r
+ *(.fini) \r
+ *(.eini)\r
+ . = (.+15);\r
+ } \r
+ .sdata2 : {} /* really PPC.EMB.sdata2?, r2 should point here */\r
+ extab : {} \r
+ extabindex : {}\r
+ . = ALIGN(0x10);\r
+ __DATA_ROM = .;\r
+ .=.+SIZEOF(.data);\r
+ __SDATA = .;\r
+ .=.+SIZEOF(.sdata);\r
+ __SDATA0 = .;\r
+ .=.+SIZEOF(.PPC.EMB.sdata0);\r
+ } > flash\r
+\r
+ GROUP : {\r
+ __DATA_RAM = .; \r
+ .data (DATA) LOAD(ADDR(__DATA_ROM)) : {}\r
+ .sdata (DATA) LOAD(ADDR(__SDATA)): {} /* .sdata - Initialized small data */\r
+ __DATA_END = . ;\r
+ } > sram\r
+ \r
+ GROUP : {\r
+ __BSS_START = .;\r
+ .sbss (BSS) : {} /* sbss - un-initialized small data */ \r
+ .bss (BSS) : {} \r
+ __BSS_END = .;\r
+ .PPC.EMB.sdata0 LOAD(ADDR(__SDATA0)) : {} /* Small data with offset to 0 */ \r
+ .PPC.EMB.sbss0 : {}\r
+ .ramlog (DATA) : { *(.ramlog) }\r
+ _heap_addr = .; \r
+ } > sram\r
+} \r
+\r
+_heap_end = ADDR(sram)+SIZEOF(sram);\r
+__SP_INIT = _heap_end;\r
OUTPUT_ARCH(powerpc)\r
ENTRY(_start)\r
\r
-\r
+/*\r
+ * _idata - Start of .data in flash \r
+ * _data - start address of .data in RAM\r
+ * _edata - end address of .data in RAM\r
+ * _bss - start address of .bss\r
+ * _ebss - end address of .bss\r
+ * _etext - end of .text\r
+ * _end - End of something.... \r
+ * \r
+ * More stuff:\r
+ * \r
+ * _arc_heap_start\r
+ * _arc_heap_end\r
+ * _arc_stack\r
+ *\r
+ * Dwarf stuff: (same as Dwarf3 .debug_frame? )\r
+ * eh_frame_hdr (C++ only? unwind info for C++ exceptions?)\r
+ * eh_frame (C++ only?)\r
+ *\r
+ * Exception table:\r
+ * _exc_frame_start\r
+ * _exc_frame_end\r
+ *\r
+ * PowerPC EABI special:\r
+ * _SDA2_BASE_\r
+ * _SDA_BASE\r
+ */\r
\r
MEMORY\r
{\r
\r
.data : {\r
. = . + ALIGN(4);\r
- __DATA_RAM = .; *(.data .data.* .gnu.linkonce.d.* .gnu.linkonce.r.* .eh_frame)\r
+ __DATA_RAM = .; \r
+ *(.data .data.* .gnu.linkonce.d.* .gnu.linkonce.r.* .eh_frame)\r
} > ram AT> flash\r
\r
.sdata : {\r
__SBSS_START__ = .;\r
*(.sbss .sbss.* .scommon .gnu.linkonce.sb.* .t32_outport);\r
__SBSS_END__ = .;\r
+ _end = .;\r
} > ram\r
\r
- .got2 ALIGN(0x10): {. = . + ALIGN(16);*(.got2); . = . + ALIGN(8); } > ram\r
- .fixup : { . = . + ALIGN(16);*(.fixup); . = . + ALIGN(8); } > ram\r
- .t32_outport ALIGN(0x10): { *(.t32_outport); } > ram\r
- .got : AT(ALIGN(LOADADDR(.sdata)+SIZEOF(.sdata),4)) { *(.got.plt) *(.got) } > ram\r
- /* .bss : { *(.bss .bss.* COMMON .gnu.linkonce.b.*);__BSS_END = .; } > ram */\r
- .bss : AT(ADDR(.bss)) { *(.bss .bss.* COMMON .gnu.linkonce.b.*);__BSS_END = .; } > ram\r
- .init_stack ALIGN(16) (NOLOAD) : { __SP_END = .;. = . + 1000; __SP_INIT = .; } > ram\r
+ .got2 ALIGN(0x10): \r
+ {\r
+ . = . + ALIGN(16);\r
+ *(.got2); \r
+ . = . + ALIGN(8); \r
+ } > ram\r
+ .fixup : \r
+ { \r
+ . = . + ALIGN(16);\r
+ *(.fixup);\r
+ . = . + ALIGN(8); \r
+ } > ram\r
+ .t32_outport ALIGN(0x10): \r
+ { \r
+ *(.t32_outport); \r
+ } > ram\r
+ \r
+ .got : AT(ALIGN(LOADADDR(.sdata)+SIZEOF(.sdata),4)) \r
+ { \r
+ *(.got.plt) *(.got) \r
+ } > ram\r
+ \r
+ .bss : AT(ADDR(.bss)) \r
+ { \r
+ *(.bss .bss.* COMMON .gnu.linkonce.b.*);\r
+ __BSS_END = .; \r
+ } > ram\r
+ .init_stack ALIGN(16) (NOLOAD) : \r
+ { \r
+ __SP_END = .;\r
+ . = . + 1000; \r
+ __SP_INIT = .; \r
+ } > ram\r
+ \r
/* Fls RAM section */\r
.fls_ram ALIGN(16) (NOLOAD) : {\r
__FLS_ERASE_RAM__ = .;\r
. = . + SIZEOF(.fls_rom);\r
} > ram\r
+ \r
+ /* Always place last in RAM */\r
+ .heap ALIGN(0x4): {\r
+ PROVIDE(_heap_start = .);\r
+ } > ram\r
+ \r
\r
.ctors :\r
{\r
.debug_varnames 0 : { *(.debug_varnames) }\r
}\r
\r
+_heap_end = ORIGIN(ram) + LENGTH(ram);\r
+\r
__TEXT_START = ADDR(.text);\r
__RAM_START = ADDR(.sdata);\r
\r
+\r
+_BOARD_COMMON_MK:=y # Include guard for backwards compatability\r
+\r
obj-$(CFG_PPC) += crt0.o\r
obj-$(CFG_HC1X) += crt0.o\r
+\r
vpath-$(CFG_ARM_CM3) += $(ROOTDIR)/$(ARCH_PATH-y)/kernel\r
vpath-$(CFG_ARM_CM3) += $(ROOTDIR)/$(ARCH_PATH-y)/drivers/STM32F10x_StdPeriph_Driver/src\r
vpath-$(CFG_ARM_CM3) += $(ROOTDIR)/$(ARCH_PATH-y)/drivers/STM32_ETH_Driver/src\r
#stm32 lib files needed by drivers\r
obj-$(CFG_ARM_CM3) += stm32f10x_rcc.o\r
obj-$(CFG_ARM_CM3)-$(USE_CAN) += stm32f10x_can.o\r
-obj-$(CFG_ARM_CM3)-$(USE_DIO) += stm32f10x_gpio.o\r
+obj-$(CFG_ARM_CM3)-$(USE_PORT) += stm32f10x_gpio.o\r
obj-$(CFG_ARM_CM3)-$(USE_ADC) += stm32f10x_adc.o\r
obj-$(CFG_ARM_CM3)-$(USE_ADC) += stm32f10x_dma.o\r
obj-$(CFG_ARM_CM3)-$(USE_FLS) += stm32f10x_flash.o\r
# Mcu\r
obj-$(USE_MCU) += Mcu.o\r
obj-$(USE_MCU) += Mcu_Cfg.o\r
-obj-$(CFG_MPC55XX)-$(USE_MCU) += Mcu_Exceptions.o\r
+#obj-$(CFG_MPC55XX)-$(USE_MCU) += Mcu_Exceptions.o\r
\r
# Flash\r
obj-$(USE_FLS) += Fls.o\r
\r
#Wdg\r
obj-$(USE_WDG) += Wdg.o\r
+obj-$(USE_WDG) += Wdg_Lcfg.o\r
+\r
+#WdgIf\r
+obj-$(USE_WDG) += WdgIf.o\r
+obj-$(USE_WDG) += WdgIf_Cfg.o\r
+inc-y += $(ROOTDIR)/system/WdgIf\r
+vpath-y += $(ROOTDIR)/system/WdgIf\r
\r
#WdgM\r
obj-$(USE_WDGM) += WdgM.o\r
-obj-$(USE_WDGM) += WdgM_Cfg.o\r
+obj-$(USE_WDGM) += WdgM_PBcfg.o\r
+inc-y += $(ROOTDIR)/system/WdgM\r
+vpath-y += $(ROOTDIR)/system/WdgM\r
\r
#Pwm\r
obj-$(USE_PWM) += Pwm.o\r
obj-$(USE_COM) += Com_Com.o\r
obj-$(USE_COM) += Com_Sched.o\r
obj-$(USE_COM) += Com.o\r
-obj-$(USE_COM) += Com_RunTest.o\r
obj-$(USE_COM) += Com_misc.o\r
-#obj-$(USE_COM) += Com_TestData.o\r
inc-$(USE_PDUR) += $(ROOTDIR)/communication/Com\r
inc-$(USE_COM) += $(ROOTDIR)/communication/Com\r
vpath-$(USE_COM) += $(ROOTDIR)/communication/Com\r
#SLEEP\r
obj-$(USE_SLEEP) += sleep.o\r
\r
-\r
-# Newlib overrides (overridden by default)\r
-ifneq ($(CFG_STANDARD_NEWLIB),y)\r
obj-y += xtoa.o\r
-obj-y += newlib_port.o\r
-# If we have configured console output we include printf. \r
-# Overridden to use lib implementation with CFG_NEWLIB_PRINTF\r
-ifneq ($(CFG_NEWLIB_PRINTF),y)\r
-# TODO: This assumes that you print to console.. but you could\r
-# just print to a buffer, e.g. sprintf() \r
-ifneq (,$(SELECT_CONSOLE) $(SELECT_OS_CONSOLE))\r
-obj-y += printf.o\r
-\r
-endif # SELECT_CONSOLE\r
-endif # CFG_NEWLIB_PRINTF\r
-endif # CFG_STANDARD_NEWLIB\r
+\r
+SELECT_CLIB?=CLIB_NEWLIB\r
+\r
+ifeq ($(SELECT_CLIB),CLIB_CW)\r
+ # This is not good, but don't know what to do right now....\r
+ obj-y += msl_port.o\r
+else\r
+ # Newlib\r
+ obj-y += newlib_port.o\r
+ # If we have configured console output we include printf. \r
+ # Overridden to use lib implementation with CFG_NEWLIB_PRINTF\r
+ ifneq ($(CFG_NEWLIB_PRINTF),y)\r
+ ifneq (,$(SELECT_CONSOLE) $(SELECT_OS_CONSOLE))\r
+ obj-y += printf.o\r
+ endif # SELECT_CONSOLE\r
+ endif # CFG_NEWLIB_PRINTF\r
+endif # SELECT_CLIB \r
+\r
\r
obj-y += $(obj-y-y)\r
\r
\r
# libs needed by us\r
#build-lib-y += $(ROOTDIR)/libs/libboard_$(BOARDDIR).a\r
+\r
#define DEM_DEV_ERROR_DETECT STD_ON // Activate/Deactivate Dev Error Detection and Notification.\r
#define DEM_OBD_SUPPORT STD_OFF\r
#define DEM_PTO_SUPPORT STD_OFF\r
-#define DEM_TYPE_OF_DTC_SUPPORTED DEM_ISO14229_1\r
+#define DEM_TYPE_OF_DTC_SUPPORTED 0x01 // ISO14229-1\r
#define DEM_DTC_STATUS_AVAILABILITY_MASK 0xFF\r
#define DEM_CLEAR_ALL_EVENTS STD_OFF // All event or only events with DTC is cleared with Dem_ClearDTC\r
\r
*/\r
#warning "This default file may only be used as an example!"\r
\r
-#ifndef _DET_CFG_H_\r
-#define _DET_CFG_H_\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H\r
\r
#define DET_ENABLE_CALLBACKS STD_ON // Enable to use callback on errors\r
#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
#define DET_RAMLOG_SIZE (32) // Number of entries in ramlog\r
#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
\r
-#endif /*_DET_CFG_H_*/\r
+#endif /*DET_CFG_H*/\r
\r
#warning "This default file may only be used as an example!"
-#include "EcuM.h"\r
+#include "EcuM.h"
+#include "EcuM_Cbk.h"\r
#include "Det.h"\r
#if defined(USE_DEM)\r
#include "Dem.h"\r
#if defined(USE_LINSM)
#include "LinSM.h"
#endif
+#if defined(USE_WDG)
+#include "Wdg.h"
+#endif
+#if defined(USE_WDGM)
+#include "WdgM.h"
+#endif
+
\r
-void EcuM_AL_DriverInitZero()\r
+void EcuM_AL_DriverInitZero(void)\r
{\r
- Det_Init();\r
- Det_Start();\r
+ Det_Init();/** @req EcuM2783 */\r
+ Det_Start();/** @req EcuM2634 */\r
}\r
\r
-EcuM_ConfigType* EcuM_DeterminePbConfiguration()\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
{\r
return &EcuMConfig;\r
}\r
-\r
+
void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
-{\r
+{
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
#if defined(USE_MCU)\r
Mcu_Init(ConfigPtr->McuConfig);\r
\r
- // Set up default clock (Mcu_InitClock requires initRun==1)\r
- Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+ /* Set up default clock (Mcu_InitClock requires initRun==1) */
+ /* Ignoring return value */\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
\r
// Wait for PLL to sync.\r
- while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
- ;\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)
+ {\r
+ ;
+ }\r
#endif\r
\r
#if defined(USE_DEM)\r
#endif\r
\r
// Setup watchdog\r
- // TODO\r
+ #if defined(USE_WDG)
+ Wdg_Init(ConfigPtr->WdgConfig);
+#endif
+#if defined(USE_WDGM)
+ WdgM_Init(ConfigPtr->WdgMConfig);
+#endif
+\r
\r
#if defined(USE_DMA)\r
// Setup DMA\r
}\r
\r
void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
-{\r
+{
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules
+\r
#if defined(USE_SPI)\r
// Setup SPI\r
Spi_Init(ConfigPtr->SpiConfig);\r
// Setup IO hardware abstraction layer\r
IoHwAb_Init();\r
#endif\r
-\r
}\r
\r
-void EcuM_AL_DriverInitThree(const EcuM_ConfigType ConfigPtr)\r
-{\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules
+\r
#if defined(USE_DEM)\r
// Setup DEM\r
Dem_Init();\r
EcuM_ConfigType EcuMConfig =\r
{\r
.EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
- .EcuMDefaultShutdownMode = 0, // Don't care\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
.EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
.EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,
.EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,
#if defined(USE_PWM)
.PwmConfig = &PwmConfig,
#endif
+#if defined(USE_WDG)
+ .WdgConfig = &WdgConfig,
+#endif
+#if defined(USE_WDGM)
+ .WdgMConfig = &WdgMConfig,
+#endif
#if defined(USE_GPT)
- .GptConfig = GptConfigData,
+ .GptConfig = GptConfigData,
#endif
#if defined(USE_FLS)
.FlashConfig = FlsConfigSet,
\r
#warning "This default file may only be used as an example!"\r
\r
-#if (ECUM_SW_MAJOR_VERSION != 2 && ECUM_SW_MINOR_VERSION != 0)\r
+#if ((ECUM_SW_MAJOR_VERSION != 2) && (ECUM_SW_MINOR_VERSION != 0))\r
#error "EcuM: Configuration file version differs from BSW version."\r
#endif\r
\r
#warning "This default file may only be used as an example!"
-#if (ECUM_SW_MAJOR_VERSION != 2 && ECUM_SW_MINOR_VERSION != 0)
+#if ((ECUM_SW_MAJOR_VERSION != 2) && (ECUM_SW_MINOR_VERSION != 0))
#error "EcuM: Configuration file version differs from BSW version."
#endif
#if defined(USE_GPT)
#include "Gpt.h"
#endif
+#if defined(USE_WDG)
+#include "Wdg.h"
+#endif
+#if defined(USE_WDGM)
+#include "WdgM.h"
+#endif
#if defined(USE_COMM)
#include "ComM.h"
#endif
typedef struct\r
{\r
EcuM_StateType EcuMDefaultShutdownTarget;\r
- uint8 EcuMDefaultShutdownMode;\r
+ uint8 EcuMDefaultSleepMode;\r
AppModeType EcuMDefaultAppMode;\r
uint32 EcuMRunMinimumDuration;
uint32 EcuMNvramReadAllTimeout;
#if defined(USE_ADC)
const Adc_ConfigType* AdcConfig;
#endif
+#if defined(USE_WDG)
+ const Wdg_ConfigType* WdgConfig;
+#endif
+#if defined(USE_WDGM)
+ const WdgM_ConfigType* WdgMConfig;
+#endif
#if defined(USE_GPT)
const Gpt_ConfigType* GptConfig;
#endif
\r
# What buildable modules does this board have, \r
# default or private\r
-MOD_AVAIL+=COM PDUR DET DCM DEM COMM CANSM CANTP CANIF CANNM NM RTE FEE NVM\r
+MOD_AVAIL+=COM PDUR WDGM WDGIF DET DCM DEM COMM CANSM CANTP CANIF CANNM NM RTE FEE NVM ECUM MCU\r
\r
# Needed by us\r
MOD_USE=\r
#define CANIF_TRANSCEIVER_API STD_OFF /**< Not supported */\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF /**< Not supported */\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
\r
//-------------------------------------------------------------------\r
\r
\r
#warning "This default file may only be used as an example!"\r
\r
-#ifndef _DET_CFG_H_\r
-#define _DET_CFG_H_\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H\r
\r
#define DET_ENABLE_CALLBACKS STD_ON /**< Enable to use callback on errors */\r
#define DET_USE_RAMLOG STD_ON /**< Enable to log DET errors to ramlog */\r
#define DET_RAMLOG_SIZE (32) /**< Number of entries in ramlog */\r
#define DET_NUMBER_OF_CALLBACKS (5) /**< Number of callbacks */\r
\r
-#endif /*_DET_CFG_H_*/\r
+#endif /*DET_CFG_H*/\r
/** @} */\r
// This parameter is the number of bytes written within one job processing cycle in fast mode\r
Eep_LengthType EepFastWriteBlockSize;\r
\r
+ // This parameter is the EEPROM page size, i.e. number of bytes.
+ Eep_LengthType EepPageSize;
+
// This parameter is the EEPROM device base address.\r
Eep_AddressType EepBaseAddress;\r
} Eep_ConfigType;\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
.EepJobCallCycle = 0.2,\r
\r
// This parameter is the used size of EEPROM device in bytes.\r
- .EepSize = 0x8000,\r
+// .EepSize = 0x8000,\r
+ .EepSize = 0x2000,\r
\r
// This parameter is a reference to a callback function for positive job result\r
.Eep_JobEndNotification = &_JobEndNotify,\r
// This parameter is the default EEPROM device mode after initialization.\r
.EepDefaultMode = MEMIF_MODE_FAST,\r
\r
+ // Number of bytes read within one job processing cycle in normal mode.
+ .EepNormalReadBlockSize = 4,
+
// This parameter is the number of bytes read within one job processing cycle in fast mode\r
.EepFastReadBlockSize = 64,\r
\r
- .EepNormalReadBlockSize = 4,\r
-\r
// Number of bytes written within one job processing cycle in normal mode.\r
.EepNormalWriteBlockSize = 1,\r
\r
+ // This parameter is the number of bytes written within one job processing cycle in fast mode
+ .EepFastWriteBlockSize = 64,
+
// This parameter is a reference to a callback function for negative job result\r
.Eep_JobErrorNotification = &_JobErrorNotify,\r
\r
- // This parameter is the number of bytes written within one job processing cycle in fast mode\r
- .EepFastWriteBlockSize = 64,\r
+ // This parameter is the EEPROM page size, i.e. number of bytes.
+ .EepPageSize = 64,
\r
// This parameter is the EEPROM device base address.\r
.EepBaseAddress = 0\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
#define CANIF_TRANSCEIVER_API STD_OFF // Not supported\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
\r
//-------------------------------------------------------------------\r
/*\r
*/\r
#warning "This default file may only be used as an example!"\r
\r
-#ifndef _DET_CFG_H_\r
-#define _DET_CFG_H_\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H\r
\r
#define DET_ENABLE_CALLBACKS STD_ON // Enable to use callback on errors\r
#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
#define DET_RAMLOG_SIZE (32) // Number of entries in ramlog\r
#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
\r
-#endif /*_DET_CFG_H_*/\r
+#endif /*DET_CFG_H*/\r
ARCH_MCU=mpc5554\r
\r
# CFG (y/n) macros\r
-CFG=PPC BOOKE SPE E200Z6 MPC55XX MPC5554 BRD_MPC5554SIM SIMULATOR\r
+CFG=PPC BOOKE SPE E200Z6 MPC55XX MPC555X MPC5554 BRD_MPC5554SIM SIMULATOR\r
\r
# What buildable modules does this board have, \r
# default or private\r
*/\r
#warning "This default file may only be used as an example!"\r
\r
-#ifndef _DET_CFG_H_\r
-#define _DET_CFG_H_\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H\r
\r
#define DET_ENABLE_CALLBACKS STD_ON // Enable to use callback on errors\r
#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
#define DET_RAMLOG_SIZE (32) // Number of entries in ramlog\r
#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
\r
-#endif /*_DET_CFG_H_*/\r
+#endif /*DET_CFG_H*/\r
#define CANIF_TRANSCEIVER_API STD_OFF // Not supported\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
-\r
//-------------------------------------------------------------------\r
/*\r
* CanIfHrhRangeConfig container\r
* Specification: Autosar v2.0.1, Final\r
*\r
*/\r
-#ifndef _DET_CFG_H_\r
-#define _DET_CFG_H_\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H\r
\r
#define DET_ENABLE_CALLBACKS STD_ON // Enable to use callback on errors\r
#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
#define DET_RAMLOG_SIZE (32) // Number of entries in ramlog\r
#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
\r
-#endif /*_DET_CFG_H_*/\r
+#endif /*DET_CFG_H*/\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
#include "Spi.h"\r
#include "Spi_Cfg.h"\r
\r
-//#define USE_TRACE 1\r
//#define USE_LDEBUG_PRINTF 1\r
#undef DEBUG_LVL\r
#define DEBUG_LVL DEBUG_LOW\r
# What buildable modules does this board have, \r
# default or private\r
\r
-MOD_AVAIL+=ADC CAN DIO MCU FLS PORT PWM GPT \r
+MOD_AVAIL+=ADC CAN DIO MCU FLS PORT PWM GPT WDG \r
# System + Communication + Diagnostic\r
MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE\r
# Additional\r
* Created on: 2009-okt-02\r
* Author: Fredrik\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef ADC_CFG_H_\r
#define ADC_CFG_H_\r
\r
#endif
\r
+#warning "This default file may only be used as an example!"
+
#ifndef CAN_CFG_H_\r
#define CAN_CFG_H_\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef DIO_CFG_H_\r
#define DIO_CFG_H_\r
\r
DIO_PORT_F,\r
} Dio_Hw_PortType;\r
\r
-#define LED_CHANNEL1 (DIO_CHANNEL_B13)\r
-#define LED_CHANNEL2 (DIO_CHANNEL_B14)\r
+// Channels\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 (DIO_CHANNEL_B13)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 (DIO_CHANNEL_B14)\r
\r
-#define LED_PORT (DIO_PORT_B)\r
+// Channel group\r
+#define DIO_GROUP_NAME_LED_GROUP (&DioConfigData[0])\r
\r
-#define LED_GROUP (&DioConfigData[0])\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (DIO_PORT_B)\r
\r
+\r
+\r
+// Pointers for convenience.\r
// Channels\r
extern const Dio_ChannelType DioChannelConfigData[];\r
-#define CHANNEL_PTR (&DioChannelConfigData)\r
-\r
// Port\r
extern const Dio_PortType DioPortConfigData[];\r
-#define PORT_PTR (&DioPortConfigData)\r
-\r
// Channel group\r
extern const Dio_ChannelGroupType DioConfigData[];\r
-#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
#endif /* DIO_CFG_H_ */\r
\r
const Dio_ChannelType DioChannelConfigData[] =\r
{\r
- LED_CHANNEL1,\r
- LED_CHANNEL2,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
DIO_END_OF_LIST,\r
};\r
\r
const Dio_PortType DioPortConfigData[] =\r
{\r
- LED_PORT,\r
+ DIO_PORT_NAME_LED_PORT,\r
DIO_END_OF_LIST\r
};\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef FLS_CFG_H_\r
#define FLS_CFG_H_\r
\r
* Definitions of configuration parameters for GPT Driver.\r
*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef GPT_CFG_H_\r
#define GPT_CFG_H_\r
#include "Std_Types.h"\r
RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO),
};
\r
-const Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
{\r
{\r
.McuClockReferencePointFrequency = 8000000UL,\r
};\r
\r
\r
- const Mcu_ConfigType McuConfigData[] = {\r
+const Mcu_ConfigType McuConfigData[] = {\r
{\r
// Enables/Disables clock failure notification. In case this feature is not supported\r
// by HW the setting should be disabled.\r
* -------------------------------- Arctic Core ------------------------------*/
+#warning "This default file may only be used as an example!"
+
#ifndef MCU_CFG_H_\r
#define MCU_CFG_H_\r
\r
* Definitions of configuration parameters for Port Driver.
*/
+#warning "This default file may only be used as an example!"
+
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
* Created on: 2009-okt-02\r
* Author: jonte\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
\r
* Created on: 2009-okt-02\r
* Author: Fredrik\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef ADC_CFG_H_\r
#define ADC_CFG_H_\r
\r
#endif
\r
+#warning "This default file may only be used as an example!"
+
#ifndef CAN_CFG_H_\r
#define CAN_CFG_H_\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef DIO_CFG_H_\r
#define DIO_CFG_H_\r
\r
DIO_PORT_F,\r
} Dio_Hw_PortType;\r
\r
-#define LED_CHANNEL1 (DIO_CHANNEL_D7)\r
-#define LED_CHANNEL2 (DIO_CHANNEL_D13)\r
-#define LED_CHANNEL3 (DIO_CHANNEL_D3)\r
-#define LED_CHANNEL4 (DIO_CHANNEL_D4)\r
+// Channels\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 (DIO_CHANNEL_D7)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 (DIO_CHANNEL_D13)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL3 (DIO_CHANNEL_D3)\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL4 (DIO_CHANNEL_D4)\r
\r
-#define LED_PORT (DIO_PORT_D)\r
+// Channel group\r
+#define DIO_GROUP_NAME_LED_GROUP (&DioConfigData[0])\r
\r
-#define LED_GROUP (&DioConfigData[0])\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (DIO_PORT_D)\r
\r
// Channels\r
extern const Dio_ChannelType DioChannelConfigData[];\r
-#define CHANNEL_PTR (&DioChannelConfigData)\r
\r
+\r
+\r
+// Pointers for convenience.\r
// Port\r
extern const Dio_PortType DioPortConfigData[];\r
-#define PORT_PTR (&DioPortConfigData)\r
\r
// Channel group\r
extern const Dio_ChannelGroupType DioConfigData[];\r
-#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
#endif /* DIO_CFG_H_ */\r
\r
const Dio_ChannelType DioChannelConfigData[] =\r
{\r
- LED_CHANNEL1,\r
- LED_CHANNEL2,\r
- LED_CHANNEL3,\r
- LED_CHANNEL4,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL3,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL4,\r
DIO_END_OF_LIST,\r
};\r
\r
const Dio_PortType DioPortConfigData[] =\r
{\r
- LED_PORT,\r
+ DIO_PORT_NAME_LED_PORT,\r
DIO_END_OF_LIST\r
};\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef FLS_CFG_H_\r
#define FLS_CFG_H_\r
\r
* Definitions of configuration parameters for GPT Driver.\r
*/\r
\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef GPT_CFG_H_\r
#define GPT_CFG_H_\r
#include "Std_Types.h"\r
* -------------------------------- Arctic Core ------------------------------*/
+#warning "This default file may only be used as an example!"
+
#ifndef MCU_CFG_H_\r
#define MCU_CFG_H_\r
\r
* Definitions of configuration parameters for Port Driver.
*/
+#warning "This default file may only be used as an example!"
+
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
* Created on: 2009-okt-02\r
* Author: jonte\r
*/\r
+#warning "This default file may only be used as an example!"\r
+\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
\r
\r
MOD_AVAIL+=MCU\r
# System + Communication + Diagnostic\r
-MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE CAN\r
+MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE CAN PORT DIO\r
# Additional\r
MOD_AVAIL+=RAMLOG \r
\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:13 CET 2010\r
+ */\r
+\r
+
+#if (DIO_SW_MAJOR_VERSION != 1)
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+#include "Port.h"\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ DIO_PORT_A = 0,\r
+ DIO_PORT_B = 1,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_DioChannel_1 PORT_PAD_3\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_DioPort_1 (DIO_PORT_A)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:13 CET 2010\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_DioChannel_1,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_DioPort_1, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:10 CET 2010\r
+ */\r
+\r
+ \r
+\r
+#include "Port.h"\r
+\r
+\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .pins = {\r
+ {\r
+ .pin = PORT_PIN_DCAN1_TX,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN1_RX,\r
+ .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN2_TX,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN2_RX,\r
+ .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN3_TX,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN3_RX,\r
+ .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA0,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA3,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA4,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA5,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ }\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:10 CET 2010\r
+ */\r
+\r
+
+#if (PORT_SW_MAJOR_VERSION != 1)
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+\r
+/** Build version info API */\r
+#define PORT_VERSION_INFO_API STD_ON\r
+/** Enable Development Error Trace */\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+/** Build change pin direction API */\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+/** Allow Pin mode changes during runtime */\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+\r
+#define PORT_NUMBER_OF_PINS 10\r
+\r
+#define PORT_FUNC (1 << 1)\r
+#define PORT_FUNC_NO (0 << 1)\r
+#define PORT_PULL_NONE (1 << 2)\r
+#define PORT_PULL_UP (1 << 3)\r
+#define PORT_PULL_DOWN (0 << 3)\r
+#define PORT_ODE_ENABLE (1 << 4)\r
+#define PORT_DIRECTION_CHANGEABLE (1 << 5)\r
+\r
+/** HW specific symbolic names of pins */\r
+/** @req PORT013 */\r
+typedef enum\r
+{\r
+ PORT_PIN_DCAN1_TX = 0x0800,\r
+ PORT_PIN_DCAN1_RX = 0x0801,\r
+ PORT_PIN_DCAN2_TX = 0x0900,\r
+ PORT_PIN_DCAN2_RX = 0x0901,\r
+ PORT_PIN_DCAN3_TX = 0x0a00,\r
+ PORT_PIN_DCAN3_RX = 0x0a01,\r
+ PORT_PIN_GIOA0 = 0x0000,\r
+ PORT_PIN_GIOA3 = 0x0003,\r
+ PORT_PIN_GIOA4 = 0x0004,\r
+ PORT_PIN_GIOA5 = 0x0005, \r
+} Port_PinType;\r
+\r
+/** Port pad mappings */\r
+#define PORT_PAD_106 0x0800 // PORT_PIN_DCAN1_TX\r
+#define PORT_PAD_107 0x0801 // PORT_PIN_DCAN1_RX\r
+#define PORT_PAD_108 0x0900 // PORT_PIN_DCAN2_TX\r
+#define PORT_PAD_109 0x0901 // PORT_PIN_DCAN2_RX\r
+#define PORT_PAD_110 0x0a00 // PORT_PIN_DCAN3_TX\r
+#define PORT_PAD_111 0x0a01 // PORT_PIN_DCAN3_RX\r
+#define PORT_PAD_0 0x0000 // PORT_PIN_GIOA0\r
+#define PORT_PAD_3 0x0003 // PORT_PIN_GIOA3\r
+#define PORT_PAD_4 0x0004 // PORT_PIN_GIOA4\r
+#define PORT_PAD_5 0x0005 // PORT_PIN_GIOA5\r
+\r
+typedef struct {\r
+ Port_PinType pin;\r
+ uint8 conf;\r
+} Port_ConfiguredPinType;\r
+\r
+/** Top level configuration container */\r
+/** @req PORT073 */\r
+typedef struct\r
+{\r
+ const Port_ConfiguredPinType pins[PORT_NUMBER_OF_PINS];\r
+} Port_ConfigType;\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+\r
+#endif /*PORT_CFG_H_*/\r
--- /dev/null
+/*\r
+ * msl_port.c\r
+ *\r
+ * Created on: 14 feb 2011\r
+ * Author: mahi\r
+ */\r
+\r
+/*\r
+Methods called by MW MSL libraries to perform console IO:\r
+*/\r
+\r
+\r
+int InitializeUART(void)\r
+{\r
+ return 0;\r
+}\r
+\r
+int ReadUARTN( char* buf, int cnt )\r
+{\r
+ (void)buf;\r
+ (void)cnt;\r
+ return 0;\r
+}\r
+\r
+int WriteUARTN( char* buf, int cnt )\r
+{\r
+ (void)buf;\r
+ (void)cnt;\r
+ return 0;\r
+}\r
+\r
+\r
+#if 0\r
+void __init_hardware(void)\r
+{\r
+}\r
+\r
+\r
+void __flush_cache(register void *address, register unsigned int size)\r
+{\r
+ (void)address;\r
+ (void)size;\r
+\r
+}\r
+\r
+void __init_user(void)\r
+{\r
+\r
+}\r
+#endif\r
+\r
+\r
+void exit(int exit ) {\r
+ (void)exit;\r
+}\r
+\r
+\r
+void *sbrk(int inc )\r
+{\r
+ /* We use our own malloc */\r
+ return (void *)(-1);\r
+}\r
\r
/* If we use malloc and it runs out of memory it calls sbrk()\r
*/\r
-#if 1\r
\r
+#if defined(PPC)\r
+\r
+/* linker symbols */\r
+extern char _heap_start;\r
+extern char _heap_end; // same as _end?\r
+\r
+void * sbrk( ptrdiff_t incr )\r
+{\r
+ char *prevEnd;\r
+ static char *nextAvailMemPtr = (char *)&_heap_start;\r
+\r
+ if( nextAvailMemPtr + incr > (char*)&_heap_end) {\r
+ write( 2, "Heap overflow!\n", 15 );\r
+ abort();\r
+ }\r
+ prevEnd = nextAvailMemPtr;\r
+ nextAvailMemPtr += incr;\r
+ return prevEnd;\r
+}\r
+#else\r
extern char _end[];\r
\r
//static char *curbrk = _end;\r
unsigned char *prev_heap_end;\r
\r
/* initialize */\r
- if( heap_end == 0 )\r
+ if( heap_end == 0 ){\r
heap_end = _heap;\r
-\r
- prev_heap_end = heap_end;\r
+ }\r
+ prev_heap_end = heap_end;\r
\r
if( heap_end + incr - _heap > HEAPSIZE ) {\r
/* heap overflow - announce on stderr */\r
\r
return (caddr_t) prev_heap_end;\r
}\r
-#else\r
-void *sbrk(int inc )\r
-{\r
- /* We use our own malloc */\r
- return (void *)(-1);\r
-}\r
#endif\r
\r
int stat( const char *file, struct stat *st ) {\r
\r
int arc_putchar(int fd, int c);\r
int print(FILE *file, char **buffer, size_t n, const char *format, va_list ap);\r
+static inline int emitChar( FILE *file, char **buf, char c, int *left );\r
+\r
+int fputs( const char *s, FILE *file ) {\r
+ int left = ~(size_t)0;\r
+ while(*s) {\r
+ emitChar(file,NULL,*s++,&left);\r
+ }\r
+ return 0;\r
+}\r
+\r
\r
int printf(const char *format, ...) {\r
va_list ap;\r
\r
#include <stdio.h>\r
#include <stdarg.h>\r
+#include "MemMap.h"\r
\r
\r
\r
#define RAMLOG_MAGIC 1\r
\r
\r
-static unsigned char ramlog[CFG_RAMLOG_SIZE] __attribute__ ((section (".ramlog")));\r
+SECTION_RAMLOG static unsigned char ramlog[CFG_RAMLOG_SIZE];\r
#if defined(CFG_RAMLOG_SESSION)\r
-static unsigned ramlog_curr __attribute__ ((section (".ramlog")));\r
-static unsigned ramlog_session __attribute__ ((section (".ramlog")));\r
+SECTION_RAMLOG static unsigned ramlog_curr;\r
+SECTION_RAMLOG static unsigned ramlog_session;\r
#else\r
static unsigned ramlog_curr = 0;\r
#endif\r
\r
\r
uint16_t handle_SysMonCommand(TCF_Command* command, char* buf) {\r
- OsPcbType *iterPcbPtr;\r
+ OsTaskVarType *iterPcbPtr;\r
\r
/* Start building return message */\r
start_tcf_field(buf, (char *)TCF_S_R); /* Start */\r
\r
/* Add data field */\r
mystrcat(buf, JSON_ListStart);\r
- TAILQ_FOREACH(iterPcbPtr,& os_sys.pcb_head,pcb_list) {\r
+ TAILQ_FOREACH(iterPcbPtr,& Os_Sys.pcb_head,pcb_list) {\r
if(iterPcbPtr->proc_type < 4)\r
{\r
if(first){\r
\r
/* Add data field */\r
char *arg = command->arguments + 1; /* add 1 for " */\r
- TAILQ_FOREACH(iterPcbPtr,& os_sys.pcb_head,pcb_list) {\r
+ TAILQ_FOREACH(iterPcbPtr,& Os_Sys.pcb_head,pcb_list) {\r
if(strncmp(arg, iterPcbPtr->name, strlen(command->arguments)-2) == 0)\r
{\r
break;\r
\r
#include "Can.h"\r
#include "CanIf_Cbk.h"\r
-#include "string.h"\r
+#include <string.h>\r
\r
#include "debug.h"\r
#include "PduR.h"\r
do\r
{\r
hrhConfig++;\r
- if (hrhConfig->CanIfHrhIdSymRef == hrh)\r
+ if (hrhConfig->CanIfHrhIdSymRef == hrh){\r
return hrhConfig->CanIfCanControllerHrhIdRef;\r
+ }\r
} while(!hrhConfig->CanIf_Arc_EOL);\r
} while(!hohConfig->CanIf_Arc_EOL);\r
\r
switch (oldMode)\r
{\r
case CANIF_CS_SLEEP:\r
- if (Can_SetControllerMode(canControllerId, CAN_T_STOP) == CAN_NOT_OK)\r
+ if (Can_SetControllerMode(canControllerId, CAN_T_STOP) == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
CanIf_Global.channelData[channel].ControllerMode = CANIF_CS_STOPPED;\r
break;\r
default:\r
}\r
\r
CanIf_SetPduMode(channel, CANIF_SET_ONLINE);\r
- if (Can_SetControllerMode(canControllerId, CAN_T_START) == CAN_NOT_OK)\r
+ if (Can_SetControllerMode(canControllerId, CAN_T_START) == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
CanIf_Global.channelData[channel].ControllerMode = CANIF_CS_STARTED;\r
}\r
break;\r
{\r
switch (oldMode) {\r
case CANIF_CS_STARTED:\r
- if (Can_SetControllerMode(canControllerId, CAN_T_STOP) == CAN_NOT_OK)\r
+ if (Can_SetControllerMode(canControllerId, CAN_T_STOP) == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
CanIf_Global.channelData[channel].ControllerMode = CANIF_CS_STOPPED;\r
break;\r
default:\r
break;\r
}\r
\r
- if (Can_SetControllerMode(canControllerId, CAN_T_SLEEP) == CAN_NOT_OK)\r
+ if (Can_SetControllerMode(canControllerId, CAN_T_SLEEP) == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
CanIf_Global.channelData[channel].ControllerMode = CANIF_CS_SLEEP;\r
}\r
\r
switch (oldMode)\r
{\r
case CANIF_CS_SLEEP:\r
- if (Can_SetControllerMode(canControllerId, CAN_T_WAKEUP) == CAN_NOT_OK)\r
+ if (Can_SetControllerMode(canControllerId, CAN_T_WAKEUP) == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
break;\r
default:\r
// Just fall through for other cases\r
}\r
\r
CanIf_SetPduMode(channel, CANIF_SET_OFFLINE);\r
- if (Can_SetControllerMode(canControllerId, CAN_T_STOP) == CAN_NOT_OK)\r
+ if (Can_SetControllerMode(canControllerId, CAN_T_STOP) == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
CanIf_Global.channelData[channel].ControllerMode = CANIF_CS_STOPPED;\r
+ break;\r
}\r
\r
case CANIF_CS_UNINIT:\r
*\r
* @returns Ptr a TxPdu\r
*/\r
+#if ( CANIF_ARC_RUNTIME_PDU_CONFIGURATION == STD_ON )\r
+CanIf_TxPduConfigType * CanIf_FindTxPduEntry(PduIdType id)\r
+#else\r
static const CanIf_TxPduConfigType * CanIf_FindTxPduEntry(PduIdType id)\r
+#endif\r
{\r
if (id >= CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds) {\r
return NULL;\r
} else {\r
return &CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr[id];\r
}\r
-/*\r
- for (uint16 i = 0; i < CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds; i++)\r
- {\r
- if (entry->CanIfTxPduId == id)\r
- {\r
- return entry;\r
- }\r
- entry++;\r
}\r
\r
- return 0;\r
- */\r
-}\r
-\r
+#if ( CANIF_ARC_RUNTIME_PDU_CONFIGURATION == STD_ON )\r
+CanIf_RxPduConfigType * CanIf_FindRxPduEntry(PduIdType id)\r
+#else\r
+static const CanIf_RxPduConfigType * CanIf_FindRxPduEntry(PduIdType id)
+#endif\r
+{
+ if (id >= CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanRxPduIds) {
+ return NULL;
+ } else {
+ return &CanIf_ConfigPtr->InitConfig->CanIfRxPduConfigPtr[id];
+ }
+}
+
+#if ( CANIF_ARC_RUNTIME_PDU_CONFIGURATION == STD_ON )
+const CanIf_HrhConfigType* CanIf_Arc_GetReceiveHandler(CanIf_Arc_ChannelIdType Channel) {
+ const CanIf_InitHohConfigType *hohConfig;
+ const CanIf_HrhConfigType *hrhConfig;
+
+ // foreach(hoh){ foreach(hrh in hoh) {} }
+ hohConfig = CanIf_ConfigPtr->InitConfig->CanIfHohConfigPtr;
+ hohConfig--;
+ do
+ {
+ hohConfig++;
+
+ hrhConfig = hohConfig->CanIfHrhConfig;
+ hrhConfig--;
+ do
+ {
+ hrhConfig++;
+ if (hrhConfig->CanIfCanControllerHrhIdRef == Channel)
+ return hrhConfig;
+ } while(!hrhConfig->CanIf_Arc_EOL);
+
+ } while(!hohConfig->CanIf_Arc_EOL);
+
+ DET_REPORTERROR(MODULE_ID_CANIF, 0, 0xFF, CANIF_E_PARAM_HRH);
+
+ return NULL;
+}
+
+const CanIf_HthConfigType* CanIf_Arc_GetTransmitHandler(CanIf_Arc_ChannelIdType Channel) {
+ const CanIf_InitHohConfigType *hohConfig;
+ const CanIf_HthConfigType *hthConfig;
+
+ // foreach(hoh){ foreach(hrh in hoh) {} }
+ hohConfig = CanIf_ConfigPtr->InitConfig->CanIfHohConfigPtr;
+ hohConfig--;
+ do
+ {
+ hohConfig++;
+
+ hthConfig = hohConfig->CanIfHthConfig;
+ hthConfig--;
+ do
+ {
+ hthConfig++;
+ if (hthConfig->CanIfCanControllerIdRef == Channel)
+ return hthConfig;
+ } while(!hthConfig->CanIf_Arc_EOL);
+
+ } while(!hohConfig->CanIf_Arc_EOL);
+
+ DET_REPORTERROR(MODULE_ID_CANIF, 0, 0xFF, CANIF_E_PARAM_HTH);
+
+ return NULL;
+}
+#endif
+
//-------------------------------------------------------------------\r
\r
Std_ReturnType CanIf_Transmit(PduIdType CanTxPduId,\r
CanIf_Arc_ChannelIdType channel = txEntry->CanIfCanTxPduHthRef->CanIfCanControllerIdRef;\r
\r
// Get and verify the controller mode\r
- if (CanIf_GetControllerMode(channel, &csMode) == E_NOT_OK)\r
+ if (CanIf_GetControllerMode(channel, &csMode) == E_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
\r
- if (csMode != CANIF_CS_STARTED) // CANIF_161\r
+ if (csMode != CANIF_CS_STARTED){ // CANIF_161\r
return E_NOT_OK;\r
+ }\r
\r
// Get and verify the PDU channel mode control\r
- if (CanIf_GetPduMode(channel, &pduMode) == E_NOT_OK)\r
+ if (CanIf_GetPduMode(channel, &pduMode) == E_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
\r
- if ((pduMode != CANIF_GET_TX_ONLINE) && (pduMode != CANIF_GET_ONLINE))\r
+ if ((pduMode != CANIF_GET_TX_ONLINE) && (pduMode != CANIF_GET_ONLINE)){\r
return E_NOT_OK;\r
+ }\r
\r
canPdu.id = txEntry->CanIfCanTxPduIdCanId;\r
\r
\r
Can_ReturnType rVal = Can_Write(txEntry->CanIfCanTxPduHthRef->CanIfHthIdSymRef, &canPdu);\r
\r
- if (rVal == CAN_NOT_OK)\r
+ if (rVal == CAN_NOT_OK){\r
return E_NOT_OK;\r
+ }\r
\r
if (rVal == CAN_BUSY) // CANIF 082, CANIF 161\r
{\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE;\r
break;\r
case CANIF_SET_RX_OFFLINE:\r
- if (oldMode == CANIF_GET_RX_ONLINE)\r
+ if (oldMode == CANIF_GET_RX_ONLINE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE;\r
- else if (oldMode == CANIF_GET_ONLINE)\r
+ } else if (oldMode == CANIF_GET_ONLINE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_TX_ONLINE;\r
- else if (oldMode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE_ACTIVE;\r
+ }\r
\r
// Other oldmodes don't care\r
break;\r
case CANIF_SET_RX_ONLINE:\r
- if (oldMode == CANIF_GET_OFFLINE)\r
+ if (oldMode == CANIF_GET_OFFLINE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_RX_ONLINE;\r
- else if (oldMode == CANIF_GET_TX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_TX_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_ONLINE;\r
- else if (oldMode == CANIF_GET_OFFLINE_ACTIVE)\r
+ } else if (oldMode == CANIF_GET_OFFLINE_ACTIVE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE;\r
+ }\r
\r
// Other oldmodes don't care\r
break;\r
case CANIF_SET_TX_OFFLINE:\r
- if (oldMode == CANIF_GET_TX_ONLINE)\r
+ if (oldMode == CANIF_GET_TX_ONLINE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE;\r
- else if (oldMode == CANIF_GET_ONLINE)\r
+ } else if (oldMode == CANIF_GET_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_RX_ONLINE;\r
- else if (oldMode == CANIF_GET_OFFLINE_ACTIVE)\r
+ } else if (oldMode == CANIF_GET_OFFLINE_ACTIVE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE;\r
- else if (oldMode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_RX_ONLINE;\r
+ }\r
\r
// Other oldmodes don't care\r
break;\r
case CANIF_SET_TX_ONLINE:\r
- if (oldMode == CANIF_GET_OFFLINE)\r
+ if (oldMode == CANIF_GET_OFFLINE){\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_TX_ONLINE;\r
- else if (oldMode == CANIF_GET_RX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_RX_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_ONLINE;\r
- else if (oldMode == CANIF_GET_OFFLINE_ACTIVE)\r
+ } else if (oldMode == CANIF_GET_OFFLINE_ACTIVE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_TX_ONLINE;\r
- else if (oldMode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_ONLINE;\r
+ }\r
\r
// Other oldmodes don't care\r
break;\r
break;\r
\r
case CANIF_SET_TX_OFFLINE_ACTIVE:\r
- if (oldMode == CANIF_GET_OFFLINE)\r
+ if (oldMode == CANIF_GET_OFFLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE_ACTIVE;\r
- else if (oldMode == CANIF_GET_RX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_RX_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE;\r
- else if (oldMode == CANIF_GET_TX_ONLINE)\r
+ } else if (oldMode == CANIF_GET_TX_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE_ACTIVE;\r
- else if (oldMode == CANIF_GET_ONLINE)\r
+ } else if (oldMode == CANIF_GET_ONLINE) {\r
CanIf_Global.channelData[channel].PduMode = CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE;\r
+ }\r
\r
// Other oldmodes don't care\r
break;\r
return E_OK;\r
}\r
\r
-#if ( CANIF_SETDYNAMICTXID_API == STD_ON )\r
+#if ( CANIF_ARC_RUNTIME_PDU_CONFIGURATION == STD_ON )
void CanIf_SetDynamicTxId(PduIdType CanTxPduId, Can_IdType CanId)\r
{\r
- const CanIf_TxPduConfigType *txEntry;\r
- VALIDATE(FALSE, CANIF_SETDYNAMICTX_ID, CANIF_E_NOK_NOSUPPORT);\r
+ CanIf_TxPduConfigType *txEntry;\r
VALIDATE_NO_RV(CanIf_Global.initRun, CANIF_SETDYNAMICTX_ID, CANIF_E_UNINIT );\r
\r
// Get the controller from L-PDU handle\r
}\r
\r
// Check that this is an extended or standard id\r
- if (((CanId & 0x80000000) && (txEntry->CanIfTxPduIdCanIdType == ARC_CAN_ID_TYPE_29)) ||\r
- (((CanId & 0x80000000) == 0) && (txEntry->CanIfTxPduIdCanIdType == ARC_CAN_ID_TYPE_11)))\r
+ if (((CanId & U0x80000000) && (txEntry->CanIfTxPduIdCanIdType == ARC_CAN_ID_TYPE_29)) ||\r
+ (((CanId & U0x80000000) == 0) && (txEntry->CanIfTxPduIdCanIdType == ARC_CAN_ID_TYPE_11)))\r
{\r
// Update the CanID\r
//txEntry->CanIfCanTxPduIdCanId = CanId; // TODO How do we fix this from a const pointer\r
const CanIf_TxPduConfigType* entry =\r
&CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr[canTxPduId];\r
\r
- /* Find the CAN id in the TxPduList */\r
- /*\r
- for (uint16 i = 0; i < CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds; i++)\r
- {\r
- if (entry->CanIfTxPduId == canTxPduId)\r
- {\r
- */\r
if (entry->CanIfUserTxConfirmation != NULL)\r
{\r
CanIf_ChannelGetModeType mode;\r
}\r
}\r
return;\r
- /*\r
- }\r
-\r
- entry++;\r
- }\r
- */\r
- // Did not find the PDU, something is wrong\r
-\r
}\r
\r
void CanIf_RxIndication(uint8 Hrh, Can_IdType CanId, uint8 CanDlc,\r
\r
if (CanIf_GetPduMode(channel, &mode) == E_OK)\r
{\r
- if (mode == CANIF_GET_OFFLINE || mode == CANIF_GET_TX_ONLINE ||\r
- mode == CANIF_GET_OFFLINE_ACTIVE)\r
+ if ( (mode == CANIF_GET_OFFLINE) || (mode == CANIF_GET_TX_ONLINE) ||\r
+ (mode == CANIF_GET_OFFLINE_ACTIVE) )\r
{\r
// Receiver path is disabled so just drop it\r
return;\r
else\r
{\r
entry++;\r
- continue; // Not a supported filter type, so just drop the frame\r
+ continue; // Go to next entry
}\r
}\r
else\r
{\r
case CANIF_USER_TYPE_CAN_SPECIAL:\r
{\r
- ((CanIf_FuncTypeCanSpecial) (entry->CanIfUserRxIndication))(entry->CanIfCanRxPduId,\r
- CanSduPtr, CanDlc, CanId);\r
+ ( (CanIf_FuncTypeCanSpecial)(entry->CanIfUserRxIndication) )(
+ entry->CanIfCanRxPduHrhRef->CanIfCanControllerHrhIdRef,
+ entry->CanIfCanRxPduId,
+ CanSduPtr,
+ CanDlc,
+ CanId);
+
return;\r
}\r
break;\r
CanIf_ConfigPtr->DispatchConfig->CanIfErrorNotificaton(Controller, Error);\r
}\r
}\r
+uint8 CanIf_Arc_GetChannelDefaultConfIndex(CanIf_Arc_ChannelIdType Channel)
+{
+ return CanIf_Config.Arc_ChannelDefaultConfIndex[Channel];
+};
+
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+//lint -emacro(904,CANNM_VALIDATE_INIT,CANNM_VALIDATE_CHANNEL,CANNM_VALIDATE_NOTNULL) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
+\r
+\r
/* Globally fulfilled requirements */\r
/** @req CANNM081 */\r
/** @req CANNM044 */\r
/** @req CANNM026 */\r
/** @req CANNM201 */\r
\r
-#if (CANNM_DEV_ERROR_DETECT == STD_ON)\r
-#include "Det.h"\r
-#endif\r
-#if defined(USE_DEM)\r
-#include "Dem.h"\r
-#endif\r
-#include "ComStack_Types.h"\r
-#include "CanNm.h"\r
+#include "ComStack_Types.h" /** @req CANNM082 */\r
+#include "CanNm.h" /** @req CANNM082 */\r
#include "CanNm_Internal.h"\r
-#include "CanNm_ConfigTypes.h"\r
-#include "Nm_Cbk.h"\r
-#include "NmStack_Types.h"\r
-#include "MemMap.h"\r
+#include "Nm_Cbk.h" /** @req CANNM082 */\r
+#include "NmStack_Types.h" /** @req CANNM082 */\r
+//#include SchM_CanNm.h //Not implemented. (CANNM082)\r
+#include "MemMap.h" /** @req CANNM082 */\r
\r
/** @req CANNM083 */\r
#include "CanIf.h"\r
\r
#include <string.h>\r
\r
+#if (CANNM_DEV_ERROR_DETECT == STD_ON)\r
+#include "Det.h" /** @req CANNM082 */\r
+#endif\r
+#if defined(USE_DEM)\r
+#include "Dem.h" /** @req CANNM082 */\r
+#endif\r
+\r
+\r
static const CanNm_ConfigType* CanNm_ConfigPtr;\r
\r
+//lint -save -e785 //PC-Lint exception: Too few initializers for aggregate...\r
CanNm_InternalType CanNm_Internal = {\r
.InitStatus = CANNM_UNINIT,\r
};\r
+//lint -restore\r
\r
/** Initialize the complete CanNm module, i.e. all channels which are activated */\r
/** @req CANNM041 */\r
\r
CanNm_ConfigPtr = cannmConfigPtr; /**< @req CANNM060 */\r
\r
- int channel;\r
+ uint8 channel;\r
for (channel = 0; channel < CANNM_CHANNEL_COUNT; channel++) {\r
const CanNm_ChannelType* ChannelConf = &CanNm_ConfigPtr->Channels[channel];\r
CanNm_Internal_ChannelType* ChannelInternal = &CanNm_Internal.Channels[channel];\r
\r
const CanNm_ChannelType* ChannelConf = &CanNm_ConfigPtr->Channels[nmChannelHandle];\r
CanNm_Internal_ChannelType* ChannelInternal = &CanNm_Internal.Channels[nmChannelHandle];\r
+ Nm_ReturnType status = NM_E_OK;\r
\r
if (ChannelInternal->Mode == NM_MODE_BUS_SLEEP) {\r
CanNm_Internal_BusSleep_to_RepeatMessage(ChannelConf, ChannelInternal); /**< @req CANNM128 @req CANNM095.3 */\r
- return NM_E_OK;\r
+ status = NM_E_OK;\r
} else {\r
- return NM_E_NOT_EXECUTED; /**< @req CANNM147 */\r
+ status = NM_E_NOT_EXECUTED; /**< @req CANNM147 */\r
}\r
+ return status;\r
}\r
\r
/** Request the network, since ECU needs to communicate on the bus. Network\r
if (ChannelInternal->State == NM_STATE_READY_SLEEP) {\r
CanNm_Internal_ReadySleep_to_NormalOperation(ChannelConf, ChannelInternal); /**< @req CANNM110 */\r
}\r
+ } else {\r
+ //Nothing to be done\r
}\r
return NM_E_OK;\r
}\r
\r
const CanNm_ChannelType* ChannelConf = &CanNm_ConfigPtr->Channels[nmChannelHandle];\r
CanNm_Internal_ChannelType* ChannelInternal = &CanNm_Internal.Channels[nmChannelHandle];\r
+ Nm_ReturnType status = NM_E_OK;\r
\r
if (ChannelConf->NidPosition == CANNM_PDU_OFF) {\r
- return NM_E_NOT_EXECUTED;\r
+ status = NM_E_NOT_EXECUTED;\r
} else {\r
*nmNodeIdPtr = ChannelInternal->RxMessageSdu[ChannelConf->NidPosition];\r
- return NM_E_OK;\r
+ status = NM_E_OK;\r
}\r
+ return status;\r
}\r
\r
/** Get node identifier configured for the local node. */\r
\r
const CanNm_ChannelType* ChannelConf = &CanNm_ConfigPtr->Channels[nmChannelHandle];\r
CanNm_Internal_ChannelType* ChannelInternal = &CanNm_Internal.Channels[nmChannelHandle];\r
+ Nm_ReturnType status = NM_E_NOT_EXECUTED; /**< @req CANNM137 */\r
\r
if (ChannelConf->CbvPosition != CANNM_PDU_OFF) {\r
if (ChannelInternal->State == NM_STATE_READY_SLEEP) {\r
ChannelInternal->TxMessageSdu[ChannelConf->CbvPosition] = CANNM_CBV_REPEAT_MESSAGE_REQUEST; /**< @req CANNM113 */\r
CanNm_Internal_ReadySleep_to_RepeatMessage(ChannelConf, ChannelInternal); /**< @req CANNM112 */\r
- return NM_E_OK;\r
+ status = NM_E_OK;\r
} else if (ChannelInternal->State == NM_STATE_NORMAL_OPERATION) {\r
ChannelInternal->TxMessageSdu[ChannelConf->CbvPosition] = CANNM_CBV_REPEAT_MESSAGE_REQUEST; /**< @req CANNM121 */\r
CanNm_Internal_NormalOperation_to_RepeatMessage(ChannelConf, ChannelInternal); /**< @req CANNM120 */\r
- return NM_E_OK;\r
+ status = NM_E_OK;\r
+ } else {\r
+ //Nothing to be done\r
}\r
}\r
- return NM_E_NOT_EXECUTED; /**< @req CANNM137 */\r
+ return status;\r
}\r
#endif\r
\r
return NM_E_OK;\r
}\r
\r
-/** This service returns the version information of this module. */\r
-void CanNm_GetVersionInfo( Std_VersionInfoType * versioninfo ){\r
- CANNM_VALIDATE_INIT(CANNM_SERVICEID_GETVERSIONINFO);\r
-}\r
-\r
/** Request bus synchronization. */\r
Nm_ReturnType CanNm_RequestBusSynchronization( const NetworkHandleType nmChannelHandle ){\r
CANNM_VALIDATE_INIT(CANNM_SERVICEID_REQUESTBUSSYNCHRONIZATION, NM_E_NOT_OK);\r
CANNM_VALIDATE_CHANNEL(nmChannelHandle, CANNM_SERVICEID_REQUESTBUSSYNCHRONIZATION, NM_E_NOT_OK);\r
+ // Not implemented\r
return NM_E_NOT_OK;\r
}\r
\r
Nm_ReturnType CanNm_CheckRemoteSleepIndication( const NetworkHandleType nmChannelHandle, boolean * const nmRemoteSleepIndPtr ){\r
CANNM_VALIDATE_INIT(CANNM_SERVICEID_CHECKREMOTESLEEPINDICATION, NM_E_NOT_OK);\r
CANNM_VALIDATE_CHANNEL(nmChannelHandle, CANNM_SERVICEID_CHECKREMOTESLEEPINDICATION, NM_E_NOT_OK);\r
+ (void)nmRemoteSleepIndPtr;\r
+ // Not implemented\r
return NM_E_NOT_OK;\r
}\r
\r
CanNm_Internal_ReadySleep_to_RepeatMessage(ChannelConf, ChannelInternal); /**< @req CANNM111 */\r
} else if (ChannelInternal->State == NM_STATE_NORMAL_OPERATION) {\r
CanNm_Internal_NormalOperation_to_RepeatMessage(ChannelConf, ChannelInternal); /**< @req CANNM119 */\r
+ } else {\r
+ //Nothing to be done\r
}\r
}\r
+ } else {\r
+ //Nothing to be done\r
}\r
#if (CANNM_PDU_RX_INDICATION_ENABLED == STD_ON)\r
// TODO: call NM rx indication\r
// ----------------------------------------------------------------------------\r
// Internal functions\r
// ----------------------------------------------------------------------------\r
+// Accessed through CanNm_MainFunction_<channel>\r
+void CanNm_MainFunction(NetworkHandleType nmChannelHandle);\r
\r
void CanNm_MainFunction( NetworkHandleType nmChannelHandle ) {\r
CANNM_VALIDATE_INIT(CANNM_SERVICEID_ARC_MAINFUNCTION);\r
}\r
} else if (ChannelInternal->Mode == NM_MODE_PREPARE_BUS_SLEEP) {\r
CanNm_Internal_TickWaitBusSleepTime(ChannelConf, ChannelInternal); /**< @req CANNM115.2 */\r
+ } else {\r
+ //Nothing to be done\r
}\r
}\r
\r
CanNm_Internal_NormalOperation_to_NormalOperation(ChannelConf, ChannelInternal); /**< @req CANNM117.1 */\r
} else if (ChannelInternal->State == NM_STATE_READY_SLEEP) {\r
CanNm_Internal_ReadySleep_to_PrepareBusSleep(ChannelConf, ChannelInternal); /**< @req CANNM109 */\r
+ } else {\r
+ //Nothing to be done\r
}\r
} else {\r
ChannelInternal->TimeoutTimeLeft -= ChannelConf->MainFunctionPeriod;\r
.SduDataPtr = ChannelInternal->TxMessageSdu,\r
.SduLength = ChannelConf->PduLength,\r
};\r
- CanIf_Transmit(ChannelConf->CanIfPduId, &pdu);\r
+ Std_ReturnType status = CanIf_Transmit(ChannelConf->CanIfPduId, &pdu);\r
+ (void)status;\r
+ // TODO: what to do if Transmit fails?\r
}\r
\r
static inline uint8 CanNm_Internal_GetUserDataOffset( const CanNm_ChannelType* ChannelConf ) {\r
static inline void CanNm_Internal_BusSleep_to_BusSleep( const CanNm_ChannelType* ChannelConf, CanNm_Internal_ChannelType* ChannelInternal ) {\r
// Notify 'Network Start'\r
Nm_NetworkStartIndication(ChannelConf->NmNetworkHandle); /**< @req CANNM127.1 */\r
+ (void) ChannelInternal; //Just to avoid 715 PC-Lint warning about not used.\r
}\r
\r
static inline void CanNm_Internal_RepeatMessage_to_RepeatMessage( const CanNm_ChannelType* ChannelConf, CanNm_Internal_ChannelType* ChannelInternal ) {\r
static inline void CanNm_Internal_NormalOperation_to_ReadySleep( const CanNm_ChannelType* ChannelConf, CanNm_Internal_ChannelType* ChannelInternal ) {\r
ChannelInternal->Mode = NM_MODE_NETWORK;\r
ChannelInternal->State = NM_STATE_READY_SLEEP;\r
+ (void) ChannelConf; //Just to avoid 715 PC-Lint warning about not used.\r
}\r
static inline void CanNm_Internal_NormalOperation_to_NormalOperation( const CanNm_ChannelType* ChannelConf, CanNm_Internal_ChannelType* ChannelInternal ) {\r
ChannelInternal->TimeoutTimeLeft = ChannelConf->TimeoutTime; /**< @req CANNM117.2 */\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+//lint -emacro(904,CANSM_VALIDATE_INIT,CANSM_VALIDATE_NETWORK,CANSM_VALIDATE_POINTER,CANSM_VALIDATE_MODE) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
+\r
/* Globally fulfilled requirements */\r
/** @req CANSM069 */\r
/** @req CANSM077 */\r
CANSM_VALIDATE_POINTER(ConfigPtr, CANSM_SERVICEID_INIT); /**< @req CANSM179 */\r
\r
CanSM_Config = ConfigPtr;\r
+ Std_ReturnType status = E_OK;\r
+ Std_ReturnType totalStatus = E_OK;\r
\r
- for (int i = 0; i < CANSM_NETWORK_COUNT; ++i) {\r
- CanSM_Internal_RequestComMode(i, COMM_NO_COMMUNICATION); /**< @req CANSM211 */\r
+ for (uint8 i = 0; i < CANSM_NETWORK_COUNT; ++i) {\r
+ status = CanSM_Internal_RequestComMode(i, COMM_NO_COMMUNICATION); /**< @req CANSM211 */\r
+ if (status > totalStatus) {\r
+ totalStatus = status;\r
+ }\r
}\r
\r
- CanSM_Internal.InitStatus = CANSM_STATUS_INIT;\r
+ if (totalStatus == E_OK) {\r
+ CanSM_Internal.InitStatus = CANSM_STATUS_INIT;\r
+ } else {\r
+ // TODO report error?\r
+ }\r
}\r
\r
-void CanSM_GetVersionInfo( Std_VersionInfoType* VersionInfo ) {\r
- CANSM_VALIDATE_INIT(CANSM_SERVICEID_GETVERSIONINFO);\r
-}\r
\r
/** @req CANSM181 @req CANSM183 @req CANSM182.partially @req CANSM184 */\r
Std_ReturnType CanSM_RequestComMode( NetworkHandleType NetworkHandle, ComM_ModeType ComM_Mode ) {\r
Std_ReturnType overallStatus = E_OK;\r
Std_ReturnType status;\r
status = CanSM_Internal_RequestCanIfMode(NetworkHandle, ComM_Mode); /**< @req CANSM240 */\r
- if (status > overallStatus) overallStatus = status;\r
+ if (status > overallStatus){\r
+ overallStatus = status;\r
+ }\r
status = CanSM_Internal_RequestComGroupMode(NetworkHandle, ComM_Mode); /**< @req CANSM241 */\r
- if (status > overallStatus) overallStatus = status;\r
+ if (status > overallStatus) {\r
+ overallStatus = status;\r
+ }\r
\r
- if (status == E_OK) {\r
+ if (overallStatus == E_OK) {\r
NetworkInternal->CurrentMode = ComM_Mode;\r
ComM_BusSM_ModeIndication(NetworkHandle, ComM_Mode); /**< @req CANSM089 */\r
}\r
\r
- return status;\r
+ return overallStatus;\r
}\r
\r
/** @req CANSM039 @req CANSM044 */\r
Std_ReturnType CanSM_Internal_RequestCanIfMode( NetworkHandleType NetworkHandle, ComM_ModeType ComM_Mode ) {\r
const CanSM_NetworkType* Network = &CanSM_Config->Networks[NetworkHandle];\r
- CanIf_ControllerModeType CanIf_Mode;\r
+ CanIf_ControllerModeType CanIf_Mode = CANIF_CS_STARTED;\r
+ Std_ReturnType totalStatus = E_OK;\r
\r
switch (ComM_Mode) {\r
case COMM_NO_COMMUNICATION:\r
CanIf_Mode = CANIF_CS_STARTED;\r
break;\r
default:\r
- return E_NOT_OK;\r
+ totalStatus = E_NOT_OK;\r
break;\r
}\r
\r
- Std_ReturnType totalStatus = E_OK;\r
- for (int i = 0; i < Network->ControllerCount; ++i) {\r
- const CanSM_ControllerType* Controller = &Network->Controllers[i];\r
- Std_ReturnType status =\r
- CanIf_SetControllerMode(Controller->CanIfControllerId, CanIf_Mode);\r
- if (status > totalStatus) {\r
- totalStatus = status;\r
+ if (totalStatus == E_OK) {\r
+ for (uint8 i = 0; i < Network->ControllerCount; ++i) {\r
+ const CanSM_ControllerType* Controller = &Network->Controllers[i];\r
+ Std_ReturnType status =\r
+ CanIf_SetControllerMode(Controller->CanIfControllerId, CanIf_Mode);\r
+ if (status > totalStatus) {\r
+ totalStatus = status;\r
+ }\r
}\r
}\r
return totalStatus;\r
/** @req CANSM173 */\r
Std_ReturnType CanSM_Internal_RequestComGroupMode( NetworkHandleType NetworkHandle, ComM_ModeType ComM_Mode ) {\r
const CanSM_NetworkType* Network = &CanSM_Config->Networks[NetworkHandle];\r
+ Std_ReturnType status = E_OK;\r
\r
switch (ComM_Mode) {\r
case COMM_NO_COMMUNICATION:\r
Com_IpduGroupStart(Network->ComTxPduGroupId, FALSE);\r
break;\r
default:\r
- return E_NOT_OK;\r
+ status = E_NOT_OK;\r
break;\r
}\r
- return E_OK;\r
+ return status;\r
}\r
\r
/** @req CANSM090 @req CANSM185 @req CANSM187 @req CANSM186 @req CANSM188 */\r
\r
const CanSM_NetworkType* Network = &CanSM_Config->Networks[NetworkHandle];\r
Std_ReturnType totalStatus = E_OK;\r
- for (int i = 0; i < Network->ControllerCount; ++i) {\r
+ for (uint8 i = 0; i < Network->ControllerCount; ++i) {\r
const CanSM_ControllerType* Controller = &Network->Controllers[i];\r
CanIf_ControllerModeType CanIf_Mode;\r
Std_ReturnType status =\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-#ifndef CANSM_INTERNAL_H_\r
-#define CANSM_INTERNAL_H_\r
+#ifndef CANSM_INTERNAL_H\r
+#define CANSM_INTERNAL_H\r
\r
#include "CanSM.h"\r
\r
\r
typedef enum {\r
CANSM_STATUS_UNINIT,\r
- CANSM_STATUS_INIT,\r
+ CANSM_STATUS_INIT\r
} CanSM_Internal_InitStatusType;\r
\r
\r
Std_ReturnType CanSM_Internal_RequestCanIfMode( NetworkHandleType NetworkHandle, ComM_ModeType ComM_Mode );\r
Std_ReturnType CanSM_Internal_RequestComGroupMode( NetworkHandleType NetworkHandle, ComM_ModeType ComM_Mode );\r
\r
-#endif /* CANSM_INTERNAL_H_ */\r
+#endif /* CANSM_INTERNAL_H */\r
break;\r
case FIRST_FRAME:\r
// Parse the data length form the first frame.\r
- res = CanTpRxPduPtr->SduDataPtr[tpci_offset + 1] + (PduLengthType)((CanTpRxPduPtr->SduDataPtr[tpci_offset]) & 0xf << 8);\r
+ res = CanTpRxPduPtr->SduDataPtr[tpci_offset + 1] + ((PduLengthType)((CanTpRxPduPtr->SduDataPtr[tpci_offset]) & 0xf) << 8);\r
break;\r
default:\r
res = 0; // TODO: maybe we should have an error code here.\r
PduLengthType segmentSize, PduLengthType *bytesWrittenSuccessfully) {\r
\r
BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
- boolean error = FALSE;\r
+ boolean endLoop = FALSE;\r
*bytesWrittenSuccessfully = 0;\r
\r
- while ((*bytesWrittenSuccessfully < segmentSize) && error == FALSE) {\r
+ while ((*bytesWrittenSuccessfully < segmentSize) && (!endLoop)) {\r
// Copy the data that resides in the buffer.\r
if (rxRuntime->pdurBuffer != NULL) {\r
while ((*bytesWrittenSuccessfully < segmentSize ) && (rxRuntime->pdurBuffer->SduLength > rxRuntime->pdurBufferCount)) {\r
rxRuntime->pdurBufferCount = 0; // The buffer is emptied.\r
} else if (ret == BUFREQ_BUSY) {\r
rxRuntime->transferCount += *bytesWrittenSuccessfully;\r
- error = TRUE;\r
- break;\r
+ endLoop = TRUE;\r
} else {\r
- error = TRUE; // Let calling function handle this error.\r
- break;\r
+ endLoop = TRUE; // Let calling function handle this error.\r
}\r
} else {\r
rxRuntime->transferCount += segmentSize; //== bytesWrittenSuccessfully\r
ret = BUFREQ_OK;\r
- break;\r
+ endLoop = TRUE;\r
}\r
}\r
return ret;\r
// - - - - - - - - - - - - - -\r
\r
static INLINE void sendFlowControlFrame(const CanTp_RxNSduType *rxConfig, CanTp_ChannelPrivateType *rxRuntime, BufReq_ReturnType flowStatus) {\r
- int indexCount = 0;\r
+ uint8 indexCount = 0;\r
Std_ReturnType ret = E_NOT_OK;\r
PduInfoType pduInfo;\r
uint8 sduData[8]; // Note that buffer in declared on the stack.\r
sduData[indexCount++] = ISO15765_TPCI_FC | ISO15765_FLOW_CONTROL_STATUS_CTS;\r
spaceFreePduRBuffer = rxRuntime->pdurBuffer->SduLength - rxRuntime->pdurBufferCount;\r
if (rxConfig->CanTpAddressingFormant == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
- computedBs = spaceFreePduRBuffer / MAX_PAYLOAD_SF_EXT_ADDR + 1; // + 1 is for local buffer.\r
+ computedBs = (spaceFreePduRBuffer / MAX_PAYLOAD_SF_EXT_ADDR) + 1; // + 1 is for local buffer.\r
} else {\r
- computedBs = spaceFreePduRBuffer / MAX_PAYLOAD_SF_STD_ADDR + 1; // + 1 is for local buffer.\r
+ computedBs = (spaceFreePduRBuffer / MAX_PAYLOAD_SF_STD_ADDR) + 1; // + 1 is for local buffer.\r
}\r
if (computedBs > rxConfig->CanTpBs) { // /** @req CANTP091 *//** @req CANTP084 */\r
computedBs = rxConfig->CanTpBs;\r
}\r
DEBUG( DEBUG_MEDIUM, "computedBs:%d\n", computedBs);\r
- sduData[indexCount++] = computedBs;\r
+ sduData[indexCount++] = computedBs; // 734 PC-lint: Okej att casta till uint8?\r
sduData[indexCount++] = (uint8) rxConfig->CanTpSTmin;\r
rxRuntime->iso15765.nextFlowControlCount = computedBs;\r
pduInfo.SduLength = indexCount;\r
\r
static INLINE void handleConsecutiveFrame(const CanTp_RxNSduType *rxConfig,\r
CanTp_ChannelPrivateType *rxRuntime, const PduInfoType *rxPduData) {\r
- int indexCount = 0;\r
+ uint8 indexCount = 0;\r
uint8 segmentNumber = 0;\r
uint8 extendedAddress = 0;\r
PduLengthType bytesLeftToCopy = 0;\r
DEBUG( DEBUG_MEDIUM, "Unexpected error, could not copy 'unaligned leftover' " "data to local buffer!\n");\r
}\r
}\r
- if ( dataCopyFailure == FALSE ) {\r
+ if ( !dataCopyFailure ) {\r
rxRuntime->iso15765.framesHandledCount++;\r
rxRuntime->iso15765.stateTimeoutCount = CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNbr);\r
rxRuntime->iso15765.state = RX_WAIT_SDU_BUFFER;\r
}\r
}\r
}\r
-}\r
+} // 438, 550 PC-lint: extendedAdress not accessed. Extended adress needs to be implemented. Ticket #136\r
\r
// - - - - - - - - - - - - - -\r
\r
PduLengthType consecutiveFrameActualPayload = 0;\r
PduLengthType remaningSduDataSize = 0;\r
PduInfoType pduInfo;\r
- int copyCount = 0;\r
- int indexCount = 0;\r
+ uint16 copyCount = 0;\r
+ uint16 indexCount = 0;\r
\r
if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
sduData[indexCount++] = (uint8) txConfig->CanTpNTa->CanTpNTa; // Target address.\r
case ISO15765_FLOW_CONTROL_STATUS_CTS:\r
#if 1\r
{ // This construction is added to make the hcs12 compiler happy.\r
- const uint16 bs = txPduData->SduDataPtr[indexCount++];\r
+ const uint8 bs = txPduData->SduDataPtr[indexCount++];\r
txRuntime->iso15765.BS = bs;\r
txRuntime->iso15765.nextFlowControlCount = bs;\r
}\r
} else {\r
DEBUG( DEBUG_MEDIUM, "Ignoring flow control, we do not expect it!");\r
}\r
-}\r
+} // 438, 550 PC-lint: extendAdress används inte. EN BUG? Behöver fixas\r
\r
\r
// - - - - - - - - - - - - - -\r
// Validate that that there is a reason for using the segmented transfers and\r
// if not simply skip (single frame should have been used).\r
if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) { /** @req CANTP094 *//** @req CANTP095 */\r
- if (pduLength <= MAX_PAYLOAD_SF_STD_ADDR)\r
+ if (pduLength <= MAX_PAYLOAD_SF_STD_ADDR){\r
return;\r
+ }\r
} else {\r
- if (pduLength <= MAX_PAYLOAD_SF_EXT_ADDR)\r
+ if (pduLength <= MAX_PAYLOAD_SF_EXT_ADDR){\r
return;\r
+ }\r
}\r
// Validate that the SDU is full length in this first frame.\r
if (rxPduData->SduLength < CANIF_PDU_MAX_LENGTH) {\r
static INLINE Std_ReturnType sendSingleFrame(const CanTp_TxNSduType *txConfig,\r
CanTp_ChannelPrivateType *txRuntime) {\r
Std_ReturnType ret;\r
- int indexCount = 0;\r
+ uint16 indexCount = 0;\r
PduInfoType pduInfo;\r
uint8 sduData[CANIF_PDU_MAX_LENGTH];\r
\r
if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
sduData[indexCount++] = (uint8) txConfig->CanTpNTa->CanTpNTa; // Target address.\r
}\r
- sduData[indexCount++] = ISO15765_TPCI_SF | txRuntime->transferTotal;\r
+ sduData[indexCount++] = ISO15765_TPCI_SF | txRuntime->transferTotal; // 734 PC-lint: Okej att casta till uint8?\r
for (int i = 0; i < txRuntime->transferTotal; i++) {\r
sduData[indexCount++] = txRuntime->pdurBuffer->SduDataPtr[i];\r
}\r
static INLINE Std_ReturnType sendFirstFrame(const CanTp_TxNSduType *txConfig,\r
CanTp_ChannelPrivateType *txRuntime) {\r
Std_ReturnType ret;\r
- int indexCount = 0;\r
- int i = 0;\r
+ uint8 indexCount = 0;\r
+ uint8 i = 0;\r
PduInfoType pduInfo;\r
uint8 sduData[CANIF_PDU_MAX_LENGTH];\r
\r
SERVICE_ID_CANTP_TRANSMIT, CANTP_E_UNINIT ); /** @req CANTP031 */\r
VALIDATE( CanTpTxSduId < CANTP_NSDU_CONFIG_LIST_SIZE, SERVICE_ID_CANTP_TRANSMIT, CANTP_E_INVALID_TX_ID );\r
\r
- txConfig = (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[CanTpTxSduId].configData;\r
+ txConfig =&CanTpConfig.CanTpNSduList[CanTpTxSduId].configData.CanTpTxNSdu;\r
\r
txRuntime = &CanTpRunTimeData.runtimeDataList[txConfig->CanTpTxChannel]; // Runtime data.\r
if (txRuntime->iso15765.state == IDLE) {\r
// - - - - - - - - - - - - - -\r
\r
\r
-void CanTp_Init()\r
+void CanTp_Init(void)\r
{\r
CanTp_ChannelPrivateType *runtimeData;\r
const CanTp_TxNSduType *txConfigParams;\r
DEBUG( DEBUG_MEDIUM, "calling handleSingleFrame!\n");\r
handleSingleFrame(rxConfigParams, runtimeParams, CanTpRxPduPtr);\r
}\r
- else\r
+ else{\r
DEBUG( DEBUG_MEDIUM, "Single frame received on ISO15765-Tx - is ignored!\n");\r
+ }\r
break;\r
}\r
case FIRST_FRAME: {\r
if (rxConfigParams != NULL) {\r
DEBUG( DEBUG_MEDIUM, "calling handleFirstFrame!\n");\r
handleFirstFrame(rxConfigParams, runtimeParams, CanTpRxPduPtr);\r
- } else\r
+ }else{\r
DEBUG( DEBUG_MEDIUM, "First frame received on ISO15765-Tx - is ignored!\n");\r
+ }\r
break;\r
}\r
case CONSECUTIVE_FRAME: {\r
if (rxConfigParams != NULL) {\r
DEBUG( DEBUG_MEDIUM, "calling handleConsecutiveFrame!\n");\r
handleConsecutiveFrame(rxConfigParams, runtimeParams, CanTpRxPduPtr);\r
- } else\r
+ } else {\r
DEBUG( DEBUG_MEDIUM, "Consecutive frame received on ISO15765-Tx - is ignored!\n");\r
+ }\r
break;\r
}\r
case FLOW_CONTROL_CTS_FRAME: {\r
if (txConfigParams != NULL) {\r
DEBUG( DEBUG_MEDIUM, "calling handleFlowControlFrame!\n");\r
handleFlowControlFrame(txConfigParams, runtimeParams, CanTpRxPduPtr);\r
- } else\r
+ } else {\r
DEBUG( DEBUG_MEDIUM, "Flow control frame received on ISO15765-Rx - is ignored!\n");\r
+ }\r
break;\r
}\r
case INVALID_FRAME: {\r
\r
// - - - - - - - - - - - - - -\r
\r
-void CanTp_TxConfirmation(PduIdType PduId) /** @req CANTP076 */\r
+void CanTp_TxConfirmation(PduIdType CanTpTxPduId) /** @req CANTP076 */\r
{\r
const CanTp_RxNSduType *rxConfigParams = NULL;\r
const CanTp_TxNSduType *txConfigParams = NULL;\r
\r
VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
SERVICE_ID_CANTP_TX_CONFIRMATION, CANTP_E_UNINIT ); /** @req CANTP031 */\r
- VALIDATE_NO_RV( PduId < CANTP_NSDU_CONFIG_LIST_SIZE,\r
+ VALIDATE_NO_RV( CanTpTxPduId < CANTP_NSDU_CONFIG_LIST_SIZE,\r
SERVICE_ID_CANTP_TX_CONFIRMATION, CANTP_E_INVALID_TX_ID ); /** @req CANTP158 */\r
\r
/** @req CANTP236 */\r
- if ( CanTpConfig.CanTpNSduList[PduId].direction == IS015765_TRANSMIT ) {\r
- txConfigParams = (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[PduId].configData;\r
+ if ( CanTpConfig.CanTpNSduList[CanTpTxPduId].direction == IS015765_TRANSMIT ) {\r
+ txConfigParams = (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[CanTpTxPduId].configData;\r
CanTpRunTimeData.runtimeDataList[txConfigParams->CanTpTxChannel].iso15765.NasNarPending = FALSE;\r
#if (CANTP_IMMEDIATE_TX_CONFIRMATION == STD_OFF)\r
CanTpRunTimeData.runtimeDataList[txConfigParams->CanTpTxChannel].iso15765.txConfirmed = TRUE;\r
#endif\r
} else {\r
- rxConfigParams = (CanTp_RxNSduType*)&CanTpConfig.CanTpNSduList[PduId].configData;\r
+ rxConfigParams = (CanTp_RxNSduType*)&CanTpConfig.CanTpNSduList[CanTpTxPduId].configData;\r
CanTpRunTimeData.runtimeDataList[rxConfigParams->CanTpRxChannel].iso15765.NasNarPending = FALSE;\r
}\r
}\r
\r
// - - - - - - - - - - - - - -\r
\r
-void CanTp_Shutdown() /** @req CANTP202 *//** @req CANTP200 *//** @req CANTP010 */\r
+void CanTp_Shutdown(void) /** @req CANTP202 *//** @req CANTP200 *//** @req CANTP010 */\r
{\r
VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
SERVICE_ID_CANTP_SHUTDOWN, CANTP_E_UNINIT ); /** @req CANTP031 */\r
// - - - - - - - - - - - - - -\r
\r
\r
-void CanTp_MainFunction()\r
+void CanTp_MainFunction(void)\r
{\r
BufReq_ReturnType ret;\r
CanTpFifoQueueItem item;\r
case TX_WAIT_CAN_TP_TRANSMIT_CAN_TP_PROVIDE_TX_BUFFER:\r
{\r
TIMER_DECREMENT(txRuntimeListItem->iso15765.stateTimeoutCount); /** @req CANTP185 */\r
- if (txRuntimeListItem->iso15765.stateTimeoutCount == 0)\r
+ if (txRuntimeListItem->iso15765.stateTimeoutCount == 0){\r
PduR_CanTpTxConfirmation(txConfigListItem->PduR_PduId, NTFRSLT_E_NOT_OK); /** @req CANTP204 *//** @req CANTP185 */\r
+ }\r
txRuntimeListItem->iso15765.state = IDLE;\r
txRuntimeListItem->mode = CANTP_TX_WAIT;\r
break;\r
\r
const Com_ConfigType * ComConfig;\r
\r
-Com_Arc_IPdu_type Com_Arc_IPdu[COM_N_IPDUS];\r
-Com_Arc_Signal_type Com_Arc_Signal[COM_N_SIGNALS];\r
-Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_N_GROUP_SIGNALS];\r
-\r
-Com_Arc_Config_type Com_Arc_Config = {\r
- .ComIPdu = Com_Arc_IPdu,\r
- .ComSignal = Com_Arc_Signal,\r
- .ComGroupSignal = Com_Arc_GroupSignal\r
-};\r
-\r
\r
void Com_Init(const Com_ConfigType *config ) {\r
DEBUG(DEBUG_LOW, "--Initialization of COM--\n");\r
uint32 earliestDeadline;\r
uint32 firstTimeout;\r
\r
- Com_Arc_Config.OutgoingPdu.SduDataPtr = malloc(8);\r
-\r
// Initialize each IPdu\r
//ComIPdu_type *IPdu;\r
//Com_Arc_IPdu_type *Arc_IPdu;\r
const ComSignal_type *Signal;\r
const ComGroupSignal_type *GroupSignal;\r
- for (int i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
+ for (uint16 i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
Com_Arc_Config.ComNIPdu++;\r
\r
- GET_IPdu(i);\r
- GET_ArcIPdu(i);\r
+ const ComIPdu_type *IPdu = GET_IPdu(i);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(i);\r
\r
if (i >= COM_N_IPDUS) {\r
DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_TOO_MANY_IPDU);\r
- assert(0);\r
failure = 1;\r
break;\r
}\r
\r
// If this is a TX and cyclic IPdu, configure the first deadline.\r
- if (IPdu->ComIPduDirection == SEND &&\r
- (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == PERIODIC || IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == MIXED)) {\r
+ if ( (IPdu->ComIPduDirection == SEND) &&\r
+ ( (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == PERIODIC) || (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == MIXED) )) {\r
//IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer = IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeTimeOffsetFactor;\r
Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer = IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeTimeOffsetFactor;\r
}\r
\r
\r
// Reset earliest deadline.\r
- earliestDeadline = -1; // Gives the max value of uint32 due to overflow.\r
- firstTimeout = -1;\r
-\r
- // Reserve memory for all defined signals.\r
- Arc_IPdu->ComIPduDataPtr = malloc(IPdu->ComIPduSize);\r
- if (Arc_IPdu->ComIPduDataPtr == NULL) {\r
- failure = 1;\r
- }\r
+ earliestDeadline = 0xffffffffu;\r
+ firstTimeout = 0xffffffffu;\r
\r
// Initialize the memory with the default value.\r
if (IPdu->ComIPduDirection == SEND) {\r
\r
// For each signal in this PDU.\r
//Arc_IPdu->NComIPduSignalRef = 0;\r
- for (int j = 0; IPdu->ComIPduSignalRef != NULL && IPdu->ComIPduSignalRef[j] != NULL; j++) {\r
+ for (uint16 j = 0; (IPdu->ComIPduSignalRef != NULL) && (IPdu->ComIPduSignalRef[j] != NULL) ; j++) {\r
Signal = IPdu->ComIPduSignalRef[j];\r
- GET_ArcSignal(Signal->ComHandleId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(Signal->ComHandleId);\r
\r
// If this signal already has been configured this is most likely an error.\r
if (Arc_Signal->ComIPduDataPtr != NULL) {\r
\r
// If this signal is a signal group\r
if (Signal->Com_Arc_IsSignalGroup) {\r
- Arc_Signal->Com_Arc_ShadowBuffer = malloc(IPdu->ComIPduSize);\r
-\r
- if (Arc_Signal->Com_Arc_ShadowBuffer == NULL) {\r
- failure = 1;\r
- }\r
\r
// For each group signal of this signal group.\r
- for(int h = 0; Signal->ComGroupSignal[h] != NULL; h++) {\r
+ for(uint8 h = 0; Signal->ComGroupSignal[h] != NULL; h++) {\r
GroupSignal = Signal->ComGroupSignal[h];\r
- GET_ArcGroupSignal(GroupSignal->ComHandleId);\r
+ Com_Arc_GroupSignal_type *Arc_GroupSignal = GET_ArcGroupSignal(GroupSignal->ComHandleId);\r
// Set pointer to shadow buffer\r
Arc_GroupSignal->Com_Arc_ShadowBuffer = Arc_Signal->Com_Arc_ShadowBuffer;\r
// Initialize group signal data.\r
// Initialize signal data.\r
Com_WriteSignalDataToPdu(Signal->ComHandleId, Signal->ComSignalInitValue);\r
}\r
-\r
- // Check filter configuration\r
- if (IPdu->ComIPduDirection == RECEIVE) {\r
-\r
- // This represents an invalid configuration of the UINT8_N datatype\r
- if ((Signal->ComSignalType == UINT8_N\r
- &&\r
- (Signal->ComFilter.ComFilterAlgorithm == MASKED_NEW_EQUALS_X\r
- || Signal->ComFilter.ComFilterAlgorithm == MASKED_NEW_DIFFERS_X\r
- || Signal->ComFilter.ComFilterAlgorithm == MASKED_NEW_DIFFERS_MASKED_OLD\r
- || Signal->ComFilter.ComFilterAlgorithm == NEW_IS_WITHIN\r
- || Signal->ComFilter.ComFilterAlgorithm == NEW_IS_OUTSIDE\r
- || Signal->ComFilter.ComFilterAlgorithm == ONE_EVERY_N))) {\r
-\r
- DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_INVALID_FILTER_CONFIGURATION);\r
- failure = 1;\r
- }\r
-\r
- // This represens an invalid configuration of the BOOLEAN datatype\r
- if ((Signal->ComSignalType == BOOLEAN\r
- &&\r
- (Signal->ComFilter.ComFilterAlgorithm == NEW_IS_WITHIN\r
- || Signal->ComFilter.ComFilterAlgorithm == NEW_IS_OUTSIDE))) {\r
-\r
-\r
- DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_INVALID_FILTER_CONFIGURATION);\r
- failure = 1;\r
- }\r
- // Initialize filter values. COM230\r
- //signal.ComFilter.ComFilterNewValue = ComConfig->ComIPdu[i].ComTxIPdu.ComTxIPduUnusedAreasDefault;\r
- //signal.ComFilter.ComFilterOldValue = ComConfig->ComIPdu[i].ComTxIPdu.ComTxIPduUnusedAreasDefault;\r
- }\r
}\r
\r
// Configure per I-PDU based deadline monitoring.\r
- for (int j = 0; IPdu->ComIPduSignalRef != NULL && IPdu->ComIPduSignalRef[j] != NULL; j++) {\r
+ for (uint16 j = 0; (IPdu->ComIPduSignalRef != NULL) && (IPdu->ComIPduSignalRef[j] != NULL); j++) {\r
Signal = IPdu->ComIPduSignalRef[j];\r
- GET_ArcSignal(Signal->ComHandleId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(Signal->ComHandleId);\r
\r
- if (Signal->ComTimeoutFactor > 0 && !Signal->ComSignalArcUseUpdateBit) {\r
+ if ( (Signal->ComTimeoutFactor > 0) && (!Signal->ComSignalArcUseUpdateBit) ) {\r
Arc_Signal->ComTimeoutFactor = earliestDeadline;\r
Arc_Signal->Com_Arc_DeadlineCounter = firstTimeout;\r
}\r
\r
// An error occurred.\r
if (failure) {\r
- // Free allocated memory\r
- for (int i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
- // Release memory for all defined signals.\r
- //free(ComConfig->ComIPdu[i].ComIPduDataPtr);\r
- }\r
DEBUG(DEBUG_LOW, "--Initialization of COM failed--\n");\r
//DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_INVALID_FILTER_CONFIGURATION);\r
} else {\r
}\r
\r
void Com_IpduGroupStart(Com_PduGroupIdType IpduGroupId,boolean Initialize) {\r
- for (int i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
+ (void)Initialize; // Nothing to be done. This is just to avoid Lint warning.\r
+ for (uint16 i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
if (ComConfig->ComIPdu[i].ComIPduGroupRef == IpduGroupId) {\r
Com_Arc_Config.ComIPdu[i].Com_Arc_IpduStarted = 1;\r
}\r
}\r
\r
void Com_IpduGroupStop(Com_PduGroupIdType IpduGroupId) {\r
- for (int i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
+ for (uint16 i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
if (ComConfig->ComIPdu[i].ComIPduGroupRef == IpduGroupId) {\r
Com_Arc_Config.ComIPdu[i].Com_Arc_IpduStarted = 0;\r
}\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-\r
+#ifndef COM_ARC_TYPES_H_\r
+#define COM_ARC_TYPES_H_\r
\r
#include "Std_Types.h"\r
#include "Com_Types.h"\r
\r
-#define COM_ARC_FILTER_ENABLED STD_OFF\r
\r
typedef struct {\r
uint32 ComFilterArcN;\r
\r
typedef struct {\r
\r
-#if (COM_ARC_FILTER_ENABLED == STD_ON)\r
- Com_Arc_Filter_type ComFilter;\r
-#endif\r
-\r
uint32 Com_Arc_DeadlineCounter;\r
uint32 ComTimeoutFactor;\r
void *ComIPduDataPtr;\r
\r
- uint8 ComIPduHandleId;\r
+ uint16 ComIPduHandleId;\r
uint8 ComSignalUpdated;\r
\r
/* For signal groups */\r
Com_Arc_GroupSignal_type *ComGroupSignal;\r
PduInfoType OutgoingPdu;\r
} Com_Arc_Config_type;\r
+\r
+#endif\r
#include "Com_misc.h"\r
#include "debug.h"\r
#include "PduR.h"\r
-#include "PduR_Com.h"\r
-#include "Byteorder.h"\r
#include "Det.h"\r
\r
-extern Com_Arc_Config_type Com_Arc_Config;\r
\r
uint8 Com_SendSignal(Com_SignalIdType SignalId, const void *SignalDataPtr) {\r
VALIDATE_SIGNAL(SignalId, 0x0a, E_NOT_OK);\r
// Store pointer to signal for easier coding.\r
- GET_Signal(SignalId);\r
- GET_ArcSignal(SignalId);\r
- GET_IPdu(Arc_Signal->ComIPduHandleId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComSignal_type * Signal = GET_Signal(SignalId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(SignalId);\r
+ const ComIPdu_type *IPdu = GET_IPdu(Arc_Signal->ComIPduHandleId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
//DEBUG(DEBUG_LOW, "Com_SendSignal: id %d, nBytes %d, BitPosition %d, intVal %d\n", SignalId, nBytes, signal->ComBitPosition, (uint32)*(uint8 *)SignalDataPtr);\r
\r
/*\r
* COM395: This function must override the IPdu callouts used in Com_TriggerIPduTransmit();\r
*/\r
- GET_IPdu(ComTxPduId);\r
- GET_ArcIPdu(ComTxPduId);\r
+ const ComIPdu_type *IPdu = GET_IPdu(ComTxPduId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(ComTxPduId);\r
\r
memcpy(SduPtr, Arc_IPdu->ComIPduDataPtr, IPdu->ComIPduSize);\r
return E_OK;\r
}\r
\r
\r
+//lint -esym(904, Com_TriggerIPduSend) //PC-Lint Exception of rule 14.7\r
void Com_TriggerIPduSend(PduIdType ComTxPduId) {\r
PDU_ID_CHECK(ComTxPduId, 0x17);\r
\r
//DEBUG(DEBUG_MEDIUM, "Com_TriggerIPduSend sending IPdu %d... ", ComTxPduId);\r
- GET_IPdu(ComTxPduId);\r
- GET_ArcIPdu(ComTxPduId);\r
+ const ComIPdu_type *IPdu = GET_IPdu(ComTxPduId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(ComTxPduId);\r
\r
// Is the IPdu ready for transmission?\r
if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
// Send IPdu!\r
if (PduR_ComTransmit(IPdu->ArcIPduOutgoingId, &Com_Arc_Config.OutgoingPdu) == E_OK) {\r
// Clear all update bits for the contained signals\r
- for (int i = 0; IPdu->ComIPduSignalRef != NULL && IPdu->ComIPduSignalRef[i] != NULL; i++) {\r
+ for (uint8 i = 0; (IPdu->ComIPduSignalRef != NULL) && (IPdu->ComIPduSignalRef[i] != NULL); i++) {\r
//for (int i = 0; i < Arc_IPdu->NComIPduSignalRef; i++) {\r
if (IPdu->ComIPduSignalRef[i]->ComSignalArcUseUpdateBit) {\r
CLEARBIT(Arc_IPdu->ComIPduDataPtr, IPdu->ComIPduSignalRef[i]->ComUpdateBitPosition);\r
}\r
}\r
\r
-Std_ReturnType Com_RxIndication(PduIdType ComRxPduId, const uint8* SduPtr) {\r
- PDU_ID_CHECK(ComRxPduId, 0x14, E_NOT_OK);\r
+//lint -esym(904, Com_RxIndication) //PC-Lint Exception of rule 14.7\r
+void Com_RxIndication(PduIdType ComRxPduId, const uint8* SduPtr) {\r
+ PDU_ID_CHECK(ComRxPduId, 0x14);\r
\r
- GET_IPdu(ComRxPduId);\r
- GET_ArcIPdu(ComRxPduId);\r
+ const ComIPdu_type *IPdu = GET_IPdu(ComRxPduId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(ComRxPduId);\r
\r
// If Ipdu is stopped\r
if (!Arc_IPdu->Com_Arc_IpduStarted) {\r
- return E_OK;\r
+ return;\r
}\r
\r
// Check callout status\r
if (!IPdu->ComIPduCallout(ComRxPduId, SduPtr)) {\r
// TODO Report error to DET.\r
// Det_ReportError();\r
- return E_NOT_OK;\r
+ return;\r
}\r
}\r
\r
memcpy(Arc_IPdu->ComIPduDataPtr, SduPtr, IPdu->ComIPduSize);\r
\r
// For each signal.\r
- const ComSignal_type *signal;\r
- for (int i = 0; IPdu->ComIPduSignalRef[i] != NULL; i++) {\r
- signal = IPdu->ComIPduSignalRef[i];\r
- GET_ArcSignal(signal->ComHandleId);\r
+ const ComSignal_type *comSignal;\r
+ for (uint8 i = 0; IPdu->ComIPduSignalRef[i] != NULL; i++) {\r
+ comSignal = IPdu->ComIPduSignalRef[i];\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(comSignal->ComHandleId);\r
\r
// If this signal uses an update bit, then it is only considered if this bit is set.\r
- if (!signal->ComSignalArcUseUpdateBit ||\r
- (signal->ComSignalArcUseUpdateBit && TESTBIT(Arc_IPdu->ComIPduDataPtr, signal->ComUpdateBitPosition))) {\r
+ if ( (!comSignal->ComSignalArcUseUpdateBit) ||\r
+ ( (comSignal->ComSignalArcUseUpdateBit) && (TESTBIT(Arc_IPdu->ComIPduDataPtr, comSignal->ComUpdateBitPosition)) ) ) {\r
\r
- if (signal->ComTimeoutFactor > 0) { // If reception deadline monitoring is used.\r
+ if (comSignal->ComTimeoutFactor > 0) { // If reception deadline monitoring is used.\r
// Reset the deadline monitoring timer.\r
- Arc_Signal->Com_Arc_DeadlineCounter = signal->ComTimeoutFactor;\r
+ Arc_Signal->Com_Arc_DeadlineCounter = comSignal->ComTimeoutFactor;\r
}\r
\r
-#if (COM_ARC_FILTER_ENABLED == STD_ON)\r
- // Zero new filter value.\r
- IPdu->ComIPduSignalRef[i]->ComFilter.ComFilterArcNewValue = 0;\r
- //Fix this!!!\r
- Com_CopyFromSignal(IPdu->ComIPduSignalRef[i], &IPdu->ComIPduSignalRef[i]->ComFilter.ComFilterArcNewValue);\r
- // Perform filtering\r
- if (Com_Filter(IPdu->ComIPduSignalRef[i])) {\r
-#endif\r
- // Check the signal processing mode.\r
- if (IPdu->ComIPduSignalProcessing == IMMEDIATE) {\r
- // If signal processing mode is IMMEDIATE, notify the signal callback.\r
- if (IPdu->ComIPduSignalRef[i]->ComNotification != NULL) {\r
- IPdu->ComIPduSignalRef[i]->ComNotification();\r
- }\r
-\r
- } else {\r
- // Signal processing mode is DEFERRED, mark the signal as updated.\r
- Arc_Signal->ComSignalUpdated = 1;\r
+ // Check the signal processing mode.\r
+ if (IPdu->ComIPduSignalProcessing == IMMEDIATE) {\r
+ // If signal processing mode is IMMEDIATE, notify the signal callback.\r
+ if (IPdu->ComIPduSignalRef[i]->ComNotification != NULL) {\r
+ IPdu->ComIPduSignalRef[i]->ComNotification();\r
}\r
-#if (COM_ARC_FILTER_ENABLED == STD_ON)\r
+\r
+ } else {\r
+ // Signal processing mode is DEFERRED, mark the signal as updated.\r
+ Arc_Signal->ComSignalUpdated = 1;\r
}\r
-#endif\r
+\r
} else {\r
- DEBUG(DEBUG_LOW, "Com_RxIndication: Ignored signal %d of I-PD %d since its update bit was not set\n", signal->ComHandleId, ComRxPduId);\r
+ DEBUG(DEBUG_LOW, "Com_RxIndication: Ignored signal %d of I-PD %d since its update bit was not set\n", comSignal->ComHandleId, ComRxPduId);\r
}\r
}\r
\r
- return E_OK;\r
+ return;\r
}\r
\r
void Com_TxConfirmation(PduIdType ComTxPduId) {\r
PDU_ID_CHECK(ComTxPduId, 0x15);\r
+ (void)ComTxPduId; // Nothing to be done. This is just to avoid Lint warning.\r
}\r
\r
\r
Std_ReturnType Com_SendSignalGroup(Com_SignalGroupIdType SignalGroupId) {\r
//#warning Com_SendSignalGroup should be performed atomically. Should we disable interrupts here?\r
- GET_Signal(SignalGroupId);\r
- GET_ArcSignal(SignalGroupId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
- GET_IPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComSignal_type * Signal = GET_Signal(SignalGroupId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(SignalGroupId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComIPdu_type *IPdu = GET_IPdu(Arc_Signal->ComIPduHandleId);\r
\r
\r
// Copy shadow buffer to Ipdu data space\r
const ComGroupSignal_type *groupSignal;\r
- for (int i = 0; Signal->ComGroupSignal[i] != NULL; i++) {\r
+ for (uint8 i = 0; Signal->ComGroupSignal[i] != NULL; i++) {\r
groupSignal = Signal->ComGroupSignal[i];\r
// TODO CopyData\r
// Com_CopyData(Arc_IPdu->ComIPduDataPtr, Arc_Signal->Com_Arc_ShadowBuffer, groupSignal->ComBitSize, groupSignal->ComBitPosition, groupSignal->ComBitPosition);\r
\r
Std_ReturnType Com_ReceiveSignalGroup(Com_SignalGroupIdType SignalGroupId) {\r
//#warning Com_ReceiveSignalGroup should be performed atomically. Should we disable interrupts here?\r
- GET_Signal(SignalGroupId);\r
- GET_ArcSignal(SignalGroupId);\r
+ const ComSignal_type * Signal = GET_Signal(SignalGroupId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(SignalGroupId);\r
\r
// Copy Ipdu data buffer to shadow buffer.\r
const ComGroupSignal_type *groupSignal;\r
- for (int i = 0; Signal->ComGroupSignal[i] != NULL; i++) {\r
+ for (uint8 i = 0; Signal->ComGroupSignal[i] != NULL; i++) {\r
groupSignal = Signal->ComGroupSignal[i];\r
// TODO: CopyData\r
// Com_CopyData(Arc_Signal->Com_Arc_ShadowBuffer, Arc_IPdu->ComIPduDataPtr, groupSignal->ComBitSize, groupSignal->ComBitPosition, groupSignal->ComBitPosition);\r
}\r
\r
void Com_UpdateShadowSignal(Com_SignalIdType SignalId, const void *SignalDataPtr) {\r
- GET_ArcGroupSignal(SignalId);\r
+ Com_Arc_GroupSignal_type *Arc_GroupSignal = GET_ArcGroupSignal(SignalId);\r
// TODO: CopyData\r
// Com_CopyData(Arc_GroupSignal->Com_Arc_ShadowBuffer, SignalDataPtr, GroupSignal->ComBitSize, GroupSignal->ComBitPosition, 0);\r
Com_WriteSignalDataToPduBuffer(SignalId, TRUE, SignalDataPtr, (void *)Arc_GroupSignal->Com_Arc_ShadowBuffer);\r
}\r
\r
void Com_ReceiveShadowSignal(Com_SignalIdType SignalId, void *SignalDataPtr) {\r
- GET_ArcGroupSignal(SignalId);\r
+ Com_Arc_GroupSignal_type *Arc_GroupSignal = GET_ArcGroupSignal(SignalId);\r
// TODO: CopyData\r
// Com_CopyData(SignalDataPtr, Arc_GroupSignal->Com_Arc_ShadowBuffer, GroupSignal->ComBitSize, 0, GroupSignal->ComBitPosition);\r
Com_ReadSignalDataFromPduBuffer(SignalId, TRUE, SignalDataPtr, (void *)Arc_GroupSignal->Com_Arc_ShadowBuffer);\r
#ifndef COM_INTERNAL_H_\r
#define COM_INTERNAL_H_\r
\r
+#include "Com_Arc_Types.h"\r
\r
-extern const Com_ConfigType * ComConfig;\r
+extern const Com_ConfigType *ComConfig;\r
+extern Com_Arc_Config_type Com_Arc_Config;\r
\r
\r
\r
#endif\r
\r
\r
-#define TESTBIT(source,bit) (*((uint8 *)source + (bit / 8)) & (1 << (bit % 8)))\r
-#define SETBIT(dest,bit) *((uint8 *)dest + (bit / 8)) |= (1 << (bit % 8))\r
-#define CLEARBIT(dest,bit) *((uint8 *)dest + (bit / 8)) &= ~(1 << (bit % 8))\r
+#define TESTBIT(source,bit) ( *( (uint8 *)source + (bit / 8) ) & (uint8)(1u << (bit % 8)) )\r
+#define SETBIT(dest,bit) ( *( (uint8 *)dest + (bit / 8) ) |= (uint8)(1u << (bit % 8)) )\r
+#define CLEARBIT(dest,bit) ( *( (uint8 *)dest + (bit / 8) ) &= (uint8)~(uint8)(1u << (bit % 8)) )\r
+\r
\r
#define GET_Signal(SignalId) \\r
- const ComSignal_type * Signal = &ComConfig->ComSignal[SignalId]\\r
+ (&ComConfig->ComSignal[SignalId])\r
\r
#define GET_ArcSignal(SignalId) \\r
- Com_Arc_Signal_type * Arc_Signal = &Com_Arc_Config.ComSignal[SignalId]\\r
+ (&Com_Arc_Config.ComSignal[SignalId])\r
\r
#define GET_IPdu(IPduId) \\r
- const ComIPdu_type *IPdu = &ComConfig->ComIPdu[IPduId]\\r
+ (&ComConfig->ComIPdu[IPduId])\r
\r
#define GET_ArcIPdu(IPduId) \\r
- Com_Arc_IPdu_type *Arc_IPdu = &Com_Arc_Config.ComIPdu[IPduId]\\r
+ (&Com_Arc_Config.ComIPdu[IPduId])\r
\r
#define GET_GroupSignal(GroupSignalId) \\r
- const ComGroupSignal_type *GroupSignal = &ComConfig->ComGroupSignal[GroupSignalId]\\r
+ (&ComConfig->ComGroupSignal[GroupSignalId])\r
\r
#define GET_ArcGroupSignal(GroupSignalId) \\r
- Com_Arc_GroupSignal_type *Arc_GroupSignal = &Com_Arc_Config.ComGroupSignal[GroupSignalId]\\r
+ (&Com_Arc_Config.ComGroupSignal[GroupSignalId])\r
\r
\r
\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#include "Com_RunTest.h"\r
-#include "Com.h"\r
-#include "Com_Arc_Types.h"\r
-#include "debug.h"\r
-#include <stdlib.h>\r
-\r
-//#define DEBUG_LVL DEBUG_MEDIUM\r
-\r
-static uint8 RTE_ReceivedData[8] = {9,9,9,9,9,9,9,9};\r
-\r
-static void PrintReceivedData(int nBytes) {\r
- DEBUG(DEBUG_HIGH, "Received data: ");\r
- for (int i = 0; i < nBytes; i++) {\r
- DEBUG(DEBUG_HIGH, "%d ", RTE_ReceivedData[i]);\r
- }\r
- DEBUG(DEBUG_HIGH,"\n");\r
-}\r
-\r
-void RTE_Notification(void) {\r
- DEBUG(DEBUG_HIGH, "RTE received notification.");\r
-\r
- Com_ReceiveSignal(11, (void *)RTE_ReceivedData);\r
-\r
- PrintReceivedData(8);\r
-\r
- DEBUG(DEBUG_HIGH, "Received data (signal %d): %d\n", 11, (sint8)RTE_ReceivedData[0]);\r
-}\r
-\r
-uint8 SIL2value;\r
-uint8 SIL2quality;\r
-void RTE_SIL2MESSAGE() {\r
- Com_ReceiveSignalGroup(2);\r
- Com_ReceiveShadowSignal(0, &SIL2value);\r
- Com_ReceiveShadowSignal(1, &SIL2quality);\r
-\r
- DEBUG(DEBUG_HIGH, "SIL2 message received! value: %d, quality: %d\n", SIL2value, SIL2quality);\r
-}\r
-\r
-static uint16 newSpeed;\r
-static uint16 setNewSpeed = 0;\r
-void RTE_EngineChangeSpeed() {\r
- setNewSpeed = 1;\r
-}\r
-\r
-void RTE_EngineMain() {\r
- if (setNewSpeed) {\r
- Com_ReceiveSignal(1, (void *)&newSpeed);\r
-\r
- LDEBUG_PRINTF("Setting engine speed to %d rpm\n", newSpeed);\r
- /*\r
- static uint16 sig;\r
- sig = rand() % 10000;\r
- */\r
- Com_SendSignal(0, (void *)&newSpeed);\r
- setNewSpeed = 0;\r
- }\r
-}\r
timer = timer - 1; \\r
} \\r
\r
-extern Com_Arc_Config_type Com_Arc_Config;\r
\r
-void Com_MainFunctionRx() {\r
+\r
+void Com_MainFunctionRx(void) {\r
//DEBUG(DEBUG_MEDIUM, "Com_MainFunctionRx() excecuting\n");\r
const ComSignal_type *signal;\r
- for (int i = 0; !ComConfig->ComSignal[i].Com_Arc_EOL; i++) {\r
+ for (uint16 i = 0; !ComConfig->ComSignal[i].Com_Arc_EOL; i++) {\r
signal = &ComConfig->ComSignal[i];\r
- GET_ArcSignal(signal->ComHandleId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(signal->ComHandleId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
// Monitor signal reception deadline\r
- if (Arc_IPdu->Com_Arc_IpduStarted && Arc_Signal->ComTimeoutFactor > 0) {\r
+ if ( (Arc_IPdu->Com_Arc_IpduStarted) && (Arc_Signal->ComTimeoutFactor > 0) ) {\r
\r
// Decrease deadline monitoring timer.\r
timerDec(Arc_Signal->Com_Arc_DeadlineCounter);\r
}\r
\r
\r
-void Com_MainFunctionTx() {\r
+void Com_MainFunctionTx(void) {\r
//DEBUG(DEBUG_MEDIUM, "Com_MainFunctionTx() excecuting\n");\r
// Decrease timers.\r
const ComIPdu_type *IPdu;\r
- for (int i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
+ for (uint16 i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
IPdu = &ComConfig->ComIPdu[i];\r
- GET_ArcIPdu(i);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(i);\r
\r
// Is this a IPdu that should be transmitted?\r
- if (IPdu->ComIPduDirection == SEND && Arc_IPdu->Com_Arc_IpduStarted) {\r
+ if ( (IPdu->ComIPduDirection == SEND) && (Arc_IPdu->Com_Arc_IpduStarted) ) {\r
// Decrease minimum delay timer\r
timerDec(Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer);\r
\r
// If IPDU has periodic or mixed transmission mode.\r
- if (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == PERIODIC\r
- || IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == MIXED) {\r
+ if ( (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == PERIODIC)\r
+ || (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == MIXED) ) {\r
\r
timerDec(Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer);\r
\r
// Is it time for a direct transmission?\r
- if (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == MIXED\r
- && Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduNumberOfRepetitionsLeft > 0) {\r
+ if ( (IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeMode == MIXED)\r
+ && (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduNumberOfRepetitionsLeft > 0) ) {\r
\r
timerDec(Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer);\r
\r
// Is it time for a transmission?\r
- if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer == 0\r
- && Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
+ if ( (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer == 0)\r
+ && (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) ) {\r
\r
Com_TriggerIPduSend(i);\r
\r
}\r
\r
// Is it time for a cyclic transmission?\r
- if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer == 0 && Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
+ if ( (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer == 0) && (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) ) {\r
\r
Com_TriggerIPduSend(i);\r
\r
timerDec(Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer);\r
\r
// Is it time for a transmission?\r
- if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer == 0 && Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
+ if ( (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer == 0) && (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) ) {\r
Com_TriggerIPduSend(i);\r
\r
// Reset periodic timer\r
}\r
}\r
}\r
-\r
- // Send scheduled packages.\r
- // Cyclic\r
- for (int i = 0; !ComConfig->ComIPdu[i].Com_Arc_EOL; i++) {\r
- if (ComConfig->ComIPdu[i].ComIPduDirection == SEND) {\r
-\r
- }\r
- }\r
}\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-extern Com_ConfigType ComConfig_TEST;\r
-\r
-extern const PduR_PBConfigType PduRConfigData_TEST[];\r
-\r
-\r
-PduR_StdRTableType PduRConfigData_TEST = {\r
- .TargetPduId = 0,\r
- .NRoutingPaths = 6,\r
- .RoutingTable = {\r
- {\r
- .FctPtrs = &PduR_StdLinFctPtrs,\r
- .DestPduId = 0,\r
- .SduLength = 2,\r
- .DataProvision = PDUR_DIRECT,\r
- .BufferDepth = 3,\r
- },\r
- {\r
- .FctPtrs = &PduR_StdLinFctPtrs,\r
- .DestPduId = 1,\r
- .SduLength = 8,\r
- .DataProvision = PDUR_NO_PROVISION,\r
- },\r
- {\r
- .FctPtrs = &PduR_StdLinFctPtrs,\r
- .DestPduId = 2,\r
- .SduLength = 8,\r
- .DataProvision = PDUR_TRIGGER_TRANSMIT,\r
- .BufferDepth = 3,\r
- },\r
- {\r
- .FctPtrs = &PduR_StdLinFctPtrs,\r
- .DestPduId = 3,\r
- .SduLength = 8,\r
- .DataProvision = PDUR_DIRECT,\r
- .PduR_GatewayMode = 1,\r
- .BufferDepth = 4,\r
- },\r
-\r
- /* Gateway mode between lin interfaces but without buffers inbetween */\r
- {\r
- .FctPtrs = &PduR_StdLinFctPtrs,\r
- .DestPduId = 4,\r
- .SduLength = 8,\r
- .DataProvision = PDUR_NO_PROVISION,\r
- .PduR_GatewayMode = 1,\r
- },\r
-\r
- /* Gateway mode between lin interfaces using trigger transmit data provision */\r
- {\r
- .FctPtrs = &PduR_StdLinFctPtrs,\r
- .DestPduId = 5,\r
- .SduLength = 8,\r
- .DataProvision = PDUR_TRIGGER_TRANSMIT,\r
- .PduR_GatewayMode = 1,\r
- .BufferDepth = 4,\r
- },\r
- }\r
-};\r
\r
\r
\r
-\r
-\r
-\r
-#include <stdlib.h>\r
#include <string.h>\r
\r
#include "Com_Arc_Types.h"\r
#include "Com_Internal.h"\r
#include "Com_misc.h"\r
\r
-extern Com_Arc_Config_type Com_Arc_Config;\r
+\r
\r
void Com_ReadSignalDataFromPdu(\r
const Com_SignalIdType signalId,\r
void *signalData) {\r
\r
// Get PDU\r
- GET_Signal(signalId);\r
- GET_ArcSignal(Signal->ComHandleId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComSignal_type * Signal = GET_Signal(signalId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(Signal->ComHandleId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
// Get data\r
Com_ReadSignalDataFromPduBuffer(\r
void *signalData) {\r
\r
// Get PDU\r
- GET_Signal(parentSignalId);\r
- GET_ArcSignal(Signal->ComHandleId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComSignal_type * Signal = GET_Signal(parentSignalId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(Signal->ComHandleId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
// Get data\r
Com_ReadSignalDataFromPduBuffer(\r
uint8 bitSize;\r
\r
if (!isGroupSignal) {\r
- GET_Signal(signalId);\r
+ const ComSignal_type * Signal = GET_Signal(signalId);\r
signalType = Signal->ComSignalType;\r
signalEndianess = Signal->ComSignalEndianess;\r
signalLength = Signal->ComBitSize / 8;\r
bitPosition = Signal->ComBitPosition;\r
bitSize = Signal->ComBitSize;\r
} else {\r
- GET_GroupSignal(signalId);\r
+ const ComGroupSignal_type *GroupSignal = GET_GroupSignal(signalId);\r
signalType = GroupSignal->ComSignalType;\r
signalEndianess = GroupSignal->ComSignalEndianess;\r
signalLength = GroupSignal->ComBitSize / 8;\r
\r
// Pointer to a byte of the source and dest respectively.\r
uint8 *signalDataBytes = (uint8 *)signalData;\r
- uint8 *pduBufferBytes = (uint8 *)pduBuffer;\r
+ const uint8 *pduBufferBytes = (const uint8 *)pduBuffer;\r
uint8 startBitOffset = 0;\r
\r
if (signalEndianess != CPU_ENDIANESS) {\r
// Swap source bytes before reading\r
// TODO: Must adapt to larger PDUs!\r
uint8 pduBufferBytes_swap[8];\r
- int i = 0;\r
- for (i = 0; i < 8; ++i) {\r
+ for (uint8 i = 0; i < 8; ++i) {\r
pduBufferBytes_swap[i] = pduBufferBytes[7 - i];\r
}\r
startBitOffset = intelBitNrToPduOffset(bitPosition, bitSize, 64);\r
+ //lint -save -esym(960,12.5) PC-Lint Exception: OK. PC-Lint Wrong interpretation of MISRA rule 12.5.\r
Com_ReadDataSegment(\r
signalDataBytes, pduBufferBytes_swap, destSize,\r
startBitOffset, bitSize,\r
SignalTypeSignedness(signalType));\r
-\r
+ //lint -restore\r
} else {\r
startBitOffset = motorolaBitNrToPduOffset(bitPosition);\r
Com_ReadDataSegment(\r
const void *signalData) {\r
\r
// Get PDU\r
- GET_Signal(signalId);\r
- GET_ArcSignal(Signal->ComHandleId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComSignal_type * Signal = GET_Signal(signalId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(Signal->ComHandleId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
// Get data\r
Com_WriteSignalDataToPduBuffer(\r
const void *signalData) {\r
\r
// Get PDU\r
- GET_Signal(parentSignalId);\r
- GET_ArcSignal(Signal->ComHandleId);\r
- GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
+ const ComSignal_type * Signal = GET_Signal(parentSignalId);\r
+ Com_Arc_Signal_type * Arc_Signal = GET_ArcSignal(Signal->ComHandleId);\r
+ Com_Arc_IPdu_type *Arc_IPdu = GET_ArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
// Get data\r
Com_WriteSignalDataToPduBuffer(\r
uint8 bitSize;\r
\r
if (!isGroupSignal) {\r
- GET_Signal(signalId);\r
+ const ComSignal_type * Signal = GET_Signal(signalId);\r
signalType = Signal->ComSignalType;\r
signalLength = Signal->ComBitSize / 8;\r
bitPosition = Signal->ComBitPosition;\r
bitSize = Signal->ComBitSize;\r
} else {\r
- GET_GroupSignal(signalId);\r
+ const ComGroupSignal_type *GroupSignal = GET_GroupSignal(signalId);\r
signalType = GroupSignal->ComSignalType;\r
signalLength = GroupSignal->ComBitSize / 8;\r
bitPosition = GroupSignal->ComBitPosition;\r
}\r
\r
\r
- uint8 *signalDataBytes = (uint8 *)signalData;\r
+ const uint8 *signalDataBytes = (const uint8 *)signalData;\r
uint8 *pduBufferBytes = (uint8 *)pduBuffer;\r
uint8 startBitOffset = motorolaBitNrToPduOffset(bitPosition);\r
uint8 signalBufferSize = SignalTypeToSize(signalType, signalLength);\r
Com_WriteDataSegment(pduBufferBytes, signalDataBytes, signalBufferSize, startBitOffset, bitSize);\r
}\r
\r
-#if (COM_ARC_FILTER_ENABLED == STD_ON)\r
-uint8 Com_Filter(ComSignal_type *signal) {\r
- GET_ArcSignal(signal->ComHandleId);\r
- const ComFilter_type * filter = &signal->ComFilter;\r
- uint8 success = 0;\r
- if (filter->ComFilterAlgorithm == ALWAYS) {\r
- success = 1;\r
-\r
- } else if (filter->ComFilterAlgorithm == NEVER) {\r
- success = 0;\r
-\r
- } else if (filter->ComFilterAlgorithm == ONE_EVERY_N) {\r
- // Treat the special cases that should not exists.\r
- if (filter->ComFilterPeriodFactor < 2) {\r
- // If PeriodFactor is 0 then every package is discarded.\r
- // If PeriodFactor is 1 then every package is passed through.\r
- success = filter->ComFilterPeriodFactor;\r
-\r
- } else {\r
- if (filter->ComFilterArcN == 0) {\r
- success = 1;\r
- } else {\r
- success = 0;\r
- }\r
- Arc_Signal->ComFilter.ComFilterArcN++;\r
- if (filter->ComFilterArcN >= filter->ComFilterPeriodFactor) {\r
- Arc_Signal->ComFilter.ComFilterArcN = 0;\r
- }\r
- }\r
-\r
- } else if (filter->ComFilterAlgorithm == NEW_IS_OUTSIDE) {\r
- if ((filter->ComFilterMin > filter->ComFilterArcNewValue)\r
- || (filter->ComFilterArcNewValue > filter->ComFilterMax)) {\r
- success = 1;\r
- } else {\r
- success = 0;\r
- }\r
-\r
-\r
- } else if (filter->ComFilterAlgorithm == NEW_IS_WITHIN) {\r
- if (filter->ComFilterMin <= filter->ComFilterArcNewValue\r
- && filter->ComFilterArcNewValue <= filter->ComFilterMax) {\r
- success = 1;\r
- } else {\r
- success = 0;\r
- }\r
-\r
-\r
- } else if (filter->ComFilterAlgorithm == MASKED_NEW_DIFFERS_MASKED_OLD) {\r
- if ((filter->ComFilterArcNewValue & filter->ComFilterMask)\r
- != (filter->ComFilterArcNewValue & filter->ComFilterMask)) {\r
- success = 1;\r
- } else {\r
- success = 0;\r
- }\r
-\r
- } else if (filter->ComFilterAlgorithm == MASKED_NEW_DIFFERS_X) {\r
- if ((filter->ComFilterArcNewValue & filter->ComFilterMask) != filter->ComFilterX) {\r
- success = 1;\r
- } else {\r
- success = 0;\r
- }\r
-\r
- } else if (filter->ComFilterAlgorithm == MASKED_NEW_EQUALS_X) {\r
- if ((filter->ComFilterArcNewValue & filter->ComFilterMask) == filter->ComFilterX) {\r
- success = 1;\r
- } else {\r
- success = 0;\r
- }\r
- }\r
-\r
- if (success) {\r
- Arc_Signal->ComFilter.ComFilterArcOldValue = filter->ComFilterArcNewValue;\r
- return 1;\r
- } else return 0;\r
-}\r
-#endif\r
\r
/*\r
* Read an arbitrary signal segment from buffer.\r
\r
boolean negative;\r
\r
- if ( signedOutput && (*(source + sourceStartByte) & (0x80 >> segmentStartBitOffsetInsideByte)) ) {\r
+ if ( signedOutput && (*(source + sourceStartByte) & (0x80u >> segmentStartBitOffsetInsideByte)) ) {\r
negative = TRUE;\r
- sourceStartByteMask = (0xFF00 >> segmentStartBitOffsetInsideByte);\r
+ sourceStartByteMask = (0xFF00u >> segmentStartBitOffsetInsideByte);\r
memset(dest, 0xFF, destByteLength);\r
} else {\r
negative = FALSE;\r
- sourceStartByteMask = (0x00FF >> segmentStartBitOffsetInsideByte);\r
- memset(dest, 0x00, destByteLength);\r
+ sourceStartByteMask = (0x00FFu >> segmentStartBitOffsetInsideByte);\r
+ memset(dest, 0x00u, destByteLength);\r
}\r
\r
// setup to point to end (LSB) of buffers\r
if (negative) {\r
// compiles and writes one destination byte on each iteration\r
do {\r
- shiftReg = *(source - sourceByteNr) | 0xFF00; // read source byte (already matching "byte space")\r
+ shiftReg = *(source - sourceByteNr) | 0xFF00u; // read source byte (already matching "byte space")\r
if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..\r
shiftReg |= sourceStartByteMask; // ..we need to mask out stuff we don't want\r
}\r
shiftReg >>= sourceAlignmentShift; // shift down to align\r
- *(dest - destByteNr) &= shiftReg | 0xFF00; // write into destination byte\r
+ *(dest - destByteNr) &= shiftReg | 0xFF00u; // write into destination byte\r
\r
sourceByteNr++; // move to next source byte\r
- if (sourceAlignmentShift != 0 // do we have more bits for current dest. byte in this source byte?\r
- && sourceByteNr <= sourceByteLength) {\r
- shiftReg = *(source - sourceByteNr) | 0xFF00; // read next source byte\r
+ if ( (sourceAlignmentShift != 0) // do we have more bits for current dest. byte in this source byte?\r
+ && (sourceByteNr <= sourceByteLength) ) {\r
+ shiftReg = *(source - sourceByteNr) | 0xFF00u; // read next source byte\r
if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..\r
shiftReg |= sourceStartByteMask; // ..we need to mask out stuff we don't want\r
}\r
- shiftReg = ~(shiftReg); // shifting inverted to shift in 1:s\r
+ shiftReg = (uint16)~(shiftReg); // shifting inverted to shift in 1:s\r
shiftReg <<= 8; // shift up (to match destination "byte space")\r
- shiftReg = ~(shiftReg);\r
+ shiftReg = (uint16)~shiftReg;\r
shiftReg >>= sourceAlignmentShift; // shift down to align\r
- *(dest - destByteNr) &= shiftReg | 0xFF00; // write into destination byte\r
+ *(dest - destByteNr) &= shiftReg | 0xFF00u; // write into destination byte\r
}\r
destByteNr++;\r
} while (destByteNr < segmentByteLength);\r
} else { // positive\r
do {\r
- shiftReg = *(source - sourceByteNr) & 0x00FF; // read source byte (already matching "byte space")\r
+ shiftReg = *(source - sourceByteNr) & 0x00FFu; // read source byte (already matching "byte space")\r
if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..\r
shiftReg &= sourceStartByteMask; // ..we need to mask out stuff we don't want\r
}\r
shiftReg >>= sourceAlignmentShift; // shift down to align\r
- *(dest - destByteNr) |= shiftReg & 0x00FF; // write into destination byte\r
+ *(dest - destByteNr) |= shiftReg & 0x00FFu; // write into destination byte\r
\r
sourceByteNr++; // move to next source byte\r
if (sourceAlignmentShift != 0 // do we have more bits for current dest. byte in this source byte?\r
&& sourceByteNr <= sourceByteLength) {\r
- shiftReg = *(source - sourceByteNr) & 0x00FF; // read next source byte\r
+ shiftReg = *(source - sourceByteNr) & 0x00FFu; // read next source byte\r
if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..\r
shiftReg &= sourceStartByteMask; // ..we need to mask out stuff we don't want\r
}\r
shiftReg <<= 8; // shift up (to match destination "byte space")\r
shiftReg >>= sourceAlignmentShift; // shift down to align\r
- *(dest - destByteNr) |= shiftReg & 0x00FF; // write into destination byte\r
+ *(dest - destByteNr) |= shiftReg & 0x00FFu; // write into destination byte\r
}\r
destByteNr++;\r
} while (destByteNr < segmentByteLength);\r
\r
/*\r
* Copies the <segmentBitLength> least significant bits from <signal> into <pdu>.\r
- * The bit segment is placed in <pdu> som that the most significant bit ends up\r
+ * The bit segment is placed in <pdu> so that the most significant bit ends up\r
* at <segmentStartBitOffset> from the msb of <pdu>.\r
*/\r
-void Com_WriteDataSegment(uint8 *pdu, const uint8 *signal, uint8 destByteLength,\r
+void Com_WriteDataSegment(uint8 *pdu, const uint8 *signalDataPtr, uint8 destByteLength,\r
uint8 segmentStartBitOffset, uint8 segmentBitLength) {\r
uint8 pduEndBitOffset = segmentStartBitOffset + segmentBitLength - 1;\r
uint8 pduStartByte = segmentStartBitOffset / 8;\r
uint8 pduByteLength = pduEndByte - pduStartByte;\r
\r
uint8 segmentStartBitOffsetInsideByte = segmentStartBitOffset % 8;\r
- uint8 pduStartByteMask = (0xFF >> segmentStartBitOffsetInsideByte);\r
+ uint8 pduStartByteMask = (0xFFu >> segmentStartBitOffsetInsideByte);\r
\r
uint8 pduAlignmentShift = 7 - (pduEndBitOffset % 8);\r
uint8 segmentByteLength = 1 + (segmentBitLength - 1) / 8;\r
\r
// setup to point to end (LSB) of buffers\r
pdu += pduEndByte;\r
- signal += destByteLength - 1;\r
+ signalDataPtr += destByteLength - 1;\r
\r
// splits and writes one source byte on each iteration\r
do {\r
- shiftReg = *(signal - signalByteNr) & 0x00FF;\r
+ shiftReg = *(signalDataPtr - signalByteNr) & 0x00FFu;\r
clearReg = 0x00FF;\r
+ //lint -save -e701 -e734 //PC-Lint Wrong interpretation of MISRA rule 10.5.\r
shiftReg <<= pduAlignmentShift;\r
clearReg <<= pduAlignmentShift;\r
+ //lint -restore\r
if (pduByteNr == pduByteLength) {\r
shiftReg &= pduStartByteMask;\r
clearReg &= pduStartByteMask;\r
}\r
- *(pdu - pduByteNr) &= ~(clearReg & 0x00FF);\r
- *(pdu - pduByteNr) |= shiftReg & 0x00FF;\r
+ *(pdu - pduByteNr) &= (uint16)~(clearReg & 0x00FFu);\r
+ *(pdu - pduByteNr) |= shiftReg & 0x00FFu;\r
\r
pduByteNr++;\r
- if (pduAlignmentShift != 0\r
- && pduByteNr <= pduByteLength) {\r
- shiftReg = *(signal - signalByteNr) & 0x00FF;\r
+ if ( (pduAlignmentShift != 0)\r
+ && (pduByteNr <= pduByteLength) ) {\r
+ shiftReg = *(signalDataPtr - signalByteNr) & 0x00FFu;\r
clearReg = 0x00FF;\r
+ //lint -save -e701 -e734 //PC-Lint Wrong interpretation of MISRA rule 10.5.\r
shiftReg <<= pduAlignmentShift;\r
clearReg <<= pduAlignmentShift;\r
shiftReg >>= 8;\r
clearReg >>= 8;\r
+ //lint -restore\r
if (pduByteNr == pduByteLength) {\r
shiftReg &= pduStartByteMask;\r
clearReg &= pduStartByteMask;\r
}\r
- *(pdu - pduByteNr) &= ~(clearReg & 0x00FF);\r
- *(pdu - pduByteNr) |= shiftReg & 0x00FF;\r
+ *(pdu - pduByteNr) &= (uint16)~(clearReg & 0x00FFu);\r
+ *(pdu - pduByteNr) |= shiftReg & 0x00FFu;\r
}\r
signalByteNr++;\r
} while (signalByteNr < segmentByteLength);\r
*/\r
uint8 motorolaBitNrToPduOffset (uint8 motorolaBitNr) {\r
uint8 byte = motorolaBitNr / 8;\r
+ uint8 offsetToByteStart = (uint8) (byte * 8u);\r
uint8 offsetInsideByte = motorolaBitNr % 8;\r
- return byte * 8 + (7 - offsetInsideByte);\r
+ return (uint8) (offsetToByteStart + (7u - offsetInsideByte));\r
}\r
\r
/*\r
* intelBitNr (after PDU byte-swap): 39 38 37 36 35 34 33 32 31 ... 3 2 1 0\r
* intelBitNrToPduOffset: 0 1 2 3 4 5 6 7 8 ... 36 37 38 39\r
*/\r
-uint8 intelBitNrToPduOffset (uint8 intelBitNr, uint8 segmentBitLength, uint8 pduBitLenght) {\r
- return pduBitLenght - (intelBitNr + segmentBitLength);\r
+uint8 intelBitNrToPduOffset (uint8 intelBitNr, uint8 segmentBitLength, uint8 pduBitLength) {\r
+ return pduBitLength - (intelBitNr + segmentBitLength);\r
}\r
#ifndef COM_MISC_H_\r
#define COM_MISC_H_\r
\r
-/*\r
- * The following function are exported only for testing purposes.\r
- */\r
-uint8 Com_Filter(ComSignal_type *signal);\r
+\r
\r
// Read data from PDU\r
void Com_ReadSignalDataFromPdu(\r
void Com_ReadDataSegment(uint8 *dest, const uint8 *source, uint8 destByteLength,\r
uint8 segmentStartBitOffset, uint8 segmentBitLength, boolean signedOutput);\r
\r
-void Com_WriteDataSegment(uint8 *pdu, const uint8 *signal, uint8 destByteLength,\r
+void Com_WriteDataSegment(uint8 *pdu, const uint8 *signalDataPtr, uint8 destByteLength,\r
uint8 segmentStartBitOffset, uint8 segmentBitLength);\r
\r
uint8 motorolaBitNrToPduOffset (uint8 motorolaBitNr);\r
-uint8 intelBitNrToPduOffset (uint8 intelBitNr, uint8 segmentBitLength, uint8 pduBitLenght);\r
+uint8 intelBitNrToPduOffset (uint8 intelBitNr, uint8 segmentBitLength, uint8 pduBitLength);\r
\r
\r
#endif /* COM_MISC_H_ */\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+//lint -emacro(904,COMM_VALIDATE_INIT,COMM_VALIDATE_CHANNEL,COMM_VALIDATE_USER,COMM_VALIDATE_PARAMETER) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
\r
/* Globally fulfilled requirements */\r
/** @req COMM43 */\r
\r
#include <string.h>\r
#include "ComM.h"\r
+#include "ComM_Dcm.h"\r
+#include "ComM_EcuM.h"\r
#if (COMM_DEV_ERROR_DETECT == STD_ON)\r
#include "Det.h"\r
#endif\r
#include "ComM_Internal.h"\r
\r
/** @req COMM506 @req COMM353 */\r
-#if defined(USE_CANSM)\r
#include "CanSM.h"\r
-#endif\r
\r
/** @req COMM347 */\r
#if defined(USE_NM) || defined(COMM_TESTS)\r
#endif\r
};\r
\r
-static ComM_ConfigType * ComM_Config;\r
+static const ComM_ConfigType * ComM_Config;\r
\r
\r
void ComM_Init(const ComM_ConfigType * Config ){\r
\r
ComM_Config = Config;\r
\r
- for (int i = 0; i < COMM_CHANNEL_COUNT; ++i) {\r
+ for (uint8 i = 0; i < COMM_CHANNEL_COUNT; ++i) {\r
ComM_Internal.Channels[i].Mode = COMM_NO_COMMUNICATION; /**< @req COMM485 */\r
ComM_Internal.Channels[i].SubMode = COMM_SUBMODE_NONE;\r
ComM_Internal.Channels[i].UserRequestMask = 0;\r
ComM_Internal.Channels[i].NmIndicationMask = COMM_NM_INDICATION_NONE;\r
}\r
\r
- for (int i = 0; i < COMM_USER_COUNT; ++i) {\r
+ for (uint8 i = 0; i < COMM_USER_COUNT; ++i) {\r
ComM_Internal.Users[i].RequestedMode = COMM_NO_COMMUNICATION;\r
}\r
\r
ComM_Internal_UserType* UserInternal = &ComM_Internal.Users[User];\r
\r
UserInternal->RequestedMode = ComMode; /**< @req COMM471 @req COMM500 @req COMM92 */\r
- uint32 userMask = (1 << User);\r
+ uint32 userMask = (1LU << User);\r
\r
Std_ReturnType requestStatus = E_OK;\r
\r
/* Go through users channels. Relay to SMs. Collect overall success status */\r
- for (int i = 0; i < UserConfig->ChannelCount; ++i) {\r
+ for (uint8 i = 0; i < UserConfig->ChannelCount; ++i) {\r
const ComM_ChannelType* Channel = UserConfig->ChannelList[i];\r
ComM_Internal_ChannelType* ChannelInternal = &ComM_Internal.Channels[Channel->Number];\r
\r
ChannelInternal->UserRequestMask &= ~(userMask);\r
} else if (ComMode == COMM_FULL_COMMUNICATION) {\r
ChannelInternal->UserRequestMask |= userMask;\r
+ } else {\r
+ //Nothing to be done.\r
}\r
\r
// take request -> new state\r
Std_ReturnType status = ComM_Internal_UpdateChannelState(Channel, TRUE);\r
- if (status > requestStatus) requestStatus = status;\r
+ if (status > requestStatus){\r
+ requestStatus = status;\r
+ }\r
\r
}\r
\r
COMM_VALIDATE_INIT(COMM_SERVICEID_GETMAXCOMMODE, COMM_E_UNINIT);\r
COMM_VALIDATE_USER(User, COMM_SERVICEID_GETMAXCOMMODE, E_NOT_OK);\r
// Not implemented\r
+ (void)ComMode;\r
return E_NOT_OK;\r
}\r
\r
COMM_VALIDATE_INIT(COMM_SERVICEID_LIMITECUTONOCOMMODE, COMM_E_UNINIT);\r
#if (COMM_MODE_LIMITATION_ENABLED == STD_ON)\r
ComM_Internal.NoCommunication = Status;\r
- int Channel;\r
+ uint8 Channel;\r
+ Std_ReturnType totalStatus = E_OK;\r
for (Channel = 0; Channel < COMM_CHANNEL_COUNT; Channel++) {\r
const ComM_ChannelType* ChannelConf = &ComM_Config->Channels[Channel];\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ Std_ReturnType status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ if (status > totalStatus) {\r
+ totalStatus = status;\r
+ }\r
}\r
- return E_OK;\r
+ return totalStatus;\r
#else\r
return E_NOT_OK;\r
#endif\r
Std_ReturnType ComM_SetECUGroupClassification( ComM_InhibitionStatusType Status ){\r
COMM_VALIDATE_INIT(COMM_SERVICEID_SETECUGROUPCLASSIFICATION, COMM_E_UNINIT);\r
// Not implemented\r
+ (void)Status;\r
return E_NOT_OK;\r
}\r
\r
\r
// Used to simulate Wake-up\r
ChannelInternal->NmIndicationMask |= COMM_NM_INDICATION_RESTART;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ Std_ReturnType status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ if (status != E_OK) {\r
+ // TODO: report error?\r
+ }\r
}\r
\r
/** @req COMM807 */\r
ComM_Internal_ChannelType* ChannelInternal = &ComM_Internal.Channels[Channel];\r
\r
ChannelInternal->NmIndicationMask |= COMM_NM_INDICATION_NETWORK_MODE;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ Std_ReturnType status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ if (status != E_OK) {\r
+ // TODO: report error?\r
+ }\r
}\r
\r
/** @req COMM809 */\r
ComM_Internal_ChannelType* ChannelInternal = &ComM_Internal.Channels[Channel];\r
\r
ChannelInternal->NmIndicationMask |= COMM_NM_INDICATION_PREPARE_BUS_SLEEP;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ Std_ReturnType status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ if (status != E_OK) {\r
+ // TODO: report error?\r
+ }\r
}\r
\r
/** @req COMM811 */\r
ComM_Internal_ChannelType* ChannelInternal = &ComM_Internal.Channels[Channel];\r
\r
ChannelInternal->NmIndicationMask |= COMM_NM_INDICATION_BUS_SLEEP;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ Std_ReturnType status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ if (status != E_OK) {\r
+ // TODO: report error?\r
+ }\r
}\r
\r
/** @req COMM813 */\r
ComM_Internal_ChannelType* ChannelInternal = &ComM_Internal.Channels[Channel];\r
\r
ChannelInternal->NmIndicationMask |= COMM_NM_INDICATION_RESTART;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ Std_ReturnType status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ if (status != E_OK) {\r
+ // TODO: report error?\r
+ }\r
+\r
}\r
\r
\r
// Diagnostic Communication Manager Callbacks\r
// ------------------------------------------\r
\r
-void ComM_DCM_ActiveDiagnostic(){\r
+void ComM_DCM_ActiveDiagnostic(void){\r
COMM_VALIDATE_INIT(COMM_SERVICEID_DCM_ACTIVEDIAGNOSTIC);\r
}\r
\r
-void ComM_DCM_InactiveDiagnostic(){\r
+void ComM_DCM_InactiveDiagnostic(void){\r
COMM_VALIDATE_INIT(COMM_SERVICEID_DCM_INACTIVEDIAGNOSTIC);\r
}\r
\r
void ComM_BusSM_ModeIndication( NetworkHandleType Channel, ComM_ModeType ComMode ){\r
COMM_VALIDATE_INIT(COMM_SERVICEID_BUSSM_MODEINDICATION);\r
COMM_VALIDATE_CHANNEL(Channel, COMM_SERVICEID_BUSSM_MODEINDICATION);\r
+ // Not implemented\r
+ (void)ComMode;\r
}\r
\r
\r
// Scheduled main function\r
// -----------------------\r
+\r
+// Prototype right here because this function should not be exposed\r
+void ComM_MainFunction(NetworkHandleType Channel);\r
+\r
/** @req COMM429 */\r
void ComM_MainFunction(NetworkHandleType Channel) {\r
const ComM_ChannelType* ChannelConf = &ComM_Config->Channels[Channel];\r
\r
if ((ChannelConf->NmVariant == COMM_NM_VARIANT_NONE) ||\r
(ChannelConf->NmVariant == COMM_NM_VARIANT_LIGHT)) {\r
- ComM_Internal_TickFullComMinTime(ChannelConf, ChannelInternal);\r
+ Std_ReturnType status = ComM_Internal_TickFullComMinTime(ChannelConf, ChannelInternal);\r
+ if (status != E_OK) {\r
+ // TODO: Report error?\r
+ }\r
}\r
if (ChannelConf->NmVariant == COMM_NM_VARIANT_LIGHT) {\r
- ComM_Internal_TickLightTime(ChannelConf, ChannelInternal);\r
+ Std_ReturnType status = ComM_Internal_TickLightTime(ChannelConf, ChannelInternal);\r
+ if (status != E_OK) {\r
+ // TODO: Report error?\r
+ }\r
}\r
\r
}\r
// Internal functions\r
// ----------------------------------------------------------------------------\r
\r
-static inline void ComM_Internal_TickFullComMinTime(const ComM_ChannelType* ChannelConf, ComM_Internal_ChannelType* ChannelInternal) {\r
+static inline Std_ReturnType ComM_Internal_TickFullComMinTime(const ComM_ChannelType* ChannelConf, ComM_Internal_ChannelType* ChannelInternal) {\r
+ Std_ReturnType status = E_OK;\r
if (ChannelInternal->Mode == COMM_FULL_COMMUNICATION) {\r
if (ChannelConf->MainFunctionPeriod >= ChannelInternal->FullComMinDurationTimeLeft) {\r
ChannelInternal->FullComMinDurationTimeLeft = 0;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
} else {\r
ChannelInternal->FullComMinDurationTimeLeft -= ChannelConf->MainFunctionPeriod;\r
}\r
}\r
+ return status;\r
}\r
\r
-static inline boolean ComM_Internal_FullComMinTime_AllowsExit(const ComM_ChannelType* ChannelConf, ComM_Internal_ChannelType* ChannelInternal) {\r
+static inline boolean ComM_Internal_FullComMinTime_AllowsExit(const ComM_ChannelType* ChannelConf, const ComM_Internal_ChannelType* ChannelInternal) {\r
+ boolean rv;\r
/** @req COMM311 */\r
if ((ChannelConf->NmVariant == COMM_NM_VARIANT_LIGHT) ||\r
(ChannelConf->NmVariant == COMM_NM_VARIANT_NONE)){\r
- return (ChannelInternal->FullComMinDurationTimeLeft == 0);\r
+ rv = (ChannelInternal->FullComMinDurationTimeLeft == 0);\r
} else {\r
- return TRUE;\r
+ rv = TRUE;\r
}\r
+ return rv;\r
}\r
\r
-static inline void ComM_Internal_TickLightTime(const ComM_ChannelType* ChannelConf, ComM_Internal_ChannelType* ChannelInternal) {\r
+static inline Std_ReturnType ComM_Internal_TickLightTime(const ComM_ChannelType* ChannelConf, ComM_Internal_ChannelType* ChannelInternal) {\r
+ Std_ReturnType status = E_OK;\r
if ((ChannelInternal->Mode == COMM_FULL_COMMUNICATION) &&\r
(ChannelInternal->SubMode == COMM_SUBMODE_READY_SLEEP)) {\r
if (ChannelConf->MainFunctionPeriod >= ChannelInternal->LightTimeoutTimeLeft) {\r
ChannelInternal->LightTimeoutTimeLeft = 0;\r
- ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
+ status = ComM_Internal_UpdateChannelState(ChannelConf, FALSE);\r
} else {\r
ChannelInternal->LightTimeoutTimeLeft -= ChannelConf->MainFunctionPeriod;\r
}\r
}\r
+ return status;\r
}\r
\r
/** @req COMM678.2 */\r
const ComM_UserType* UserConfig = &ComM_Config->Users[User];\r
\r
ComM_ModeType requestMode = COMM_FULL_COMMUNICATION;\r
+ Std_ReturnType totalStatus = E_OK;\r
/* Go through users channels. Relay to SMs. Collect overall mode and success status */\r
- for (int i = 0; i < UserConfig->ChannelCount; ++i) {\r
+ for (uint8 i = 0; i < UserConfig->ChannelCount; ++i) {\r
const ComM_ChannelType* Channel = UserConfig->ChannelList[i];\r
Std_ReturnType status = E_OK;\r
- ComM_ModeType mode;\r
+ ComM_ModeType mode = COMM_FULL_COMMUNICATION;\r
switch (Channel->BusType) {\r
case COMM_BUS_TYPE_CAN:\r
status = CanSM_GetCurrentComMode(Channel->BusSMNetworkHandle, &mode);\r
requestMode = mode;\r
}\r
} else {\r
- return status;\r
+ totalStatus = status;\r
}\r
}\r
*ComMode = requestMode;\r
- return E_OK;\r
+ return totalStatus;\r
}\r
\r
/** @req COMM281.partially @req COMM70 @req COMM73 @req COMM71 @req COMM72\r
nmStatus = Nm_NetworkRequest(ChannelConf->NmChannelHandle); /**< @req COMM129.1 */\r
} else if (ChannelInternal->SubMode == COMM_SUBMODE_READY_SLEEP) {\r
nmStatus = Nm_NetworkRelease(ChannelConf->NmChannelHandle); /**< @req COMM133.1 */\r
+ } else {\r
+ //Nothing to be done.\r
}\r
}\r
if (nmStatus != NM_E_OK) {\r
/* Processes all requests etc. and makes state machine transitions accordingly */\r
static Std_ReturnType ComM_Internal_UpdateChannelState( const ComM_ChannelType* ChannelConf, boolean isRequest ) {\r
ComM_Internal_ChannelType* ChannelInternal = &ComM_Internal.Channels[ChannelConf->Number];\r
-\r
+ Std_ReturnType status = E_OK;\r
switch (ChannelInternal->Mode) {\r
case COMM_NO_COMMUNICATION:\r
- return ComM_Internal_UpdateFromNoCom(ChannelConf, ChannelInternal, isRequest);\r
+ status = ComM_Internal_UpdateFromNoCom(ChannelConf, ChannelInternal, isRequest);\r
+ break;\r
case COMM_SILENT_COMMUNICATION:\r
- return ComM_Internal_UpdateFromSilentCom(ChannelConf, ChannelInternal, isRequest);\r
+ status = ComM_Internal_UpdateFromSilentCom(ChannelConf, ChannelInternal, isRequest);\r
+ break;\r
case COMM_FULL_COMMUNICATION:\r
- return ComM_Internal_UpdateFromFullCom(ChannelConf, ChannelInternal, isRequest);\r
+ status = ComM_Internal_UpdateFromFullCom(ChannelConf, ChannelInternal, isRequest);\r
+ break;\r
default:\r
- return E_NOT_OK;\r
+ status = E_NOT_OK;\r
+ break;\r
}\r
+ return status;\r
}\r
\r
static inline Std_ReturnType ComM_Internal_UpdateFromNoCom(const ComM_ChannelType* ChannelConf,\r
(ComM_Internal.NoCommunication == TRUE)) {\r
// Inhibition is active\r
/** @req COMM302 @req COMM218 @req COMM219 @req COMM215.3 @req COMM216.3 */\r
- if (isRequest) ComM_Internal.InhibitCounter++;\r
+ if (isRequest){\r
+ ComM_Internal.InhibitCounter++;\r
+ }\r
} else {\r
if (ChannelInternal->UserRequestMask != 0) {\r
// Channel is requested\r
(ComM_Internal.NoCommunication == TRUE)) {\r
// Inhibition is active\r
/** @req COMM215.2 @req COMM216.2 */\r
- if (isRequest) ComM_Internal.InhibitCounter++;\r
+ if (isRequest) {\r
+ ComM_Internal.InhibitCounter++;\r
+ }\r
} else {\r
if (ChannelInternal->UserRequestMask != 0) {\r
// Channel is requested\r
status = ComM_Internal_Enter_ReadySleep(ChannelConf, ChannelInternal);\r
}\r
}\r
- if (isRequest) ComM_Internal.InhibitCounter++;\r
+ if (isRequest){\r
+ ComM_Internal.InhibitCounter++;\r
+ }\r
} else {\r
if (ChannelInternal->UserRequestMask == 0) {\r
// Channel no longer requested\r
\r
Std_ReturnType status, globalStatus = E_OK;\r
status = ComM_Internal_NotifyNm(ChannelConf); /**< @req COMM129.2 */\r
- if (status > globalStatus) globalStatus = status;\r
+ if (status > globalStatus){\r
+ globalStatus = status;\r
+ }\r
if (propagateToBusSM) {\r
status = ComM_Internal_PropagateComMode(ChannelConf);\r
- if (status > globalStatus) globalStatus = status;\r
+ if (status > globalStatus){\r
+ globalStatus = status;\r
+ }\r
}\r
return globalStatus;\r
}\r
\r
Std_ReturnType status, globalStatus = E_OK;\r
status = ComM_Internal_NotifyNm(ChannelConf); /**< @req COMM133.1 */\r
- if (status > globalStatus) globalStatus = status;\r
+ if (status > globalStatus){\r
+ globalStatus = status;\r
+ }\r
if (propagateToBusSM) {\r
status = ComM_Internal_PropagateComMode(ChannelConf);\r
- if (status > globalStatus) globalStatus = status;\r
+ if (status > globalStatus){\r
+ globalStatus = status;\r
+ }\r
}\r
return globalStatus;\r
}\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-#ifndef COMM_INTERNAL_H_\r
-#define COMM_INTERNAL_H_\r
+#ifndef COMM_INTERNAL_H\r
+#define COMM_INTERNAL_H\r
\r
#include "ComM_Types.h"\r
\r
typedef enum {\r
COMM_SUBMODE_NETWORK_REQUESTED,\r
COMM_SUBMODE_READY_SLEEP,\r
- COMM_SUBMODE_NONE,\r
+ COMM_SUBMODE_NONE\r
} ComM_Internal_SubModeType;\r
\r
typedef struct {\r
uint16 InhibitCounter; /**< @req COMM138 @req COMM141 */\r
} ComM_InternalType;\r
\r
-#define COMM_NM_INDICATION_NONE 0\r
-#define COMM_NM_INDICATION_NETWORK_MODE (1 << 0)\r
-#define COMM_NM_INDICATION_PREPARE_BUS_SLEEP (1 << 1)\r
-#define COMM_NM_INDICATION_BUS_SLEEP (1 << 2)\r
-#define COMM_NM_INDICATION_RESTART (1 << 3)\r
+#define COMM_NM_INDICATION_NONE (uint8)(0u)\r
+#define COMM_NM_INDICATION_NETWORK_MODE (uint8)(1u)\r
+#define COMM_NM_INDICATION_PREPARE_BUS_SLEEP (uint8)(1u << 1)\r
+#define COMM_NM_INDICATION_BUS_SLEEP (uint8)(1u << 2)\r
+#define COMM_NM_INDICATION_RESTART (uint8)(1u << 3)\r
\r
/* Delegate request to users channels and call ComM_Internal_UpdateChannelState */\r
static Std_ReturnType ComM_Internal_RequestComMode(\r
ComM_UserHandleType User, ComM_ModeType ComMode );\r
\r
/* Looks at stored requests for Channel and updates state accordingly */\r
-static Std_ReturnType ComM_Internal_UpdateChannelState( const ComM_ChannelType* Channel, boolean isRequest );\r
+static Std_ReturnType ComM_Internal_UpdateChannelState( const ComM_ChannelType* ChannelConf, boolean isRequest );\r
\r
static inline Std_ReturnType ComM_Internal_UpdateFromNoCom(const ComM_ChannelType* ChannelConf,\r
ComM_Internal_ChannelType* ChannelInternal, boolean isRequest);\r
ComM_UserHandleType User, ComM_ModeType* ComMode );\r
\r
/* Tick 'Min full com duration' timeout, and update state if needed */\r
-static inline void ComM_Internal_TickFullComMinTime(const ComM_ChannelType* ChannelConf,\r
+static inline Std_ReturnType ComM_Internal_TickFullComMinTime(const ComM_ChannelType* ChannelConf,\r
ComM_Internal_ChannelType* ChannelInternal);\r
\r
static inline boolean ComM_Internal_FullComMinTime_AllowsExit(const ComM_ChannelType* ChannelConf,\r
- ComM_Internal_ChannelType* ChannelInternal);\r
+ const ComM_Internal_ChannelType* ChannelInternal);\r
\r
/* Tick 'Light nm' timeout, and update state if needed */\r
-static inline void ComM_Internal_TickLightTime(const ComM_ChannelType* ChannelConf,\r
+static inline Std_ReturnType ComM_Internal_TickLightTime(const ComM_ChannelType* ChannelConf,\r
ComM_Internal_ChannelType* ChannelInternal);\r
\r
-#endif /* COMM_INTERNAL_H_ */\r
+#endif /* COMM_INTERNAL_H */\r
/*\r
* The state of the PDU router.\r
*/\r
-PduR_StateType PduRState = PDUR_UNINIT;\r
+PduR_StateType PduRState = PDUR_UNINIT; // 960, 31 PC-Lint: Borde åtgärdas\r
\r
const PduR_PBConfigType * PduRConfig;\r
\r
uint8 failed = 0;\r
\r
// Initialize buffers.\r
- int bufferNr = 0;\r
- int i = 0;\r
+ uint16 bufferNr = 0;\r
PduRRoutingPath_type *path;\r
PduRConfig->PduRRoutingTable->NRoutingPaths = 0;\r
- for (i = 0; !PduRConfig->PduRRoutingTable->PduRRoutingPath[i].PduR_Arc_EOL && !failed; i++) {\r
+ for (uint16 i = 0; (!PduRConfig->PduRRoutingTable->PduRRoutingPath[i].PduR_Arc_EOL) && (!failed); i++) {\r
PduRConfig->PduRRoutingTable->NRoutingPaths++;\r
path = &PduRConfig->PduRRoutingTable->PduRRoutingPath[i];\r
\r
failed = 1;\r
break;\r
}\r
+ // 586 PC-Lint (malloc) ticket #135\r
if ((buffer->Buffer = (uint8 *)malloc(buffer->Depth * sizeof(uint8) * path->SduLength)) == 0) {\r
DEBUG(DEBUG_LOW,"PduR_Init: Initialization of buffer failed. Buffer space could not be allocated for buffer number %d\n", bufferNr);\r
failed = 1;\r
(*ptr) = (*ptr) + Buffer->Length;\r
\r
// TODO make more efficient without multiplication.\r
- if (*ptr >= Buffer->Buffer + Buffer->Depth * Buffer->Length) {\r
+ //lint -e946 //PC-Lint Exception of MISRA rule 17.3\r
+ if ( *ptr >= ( Buffer->Buffer + (Buffer->Depth * Buffer->Length) ) ) {\r
*ptr = Buffer->Buffer;\r
}\r
//*val = (*val + 1) % Buffer->Depth;\r
\r
uint8 PduR_BufferIsFull(PduRTxBuffer_type *Buffer) {\r
imask_t state = McuE_EnterCriticalSection();\r
+ uint8 rv = 0;\r
if (Buffer->NrItems < Buffer->Depth) {\r
- return 0;\r
+ rv = 0;\r
} else {\r
- return 1;\r
+ rv = 1;\r
}\r
McuE_ExitCriticalSection(state);\r
+ return rv;\r
}\r
\r
\r
}\r
#endif\r
\r
-uint32 PduR_GetConfigurationId () {\r
+uint32 PduR_GetConfigurationId (void) {\r
//PduR_DevCheck(0,1,0x18,E_NOT_OK);\r
return PduRConfig->PduRConfigurationId;\r
}\r
\r
if (route->PduR_GatewayMode == 0) {\r
// This is an ordinary request.\r
+ // 534 PC-Lint (ignoring return value) ticket #134:\r
route->FctPtrs.TargetIndicationFctPtr(route->PduRDestPdu.DestPduId, SduPtr); // Send PDU to next receptor.\r
\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) {\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) ) {\r
// This is a gateway request, but without any data provision (buffer usage).\r
PduInfoType PduInfo = {\r
- .SduDataPtr = (uint8 *)SduPtr,\r
+ .SduDataPtr = (uint8 *)SduPtr, // 926, 960 PC-Lint: Beror på att funktion PduR_LoIfRxIndication(...) fel-definerad TICKET 130\r
.SduLength = route->SduLength\r
};\r
+ // 534 PC-Lint (ignoring return value) ticket #134:\r
route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo); // Send PDU to next receptor.\r
\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) {\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) ) {\r
// Ths is a gateway request which uses trigger transmit data provision. PDUR255\r
DEBUG(DEBUG_LOW,"\tUsing gateway mode with trigger transmit provision\n");\r
\r
}\r
}\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_DIRECT) {\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_DIRECT) ) {\r
// This is a gateway request using a direct data provision fifo. PDUR258\r
DEBUG(DEBUG_LOW,"\tUsing gateway mode with direct provision\n");\r
\r
// Make new PduInfoPackage\r
DEBUG(DEBUG_LOW,"\tNo transfer confirmation pending. Forwarding packet.\n");\r
PduInfoType PduInfoPtr = {\r
- .SduDataPtr = (uint8 *)SduPtr,\r
+ .SduDataPtr = (uint8 *)SduPtr, // 926, 960 PC-Lint: Beror på att funktion PduR_LoIfRxIndication(...) fel-definerad TICKET 130\r
.SduLength = route->SduLength\r
};\r
if (route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfoPtr) == E_OK) {\r
DEBUG(DEBUG_LOW,"\tTransmission failed. PDUR_E_PDU_INSTANCE_LOST\n");\r
}\r
}\r
+ } else {\r
+ // Nothing to be done.\r
}\r
}\r
\r
// This is an ordinary request.\r
route->FctPtrs.TargetConfirmationFctPtr(route->PduRDestPdu.DestPduId); // Forward confirmation\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) {\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) ) {\r
// A gateway request without provision. Just forward confirmation.\r
route->FctPtrs.TargetConfirmationFctPtr(route->PduRDestPdu.DestPduId); // Forward confirmation\r
\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) {\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) ) {\r
// The route is using gateway mode and trigger transmit data provision. PDUR256\r
DEBUG(DEBUG_LOW,"\tUsing gateway mode with trigger transmit data provision.\n", PduId);\r
\r
}\r
\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_DIRECT) {\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_DIRECT) ) {\r
// The route is using a direct data provision fifo. PDUR259\r
DEBUG(DEBUG_LOW,"\tUsing gateway mode with direct data provision.\n", PduId);\r
\r
}\r
}\r
}\r
+ } else {\r
+ // Nothing to be done.\r
}\r
}\r
\r
// Find out if this is a gateway or ordinary trigger.\r
//if (route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) { // This is an ordinary trigger.\r
if (route->PduR_GatewayMode == 0) { // This is an ordinary trigger.\r
+ // 534 PC-Lint (ignoring return value) ticket #134:\r
route->FctPtrs.TargetTriggerTransmitFctPtr(route->PduRDestPdu.DestPduId, SduPtr);\r
\r
- } else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) { // The route is using a trigger transmit fifo. PDUR256\r
+ } else if ( (route->PduR_GatewayMode == 1) && (route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) ) { // The route is using a trigger transmit fifo. PDUR256\r
DEBUG(DEBUG_LOW,"\tUsing gateway mode with trigger transmit data provision.\n", PduId);\r
memcpy((void *)SduPtr, (void *)route->PduRDestPdu.TxBufferRef->First, sizeof(uint8) * route->SduLength);\r
\r
+ } else {\r
+ // Nothing to be done.\r
}\r
}\r
\r
libitem-y += $(ROOTDIR)/embunit/textui/obj_$(ARCH)/libtextui.a\r
\r
#linkfile\r
-ldcmdfile-$(CFG_MPC55XX) = $(ROOTDIR)/arch/$(ARCH)/scripts/linkscript_gcc.ldf\r
+ldcmdfile-$(CFG_MPC55XX) = $(ROOTDIR)/arch/$(ARCH)/scripts/linkscript_$(COMPILER).ldf\r
\r
build-exe-y = ../../../$(target)_$(ARCH).$(TE)\r
\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-\r
+// 904 PC-Lint: OK. Allow VALIDATE, VALIDATE_RV and VALIDATE_NO_RV to return value.\r
+//lint -emacro(904,VALIDATE_RV,VALIDATE_NO_RV,VALIDATE)\r
\r
\r
/*\r
#include "Dem.h"\r
#include "MemMap.h"\r
//#include "SchM_Dcm.h"\r
-#include "ComM_Dcm.h"\r
+//#include "ComM_Dcm.h"\r
#include "PduR_Dcm.h"\r
#include "ComStack_Types.h"\r
#include "McuExtensions.h"\r
DCM_INITIALIZED\r
} Dcm_StateType;\r
\r
+//lint -esym(551,dcmState) PC-Lint - Turn of warning of dcmState not accessed when having DCM_DEV_ERROR_DETECT to STD_OFF\r
static Dcm_StateType dcmState = DCM_UNINITIALIZED;\r
\r
\r
// Defined in Dcm.h\r
\r
\r
-\r
/*\r
* Procedure: Dcm_Init\r
* Reentrant: No\r
DslMain();\r
}\r
\r
+\r
/***********************************************\r
* Interface for BSW modules and SW-Cs (8.3.2) *\r
***********************************************/\r
BufReq_ReturnType Dcm_ProvideRxBuffer(PduIdType dcmRxPduId, PduLengthType tpSduLength, PduInfoType **pduInfoPtr)\r
{\r
- BufReq_ReturnType returnCode = BUFREQ_OK;\r
+ BufReq_ReturnType returnCode;\r
\r
VALIDATE_RV(dcmState == DCM_INITIALIZED, DCM_PROVIDE_RX_BUFFER_ID, DCM_E_UNINIT, BUFREQ_NOT_OK);\r
VALIDATE_RV(dcmRxPduId < DCM_DSL_RX_PDU_ID_LIST_LENGTH, DCM_PROVIDE_RX_BUFFER_ID, DCM_E_PARAM, BUFREQ_NOT_OK);\r
\r
+ //lint --e(929) // PC-Lint exception, MISRA 11.4 Ok by atosar\r
+ //lint --e(960) // PC-Lint exception, MISRA 11.5 Ok by atosar\r
returnCode = DslProvideRxBufferToPdur(dcmRxPduId, tpSduLength, (const PduInfoType**)pduInfoPtr);\r
\r
return returnCode;\r
}\r
\r
\r
-Std_ReturnType Dcm_GetActiveProtocol(Dcm_ProtocolType *protocolId)\r
+Std_ReturnType Dcm_GetActiveProtocol(Dcm_ProtocolType *activeProtocol)\r
{\r
- Std_ReturnType returnCode = E_OK;\r
+ Std_ReturnType returnCode;\r
\r
VALIDATE_RV(dcmState == DCM_INITIALIZED, DCM_GET_ACTIVE_PROTOCOL_ID, DCM_E_UNINIT, E_NOT_OK);\r
\r
- returnCode = DslGetActiveProtocol(protocolId);\r
+ returnCode = DslGetActiveProtocol(activeProtocol);\r
\r
return returnCode;\r
}\r
\r
Std_ReturnType Dcm_GetSecurityLevel(Dcm_SecLevelType *secLevel)\r
{\r
- Std_ReturnType returnCode = E_OK;\r
+ Std_ReturnType returnCode;\r
\r
VALIDATE_RV(dcmState == DCM_INITIALIZED, DCM_GET_SECURITY_LEVEL_ID, DCM_E_UNINIT, E_NOT_OK);\r
\r
\r
Std_ReturnType Dcm_GetSesCtrlType(Dcm_SesCtrlType *sesCtrlType)\r
{\r
- Std_ReturnType returnCode = E_OK;\r
+ Std_ReturnType returnCode;\r
\r
VALIDATE_RV(dcmState == DCM_INITIALIZED, DCM_GET_SES_CTRL_TYPE_ID, DCM_E_UNINIT, E_NOT_OK);\r
\r
\r
BufReq_ReturnType Dcm_ProvideTxBuffer(PduIdType dcmTxPduId, PduInfoType **pduInfoPtr, PduLengthType length)\r
{\r
- BufReq_ReturnType returnCode = BUFREQ_OK;\r
+ BufReq_ReturnType returnCode;\r
\r
VALIDATE_RV(dcmState == DCM_INITIALIZED, DCM_PROVIDE_TX_BUFFER_ID, DCM_E_UNINIT, BUFREQ_NOT_OK);\r
VALIDATE_RV(dcmTxPduId < DCM_DSL_TX_PDU_ID_LIST_LENGTH, DCM_PROVIDE_TX_BUFFER_ID, DCM_E_PARAM, BUFREQ_NOT_OK);\r
\r
+ //lint --e(929) // PC-Lint exception, MISRA 11.4 Ok by atosar\r
+ //lint --e(960) // PC-Lint exception, MISRA 11.5 Ok by atosar\r
returnCode = DslProvideTxBuffer(dcmTxPduId, (const PduInfoType**)pduInfoPtr, length);\r
\r
return returnCode;\r
*/\r
\r
\r
-static boolean askApplicationForServicePermission(uint8 *requestData, uint16 dataSize)\r
+static Std_ReturnType askApplicationForServicePermission(uint8 *requestData, uint16 dataSize)\r
{\r
Std_ReturnType returnCode = E_OK;\r
const Dcm_DslServiceRequestIndicationType *serviceRequestIndication = DCM_Config.Dsl->DslServiceRequestIndication;\r
Std_ReturnType result;\r
\r
- while (!serviceRequestIndication->Arc_EOL && (returnCode != E_REQUEST_NOT_ACCEPTED)) {\r
+ while ((!serviceRequestIndication->Arc_EOL) && (returnCode != E_REQUEST_NOT_ACCEPTED)) {\r
if (serviceRequestIndication->Indication != NULL) {\r
result = serviceRequestIndication->Indication(requestData, dataSize);\r
- if (result != E_OK)\r
+ if (result != E_OK){\r
returnCode = result;\r
+ }\r
}\r
serviceRequestIndication++;\r
}\r
DspUdsWriteDataByIdentifier(msgData.pduRxData, msgData.pduTxData);\r
break;\r
\r
+ case SID_ROUTINE_CONTROL:\r
+ DspUdsRoutineControl(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
case SID_TESTER_PRESENT:\r
DspUdsTesterPresent(msgData.pduRxData, msgData.pduTxData);\r
break;\r
case SID_READ_DATA_BY_PERIODIC_IDENTIFIER:\r
case SID_DYNAMICALLY_DEFINE_DATA_IDENTIFIER:\r
case SID_INPUT_OUTPUT_CONTROL_BY_IDENTIFIER:\r
- case SID_ROUTINE_CONTROL:\r
default:\r
/* Non implemented service */\r
createAndSendNcr(DCM_E_SERVICENOTSUPPORTED);\r
boolean returnStatus = TRUE;\r
const Dcm_DsdServiceType *service = msgData.serviceTable->DsdService;\r
\r
- while ((service->DsdSidTabServiceId != sid) && !service->Arc_EOL) {\r
+ while ((service->DsdSidTabServiceId != sid) && (!service->Arc_EOL)) {\r
service++;\r
}\r
\r
currentSid = msgData.pduRxData->SduDataPtr[0]; /** @req DCM198 */\r
\r
/** @req DCM178 */\r
- if (DCM_RESPOND_ALL_REQUEST || ((currentSid & 0x7F) < 0x40)) { /** @req DCM084 */\r
+ //lint --e(506, 774) PC-Lint exception Misra 13.7, 14.1 Allow configuration variables in boolean expression\r
+ if ((DCM_RESPOND_ALL_REQUEST == STD_ON) || ((currentSid & 0x7Fu) < 0x40)) { /** @req DCM084 */\r
if (lookupSid(currentSid, &sidConfPtr)) { /** @req DCM192 */ /** @req DCM193 */ /** @req DCM196 */\r
// SID found!\r
if (DspCheckSessionLevel(sidConfPtr->DsdSidTabSessionLevelRef)) { /** @req DCM211 */\r
if (DspCheckSecurityLevel(sidConfPtr->DsdSidTabSecurityLevelRef)) { /** @req DCM217 */\r
- if (DCM_REQUEST_INDICATION_ENABLED) { /** @req DCM218 */\r
+ //lint --e(506, 774) PC-Lint exception Misra 13.7, 14.1 Allow configuration variables in boolean expression\r
+ if (DCM_REQUEST_INDICATION_ENABLED == STD_ON) { /** @req DCM218 */\r
result = askApplicationForServicePermission(msgData.pduRxData->SduDataPtr, msgData.pduRxData->SduLength);\r
+ } else {\r
+ result = E_OK;\r
}\r
- if (!DCM_REQUEST_INDICATION_ENABLED || result == E_OK) {\r
+ //lint --e(506, 774) PC-Lint exception Misra 13.7, 14.1 Allow configuration variables in boolean expression\r
+ if (result == E_OK) {\r
// Yes! All conditions met!\r
// Check if response shall be suppressed\r
- if (sidConfPtr->DsdSidTabSubfuncAvail && (msgData.pduRxData->SduDataPtr[1] & SUPPRESS_POS_RESP_BIT)) { /** @req DCM204 */\r
+ if ( (sidConfPtr->DsdSidTabSubfuncAvail) && (msgData.pduRxData->SduDataPtr[1] & SUPPRESS_POS_RESP_BIT) ) { /** @req DCM204 */\r
suppressPosRspMsg = TRUE; /** @req DCM202 */\r
msgData.pduRxData->SduDataPtr[1] &= ~SUPPRESS_POS_RESP_BIT; /** @req DCM201 */\r
}\r
}\r
\r
\r
+\r
void DsdDspProcessingDone(Dcm_NegativeResponseCodeType responseCode)\r
{\r
if (responseCode == DCM_E_POSITIVERESPONSE) {\r
\r
void DsdDataConfirmation(PduIdType confirmPduId, NotifResultType result)\r
{\r
+ (void)result; /* Currently not used */\r
DspDcmConfirmation(confirmPduId); /** @req DCM236 */\r
}\r
\r
#include "Dcm.h"\r
#include "Dcm_Internal.h"\r
#include "MemMap.h"\r
+#if defined(USE_COMM)\r
#include "ComM_Dcm.h"\r
+#endif\r
#include "PduR_Dcm.h"\r
#include "ComStack_Types.h"\r
//#define USE_DEBUG_PRINTF\r
#include "debug.h"\r
\r
-#define DECREMENT(timer) { if (timer > 0) timer--; }\r
+#define DECREMENT(timer) { if (timer > 0){timer--;} }\r
#define DCM_CONVERT_MS_TO_MAIN_CYCLES(x) ((x)/DCM_MAIN_FUNCTION_PERIOD_TIME_MS)\r
\r
\r
+#if (DCM_PAGEDBUFFER_ENABLED)\r
+#error "DCM_PAGEDBUFFER_ENABLED is set to STD_ON, this is not supported by the code."\r
+#endif\r
+\r
/*\r
* Type definitions.\r
*/\r
-typedef struct {\r
- const Dcm_DslProtocolRxType *protocolRx;\r
- const Dcm_DslMainConnectionType *mainConnection;\r
- const Dcm_DslConnectionType *connection;\r
- const Dcm_DslProtocolRowType *protocolRow;\r
-} DcmDsl_ProtocolConfigurationType;\r
-\r
-#define MAX_PARALLEL_PROTOCOLS_ALLOWED 1\r
+// #define MAX_PARALLEL_PROTOCOLS_ALLOWED 1\r
\r
typedef struct {\r
boolean initRun;\r
//boolean diagnosticRequestPending; // This is a "semaphore" because DSD and DCM can handle multiple/parallel request at the moment.\r
- const Dcm_DslProtocolRowType *preemptedProtocol; // Points to the currently active protocol.\r
const Dcm_DslProtocolRowType *activeProtocol; // Points to the currently active protocol.\r
- Dcm_DslRunTimeProtocolParametersType\r
- protocolList[MAX_PARALLEL_PROTOCOLS_ALLOWED];\r
+// const Dcm_DslProtocolRowType *preemptedProtocol; // Points to the currently active protocol - reserved for future use\r
+// Dcm_DslRunTimeProtocolParametersType protocolList[MAX_PARALLEL_PROTOCOLS_ALLOWED]; // Reserved for future use\r
} DcmDsl_RunTimeDataType;\r
\r
static DcmDsl_RunTimeDataType DcmDslRunTimeData = {\r
.initRun = FALSE,\r
- .preemptedProtocol = NULL,\r
- .activeProtocol = NULL };\r
-\r
-// ################# DUMMIES START #################\r
-\r
-/*\r
- * Local types\r
- */\r
-\r
-void ComM_DCM_ActivateDiagnostic() {\r
- ;\r
-}\r
-\r
-void ComM_DCM_InactivateDiagnostic() {\r
- ;\r
-}\r
+ .activeProtocol = NULL\r
+// .preemptedProtocol = NULL,\r
+// .protocolList = {}\r
+};\r
\r
// ################# HELPER FUNCTIONS START #################\r
\r
\r
// - - - - - - - - - - -\r
\r
-void DslResetSessionTimeoutTimer() {\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
- Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+void DslResetSessionTimeoutTimer(void) {\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
runtime = activeProtocol->DslRunTimeProtocolParameters;\r
startS3SessionTimer(runtime, activeProtocol); /** @req DCM141 */\r
// - - - - - - - - - - -\r
\r
void DslGetCurrentServiceTable(const Dcm_DsdServiceTableType **currentServiceTable) { /** @req DCM195 */\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
if (activeProtocol != NULL) {\r
*currentServiceTable = activeProtocol->DslProtocolSIDTable;\r
\r
Std_ReturnType DslGetActiveProtocol(Dcm_ProtocolType *protocolId) { /** @req DCM340 */\r
Std_ReturnType ret = E_NOT_OK;\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
if (activeProtocol != NULL) {\r
*protocolId = activeProtocol->DslProtocolID;\r
// - - - - - - - - - - -\r
\r
void DslSetSecurityLevel(Dcm_SecLevelType secLevel) { /** @req DCM020 */\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
- Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
runtime = activeProtocol->DslRunTimeProtocolParameters;\r
runtime->securityLevel = secLevel;\r
\r
Std_ReturnType DslGetSecurityLevel(Dcm_SecLevelType *secLevel) { /** @req DCM020 *//** @req DCM338 */\r
Std_ReturnType ret = E_NOT_OK;\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
if (activeProtocol != NULL) {\r
runtime = activeProtocol->DslRunTimeProtocolParameters;\r
// - - - - - - - - - - -\r
\r
void DslSetSesCtrlType(Dcm_SesCtrlType sesCtrl) { /** @req DCM022 */\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
if (activeProtocol != NULL) {\r
runtime = activeProtocol->DslRunTimeProtocolParameters;\r
\r
Std_ReturnType DslGetSesCtrlType(Dcm_SesCtrlType *sesCtrlType) { /** @req DCM022 *//** @req DCM339 */\r
Std_ReturnType ret = E_NOT_OK;\r
- const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ const Dcm_DslProtocolRowType *activeProtocol;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
activeProtocol = DcmDslRunTimeData.activeProtocol;\r
if (activeProtocol != NULL) {\r
runtime = activeProtocol->DslRunTimeProtocolParameters;\r
const Dcm_DslConnectionType *connection = NULL;\r
const Dcm_DslProtocolRowType *protocolRow = NULL;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ Std_ReturnType transmitResult;\r
\r
/** @req DCM119 */\r
imask_t state = McuE_EnterCriticalSection();\r
runtime->localTxBuffer.PduInfo.SduDataPtr = runtime->localTxBuffer.buffer;\r
runtime->localTxBuffer.PduInfo.SduLength = 3;\r
runtime->localTxBuffer.status = DCM_TRANSMIT_SIGNALED; // In the DslProvideTxBuffer 'callback' this state signals it is the local buffer we are interested in sending.\r
- PduR_DcmTransmit(mainConnection->DslProtocolTx->DcmDslProtocolTxPduId, &(runtime->localTxBuffer.PduInfo));/** @req DCM115.Partially */ /* The P2ServerMin has not been implemented. */\r
+ transmitResult = PduR_DcmTransmit(mainConnection->DslProtocolTx->DcmDslProtocolTxPduId, &(runtime->localTxBuffer.PduInfo));/** @req DCM115.Partially */ /* The P2ServerMin has not been implemented. */\r
+ if (transmitResult != E_OK) {\r
+ // TODO: What to do here?\r
+ }\r
}\r
}\r
McuE_ExitCriticalSection(state);\r
static boolean isTesterPresentCommand(const PduInfoType *rxPdu) {\r
boolean ret = FALSE;\r
if ((rxPdu->SduDataPtr[0] == SID_TESTER_PRESENT) && (rxPdu->SduDataPtr[1] & SUPPRESS_POS_RESP_BIT)) {\r
- return TRUE;\r
+ ret = TRUE;\r
}\r
return ret;\r
}\r
// Implements 'void Dcm_Init(void)' for DSL.\r
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
void DslInit(void) {\r
- const Dcm_DslProtocolRowType *listEntry = NULL;\r
+ const Dcm_DslProtocolRowType *listEntry;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
\r
listEntry = DCM_Config.Dsl->DslProtocol->DslProtocolRowList;\r
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
\r
void DslMain(void) {\r
- const Dcm_DslProtocolRowType *protocolRowEntry = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRowEntry;\r
const Dcm_DslProtocolTimingRowType *timeParams = NULL;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
- int debug_count = 0;\r
\r
protocolRowEntry = DCM_Config.Dsl->DslProtocol->DslProtocolRowList;\r
while (protocolRowEntry->Arc_EOL == FALSE) {\r
const Dcm_DslMainConnectionType *mainConnection = NULL;\r
const Dcm_DslConnectionType *connection = NULL;\r
const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Std_ReturnType transmitResult;\r
+\r
if (findRxPduIdParentConfigurationLeafs(runtime->diagReqestRxPduId, &protocolRx, &mainConnection, &connection, &protocolRow, &runtime)) {\r
- const uint32 txPduId = mainConnection->DslProtocolTx->DcmDslProtocolTxPduId;\r
+ const PduIdType txPduId = mainConnection->DslProtocolTx->DcmDslProtocolTxPduId;\r
DEBUG( DEBUG_MEDIUM, "runtime->externalTxBufferStatus enter state DCM_TRANSMIT_SIGNALED.\n" );\r
runtime->externalTxBufferStatus = DCM_TRANSMIT_SIGNALED;\r
- PduR_DcmTransmit(txPduId, &runtime->diagnosticResponseFromDsd); /** @req DCM237 *//* Will trigger PduR (CanTP) to call DslProvideTxBuffer(). */\r
+ transmitResult = PduR_DcmTransmit(txPduId, &runtime->diagnosticResponseFromDsd); /** @req DCM237 *//* Will trigger PduR (CanTP) to call DslProvideTxBuffer(). */\r
+ if (transmitResult != E_OK) {\r
+ // TODO: What to do here?\r
+ }\r
} else {\r
DEBUG( DEBUG_MEDIUM, "***** WARNING, THIS IS UNEXPECTED !!! ********.\n" );\r
- const uint32 txPduId = protocolRowEntry->DslConnection->DslMainConnection->DslProtocolTx->DcmDslProtocolTxPduId;\r
+ const PduIdType txPduId = protocolRowEntry->DslConnection->DslMainConnection->DslProtocolTx->DcmDslProtocolTxPduId;\r
DEBUG( DEBUG_MEDIUM, "runtime->externalTxBufferStatus enter state DSD_PENDING_RESPONSE_SIGNALED.\n", txPduId);\r
runtime->externalTxBufferStatus = DCM_TRANSMIT_SIGNALED;\r
DEBUG( DEBUG_MEDIUM, "Calling PduR_DcmTransmit with txPduId = %d from DslMain\n", txPduId);\r
- PduR_DcmTransmit(txPduId, &runtime->diagnosticResponseFromDsd); /** @req DCM237 *//* Will trigger PduR (CanTP) to call DslProvideTxBuffer(). */\r
+ transmitResult = PduR_DcmTransmit(txPduId, &runtime->diagnosticResponseFromDsd); /** @req DCM237 *//* Will trigger PduR (CanTP) to call DslProvideTxBuffer(). */\r
+ if (transmitResult != E_OK) {\r
+ // TODO: What to do here?\r
+ }\r
}\r
}\r
break;\r
}\r
}\r
protocolRowEntry++;\r
- debug_count++;\r
}\r
}\r
\r
// received a FF or a single frame and needs to obtain a buffer from the\r
// receiver so that received data can be forwarded.\r
\r
-BufReq_ReturnType DslProvideRxBufferToPdur(PduIdType dcmRxPduId,\r
- PduLengthType tpSduLength, const PduInfoType **pduInfoPtr) {\r
+BufReq_ReturnType DslProvideRxBufferToPdur(PduIdType dcmRxPduId, PduLengthType tpSduLength, const PduInfoType **pduInfoPtr) {\r
BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
const Dcm_DslProtocolRxType *protocolRx = NULL;\r
const Dcm_DslMainConnectionType *mainConnection = NULL;\r
}\r
if (runtime->protocolStarted == TRUE) {\r
if (runtime->diagnosticActiveComM == FALSE) {\r
+#if defined(USE_COMM)\r
ComM_DCM_ActivateDiagnostic(); /** @req DCM163 */\r
+#endif\r
runtime->diagnosticActiveComM = TRUE;\r
}\r
timeParams = protocolRow->DslProtocolTimeLimit;\r
const Dcm_DslProtocolRowType *protocolRow = NULL;\r
Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
\r
+ (void)length; // Currently not used, this is only to remove compilation warnings\r
DEBUG( DEBUG_MEDIUM, "DslProvideTxBuffer=%d\n", dcmTxPduId);\r
if (findTxPduIdParentConfigurationLeafs(dcmTxPduId, &protocolTx, &mainConnection, &connection, &protocolRow, &runtime)) {\r
switch (runtime->externalTxBufferStatus) { // ### EXTERNAL TX BUFFER ###\r
state = McuE_EnterCriticalSection();\r
switch (runtime->externalTxBufferStatus) { // ### EXTERNAL TX BUFFER ###\r
case PROVIDED_TO_PDUR: {\r
+#if defined(USE_COMM)\r
ComM_DCM_InactivateDiagnostic(); /** @req DCM164 */\r
+#endif\r
startS3SessionTimer(runtime, protocolRow); /** @req DCM141 */\r
releaseExternalRxTxBuffers(protocolRow, runtime); /** @req DCM118 *//** @req DCM352 *//** @req DCM353 *//** @req DCM354 */\r
externalBufferReleased = TRUE;\r
default:\r
break;\r
}\r
- if (externalBufferReleased == FALSE) {\r
+ if (!externalBufferReleased) {\r
switch (runtime->localTxBuffer.status) { // ### LOCAL TX BUFFER ###\r
case PROVIDED_TO_PDUR:\r
DEBUG( DEBUG_MEDIUM, "Released local buffer buffer OK!\n");\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+//lint -esym(754, SID) //Structure member SID not used in udsReadDtcInfoSub_0x01_0x07_0x11_0x12() and udsReadDtcInfoSub_0x02_0x0A_0x0F_0x13_0x15()\r
\r
\r
/*\r
* Macros\r
*/\r
#define BYTES_TO_DTC(hb, mb, lb) (((uint32)(hb) << 16) | ((uint32)(mb) << 8) | (uint32)(lb))\r
-#define DTC_HIGH_BYTE(dtc) (((uint32)(dtc) >> 16) & 0xFF)\r
-#define DTC_MID_BYTE(dtc) (((uint32)(dtc) >> 8) & 0xFF)\r
-#define DTC_LOW_BYTE(dtc) ((uint32)(dtc) & 0xFF)\r
+#define DTC_HIGH_BYTE(dtc) (((uint32)(dtc) >> 16) & 0xFFu)\r
+#define DTC_MID_BYTE(dtc) (((uint32)(dtc) >> 8) & 0xFFu)\r
+#define DTC_LOW_BYTE(dtc) ((uint32)(dtc) & 0xFFu)\r
\r
\r
typedef struct {\r
}\r
\r
\r
-boolean DspCheckSessionLevel(const Dcm_DspSessionRowType **sessionLevelRefTable)\r
+boolean DspCheckSessionLevel(Dcm_DspSessionRowType const* const* sessionLevelRefTable)\r
{\r
- boolean returnStatus = TRUE;\r
+ Std_ReturnType returnStatus;\r
+ boolean levelFound = FALSE;\r
Dcm_SesCtrlType currentSession;\r
\r
- DslGetSesCtrlType(¤tSession);\r
- while (((*sessionLevelRefTable)->DspSessionLevel != currentSession) && !(*sessionLevelRefTable)->Arc_EOL) {\r
- sessionLevelRefTable++;\r
- }\r
+ returnStatus = DslGetSesCtrlType(¤tSession);\r
+ if (returnStatus == E_OK) {\r
+ while ( ((*sessionLevelRefTable)->DspSessionLevel != currentSession) && (!(*sessionLevelRefTable)->Arc_EOL) ) {\r
+ sessionLevelRefTable++;\r
+ }\r
\r
- if ((*sessionLevelRefTable)->Arc_EOL) {\r
- returnStatus = FALSE;\r
+ if (!(*sessionLevelRefTable)->Arc_EOL) {\r
+ levelFound = TRUE;\r
+ }\r
}\r
\r
- return returnStatus;\r
+ return levelFound;\r
}\r
\r
\r
-boolean DspCheckSecurityLevel(const Dcm_DspSecurityRowType **securityLevelRefTable)\r
+boolean DspCheckSecurityLevel(Dcm_DspSecurityRowType const* const* securityLevelRefTable)\r
{\r
- boolean returnStatus = TRUE;\r
+ Std_ReturnType returnStatus;\r
+ boolean levelFound = FALSE;\r
Dcm_SecLevelType currentSecurityLevel;\r
\r
- DslGetSecurityLevel(¤tSecurityLevel);\r
- while (((*securityLevelRefTable)->DspSecurityLevel != currentSecurityLevel) && !(*securityLevelRefTable)->Arc_EOL) {\r
- securityLevelRefTable++;\r
- }\r
- if ((*securityLevelRefTable)->Arc_EOL) {\r
- returnStatus = FALSE;\r
+ returnStatus = DslGetSecurityLevel(¤tSecurityLevel);\r
+ if (returnStatus == E_OK) {\r
+ while ( ((*securityLevelRefTable)->DspSecurityLevel != currentSecurityLevel) && (!(*securityLevelRefTable)->Arc_EOL) ) {\r
+ securityLevelRefTable++;\r
+ }\r
+ if (!(*securityLevelRefTable)->Arc_EOL) {\r
+ levelFound = TRUE;\r
+ }\r
}\r
\r
- return returnStatus;\r
+ return levelFound;\r
}\r
\r
\r
Dcm_SesCtrlType currentSessionLevel;\r
Std_ReturnType result;\r
\r
- while (!sesControl->Arc_EOL && (returnCode != E_SESSION_NOT_ALLOWED)) {\r
+ while ( (!sesControl->Arc_EOL) && (returnCode != E_SESSION_NOT_ALLOWED)) {\r
if (sesControl->GetSesChgPermission != NULL) {\r
- Dcm_GetSesCtrlType(¤tSessionLevel);\r
- result = sesControl->GetSesChgPermission(currentSessionLevel ,newSessionLevel);\r
- if (result != E_OK) {\r
- returnCode = result;\r
+ result = Dcm_GetSesCtrlType(¤tSessionLevel);\r
+ if (result == E_OK) {\r
+ result = sesControl->GetSesChgPermission(currentSessionLevel ,newSessionLevel);\r
+ if (result != E_OK) {\r
+ returnCode = result;\r
+ }\r
+ } else {\r
+ returnCode = E_NOT_OK;\r
}\r
}\r
sesControl++;\r
if (pduRxData->SduLength == 2) {\r
reqSessionType = pduRxData->SduDataPtr[1];\r
// Check if type exist in session table\r
- while ((sessionRow->DspSessionLevel != reqSessionType) && !sessionRow->Arc_EOL) {\r
+ while ((sessionRow->DspSessionLevel != reqSessionType) && (!sessionRow->Arc_EOL) ) {\r
sessionRow++;\r
}\r
\r
}\r
\r
if (setDtcFilterResult == DEM_FILTER_ACCEPTED) {\r
+ Std_ReturnType result;\r
+ Dem_ReturnGetNumberOfFilteredDTCType getNumerResult;\r
uint16 numberOfFilteredDtc;\r
uint8 dtcStatusMask;\r
+ //lint --e(826) PC-Lint exception - Suspicious pointer conversion\r
+ //lint --e(927) PC-Lint exception - Pointer to pointer cast\r
TxDataType *txData = (TxDataType*)pduTxData->SduDataPtr;\r
\r
/** @req DCM376 */\r
- Dem_GetNumberOfFilteredDtc(&numberOfFilteredDtc);\r
- Dem_GetDTCStatusAvailabilityMask(&dtcStatusMask);\r
-\r
- // Create positive response (ISO 14229-1 table 251)\r
- txData->reportType = pduRxData->SduDataPtr[1]; // reportType\r
- txData->dtcStatusAvailabilityMask = dtcStatusMask; // DTCStatusAvailabilityMask\r
- txData->dtcFormatIdentifier = Dem_GetTranslationType(); // DTCFormatIdentifier\r
- txData->dtcCountHighByte = (numberOfFilteredDtc >> 8); // DTCCount high byte\r
- txData->dtcCountLowByte = (numberOfFilteredDtc & 0xFF); // DTCCount low byte\r
- pduTxData->SduLength = 6;\r
+ getNumerResult = Dem_GetNumberOfFilteredDtc(&numberOfFilteredDtc);\r
+ if (getNumerResult == DEM_NUMBER_OK) {\r
+ result = Dem_GetDTCStatusAvailabilityMask(&dtcStatusMask);\r
+ if (result != E_OK) {\r
+ dtcStatusMask = 0;\r
+ }\r
+\r
+ // Create positive response (ISO 14229-1 table 251)\r
+ txData->reportType = pduRxData->SduDataPtr[1]; // reportType\r
+ txData->dtcStatusAvailabilityMask = dtcStatusMask; // DTCStatusAvailabilityMask\r
+ txData->dtcFormatIdentifier = Dem_GetTranslationType(); // DTCFormatIdentifier\r
+ txData->dtcCountHighByte = (numberOfFilteredDtc >> 8); // DTCCount high byte\r
+ txData->dtcCountLowByte = (numberOfFilteredDtc & 0xFFu); // DTCCount low byte\r
+ pduTxData->SduLength = 6;\r
+ } else {\r
+ // TODO: What to do?\r
+ responseCode = DCM_E_GENERALREJECT;\r
+ }\r
}\r
else {\r
responseCode = DCM_E_REQUESTOUTOFRANGE;\r
\r
if (setDtcFilterResult == DEM_FILTER_ACCEPTED) {\r
uint8 dtcStatusMask;\r
+ //lint --e(826) PC-Lint exception - Suspicious pointer conversion\r
+ //lint --e(927) PC-Lint exception - Pointer to pointer cast\r
TxDataType *txData = (TxDataType*)pduTxData->SduDataPtr;\r
Dem_ReturnGetNextFilteredDTCType getNextFilteredDtcResult;\r
uint32 dtc;\r
Dem_EventStatusExtendedType dtcStatus;\r
uint16 nrOfDtcs = 0;\r
+ Std_ReturnType result;\r
\r
/** @req DCM377 */\r
- Dem_GetDTCStatusAvailabilityMask(&dtcStatusMask);\r
+ result = Dem_GetDTCStatusAvailabilityMask(&dtcStatusMask);\r
+ if (result != E_OK) {\r
+ dtcStatusMask = 0;\r
+ }\r
\r
// Create positive response (ISO 14229-1 table 252)\r
txData->reportType = pduRxData->SduDataPtr[1];\r
responseCode = DCM_E_REQUESTOUTOFRANGE;\r
}\r
}\r
- pduTxData->SduLength = 3 + nrOfDtcs * sizeof(dtcAndStatusRecordType);\r
+ pduTxData->SduLength = (PduLengthType)(3 + (nrOfDtcs * sizeof(dtcAndStatusRecordType)));\r
}\r
else {\r
responseCode = DCM_E_REQUESTOUTOFRANGE;\r
return responseCode;\r
}\r
\r
-\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x08(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x09(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
getStatusOfDtcResult = Dem_GetStatusOfDTC(dtc, DEM_DTC_KIND_ALL_DTCS, dtcOrigin, &statusOfDtc); /** @req DCM295 */ /** @req DCM475 */\r
if (getStatusOfDtcResult == DEM_STATUS_OK) {\r
Dem_ReturnGetExtendedDataRecordByDTCType getExtendedDataRecordByDtcResult;\r
- uint16 recNum;\r
- uint8 recLength;\r
+ uint8 recNum;\r
+ uint16 recLength;\r
uint16 txIndex = 6;\r
\r
/** @req DCM297 */ /** @req DCM474 */ /** @req DCM386 */\r
pduTxData->SduDataPtr[4] = DTC_LOW_BYTE(dtc); // DTC low byte\r
pduTxData->SduDataPtr[5] = statusOfDtc; // DTC status\r
for (recNum = startRecNum; recNum <= endRecNum; recNum++) {\r
- recLength = pduTxData->SduLength - txIndex -1; // Calculate what's left in buffer\r
+ recLength = pduTxData->SduLength - (txIndex + 1); // Calculate what's left in buffer\r
/** @req DCM296 */ /** @req DCM476 */ /** @req DCM382 */\r
getExtendedDataRecordByDtcResult = Dem_GetExtendedDataRecordByDTC(dtc, DEM_DTC_KIND_ALL_DTCS, dtcOrigin, recNum, &pduTxData->SduDataPtr[txIndex+1], &recLength);\r
if (getExtendedDataRecordByDtcResult == DEM_RECORD_OK) {\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x03(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x04(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x05(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x0B_0x0C_0x0D_0x0E(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715, 838, 818} Symbol not referenced, responseCode not used, txData should be const\r
static Dcm_NegativeResponseCodeType udsReadDtcInfoSub_0x14(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
const Dcm_DspDidType *dspDid = DCM_Config.Dsp->DspDid;\r
boolean didFound = FALSE;\r
\r
- while ((dspDid->DspDidIdentifier != didNr) && !dspDid->Arc_EOL) {\r
+ while ((dspDid->DspDidIdentifier != didNr) && (!dspDid->Arc_EOL)) {\r
dspDid++;\r
}\r
\r
Dcm_NegativeResponseCodeType errorCode;\r
result = didPtr->DspDidConditionCheckReadFnc(&errorCode);\r
if ((result == E_OK) && (errorCode == DCM_E_POSITIVERESPONSE)) { /** @req DCM439 */\r
- uint16 didLen;\r
+ uint16 didLen = 0;\r
result = E_NOT_OK;\r
if (didPtr->DspDidInfoRef->DspDidFixedLength) { /** @req DCM436 */\r
didLen = didPtr->DspDidSize;\r
if (result == E_OK) {\r
// Now ready for reading the data!\r
if ((*txPos + didLen + 2) <= pduTxData->SduLength) {\r
- pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 8) & 0xFF;\r
+ pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 8) & 0xFFu;\r
(*txPos)++;\r
- pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 0) & 0xFF;\r
+ pduTxData->SduDataPtr[*txPos] = didPtr->DspDidIdentifier & 0xFFu;\r
(*txPos)++;\r
result = didPtr->DspDidReadDataFnc(&pduTxData->SduDataPtr[*txPos]); /** @req DCM437 */\r
*txPos += didLen;\r
{\r
/** @req DCM253 */\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
- uint8 nrOfDids;\r
+ uint16 nrOfDids;\r
uint16 didNr;\r
const Dcm_DspDidType *didPtr = NULL;\r
\r
uint16 txPos = 1;\r
uint16 i;\r
\r
- if ((pduRxData->SduLength - 1) % 2 == 0 ) {\r
+ if ( ((pduRxData->SduLength - 1) % 2) == 0 ) {\r
nrOfDids = (pduRxData->SduLength - 1) / 2;\r
\r
for (i = 0; (i < nrOfDids) && (responseCode == DCM_E_POSITIVERESPONSE); i++) {\r
- didNr = (pduRxData->SduDataPtr[1+i*2] << 8) + pduRxData->SduDataPtr[2+i*2];\r
+ didNr = (uint16)((uint16)pduRxData->SduDataPtr[1+(i*2)] << 8) + pduRxData->SduDataPtr[2+(i*2)];\r
if (lookupDid(didNr, &didPtr)) { /** @req DCM438 */\r
responseCode = readDidData(didPtr, pduTxData, &txPos);\r
}\r
}\r
\r
\r
-static Dcm_NegativeResponseCodeType readDidScalingData(const Dcm_DspDidType *didPtr, PduInfoType *pduTxData, uint16 *txPos)\r
+static Dcm_NegativeResponseCodeType readDidScalingData(const Dcm_DspDidType *didPtr, const PduInfoType *pduTxData, uint16 *txPos)\r
{\r
Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
\r
Std_ReturnType result;\r
Dcm_NegativeResponseCodeType errorCode;\r
\r
- pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 8) & 0xFF;\r
+ pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 8) & 0xFFu;\r
(*txPos)++;\r
- pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 0) & 0xFF;\r
+ pduTxData->SduDataPtr[*txPos] = didPtr->DspDidIdentifier & 0xFFu;\r
(*txPos)++;\r
result = didPtr->DspDidGetScalingInfoFnc(&pduTxData->SduDataPtr[*txPos], &errorCode); /** @req DCM394 */\r
*txPos += scalingInfoLen;\r
uint16 txPos = 1;\r
\r
if (pduRxData->SduLength == 3) {\r
- didNr = (pduRxData->SduDataPtr[1] << 8) + pduRxData->SduDataPtr[2];\r
+ didNr = (uint16)((uint16)pduRxData->SduDataPtr[1] << 8) + pduRxData->SduDataPtr[2];\r
if (lookupDid(didNr, &didPtr)) {\r
responseCode = readDidScalingData(didPtr, pduTxData, &txPos);\r
}\r
Dcm_NegativeResponseCodeType errorCode;\r
result = didPtr->DspDidConditionCheckWriteFnc(&errorCode); /** @req DCM471 */\r
if ((result == E_OK) && (errorCode == DCM_E_POSITIVERESPONSE)) {\r
- uint16 didLen;\r
+ uint16 didLen = 0;\r
result = E_NOT_OK;\r
if (didPtr->DspDidInfoRef->DspDidFixedLength) { /** @req DCM472 */\r
didLen = didPtr->DspDidSize;\r
else {\r
if (didPtr->DspDidReadDataLengthFnc != NULL) {\r
result = didPtr->DspDidReadDataLengthFnc(&didLen);\r
- }\r
- }\r
+ } }\r
\r
if (result == E_OK) {\r
if (didLen == writeDidLen) { /** @req DCM473 */\r
- result = didPtr->DspDidWriteDataFnc(&pduRxData->SduDataPtr[3], didLen, &errorCode); /** @req DCM395 */\r
+ result = didPtr->DspDidWriteDataFnc(&pduRxData->SduDataPtr[3], (uint8)didLen, &errorCode); /** @req DCM395 */\r
if ((result != E_OK) || (errorCode != DCM_E_POSITIVERESPONSE)) {\r
responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
}\r
uint16 didDataLength;\r
\r
didDataLength = pduRxData->SduLength - 3;\r
- didNr = (pduRxData->SduDataPtr[1] << 8) + pduRxData->SduDataPtr[2];\r
+ didNr = (uint16)((uint16)pduRxData->SduDataPtr[1] << 8) + pduRxData->SduDataPtr[2];\r
if (lookupDid(didNr, &didPtr)) { /** @req DCM467 */\r
responseCode = writeDidData(didPtr, pduRxData, didDataLength);\r
}\r
\r
if (responseCode == DCM_E_POSITIVERESPONSE) {\r
pduTxData->SduLength = 3;\r
- pduTxData->SduDataPtr[1] = (didNr >> 8) & 0xFF;\r
- pduTxData->SduDataPtr[2] = (didNr >> 0) & 0xFF;\r
+ pduTxData->SduDataPtr[1] = (didNr >> 8) & 0xFFu;\r
+ pduTxData->SduDataPtr[2] = didNr & 0xFFu;\r
}\r
\r
DsdDspProcessingDone(responseCode);\r
\r
// Check sub function range (0x01 to 0x42)\r
if ((pduRxData->SduDataPtr[1] >= 0x01) && (pduRxData->SduDataPtr[1] <= 0x42)) {\r
- boolean isRequestSeed = pduRxData->SduDataPtr[1] & 0x01;\r
+ boolean isRequestSeed = pduRxData->SduDataPtr[1] & 0x01u;\r
Dcm_SecLevelType requestedSecurityLevel = (pduRxData->SduDataPtr[1]-1)/2;\r
Dcm_NegativeResponseCodeType getSeedErrorCode;\r
\r
// requestSeed message\r
// Check if type exist in security table\r
const Dcm_DspSecurityRowType *securityRow = &DCM_Config.Dsp->DspSecurity->DspSecurityRow[0];\r
- while ((securityRow->DspSecurityLevel != requestedSecurityLevel) && !securityRow->Arc_EOL) {\r
+ while ((securityRow->DspSecurityLevel != requestedSecurityLevel) && (!securityRow->Arc_EOL)) {\r
securityRow++;\r
}\r
if (!securityRow->Arc_EOL) {\r
// Check length\r
if (pduRxData->SduLength == (2 + securityRow->DspSecurityADRSize)) { /** @req DCM321.RequestSeed */\r
Dcm_SecLevelType activeSecLevel;\r
- Dcm_GetSecurityLevel(&activeSecLevel);\r
- if (requestedSecurityLevel == activeSecLevel) { /** @req DCM323 */\r
- pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
- // If same level set the seed to zeroes\r
- memset(&pduTxData->SduDataPtr[2], 0, securityRow->DspSecuritySeedSize);\r
- pduTxData->SduLength = 2 + securityRow->DspSecuritySeedSize;\r
- }\r
- else {\r
- // New security level ask for seed\r
- if (securityRow->GetSeed != NULL) {\r
- Std_ReturnType getSeedResult;\r
- getSeedResult = securityRow->GetSeed(&pduRxData->SduDataPtr[2], &pduTxData->SduDataPtr[2], &getSeedErrorCode); /** @req DCM324.RequestSeed */\r
- if ((getSeedResult == E_OK) && (getSeedErrorCode == E_OK)) {\r
- // Everything ok add sub function to tx message and send it.\r
- pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
- pduTxData->SduLength = 2 + securityRow->DspSecuritySeedSize;\r
-\r
- dspUdsSecurityAccesData.reqSecLevel = requestedSecurityLevel;\r
- dspUdsSecurityAccesData.reqSecLevelRef = securityRow;\r
- dspUdsSecurityAccesData.reqInProgress = TRUE;\r
- }\r
- else {\r
- // GetSeed returned not ok\r
+ Std_ReturnType result;\r
+ result = Dcm_GetSecurityLevel(&activeSecLevel);\r
+ if (result == E_OK) {\r
+ if (requestedSecurityLevel == activeSecLevel) { /** @req DCM323 */\r
+ pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
+ // If same level set the seed to zeroes\r
+ memset(&pduTxData->SduDataPtr[2], 0, securityRow->DspSecuritySeedSize);\r
+ pduTxData->SduLength = 2 + securityRow->DspSecuritySeedSize;\r
+ } else {\r
+ // New security level ask for seed\r
+ if (securityRow->GetSeed != NULL) {\r
+ Std_ReturnType getSeedResult;\r
+ getSeedResult = securityRow->GetSeed(&pduRxData->SduDataPtr[2], &pduTxData->SduDataPtr[2], &getSeedErrorCode); /** @req DCM324.RequestSeed */\r
+ if ((getSeedResult == E_OK) && (getSeedErrorCode == E_OK)) {\r
+ // Everything ok add sub function to tx message and send it.\r
+ pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
+ pduTxData->SduLength = 2 + securityRow->DspSecuritySeedSize;\r
+\r
+ dspUdsSecurityAccesData.reqSecLevel = requestedSecurityLevel;\r
+ dspUdsSecurityAccesData.reqSecLevelRef = securityRow;\r
+ dspUdsSecurityAccesData.reqInProgress = TRUE;\r
+ }\r
+ else {\r
+ // GetSeed returned not ok\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ } else {\r
responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
}\r
- } else {\r
- responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
}\r
+ } else {\r
+ // TODO: What to do?\r
+ responseCode = DCM_E_GENERALREJECT;\r
}\r
+\r
}\r
else {\r
// Length not ok\r
}\r
\r
\r
+static boolean lookupRoutine(uint16 routineId, const Dcm_DspRoutineType **routinePtr)\r
+{\r
+ const Dcm_DspRoutineType *dspRoutine = DCM_Config.Dsp->DspRoutine;\r
+ boolean routineFound = FALSE;\r
+\r
+ while ((dspRoutine->DspRoutineIdentifier != routineId) && (!dspRoutine->Arc_EOL)) {\r
+ dspRoutine++;\r
+ }\r
+\r
+ if (!dspRoutine->Arc_EOL) {\r
+ routineFound = TRUE;\r
+ *routinePtr = dspRoutine;\r
+ }\r
+\r
+ return routineFound;\r
+}\r
+\r
+\r
+static Dcm_NegativeResponseCodeType startRoutine(const Dcm_DspRoutineType *routinePtr, const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Std_ReturnType routineResult;\r
+\r
+ // startRoutine\r
+ if ((routinePtr->DspStartRoutineFnc != NULL) && (routinePtr->DspRoutineInfoRef->DspStartRoutine != NULL)) {\r
+ if (((routinePtr->DspRoutineInfoRef->DspStartRoutine->DspStartRoutineCtrlOptRecSize + 4) == pduRxData->SduLength)\r
+ && ((routinePtr->DspRoutineInfoRef->DspStartRoutine->DspStartRoutineStsOptRecSize + 4) <= pduTxData->SduLength)) {\r
+ pduTxData->SduLength = routinePtr->DspRoutineInfoRef->DspStartRoutine->DspStartRoutineStsOptRecSize + 4;\r
+ routineResult = routinePtr->DspStartRoutineFnc(&pduRxData->SduDataPtr[4], &pduTxData->SduDataPtr[4], &responseCode); /** @req DCM400 */ /** @req DCM401 */\r
+ if (routineResult != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+static Dcm_NegativeResponseCodeType stopRoutine(const Dcm_DspRoutineType *routinePtr, const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Std_ReturnType routineResult;\r
+\r
+ // stopRoutine\r
+ if ((routinePtr->DspStopRoutineFnc != NULL) && (routinePtr->DspRoutineInfoRef->DspRoutineStop != NULL)) {\r
+ if (((routinePtr->DspRoutineInfoRef->DspRoutineStop->DspStopRoutineCtrlOptRecSize + 4) == pduRxData->SduLength)\r
+ && ((routinePtr->DspRoutineInfoRef->DspRoutineStop->DspStopRoutineStsOptRecSize + 4) <= pduTxData->SduLength)) {\r
+ pduTxData->SduLength = routinePtr->DspRoutineInfoRef->DspRoutineStop->DspStopRoutineStsOptRecSize + 4;\r
+ routineResult = routinePtr->DspStopRoutineFnc(&pduRxData->SduDataPtr[4], &pduTxData->SduDataPtr[4], &responseCode); /** @req DCM402 */ /** @req DCM403 */\r
+ if (routineResult != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+static Dcm_NegativeResponseCodeType requestRoutineResults(const Dcm_DspRoutineType *routinePtr, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Std_ReturnType routineResult;\r
+\r
+ // requestRoutineResults\r
+ if ((routinePtr->DspRequestResultRoutineFnc != NULL) && (routinePtr->DspRoutineInfoRef->DspRoutineRequestRes != NULL)) {\r
+ if ((routinePtr->DspRoutineInfoRef->DspRoutineRequestRes->DspReqResRtnCtrlOptRecSize + 4) <= pduTxData->SduLength) {\r
+ pduTxData->SduLength = routinePtr->DspRoutineInfoRef->DspRoutineRequestRes->DspReqResRtnCtrlOptRecSize + 4;\r
+ routineResult = routinePtr->DspRequestResultRoutineFnc(&pduTxData->SduDataPtr[4], &responseCode); /** @req DCM404 */ /** @req DCM405 */\r
+ if (routineResult != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+void DspUdsRoutineControl(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @req DCM257 */\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ uint8 subFunctionNumber = 0;\r
+ uint16 routineId = 0;\r
+ const Dcm_DspRoutineType *routinePtr = NULL;\r
+\r
+ if (pduRxData->SduLength >= 4) {\r
+ subFunctionNumber = pduRxData->SduDataPtr[1];\r
+ if ((subFunctionNumber > 0) && (subFunctionNumber < 4)) {\r
+ routineId = (uint16)((uint16)pduRxData->SduDataPtr[2] << 8) + pduRxData->SduDataPtr[3];\r
+ if (lookupRoutine(routineId, &routinePtr)) {\r
+ if (DspCheckSessionLevel(routinePtr->DspRoutineInfoRef->DspRoutineAuthorization.DspRoutineSessionRef)) {\r
+ if (DspCheckSecurityLevel(routinePtr->DspRoutineInfoRef->DspRoutineAuthorization.DspRoutineSecurityLevelRef)) {\r
+ switch (subFunctionNumber) {\r
+ case 0x01: // startRoutine\r
+ responseCode = startRoutine(routinePtr, pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x02: // stopRoutine\r
+ responseCode = stopRoutine(routinePtr, pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x03: // requestRoutineResults\r
+ responseCode = requestRoutineResults(routinePtr, pduTxData);\r
+ break;\r
+\r
+ default: // This shall never happen\r
+ responseCode = DCM_E_SUBFUNCTIONNOTSUPPORTED;\r
+ break;\r
+ }\r
+ }\r
+ else { // Not allowed in current security level\r
+ responseCode = DCM_E_SECUTITYACCESSDENIED;\r
+ }\r
+ }\r
+ else { // Not allowed in current session\r
+ responseCode = DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION;\r
+ }\r
+ }\r
+ else { // Unknown routine identifier\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+ else { // Sub function not supported\r
+ responseCode = DCM_E_SUBFUNCTIONNOTSUPPORTED;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ // Add header to the positive response message\r
+ pduTxData->SduDataPtr[1] = subFunctionNumber;\r
+ pduTxData->SduDataPtr[2] = (routineId >> 8) & 0xFFu;\r
+ pduTxData->SduDataPtr[3] = routineId & 0xFFu;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
void DspUdsTesterPresent(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
{\r
/** @req DCM251 */\r
#define SID_CONTROL_DTC_SETTING 0x85\r
\r
// Misc definitions\r
-#define SUPPRESS_POS_RESP_BIT 0x80\r
-#define SID_RESPONSE_BIT 0x40\r
-#define VALUE_IS_NOT_USED 0x00\r
+#define SUPPRESS_POS_RESP_BIT (uint8)0x80\r
+#define SID_RESPONSE_BIT (uint8)0x40\r
+#define VALUE_IS_NOT_USED (uint8)0x00\r
\r
typedef enum {\r
DSD_TX_RESPONSE_READY,\r
void DspUdsReadScalingDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
void DspUdsWriteDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
void DspUdsControlDtcSetting(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsRoutineControl(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
void DspDcmConfirmation(PduIdType confirmPduId);\r
\r
-boolean DspCheckSessionLevel(const Dcm_DspSessionRowType **sessionLevelRefTable);\r
-boolean DspCheckSecurityLevel(const Dcm_DspSecurityRowType **securityLevelRefTable);\r
+boolean DspCheckSessionLevel(Dcm_DspSessionRowType const* const* sessionLevelRefTable);\r
+boolean DspCheckSecurityLevel(Dcm_DspSecurityRowType const* const* securityLevelRefTable);\r
\r
\r
/*\r
void DslInit(void);\r
void DslMain(void);\r
void DslHandleResponseTransmission(void);\r
-void DslDsdProcessingDone(PduIdType txPduId, DsdProcessingDoneResultType result);\r
+void DslDsdProcessingDone(PduIdType rxPduIdRef, DsdProcessingDoneResultType responseResult);\r
void DslGetCurrentServiceTable(const Dcm_DsdServiceTableType **currentServiceTable);\r
\r
BufReq_ReturnType DslProvideRxBufferToPdur(PduIdType dcmRxPduId, PduLengthType tpSduLength, const PduInfoType **pduInfoPtr);\r
Std_ReturnType DslGetActiveProtocol(Dcm_ProtocolType *protocolId);\r
void DslSetSecurityLevel(Dcm_SecLevelType secLevel);\r
Std_ReturnType DslGetSecurityLevel(Dcm_SecLevelType *secLevel);\r
-void DslSetSesCtrlType(Dcm_SesCtrlType sesCtrlType);\r
+void DslSetSesCtrlType(Dcm_SesCtrlType sesCtrl);\r
Std_ReturnType DslGetSesCtrlType(Dcm_SesCtrlType *sesCtrlType);\r
BufReq_ReturnType DslProvideTxBuffer(PduIdType dcmTxPduId, const PduInfoType **pduInfoPtr, PduLengthType length);\r
void DslTxConfirmation(PduIdType dcmTxPduId, NotifResultType result);\r
\r
// DidServices_<DID>\r
typedef Std_ReturnType (*Dcm_CallbackReadDataFncType)(uint8 *data);\r
-typedef Std_ReturnType (*Dcm_CallbackWriteDataFncType)(uint8 *data, uint8 dataLength, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackWriteDataFncType)(uint8 *data, uint16 dataLength, Dcm_NegativeResponseCodeType *errorCode);\r
typedef Std_ReturnType (*Dcm_CallbackReadDataLengthFncType)(uint16 *didLength);\r
typedef Std_ReturnType (*Dcm_CallbackConditionCheckReadFncType)(Dcm_NegativeResponseCodeType *errorCode);\r
typedef Std_ReturnType (*Dcm_CallbackConditionCheckWriteFncType)(Dcm_NegativeResponseCodeType *errorCode);\r
typedef Std_ReturnType (*Dcm_CallbackGgetDTRValueFncType)(uint16 *testval, uint16 *minlimit, uint16 *maxlimit, uint8 *status);\r
\r
// RoutineServices_<ROUTINENAME>\r
-typedef Std_ReturnType (*Dcm_CallbackStartFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
-typedef Std_ReturnType (*Dcm_CallbackStopFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
-typedef Std_ReturnType (*Dcm_CallbackRequestResultFncType)(uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackStartRoutineFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackStopRoutineFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
+typedef Std_ReturnType (*Dcm_CallbackRequestResultRoutineFncType)(uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);\r
\r
// RequestControlServices_<TID>\r
typedef Std_ReturnType (*Dcm_CallbackRequestControlType)(uint8 *outBuffer, uint8 *inBuffer);\r
} Dcm_DspDidInfoType; /** @req DCM607 */\r
\r
// 10.2.22\r
-typedef struct _Dcm_DspDidType {\r
+typedef struct Dcm_DspDidType {\r
boolean DspDidUsePort; // (1)\r
uint16 DspDidIdentifier; // (1) /** @req DCM602 */\r
const Dcm_DspDidInfoType *DspDidInfoRef; // (1) /** @req DCM604 */\r
- const struct _Dcm_DspDidType **DspDidRef; // (0..*) /** @req DCM606 */\r
+ const struct Dcm_DspDidType **DspDidRef; // (0..*) /** @req DCM606 */\r
uint16 DspDidSize; // (1) /** @req DCM605 */\r
Dcm_CallbackReadDataLengthFncType DspDidReadDataLengthFnc; // (0..1) /** @req DCM671 */\r
Dcm_CallbackConditionCheckReadFncType DspDidConditionCheckReadFnc; // (0..1) /** @req DCM677 */\r
\r
// 10.2.37\r
typedef struct {\r
- const Dcm_DspSessionRowType *DspRoutineSessionRef; // (1..*) /** @req DCM649 */\r
- const Dcm_DspSecurityRowType *DspRoutineSecurityLevelRef; // (1..*) /** @req DCM648 */\r
+ const Dcm_DspSessionRowType **DspRoutineSessionRef; // (1..*) /** @req DCM649 */\r
+ const Dcm_DspSecurityRowType **DspRoutineSecurityLevelRef; // (1..*) /** @req DCM648 */\r
} Dcm_DspRoutineAuthorizationType; /** @req DCM644 */\r
\r
// 10.2.38\r
// 10.2.36\r
typedef struct {\r
// Containers\r
- const Dcm_DspRoutineAuthorizationType *DspRoutineAuthorization; // (1)\r
- const Dcm_DspRoutineRequestResType *DspRoutineRequestRes; // (0..1)\r
- const Dcm_DspRoutineStopType *DspRoutineStop; // (0..1)\r
+ const Dcm_DspRoutineAuthorizationType DspRoutineAuthorization; // (1)\r
const Dcm_DspStartRoutineType *DspStartRoutine; // (1)\r
+ const Dcm_DspRoutineStopType *DspRoutineStop; // (0..1)\r
+ const Dcm_DspRoutineRequestResType *DspRoutineRequestRes; // (0..1)\r
} Dcm_DspRoutineInfoType; /** @req DCM643 */\r
\r
// 10.2.35\r
typedef struct {\r
- boolean DspRoutineUsePort; // (1)\r
- uint16 DspRoutineIdentifier; // (1) /** @req DCM641 */\r
- const Dcm_DspRoutineInfoType *DspRoutineInfoRef; // (1) /** @req DCM642 */\r
- Dcm_CallbackStartFncType DspStartRoutineFnc; // (0..1) /** @req DCM664 */\r
- Dcm_CallbackStopFncType DspStopRoutineFnc; // (0..1) /** @req DCM665 */\r
- Dcm_CallbackRequestResultFncType DspRequestResultRoutineFnc; // (0..1) /** @req DCM665 */\r
+ boolean DspRoutineUsePort; // (1)\r
+ uint16 DspRoutineIdentifier; // (1) /** @req DCM641 */\r
+ const Dcm_DspRoutineInfoType *DspRoutineInfoRef; // (1) /** @req DCM642 */\r
+ Dcm_CallbackStartRoutineFncType DspStartRoutineFnc; // (0..1) /** @req DCM664 */\r
+ Dcm_CallbackStopRoutineFncType DspStopRoutineFnc; // (0..1) /** @req DCM665 */\r
+ Dcm_CallbackRequestResultRoutineFncType DspRequestResultRoutineFnc; // (0..1) /** @req DCM665 */\r
+ boolean Arc_EOL;\r
} Dcm_DspRoutineType; /** @req DCM640 */\r
\r
// 10.2.41\r
typedef enum\r
{\r
BUFFER_AVAILABLE,\r
- BUFFER_BUSY,\r
+ BUFFER_BUSY\r
}Dcm_DslBufferStatusType;\r
\r
\r
struct Dcm_DslProtocolRxType_t {\r
const Dcm_DslMainConnectionType *DslMainConnectionParent; // (1) /* Cross reference. */\r
const Dcm_ProtocolAddrTypeType DslProtocolAddrType; // (1)\r
- const uint32 DcmDslProtocolRxPduId; // (1)\r
+ const PduIdType DcmDslProtocolRxPduId; // (1)\r
const uint32 DcmDslProtocolRxTesterSourceAddr_v4; // (1)\r
const uint8 DcmDslProtocolRxChannelId_v4; // (1)\r
const boolean Arc_EOL;\r
// 10.2.14\r
struct Dcm_DslProtocolTxType_t {\r
const Dcm_DslMainConnectionType *DslMainConnectionParent; // (1) /* Cross reference. */\r
- const uint32 DcmDslProtocolTxPduId; // (1) /* Will be removed (polite), kept for reference. */\r
+ const PduIdType DcmDslProtocolTxPduId; // (1) /* Will be removed (polite), kept for reference. */\r
const boolean Arc_EOL;\r
};\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
-\r
-\r
+// 904 PC-Lint MISRA 14.7: OK. Allow VALIDATE, VALIDATE_RV and VALIDATE_NO_RV to return value.\r
+//lint -emacro(904,VALIDATE_RV,VALIDATE_NO_RV,VALIDATE)\r
+// 522 PC-Lint exception for empty functions\r
+//lint -esym(522,storeFreezeFrameDataEvtMem)\r
+//lint -esym(522,deleteFreezeFrameDataPriMem)\r
+//lint -esym(522,storeFreezeFrameDataPreInit)\r
+//lint -esym(522,storeFreezeFrameDataPriMem)\r
+//lint -esym(522,updateFreezeFrameOccurrencePreInit)\r
\r
\r
/*\r
#if ( DEM_DEV_ERROR_DETECT == STD_ON )\r
#include "Det.h"\r
/** @req DEM117 */\r
-#define VALIDATE(_exp,_api,_err ) \\r
- if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_DEM, 0, _api, _err); \\r
- return E_NOT_OK; \\r
- }\r
-\r
#define VALIDATE_RV(_exp,_api,_err,_rv ) \\r
if( !(_exp) ) { \\r
Det_ReportError(MODULE_ID_DEM, 0, _api, _err); \\r
#define DET_REPORTERROR(_x,_y,_z,_q) Det_ReportError(_x, _y, _z, _q)\r
\r
#else\r
-#define VALIDATE(_exp,_api,_err )\r
#define VALIDATE_RV(_exp,_api,_err,_rv )\r
#define VALIDATE_NO_RV(_exp,_api,_err )\r
#define DET_REPORTERROR(_x,_y,_z,_q)\r
#endif\r
\r
+#if (DEM_OBD_SUPPORT == STD_ON)\r
+#error "DEM_OBD_SUPPORT is set to STD_ON, this is not supported by the code."\r
+#endif\r
+\r
+#if (DEM_PTO_SUPPORT == STD_ON)\r
+#error "DEM_PTO_SUPPORT is set to STD_ON, this is not supported by the code."\r
+#endif\r
+\r
+#if (DEM_TYPE_OF_DTC_SUPPORTED != 0x01)\r
+#error "DEM_TYPE_OF_DTC_SUPPORTED is not set to 1 (ISO14229-1), only ISO14229-1 is currently supported by the code."\r
+#endif\r
+\r
\r
/*\r
* Local types\r
* Procedure: zeroPriMemBuffers\r
* Description: Fill the primary buffers with zeroes\r
*/\r
+//lint -e957 PC-Lint exception - Used only by DemTest\r
void demZeroPriMemBuffers(void)\r
{\r
memset(priMemEventBuffer, 0, sizeof(priMemEventBuffer));\r
static ChecksumType calcChecksum(void *data, uint16 nrOfBytes)\r
{\r
uint16 i;\r
- uint8 *ptr = (uint8*)data;\r
+ uint8 *byte = (uint8*)data;\r
ChecksumType sum = 0;\r
\r
- for (i = 0; i < nrOfBytes; i++)\r
- sum += *ptr++;\r
- sum ^= 0xaaaa;\r
+ for (i = 0; i < nrOfBytes; i++) {\r
+ sum += byte[i];\r
+ }\r
+ sum ^= 0xaaaau;\r
return sum;\r
}\r
\r
static boolean checkDtcOrigin(Dem_DTCOriginType dtcOrigin, const Dem_EventParameterType *eventParam)\r
{\r
boolean result = FALSE;\r
+ boolean dtcOriginFound = FALSE;\r
uint16 i;\r
\r
- for (i = 0; (eventParam->EventClass->EventDestination[i] != dtcOrigin) && (i < DEM_MAX_NR_OF_EVENT_DESTINATION); i++);\r
+ for (i = 0;(i < DEM_MAX_NR_OF_EVENT_DESTINATION) && (!dtcOriginFound); i++){\r
+ dtcOriginFound = (eventParam->EventClass->EventDestination[i] == dtcOrigin);\r
+ }\r
\r
- if (i < DEM_MAX_NR_OF_EVENT_DESTINATION) {\r
+ if (dtcOriginFound) {\r
result = TRUE;\r
}\r
\r
return result;\r
}\r
\r
-\r
/*\r
* Procedure: checkDtcSeverityMask\r
* Description: Return TRUE if "dtcSeverityMask" match any of the events DTC severity otherwise FALSE.\r
*/\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
static boolean checkDtcSeverityMask(Dem_DTCSeverityType dtcSeverityMask, const Dem_EventParameterType *eventParam)\r
{\r
boolean result = TRUE;\r
* Procedure: checkDtcFaultDetectionCounterMask\r
* Description: TBD.\r
*/\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
static boolean checkDtcFaultDetectionCounter(const Dem_EventParameterType *eventParam)\r
{\r
boolean result = TRUE;\r
*/\r
static void lookupEventStatusRec(Dem_EventIdType eventId, EventStatusRecType **const eventStatusRec)\r
{\r
- EventStatusRecType *eventStatusRecPtr = eventStatusBuffer;\r
+ uint8 i;\r
+ boolean eventIdFound = FALSE;\r
\r
- while ((eventStatusRecPtr->eventId != eventId) && (eventStatusRecPtr < &eventStatusBuffer[DEM_MAX_NUMBER_EVENT])) {\r
- eventStatusRecPtr++;\r
+ for (i = 0; (i < DEM_MAX_NUMBER_EVENT) && (!eventIdFound); i++) {\r
+ eventIdFound = (eventStatusBuffer[i].eventId == eventId);\r
}\r
\r
- if (eventStatusRecPtr < &eventStatusBuffer[DEM_MAX_NUMBER_EVENT]) {\r
- *eventStatusRec = eventStatusRecPtr;\r
+ if (eventIdFound) {\r
+ *eventStatusRec = &eventStatusBuffer[i-1];\r
} else {\r
*eventStatusRec = NULL;\r
}\r
*/\r
static void lookupEventIdParameter(Dem_EventIdType eventId, const Dem_EventParameterType **const eventIdParam)\r
{\r
- const Dem_EventParameterType *EventIdParamPtr = configSet->EventParameter;\r
+ const Dem_EventParameterType *EventIdParamList = configSet->EventParameter;\r
\r
// Lookup the correct event id parameters\r
- while ((EventIdParamPtr->EventID != eventId) && !EventIdParamPtr->Arc_EOL) {\r
- EventIdParamPtr++;\r
+ uint16 i=0;\r
+ while ((EventIdParamList[i].EventID != eventId) && (!EventIdParamList[i].Arc_EOL)) {\r
+ i++;\r
}\r
\r
- if (!EventIdParamPtr->Arc_EOL) {\r
- *eventIdParam = EventIdParamPtr;\r
+ if (!EventIdParamList[i].Arc_EOL) {\r
+ *eventIdParam = &EventIdParamList[i];\r
} else {\r
*eventIdParam = NULL;\r
}\r
* Procedure: preDebounceNone\r
* Description: Returns the result of the debouncing.\r
*/\r
-static Dem_EventStatusType preDebounceNone(Dem_EventStatusType reportedStatus, EventStatusRecType* statusRecord) {\r
+static Dem_EventStatusType preDebounceNone(const Dem_EventStatusType reportedStatus, const EventStatusRecType* statusRecord) {\r
Dem_EventStatusType returnCode;\r
+ (void)statusRecord; // Just to get rid of PC-Lint warnings\r
\r
switch (reportedStatus) {\r
case DEM_EVENT_STATUS_FAILED: /** @req DEM091.NoneFailed */\r
switch (reportedStatus) {\r
case DEM_EVENT_STATUS_PREFAILED:\r
if (statusRecord->faultDetectionCounter < DEBOUNCE_FDC_TEST_FAILED) {\r
- if (pdVars->JumpUp && (statusRecord->faultDetectionCounter < 0)) {\r
+ if ((pdVars->JumpUp) && (statusRecord->faultDetectionCounter < 0)) {\r
statusRecord->faultDetectionCounter = 0;\r
} else {\r
- if (((sint16)statusRecord->faultDetectionCounter + pdVars->CountInStepSize) < DEBOUNCE_FDC_TEST_FAILED) {\r
- statusRecord->faultDetectionCounter += pdVars->CountInStepSize;\r
+ if (((sint16)statusRecord->faultDetectionCounter + (sint8)pdVars->CountInStepSize) < DEBOUNCE_FDC_TEST_FAILED) {\r
+ statusRecord->faultDetectionCounter += (sint8)pdVars->CountInStepSize;\r
} else {\r
statusRecord->faultDetectionCounter = DEBOUNCE_FDC_TEST_FAILED;\r
}\r
\r
case DEM_EVENT_STATUS_PREPASSED:\r
if (statusRecord->faultDetectionCounter > DEBOUNCE_FDC_TEST_PASSED) {\r
- if (pdVars->JumpDown && (statusRecord->faultDetectionCounter > 0)) {\r
+ if ((pdVars->JumpDown) && (statusRecord->faultDetectionCounter > 0)) {\r
statusRecord->faultDetectionCounter = 0;\r
} else {\r
- if (((sint16)statusRecord->faultDetectionCounter - pdVars->CountOutStepSize) > DEBOUNCE_FDC_TEST_PASSED) {\r
- statusRecord->faultDetectionCounter -= pdVars->CountOutStepSize;\r
+ if (((sint16)statusRecord->faultDetectionCounter - (sint8)pdVars->CountOutStepSize) > DEBOUNCE_FDC_TEST_PASSED) {\r
+ statusRecord->faultDetectionCounter -= (sint8)pdVars->CountOutStepSize;\r
} else {\r
statusRecord->faultDetectionCounter = DEBOUNCE_FDC_TEST_PASSED;\r
}\r
}\r
/** @req DEM036 */ /** @req DEM379.PendingSet */\r
eventStatusRecPtr->eventStatusExtended |= (DEM_TEST_FAILED | DEM_TEST_FAILED_THIS_OPERATION_CYCLE | DEM_TEST_FAILED_SINCE_LAST_CLEAR | DEM_PENDING_DTC);\r
- eventStatusRecPtr->eventStatusExtended &= ~(DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE);\r
+ eventStatusRecPtr->eventStatusExtended &= (Dem_EventStatusExtendedType)~(DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE);\r
}\r
\r
// Check test passed\r
eventStatusRecPtr->errorStatusChanged = TRUE;\r
}\r
/** @req DEM036 */\r
- eventStatusRecPtr->eventStatusExtended &= ~DEM_TEST_FAILED;\r
- eventStatusRecPtr->eventStatusExtended &= ~(DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE);\r
+ eventStatusRecPtr->eventStatusExtended &= (Dem_EventStatusExtendedType)~DEM_TEST_FAILED;\r
+ eventStatusRecPtr->eventStatusExtended &= (Dem_EventStatusExtendedType)~(DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE);\r
}\r
\r
// Copy the record\r
else {\r
// Copy an empty record to return data\r
eventStatusRec->eventId = DEM_EVENT_ID_NULL;\r
- eventStatusRecPtr->faultDetectionCounter = 0;\r
+ eventStatusRec->faultDetectionCounter = 0;\r
eventStatusRec->occurrence = 0;\r
eventStatusRec->eventStatusExtended = DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE | DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR;\r
eventStatusRec->errorStatusChanged = FALSE;\r
* Procedure: mergeEventStatusRec\r
* Description: Update the occurrence counter of status, if not exist a new record is created\r
*/\r
-static void mergeEventStatusRec(EventRecType *eventRec)\r
+static void mergeEventStatusRec(const EventRecType *eventRec)\r
{\r
EventStatusRecType *eventStatusRecPtr;\r
imask_t state = McuE_EnterCriticalSection();\r
\r
*eventStatusRec = NULL;\r
\r
- for (i = 0; (i < DEM_MAX_NUMBER_EVENT) && !dtcFound; i++) {\r
+ for (i = 0; (i < DEM_MAX_NUMBER_EVENT) && (!dtcFound); i++) {\r
if (eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) {\r
if (eventStatusBuffer[i].eventParamRef->DTCClassRef != NULL) {\r
\r
\r
// Check severity\r
if ((dtcFilter.filterWithSeverity == DEM_FILTER_WITH_SEVERITY_NO)\r
- || ((dtcFilter.filterWithSeverity == DEM_FILTER_WITH_SEVERITY_YES) && checkDtcSeverityMask(dtcFilter.dtcSeverityMask, eventRec->eventParamRef))) {\r
+ || ((dtcFilter.filterWithSeverity == DEM_FILTER_WITH_SEVERITY_YES) && (checkDtcSeverityMask(dtcFilter.dtcSeverityMask, eventRec->eventParamRef)))) {\r
\r
// Check fault detection counter\r
if ((dtcFilter.filterForFaultDetectionCounter == DEM_FILTER_FOR_FDC_NO)\r
- || ((dtcFilter.filterWithSeverity == DEM_FILTER_FOR_FDC_YES) && checkDtcFaultDetectionCounter(eventRec->eventParamRef))) {\r
+ || ((dtcFilter.filterWithSeverity == DEM_FILTER_FOR_FDC_YES) && (checkDtcFaultDetectionCounter(eventRec->eventParamRef)))) {\r
dtcMatch = TRUE;\r
}\r
}\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
static void getFreezeFrameData(const Dem_EventParameterType *eventParam, FreezeFrameRecType *freezeFrame)\r
{\r
// TODO: Fill out\r
}\r
\r
\r
-static void storeFreezeFrameDataPreInit(const Dem_EventParameterType *eventParam, FreezeFrameRecType *freezeFrame)\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
+static void storeFreezeFrameDataPreInit(const Dem_EventParameterType *eventParam, const FreezeFrameRecType *freezeFrame)\r
{\r
// TODO: Fill out\r
}\r
\r
\r
-static void updateFreezeFrameOccurrencePreInit(EventRecType *EventBuffer)\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
+static void updateFreezeFrameOccurrencePreInit(const EventRecType *EventBuffer)\r
{\r
// TODO: Fill out\r
}\r
* Description: Store the extended data pointed by "extendedData" to the "preInitExtDataBuffer",\r
* if non existent a new entry is created.\r
*/\r
-static void storeExtendedDataPreInit(const Dem_EventParameterType *eventParam, ExtDataRecType *extendedData)\r
+static void storeExtendedDataPreInit(const Dem_EventParameterType *eventParam, const ExtDataRecType *extendedData)\r
{\r
+ boolean eventIdFound = FALSE;\r
+ boolean eventIdFreePositionFound=FALSE;\r
uint16 i;\r
imask_t state = McuE_EnterCriticalSection();\r
\r
// Check if already stored\r
- for (i = 0; (preInitExtDataBuffer[i].eventId != eventParam->EventID) && (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT); i++);\r
+ for (i = 0; (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT) && (!eventIdFound); i++){\r
+ eventIdFound = (preInitExtDataBuffer[i].eventId == eventParam->EventID);\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EXT_DATA_PRE_INIT) {\r
+ if(eventIdFound){\r
// Yes, overwrite existing\r
- memcpy(&preInitExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));\r
+ memcpy(&preInitExtDataBuffer[i-1], extendedData, sizeof(ExtDataRecType));\r
}\r
- else {\r
+ else{\r
// No, lookup first free position\r
- for (i = 0; (preInitExtDataBuffer[i].eventId !=0) && (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT); i++);\r
+ for (i = 0; (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT) && (!eventIdFreePositionFound); i++){\r
+ if(preInitExtDataBuffer[i].eventId ==0){\r
+ eventIdFreePositionFound=TRUE;\r
+ }\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EXT_DATA_PRE_INIT) {\r
- memcpy(&preInitExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));\r
+ if (eventIdFreePositionFound) {\r
+ memcpy(&preInitExtDataBuffer[i-1], extendedData, sizeof(ExtDataRecType));\r
}\r
else {\r
// Error: Pre init extended data buffer full\r
McuE_ExitCriticalSection(state);\r
}\r
\r
-\r
/*\r
* Procedure: storeEventPriMem\r
* Description: Store the event data of "eventStatus->eventId" in "priMemEventBuffer",\r
* if non existent a new entry is created.\r
*/\r
-static void storeEventPriMem(const Dem_EventParameterType *eventParam, EventStatusRecType *eventStatus)\r
+static void storeEventPriMem(const Dem_EventParameterType *eventParam, const EventStatusRecType *eventStatus)\r
{\r
+ boolean eventIdFound = FALSE;\r
+ boolean eventIdFreePositionFound=FALSE;\r
uint16 i;\r
imask_t state = McuE_EnterCriticalSection();\r
\r
+ (void)*eventParam; // Currently not used, do this to avoid warning\r
\r
// Lookup event ID\r
- for (i = 0; (priMemEventBuffer[i].eventId != eventStatus->eventId) && (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI); i++);\r
+ for (i = 0; (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) && (!eventIdFound); i++){\r
+ eventIdFound = (priMemEventBuffer[i].eventId == eventStatus->eventId);\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) {\r
+ if (eventIdFound) {\r
// Update event found\r
- priMemEventBuffer[i].occurrence = eventStatus->occurrence;\r
- priMemEventBuffer[i].checksum = calcChecksum(&priMemEventBuffer[i], sizeof(EventRecType)-sizeof(ChecksumType));\r
+ priMemEventBuffer[i-1].occurrence = eventStatus->occurrence;\r
+ priMemEventBuffer[i-1].checksum = calcChecksum(&priMemEventBuffer[i-1], sizeof(EventRecType)-sizeof(ChecksumType));\r
}\r
else {\r
// Search for free position\r
- for (i=0; (priMemEventBuffer[i].eventId != DEM_EVENT_ID_NULL) && (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI); i++);\r
+ for (i=0; (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) && (!eventIdFreePositionFound); i++){\r
+ eventIdFreePositionFound = (priMemEventBuffer[i].eventId == DEM_EVENT_ID_NULL);\r
+ }\r
+\r
\r
- if (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) {\r
- priMemEventBuffer[i].eventId = eventStatus->eventId;\r
- priMemEventBuffer[i].occurrence = eventStatus->occurrence;\r
- priMemEventBuffer[i].checksum = calcChecksum(&priMemEventBuffer[i], sizeof(EventRecType)-sizeof(ChecksumType));\r
+ if (eventIdFreePositionFound) {\r
+ priMemEventBuffer[i-1].eventId = eventStatus->eventId;\r
+ priMemEventBuffer[i-1].occurrence = eventStatus->occurrence;\r
+ priMemEventBuffer[i-1].checksum = calcChecksum(&priMemEventBuffer[i-1], sizeof(EventRecType)-sizeof(ChecksumType));\r
}\r
else {\r
// Error: Pri mem event buffer full\r
McuE_ExitCriticalSection(state);\r
}\r
\r
-\r
/*\r
* Procedure: deleteEventPriMem\r
* Description: Delete the event data of "eventParam->eventId" from "priMemEventBuffer".\r
*/\r
static void deleteEventPriMem(const Dem_EventParameterType *eventParam)\r
{\r
+ boolean eventIdFound = FALSE;\r
uint16 i;\r
imask_t state = McuE_EnterCriticalSection();\r
\r
\r
// Lookup event ID\r
- for (i = 0; (priMemEventBuffer[i].eventId != eventParam->EventID) && (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI); i++);\r
+ for (i = 0; (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) && (!eventIdFound); i++){\r
+ eventIdFound = (priMemEventBuffer[i].eventId == eventParam->EventID);\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) {\r
+ if (eventIdFound) {\r
// Delete event found\r
- memset(&priMemEventBuffer[i], 0, sizeof(EventRecType));\r
+ memset(&priMemEventBuffer[i-1], 0, sizeof(EventRecType));\r
}\r
\r
McuE_ExitCriticalSection(state);\r
}\r
\r
-\r
/*\r
* Procedure: storeEventEvtMem\r
* Description: Store the event data of "eventStatus->eventId" in event memory according to\r
* "eventParam" destination option.\r
*/\r
-static void storeEventEvtMem(const Dem_EventParameterType *eventParam, EventStatusRecType *eventStatus)\r
+static void storeEventEvtMem(const Dem_EventParameterType *eventParam, const EventStatusRecType *eventStatus)\r
{\r
uint16 i;\r
\r
* Description: Store the extended data pointed by "extendedData" to the "priMemExtDataBuffer",\r
* if non existent a new entry is created.\r
*/\r
-static void storeExtendedDataPriMem(const Dem_EventParameterType *eventParam, ExtDataRecType *extendedData) /** @req DEM041 */\r
+static void storeExtendedDataPriMem(const Dem_EventParameterType *eventParam, const ExtDataRecType *extendedData) /** @req DEM041 */\r
{\r
+ boolean eventIdFound = FALSE;\r
+ boolean eventIdFreePositionFound=FALSE;\r
uint16 i;\r
imask_t state = McuE_EnterCriticalSection();\r
\r
// Check if already stored\r
- for (i = 0; (priMemExtDataBuffer[i].eventId != eventParam->EventID) && (i<DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);\r
+ for (i = 0; (i<DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) && (!eventIdFound); i++){\r
+ eventIdFound = (priMemExtDataBuffer[i].eventId == eventParam->EventID);\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {\r
+ if (eventIdFound) {\r
// Yes, overwrite existing\r
- memcpy(&priMemExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));\r
+ memcpy(&priMemExtDataBuffer[i-1], extendedData, sizeof(ExtDataRecType));\r
}\r
else {\r
// No, lookup first free position\r
- for (i = 0; (priMemExtDataBuffer[i].eventId != DEM_EVENT_ID_NULL) && (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);\r
- if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {\r
- memcpy(&priMemExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));\r
+ for (i = 0; (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) && (!eventIdFreePositionFound); i++){\r
+ eventIdFreePositionFound = (priMemExtDataBuffer[i].eventId == DEM_EVENT_ID_NULL);\r
+ }\r
+ if (eventIdFreePositionFound) {\r
+ memcpy(&priMemExtDataBuffer[i-1], extendedData, sizeof(ExtDataRecType));\r
}\r
else {\r
// Error: Pri mem extended data buffer full\r
McuE_ExitCriticalSection(state);\r
}\r
\r
-\r
/*\r
* Procedure: deleteExtendedDataPriMem\r
* Description: Delete the extended data of "eventParam->eventId" from "priMemExtDataBuffer".\r
*/\r
static void deleteExtendedDataPriMem(const Dem_EventParameterType *eventParam)\r
{\r
+ boolean eventIdFound = FALSE;\r
uint16 i;\r
imask_t state = McuE_EnterCriticalSection();\r
\r
// Check if already stored\r
- for (i = 0; (priMemExtDataBuffer[i].eventId != eventParam->EventID) && (i<DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);\r
+ for (i = 0;(i<DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) && (!eventIdFound); i++){\r
+ eventIdFound = (priMemExtDataBuffer[i].eventId == eventParam->EventID);\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {\r
+ if (eventIdFound) {\r
// Yes, clear record\r
- memset(&priMemExtDataBuffer[i], 0, sizeof(ExtDataRecType));\r
+ memset(&priMemExtDataBuffer[i-1], 0, sizeof(ExtDataRecType));\r
}\r
\r
McuE_ExitCriticalSection(state);\r
}\r
\r
-\r
/*\r
* Procedure: storeExtendedDataEvtMem\r
* Description: Store the extended data in event memory according to\r
* "eventParam" destination option\r
*/\r
-static void storeExtendedDataEvtMem(const Dem_EventParameterType *eventParam, ExtDataRecType *extendedData)\r
+static void storeExtendedDataEvtMem(const Dem_EventParameterType *eventParam, const ExtDataRecType *extendedData)\r
{\r
uint16 i;\r
\r
* Description: Returns TRUE if the requested extended data number was found among the configured records for the event.\r
* "extDataRecClassPtr" returns a pointer to the record class, "posInExtData" returns the position in stored extended data.\r
*/\r
-static boolean lookupExtendedDataRecNumParam(uint8 extendedDataNumber, const Dem_EventParameterType *eventParam, Dem_ExtendedDataRecordClassType const **extDataRecClassPtr, uint8 *posInExtData)\r
+static boolean lookupExtendedDataRecNumParam(uint8 extendedDataNumber, const Dem_EventParameterType *eventParam, Dem_ExtendedDataRecordClassType const **extDataRecClassPtr, uint16 *posInExtData)\r
{\r
boolean recNumFound = FALSE;\r
\r
if (eventParam->ExtendedDataClassRef != NULL) {\r
- Dem_ExtendedDataRecordClassType const* const* extDataRecClassRefList = eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef;\r
uint16 byteCnt = 0;\r
uint16 i;\r
\r
// Request extended data and copy it to the buffer\r
- for (i = 0; (i < DEM_MAX_NR_OF_RECORDS_IN_EXTENDED_DATA) && (extDataRecClassRefList[i] != NULL) && !recNumFound; i++) {\r
- if (extDataRecClassRefList[i]->RecordNumber == extendedDataNumber) {\r
- *extDataRecClassPtr = extDataRecClassRefList[i];\r
+ for (i = 0; (i < DEM_MAX_NR_OF_RECORDS_IN_EXTENDED_DATA) && (eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef[i] != NULL) && (!recNumFound); i++) {\r
+ if (eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef[i]->RecordNumber == extendedDataNumber) {\r
+ *extDataRecClassPtr = eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef[i];\r
*posInExtData = byteCnt;\r
recNumFound = TRUE;\r
}\r
- byteCnt += extDataRecClassRefList[i]->DataSize;\r
+ byteCnt += eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef[i]->DataSize;\r
}\r
}\r
\r
static boolean lookupExtendedDataPriMem(Dem_EventIdType eventId, ExtDataRecType **extData)\r
{\r
boolean eventIdFound = FALSE;\r
- uint16 i;\r
+ sint16 i;\r
\r
// Lookup corresponding extended data\r
- for (i = 0; (priMemExtDataBuffer[i].eventId != eventId) && (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);\r
+ for (i = 0; (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) && (!eventIdFound); i++) {\r
+ eventIdFound = (priMemExtDataBuffer[i].eventId == eventId);\r
+ }\r
\r
- if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {\r
+ if (eventIdFound) {\r
// Yes, return pointer\r
- *extData = &priMemExtDataBuffer[i];\r
- eventIdFound = TRUE;\r
+ *extData = &priMemExtDataBuffer[i-1];\r
}\r
\r
return eventIdFound;\r
}\r
\r
-\r
-static void storeFreezeFrameDataPriMem(const Dem_EventParameterType *eventParam, FreezeFrameRecType *freezeFrame)\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
+static void storeFreezeFrameDataPriMem(const Dem_EventParameterType *eventParam, const FreezeFrameRecType *freezeFrame)\r
{\r
// TODO: Fill out\r
}\r
\r
\r
+// PC-Lint (715 etc): Remove errors until function is filled.\r
+//lint -e{715} Symbol not referenced\r
static void deleteFreezeFrameDataPriMem(const Dem_EventParameterType *eventParam)\r
{\r
// TODO: Fill out\r
* Description: Store the freeze frame data in event memory according to\r
* "eventParam" destination option\r
*/\r
-static void storeFreezeFrameDataEvtMem(const Dem_EventParameterType *eventParam, FreezeFrameRecType *freezeFrame)\r
+static void storeFreezeFrameDataEvtMem(const Dem_EventParameterType *eventParam, const FreezeFrameRecType *freezeFrame)\r
{\r
uint16 i;\r
\r
// Not yet supported\r
DET_REPORTERROR(MODULE_ID_DEM, 0, DEM_GLOBAL_ID, DEM_E_NOT_IMPLEMENTED_YET);\r
break;\r
+\r
default:\r
break;\r
}\r
if (eventParam != NULL) {\r
if (eventParam->EventClass->OperationCycleRef < DEM_OPERATION_CYCLE_ID_ENDMARK) {\r
if (operationCycleStateList[eventParam->EventClass->OperationCycleRef] == DEM_CYCLE_STATE_START) {\r
- if (!(disableDtcStorage.storageDisabled && checkDtcGroup(disableDtcStorage.dtcGroup, eventParam) && checkDtcKind(disableDtcStorage.dtcKind, eventParam))) {\r
+ if ((!((disableDtcStorage.storageDisabled) && (checkDtcGroup(disableDtcStorage.dtcGroup, eventParam)) && (checkDtcKind(disableDtcStorage.dtcKind, eventParam))))) {\r
updateEventStatusRec(eventParam, eventStatus, TRUE, &eventStatusLocal);\r
if (eventStatusLocal.errorStatusChanged) {\r
if (eventStatusLocal.eventStatusExtended & DEM_TEST_FAILED) {\r
\r
lookupEventStatusRec(eventId, &eventStatusRecPtr);\r
if (eventStatusRecPtr != NULL) {\r
- eventStatusRecPtr->eventStatusExtended &= ~DEM_TEST_FAILED; /** @req DEM187 */\r
+ eventStatusRecPtr->eventStatusExtended &= (Dem_EventStatusExtendedType)~DEM_TEST_FAILED; /** @req DEM187 */\r
}\r
\r
McuE_ExitCriticalSection(state);\r
// Lookup event ID\r
for (i = 0; i < DEM_MAX_NUMBER_EVENT; i++) {\r
if ((eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (eventStatusBuffer[i].eventParamRef->EventClass->OperationCycleRef == operationCycleId)) {\r
- eventStatusBuffer[i].eventStatusExtended &= ~DEM_TEST_FAILED_THIS_OPERATION_CYCLE;\r
+ eventStatusBuffer[i].eventStatusExtended &= (Dem_EventStatusExtendedType)~DEM_TEST_FAILED_THIS_OPERATION_CYCLE;\r
eventStatusBuffer[i].eventStatusExtended |= DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE;\r
}\r
}\r
// Lookup event ID\r
for (i = 0; i < DEM_MAX_NUMBER_EVENT; i++) {\r
if ((eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (eventStatusBuffer[i].eventParamRef->EventClass->OperationCycleRef == operationCycleId)) {\r
- if (!(eventStatusBuffer[i].eventStatusExtended & DEM_TEST_FAILED_THIS_OPERATION_CYCLE) && !(eventStatusBuffer[i].eventStatusExtended & DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE)) {\r
- eventStatusBuffer[i].eventStatusExtended &= ~DEM_PENDING_DTC; // Clear pendingDTC bit /** @req DEM379.PendingClear\r
+ if ((!(eventStatusBuffer[i].eventStatusExtended & DEM_TEST_FAILED_THIS_OPERATION_CYCLE)) && (!(eventStatusBuffer[i].eventStatusExtended & DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE))) {\r
+ eventStatusBuffer[i].eventStatusExtended &= (Dem_EventStatusExtendedType)~DEM_PENDING_DTC; // Clear pendingDTC bit /** @req DEM379.PendingClear\r
}\r
}\r
}\r
void Dem_PreInit(void)\r
{\r
/** @req DEM180 */\r
- int i, j;\r
+ uint16 i, j;\r
\r
VALIDATE_NO_RV(DEM_Config.ConfigSet != NULL, DEM_PREINIT_ID, DEM_E_CONFIG_PTR_INVALID);\r
\r
preInitFreezeFrameBuffer[i].eventId = DEM_EVENT_ID_NULL;\r
preInitFreezeFrameBuffer[i].occurrence = 0;\r
preInitFreezeFrameBuffer[i].dataSize = 0;\r
- for (j = 0; j < DEM_MAX_SIZE_FF_DATA;j++)\r
+ for (j = 0; j < DEM_MAX_SIZE_FF_DATA;j++){\r
preInitFreezeFrameBuffer[i].data[j] = 0;\r
+ }\r
}\r
\r
for (i = 0; i < DEM_MAX_NUMBER_EXT_DATA_PRE_INIT; i++) {\r
preInitExtDataBuffer[i].checksum = 0;\r
preInitExtDataBuffer[i].eventId = DEM_EVENT_ID_NULL;\r
preInitExtDataBuffer[i].dataSize = 0;\r
- for (j = 0; j < DEM_MAX_SIZE_EXT_DATA;j++)\r
+ for (j = 0; j < DEM_MAX_SIZE_EXT_DATA;j++){\r
preInitExtDataBuffer[i].data[j] = 0;\r
+ }\r
}\r
\r
disableDtcStorage.storageDisabled = FALSE;\r
\r
- setOperationCycleState(DEM_ACTIVE, DEM_CYCLE_STATE_START); /** @req DEM047 */\r
+ (void)setOperationCycleState(DEM_ACTIVE, DEM_CYCLE_STATE_START); /** @req DEM047 */\r
\r
demState = DEM_PREINITIALIZED;\r
}\r
// Validate event records stored in primary memory\r
for (i = 0; i < DEM_MAX_NUMBER_EVENT_PRI_MEM; i++) {\r
cSum = calcChecksum(&priMemEventBuffer[i], sizeof(EventRecType)-sizeof(ChecksumType));\r
- if ((cSum != priMemEventBuffer[i].checksum) || priMemEventBuffer[i].eventId == DEM_EVENT_ID_NULL) {\r
+ if ((cSum != priMemEventBuffer[i].checksum) || (priMemEventBuffer[i].eventId == DEM_EVENT_ID_NULL)) {\r
// Unlegal record, clear the record\r
memset(&priMemEventBuffer[i], 0, sizeof(EventRecType));\r
}\r
// Validate extended data records stored in primary memory\r
for (i = 0; i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM; i++) {\r
cSum = calcChecksum(&priMemExtDataBuffer[i], sizeof(ExtDataRecType)-sizeof(ChecksumType));\r
- if ((cSum != priMemExtDataBuffer[i].checksum) || priMemExtDataBuffer[i].eventId == DEM_EVENT_ID_NULL) {\r
+ if ((cSum != priMemExtDataBuffer[i].checksum) || (priMemExtDataBuffer[i].eventId == DEM_EVENT_ID_NULL)) {\r
// Unlegal record, clear the record\r
memset(&priMemExtDataBuffer[i], 0, sizeof(ExtDataRecType));\r
}\r
*/\r
void Dem_Shutdown(void)\r
{\r
- setOperationCycleState(DEM_ACTIVE, DEM_CYCLE_STATE_END); /** @req DEM047 */\r
+ (void)setOperationCycleState(DEM_ACTIVE, DEM_CYCLE_STATE_END); /** @req DEM047 */\r
\r
demState = DEM_UNINITIALIZED; /** @req DEM368 */\r
}\r
// Check filterWithSeverity and dtcSeverityMask parameter\r
VALIDATE_RV(((filterWithSeverity == DEM_FILTER_WITH_SEVERITY_NO)\r
|| ((filterWithSeverity == DEM_FILTER_WITH_SEVERITY_YES)\r
- && !(dtcSeverityMask & ~(DEM_SEVERITY_MAINTENANCE_ONLY | DEM_SEVERITY_CHECK_AT_NEXT_FALT | DEM_SEVERITY_CHECK_IMMEDIATELY)))), DEM_SETDTCFILTER_ID, DEM_E_PARAM_DATA, DEM_WRONG_FILTER);\r
+ && (!(dtcSeverityMask & (Dem_DTCSeverityType)~(DEM_SEVERITY_MAINTENANCE_ONLY | DEM_SEVERITY_CHECK_AT_NEXT_FALT | DEM_SEVERITY_CHECK_IMMEDIATELY))))), DEM_SETDTCFILTER_ID, DEM_E_PARAM_DATA, DEM_WRONG_FILTER);\r
\r
// Check filterForFaultDetectionCounter parameter\r
VALIDATE_RV((filterForFaultDetectionCounter == DEM_FILTER_FOR_FDC_YES) || (filterForFaultDetectionCounter == DEM_FILTER_FOR_FDC_NO), DEM_SETDTCFILTER_ID, DEM_E_PARAM_DATA, DEM_WRONG_FILTER);\r
\r
if (demState == DEM_INITIALIZED) {\r
// TODO: This job should be done in an more advanced way according to Dem217\r
- while (!dtcFound && (dtcFilter.faultIndex != 0)) {\r
+ while ((!dtcFound) && (dtcFilter.faultIndex != 0)) {\r
dtcFilter.faultIndex--;\r
if (eventStatusBuffer[dtcFilter.faultIndex].eventId != DEM_EVENT_ID_NULL) {\r
if (matchEventWithDtcFilter(&eventStatusBuffer[dtcFilter.faultIndex])) {\r
if (eventId != DEM_EVENT_ID_NULL) {\r
eventParam = eventStatusBuffer[i].eventParamRef;\r
if (eventParam != NULL) {\r
- if (DEM_CLEAR_ALL_EVENTS | (eventParam->DTCClassRef != NULL)) {\r
+ //lint --e(506) PC-Lint exception Misra 13.7, 14.1 Allow configuration variables in boolean expression\r
+ //lint --e(774) PC-Lint exception Related to MISRA 13.7\r
+ if ((DEM_CLEAR_ALL_EVENTS == STD_ON) || (eventParam->DTCClassRef != NULL)) {\r
if (checkDtcKind(dtcKind, eventParam)) {\r
if (checkDtcGroup(dtc, eventParam)) {\r
- for (j = 0; (j < DEM_MAX_NR_OF_EVENT_DESTINATION) && (eventParam->EventClass->EventDestination[j] != dtcOrigin); j++);\r
- if (j < DEM_MAX_NR_OF_EVENT_DESTINATION) {\r
+ boolean dtcOriginFound = FALSE;\r
+ for (j = 0; (j < DEM_MAX_NR_OF_EVENT_DESTINATION) && (!dtcOriginFound) ; j++){\r
+ dtcOriginFound =(eventParam->EventClass->EventDestination[j] == dtcOrigin);\r
+ }\r
+ //if (j-1 < DEM_MAX_NR_OF_EVENT_DESTINATION) {\r
+ if (dtcOriginFound) {\r
// Yes! All conditions met.\r
switch (dtcOrigin)\r
{\r
\r
if (demState == DEM_INITIALIZED) {\r
// TODO: Behavior is not defined if group or kind do not match active settings, therefore the filter is just switched off.\r
+ (void)dtcGroup; (void)dtcKind; // Just to make get rid of PC-Lint warnings\r
disableDtcStorage.storageDisabled = FALSE; /** @req DEM080 */\r
} else {\r
DET_REPORTERROR(MODULE_ID_DEM, 0, DEM_ENABLEDTCSTORAGE_ID, DEM_E_UNINIT);\r
* Procedure: Dem_GetExtendedDataRecordByDTC\r
* Reentrant: No\r
*/\r
-Dem_ReturnGetExtendedDataRecordByDTCType Dem_GetExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint8 *destBuffer, uint8 *bufSize)\r
+Dem_ReturnGetExtendedDataRecordByDTCType Dem_GetExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint8 *destBuffer, uint16 *bufSize)\r
{\r
Dem_ReturnGetExtendedDataRecordByDTCType returnCode = DEM_RECORD_WRONG_DTC;\r
EventStatusRecType *eventRec;\r
Dem_ExtendedDataRecordClassType const *extendedDataRecordClass = NULL;\r
ExtDataRecType *extData;\r
- uint8 posInExtData = 0;\r
+ uint16 posInExtData = 0;\r
\r
if (demState == DEM_INITIALIZED) {\r
if (lookupDtcEvent(dtc, &eventRec)) {\r
Dem_ReturnGetExtendedDataRecordByDTCType returnCode = DEM_GET_SIZEOFEDRBYDTC_W_DTC;\r
EventStatusRecType *eventRec;\r
Dem_ExtendedDataRecordClassType const *extendedDataRecordClass = NULL;\r
- uint8 posInExtData;\r
+ uint16 posInExtData;\r
\r
if (demState == DEM_INITIALIZED) {\r
if (lookupDtcEvent(dtc, &eventRec)) {\r
#ifndef DEM_TYPES_H_\r
#define DEM_TYPES_H_\r
#include "Std_Types.h" /** @req DEM176.Std */\r
-\r
+#include "Rte_Dem.h"\r
#define DEM_EVENT_DESTINATION_END_OF_LIST 0\r
\r
/*\r
#define DEM_SAEJ1939_73 0x02\r
#define DEM_ISO_11992_4 0x03\r
\r
-/*\r
- * Dem_EventIdType\r
- */\r
-typedef uint16 Dem_EventIdType;\r
-\r
/*\r
* Dem_DTCGroupType\r
*/\r
typedef uint32 Dem_DTCGroupType;\r
-#define DEM_DTC_GROUP_ALL_DTCS 0xffffff\r
+#define DEM_DTC_GROUP_ALL_DTCS (Dem_DTCGroupType)0xffffff\r
\r
/*\r
* Dem status type\r
*/\r
-#define DEM_DTC_STATUS_MASK_ALL 0x00\r
+#define DEM_DTC_STATUS_MASK_ALL (uint8)0x00\r
\r
\r
-/*\r
- * DemDTCKindType\r
- */\r
-typedef uint8 Dem_DTCKindType;\r
-#define DEM_DTC_KIND_ALL_DTCS 0x01\r
-#define DEM_DTC_KIND_EMISSION_REL_DTCS 0x02\r
-\r
/*\r
* DemDTCOriginType\r
*/\r
typedef uint8 Dem_DTCOriginType;\r
-#define DEM_DTC_ORIGIN_SECONDARY_MEMORY 0x01\r
-#define DEM_DTC_ORIGIN_PRIMARY_MEMORY 0x02\r
-#define DEM_DTC_ORIGIN_PERMANENT_MEMORY 0x03\r
-#define DEM_DTC_ORIGIN_MIRROR_MEMORY 0x04\r
-\r
-/*\r
- * DemEventStatusExtendedType\r
- */\r
-typedef uint8 Dem_EventStatusExtendedType;\r
-#define DEM_TEST_FAILED 0x01\r
-#define DEM_TEST_FAILED_THIS_OPERATION_CYCLE 0x02\r
-#define DEM_PENDING_DTC 0x04\r
-#define DEM_CONFIRMED_DTC 0x08\r
-#define DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR 0x10\r
-#define DEM_TEST_FAILED_SINCE_LAST_CLEAR 0x20\r
-#define DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE 0x40\r
-#define DEM_WARNING_INDICATOR_REQUESTED 0x80\r
-\r
-/*\r
- * DemOperationCycleType\r
- */\r
-typedef uint8 Dem_OperationCycleIdType; // TODO: Check type and values\r
-enum {\r
- DEM_ACTIVE, // Started by DEM on Dem_PreInit and stopped on Dem_Shutdown\r
-\r
- DEM_POWER, // Power ON/OFF Cycle\r
- DEM_IGNITION, // Ignition ON/OF Cycle\r
- DEM_WARMUP, // OBD Warm up Cycle\r
- DEM_OBD_DCY, // OBD Driving Cycle\r
-\r
- DEM_OPERATION_CYCLE_ID_ENDMARK\r
-}; /** @req DEM142 */\r
-\r
-/*\r
- * Dem_OperationCycleStateType\r
- */\r
-typedef uint8 Dem_OperationCycleStateType;\r
-#define DEM_CYCLE_STATE_START 1\r
-#define DEM_CYCLE_STATE_END 2\r
+#define DEM_DTC_ORIGIN_SECONDARY_MEMORY (Dem_DTCOriginType)0x01\r
+#define DEM_DTC_ORIGIN_PRIMARY_MEMORY (Dem_DTCOriginType)0x02\r
+#define DEM_DTC_ORIGIN_PERMANENT_MEMORY (Dem_DTCOriginType)0x03\r
+#define DEM_DTC_ORIGIN_MIRROR_MEMORY (Dem_DTCOriginType)0x04\r
\r
/*\r
* Dem_FreezeFrameKindType\r
*/\r
typedef uint8 Dem_FreezeFrameKindType; // TODO: Check type and values\r
-#define DEM_FREEZE_FRAME_NON_OBD 0x01\r
-#define DEM_FREEZE_FRAME_OBD 0x02\r
+#define DEM_FREEZE_FRAME_NON_OBD (Dem_FreezeFrameKindType)0x01\r
+#define DEM_FREEZE_FRAME_OBD (Dem_FreezeFrameKindType)0x02\r
\r
/*\r
* Dem_EventKindType\r
*/\r
typedef uint8 Dem_EventKindType; // TODO: Check type and values\r
-#define DEM_EVENT_KIND_BSW 0x01\r
-#define DEM_EVENT_KIND_SWC 0x02\r
+#define DEM_EVENT_KIND_BSW (Dem_EventKindType)0x01\r
+#define DEM_EVENT_KIND_SWC (Dem_EventKindType)0x02\r
\r
/*\r
* Dem_EventStatusType\r
*/\r
typedef uint8 Dem_EventStatusType;\r
-#define DEM_EVENT_STATUS_PASSED 0\r
-#define DEM_EVENT_STATUS_FAILED 1\r
-#define DEM_EVENT_STATUS_PREPASSED 2\r
-#define DEM_EVENT_STATUS_PREFAILED 3\r
-\r
-/*\r
- * Dem_DTCType\r
- */\r
-typedef uint32 Dem_DTCType;\r
-\r
-/*\r
- * Dem_InitMonitorKindType\r
- */\r
-typedef uint8 Dem_InitMonitorKindType;\r
-#define DEM_INIT_MONITOR_CLEAR 1\r
-#define DEM_INIT_MONITOR_RESTART 2\r
-\r
-/*\r
- * Dem_IndicatorStatusType\r
- */\r
-typedef uint8 Dem_IndicatorStatusType;\r
-#define DEM_INDICATOR_OFF 0\r
-#define DEM_INDICATOR_CONTINUOUS 1\r
-#define DEM_INDICATOR_BLINKING 2\r
-#define DEM_INDICATOR_BLINK_CONT 3\r
-\r
-/*\r
- * Dem_FaultDetectionCpunterType\r
- */\r
-typedef sint8 Dem_FaultDetectionCounterType;\r
+#define DEM_EVENT_STATUS_PASSED (Dem_EventStatusType)0\r
+#define DEM_EVENT_STATUS_FAILED (Dem_EventStatusType)1\r
+#define DEM_EVENT_STATUS_PREPASSED (Dem_EventStatusType)2\r
+#define DEM_EVENT_STATUS_PREFAILED (Dem_EventStatusType)3\r
\r
/*\r
* Dem_PreDebounceNameType\r
* Dem_FilterWithSeverityType\r
*/\r
typedef uint8 Dem_FilterWithSeverityType;\r
-#define DEM_FILTER_WITH_SEVERITY_YES 0x00\r
-#define DEM_FILTER_WITH_SEVERITY_NO 0x01\r
+#define DEM_FILTER_WITH_SEVERITY_YES (Dem_FilterWithSeverityType)0x00\r
+#define DEM_FILTER_WITH_SEVERITY_NO (Dem_FilterWithSeverityType)0x01\r
\r
/*\r
* Dem_FilterForFDCType\r
*/\r
typedef uint8 Dem_FilterForFDCType;\r
-#define DEM_FILTER_FOR_FDC_YES 0x00\r
-#define DEM_FILTER_FOR_FDC_NO 0x01\r
+#define DEM_FILTER_FOR_FDC_YES (Dem_FilterForFDCType)0x00\r
+#define DEM_FILTER_FOR_FDC_NO (Dem_FilterForFDCType)0x01\r
\r
/*\r
* Dem_DTCSeverityType\r
*/\r
typedef uint8 Dem_DTCSeverityType;\r
-#define DEM_SEVERITY_NO_SEVERITY 0x00 // No severity information available\r
-#define DEM_SEVERITY_MAINTENANCE_ONLY 0x20\r
-#define DEM_SEVERITY_CHECK_AT_NEXT_FALT 0x40\r
-#define DEM_SEVERITY_CHECK_IMMEDIATELY 0x80\r
+#define DEM_SEVERITY_NO_SEVERITY (Dem_DTCSeverityType)0x00 // No severity information available\r
+#define DEM_SEVERITY_MAINTENANCE_ONLY (Dem_DTCSeverityType)0x20\r
+#define DEM_SEVERITY_CHECK_AT_NEXT_FALT (Dem_DTCSeverityType)0x40\r
+#define DEM_SEVERITY_CHECK_IMMEDIATELY (Dem_DTCSeverityType)0x80\r
\r
/*\r
* Dem_ReturnSetDTCFilterType\r
*/\r
typedef uint8 Dem_ReturnSetDTCFilterType;\r
-#define DEM_FILTER_ACCEPTED 0x00\r
-#define DEM_WRONG_FILTER 0x01\r
+#define DEM_FILTER_ACCEPTED (Dem_ReturnSetDTCFilterType)0x00\r
+#define DEM_WRONG_FILTER (Dem_ReturnSetDTCFilterType)0x01\r
\r
/*\r
* Dem_ReturnGetStatusOfDTCType\r
*/\r
typedef uint8 Dem_ReturnGetStatusOfDTCType;\r
-#define DEM_STATUS_OK 0x00\r
-#define DEM_STATUS_WRONG_DTC 0x01\r
-#define DEM_STATUS_WRONG_DTCORIGIN 0x02\r
-#define DEM_STATUS_FAILED 0x04\r
-#define DEM_STATUS_WRONG_DTCKIND 0x03\r
+#define DEM_STATUS_OK (Dem_ReturnGetStatusOfDTCType)0x00\r
+#define DEM_STATUS_WRONG_DTC (Dem_ReturnGetStatusOfDTCType)0x01\r
+#define DEM_STATUS_WRONG_DTCORIGIN (Dem_ReturnGetStatusOfDTCType)0x02\r
+#define DEM_STATUS_FAILED (Dem_ReturnGetStatusOfDTCType)0x04\r
+#define DEM_STATUS_WRONG_DTCKIND (Dem_ReturnGetStatusOfDTCType)0x03\r
\r
/*\r
* Dem_ReturnGetNextFilteredDTCType\r
*/\r
typedef uint8 Dem_ReturnGetNextFilteredDTCType;\r
-#define DEM_FILTERED_OK 0x00\r
-#define DEM_FILTERED_NO_MATCHING_DTC 0x01\r
-#define DEM_FILTERED_WRONG_DTCKIND 0x02\r
-#define DEM_FILTERED_PENDING 0x03\r
+#define DEM_FILTERED_OK (Dem_ReturnGetNextFilteredDTCType)0x00\r
+#define DEM_FILTERED_NO_MATCHING_DTC (Dem_ReturnGetNextFilteredDTCType)0x01\r
+#define DEM_FILTERED_WRONG_DTCKIND (Dem_ReturnGetNextFilteredDTCType)0x02\r
+#define DEM_FILTERED_PENDING (Dem_ReturnGetNextFilteredDTCType)0x03\r
\r
/*\r
* Dem_ReturnGetNumberOfFilteredDTCType\r
*/\r
typedef uint8 Dem_ReturnGetNumberOfFilteredDTCType;\r
-#define DEM_NUMBER_OK 0x00\r
-#define DEM_NUMBER_FAILED 0x01\r
-#define DEM_NUMBER_PENDING 0x02\r
+#define DEM_NUMBER_OK (Dem_ReturnGetNumberOfFilteredDTCType)0x00\r
+#define DEM_NUMBER_FAILED (Dem_ReturnGetNumberOfFilteredDTCType)0x01\r
+#define DEM_NUMBER_PENDING (Dem_ReturnGetNumberOfFilteredDTCType)0x02\r
\r
/*\r
* Dem_ReturnClearDTCType\r
*/\r
typedef uint8 Dem_ReturnClearDTCType;\r
-#define DEM_CLEAR_OK 0x00\r
-#define DEM_CLEAR_WRONG_DTC 0x01\r
-#define DEM_CLEAR_WRONG_DTCORIGIN 0x02\r
-#define DEM_CLEAR_WRONG_DTCKIND 0x03\r
-#define DEM_CLEAR_FAILED 0x04\r
-#define DEM_DTC_PENDING 0x05\r
+#define DEM_CLEAR_OK (Dem_ReturnClearDTCType)0x00\r
+#define DEM_CLEAR_WRONG_DTC (Dem_ReturnClearDTCType)0x01\r
+#define DEM_CLEAR_WRONG_DTCORIGIN (Dem_ReturnClearDTCType)0x02\r
+#define DEM_CLEAR_WRONG_DTCKIND (Dem_ReturnClearDTCType)0x03\r
+#define DEM_CLEAR_FAILED (Dem_ReturnClearDTCType)0x04\r
+#define DEM_DTC_PENDING (Dem_ReturnClearDTCType)0x05\r
\r
/*\r
* Dem_ReturnControlDTCStorageType\r
*/\r
typedef uint8 Dem_ReturnControlDTCStorageType;\r
-#define DEM_CONTROL_DTC_STORAGE_OK 0x00\r
-#define DEM_CONTROL_DTC_STORAGE_N_OK 0x01\r
-#define DEM_CONTROL_DTC_WRONG_DTCGROUP 0x02\r
+#define DEM_CONTROL_DTC_STORAGE_OK (Dem_ReturnControlDTCStorageType)0x00\r
+#define DEM_CONTROL_DTC_STORAGE_N_OK (Dem_ReturnControlDTCStorageType)0x01\r
+#define DEM_CONTROL_DTC_WRONG_DTCGROUP (Dem_ReturnControlDTCStorageType)0x02\r
\r
/*\r
* Dem_ReturnControlEventUpdateType\r
*/\r
typedef uint8 Dem_ReturnControlEventUpdateType;\r
-#define DEM_CONTROL_EVENT_UPDATE_OK 0x00\r
-#define DEM_CONTROL_EVENT_N_OK 0x01\r
-#define DEM_CONTROL_EVENT_WRONG_DTCGROUP 0x02\r
+#define DEM_CONTROL_EVENT_UPDATE_OK (Dem_ReturnControlEventUpdateType)0x00\r
+#define DEM_CONTROL_EVENT_N_OK (Dem_ReturnControlEventUpdateType)0x01\r
+#define DEM_CONTROL_EVENT_WRONG_DTCGROUP (Dem_ReturnControlEventUpdateType)0x02\r
\r
/*\r
* Dem_ReturnGetDTCOfFreezeframeRecordType\r
*/\r
typedef uint8 Dem_ReturnGetDTCOfFreezeframeRecordType;\r
-#define DEM_GET_DTCOFFF_OK 0x00\r
-#define DEM_GET_DTCOFFF_WRONG_RECORD 0x01\r
-#define DEM_GET_DTCOFFF_NO_DTC_FOR_RECORD 0x02\r
-#define DEM_GET_DTCOFFF_WRONG_DTCKIND 0x03\r
+#define DEM_GET_DTCOFFF_OK (Dem_ReturnGetDTCOfFreezeframeRecordType)0x00\r
+#define DEM_GET_DTCOFFF_WRONG_RECORD (Dem_ReturnGetDTCOfFreezeframeRecordType)0x01\r
+#define DEM_GET_DTCOFFF_NO_DTC_FOR_RECORD (Dem_ReturnGetDTCOfFreezeframeRecordType)0x02\r
+#define DEM_GET_DTCOFFF_WRONG_DTCKIND (Dem_ReturnGetDTCOfFreezeframeRecordType)0x03\r
\r
/*\r
* Dem_GetFreezeFameDataIdentifierByDTCType\r
*/\r
typedef uint8 Dem_GetFreezeFameDataIdentifierByDTCType;\r
-#define DEM_GET_ID_OK 0x00\r
-#define DEM_GET_ID_WRONG_DTC 0x01\r
-#define DEM_GET_ID_WRONG_DTCORIGIN 0x02\r
-#define DEM_GET_ID_WRONG_DTCKIND 0x03\r
-#define DEM_GET_ID_WRONG_FF_TYPE 0x04\r
+#define DEM_GET_ID_OK (Dem_GetFreezeFameDataIdentifierByDTCType)0x00\r
+#define DEM_GET_ID_WRONG_DTC (Dem_GetFreezeFameDataIdentifierByDTCType)0x01\r
+#define DEM_GET_ID_WRONG_DTCORIGIN (Dem_GetFreezeFameDataIdentifierByDTCType)0x02\r
+#define DEM_GET_ID_WRONG_DTCKIND (Dem_GetFreezeFameDataIdentifierByDTCType)0x03\r
+#define DEM_GET_ID_WRONG_FF_TYPE (Dem_GetFreezeFameDataIdentifierByDTCType)0x04\r
\r
/*\r
* Dem_ReturnGetExtendedDataRecordByDTCType\r
*/\r
typedef uint8 Dem_ReturnGetExtendedDataRecordByDTCType;\r
-#define DEM_RECORD_OK 0x00\r
-#define DEM_RECORD_WRONG_DTC 0x01\r
-#define DEM_RECORD_WRONG_DTCORIGIN 0x02\r
-#define DEM_RECORD_DTCKIND 0x03\r
-#define DEM_RECORD_NUMBER 0x04\r
-#define DEM_RECORD_BUFFERSIZE 0x05\r
-#define DEM_RECORD_PENDING 0x06\r
+#define DEM_RECORD_OK (Dem_ReturnGetExtendedDataRecordByDTCType)0x00\r
+#define DEM_RECORD_WRONG_DTC (Dem_ReturnGetExtendedDataRecordByDTCType)0x01\r
+#define DEM_RECORD_WRONG_DTCORIGIN (Dem_ReturnGetExtendedDataRecordByDTCType)0x02\r
+#define DEM_RECORD_DTCKIND (Dem_ReturnGetExtendedDataRecordByDTCType)0x03\r
+#define DEM_RECORD_NUMBER (Dem_ReturnGetExtendedDataRecordByDTCType)0x04\r
+#define DEM_RECORD_BUFFERSIZE (Dem_ReturnGetExtendedDataRecordByDTCType)0x05\r
+#define DEM_RECORD_PENDING (Dem_ReturnGetExtendedDataRecordByDTCType)0x06\r
\r
/*\r
* Dem_ReturnGetDTCByOccurenceTimeType\r
*/\r
typedef uint8 Dem_ReturnGetDTCByOccurenceTimeType;\r
-#define DEM_OCCURR_OK 0x00\r
-#define DEM_OCCURR_WRONG_DTCKIND 0x01\r
-#define DEM_OCCURR_FAILED 0x02\r
+#define DEM_OCCURR_OK (Dem_ReturnGetDTCByOccurenceTimeType)0x00\r
+#define DEM_OCCURR_WRONG_DTCKIND (Dem_ReturnGetDTCByOccurenceTimeType)0x01\r
+#define DEM_OCCURR_FAILED (Dem_ReturnGetDTCByOccurenceTimeType)0x02\r
\r
/*\r
* Dem_ReturnGetFreezeFrameDataByDTCType\r
*/\r
typedef uint8 Dem_ReturnGetFreezeFrameDataByDTCType;\r
-#define DEM_GET_FFDATABYDTC_OK 0x00\r
-#define DEM_GET_FFDATABYDTC_WRONG_DTC 0x01\r
-#define DEM_GET_FFDATABYDTC_WRONG_DTCORIGIN 0x02\r
-#define DEM_GET_FFDATABYDTC_WRONG_DTCKIND 0x03\r
-#define DEM_GET_FFDATABYDTC_RECORDNUMBER 0x04\r
-#define DEM_GET_FFDATABYDTC_WRONG_DATAID 0x05\r
-#define DEM_GET_FFDATABYDTC_BUFFERSIZE 0x06\r
-#define DEM_GET_ID_PENDING 0x07\r
+#define DEM_GET_FFDATABYDTC_OK (Dem_ReturnGetFreezeFrameDataByDTCType)0x00\r
+#define DEM_GET_FFDATABYDTC_WRONG_DTC (Dem_ReturnGetFreezeFrameDataByDTCType)0x01\r
+#define DEM_GET_FFDATABYDTC_WRONG_DTCORIGIN (Dem_ReturnGetFreezeFrameDataByDTCType)0x02\r
+#define DEM_GET_FFDATABYDTC_WRONG_DTCKIND (Dem_ReturnGetFreezeFrameDataByDTCType)0x03\r
+#define DEM_GET_FFDATABYDTC_RECORDNUMBER (Dem_ReturnGetFreezeFrameDataByDTCType)0x04\r
+#define DEM_GET_FFDATABYDTC_WRONG_DATAID (Dem_ReturnGetFreezeFrameDataByDTCType)0x05\r
+#define DEM_GET_FFDATABYDTC_BUFFERSIZE (Dem_ReturnGetFreezeFrameDataByDTCType)0x06\r
+#define DEM_GET_ID_PENDING (Dem_ReturnGetFreezeFrameDataByDTCType)0x07\r
\r
/*\r
* Dem_ReturnGetSizeOfExtendedDataRecordByDTCType\r
*/\r
typedef uint8 Dem_ReturnGetSizeOfExtendedDataRecordByDTCType;\r
-#define DEM_GET_SIZEOFEDRBYDTC_OK 0x00\r
-#define DEM_GET_SIZEOFEDRBYDTC_W_DTC 0x01\r
-#define DEM_GET_SIZEOFEDRBYDTC_W_DTCOR 0x02\r
-#define DEM_GET_SIZEOFEDRBYDTC_W_DTCKI 0x03\r
-#define DEM_GET_SIZEOFEDRBYDTC_W_RNUM 0x04\r
-#define DEM_GET_SIZEOFEDRBYDTC_PENDING 0x05\r
+#define DEM_GET_SIZEOFEDRBYDTC_OK (Dem_ReturnGetSizeOfExtendedDataRecordByDTCType)0x00\r
+#define DEM_GET_SIZEOFEDRBYDTC_W_DTC (Dem_ReturnGetSizeOfExtendedDataRecordByDTCType)0x01\r
+#define DEM_GET_SIZEOFEDRBYDTC_W_DTCOR (Dem_ReturnGetSizeOfExtendedDataRecordByDTCType)0x02\r
+#define DEM_GET_SIZEOFEDRBYDTC_W_DTCKI (Dem_ReturnGetSizeOfExtendedDataRecordByDTCType)0x03\r
+#define DEM_GET_SIZEOFEDRBYDTC_W_RNUM (Dem_ReturnGetSizeOfExtendedDataRecordByDTCType)0x04\r
+#define DEM_GET_SIZEOFEDRBYDTC_PENDING (Dem_ReturnGetSizeOfExtendedDataRecordByDTCType)0x05\r
\r
/*\r
* Dem_ReturnGetSizeOfFreezeFrameType\r
*/\r
typedef uint8 Dem_ReturnGetSizeOfFreezeFrameType;\r
-#define DEM_GET_SIZEOFFF_OK 0x00\r
-#define DEM_GET_SIZEOFFF_WRONG_DTC 0x01\r
-#define DEM_GET_SIZEOFFF_WRONG_DTCOR 0x02\r
-#define DEM_GET_SIZEOFFF_WRONG_DTCKIND 0x03\r
-#define DEM_GET_SIZEOFFF_WRONG_RNUM 0x04\r
-#define DEM_GET_SIZEOFFF_PENDING 0x05\r
+#define DEM_GET_SIZEOFFF_OK (Dem_ReturnGetSizeOfFreezeFrameType)0x00\r
+#define DEM_GET_SIZEOFFF_WRONG_DTC (Dem_ReturnGetSizeOfFreezeFrameType)0x01\r
+#define DEM_GET_SIZEOFFF_WRONG_DTCOR (Dem_ReturnGetSizeOfFreezeFrameType)0x02\r
+#define DEM_GET_SIZEOFFF_WRONG_DTCKIND (Dem_ReturnGetSizeOfFreezeFrameType)0x03\r
+#define DEM_GET_SIZEOFFF_WRONG_RNUM (Dem_ReturnGetSizeOfFreezeFrameType)0x04\r
+#define DEM_GET_SIZEOFFF_PENDING (Dem_ReturnGetSizeOfFreezeFrameType)0x05\r
\r
/*\r
* Dem_ReturnGetSeverityOfDTCType\r
*/\r
typedef uint8 Dem_ReturnGetSeverityOfDTCType;\r
-#define DEM_GET_SEVERITYOFDTC_OK 0x00\r
-#define DEM_GET_SEVERITYOFDTC_WRONG_DTC 0x01\r
-#define DEM_GET_SEVERITYOFDTC_WRONG_ORIGIN 0x02\r
-#define DEM_GET_SEVERITYOFDTC_NOSEVERITY 0x03\r
+#define DEM_GET_SEVERITYOFDTC_OK (Dem_ReturnGetSeverityOfDTCType)0x00\r
+#define DEM_GET_SEVERITYOFDTC_WRONG_DTC (Dem_ReturnGetSeverityOfDTCType)0x01\r
+#define DEM_GET_SEVERITYOFDTC_WRONG_ORIGIN (Dem_ReturnGetSeverityOfDTCType)0x02\r
+#define DEM_GET_SEVERITYOFDTC_NOSEVERITY (Dem_ReturnGetSeverityOfDTCType)0x03\r
+\r
+\r
+/*******************************************************\r
+ * Definitions where the type is declared in Rte_Dem.h *
+ *******************************************************/\r
+/*\r
+ * DemEventStatusExtendedType definitions\r
+ */\r
+#define DEM_TEST_FAILED (Dem_EventStatusExtendedType)0x01\r
+#define DEM_TEST_FAILED_THIS_OPERATION_CYCLE (Dem_EventStatusExtendedType)0x02\r
+#define DEM_PENDING_DTC (Dem_EventStatusExtendedType)0x04\r
+#define DEM_CONFIRMED_DTC (Dem_EventStatusExtendedType)0x08\r
+#define DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR (Dem_EventStatusExtendedType)0x10\r
+#define DEM_TEST_FAILED_SINCE_LAST_CLEAR (Dem_EventStatusExtendedType)0x20\r
+#define DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE (Dem_EventStatusExtendedType)0x40\r
+#define DEM_WARNING_INDICATOR_REQUESTED (Dem_EventStatusExtendedType)0x80\r
+\r
+/*\r
+ * DemDTCKindType definitions\r
+ */\r
+#define DEM_DTC_KIND_ALL_DTCS (Dem_DTCKindType)0x01\r
+#define DEM_DTC_KIND_EMISSION_REL_DTCS (Dem_DTCKindType)0x02\r
+\r
+/*\r
+ * Dem_InitMonitorKindType definitions\r
+ */\r
+#define DEM_INIT_MONITOR_CLEAR (Dem_InitMonitorKindType)1\r
+#define DEM_INIT_MONITOR_RESTART (Dem_InitMonitorKindType)2\r
+\r
+\r
+/*\r
+ * Dem_IndicatorStatusType definitions\r
+ */\r
+#define DEM_INDICATOR_OFF (Dem_IndicatorStatusType)0\r
+#define DEM_INDICATOR_CONTINUOUS (Dem_IndicatorStatusType)1\r
+#define DEM_INDICATOR_BLINKING (Dem_IndicatorStatusType)2\r
+#define DEM_INDICATOR_BLINK_CONT (Dem_IndicatorStatusType)3\r
+\r
+/*\r
+ * DemOperationCycleType definitions\r
+ */\r
+enum {\r
+ DEM_ACTIVE, // Started by DEM on Dem_PreInit and stopped on Dem_Shutdown\r
+\r
+ DEM_POWER, // Power ON/OFF Cycle\r
+ DEM_IGNITION, // Ignition ON/OF Cycle\r
+ DEM_WARMUP, // OBD Warm up Cycle\r
+ DEM_OBD_DCY, // OBD Driving Cycle\r
+\r
+ DEM_OPERATION_CYCLE_ID_ENDMARK\r
+}; /** @req DEM142 */\r
+\r
+/*\r
+ * Dem_OperationCycleStateType definitions\r
+ */\r
+#define DEM_CYCLE_STATE_START (Dem_OperationCycleStateType)1\r
+#define DEM_CYCLE_STATE_END (Dem_OperationCycleStateType)2\r
\r
\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#include "WdgM_Cfg.h"\r
-\r
-Std_ReturnType WdgM_UpdateAliveCounter (WdgM_SupervisedEntityIdType SEid);\r
-Std_ReturnType WdgM_ActivateAliveSupervision (WdgM_SupervisedEntityIdType SEid);\r
-Std_ReturnType WdgM_DeactivateAliveSupervision (WdgM_SupervisedEntityIdType SEid);\r
-void WdgM_Init(const WdgM_ConfigType* ConfigPtr);\r
-void WdgM_MainFunction_AliveSupervision (void);\r
-void WdgM_MainFunction_Trigger (void);\r
+#ifndef RTE_DEM_H_\r
+#define RTE_DEM_H_\r
+\r
+typedef uint8 Dem_DTCKindType;\r
+typedef uint32 Dem_DTCType;\r
+typedef uint16 Dem_EventIdType;\r
+typedef uint8 Dem_EventStatusExtendedType;\r
+typedef sint8 Dem_FaultDetectionCounterType;\r
+typedef uint8 Dem_IndicatorStatusType;\r
+typedef uint8 Dem_InitMonitorKindType;\r
+typedef uint8 Dem_OperationCycleIdType;\r
+typedef uint8 Dem_OperationCycleStateType;\r
+\r
+#endif /* RTE_DEM_H_ */\r
*\r
*/\r
\r
+/*\r
+ * General requirements\r
+ */\r
+/** @req DET001 */\r
+/** @req DET002 */\r
+\r
+\r
#include "Std_Types.h"\r
#include "Det.h"\r
#include "Cpu.h"\r
+#include "MemMap.h" /** @req DET006 */\r
\r
#define DEBUG_LVL 1\r
#include "debug.h"\r
DET_STARTED\r
} Det_StateType;\r
\r
-static Det_StateType _detState = DET_UNINITIALIZED;\r
+static Det_StateType detState = DET_UNINITIALIZED;\r
\r
#if ( DET_USE_RAMLOG == STD_ON )\r
+\r
// Ram log variables in uninitialized memory\r
-uint32 Det_RamlogIndex __attribute__ ((section (".ramlog")));\r
-Det_EntryType Det_RamLog[DET_RAMLOG_SIZE] __attribute__ ((section (".ramlog")));\r
+SECTION_RAMLOG uint32 Det_RamlogIndex;\r
+/*lint -esym(552,Det_RamLog)*/ /* PC-Lint OK. supress lintwarning about Det_Ramlog not being accessed */\r
+SECTION_RAMLOG Det_EntryType Det_RamLog[DET_RAMLOG_SIZE] ;\r
#endif\r
\r
#if ( DET_ENABLE_CALLBACKS == STD_ON )\r
\r
uint8 Det_AddCbk(detCbk_t detCbk)\r
{\r
- if (_detState != DET_UNINITIALIZED)\r
+ uint8 rv = DET_CBK_REGISTRATION_FAILED_INDEX; // Return DET_CBK_REGISTRATION_FAILED_INDEX if the registration fails\r
+\r
+ if (detState != DET_UNINITIALIZED)\r
{\r
- for (uint32 i=0; i<DET_NUMBER_OF_CALLBACKS; i++)\r
+ for (uint8 i = 0; i < DET_NUMBER_OF_CALLBACKS; i++)\r
{\r
- if (NULL==detCbk_List[i])\r
+ if (NULL == detCbk_List[i])\r
{\r
- detCbk_List[i]=detCbk;\r
- return i;\r
+ detCbk_List[i] = detCbk;\r
+ rv = i;\r
+ break;\r
}\r
}\r
}\r
\r
- Det_ReportError(DET_MODULE_ID, 0, DET_CALLBACK_API, DET_E_CBK_REGISTRATION_FAILED);\r
- return (0xFF); // Return 0xff to indicate that the registration failed\r
+ if (rv == DET_CBK_REGISTRATION_FAILED_INDEX)\r
+ {\r
+ Det_ReportError(DET_MODULE_ID, 0, DET_CALLBACK_API, DET_E_CBK_REGISTRATION_FAILED);\r
+ }\r
+\r
+ return rv;\r
}\r
\r
+\r
void Det_RemoveCbk(uint8 detCbkIndex)\r
{\r
// Validate the index\r
if (detCbkIndex >= DET_NUMBER_OF_CALLBACKS)\r
+ {\r
Det_ReportError(DET_MODULE_ID, 0, DET_CALLBACK_API, DET_E_INDEX_OUT_OF_RANGE);\r
-\r
- detCbk_List[detCbkIndex]=NULL;\r
+ }\r
+ else\r
+ {\r
+ detCbk_List[detCbkIndex]=NULL;\r
+ }\r
}\r
#endif\r
\r
\r
void Det_Init(void)\r
{\r
- // Implements DET000\r
+\r
#if ( DET_ENABLE_CALLBACKS == STD_ON )\r
for (uint32 i=0; i<DET_NUMBER_OF_CALLBACKS; i++)\r
{\r
}\r
#endif\r
\r
- // Implements DET000\r
+ /** @req DET000 */\r
#if ( DET_USE_RAMLOG == STD_ON )\r
for(uint32 i=0; i < DET_RAMLOG_SIZE; i++)\r
{\r
Det_RamlogIndex = 0;\r
#endif\r
\r
- _detState = DET_INITIALIZED;\r
+ detState = DET_INITIALIZED;\r
}\r
\r
#if DET_DEINIT_API == STD_ON\r
void Det_DeInit( void )\r
{\r
- _detState = DET_UNINITIALIZED;\r
+ detState = DET_UNINITIALIZED;\r
}\r
#endif\r
\r
void Det_ReportError(uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId)\r
{\r
- if (_detState == DET_STARTED) // No action is taken if the module is not started\r
+ if (detState == DET_STARTED) // No action is taken if the module is not started\r
{\r
#if ( DET_ENABLE_CALLBACKS == STD_ON )\r
- long old1;\r
+ uint32 old1; // 586 PC-Lint OK: fattar inte att den används i macrot.\r
Irq_Save(old1);\r
+\r
for (uint32 i=0; i<DET_NUMBER_OF_CALLBACKS; i++)\r
{\r
if (NULL!=detCbk_List[i])\r
Irq_Restore(old1);\r
#endif\r
\r
+\r
#if ( DET_USE_RAMLOG == STD_ON )\r
- long old2;\r
+ uint32 old2;\r
Irq_Save(old2);\r
if (Det_RamlogIndex < DET_RAMLOG_SIZE)\r
{\r
Det_RamLog[Det_RamlogIndex].errorId = ErrorId;\r
Det_RamlogIndex++;\r
#if ( DET_WRAP_RAMLOG == STD_ON )\r
- if (Det_RamlogIndex == DET_RAMLOG_SIZE)\r
+ if (Det_RamlogIndex == DET_RAMLOG_SIZE){\r
Det_RamlogIndex = 0;\r
+ }\r
#endif\r
}\r
Irq_Restore(old2);\r
\r
void Det_Start(void)\r
{\r
- _detState = DET_STARTED;\r
+ detState = DET_STARTED;\r
}\r
#include "Mcu.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#define USE_TRACE 1\r
-#include "debug.h"\r
-\r
-\r
-#if 0\r
-#ifdef USE_STARTUPHOOK\r
-#ifdef CFG_MPC55XX\r
-#if !defined(USE_SIMULATOR)\r
-// Quick fix\r
-//#include "kernel_offset.h"\r
\r
-extern uint8_t pcb_list[];\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
\r
-#endif\r
-#endif\r
-#endif\r
-#endif\r
\r
\r
\r
void StartupHook( void ) {\r
LDEBUG_PRINTF("## StartupHook\n");\r
\r
-// uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
}\r
// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL\r
\r
#elif defined(CFG_BRD_STM32_STM3210C)\r
-#define LED_CHANNEL LED_CHANNEL1\r
+#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL4\r
\r
#elif defined(CFG_BRD_STM32_MCBSTM32)\r
-#define LED_CHANNEL LED_CHANNEL1\r
+#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL1\r
\r
#else\r
#warning "Unknown board or CFG_BRD_* undefined"\r
\r
#include "EcuM.h"\r
#include "blinker_main.h"\r
+\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_arm_stm32_f103</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="69a3e35e-1874-432a-94f0-b3c74c805be3">\r
+ <SHORT-NAME>blinker_node_arm_stm32_f103</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F103</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_stm32_f103/SwComposition_blinker_node_arm_stm32_f103</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/EcuM</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_stm32_f103/Dio</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="ed185637-4f36-4989-8584-9aade6ae3578">\r
+ <SHORT-NAME>SwComposition_blinker_node_arm_stm32_f103</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="8f496cdc-208c-4918-a887-88c86b069602">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.11</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="b55a25dd-282a-4102-bbb9-eaefcd782dad">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="62701b7c-02ab-4bd2-b5df-cf959638d61b">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b37874ef-0d10-4fdf-beee-b9470e0e7751">\r
+ <SHORT-NAME>alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="7f57c907-292e-4b2b-8d2d-0eb706bea759">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e84dd780-f9e1-4915-878c-6ea573729f55">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="40d56a04-b12e-4f25-ab64-97f7554de5b4">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b2cb6a6b-de7c-49d1-b7e6-b7f32b0bc17d">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="1cf5902c-ac5d-481d-8ccd-e478b17c3600">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bc300672-c9c6-4205-9a6b-75644c209d9f">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e3670d78-76a0-44ad-b866-5525102487b3">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="66861439-4bab-4028-84f6-6aa0e0a14801">\r
+ <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b2267099-a58d-4cf4-bbd2-8cecb183ffff">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="a99bc5f6-9f52-426f-9074-dac15640d987">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="1fc9bdf6-e4e3-409c-b2ee-e752afe3ae3c">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="c2206df0-859a-40cf-961b-cbf0bcb9afc4">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="9bbdadc7-5326-4e47-bbfa-1f719ea7dab3">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7d908051-b111-4abe-b843-ad5d86729cc0">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="65b01764-a1c8-46bf-b49b-6e191f048f7b">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>DMA1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>CAN1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>ADC1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOA</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOB</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>AFIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_stm32_f103/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_8MHZ</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="592199d2-9908-4ab1-851e-adc0ac39ffff">\r
+ <SHORT-NAME>EXT_REF_8MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>8000000.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>9</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="be21cf3d-04ca-4ed7-b915-78c9283f76f6">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="3ad3c9fc-393d-4e03-a72b-d1e495de9a03">\r
+ <SHORT-NAME>Det</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Det</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="68b36355-7a5c-46df-b90d-d90a9fa6736c">\r
+ <SHORT-NAME>DetGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Det/DetGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetEnableCallbacks</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="ad852475-2ec5-4387-81af-5e4359917e93">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="879e39e2-1aa6-46b4-ad3f-eecb914418ff">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="941d2f53-211b-4632-8330-ff852241d7b4">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="844e035f-1dfa-4d9f-8c62-acc0776e6404">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="80ead9b7-27be-44e2-bc05-934fb847390a">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6d709b59-04d0-44df-a3e7-65da753b1974">\r
+ <SHORT-NAME>PortContainer_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="1233fe37-e919-4b9a-9c10-89bdbcaeca81">\r
+ <SHORT-NAME>B13</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>29</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5a8b80b4-e1db-4e70-8f33-50c1fffa61dd">\r
+ <SHORT-NAME>B14</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>30</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f25b824a-e61e-4f91-ac6a-9dc8379dc97e">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE>Remap1_CAN1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE>PartialRemap2_TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="98039516-0a14-4137-946a-1a1797bbc961">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="42abff38-b3e4-488c-a50d-c27e7710d8e0">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="2b6f247f-98ce-4501-b07f-f3b5374a003a">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>B</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9c7caeea-c077-409b-b7be-f18b3d949cd0">\r
+ <SHORT-NAME>LED_CHANNEL1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>29</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="469ceef0-ab55-4ec9-8884-bd9a6faf333d">\r
+ <SHORT-NAME>LED_CHANNEL2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>30</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="7cf102d9-f929-4b4a-97b6-4ef11256183a">\r
+ <SHORT-NAME>blinker_node_arm_cm3_107</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F107</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_cm3/SwComposition_blinker_node_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Dio</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/EcuM</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="bf0ee133-5ed1-418a-b260-47e171242afc">\r
+ <SHORT-NAME>SwComposition_blinker_node_arm_cm3</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="4fe46a12-0672-428f-99e3-c4ca6570a776">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="80853be9-55dc-435f-95ed-9a1c90750299">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="7f1dfe11-aeff-4131-89a9-2fbe9a87f01f">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="77224460-9071-4c32-9ba5-5ee19d0a5be2">\r
+ <SHORT-NAME>alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="28398b0a-02ef-4aa0-9f06-90c0683ad934">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b4e4c707-af7c-4d9f-a156-1507283b4ebe">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="44a8dc3f-2e97-4bb7-8139-57852146269a">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f9e78da1-ee81-40a0-940b-3e04d9e9034c">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="157c6a3d-f8ad-4493-9d76-a8f9411066aa">\r
+ <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ace8439e-ddb7-4bd7-b9e5-643a759f3e55">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="40214336-c4be-4506-8ccc-75ff014f39fe">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="08cf618f-ebe2-483c-8ba5-fde04f3c6160">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="8a235c19-4b95-4bf1-a309-f15916dd2d8d">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0f791241-110b-4cac-9e54-b41ad56c7f05">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="3eb17f20-d68e-4d62-87e3-6775933e93a2">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="41ed7b6e-ff53-4509-a2d1-943d8261e36d">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="5142b895-319c-4954-9e68-c65926b1bde9">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bcdf538c-c632-43f4-b5cd-044bae94bb81">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>D</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="749d0ffd-c994-41a1-b4c7-80400cde05ca">\r
+ <SHORT-NAME>LED_CHANNEL1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>55</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="44f582a3-7fd9-4d79-b41a-08ab68858e7e">\r
+ <SHORT-NAME>LED_CHANNEL2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>61</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="3e6df5d3-a0f1-4e27-8562-36d2c6d01795">\r
+ <SHORT-NAME>LED_CHANNEL3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>51</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7cbdc7b8-c938-4e5b-a84f-e4c4f1f2d705">\r
+ <SHORT-NAME>LED_CHANNEL4</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="c4495147-c1ed-4a19-b1e3-ab23d11e7bcf">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="2ba230a3-f785-4514-a224-7269f37bd048">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="2d1aee91-6d16-4a68-a045-4b35ad52966e">\r
+ <SHORT-NAME>PortContainer_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="be66b280-6ace-4b1f-b8a3-a923d64569b5">\r
+ <SHORT-NAME>D3_LED3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>51</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="eb64422e-85c5-4fec-964d-5916a807f1fe">\r
+ <SHORT-NAME>D4_LED4</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a99a1b7e-6ffa-474b-91d6-1324e60d8c7f">\r
+ <SHORT-NAME>D7_LED1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>55</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c430af31-68b9-4780-8dc2-d9f09edde143">\r
+ <SHORT-NAME>D13_LED2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_10MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>61</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0ffde529-3c0f-49eb-88af-da644cb60e3e">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="e0b9bc68-bd05-4ae1-9ae1-7a46fc6a3f86">\r
+ <SHORT-NAME>Det</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Det</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="42d6bd8a-d355-4e0c-be5b-02cfb3a0e8e0">\r
+ <SHORT-NAME>DetGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Det/DetGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetEnableCallbacks</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="456a6a95-5836-473d-95e1-599a735500a0">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="b45ffd68-b2b9-4874-9de0-5f1faae58415">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a43b4ed4-eed7-4a21-885f-b5ba25372099">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="5b150cab-d2e9-426f-b365-9ae189671851">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>DMA1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>ETH_MAC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>ETH_MAC_Tx</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAHBClocksEnable</DEFINITION-REF>\r
+ <VALUE>ETH_MAC_Rx</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>CAN1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>ADC1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOA</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOB</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOD</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>AFIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_25MHZ</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="08023f7f-13d4-4ccf-902a-d0e86ccc4443">\r
+ <SHORT-NAME>EXT_REF_25MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>2.5E7</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>9</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>8</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="179c0741-fc9d-403a-a18f-b1c76a5374f7">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="597f7367-2870-4d20-8912-217d97d63aaa">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="32e03636-768e-40a9-9de6-e94ef943afdc">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bf51604d-cca9-49b6-90da-535a5b1b5ff4">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_mpc5516</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="fafd2115-4e79-4839-9b0e-02ee81d3ce31">\r
+ <SHORT-NAME>blinker_node_mpc5516</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC551x</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_mpc5516/SwComposition_blinker_node_mpc5516</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/Dio</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5516/EcuM</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="84813c46-449a-4458-b10e-ff0fd142f7e6">\r
+ <SHORT-NAME>SwComposition_blinker_node_mpc5516</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="20701c30-27ef-4b41-af75-c192b6351cce">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.11</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="7dd96d0a-3e66-4dce-b470-1be14ff71e57">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="10d0dd34-3ee5-42b4-ac69-0a7fd2d57c8d">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d5c6e0df-a323-4975-9539-52c09d7a91c5">\r
+ <SHORT-NAME>alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="2faae0a2-fe70-4602-8d51-4d4a7d454529">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="1490b225-8c9d-47bb-8509-d09127b8567f">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="970835b3-5d1f-4df0-858d-21036a4d1ddf">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="eb99f6d7-c181-4c96-a3ce-d755118ae299">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="557770ac-c3e5-4072-836d-26955aacff57">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c22763c4-e863-4f46-b0b7-c10ad3b28ef1">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bc61edc4-d1aa-4678-9d82-f53d44bd0dc8">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4e1907a3-ce6c-488f-89c8-3aadceb00c45">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="db82468e-07db-496d-8a7f-cb9dcf5d0816">\r
+ <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f65bdf58-36db-4990-9487-a8feafefffc6">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="4e41bd9d-0c4e-4192-b627-a8bb28a3a6be">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="2e154d7d-f497-4314-ba43-4493bf64aa0d">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="0edd9d00-1f4a-4ea5-a22a-c45cdbcf6e13">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="84e20040-0673-47e6-93b8-2408cc64eb97">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="19d66b5b-4d9b-4cdf-a08e-2d24bf390a33">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5516/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_80MHZ</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="8c6f2066-f999-492f-8599-71a0d3aab0de">\r
+ <SHORT-NAME>EXT_REF_80MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>8000000.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>104</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8a989167-768f-47cd-86c8-ce9619b47d85">\r
+ <SHORT-NAME>EXT_REF_66MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>1.6E7</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>83</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="734a50e2-70db-4cf9-856c-afd74514d902">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="99dd2932-f344-424c-88cb-0b0e6e005662">\r
+ <SHORT-NAME>Det</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Det</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="7d8226d8-a4c9-4d6d-85b5-833eb68ad0e8">\r
+ <SHORT-NAME>DetGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Det/DetGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetEnableCallbacks</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="36b47e2e-64a8-4e14-89f9-eca2a49722c2">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="60a1cceb-9bde-468c-8a66-a5590fbbc647">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="d745e13a-91e8-424c-8038-0a1e3bec9f84">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="2a51b050-1fc1-41c7-8c1c-5c6d3933bf6c">\r
+ <SHORT-NAME>PD[4]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_DIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c3d466db-9737-425a-a299-a7c781b4b172">\r
+ <SHORT-NAME>PD[5]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>53</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_DIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8d698577-d736-4761-a645-99c113994342">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="bae978ad-fefb-42c3-95aa-c63822629f46">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="ada3bc9a-8e9f-4ca9-96f7-885424b3b2e8">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7ac5acc6-3fab-41f5-93b1-0852b893b5c2">\r
+ <SHORT-NAME>LED_PORT</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>DIO_PORT_D</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="aa03e900-b874-439e-89fe-ec0acdc9fb77">\r
+ <SHORT-NAME>LEDS_LED4</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>52</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d31260a8-ad8e-4af9-82b4-225107392aca">\r
+ <SHORT-NAME>LEDS_LED5</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>53</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="198876eb-33cf-4cbf-a37c-06d8a9670fe9">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="576fbc52-a01f-44d3-9519-8e4116800610">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="fa5bd3d6-0951-43a5-8529-7140d9689037">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_mpc5567</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="f2333a5b-cda0-4ee4-8f4f-113e8e15a04c">\r
+ <SHORT-NAME>blinker_node_mpc5567</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC5567</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_mpc5567/SwComposition_blinker_node_mpc5567</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/EcuM</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Mcu</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_mpc5567/Dio</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="2344f354-89d5-4ed5-bdc4-328cf0ee0c6b">\r
+ <SHORT-NAME>SwComposition_blinker_node_mpc5567</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="45cc3b0a-a0c2-4368-8950-4fd43999d34d">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="85776455-d0ad-42aa-943b-eaf5370c764a">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="3b9e5e09-7789-4dd0-80f9-8336f61037b2">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="299edb5c-e9bb-4cb7-99f2-96078c8ef889">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c5956a55-cb41-4643-ac03-c9bec22d3c18">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="dafa1a5c-d8c0-4eec-a2b5-9cd2712b0047">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="56221300-739c-4915-b621-40d5a88b55b1">\r
+ <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a7970a5d-6275-426e-a51a-20691031bdf5">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="94467704-ad80-4c67-b089-21f4e865997b">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a22b376e-0d40-47d6-96a7-f5ea15cc6f87">\r
+ <SHORT-NAME>alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6a89f7c1-2516-488a-a318-25f5c54b4079">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c79487f9-46b5-45f5-b459-1f06be319f6a">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="3fa0a654-a059-4973-b476-cafe03690655">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c2a105af-fd99-4b2e-9dd7-ddc18617ebbc">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="89f89e91-5691-49cd-833b-4e9d14117a98">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="99dd2932-f344-424c-88cb-0b0e6e005662">\r
+ <SHORT-NAME>Det</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Det</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="7d8226d8-a4c9-4d6d-85b5-833eb68ad0e8">\r
+ <SHORT-NAME>DetGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Det/DetGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetEnableCallbacks</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="198876eb-33cf-4cbf-a37c-06d8a9670fe9">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="576fbc52-a01f-44d3-9519-8e4116800610">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="fa5bd3d6-0951-43a5-8529-7140d9689037">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="cfa529c2-e3f7-422c-a12b-3271f42cb27d">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">false</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="72eda2b7-cb7d-4873-b5e9-79daed917de9">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d8f198d5-8901-4cfa-ba6b-06b5fa32fe84">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b4a7ace7-9dc0-489b-b545-a813bc08b327">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_mpc5567/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_80MHZ</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="72e293da-ad58-40a3-bb0a-07b9010c05fb">\r
+ <SHORT-NAME>EXT_REF_80MHZ</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>1.6E7</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>11</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bb62035a-69d0-4503-8ce8-7b7adb6b845a">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="8254a509-e508-4280-8ec0-0817ef68495b">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">false</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="496e8330-5da6-48f8-9e21-f6d4fed81187">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="0f17c271-bfae-4d07-8283-9ce8a8118f1b">\r
+ <SHORT-NAME>PortContainer_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="0c45b12c-496e-4f6a-9949-5e224a9adf33">\r
+ <SHORT-NAME>GPIO[125]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>125</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_DIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="105ccb0c-0a5c-4930-a423-09e2b0730514">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="70ab573d-bc1a-419a-8c53-86d9da6d2405">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">false</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="0b40745e-f0ce-4aee-9499-b05e16e2241f">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ba82bde5-69dc-4c1d-8fc0-2539f1e7e105">\r
+ <SHORT-NAME>DioPort_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>DIO_MPC5567_GENERIC_PORT</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="19f14a77-d8e8-40cb-99dd-6b6e751b916a">\r
+ <SHORT-NAME>LED_K2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>125</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
#define OS_OSIDLE_STACK_SIZE 512\r
\r
#define OS_ALARM_CNT 3 \r
-#define OS_TASK_CNT 5\r
+#define OS_TASK_CNT 6\r
#define OS_SCHTBL_CNT 0\r
#define OS_COUNTER_CNT 1\r
#define OS_EVENTS_CNT 0\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Nov 24 20:08:51 CET 2010\r
+ * on Fri Jan 14 16:10:48 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Nov 24 20:08:51 CET 2010\r
+ * on Fri Jan 14 16:10:48 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if ((OS_SW_MAJOR_VERSION != 2))
#error "Os: Configuration file version differs from BSW version."
#endif
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ DIO_PORT_A = 0,\r
+ DIO_PORT_B = 1,\r
+ DIO_PORT_C = 2,\r
+ DIO_PORT_D = 3,\r
+ DIO_PORT_E = 4,\r
+ DIO_PORT_F = 5,\r
+ DIO_PORT_G = 6,\r
+ DIO_PORT_H = 7,\r
+ DIO_PORT_I = 8,\r
+ DIO_PORT_J = 9,\r
+ DIO_PORT_K = 10,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LEDS_LED4 52\r
+#define DIO_CHANNEL_NAME_LEDS_LED5 53\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (DIO_PORT_D)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LEDS_LED4,\r
+ DIO_CHANNEL_NAME_LEDS_LED5,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_LED_PORT, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += MCU PORT DIO \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 11:07:49 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 11:07:49 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 11:07:49 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 8000000UL,\r
+ .Pll1 = 1,\r
+ .Pll2 = 104,\r
+ .Pll3 = 5,\r
+ },\r
+ {\r
+ .McuClockReferencePointFrequency = 16000000UL,\r
+ .Pll1 = 3,\r
+ .Pll2 = 83,\r
+ .Pll3 = 5,\r
+ },\r
+};\r
+\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 2,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_ON \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_80MHZ = 0,\r
+ MCU_CLOCKTYPE_EXT_REF_66MHZ = 1,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
/*\r
* Configuration of module Os (Os_Cfg.c)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:04:02 CET 2010\r
+ * on Wed Jan 26 12:40:30 CET 2011\r
*/\r
\r
\r
/*\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:04:02 CET 2010\r
+ * on Wed Jan 26 12:40:30 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+ \r
+// File generated on Wed Jan 26 12:40:30 CET 2011\r
+// File generated by com.arccore.bswbuilder.modules.port.mpc5516\r
+\r
+#include "Port.h"\r
+#include "Port_Cfg.h"\r
+#include <stdlib.h>\r
+\r
+const uint16_t PortPadConfigData[] = {\r
+ PORT_PCR_RESET, /* PCR 0 */\r
+ PORT_PCR_RESET, /* PCR 1 */\r
+ PORT_PCR_RESET, /* PCR 2 */\r
+ PORT_PCR_RESET, /* PCR 3 */\r
+ PORT_PCR_RESET, /* PCR 4 */\r
+ PORT_PCR_RESET, /* PCR 5 */\r
+ PORT_PCR_RESET, /* PCR 6 */\r
+ PORT_PCR_RESET, /* PCR 7 */\r
+ PORT_PCR_RESET, /* PCR 8 */\r
+ PORT_PCR_RESET, /* PCR 9 */\r
+ PORT_PCR_RESET, /* PCR 10 */\r
+ PORT_PCR_RESET, /* PCR 11 */\r
+ PORT_PCR_RESET, /* PCR 12 */\r
+ PORT_PCR_RESET, /* PCR 13 */\r
+ PORT_PCR_RESET, /* PCR 14 */\r
+ PORT_PCR_RESET, /* PCR 15 */\r
+ PORT_PCR_RESET, /* PCR 16 */\r
+ PORT_PCR_RESET, /* PCR 17 */\r
+ PORT_PCR_RESET, /* PCR 18 */\r
+ PORT_PCR_RESET, /* PCR 19 */\r
+ PORT_PCR_RESET, /* PCR 20 */\r
+ PORT_PCR_RESET, /* PCR 21 */\r
+ PORT_PCR_RESET, /* PCR 22 */\r
+ PORT_PCR_RESET, /* PCR 23 */\r
+ PORT_PCR_RESET, /* PCR 24 */\r
+ PORT_PCR_RESET, /* PCR 25 */\r
+ PORT_PCR_RESET, /* PCR 26 */\r
+ PORT_PCR_RESET, /* PCR 27 */\r
+ PORT_PCR_RESET, /* PCR 28 */\r
+ PORT_PCR_RESET, /* PCR 29 */\r
+ PORT_PCR_RESET, /* PCR 30 */\r
+ PORT_PCR_RESET, /* PCR 31 */\r
+ PORT_PCR_RESET, /* PCR 32 */\r
+ PORT_PCR_RESET, /* PCR 33 */\r
+ PORT_PCR_RESET, /* PCR 34 */\r
+ PORT_PCR_RESET, /* PCR 35 */\r
+ PORT_PCR_RESET, /* PCR 36 */\r
+ PORT_PCR_RESET, /* PCR 37 */\r
+ PORT_PCR_RESET, /* PCR 38 */\r
+ PORT_PCR_RESET, /* PCR 39 */\r
+ PORT_PCR_RESET, /* PCR 40 */\r
+ PORT_PCR_RESET, /* PCR 41 */\r
+ PORT_PCR_RESET, /* PCR 42 */\r
+ PORT_PCR_RESET, /* PCR 43 */\r
+ PORT_PCR_RESET, /* PCR 44 */\r
+ PORT_PCR_RESET, /* PCR 45 */\r
+ PORT_PCR_RESET, /* PCR 46 */\r
+ PORT_PCR_RESET, /* PCR 47 */\r
+ PORT_PCR_RESET, /* PCR 48 */\r
+ PORT_PCR_RESET, /* PCR 49 */\r
+ PORT_PCR_RESET, /* PCR 50 */\r
+ PORT_PCR_RESET, /* PCR 51 */\r
+ ( PORT_FUNC0 | PORT_OBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE ), /* PCR 52 : PORT_PIN_MODE_DIO */\r
+ ( PORT_FUNC0 | PORT_OBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE ), /* PCR 53 : PORT_PIN_MODE_DIO */\r
+ PORT_PCR_RESET, /* PCR 54 */\r
+ PORT_PCR_RESET, /* PCR 55 */\r
+ PORT_PCR_RESET, /* PCR 56 */\r
+ PORT_PCR_RESET, /* PCR 57 */\r
+ PORT_PCR_RESET, /* PCR 58 */\r
+ PORT_PCR_RESET, /* PCR 59 */\r
+ PORT_PCR_RESET, /* PCR 60 */\r
+ PORT_PCR_RESET, /* PCR 61 */\r
+ PORT_PCR_RESET, /* PCR 62 */\r
+ PORT_PCR_RESET, /* PCR 63 */\r
+ PORT_PCR_RESET, /* PCR 64 */\r
+ PORT_PCR_RESET, /* PCR 65 */\r
+ PORT_PCR_RESET, /* PCR 66 */\r
+ PORT_PCR_RESET, /* PCR 67 */\r
+ PORT_PCR_RESET, /* PCR 68 */\r
+ PORT_PCR_RESET, /* PCR 69 */\r
+ PORT_PCR_RESET, /* PCR 70 */\r
+ PORT_PCR_RESET, /* PCR 71 */\r
+ PORT_PCR_RESET, /* PCR 72 */\r
+ PORT_PCR_RESET, /* PCR 73 */\r
+ PORT_PCR_RESET, /* PCR 74 */\r
+ PORT_PCR_RESET, /* PCR 75 */\r
+ PORT_PCR_RESET, /* PCR 76 */\r
+ PORT_PCR_RESET, /* PCR 77 */\r
+ PORT_PCR_RESET, /* PCR 78 */\r
+ PORT_PCR_RESET, /* PCR 79 */\r
+ PORT_PCR_RESET, /* PCR 80 */\r
+ PORT_PCR_RESET, /* PCR 81 */\r
+ PORT_PCR_RESET, /* PCR 82 */\r
+ PORT_PCR_RESET, /* PCR 83 */\r
+ PORT_PCR_RESET, /* PCR 84 */\r
+ PORT_PCR_RESET, /* PCR 85 */\r
+ PORT_PCR_RESET, /* PCR 86 */\r
+ PORT_PCR_RESET, /* PCR 87 */\r
+ PORT_PCR_RESET, /* PCR 88 */\r
+ PORT_PCR_RESET, /* PCR 89 */\r
+ PORT_PCR_RESET, /* PCR 90 */\r
+ PORT_PCR_RESET, /* PCR 91 */\r
+ PORT_PCR_RESET, /* PCR 92 */\r
+ PORT_PCR_RESET, /* PCR 93 */\r
+ PORT_PCR_RESET, /* PCR 94 */\r
+ PORT_PCR_RESET, /* PCR 95 */\r
+ PORT_PCR_RESET, /* PCR 96 */\r
+ PORT_PCR_RESET, /* PCR 97 */\r
+ PORT_PCR_RESET, /* PCR 98 */\r
+ PORT_PCR_RESET, /* PCR 99 */\r
+ PORT_PCR_RESET, /* PCR 100 */\r
+ PORT_PCR_RESET, /* PCR 101 */\r
+ PORT_PCR_RESET, /* PCR 102 */\r
+ PORT_PCR_RESET, /* PCR 103 */\r
+ PORT_PCR_RESET, /* PCR 104 */\r
+ PORT_PCR_RESET, /* PCR 105 */\r
+ PORT_PCR_RESET, /* PCR 106 */\r
+ PORT_PCR_RESET, /* PCR 107 */\r
+ PORT_PCR_RESET, /* PCR 108 */\r
+ PORT_PCR_RESET, /* PCR 109 */\r
+ PORT_PCR_RESET, /* PCR 110 */\r
+ PORT_PCR_RESET, /* PCR 111 */\r
+ PORT_PCR_RESET, /* PCR 112 */\r
+ PORT_PCR_RESET, /* PCR 113 */\r
+ PORT_PCR_RESET, /* PCR 114 */\r
+ PORT_PCR_RESET, /* PCR 115 */\r
+ PORT_PCR_RESET, /* PCR 116 */\r
+ PORT_PCR_RESET, /* PCR 117 */\r
+ PORT_PCR_RESET, /* PCR 118 */\r
+ PORT_PCR_RESET, /* PCR 119 */\r
+ PORT_PCR_RESET, /* PCR 120 */\r
+ PORT_PCR_RESET, /* PCR 121 */\r
+ PORT_PCR_RESET, /* PCR 122 */\r
+ PORT_PCR_RESET, /* PCR 123 */\r
+ PORT_PCR_RESET, /* PCR 124 */\r
+ PORT_PCR_RESET, /* PCR 125 */\r
+ PORT_PCR_RESET, /* PCR 126 */\r
+ PORT_PCR_RESET, /* PCR 127 */\r
+ PORT_PCR_RESET, /* PCR 128 */\r
+ PORT_PCR_RESET, /* PCR 129 */\r
+ PORT_PCR_RESET, /* PCR 130 */\r
+ PORT_PCR_RESET, /* PCR 131 */\r
+ PORT_PCR_RESET, /* PCR 132 */\r
+ PORT_PCR_RESET, /* PCR 133 */\r
+ PORT_PCR_RESET, /* PCR 134 */\r
+ PORT_PCR_RESET, /* PCR 135 */\r
+ PORT_PCR_RESET, /* PCR 136 */\r
+ PORT_PCR_RESET, /* PCR 137 */\r
+ PORT_PCR_RESET, /* PCR 138 */\r
+ PORT_PCR_RESET, /* PCR 139 */\r
+ PORT_PCR_RESET, /* PCR 140 */\r
+ PORT_PCR_RESET, /* PCR 141 */\r
+ PORT_PCR_RESET, /* PCR 142 */\r
+ PORT_PCR_RESET, /* PCR 143 */\r
+ PORT_PCR_RESET, /* PCR 144 */\r
+};\r
+\r
+const uint8_t PortOutConfigData[] = {\r
+ PORT_GPDO_RESET, /* GPDO 0 */\r
+ PORT_GPDO_RESET, /* GPDO 1 */\r
+ PORT_GPDO_RESET, /* GPDO 2 */\r
+ PORT_GPDO_RESET, /* GPDO 3 */\r
+ PORT_GPDO_RESET, /* GPDO 4 */\r
+ PORT_GPDO_RESET, /* GPDO 5 */\r
+ PORT_GPDO_RESET, /* GPDO 6 */\r
+ PORT_GPDO_RESET, /* GPDO 7 */\r
+ PORT_GPDO_RESET, /* GPDO 8 */\r
+ PORT_GPDO_RESET, /* GPDO 9 */\r
+ PORT_GPDO_RESET, /* GPDO 10 */\r
+ PORT_GPDO_RESET, /* GPDO 11 */\r
+ PORT_GPDO_RESET, /* GPDO 12 */\r
+ PORT_GPDO_RESET, /* GPDO 13 */\r
+ PORT_GPDO_RESET, /* GPDO 14 */\r
+ PORT_GPDO_RESET, /* GPDO 15 */\r
+ PORT_GPDO_RESET, /* GPDO 16 */\r
+ PORT_GPDO_RESET, /* GPDO 17 */\r
+ PORT_GPDO_RESET, /* GPDO 18 */\r
+ PORT_GPDO_RESET, /* GPDO 19 */\r
+ PORT_GPDO_RESET, /* GPDO 20 */\r
+ PORT_GPDO_RESET, /* GPDO 21 */\r
+ PORT_GPDO_RESET, /* GPDO 22 */\r
+ PORT_GPDO_RESET, /* GPDO 23 */\r
+ PORT_GPDO_RESET, /* GPDO 24 */\r
+ PORT_GPDO_RESET, /* GPDO 25 */\r
+ PORT_GPDO_RESET, /* GPDO 26 */\r
+ PORT_GPDO_RESET, /* GPDO 27 */\r
+ PORT_GPDO_RESET, /* GPDO 28 */\r
+ PORT_GPDO_RESET, /* GPDO 29 */\r
+ PORT_GPDO_RESET, /* GPDO 30 */\r
+ PORT_GPDO_RESET, /* GPDO 31 */\r
+ PORT_GPDO_RESET, /* GPDO 32 */\r
+ PORT_GPDO_RESET, /* GPDO 33 */\r
+ PORT_GPDO_RESET, /* GPDO 34 */\r
+ PORT_GPDO_RESET, /* GPDO 35 */\r
+ PORT_GPDO_RESET, /* GPDO 36 */\r
+ PORT_GPDO_RESET, /* GPDO 37 */\r
+ PORT_GPDO_RESET, /* GPDO 38 */\r
+ PORT_GPDO_RESET, /* GPDO 39 */\r
+ PORT_GPDO_RESET, /* GPDO 40 */\r
+ PORT_GPDO_RESET, /* GPDO 41 */\r
+ PORT_GPDO_RESET, /* GPDO 42 */\r
+ PORT_GPDO_RESET, /* GPDO 43 */\r
+ PORT_GPDO_RESET, /* GPDO 44 */\r
+ PORT_GPDO_RESET, /* GPDO 45 */\r
+ PORT_GPDO_RESET, /* GPDO 46 */\r
+ PORT_GPDO_RESET, /* GPDO 47 */\r
+ PORT_GPDO_RESET, /* GPDO 48 */\r
+ PORT_GPDO_RESET, /* GPDO 49 */\r
+ PORT_GPDO_RESET, /* GPDO 50 */\r
+ PORT_GPDO_RESET, /* GPDO 51 */\r
+ PORT_GPDO_RESET, /* GPDO 52 */\r
+ PORT_GPDO_RESET, /* GPDO 53 */\r
+ PORT_GPDO_RESET, /* GPDO 54 */\r
+ PORT_GPDO_RESET, /* GPDO 55 */\r
+ PORT_GPDO_RESET, /* GPDO 56 */\r
+ PORT_GPDO_RESET, /* GPDO 57 */\r
+ PORT_GPDO_RESET, /* GPDO 58 */\r
+ PORT_GPDO_RESET, /* GPDO 59 */\r
+ PORT_GPDO_RESET, /* GPDO 60 */\r
+ PORT_GPDO_RESET, /* GPDO 61 */\r
+ PORT_GPDO_RESET, /* GPDO 62 */\r
+ PORT_GPDO_RESET, /* GPDO 63 */\r
+ PORT_GPDO_RESET, /* GPDO 64 */\r
+ PORT_GPDO_RESET, /* GPDO 65 */\r
+ PORT_GPDO_RESET, /* GPDO 66 */\r
+ PORT_GPDO_RESET, /* GPDO 67 */\r
+ PORT_GPDO_RESET, /* GPDO 68 */\r
+ PORT_GPDO_RESET, /* GPDO 69 */\r
+ PORT_GPDO_RESET, /* GPDO 70 */\r
+ PORT_GPDO_RESET, /* GPDO 71 */\r
+ PORT_GPDO_RESET, /* GPDO 72 */\r
+ PORT_GPDO_RESET, /* GPDO 73 */\r
+ PORT_GPDO_RESET, /* GPDO 74 */\r
+ PORT_GPDO_RESET, /* GPDO 75 */\r
+ PORT_GPDO_RESET, /* GPDO 76 */\r
+ PORT_GPDO_RESET, /* GPDO 77 */\r
+ PORT_GPDO_RESET, /* GPDO 78 */\r
+ PORT_GPDO_RESET, /* GPDO 79 */\r
+ PORT_GPDO_RESET, /* GPDO 80 */\r
+ PORT_GPDO_RESET, /* GPDO 81 */\r
+ PORT_GPDO_RESET, /* GPDO 82 */\r
+ PORT_GPDO_RESET, /* GPDO 83 */\r
+ PORT_GPDO_RESET, /* GPDO 84 */\r
+ PORT_GPDO_RESET, /* GPDO 85 */\r
+ PORT_GPDO_RESET, /* GPDO 86 */\r
+ PORT_GPDO_RESET, /* GPDO 87 */\r
+ PORT_GPDO_RESET, /* GPDO 88 */\r
+ PORT_GPDO_RESET, /* GPDO 89 */\r
+ PORT_GPDO_RESET, /* GPDO 90 */\r
+ PORT_GPDO_RESET, /* GPDO 91 */\r
+ PORT_GPDO_RESET, /* GPDO 92 */\r
+ PORT_GPDO_RESET, /* GPDO 93 */\r
+ PORT_GPDO_RESET, /* GPDO 94 */\r
+ PORT_GPDO_RESET, /* GPDO 95 */\r
+ PORT_GPDO_RESET, /* GPDO 96 */\r
+ PORT_GPDO_RESET, /* GPDO 97 */\r
+ PORT_GPDO_RESET, /* GPDO 98 */\r
+ PORT_GPDO_RESET, /* GPDO 99 */\r
+ PORT_GPDO_RESET, /* GPDO 100 */\r
+ PORT_GPDO_RESET, /* GPDO 101 */\r
+ PORT_GPDO_RESET, /* GPDO 102 */\r
+ PORT_GPDO_RESET, /* GPDO 103 */\r
+ PORT_GPDO_RESET, /* GPDO 104 */\r
+ PORT_GPDO_RESET, /* GPDO 105 */\r
+ PORT_GPDO_RESET, /* GPDO 106 */\r
+ PORT_GPDO_RESET, /* GPDO 107 */\r
+ PORT_GPDO_RESET, /* GPDO 108 */\r
+ PORT_GPDO_RESET, /* GPDO 109 */\r
+ PORT_GPDO_RESET, /* GPDO 110 */\r
+ PORT_GPDO_RESET, /* GPDO 111 */\r
+ PORT_GPDO_RESET, /* GPDO 112 */\r
+ PORT_GPDO_RESET, /* GPDO 113 */\r
+ PORT_GPDO_RESET, /* GPDO 114 */\r
+ PORT_GPDO_RESET, /* GPDO 115 */\r
+ PORT_GPDO_RESET, /* GPDO 116 */\r
+ PORT_GPDO_RESET, /* GPDO 117 */\r
+ PORT_GPDO_RESET, /* GPDO 118 */\r
+ PORT_GPDO_RESET, /* GPDO 119 */\r
+ PORT_GPDO_RESET, /* GPDO 120 */\r
+ PORT_GPDO_RESET, /* GPDO 121 */\r
+ PORT_GPDO_RESET, /* GPDO 122 */\r
+ PORT_GPDO_RESET, /* GPDO 123 */\r
+ PORT_GPDO_RESET, /* GPDO 124 */\r
+ PORT_GPDO_RESET, /* GPDO 125 */\r
+ PORT_GPDO_RESET, /* GPDO 126 */\r
+ PORT_GPDO_RESET, /* GPDO 127 */\r
+ PORT_GPDO_RESET, /* GPDO 128 */\r
+ PORT_GPDO_RESET, /* GPDO 129 */\r
+ PORT_GPDO_RESET, /* GPDO 130 */\r
+ PORT_GPDO_RESET, /* GPDO 131 */\r
+ PORT_GPDO_RESET, /* GPDO 132 */\r
+ PORT_GPDO_RESET, /* GPDO 133 */\r
+ PORT_GPDO_RESET, /* GPDO 134 */\r
+ PORT_GPDO_RESET, /* GPDO 135 */\r
+ PORT_GPDO_RESET, /* GPDO 136 */\r
+ PORT_GPDO_RESET, /* GPDO 137 */\r
+ PORT_GPDO_RESET, /* GPDO 138 */\r
+ PORT_GPDO_RESET, /* GPDO 139 */\r
+ PORT_GPDO_RESET, /* GPDO 140 */\r
+ PORT_GPDO_RESET, /* GPDO 141 */\r
+ PORT_GPDO_RESET, /* GPDO 142 */\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = sizeof(PortPadConfigData),\r
+ .padConfig = PortPadConfigData,\r
+ .outCnt = sizeof(PortOutConfigData),\r
+ .outConfig = PortOutConfigData,\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC551x\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:40:30 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+\r
+#define PORT_BIT0 (1<<15)\r
+#define PORT_BIT1 (1<<14)\r
+#define PORT_BIT2 (1<<13)\r
+#define PORT_BIT3 (1<<12)\r
+#define PORT_BIT4 (1<<11)\r
+#define PORT_BIT5 (1<<10)\r
+#define PORT_BIT6 (1<<9)\r
+#define PORT_BIT7 (1<<8)\r
+#define PORT_BIT8 (1<<7)\r
+#define PORT_BIT9 (1<<6)\r
+#define PORT_BIT10 (1<<5)\r
+#define PORT_BIT11 (1<<4)\r
+#define PORT_BIT12 (1<<3)\r
+#define PORT_BIT13 (1<<2)\r
+#define PORT_BIT14 (1<<1)\r
+#define PORT_BIT15 (1<<0)\r
+\r
+#define PORT_WPE_BIT PORT_BIT14\r
+#define PORT_WPS_BIT PORT_BIT15\r
+#define PORT_SRC0 PORT_BIT12\r
+#define PORT_SRC1 PORT_BIT13\r
+\r
+#define PORT_PULL_UP (PORT_WPE_BIT|PORT_WPS_BIT)\r
+#define PORT_PULL_DOWN (PORT_WPE_BIT)\r
+#define PORT_PULL_NONE 0\r
+#define PORT_SLEW_RATE_MIN 0\r
+#define PORT_SLEW_RATE_MED PORT_BIT13\r
+#define PORT_SLEW_RATE_MAX (PORT_BIT12|PORT_BIT13)\r
+#define PORT_HYS_ENABLE PORT_BIT11\r
+#define PORT_ODE_ENABLE PORT_BIT10\r
+#define PORT_IBE_ENABLE PORT_BIT7\r
+#define PORT_OBE_ENABLE PORT_BIT6\r
+#define PORT_IO (0)\r
+#define PORT_FUNC0 (0)\r
+#define PORT_FUNC1 (PORT_BIT5)\r
+#define PORT_FUNC2 (PORT_BIT4)\r
+#define PORT_FUNC3 (PORT_BIT4|PORT_BIT5)\r
+#define PORT_FUNC4 (PORT_BIT3)\r
+\r
+#define PORT_PCR_RESET (0)\r
+#define PORT_GPDO_RESET (0)\r
+\r
+#define PORT_GPDO_HIGH (1)\r
+\r
+\r
+typedef uint16 Port_PinType;\r
+\r
+typedef struct\r
+{\r
+ uint16_t padCnt;\r
+ const uint16_t *padConfig;\r
+ uint16_t outCnt;\r
+ const uint8_t *outConfig;\r
+// uint16_t inCnt;\r
+// const uint8_t *inConfig;\r
+} Port_ConfigType;\r
+\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#define PORT_PIN_NAME_PD4 52 \r
+#define PORT_PIN_NAME_PD5 53 \r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ DIO_MPC5567_GENERIC_PORT = 0,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LED_K2 125\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_DioPort_1 (DIO_MPC5567_GENERIC_PORT)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LED_K2,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_DioPort_1, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += MCU PORT DIO \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:14:21 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:14:21 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:14:21 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 16000000UL,\r
+ .Pll1 = 2,\r
+ .Pll2 = 11,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "mpc55xx.h"\r
+\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_ON \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_80MHZ = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
/*\r
* Configuration of module Os (Os_Cfg.c)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:04:02 CET 2010\r
+ * on Wed Jan 26 14:18:05 CET 2011\r
*/\r
\r
\r
/*\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
- * Created by: ArcCore AB\r
- * Configured for (MCU): Undefined MCU\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
- * Copyright ArcCore AB 2010\r
+ * \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:04:02 CET 2010\r
+ * on Wed Jan 26 14:18:04 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+ \r
+// File generated on Wed Jan 26 14:18:05 CET 2011\r
+// File generated by com.arccore.bswbuilder.modules.port.mpc5567\r
+\r
+#include "Port.h"\r
+#include "Port_Cfg.h"\r
+#include <stdlib.h>\r
+\r
+const uint16_t PortPadConfigData[] = {\r
+ PORT_PCR_RESET, /* PCR 0 */\r
+ PORT_PCR_RESET, /* PCR 1 */\r
+ PORT_PCR_RESET, /* PCR 2 */\r
+ PORT_PCR_RESET, /* PCR 3 */\r
+ PORT_PCR_RESET, /* PCR 4 */\r
+ PORT_PCR_RESET, /* PCR 5 */\r
+ PORT_PCR_RESET, /* PCR 6 */\r
+ PORT_PCR_RESET, /* PCR 7 */\r
+ PORT_PCR_RESET, /* PCR 8 */\r
+ PORT_PCR_RESET, /* PCR 9 */\r
+ PORT_PCR_RESET, /* PCR 10 */\r
+ PORT_PCR_RESET, /* PCR 11 */\r
+ PORT_PCR_RESET, /* PCR 12 */\r
+ PORT_PCR_RESET, /* PCR 13 */\r
+ PORT_PCR_RESET, /* PCR 14 */\r
+ PORT_PCR_RESET, /* PCR 15 */\r
+ PORT_PCR_RESET, /* PCR 16 */\r
+ PORT_PCR_RESET, /* PCR 17 */\r
+ PORT_PCR_RESET, /* PCR 18 */\r
+ PORT_PCR_RESET, /* PCR 19 */\r
+ PORT_PCR_RESET, /* PCR 20 */\r
+ PORT_PCR_RESET, /* PCR 21 */\r
+ PORT_PCR_RESET, /* PCR 22 */\r
+ PORT_PCR_RESET, /* PCR 23 */\r
+ PORT_PCR_RESET, /* PCR 24 */\r
+ PORT_PCR_RESET, /* PCR 25 */\r
+ PORT_PCR_RESET, /* PCR 26 */\r
+ PORT_PCR_RESET, /* PCR 27 */\r
+ PORT_PCR_RESET, /* PCR 28 */\r
+ PORT_PCR_RESET, /* PCR 29 */\r
+ PORT_PCR_RESET, /* PCR 30 */\r
+ PORT_PCR_RESET, /* PCR 31 */\r
+ PORT_PCR_RESET, /* PCR 32 */\r
+ PORT_PCR_RESET, /* PCR 33 */\r
+ PORT_PCR_RESET, /* PCR 34 */\r
+ PORT_PCR_RESET, /* PCR 35 */\r
+ PORT_PCR_RESET, /* PCR 36 */\r
+ PORT_PCR_RESET, /* PCR 37 */\r
+ PORT_PCR_RESET, /* PCR 38 */\r
+ PORT_PCR_RESET, /* PCR 39 */\r
+ PORT_PCR_RESET, /* PCR 40 */\r
+ PORT_PCR_RESET, /* PCR 41 */\r
+ PORT_PCR_RESET, /* PCR 42 */\r
+ PORT_PCR_RESET, /* PCR 43 */\r
+ PORT_PCR_RESET, /* PCR 44 */\r
+ PORT_PCR_RESET, /* PCR 45 */\r
+ PORT_PCR_RESET, /* PCR 46 */\r
+ PORT_PCR_RESET, /* PCR 47 */\r
+ PORT_PCR_RESET, /* PCR 48 */\r
+ PORT_PCR_RESET, /* PCR 49 */\r
+ PORT_PCR_RESET, /* PCR 50 */\r
+ PORT_PCR_RESET, /* PCR 51 */\r
+ PORT_PCR_RESET, /* PCR 52 */\r
+ PORT_PCR_RESET, /* PCR 53 */\r
+ PORT_PCR_RESET, /* PCR 54 */\r
+ PORT_PCR_RESET, /* PCR 55 */\r
+ PORT_PCR_RESET, /* PCR 56 */\r
+ PORT_PCR_RESET, /* PCR 57 */\r
+ PORT_PCR_RESET, /* PCR 58 */\r
+ PORT_PCR_RESET, /* PCR 59 */\r
+ PORT_PCR_RESET, /* PCR 60 */\r
+ PORT_PCR_RESET, /* PCR 61 */\r
+ PORT_PCR_RESET, /* PCR 62 */\r
+ PORT_PCR_RESET, /* PCR 63 */\r
+ PORT_PCR_RESET, /* PCR 64 */\r
+ PORT_PCR_RESET, /* PCR 65 */\r
+ PORT_PCR_RESET, /* PCR 66 */\r
+ PORT_PCR_RESET, /* PCR 67 */\r
+ PORT_PCR_RESET, /* PCR 68 */\r
+ PORT_PCR_RESET, /* PCR 69 */\r
+ PORT_PCR_RESET, /* PCR 70 */\r
+ PORT_PCR_RESET, /* PCR 71 */\r
+ PORT_PCR_RESET, /* PCR 72 */\r
+ PORT_PCR_RESET, /* PCR 73 */\r
+ PORT_PCR_RESET, /* PCR 74 */\r
+ PORT_PCR_RESET, /* PCR 75 */\r
+ PORT_PCR_RESET, /* PCR 76 */\r
+ PORT_PCR_RESET, /* PCR 77 */\r
+ PORT_PCR_RESET, /* PCR 78 */\r
+ PORT_PCR_RESET, /* PCR 79 */\r
+ PORT_PCR_RESET, /* PCR 80 */\r
+ PORT_PCR_RESET, /* PCR 81 */\r
+ PORT_PCR_RESET, /* PCR 82 */\r
+ PORT_PCR_RESET, /* PCR 83 */\r
+ PORT_PCR_RESET, /* PCR 84 */\r
+ PORT_PCR_RESET, /* PCR 85 */\r
+ PORT_PCR_RESET, /* PCR 86 */\r
+ PORT_PCR_RESET, /* PCR 87 */\r
+ PORT_PCR_RESET, /* PCR 88 */\r
+ PORT_PCR_RESET, /* PCR 89 */\r
+ PORT_PCR_RESET, /* PCR 90 */\r
+ PORT_PCR_RESET, /* PCR 91 */\r
+ PORT_PCR_RESET, /* PCR 92 */\r
+ PORT_PCR_RESET, /* PCR 93 */\r
+ PORT_PCR_RESET, /* PCR 94 */\r
+ PORT_PCR_RESET, /* PCR 95 */\r
+ PORT_PCR_RESET, /* PCR 96 */\r
+ PORT_PCR_RESET, /* PCR 97 */\r
+ PORT_PCR_RESET, /* PCR 98 */\r
+ PORT_PCR_RESET, /* PCR 99 */\r
+ PORT_PCR_RESET, /* PCR 100 */\r
+ PORT_PCR_RESET, /* PCR 101 */\r
+ PORT_PCR_RESET, /* PCR 102 */\r
+ PORT_PCR_RESET, /* PCR 103 */\r
+ PORT_PCR_RESET, /* PCR 104 */\r
+ PORT_PCR_RESET, /* PCR 105 */\r
+ PORT_PCR_RESET, /* PCR 106 */\r
+ PORT_PCR_RESET, /* PCR 107 */\r
+ PORT_PCR_RESET, /* PCR 108 */\r
+ PORT_PCR_RESET, /* PCR 109 */\r
+ PORT_PCR_RESET, /* PCR 110 */\r
+ PORT_PCR_RESET, /* PCR 111 */\r
+ PORT_PCR_RESET, /* PCR 112 */\r
+ PORT_PCR_RESET, /* PCR 113 */\r
+ PORT_PCR_RESET, /* PCR 114 */\r
+ PORT_PCR_RESET, /* PCR 115 */\r
+ PORT_PCR_RESET, /* PCR 116 */\r
+ PORT_PCR_RESET, /* PCR 117 */\r
+ PORT_PCR_RESET, /* PCR 118 */\r
+ PORT_PCR_RESET, /* PCR 119 */\r
+ PORT_PCR_RESET, /* PCR 120 */\r
+ PORT_PCR_RESET, /* PCR 121 */\r
+ PORT_PCR_RESET, /* PCR 122 */\r
+ PORT_PCR_RESET, /* PCR 123 */\r
+ PORT_PCR_RESET, /* PCR 124 */\r
+ ( PORT_FUNC0 | PORT_OBE_ENABLE | PORT_SLEW_RATE_MIN | PORT_PULL_NONE ), /* PCR 125 : PORT_PIN_MODE_DIO */\r
+ PORT_PCR_RESET, /* PCR 126 */\r
+ PORT_PCR_RESET, /* PCR 127 */\r
+ PORT_PCR_RESET, /* PCR 128 */\r
+ PORT_PCR_RESET, /* PCR 129 */\r
+ PORT_PCR_RESET, /* PCR 130 */\r
+ PORT_PCR_RESET, /* PCR 131 */\r
+ PORT_PCR_RESET, /* PCR 132 */\r
+ PORT_PCR_RESET, /* PCR 133 */\r
+ PORT_PCR_RESET, /* PCR 134 */\r
+ PORT_PCR_RESET, /* PCR 135 */\r
+ PORT_PCR_RESET, /* PCR 136 */\r
+ PORT_PCR_RESET, /* PCR 137 */\r
+ PORT_PCR_RESET, /* PCR 138 */\r
+ PORT_PCR_RESET, /* PCR 139 */\r
+ PORT_PCR_RESET, /* PCR 140 */\r
+ PORT_PCR_RESET, /* PCR 141 */\r
+ PORT_PCR_RESET, /* PCR 142 */\r
+ PORT_PCR_RESET, /* PCR 143 */\r
+ PORT_PCR_RESET, /* PCR 144 */\r
+ PORT_PCR_RESET, /* PCR 145 */\r
+ PORT_PCR_RESET, /* PCR 146 */\r
+ PORT_PCR_RESET, /* PCR 147 */\r
+ PORT_PCR_RESET, /* PCR 148 */\r
+ PORT_PCR_RESET, /* PCR 149 */\r
+ PORT_PCR_RESET, /* PCR 150 */\r
+ PORT_PCR_RESET, /* PCR 151 */\r
+ PORT_PCR_RESET, /* PCR 152 */\r
+ PORT_PCR_RESET, /* PCR 153 */\r
+ PORT_PCR_RESET, /* PCR 154 */\r
+ PORT_PCR_RESET, /* PCR 155 */\r
+ PORT_PCR_RESET, /* PCR 156 */\r
+ PORT_PCR_RESET, /* PCR 157 */\r
+ PORT_PCR_RESET, /* PCR 158 */\r
+ PORT_PCR_RESET, /* PCR 159 */\r
+ PORT_PCR_RESET, /* PCR 160 */\r
+ PORT_PCR_RESET, /* PCR 161 */\r
+ PORT_PCR_RESET, /* PCR 162 */\r
+ PORT_PCR_RESET, /* PCR 163 */\r
+ PORT_PCR_RESET, /* PCR 164 */\r
+ PORT_PCR_RESET, /* PCR 165 */\r
+ PORT_PCR_RESET, /* PCR 166 */\r
+ PORT_PCR_RESET, /* PCR 167 */\r
+ PORT_PCR_RESET, /* PCR 168 */\r
+ PORT_PCR_RESET, /* PCR 169 */\r
+ PORT_PCR_RESET, /* PCR 170 */\r
+ PORT_PCR_RESET, /* PCR 171 */\r
+ PORT_PCR_RESET, /* PCR 172 */\r
+ PORT_PCR_RESET, /* PCR 173 */\r
+ PORT_PCR_RESET, /* PCR 174 */\r
+ PORT_PCR_RESET, /* PCR 175 */\r
+ PORT_PCR_RESET, /* PCR 176 */\r
+ PORT_PCR_RESET, /* PCR 177 */\r
+ PORT_PCR_RESET, /* PCR 178 */\r
+ PORT_PCR_RESET, /* PCR 179 */\r
+ PORT_PCR_RESET, /* PCR 180 */\r
+ PORT_PCR_RESET, /* PCR 181 */\r
+ PORT_PCR_RESET, /* PCR 182 */\r
+ PORT_PCR_RESET, /* PCR 183 */\r
+ PORT_PCR_RESET, /* PCR 184 */\r
+ PORT_PCR_RESET, /* PCR 185 */\r
+ PORT_PCR_RESET, /* PCR 186 */\r
+ PORT_PCR_RESET, /* PCR 187 */\r
+ PORT_PCR_RESET, /* PCR 188 */\r
+ PORT_PCR_RESET, /* PCR 189 */\r
+ PORT_PCR_RESET, /* PCR 190 */\r
+ PORT_PCR_RESET, /* PCR 191 */\r
+ PORT_PCR_RESET, /* PCR 192 */\r
+ PORT_PCR_RESET, /* PCR 193 */\r
+ PORT_PCR_RESET, /* PCR 194 */\r
+ PORT_PCR_RESET, /* PCR 195 */\r
+ PORT_PCR_RESET, /* PCR 196 */\r
+ PORT_PCR_RESET, /* PCR 197 */\r
+ PORT_PCR_RESET, /* PCR 198 */\r
+ PORT_PCR_RESET, /* PCR 199 */\r
+ PORT_PCR_RESET, /* PCR 200 */\r
+ PORT_PCR_RESET, /* PCR 201 */\r
+ PORT_PCR_RESET, /* PCR 202 */\r
+ PORT_PCR_RESET, /* PCR 203 */\r
+ PORT_PCR_RESET, /* PCR 204 */\r
+ PORT_PCR_RESET, /* PCR 205 */\r
+ PORT_PCR_RESET, /* PCR 206 */\r
+ PORT_PCR_RESET, /* PCR 207 */\r
+ PORT_PCR_RESET, /* PCR 208 */\r
+ PORT_PCR_RESET, /* PCR 209 */\r
+ PORT_PCR_RESET, /* PCR 210 */\r
+ PORT_PCR_RESET, /* PCR 211 */\r
+ PORT_PCR_RESET, /* PCR 212 */\r
+ PORT_PCR_RESET, /* PCR 213 */\r
+ PORT_PCR_RESET, /* PCR 214 */\r
+ PORT_PCR_RESET, /* PCR 215 */\r
+ PORT_PCR_RESET, /* PCR 216 */\r
+ PORT_PCR_RESET, /* PCR 217 */\r
+ PORT_PCR_RESET, /* PCR 218 */\r
+ PORT_PCR_RESET, /* PCR 219 */\r
+ PORT_PCR_RESET, /* PCR 220 */\r
+ PORT_PCR_RESET, /* PCR 221 */\r
+ PORT_PCR_RESET, /* PCR 222 */\r
+ PORT_PCR_RESET, /* PCR 223 */\r
+ PORT_PCR_RESET, /* PCR 224 */\r
+ PORT_PCR_RESET, /* PCR 225 */\r
+ PORT_PCR_RESET, /* PCR 226 */\r
+ PORT_PCR_RESET, /* PCR 227 */\r
+ PORT_PCR_RESET, /* PCR 228 */\r
+ PORT_PCR_RESET, /* PCR 229 */\r
+ PORT_PCR_RESET, /* PCR 230 */\r
+ PORT_PCR_RESET, /* PCR 231 */\r
+ PORT_PCR_RESET, /* PCR 232 */\r
+ PORT_PCR_RESET, /* PCR 233 */\r
+ PORT_PCR_RESET, /* PCR 234 */\r
+ PORT_PCR_RESET, /* PCR 235 */\r
+ PORT_PCR_RESET, /* PCR 236 */\r
+ PORT_PCR_RESET, /* PCR 237 */\r
+ PORT_PCR_RESET, /* PCR 238 */\r
+ PORT_PCR_RESET, /* PCR 239 */\r
+ PORT_PCR_RESET, /* PCR 240 */\r
+ PORT_PCR_RESET, /* PCR 241 */\r
+ PORT_PCR_RESET, /* PCR 242 */\r
+ PORT_PCR_RESET, /* PCR 243 */\r
+ PORT_PCR_RESET, /* PCR 244 */\r
+ PORT_PCR_RESET, /* PCR 245 */\r
+ PORT_PCR_RESET, /* PCR 246 */\r
+ PORT_PCR_RESET, /* PCR 247 */\r
+ PORT_PCR_RESET, /* PCR 248 */\r
+ PORT_PCR_RESET, /* PCR 249 */\r
+ PORT_PCR_RESET, /* PCR 250 */\r
+ PORT_PCR_RESET, /* PCR 251 */\r
+ PORT_PCR_RESET, /* PCR 252 */\r
+ PORT_PCR_RESET, /* PCR 253 */\r
+ PORT_PCR_RESET, /* PCR 254 */\r
+ PORT_PCR_RESET, /* PCR 255 */\r
+ PORT_PCR_RESET, /* PCR 256 */\r
+ PORT_PCR_RESET, /* PCR 257 */\r
+ PORT_PCR_RESET, /* PCR 258 */\r
+ PORT_PCR_RESET, /* PCR 259 */\r
+ PORT_PCR_RESET, /* PCR 260 */\r
+ PORT_PCR_RESET, /* PCR 261 */\r
+ PORT_PCR_RESET, /* PCR 262 */\r
+ PORT_PCR_RESET, /* PCR 263 */\r
+ PORT_PCR_RESET, /* PCR 264 */\r
+ PORT_PCR_RESET, /* PCR 265 */\r
+ PORT_PCR_RESET, /* PCR 266 */\r
+ PORT_PCR_RESET, /* PCR 267 */\r
+ PORT_PCR_RESET, /* PCR 268 */\r
+ PORT_PCR_RESET, /* PCR 269 */\r
+ PORT_PCR_RESET, /* PCR 270 */\r
+ PORT_PCR_RESET, /* PCR 271 */\r
+ PORT_PCR_RESET, /* PCR 272 */\r
+ PORT_PCR_RESET, /* PCR 273 */\r
+ PORT_PCR_RESET, /* PCR 274 */\r
+ PORT_PCR_RESET, /* PCR 275 */\r
+ PORT_PCR_RESET, /* PCR 276 */\r
+ PORT_PCR_RESET, /* PCR 277 */\r
+ PORT_PCR_RESET, /* PCR 278 */\r
+ PORT_PCR_RESET, /* PCR 279 */\r
+ PORT_PCR_RESET, /* PCR 280 */\r
+ PORT_PCR_RESET, /* PCR 281 */\r
+ PORT_PCR_RESET, /* PCR 282 */\r
+ PORT_PCR_RESET, /* PCR 283 */\r
+ PORT_PCR_RESET, /* PCR 284 */\r
+ PORT_PCR_RESET, /* PCR 285 */\r
+ PORT_PCR_RESET, /* PCR 286 */\r
+ PORT_PCR_RESET, /* PCR 287 */\r
+ PORT_PCR_RESET, /* PCR 288 */\r
+ PORT_PCR_RESET, /* PCR 289 */\r
+ PORT_PCR_RESET, /* PCR 290 */\r
+ PORT_PCR_RESET, /* PCR 291 */\r
+ PORT_PCR_RESET, /* PCR 292 */\r
+ PORT_PCR_RESET, /* PCR 293 */\r
+ PORT_PCR_RESET, /* PCR 294 */\r
+ PORT_PCR_RESET, /* PCR 295 */\r
+ PORT_PCR_RESET, /* PCR 296 */\r
+ PORT_PCR_RESET, /* PCR 297 */\r
+ PORT_PCR_RESET, /* PCR 298 */\r
+};\r
+\r
+const uint8_t PortOutConfigData[] = {\r
+ PORT_GPDO_RESET, /* GPDO 0 */\r
+ PORT_GPDO_RESET, /* GPDO 1 */\r
+ PORT_GPDO_RESET, /* GPDO 2 */\r
+ PORT_GPDO_RESET, /* GPDO 3 */\r
+ PORT_GPDO_RESET, /* GPDO 4 */\r
+ PORT_GPDO_RESET, /* GPDO 5 */\r
+ PORT_GPDO_RESET, /* GPDO 6 */\r
+ PORT_GPDO_RESET, /* GPDO 7 */\r
+ PORT_GPDO_RESET, /* GPDO 8 */\r
+ PORT_GPDO_RESET, /* GPDO 9 */\r
+ PORT_GPDO_RESET, /* GPDO 10 */\r
+ PORT_GPDO_RESET, /* GPDO 11 */\r
+ PORT_GPDO_RESET, /* GPDO 12 */\r
+ PORT_GPDO_RESET, /* GPDO 13 */\r
+ PORT_GPDO_RESET, /* GPDO 14 */\r
+ PORT_GPDO_RESET, /* GPDO 15 */\r
+ PORT_GPDO_RESET, /* GPDO 16 */\r
+ PORT_GPDO_RESET, /* GPDO 17 */\r
+ PORT_GPDO_RESET, /* GPDO 18 */\r
+ PORT_GPDO_RESET, /* GPDO 19 */\r
+ PORT_GPDO_RESET, /* GPDO 20 */\r
+ PORT_GPDO_RESET, /* GPDO 21 */\r
+ PORT_GPDO_RESET, /* GPDO 22 */\r
+ PORT_GPDO_RESET, /* GPDO 23 */\r
+ PORT_GPDO_RESET, /* GPDO 24 */\r
+ PORT_GPDO_RESET, /* GPDO 25 */\r
+ PORT_GPDO_RESET, /* GPDO 26 */\r
+ PORT_GPDO_RESET, /* GPDO 27 */\r
+ PORT_GPDO_RESET, /* GPDO 28 */\r
+ PORT_GPDO_RESET, /* GPDO 29 */\r
+ PORT_GPDO_RESET, /* GPDO 30 */\r
+ PORT_GPDO_RESET, /* GPDO 31 */\r
+ PORT_GPDO_RESET, /* GPDO 32 */\r
+ PORT_GPDO_RESET, /* GPDO 33 */\r
+ PORT_GPDO_RESET, /* GPDO 34 */\r
+ PORT_GPDO_RESET, /* GPDO 35 */\r
+ PORT_GPDO_RESET, /* GPDO 36 */\r
+ PORT_GPDO_RESET, /* GPDO 37 */\r
+ PORT_GPDO_RESET, /* GPDO 38 */\r
+ PORT_GPDO_RESET, /* GPDO 39 */\r
+ PORT_GPDO_RESET, /* GPDO 40 */\r
+ PORT_GPDO_RESET, /* GPDO 41 */\r
+ PORT_GPDO_RESET, /* GPDO 42 */\r
+ PORT_GPDO_RESET, /* GPDO 43 */\r
+ PORT_GPDO_RESET, /* GPDO 44 */\r
+ PORT_GPDO_RESET, /* GPDO 45 */\r
+ PORT_GPDO_RESET, /* GPDO 46 */\r
+ PORT_GPDO_RESET, /* GPDO 47 */\r
+ PORT_GPDO_RESET, /* GPDO 48 */\r
+ PORT_GPDO_RESET, /* GPDO 49 */\r
+ PORT_GPDO_RESET, /* GPDO 50 */\r
+ PORT_GPDO_RESET, /* GPDO 51 */\r
+ PORT_GPDO_RESET, /* GPDO 52 */\r
+ PORT_GPDO_RESET, /* GPDO 53 */\r
+ PORT_GPDO_RESET, /* GPDO 54 */\r
+ PORT_GPDO_RESET, /* GPDO 55 */\r
+ PORT_GPDO_RESET, /* GPDO 56 */\r
+ PORT_GPDO_RESET, /* GPDO 57 */\r
+ PORT_GPDO_RESET, /* GPDO 58 */\r
+ PORT_GPDO_RESET, /* GPDO 59 */\r
+ PORT_GPDO_RESET, /* GPDO 60 */\r
+ PORT_GPDO_RESET, /* GPDO 61 */\r
+ PORT_GPDO_RESET, /* GPDO 62 */\r
+ PORT_GPDO_RESET, /* GPDO 63 */\r
+ PORT_GPDO_RESET, /* GPDO 64 */\r
+ PORT_GPDO_RESET, /* GPDO 65 */\r
+ PORT_GPDO_RESET, /* GPDO 66 */\r
+ PORT_GPDO_RESET, /* GPDO 67 */\r
+ PORT_GPDO_RESET, /* GPDO 68 */\r
+ PORT_GPDO_RESET, /* GPDO 69 */\r
+ PORT_GPDO_RESET, /* GPDO 70 */\r
+ PORT_GPDO_RESET, /* GPDO 71 */\r
+ PORT_GPDO_RESET, /* GPDO 72 */\r
+ PORT_GPDO_RESET, /* GPDO 73 */\r
+ PORT_GPDO_RESET, /* GPDO 74 */\r
+ PORT_GPDO_RESET, /* GPDO 75 */\r
+ PORT_GPDO_RESET, /* GPDO 76 */\r
+ PORT_GPDO_RESET, /* GPDO 77 */\r
+ PORT_GPDO_RESET, /* GPDO 78 */\r
+ PORT_GPDO_RESET, /* GPDO 79 */\r
+ PORT_GPDO_RESET, /* GPDO 80 */\r
+ PORT_GPDO_RESET, /* GPDO 81 */\r
+ PORT_GPDO_RESET, /* GPDO 82 */\r
+ PORT_GPDO_RESET, /* GPDO 83 */\r
+ PORT_GPDO_RESET, /* GPDO 84 */\r
+ PORT_GPDO_RESET, /* GPDO 85 */\r
+ PORT_GPDO_RESET, /* GPDO 86 */\r
+ PORT_GPDO_RESET, /* GPDO 87 */\r
+ PORT_GPDO_RESET, /* GPDO 88 */\r
+ PORT_GPDO_RESET, /* GPDO 89 */\r
+ PORT_GPDO_RESET, /* GPDO 90 */\r
+ PORT_GPDO_RESET, /* GPDO 91 */\r
+ PORT_GPDO_RESET, /* GPDO 92 */\r
+ PORT_GPDO_RESET, /* GPDO 93 */\r
+ PORT_GPDO_RESET, /* GPDO 94 */\r
+ PORT_GPDO_RESET, /* GPDO 95 */\r
+ PORT_GPDO_RESET, /* GPDO 96 */\r
+ PORT_GPDO_RESET, /* GPDO 97 */\r
+ PORT_GPDO_RESET, /* GPDO 98 */\r
+ PORT_GPDO_RESET, /* GPDO 99 */\r
+ PORT_GPDO_RESET, /* GPDO 100 */\r
+ PORT_GPDO_RESET, /* GPDO 101 */\r
+ PORT_GPDO_RESET, /* GPDO 102 */\r
+ PORT_GPDO_RESET, /* GPDO 103 */\r
+ PORT_GPDO_RESET, /* GPDO 104 */\r
+ PORT_GPDO_RESET, /* GPDO 105 */\r
+ PORT_GPDO_RESET, /* GPDO 106 */\r
+ PORT_GPDO_RESET, /* GPDO 107 */\r
+ PORT_GPDO_RESET, /* GPDO 108 */\r
+ PORT_GPDO_RESET, /* GPDO 109 */\r
+ PORT_GPDO_RESET, /* GPDO 110 */\r
+ PORT_GPDO_RESET, /* GPDO 111 */\r
+ PORT_GPDO_RESET, /* GPDO 112 */\r
+ PORT_GPDO_RESET, /* GPDO 113 */\r
+ PORT_GPDO_RESET, /* GPDO 114 */\r
+ PORT_GPDO_RESET, /* GPDO 115 */\r
+ PORT_GPDO_RESET, /* GPDO 116 */\r
+ PORT_GPDO_RESET, /* GPDO 117 */\r
+ PORT_GPDO_RESET, /* GPDO 118 */\r
+ PORT_GPDO_RESET, /* GPDO 119 */\r
+ PORT_GPDO_RESET, /* GPDO 120 */\r
+ PORT_GPDO_RESET, /* GPDO 121 */\r
+ PORT_GPDO_RESET, /* GPDO 122 */\r
+ PORT_GPDO_RESET, /* GPDO 123 */\r
+ PORT_GPDO_RESET, /* GPDO 124 */\r
+ PORT_GPDO_RESET, /* GPDO 125 */\r
+ PORT_GPDO_RESET, /* GPDO 126 */\r
+ PORT_GPDO_RESET, /* GPDO 127 */\r
+ PORT_GPDO_RESET, /* GPDO 128 */\r
+ PORT_GPDO_RESET, /* GPDO 129 */\r
+ PORT_GPDO_RESET, /* GPDO 130 */\r
+ PORT_GPDO_RESET, /* GPDO 131 */\r
+ PORT_GPDO_RESET, /* GPDO 132 */\r
+ PORT_GPDO_RESET, /* GPDO 133 */\r
+ PORT_GPDO_RESET, /* GPDO 134 */\r
+ PORT_GPDO_RESET, /* GPDO 135 */\r
+ PORT_GPDO_RESET, /* GPDO 136 */\r
+ PORT_GPDO_RESET, /* GPDO 137 */\r
+ PORT_GPDO_RESET, /* GPDO 138 */\r
+ PORT_GPDO_RESET, /* GPDO 139 */\r
+ PORT_GPDO_RESET, /* GPDO 140 */\r
+ PORT_GPDO_RESET, /* GPDO 141 */\r
+ PORT_GPDO_RESET, /* GPDO 142 */\r
+ PORT_GPDO_RESET, /* GPDO 143 */\r
+ PORT_GPDO_RESET, /* GPDO 144 */\r
+ PORT_GPDO_RESET, /* GPDO 145 */\r
+ PORT_GPDO_RESET, /* GPDO 146 */\r
+ PORT_GPDO_RESET, /* GPDO 147 */\r
+ PORT_GPDO_RESET, /* GPDO 148 */\r
+ PORT_GPDO_RESET, /* GPDO 149 */\r
+ PORT_GPDO_RESET, /* GPDO 150 */\r
+ PORT_GPDO_RESET, /* GPDO 151 */\r
+ PORT_GPDO_RESET, /* GPDO 152 */\r
+ PORT_GPDO_RESET, /* GPDO 153 */\r
+ PORT_GPDO_RESET, /* GPDO 154 */\r
+ PORT_GPDO_RESET, /* GPDO 155 */\r
+ PORT_GPDO_RESET, /* GPDO 156 */\r
+ PORT_GPDO_RESET, /* GPDO 157 */\r
+ PORT_GPDO_RESET, /* GPDO 158 */\r
+ PORT_GPDO_RESET, /* GPDO 159 */\r
+ PORT_GPDO_RESET, /* GPDO 160 */\r
+ PORT_GPDO_RESET, /* GPDO 161 */\r
+ PORT_GPDO_RESET, /* GPDO 162 */\r
+ PORT_GPDO_RESET, /* GPDO 163 */\r
+ PORT_GPDO_RESET, /* GPDO 164 */\r
+ PORT_GPDO_RESET, /* GPDO 165 */\r
+ PORT_GPDO_RESET, /* GPDO 166 */\r
+ PORT_GPDO_RESET, /* GPDO 167 */\r
+ PORT_GPDO_RESET, /* GPDO 168 */\r
+ PORT_GPDO_RESET, /* GPDO 169 */\r
+ PORT_GPDO_RESET, /* GPDO 170 */\r
+ PORT_GPDO_RESET, /* GPDO 171 */\r
+ PORT_GPDO_RESET, /* GPDO 172 */\r
+ PORT_GPDO_RESET, /* GPDO 173 */\r
+ PORT_GPDO_RESET, /* GPDO 174 */\r
+ PORT_GPDO_RESET, /* GPDO 175 */\r
+ PORT_GPDO_RESET, /* GPDO 176 */\r
+ PORT_GPDO_RESET, /* GPDO 177 */\r
+ PORT_GPDO_RESET, /* GPDO 178 */\r
+ PORT_GPDO_RESET, /* GPDO 179 */\r
+ PORT_GPDO_RESET, /* GPDO 180 */\r
+ PORT_GPDO_RESET, /* GPDO 181 */\r
+ PORT_GPDO_RESET, /* GPDO 182 */\r
+ PORT_GPDO_RESET, /* GPDO 183 */\r
+ PORT_GPDO_RESET, /* GPDO 184 */\r
+ PORT_GPDO_RESET, /* GPDO 185 */\r
+ PORT_GPDO_RESET, /* GPDO 186 */\r
+ PORT_GPDO_RESET, /* GPDO 187 */\r
+ PORT_GPDO_RESET, /* GPDO 188 */\r
+ PORT_GPDO_RESET, /* GPDO 189 */\r
+ PORT_GPDO_RESET, /* GPDO 190 */\r
+ PORT_GPDO_RESET, /* GPDO 191 */\r
+ PORT_GPDO_RESET, /* GPDO 192 */\r
+ PORT_GPDO_RESET, /* GPDO 193 */\r
+ PORT_GPDO_RESET, /* GPDO 194 */\r
+ PORT_GPDO_RESET, /* GPDO 195 */\r
+ PORT_GPDO_RESET, /* GPDO 196 */\r
+ PORT_GPDO_RESET, /* GPDO 197 */\r
+ PORT_GPDO_RESET, /* GPDO 198 */\r
+ PORT_GPDO_RESET, /* GPDO 199 */\r
+ PORT_GPDO_RESET, /* GPDO 200 */\r
+ PORT_GPDO_RESET, /* GPDO 201 */\r
+ PORT_GPDO_RESET, /* GPDO 202 */\r
+ PORT_GPDO_RESET, /* GPDO 203 */\r
+ PORT_GPDO_RESET, /* GPDO 204 */\r
+ PORT_GPDO_RESET, /* GPDO 205 */\r
+ PORT_GPDO_RESET, /* GPDO 206 */\r
+ PORT_GPDO_RESET, /* GPDO 207 */\r
+ PORT_GPDO_RESET, /* GPDO 208 */\r
+ PORT_GPDO_RESET, /* GPDO 209 */\r
+ PORT_GPDO_RESET, /* GPDO 210 */\r
+ PORT_GPDO_RESET, /* GPDO 211 */\r
+ PORT_GPDO_RESET, /* GPDO 212 */\r
+ PORT_GPDO_RESET, /* GPDO 213 */\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = sizeof(PortPadConfigData),\r
+ .padConfig = PortPadConfigData,\r
+ .outCnt = sizeof(PortOutConfigData),\r
+ .outConfig = PortOutConfigData,\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:18:05 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+\r
+#define PORT_BIT0 (1<<15)\r
+#define PORT_BIT1 (1<<14)\r
+#define PORT_BIT2 (1<<13)\r
+#define PORT_BIT3 (1<<12)\r
+#define PORT_BIT4 (1<<11)\r
+#define PORT_BIT5 (1<<10)\r
+#define PORT_BIT6 (1<<9)\r
+#define PORT_BIT7 (1<<8)\r
+#define PORT_BIT8 (1<<7)\r
+#define PORT_BIT9 (1<<6)\r
+#define PORT_BIT10 (1<<5)\r
+#define PORT_BIT11 (1<<4)\r
+#define PORT_BIT12 (1<<3)\r
+#define PORT_BIT13 (1<<2)\r
+#define PORT_BIT14 (1<<1)\r
+#define PORT_BIT15 (1<<0)\r
+\r
+#define PORT_WPE_BIT PORT_BIT14\r
+#define PORT_WPS_BIT PORT_BIT15\r
+#define PORT_SRC0 PORT_BIT12\r
+#define PORT_SRC1 PORT_BIT13\r
+\r
+#define PORT_PULL_UP (PORT_WPE_BIT|PORT_WPS_BIT)\r
+#define PORT_PULL_DOWN (PORT_WPE_BIT)\r
+#define PORT_PULL_NONE 0\r
+#define PORT_SLEW_RATE_MIN 0\r
+#define PORT_SLEW_RATE_MED PORT_BIT13\r
+#define PORT_SLEW_RATE_MAX (PORT_BIT12|PORT_BIT13)\r
+#define PORT_HYS_ENABLE PORT_BIT11\r
+#define PORT_ODE_ENABLE PORT_BIT10\r
+#define PORT_IBE_ENABLE PORT_BIT7\r
+#define PORT_OBE_ENABLE PORT_BIT6\r
+#define PORT_IO (0)\r
+#define PORT_FUNC0 (0)\r
+#define PORT_FUNC1 (PORT_BIT5)\r
+#define PORT_FUNC2 (PORT_BIT4)\r
+#define PORT_FUNC3 (PORT_BIT4|PORT_BIT5)\r
+#define PORT_FUNC4 (PORT_BIT3)\r
+\r
+#define PORT_PCR_RESET (0)\r
+#define PORT_GPDO_RESET (0)\r
+\r
+#define PORT_GPDO_HIGH (1)\r
+\r
+\r
+typedef uint16 Port_PinType;\r
+\r
+typedef struct\r
+{\r
+ uint16_t padCnt;\r
+ const uint16_t *padConfig;\r
+ uint16_t outCnt;\r
+ const uint8_t *outConfig;\r
+// uint16_t inCnt;\r
+// const uint8_t *inConfig;\r
+} Port_ConfigType;\r
+\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#define PORT_PIN_NAME_GPIO125 125 \r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ A = 0,\r
+ B = 1,\r
+ C = 2,\r
+ D = 3,\r
+ E = 4,\r
+ F = 5,\r
+ G = 6,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 29\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 30\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (B)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_LED_PORT, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += PORT DIO \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 13:05:28 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 13:05:28 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Jan 24 13:05:28 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:22:38 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 8000000UL,\r
+ .Pll1 = 9,\r
+ .Pll2 = 0,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+const Mcu_PerClockConfigType McuPerClockConfigData =\r
+{ \r
+ .AHBClocksEnable = RCC_AHBPeriph_DMA1,\r
+ .APB1ClocksEnable = RCC_APB1Periph_TIM2 | RCC_APB1Periph_CAN1,\r
+ .APB2ClocksEnable = RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO\r
+};\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 14:22:38 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Mcu_ConfigTypes.h"\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_ON \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_8MHZ = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
* Configuration of module Os (Os_Cfg.c)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F103\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Thu Dec 02 16:54:35 CET 2010\r
+ * on Wed Jan 26 12:28:57 CET 2011\r
*/\r
\r
\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F103\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Thu Dec 02 16:54:35 CET 2010\r
+ * on Wed Jan 26 12:28:57 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+ \r
+#include "stm32f10x_gpio.h"\r
+#include "port.h"\r
+\r
+const uint32 remaps[] = {\r
+ GPIO_Remap1_CAN1,\r
+ GPIO_PartialRemap2_TIM2,\r
+};\r
+\r
+const GpioPinCnfMode_Type GPIOConf[] =\r
+{\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_14 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+};\r
+\r
+\r
+const GpioPinOutLevel_Type GPIOOutConf[] =\r
+{\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_14 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = 7,\r
+ .padConfig = GPIOConf,\r
+ .outConfig = GPIOOutConf,\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(uint32),\r
+ .remaps = &remaps[0]\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Wed Jan 26 12:28:57 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Port_ConfigTypes.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_OFF\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*\r
+ * Configuration of module Det (Det_cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error "Det: Configuration file version differs from BSW version."
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ A = 0,\r
+ B = 1,\r
+ C = 2,\r
+ D = 3,\r
+ E = 4,\r
+ F = 5,\r
+ G = 6,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_LED_CHANNEL1 55\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL2 61\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL3 51\r
+#define DIO_CHANNEL_NAME_LED_CHANNEL4 52\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_LED_PORT (D)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_LED_CHANNEL1,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL2,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL3,\r
+ DIO_CHANNEL_NAME_LED_CHANNEL4,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_LED_PORT, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+\r
+MOD_USE += DIO PORT MCU \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Callout_template.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:28:13 CET 2011\r
+ */\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Cbk.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();\r
+ Det_Start();\r
+}\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ // Set up default clock (Mcu_InitClock requires initRun==1)\r
+ // Ignoring return value\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+ // TODO\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EEpConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:28:13 CET 2011\r
+ */\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_OFF\r
+\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+// EcuM_UserType definitions\r
+typedef enum {\r
+ ECUM_USER_SYSTEM, // Dummy user to get at least one user in system\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+#endif /*ECUM_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module EcuM (EcuM_Generated_Types.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:28:13 CET 2011\r
+ */\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 25000000UL,\r
+ .Pll1 = 9,\r
+ .Pll2 = 8,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+const Mcu_PerClockConfigType McuPerClockConfigData =\r
+{ \r
+ .AHBClocksEnable = RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_ETH_MAC | RCC_AHBPeriph_ETH_MAC_Tx | RCC_AHBPeriph_ETH_MAC_Rx,\r
+ .APB1ClocksEnable = RCC_APB1Periph_TIM2 | RCC_APB1Periph_CAN1,\r
+ .APB2ClocksEnable = RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO\r
+};\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Mcu_ConfigTypes.h"\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_OFF \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_EXT_REF_25MHZ = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
* Configuration of module Os (Os_Cfg.c)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F107\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:40:47 CET 2010\r
+ * on Fri Jan 21 11:32:26 CET 2011\r
*/\r
\r
\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F107\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:40:47 CET 2010\r
+ * on Fri Jan 21 11:32:26 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+ \r
+#include "stm32f10x_gpio.h"\r
+#include "port.h"\r
+\r
+const uint32 remaps[] = {\r
+};\r
+\r
+const GpioPinCnfMode_Type GPIOConf[] =\r
+{\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_4 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = GPIO_OUTPUT_10MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+};\r
+\r
+\r
+const GpioPinOutLevel_Type GPIOOutConf[] =\r
+{\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_4 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = GPIO_OUTPUT_HIGH, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = 7,\r
+ .padConfig = GPIOConf,\r
+ .outConfig = GPIOOutConf,\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(uint32),\r
+ .remaps = &remaps[0]\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F107\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 21 11:32:26 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Port_ConfigTypes.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_ON\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /* PORT_CFG_H_ */\r
#include "Pwm.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#define USE_TRACE 1\r
-#define USE_LDEBUG_PRINTF 1\r
+\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
/* Notification callback from channel 0 */\r
\r
/* Global hooks */\r
ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
- LDEBUG_PRINTF("## ProtectionHook\n");\r
+ LDEBUG_FPUTS("## ProtectionHook\n");\r
return PRO_KILLAPPL;\r
}\r
\r
void StartupHook( void ) {\r
- LDEBUG_PRINTF("## StartupHook\n");\r
-\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
+ LDEBUG_FPUTS("## StartupHook\n");\r
\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
- LDEBUG_PRINTF("## ShutdownHook\n");\r
+ LDEBUG_FPUTS("## ShutdownHook\n");\r
while(1);\r
}\r
\r
}\r
// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#include <stdio.h>\r
#include <assert.h>\r
#include "pwm_sine_main.h"\r
+\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
-//#include "WdgM.h"\r
\r
\r
void OsIdle( void ) {\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:28:34 CET 2010\r
+ * on Fri Jan 14 16:54:45 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:28:34 CET 2010\r
+ * on Fri Jan 14 16:54:45 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if ((OS_SW_MAJOR_VERSION != 2))
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:28:34 CET 2010\r
+ * on Fri Jan 14 16:54:45 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:28:34 CET 2010\r
+ * on Fri Jan 14 16:54:45 CET 2011\r
*/\r
\r
-#if (PORT_SW_MAJOR_VERSION != 1)
+#if ((PORT_SW_MAJOR_VERSION != 1))
#error "Port: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 16:24:11 CET 2010\r
+ * on Fri Jan 14 16:54:45 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 16:24:11 CET 2010\r
+ * on Fri Jan 14 16:54:45 CET 2011\r
*/\r
\r
-#if (PWM_SW_MAJOR_VERSION != 1)
+#if ((PWM_SW_MAJOR_VERSION != 1))
#error "Pwm: Configuration file version differs from BSW version."
#endif
*/\r
\r
\r
-#if (OS_SW_MAJOR_VERSION != 2) \r
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )\r
#error "Os: Configuration file version differs from BSW version."\r
#endif\r
\r
\r
\r
\r
+#include "Port.h"\r
#include "Port_Cfg.h"\r
\r
// All: PA,OBE,IBE,ODE,HYS,SRC,WPE,WPS\r
\r
\r
\r
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )\r
+#error "Port: Configuration file version differs from BSW version."\r
+#endif\r
\r
\r
#ifndef PORT_CFG_H_\r
*/\r
\r
\r
-#if (PWM_SW_MAJOR_VERSION != 1) \r
+#if !(((PWM_SW_MAJOR_VERSION == 1) && (PWM_SW_MINOR_VERSION == 0)) )\r
#error "Pwm: Configuration file version differs from BSW version."\r
#endif\r
\r
-/* \r
-* Configuration of module Os (Os_Cfg.c)\r
-* \r
-* Created by: ArcCore AB\r
-* Configured for (MCU): MPC5567\r
-* \r
-* Module editor vendor: ArcCore\r
-* Module editor version: 2.0.7\r
-* \r
-* Copyright ArcCore AB 2010\r
-* Generated by Arctic Studio (http://arccore.com)\r
-* on Mon May 03 11:16:23 CEST 2010\r
-*/\r
+/*\r
+ * Configuration of module Os (Os_Cfg.c)\r
+ *\r
+ * Created by: ArcCore AB\r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.11\r
+ *\r
+ * Copyright ArcCore AB 2010\r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 14 10:50:59 CET 2011\r
+ */\r
\r
\r
\r
COUNTER_UNIT_NANO,\r
0xffff,\r
1,\r
- 1,\r
+ 0,\r
0),\r
};\r
\r
\r
// ################################ RESOURCES ###############################\r
GEN_RESOURCE_HEAD {\r
- GEN_RESOURCE( \r
- RES_SCHEDULER,\r
- RESOURCE_TYPE_STANDARD,\r
- 0\r
- ),\r
};\r
\r
// ############################## STACKS (TASKS) ############################\r
-/* \r
-* Configuration of module Os (Os_Cfg.h)\r
-* \r
-* Created by: ArcCore AB\r
-* Configured for (MCU): MPC5567\r
-* \r
-* Module editor vendor: ArcCore\r
-* Module editor version: 2.0.7\r
-* \r
-* Copyright ArcCore AB 2010\r
-* Generated by Arctic Studio (http://arccore.com)\r
-* on Mon May 03 11:16:23 CEST 2010\r
-*/\r
-\r
-\r
-#if (OS_SW_MAJOR_VERSION != 2) \r
-#error "Os: Configuration file version differs from BSW version."\r
-#endif\r
-\r
+/*\r
+ * Configuration of module Os (Os_Cfg.h)\r
+ *\r
+ * Created by: ArcCore AB\r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.11\r
+ *\r
+ * Copyright ArcCore AB 2010\r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 14 10:50:59 CET 2011\r
+ */\r
+\r
+
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef OS_CFG_H_\r
#define OS_CFG_H_\r
-/* \r
-* Configuration of module Port (Port_Cfg.c)\r
-* \r
-* Created by: \r
-* Configured for (MCU): MPC5567\r
-* \r
-* Module vendor: ArcCore\r
-* Module version: 1.0.0\r
-* \r
-* \r
-* Generated by Arctic Studio (http://arccore.com)\r
-* on Fri Apr 09 13:44:55 CEST 2010\r
-*/\r
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: ArcCore AB\r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * Copyright ArcCore AB 2010\r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 14 10:50:58 CET 2011\r
+ */\r
\r
\r
-// File generated on Fri Apr 09 13:44:55 CEST 2010\r
+// File generated on Fri Jan 14 10:50:58 CET 2011\r
// File generated by com.arccore.bswbuilder.modules.port.mpc5567\r
\r
#include "Port.h"\r
#include "Port_Cfg.h"\r
-#include "stdlib.h"\r
+#include <stdlib.h>\r
\r
const uint16_t PortPadConfigData[] = {\r
PORT_PCR_RESET, /* PCR 0 */\r
-/* \r
-* Configuration of module Port (Port_Cfg.h)\r
-* \r
-* Created by: \r
-* Configured for (MCU): MPC5567\r
-* \r
-* Module vendor: ArcCore\r
-* Module version: 1.0.0\r
-* \r
-* \r
-* Generated by Arctic Studio (http://arccore.com)\r
-* on Fri Apr 09 13:44:55 CEST 2010\r
-*/\r
-\r
-\r
-#if (PORT_SW_MAJOR_VERSION != 1) \r
-#error "Port: Configuration file version differs from BSW version."\r
-#endif\r
-\r
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: ArcCore AB\r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * Copyright ArcCore AB 2010\r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 14 10:50:58 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
#define PORT_VERSION_INFO_API STD_OFF\r
#define PORT_DEV_ERROR_DETECT STD_ON\r
-#define PORT_SET_PIN_MODE_API STD_ON\r
-#define PORT_SET_PIN_DIRECTION_API STD_OFF\r
+#define PORT_SET_PIN_MODE_API STD_OFF\r
+#define PORT_SET_PIN_DIRECTION_API STD_OFF\r
\r
#define PORT_BIT0 (1<<15)\r
#define PORT_BIT1 (1<<14)\r
\r
extern const Port_ConfigType PortConfigData;\r
\r
+#define PORT_PIN_NAME_EMIOS10 189 \r
+#define PORT_PIN_NAME_EMIOS12 191 \r
+\r
#endif /* PORT_CFG_H_ */\r
-/* \r
-* Configuration of module Pwm (Pwm_Cfg.c)\r
-* \r
-* Created by: \r
-* Configured for (MCU): MPC5567\r
-* \r
-* Module vendor: ArcCore\r
-* Module version: 1.0.0\r
-* \r
-* \r
-* Generated by Arctic Studio (http://arccore.com)\r
-* on Fri Apr 09 15:05:32 CEST 2010\r
-*/\r
+/*\r
+ * Configuration of module Pwm (Pwm_Cfg.c)\r
+ *\r
+ * Created by: ArcCore AB\r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * Copyright ArcCore AB 2010\r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 14 10:50:59 CET 2011\r
+ */\r
\r
/*\r
* Pwm_Cfg.c\r
},\r
#if PWM_NOTIFICATION_SUPPORTED==ON\r
.NotificationHandlers = {\r
- // Notification routine for PWM_CHANNEL_1\r
- MyPwmNotificationRoutine,\r
- \r
- // Notification routine for PWM_CHANNEL_2\r
- NULL,\r
- \r
+// Notification routine for PWM_CHANNEL_1\r
+ MyPwmNotificationRoutine, \r
+// Notification routine for PWM_CHANNEL_2\r
+ NULL, \r
}\r
#endif\r
};\r
- \r
-/* \r
-* Configuration of module Pwm (Pwm_Cfg.h)\r
-* \r
-* Created by: \r
-* Configured for (MCU): MPC5567\r
-* \r
-* Module vendor: ArcCore\r
-* Module version: 1.0.0\r
-* \r
-* \r
-* Generated by Arctic Studio (http://arccore.com)\r
-* on Fri Apr 09 15:05:32 CEST 2010\r
-*/\r
-\r
-\r
-#if (PWM_SW_MAJOR_VERSION != 1) \r
-#error "Pwm: Configuration file version differs from BSW version."\r
-#endif\r
+/*\r
+ * Configuration of module Pwm (Pwm_Cfg.h)\r
+ *\r
+ * Created by: ArcCore AB\r
+ * Configured for (MCU): MPC5567\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.1\r
+ *\r
+ * Copyright ArcCore AB 2010\r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Jan 14 10:50:59 CET 2011\r
+ */\r
\r
+
+#if !(((PWM_SW_MAJOR_VERSION == 1) && (PWM_SW_MINOR_VERSION == 0)) )
+#error "Pwm: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
}\r
\r
#endif /* PWM_CFG_H_ */\r
-
\ No newline at end of file
<?xml version="1.0" encoding="UTF-8"?>\r
-<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2">\r
+ <TOP-LEVEL-PACKAGES>\r
<AR-PACKAGE UUID="55d13f76-fbd7-4f4f-894f-6e893bb4af68">\r
<SHORT-NAME>pwm_node_mpc5567</SHORT-NAME>\r
<CATEGORY>EcuConfiguration</CATEGORY>\r
<ADMIN-DATA>\r
<DOC-REVISIONS>\r
<DOC-REVISION>\r
- <ISSUED-BY/>\r
+ <ISSUED-BY />\r
</DOC-REVISION>\r
</DOC-REVISIONS>\r
</ADMIN-DATA>\r
<SD GID="MCU">MPC5567</SD>\r
<SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
<SD GID="AUTHOR">ArcCore AB</SD>\r
- <SD GID="GENDIR"></SD>\r
+ <SD GID="GENDIR" />\r
</SDG>\r
</SDGS>\r
</ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/pwm_node_mpc5567/SwComposition_pwm_node_mpc5567</ECU-SW-COMPOSITION-REF>\r
<MODULE-REFS>\r
<MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node_mpc5567/Port</MODULE-REF>\r
<MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node_mpc5567/Pwm</MODULE-REF>\r
<SHORT-NAME>Port</SHORT-NAME>\r
<ADMIN-DATA>\r
<SDGS>\r
- <SDG/>\r
+ <SDG />\r
<SDG GID="Arccore::ModuleOptions">\r
<SD GID="GENERATE_AND_VALIDATE">true</SD>\r
<SD GID="ARCCORE_EDITOR_VERSION">1.0.0</SD>\r
<SHORT-NAME>Pwm</SHORT-NAME>\r
<ADMIN-DATA>\r
<SDGS>\r
- <SDG/>\r
+ <SDG />\r
<SDG GID="Arccore::ModuleOptions">\r
<SD GID="GENERATE_AND_VALIDATE">true</SD>\r
<SD GID="ARCCORE_EDITOR_VERSION">1.0.0</SD>\r
</ENUMERATION-VALUE>\r
<FUNCTION-NAME-VALUE>\r
<DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmNotification</DEFINITION-REF>\r
- <VALUE></VALUE>\r
+ <VALUE />\r
</FUNCTION-NAME-VALUE>\r
<FLOAT-VALUE>\r
<DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPeriodDefault</DEFINITION-REF>\r
<SHORT-NAME>Os</SHORT-NAME>\r
<ADMIN-DATA>\r
<SDGS>\r
- <SDG/>\r
+ <SDG />\r
<SDG GID="Arccore::ModuleOptions">\r
<SD GID="GENERATE_AND_VALIDATE">true</SD>\r
<SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
</CONTAINER>\r
</CONTAINERS>\r
</MODULE-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="11a49707-21e6-4cba-b31c-dccc09708eed">\r
+ <SHORT-NAME>SwComposition_pwm_node_mpc5567</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
</ELEMENTS>\r
</AR-PACKAGE>\r
- </TOP-LEVEL-PACKAGES></AUTOSAR>\r
+ </TOP-LEVEL-PACKAGES>\r
+</AUTOSAR>\r
+\r
\r
\r
#include "Os.h"\r
+#include "Mcu.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#define USE_TRACE 1\r
-#include "debug.h"\r
-#include "Mcu.h"\r
-\r
-\r
-#if 0\r
-#ifdef USE_STARTUPHOOK\r
-#ifdef CFG_MPC55XX\r
-#if !defined(USE_SIMULATOR)\r
-// Quick fix\r
-//#include "Kernel_Offset.h"\r
\r
-extern uint8_t pcb_list[];\r
-\r
-#endif\r
-#endif\r
-#endif\r
-#endif\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
\r
\r
\r
/* Global hooks */\r
ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
- LDEBUG_PRINTF("## ProtectionHook\n");\r
+ LDEBUG_FPUTS("## ProtectionHook\n");\r
return PRO_KILLAPPL;\r
}\r
\r
void StartupHook( void ) {\r
- LDEBUG_PRINTF("## StartupHook\n");\r
+ LDEBUG_FPUTS("## StartupHook\n");\r
\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
- LDEBUG_PRINTF("## ShutdownHook\n");\r
+ LDEBUG_FPUTS("## ShutdownHook\n");\r
while(1);\r
}\r
\r
void PostTaskHook( void ) {\r
// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#include "EcuM.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#include "debug.h"\r
#include "Com.h"\r
#include "pwm_node2_helpers.h"\r
\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
+\r
void OsIdle( void ) {\r
for(;;);\r
}\r
* Configured for (MCU): HCS12\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
\r
.WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
.CanIfControllerIdRef = CANIF_CHANNEL_0,\r
.CanIfDriverNameRef = "FLEXCAN", // Not used\r
- .CanIfInitControllerRef = &CanControllerConfigData[0],\r
+ .CanIfInitControllerRef = &CanControllerConfigData[1],\r
},\r
\r
};\r
* Configured for (MCU): HCS12\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (CANIF_SW_MAJOR_VERSION != 1 && CANIF_SW_MINOR_VERSION != 1)
+#if !(((CANIF_SW_MAJOR_VERSION == 1) && (CANIF_SW_MINOR_VERSION == 1)) )
#error "CanIf: Configuration file version differs from BSW version."
#endif
CANIF_SOFTFILTER_TYPE_INDEX, // Not supported\r
CANIF_SOFTFILTER_TYPE_LINEAR, // Not supported\r
CANIF_SOFTFILTER_TYPE_TABLE, // Not supported\r
- CANIF_SOFTFILTER_TYPE_MASK, // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
+ CANIF_SOFTFILTER_TYPE_MASK // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
} CanIf_SoftwareFilterTypeType;\r
\r
typedef enum {\r
CANIF_USER_TYPE_CAN_NM,\r
CANIF_USER_TYPE_CAN_TP,\r
CANIF_USER_TYPE_CAN_PDUR,\r
- CANIF_USER_TYPE_CAN_SPECIAL,\r
+ CANIF_USER_TYPE_CAN_SPECIAL\r
} CanIf_UserTypeType;\r
\r
\r
#define CANIF_TRANSCEIVER_API STD_OFF // Not supported\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
-\r
//-------------------------------------------------------------------\r
/*\r
* CanIfHrhRangeConfig container\r
typedef enum {\r
CANIF_WAKEUP_SUPPORT_CONTROLLER,\r
CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
- CANIF_WAKEUP_SUPPORT_TRANSCEIVER,\r
+ CANIF_WAKEUP_SUPPORT_TRANSCEIVER\r
} CanIf_WakeupSupportType;\r
\r
\r
// CanIf-specific id of the controller\r
CanIf_Arc_ChannelIdType CanIfControllerIdRef;\r
\r
- const char CanIfDriverNameRef[8]; // Not used\r
+ const uint8 CanIfDriverNameRef[8]; // Not used\r
\r
const Can_ControllerConfigType *CanIfInitControllerRef;\r
} CanIf_ControllerConfigType;\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (CAN_SW_MAJOR_VERSION != 1)
+#if !(((CAN_SW_MAJOR_VERSION == 1) && (CAN_SW_MINOR_VERSION == 0)) )
#error "Can: Configuration file version differs from BSW version."
#endif
typedef enum {\r
CAN_ID_TYPE_EXTENDED,\r
CAN_ID_TYPE_MIXED,\r
- CAN_ID_TYPE_STANDARD,\r
+ CAN_ID_TYPE_STANDARD\r
} Can_IdTypeType;\r
\r
typedef enum {\r
CAN_OBJECT_TYPE_RECEIVE,\r
- CAN_OBJECT_TYPE_TRANSMIT,\r
+ CAN_OBJECT_TYPE_TRANSMIT\r
} Can_ObjectTypeType;\r
\r
\r
typedef struct {\r
// Specifies the InstanceId of this module instance. If only one instance is\r
// present it shall have the Id 0\r
- int CanIndex;\r
+ uint8 CanIndex;\r
} Can_GeneralType;\r
\r
// Start mc9s12 unique\r
\r
typedef enum {\r
CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
- CAN_ARC_PROCESS_TYPE_POLLING,\r
+ CAN_ARC_PROCESS_TYPE_POLLING\r
} Can_Arc_ProcessType;\r
\r
typedef struct {\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:17 CET 2010\r
+ * on Mon Jan 17 08:38:48 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
\r
-#ifndef COM_CFG_H_\r
-#define COM_CFG_H_\r
+#ifndef COM_CFG_H\r
+#define COM_CFG_H\r
\r
#define COM_MODULE_ID 20\r
#define COM_INSTANCE_ID 1\r
#define ComConfigurationTimeBase 0.0\r
#define ComVersionInfoApi\r
\r
-#endif /*COM_CFG_H_*/\r
+#endif /*COM_CFG_H*/\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
\r
#include "Com.h"\r
-#include "stdlib.h"\r
+#include "Com_Internal.h"\r
+#include <stdlib.h>\r
#if defined(USE_PDUR)\r
#include "PduR.h"\r
#endif\r
.ComNotification = NULL,\r
.ComTimeoutFactor = 0,\r
.ComTimeoutNotification = NULL,\r
+ .ComErrorNotification = NULL,\r
.ComTransferProperty = TRIGGERED,\r
\r
+ .ComUpdateBitPosition = 0,\r
+ .ComSignalArcUseUpdateBit = 0,\r
+ \r
\r
.ComSignalInitValue = &Com_SignalInitValue_SetLedLevelRx,\r
.ComBitPosition = 7,\r
.ComBitSize = 16,\r
.ComSignalEndianess = COM_BIG_ENDIAN,\r
.ComSignalType = UINT16,\r
+ .Com_Arc_IsSignalGroup = 0,\r
.ComGroupSignal = NULL,\r
\r
+ .ComRxDataTimeoutAction = COM_TIMEOUT_DATA_ACTION_NONE,\r
+ .Com_Arc_EOL = 0\r
},\r
{\r
.Com_Arc_EOL = 1\r
*/\r
const ComIPduGroup_type ComIPduGroup[] = {\r
{\r
- .ComIPduGroupHandleId = RxGroup\r
+ .ComIPduGroupHandleId = RxGroup,\r
+ .Com_Arc_EOL = 0\r
},\r
\r
{\r
.ComIPduDirection = RECEIVE,\r
.ComIPduGroupRef = RxGroup,\r
\r
+ .ComTxIPdu = {\r
+ .ComTxIPduMinimumDelayFactor = 0,\r
+ .ComTxIPduUnusedAreasDefault = 0,\r
+ .ComTxModeTrue = {\r
+ .ComTxModeMode = NONE,\r
+ .ComTxModeNumberOfRepetitions = 0,\r
+ .ComTxModeRepetitionPeriodFactor = 0,\r
+ .ComTxModeTimeOffsetFactor = 0,\r
+ .ComTxModeTimePeriodFactor = 0,\r
+ },\r
+ },\r
+ \r
.ComIPduSignalRef = ComIPduSignalRefs_LedCommandRx,\r
+ .Com_Arc_EOL = 0\r
}, \r
{\r
.Com_Arc_EOL = 1\r
.ComGroupSignal = ComGroupSignal\r
};\r
\r
+/* IPdu buffers and signal group buffers */\r
+uint8 ComArcIPduBuffer_LedCommandRx[8];\r
+ \r
+\r
+Com_Arc_IPdu_type Com_Arc_IPdu[] = {\r
+ { // LedCommandRx\r
+ .Com_Arc_TxIPduTimers = {\r
+ .ComTxIPduNumberOfRepetitionsLeft = 0,\r
+ .ComTxModeRepetitionPeriodTimer = 0,\r
+ .ComTxIPduMinimumDelayTimer = 0,\r
+ .ComTxModeTimePeriodTimer = 0\r
+ },\r
+ .ComIPduDataPtr = ComArcIPduBuffer_LedCommandRx,\r
+ .Com_Arc_IpduStarted = 0 \r
+ },\r
+};\r
+\r
+Com_Arc_Signal_type Com_Arc_Signal[] = {\r
+ { // SetLedLevelRx\r
+ .Com_Arc_DeadlineCounter = 0,\r
+ .ComTimeoutFactor = 0,\r
+ .ComIPduHandleId = 0,\r
+ .ComSignalUpdated = 0,\r
+ .ComIPduDataPtr = NULL,\r
+ \r
+ .Com_Arc_ShadowBuffer = NULL\r
+ \r
+ },\r
+ \r
+};\r
+\r
+Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_N_GROUP_SIGNALS];\r
+\r
+uint8 outgoingSduPtr[8];\r
+\r
+Com_Arc_Config_type Com_Arc_Config = {\r
+ .ComIPdu = Com_Arc_IPdu,\r
+ .ComSignal = Com_Arc_Signal,\r
+ .ComGroupSignal = Com_Arc_GroupSignal,\r
+ .OutgoingPdu = {\r
+ .SduDataPtr = outgoingSduPtr,\r
+ .SduLength = 0\r
+ }\r
+};\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
-#ifndef COM_PBCFG_H_\r
-#define COM_PBCFG_H_\r
+#ifndef COM_PBCFG_H\r
+#define COM_PBCFG_H\r
\r
#include "Com_Types.h"\r
\r
\r
\r
// PDU group definitions\r
-enum {\r
- RxGroup = 0,\r
-};\r
+#define RxGroup 0\r
+\r
\r
// Signal definitions\r
-enum {\r
- SetLedLevelRx = 0,\r
-};\r
+#define SetLedLevelRx 0\r
\r
\r
\r
\r
-#endif /* COM_PBCFG_H_ */\r
+#endif /* COM_PBCFG_H */\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (ECUM_SW_MAJOR_VERSION != 2 && ECUM_SW_MINOR_VERSION != 0)
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
#error "EcuM: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (PORT_SW_MAJOR_VERSION != 1)
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
#error "Port: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 17:45:16 CET 2010\r
+ * on Mon Jan 17 08:38:47 CET 2011\r
*/\r
\r
-#if (PWM_SW_MAJOR_VERSION != 1)
+#if !(((PWM_SW_MAJOR_VERSION == 1) && (PWM_SW_MINOR_VERSION == 0)) )
#error "Pwm: Configuration file version differs from BSW version."
#endif
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:29 CET 2011\r
*/\r
\r
\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:03 CET 2010\r
+ * on Mon Jan 17 11:45:29 CET 2011\r
*/\r
\r
-#if (CANIF_SW_MAJOR_VERSION != 1 && CANIF_SW_MINOR_VERSION != 1)
+#if !(((CANIF_SW_MAJOR_VERSION == 1) && (CANIF_SW_MINOR_VERSION == 1)) )
#error "CanIf: Configuration file version differs from BSW version."
#endif
CANIF_SOFTFILTER_TYPE_INDEX, // Not supported\r
CANIF_SOFTFILTER_TYPE_LINEAR, // Not supported\r
CANIF_SOFTFILTER_TYPE_TABLE, // Not supported\r
- CANIF_SOFTFILTER_TYPE_MASK, // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
+ CANIF_SOFTFILTER_TYPE_MASK // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
} CanIf_SoftwareFilterTypeType;\r
\r
typedef enum {\r
CANIF_USER_TYPE_CAN_NM,\r
CANIF_USER_TYPE_CAN_TP,\r
CANIF_USER_TYPE_CAN_PDUR,\r
- CANIF_USER_TYPE_CAN_SPECIAL,\r
+ CANIF_USER_TYPE_CAN_SPECIAL\r
} CanIf_UserTypeType;\r
\r
\r
#define CANIF_TRANSCEIVER_API STD_OFF // Not supported\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
-\r
//-------------------------------------------------------------------\r
/*\r
* CanIfHrhRangeConfig container\r
typedef enum {\r
CANIF_WAKEUP_SUPPORT_CONTROLLER,\r
CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
- CANIF_WAKEUP_SUPPORT_TRANSCEIVER,\r
+ CANIF_WAKEUP_SUPPORT_TRANSCEIVER\r
} CanIf_WakeupSupportType;\r
\r
\r
// CanIf-specific id of the controller\r
CanIf_Arc_ChannelIdType CanIfControllerIdRef;\r
\r
- const char CanIfDriverNameRef[8]; // Not used\r
+ const uint8 CanIfDriverNameRef[8]; // Not used\r
\r
const Can_ControllerConfigType *CanIfInitControllerRef;\r
} CanIf_ControllerConfigType;\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:03 CET 2010\r
+ * on Mon Jan 17 11:45:29 CET 2011\r
*/\r
\r
-#if (CAN_SW_MAJOR_VERSION != 1)
+#if !(((CAN_SW_MAJOR_VERSION == 1) && (CAN_SW_MINOR_VERSION == 0)) )
#error "Can: Configuration file version differs from BSW version."
#endif
typedef enum {\r
CAN_ID_TYPE_EXTENDED,\r
CAN_ID_TYPE_MIXED,\r
- CAN_ID_TYPE_STANDARD,\r
+ CAN_ID_TYPE_STANDARD\r
} Can_IdTypeType;\r
\r
typedef enum {\r
CAN_OBJECT_TYPE_RECEIVE,\r
- CAN_OBJECT_TYPE_TRANSMIT,\r
+ CAN_OBJECT_TYPE_TRANSMIT\r
} Can_ObjectTypeType;\r
\r
\r
typedef struct {\r
// Specifies the InstanceId of this module instance. If only one instance is\r
// present it shall have the Id 0\r
- int CanIndex;\r
+ uint8 CanIndex;\r
} Can_GeneralType;\r
\r
// Start mc9s12 unique\r
\r
typedef enum {\r
CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
- CAN_ARC_PROCESS_TYPE_POLLING,\r
+ CAN_ARC_PROCESS_TYPE_POLLING\r
} Can_Arc_ProcessType;\r
\r
typedef struct {\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:03 CET 2010\r
+ * on Mon Jan 17 11:45:29 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
\r
-#ifndef COM_CFG_H_\r
-#define COM_CFG_H_\r
+#ifndef COM_CFG_H\r
+#define COM_CFG_H\r
\r
#define COM_MODULE_ID 20\r
#define COM_INSTANCE_ID 1\r
#define ComConfigurationTimeBase 0.0\r
#define ComVersionInfoApi\r
\r
-#endif /*COM_CFG_H_*/\r
+#endif /*COM_CFG_H*/\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
\r
#include "Com.h"\r
-#include "stdlib.h"\r
+#include "Com_Internal.h"\r
+#include <stdlib.h>\r
#if defined(USE_PDUR)\r
#include "PduR.h"\r
#endif\r
.ComNotification = NULL,\r
.ComTimeoutFactor = 0,\r
.ComTimeoutNotification = NULL,\r
+ .ComErrorNotification = NULL,\r
.ComTransferProperty = TRIGGERED,\r
\r
+ .ComUpdateBitPosition = 0,\r
+ .ComSignalArcUseUpdateBit = 0,\r
+ \r
\r
.ComSignalInitValue = &Com_SignalInitValue_SetLedLevelRx,\r
.ComBitPosition = 7,\r
.ComBitSize = 16,\r
.ComSignalEndianess = COM_BIG_ENDIAN,\r
.ComSignalType = UINT16,\r
+ .Com_Arc_IsSignalGroup = 0,\r
.ComGroupSignal = NULL,\r
\r
+ .ComRxDataTimeoutAction = COM_TIMEOUT_DATA_ACTION_NONE,\r
+ .Com_Arc_EOL = 0\r
},\r
{\r
.Com_Arc_EOL = 1\r
*/\r
const ComIPduGroup_type ComIPduGroup[] = {\r
{\r
- .ComIPduGroupHandleId = RxGroup\r
+ .ComIPduGroupHandleId = RxGroup,\r
+ .Com_Arc_EOL = 0\r
},\r
\r
{\r
.ComIPduDirection = RECEIVE,\r
.ComIPduGroupRef = RxGroup,\r
\r
+ .ComTxIPdu = {\r
+ .ComTxIPduMinimumDelayFactor = 0,\r
+ .ComTxIPduUnusedAreasDefault = 0,\r
+ .ComTxModeTrue = {\r
+ .ComTxModeMode = NONE,\r
+ .ComTxModeNumberOfRepetitions = 0,\r
+ .ComTxModeRepetitionPeriodFactor = 0,\r
+ .ComTxModeTimeOffsetFactor = 0,\r
+ .ComTxModeTimePeriodFactor = 0,\r
+ },\r
+ },\r
+ \r
.ComIPduSignalRef = ComIPduSignalRefs_LedCommandRx,\r
+ .Com_Arc_EOL = 0\r
}, \r
{\r
.Com_Arc_EOL = 1\r
.ComGroupSignal = ComGroupSignal\r
};\r
\r
+/* IPdu buffers and signal group buffers */\r
+uint8 ComArcIPduBuffer_LedCommandRx[8];\r
+ \r
+\r
+Com_Arc_IPdu_type Com_Arc_IPdu[] = {\r
+ { // LedCommandRx\r
+ .Com_Arc_TxIPduTimers = {\r
+ .ComTxIPduNumberOfRepetitionsLeft = 0,\r
+ .ComTxModeRepetitionPeriodTimer = 0,\r
+ .ComTxIPduMinimumDelayTimer = 0,\r
+ .ComTxModeTimePeriodTimer = 0\r
+ },\r
+ .ComIPduDataPtr = ComArcIPduBuffer_LedCommandRx,\r
+ .Com_Arc_IpduStarted = 0 \r
+ },\r
+};\r
+\r
+Com_Arc_Signal_type Com_Arc_Signal[] = {\r
+ { // SetLedLevelRx\r
+ .Com_Arc_DeadlineCounter = 0,\r
+ .ComTimeoutFactor = 0,\r
+ .ComIPduHandleId = 0,\r
+ .ComSignalUpdated = 0,\r
+ .ComIPduDataPtr = NULL,\r
+ \r
+ .Com_Arc_ShadowBuffer = NULL\r
+ \r
+ },\r
+ \r
+};\r
+\r
+Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_N_GROUP_SIGNALS];\r
+\r
+uint8 outgoingSduPtr[8];\r
+\r
+Com_Arc_Config_type Com_Arc_Config = {\r
+ .ComIPdu = Com_Arc_IPdu,\r
+ .ComSignal = Com_Arc_Signal,\r
+ .ComGroupSignal = Com_Arc_GroupSignal,\r
+ .OutgoingPdu = {\r
+ .SduDataPtr = outgoingSduPtr,\r
+ .SduLength = 0\r
+ }\r
+};\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
-#ifndef COM_PBCFG_H_\r
-#define COM_PBCFG_H_\r
+#ifndef COM_PBCFG_H\r
+#define COM_PBCFG_H\r
\r
#include "Com_Types.h"\r
\r
\r
\r
// PDU group definitions\r
-enum {\r
- RxGroup = 0,\r
-};\r
+#define RxGroup 0\r
+\r
\r
// Signal definitions\r
-enum {\r
- SetLedLevelRx = 0,\r
-};\r
+#define SetLedLevelRx 0\r
\r
\r
\r
\r
-#endif /* COM_PBCFG_H_ */\r
+#endif /* COM_PBCFG_H */\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (ECUM_SW_MAJOR_VERSION != 2 && ECUM_SW_MINOR_VERSION != 0)
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
#error "EcuM: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 09:38:31 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
\r
-// File generated on Fri Dec 03 09:38:31 CET 2010\r
+// File generated on Mon Jan 17 11:45:30 CET 2011\r
// File generated by com.arccore.bswbuilder.modules.port.mpc5516\r
\r
#include "Port.h"\r
#include "Port_Cfg.h"\r
-#include "stdlib.h"\r
+#include <stdlib.h>\r
\r
const uint16_t PortPadConfigData[] = {\r
PORT_PCR_RESET, /* PCR 0 */\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 09:38:31 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (PORT_SW_MAJOR_VERSION != 1)
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
#error "Port: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
/*\r
},\r
#if PWM_NOTIFICATION_SUPPORTED==ON\r
.NotificationHandlers = {\r
- // Notification routine for PWM_CHANNEL_1\r
- ,\r
- \r
+// Notification routine for PWM_CHANNEL_1\r
+ NULL, \r
}\r
#endif\r
};\r
-
\ No newline at end of file
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Fri Dec 03 08:32:04 CET 2010\r
+ * on Mon Jan 17 11:45:30 CET 2011\r
*/\r
\r
-#if (PWM_SW_MAJOR_VERSION != 1)
+#if !(((PWM_SW_MAJOR_VERSION == 1) && (PWM_SW_MINOR_VERSION == 0)) )
#error "Pwm: Configuration file version differs from BSW version."
#endif
}\r
\r
#endif /* PWM_CFG_H_ */\r
-
\ No newline at end of file
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:27:09 CET 2010\r
+ * on Mon Jan 17 14:52:25 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:27:09 CET 2010\r
+ * on Mon Jan 17 14:52:25 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:29:27 CET 2010\r
+ * on Mon Jan 17 10:42:01 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:29:27 CET 2010\r
+ * on Mon Jan 17 10:42:01 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:44:20 CET 2010\r
+ * on Mon Jan 17 12:21:12 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:44:20 CET 2010\r
+ * on Mon Jan 17 12:21:12 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:44:20 CET 2010\r
+ * on Fri Jan 14 10:52:54 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 14:44:20 CET 2010\r
+ * on Fri Jan 14 10:52:54 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
* Configuration of module Os (Os_Cfg.c)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F107\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Thu Dec 02 17:01:44 CET 2010\r
+ * on Mon Jan 17 08:49:22 CET 2011\r
*/\r
\r
\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F107\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Thu Dec 02 17:01:44 CET 2010\r
+ * on Mon Jan 17 08:49:22 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
* Configuration of module Os (Os_Cfg.c)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F103\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:35:30 CET 2010\r
+ * on Fri Jan 14 09:13:21 CET 2011\r
*/\r
\r
\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F103\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:35:30 CET 2010\r
+ * on Fri Jan 14 09:13:21 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
#libitem-y += \r
\r
#linkfile\r
-ldcmdfile-y = linkscript_gcc.ldp\r
+ldcmdfile-y = linkscript_$(COMPILER).lcf\r
vpath %.ldf $(ROOTDIR)/$(ARCH_PATH-y)/scripts\r
#ldcmdfile-y = $(ROOTDIR)/$(ARCH_PATH-y)/scripts/linkscript_gcc.ldp\r
\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>simple_arm_cm3</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="4ab03f0b-f00d-4eb3-8406-006c42d20f4d">\r
+ <SHORT-NAME>simple_arm_cm3</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F103</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/simple_arm_cm3/SwComposition_simple_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/simple_arm_cm3/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="a5ac45c0-0dd8-4e11-8f33-bcc59510e846">\r
+ <SHORT-NAME>SwComposition_simple_arm_cm3</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="29b23c16-ee7a-4b40-afaf-6c4117db16d3">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="92c5a2e3-81e3-4e1f-9137-174435a92b41">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6578a055-00a4-4de2-8e87-3b7758f9caf7">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="67722c4e-130a-4dac-8aeb-72ed94e3e7e9">\r
+ <SHORT-NAME>Alarm1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="78d0ecea-4ed3-4503-b0c8-4ad0b400d6ab">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6de53f9-2026-4621-887f-556572f825be">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_arm_cm3/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_arm_cm3/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="9c54b7bd-b0c1-4733-a6a4-b77b22b8df12">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="170cda57-b4ad-4c67-8384-97736003af20">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9254b1b9-6b3d-4e1a-b294-871e853d8ae0">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8c0b5497-cc95-4e9b-b102-99f3f7e637bb">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b5d30e9f-ae64-42ba-861e-7dd525761722">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="72dc534e-fc28-4883-b1d7-5e1162314494">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5f7216e5-bed0-4a95-bf07-26b1c54be1c0">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="896fdbc9-ed9a-4f24-9366-257760788019">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d681023d-1f60-4239-b9a2-7889a00bdaa4">\r
+ <SHORT-NAME>EVENT_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
</DOC-REVISIONS>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
- <SD GID="MCU">Cortex M3</SD>\r
+ <SD GID="MCU">STM32_F107</SD>\r
<SD GID="GENDIR">/simple/config/stm32_stm3210c</SD>\r
</SDG>\r
</SDGS>\r
#include "Mcu.h"
#include "arc.h"
-#define USE_LDEBUG_PRINTF
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.
#include "debug.h"
// How many errors to keep in error log.
StackInfoType si;
TaskType currTask;
- LDEBUG_PRINTF("etask_1 start\n");
+ LDEBUG_FPUTS("etask_1 start\n");
for(;;) {
SetEvent(TASK_ID_etask_2,EVENT_MASK_EVENT_1);
WaitEvent(EVENT_MASK_EVENT_2);
* and activates task: btask_3.
*/
void etask_2( void ) {
- LDEBUG_PRINTF("etask_2 start\n");
+ LDEBUG_FPUTS("etask_2 start\n");
for(;;) {
WaitEvent(EVENT_MASK_EVENT_1);
/* Global hooks */
ProtectionReturnType ProtectionHook( StatusType FatalError ) {
- LDEBUG_PRINTF("## ProtectionHook\n");
+ LDEBUG_FPUTS("## ProtectionHook\n");
return PRO_KILLAPPL;
}
void StartupHook( void ) {
- uint32_t sys_freq = McuE_GetSystemClock();
+ LDEBUG_FPUTS("## StartupHook\n");
- LDEBUG_PRINTF("## StartupHook\n");
-
- LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());
}
void ShutdownHook( StatusType Error ) {
- LDEBUG_PRINTF("## ShutdownHook\n");
+ LDEBUG_FPUTS("## ShutdownHook\n");
while(1);
}
\r
\r
#include "Os.h"\r
+#include "Mcu.h"\r
#include <stdio.h>\r
#include <assert.h>\r
\r
-#define USE_LDEBUG_PRINTF\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
-#include "Mcu.h"\r
-\r
-\r
-#if 0\r
-#ifdef USE_STARTUPHOOK\r
-#ifdef CFG_MPC55XX\r
-#if !defined(USE_SIMULATOR)\r
-// Quick fix\r
-//#include "Kernel_Offset.h"\r
-\r
-extern uint8_t pcb_list[];\r
-\r
-#endif\r
-#endif\r
-#endif\r
-#endif\r
\r
\r
\r
void StartupHook( void ) {\r
LDEBUG_PRINTF("## StartupHook\n");\r
\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
-\r
- LDEBUG_PRINTF("Sys clock %d Hz\n",sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
void PostTaskHook( void ) {\r
// dbg_printf("## PostTaskHook, taskid=%d\n",task);\r
}\r
-\r
-#if 0\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook\r
- };\r
-#endif\r
#include "EcuM.h"\r
#include <stdio.h>\r
#include <assert.h>\r
-#include "debug.h"\r
#include "Com.h"\r
#include "Adc.h"\r
\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
+\r
void OsIdle( void ) {\r
for(;;);\r
}\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (CANIF_SW_MAJOR_VERSION != 1 && CANIF_SW_MINOR_VERSION != 1)
+#if !(((CANIF_SW_MAJOR_VERSION == 1) && (CANIF_SW_MINOR_VERSION == 1)) )
#error "CanIf: Configuration file version differs from BSW version."
#endif
CANIF_SOFTFILTER_TYPE_INDEX, // Not supported\r
CANIF_SOFTFILTER_TYPE_LINEAR, // Not supported\r
CANIF_SOFTFILTER_TYPE_TABLE, // Not supported\r
- CANIF_SOFTFILTER_TYPE_MASK, // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
+ CANIF_SOFTFILTER_TYPE_MASK // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
} CanIf_SoftwareFilterTypeType;\r
\r
typedef enum {\r
CANIF_USER_TYPE_CAN_NM,\r
CANIF_USER_TYPE_CAN_TP,\r
CANIF_USER_TYPE_CAN_PDUR,\r
- CANIF_USER_TYPE_CAN_SPECIAL,\r
+ CANIF_USER_TYPE_CAN_SPECIAL\r
} CanIf_UserTypeType;\r
\r
\r
#define CANIF_TRANSCEIVER_API STD_OFF // Not supported\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
-\r
//-------------------------------------------------------------------\r
/*\r
* CanIfHrhRangeConfig container\r
typedef enum {\r
CANIF_WAKEUP_SUPPORT_CONTROLLER,\r
CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
- CANIF_WAKEUP_SUPPORT_TRANSCEIVER,\r
+ CANIF_WAKEUP_SUPPORT_TRANSCEIVER\r
} CanIf_WakeupSupportType;\r
\r
\r
// CanIf-specific id of the controller\r
CanIf_Arc_ChannelIdType CanIfControllerIdRef;\r
\r
- const char CanIfDriverNameRef[8]; // Not used\r
+ const uint8 CanIfDriverNameRef[8]; // Not used\r
\r
const Can_ControllerConfigType *CanIfInitControllerRef;\r
} CanIf_ControllerConfigType;\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (CAN_SW_MAJOR_VERSION != 1)
+#if !(((CAN_SW_MAJOR_VERSION == 1) && (CAN_SW_MINOR_VERSION == 0)) )
#error "Can: Configuration file version differs from BSW version."
#endif
typedef enum {\r
CAN_ID_TYPE_EXTENDED,\r
CAN_ID_TYPE_MIXED,\r
- CAN_ID_TYPE_STANDARD,\r
+ CAN_ID_TYPE_STANDARD\r
} Can_IdTypeType;\r
\r
typedef enum {\r
CAN_OBJECT_TYPE_RECEIVE,\r
- CAN_OBJECT_TYPE_TRANSMIT,\r
+ CAN_OBJECT_TYPE_TRANSMIT\r
} Can_ObjectTypeType;\r
\r
\r
typedef struct {\r
// Specifies the InstanceId of this module instance. If only one instance is\r
// present it shall have the Id 0\r
- int CanIndex;\r
+ uint8 CanIndex;\r
} Can_GeneralType;\r
\r
// Start mc9s12 unique\r
\r
typedef enum {\r
CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
- CAN_ARC_PROCESS_TYPE_POLLING,\r
+ CAN_ARC_PROCESS_TYPE_POLLING\r
} Can_Arc_ProcessType;\r
\r
typedef struct {\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
\r
-#ifndef COM_CFG_H_\r
-#define COM_CFG_H_\r
+#ifndef COM_CFG_H\r
+#define COM_CFG_H\r
\r
#define COM_MODULE_ID 20\r
#define COM_INSTANCE_ID 1\r
#define ComConfigurationTimeBase 0.0\r
#define ComVersionInfoApi\r
\r
-#endif /*COM_CFG_H_*/\r
+#endif /*COM_CFG_H*/\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
\r
#include "Com.h"\r
-#include "stdlib.h"\r
+#include "Com_Internal.h"\r
+#include <stdlib.h>\r
#if defined(USE_PDUR)\r
#include "PduR.h"\r
#endif\r
.ComNotification = NULL,\r
.ComTimeoutFactor = 0,\r
.ComTimeoutNotification = NULL,\r
+ .ComErrorNotification = NULL,\r
.ComTransferProperty = TRIGGERED,\r
\r
+ .ComUpdateBitPosition = 0,\r
+ .ComSignalArcUseUpdateBit = 0,\r
+ \r
\r
.ComSignalInitValue = &Com_SignalInitValue_SetLedLevelTx,\r
.ComBitPosition = 7,\r
.ComBitSize = 16,\r
.ComSignalEndianess = COM_BIG_ENDIAN,\r
.ComSignalType = UINT16,\r
+ .Com_Arc_IsSignalGroup = 0,\r
.ComGroupSignal = NULL,\r
\r
+ .ComRxDataTimeoutAction = COM_TIMEOUT_DATA_ACTION_NONE,\r
+ .Com_Arc_EOL = 0\r
},\r
{\r
.Com_Arc_EOL = 1\r
*/\r
const ComIPduGroup_type ComIPduGroup[] = {\r
{\r
- .ComIPduGroupHandleId = TxGroup\r
+ .ComIPduGroupHandleId = TxGroup,\r
+ .Com_Arc_EOL = 0\r
},\r
\r
{\r
},\r
\r
.ComIPduSignalRef = ComIPduSignalRefs_LedCommandTx,\r
+ .Com_Arc_EOL = 0\r
}, \r
{\r
.Com_Arc_EOL = 1\r
.ComGroupSignal = ComGroupSignal\r
};\r
\r
+/* IPdu buffers and signal group buffers */\r
+uint8 ComArcIPduBuffer_LedCommandTx[8];\r
+ \r
+\r
+Com_Arc_IPdu_type Com_Arc_IPdu[] = {\r
+ { // LedCommandTx\r
+ .Com_Arc_TxIPduTimers = {\r
+ .ComTxIPduNumberOfRepetitionsLeft = 0,\r
+ .ComTxModeRepetitionPeriodTimer = 0,\r
+ .ComTxIPduMinimumDelayTimer = 0,\r
+ .ComTxModeTimePeriodTimer = 0\r
+ },\r
+ .ComIPduDataPtr = ComArcIPduBuffer_LedCommandTx,\r
+ .Com_Arc_IpduStarted = 0 \r
+ },\r
+};\r
+\r
+Com_Arc_Signal_type Com_Arc_Signal[] = {\r
+ { // SetLedLevelTx\r
+ .Com_Arc_DeadlineCounter = 0,\r
+ .ComTimeoutFactor = 0,\r
+ .ComIPduHandleId = 0,\r
+ .ComSignalUpdated = 0,\r
+ .ComIPduDataPtr = NULL,\r
+ \r
+ .Com_Arc_ShadowBuffer = NULL\r
+ \r
+ },\r
+ \r
+};\r
+\r
+Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_N_GROUP_SIGNALS];\r
+\r
+uint8 outgoingSduPtr[8];\r
+\r
+Com_Arc_Config_type Com_Arc_Config = {\r
+ .ComIPdu = Com_Arc_IPdu,\r
+ .ComSignal = Com_Arc_Signal,\r
+ .ComGroupSignal = Com_Arc_GroupSignal,\r
+ .OutgoingPdu = {\r
+ .SduDataPtr = outgoingSduPtr,\r
+ .SduLength = 0\r
+ }\r
+};\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
-#ifndef COM_PBCFG_H_\r
-#define COM_PBCFG_H_\r
+#ifndef COM_PBCFG_H\r
+#define COM_PBCFG_H\r
\r
#include "Com_Types.h"\r
\r
\r
\r
// PDU group definitions\r
-enum {\r
- TxGroup = 0,\r
-};\r
+#define TxGroup 0\r
+\r
\r
// Signal definitions\r
-enum {\r
- SetLedLevelTx = 0,\r
-};\r
+#define SetLedLevelTx 0\r
\r
\r
\r
\r
-#endif /* COM_PBCFG_H_ */\r
+#endif /* COM_PBCFG_H */\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:15 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (ECUM_SW_MAJOR_VERSION != 2 && ECUM_SW_MINOR_VERSION != 0)
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
#error "EcuM: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:14 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:15 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
\r
-// File generated on Wed Dec 01 20:18:15 CET 2010\r
+// File generated on Mon Jan 17 12:24:21 CET 2011\r
// File generated by com.arccore.bswbuilder.modules.port.mpc5516\r
\r
#include "Port.h"\r
#include "Port_Cfg.h"\r
-#include "stdlib.h"\r
+#include <stdlib.h>\r
\r
const uint16_t PortPadConfigData[] = {\r
PORT_PCR_RESET, /* PCR 0 */\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:18:15 CET 2010\r
+ * on Mon Jan 17 12:24:21 CET 2011\r
*/\r
\r
-#if (PORT_SW_MAJOR_VERSION != 1)
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
#error "Port: Configuration file version differs from BSW version."
#endif
* Configured for (MCU): MPC5567\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
\r
* Configured for (MCU): MPC5567\r
*\r
* Module vendor: ArcCore\r
- * Module version: 2.0.3\r
+ * Module version: 2.0.4\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (CANIF_SW_MAJOR_VERSION != 1 && CANIF_SW_MINOR_VERSION != 1)
+#if !(((CANIF_SW_MAJOR_VERSION == 1) && (CANIF_SW_MINOR_VERSION == 1)) )
#error "CanIf: Configuration file version differs from BSW version."
#endif
CANIF_SOFTFILTER_TYPE_INDEX, // Not supported\r
CANIF_SOFTFILTER_TYPE_LINEAR, // Not supported\r
CANIF_SOFTFILTER_TYPE_TABLE, // Not supported\r
- CANIF_SOFTFILTER_TYPE_MASK, // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
+ CANIF_SOFTFILTER_TYPE_MASK // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering\r
} CanIf_SoftwareFilterTypeType;\r
\r
typedef enum {\r
CANIF_USER_TYPE_CAN_NM,\r
CANIF_USER_TYPE_CAN_TP,\r
CANIF_USER_TYPE_CAN_PDUR,\r
- CANIF_USER_TYPE_CAN_SPECIAL,\r
+ CANIF_USER_TYPE_CAN_SPECIAL\r
} CanIf_UserTypeType;\r
\r
\r
#define CANIF_TRANSCEIVER_API STD_OFF // Not supported\r
#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
\r
-//-------------------------------------------------------------------\r
-\r
-typedef struct {\r
- void (*CancelTxConfirmation)( void *); // (const Can_PduType *);\r
- void (*RxIndication)(void *); //(const Can_PduType *);\r
- void (*ControllerBusOff)(uint8);\r
- void (*ControllerWakeup)(uint8);\r
- void (*Arc_Error)(uint8,uint32);\r
-} CanIf_CallbackType;\r
-\r
-\r
-\r
//-------------------------------------------------------------------\r
/*\r
* CanIfHrhRangeConfig container\r
typedef enum {\r
CANIF_WAKEUP_SUPPORT_CONTROLLER,\r
CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
- CANIF_WAKEUP_SUPPORT_TRANSCEIVER,\r
+ CANIF_WAKEUP_SUPPORT_TRANSCEIVER\r
} CanIf_WakeupSupportType;\r
\r
\r
// CanIf-specific id of the controller\r
CanIf_Arc_ChannelIdType CanIfControllerIdRef;\r
\r
- const char CanIfDriverNameRef[8]; // Not used\r
+ const uint8 CanIfDriverNameRef[8]; // Not used\r
\r
const Can_ControllerConfigType *CanIfInitControllerRef;\r
} CanIf_ControllerConfigType;\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:28 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (CAN_SW_MAJOR_VERSION != 1)
+#if !(((CAN_SW_MAJOR_VERSION == 1) && (CAN_SW_MINOR_VERSION == 0)) )
#error "Can: Configuration file version differs from BSW version."
#endif
CAN_CTRL_D = 3,\r
FLEXCAN_E = 4,\r
CAN_CTRL_E = 4,\r
- CAN_CONTROLLER_CNT = 5\r
+ FLEXCAN_F = 5,\r
+ CAN_CTRL_F = 5,\r
+ CAN_CONTROLLER_CNT = 6\r
}CanControllerIdType;\r
\r
\r
typedef enum {\r
CAN_ID_TYPE_EXTENDED,\r
CAN_ID_TYPE_MIXED,\r
- CAN_ID_TYPE_STANDARD,\r
+ CAN_ID_TYPE_STANDARD\r
} Can_IdTypeType;\r
\r
typedef enum {\r
CAN_OBJECT_TYPE_RECEIVE,\r
- CAN_OBJECT_TYPE_TRANSMIT,\r
+ CAN_OBJECT_TYPE_TRANSMIT\r
} Can_ObjectTypeType;\r
\r
\r
typedef struct {\r
// Specifies the InstanceId of this module instance. If only one instance is\r
// present it shall have the Id 0\r
- int CanIndex;\r
+ uint8 CanIndex;\r
} Can_GeneralType;\r
\r
// Start mc9s12 unique\r
\r
typedef enum {\r
CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
- CAN_ARC_PROCESS_TYPE_POLLING,\r
+ CAN_ARC_PROCESS_TYPE_POLLING\r
} Can_Arc_ProcessType;\r
\r
typedef struct {\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:28 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
\r
-#ifndef COM_CFG_H_\r
-#define COM_CFG_H_\r
+#ifndef COM_CFG_H\r
+#define COM_CFG_H\r
\r
#define COM_MODULE_ID 20\r
#define COM_INSTANCE_ID 1\r
#define ComConfigurationTimeBase 0.0\r
#define ComVersionInfoApi\r
\r
-#endif /*COM_CFG_H_*/\r
+#endif /*COM_CFG_H*/\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
\r
#include "Com.h"\r
-#include "stdlib.h"\r
+#include "Com_Internal.h"\r
+#include <stdlib.h>\r
#if defined(USE_PDUR)\r
#include "PduR.h"\r
#endif\r
.ComNotification = NULL,\r
.ComTimeoutFactor = 0,\r
.ComTimeoutNotification = NULL,\r
+ .ComErrorNotification = NULL,\r
.ComTransferProperty = TRIGGERED,\r
\r
+ .ComUpdateBitPosition = 0,\r
+ .ComSignalArcUseUpdateBit = 0,\r
+ \r
\r
.ComSignalInitValue = &Com_SignalInitValue_SetLedLevelTx,\r
.ComBitPosition = 7,\r
.ComBitSize = 16,\r
.ComSignalEndianess = COM_BIG_ENDIAN,\r
.ComSignalType = UINT16,\r
+ .Com_Arc_IsSignalGroup = 0,\r
.ComGroupSignal = NULL,\r
\r
+ .ComRxDataTimeoutAction = COM_TIMEOUT_DATA_ACTION_NONE,\r
+ .Com_Arc_EOL = 0\r
},\r
{\r
.Com_Arc_EOL = 1\r
*/\r
const ComIPduGroup_type ComIPduGroup[] = {\r
{\r
- .ComIPduGroupHandleId = TxGroup\r
+ .ComIPduGroupHandleId = TxGroup,\r
+ .Com_Arc_EOL = 0\r
},\r
\r
{\r
},\r
\r
.ComIPduSignalRef = ComIPduSignalRefs_LedCommandTx,\r
+ .Com_Arc_EOL = 0\r
}, \r
{\r
.Com_Arc_EOL = 1\r
.ComGroupSignal = ComGroupSignal\r
};\r
\r
+/* IPdu buffers and signal group buffers */\r
+uint8 ComArcIPduBuffer_LedCommandTx[8];\r
+ \r
+\r
+Com_Arc_IPdu_type Com_Arc_IPdu[] = {\r
+ { // LedCommandTx\r
+ .Com_Arc_TxIPduTimers = {\r
+ .ComTxIPduNumberOfRepetitionsLeft = 0,\r
+ .ComTxModeRepetitionPeriodTimer = 0,\r
+ .ComTxIPduMinimumDelayTimer = 0,\r
+ .ComTxModeTimePeriodTimer = 0\r
+ },\r
+ .ComIPduDataPtr = ComArcIPduBuffer_LedCommandTx,\r
+ .Com_Arc_IpduStarted = 0 \r
+ },\r
+};\r
+\r
+Com_Arc_Signal_type Com_Arc_Signal[] = {\r
+ { // SetLedLevelTx\r
+ .Com_Arc_DeadlineCounter = 0,\r
+ .ComTimeoutFactor = 0,\r
+ .ComIPduHandleId = 0,\r
+ .ComSignalUpdated = 0,\r
+ .ComIPduDataPtr = NULL,\r
+ \r
+ .Com_Arc_ShadowBuffer = NULL\r
+ \r
+ },\r
+ \r
+};\r
+\r
+Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_N_GROUP_SIGNALS];\r
+\r
+uint8 outgoingSduPtr[8];\r
+\r
+Com_Arc_Config_type Com_Arc_Config = {\r
+ .ComIPdu = Com_Arc_IPdu,\r
+ .ComSignal = Com_Arc_Signal,\r
+ .ComGroupSignal = Com_Arc_GroupSignal,\r
+ .OutgoingPdu = {\r
+ .SduDataPtr = outgoingSduPtr,\r
+ .SduLength = 0\r
+ }\r
+};\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (COM_SW_MAJOR_VERSION != 1)
+#if !(((COM_SW_MAJOR_VERSION == 1) && (COM_SW_MINOR_VERSION == 1)) )
#error "Com: Configuration file version differs from BSW version."
#endif
-#ifndef COM_PBCFG_H_\r
-#define COM_PBCFG_H_\r
+#ifndef COM_PBCFG_H\r
+#define COM_PBCFG_H\r
\r
#include "Com_Types.h"\r
\r
\r
\r
// PDU group definitions\r
-enum {\r
- TxGroup = 0,\r
-};\r
+#define TxGroup 0\r
+\r
\r
// Signal definitions\r
-enum {\r
- SetLedLevelTx = 0,\r
-};\r
+#define SetLedLevelTx 0\r
\r
\r
\r
\r
-#endif /* COM_PBCFG_H_ */\r
+#endif /* COM_PBCFG_H */\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:28 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (ECUM_SW_MAJOR_VERSION != 2 && ECUM_SW_MINOR_VERSION != 0)
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
#error "EcuM: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:28 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:27 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (PDUR_SW_MAJOR_VERSION != 1)
+#if !(((PDUR_SW_MAJOR_VERSION == 1) && (PDUR_SW_MINOR_VERSION == 0)) )
#error "PduR: Configuration file version differs from BSW version."
#endif
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:28 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
\r
-// File generated on Wed Dec 01 20:25:28 CET 2010\r
+// File generated on Fri Jan 14 10:53:45 CET 2011\r
// File generated by com.arccore.bswbuilder.modules.port.mpc5567\r
\r
#include "Port.h"\r
#include "Port_Cfg.h"\r
-#include "stdlib.h"\r
+#include <stdlib.h>\r
\r
const uint16_t PortPadConfigData[] = {\r
PORT_PCR_RESET, /* PCR 0 */\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 20:25:28 CET 2010\r
+ * on Fri Jan 14 10:53:45 CET 2011\r
*/\r
\r
-#if (PORT_SW_MAJOR_VERSION != 1)
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
#error "Port: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:20:59 CET 2010\r
+ * on Mon Jan 17 14:53:39 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:20:59 CET 2010\r
+ * on Mon Jan 17 14:53:39 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:17:19 CET 2010\r
+ * on Mon Jan 17 11:00:47 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 11:17:19 CET 2010\r
+ * on Mon Jan 17 11:00:47 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Thu Dec 02 15:48:34 CET 2010\r
+ * on Mon Jan 17 12:33:23 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Thu Dec 02 15:48:34 CET 2010\r
+ * on Mon Jan 17 12:33:23 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 15:00:37 CET 2010\r
+ * on Fri Jan 14 11:34:04 CET 2011\r
*/\r
\r
\r
*\r
* Copyright ArcCore AB 2010\r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Mon Dec 06 15:00:37 CET 2010\r
+ * on Fri Jan 14 11:34:04 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
* Configuration of module Os (Os_Cfg.c)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F103\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:32:56 CET 2010\r
+ * on Mon Jan 17 08:54:51 CET 2011\r
*/\r
\r
\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F103\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:32:56 CET 2010\r
+ * on Mon Jan 17 08:54:51 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
* Configuration of module Os (Os_Cfg.c)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F107\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:32:56 CET 2010\r
+ * on Fri Jan 14 09:15:16 CET 2011\r
*/\r
\r
\r
* Configuration of module Os (Os_Cfg.h)\r
*\r
* Created by: \r
- * Configured for (MCU): Cortex M3\r
+ * Configured for (MCU): STM32_F107\r
*\r
* Module vendor: ArcCore\r
* Module version: 2.0.11\r
*\r
* \r
* Generated by Arctic Studio (http://arccore.com) \r
- * on Wed Dec 01 15:32:56 CET 2010\r
+ * on Fri Jan 14 09:15:16 CET 2011\r
*/\r
\r
-#if (OS_SW_MAJOR_VERSION != 2)
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
#error "Os: Configuration file version differs from BSW version."
#endif
#include "Mcu.h"\r
#include "arc.h"\r
\r
-#define USE_LDEBUG_PRINTF\r
+//#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
#include "debug.h"\r
\r
// How many errors to keep in error log.\r
StackInfoType si;\r
TaskType currTask;\r
\r
- LDEBUG_PRINTF("etask_1 start\n");\r
+ LDEBUG_FPUTS("etask_1 start\n");\r
for(;;) {\r
SetEvent(TASK_ID_etask_2,EVENT_MASK_EVENT_1);\r
WaitEvent(EVENT_MASK_EVENT_2);\r
* and activates task: btask_3.\r
*/\r
void etask_2( void ) {\r
- LDEBUG_PRINTF("etask_2 start\n");\r
+ LDEBUG_FPUTS("etask_2 start\n");\r
\r
for(;;) {\r
WaitEvent(EVENT_MASK_EVENT_1);\r
\r
/* Global hooks */\r
ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
- LDEBUG_PRINTF("## ProtectionHook\n");\r
+ LDEBUG_FPUTS("## ProtectionHook\n");\r
return PRO_KILLAPPL;\r
}\r
\r
void StartupHook( void ) {\r
- uint32_t sys_freq = McuE_GetSystemClock();\r
+ LDEBUG_FPUTS("## StartupHook\n");\r
\r
- LDEBUG_PRINTF("## StartupHook\n");\r
-\r
- LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)McuE_GetSystemClock());\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
- LDEBUG_PRINTF("## ShutdownHook\n");\r
+ LDEBUG_FPUTS("## ShutdownHook\n");\r
while(1);\r
}\r
\r
</DOC-REVISIONS>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
- <SD GID="MCU">Cortex M3</SD>\r
+ <SD GID="MCU">STM32_F103</SD>\r
<SD GID="GENDIR">/tiny/config/stm32_stm3210c</SD>\r
</SDG>\r
</SDGS>\r
<?xml version="1.0" encoding="UTF-8"?>\r
<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
<AR-PACKAGE>\r
- <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <SHORT-NAME>tiny_arm_cm3</SHORT-NAME>\r
<ELEMENTS>\r
- <ECU-CONFIGURATION UUID="7cf102d9-f929-4b4a-97b6-4ef11256183a">\r
- <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <ECU-CONFIGURATION UUID="2791ca0a-8e26-4388-976c-a48110927414">\r
+ <SHORT-NAME>tiny_arm_cm3</SHORT-NAME>\r
<ADMIN-DATA>\r
<DOC-REVISIONS>\r
<DOC-REVISION/>\r
</DOC-REVISIONS>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
- <SD GID="MCU">Cortex M3</SD>\r
- <SD GID="GENDIR">/blinker/config/stm32_stm3210c</SD>\r
+ <SD GID="MCU">STM32_F107</SD>\r
+ <SD GID="GENDIR"></SD>\r
</SDG>\r
</SDGS>\r
</ADMIN-DATA>\r
- <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_cm3/SwComposition_blinker_node_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/tiny_arm_cm3/SwComposition_tiny_arm_cm3</ECU-SW-COMPOSITION-REF>\r
<MODULE-REFS>\r
- <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/tiny_arm_cm3/Os</MODULE-REF>\r
</MODULE-REFS>\r
</ECU-CONFIGURATION>\r
- <ECU-SW-COMPOSITION UUID="bf0ee133-5ed1-418a-b260-47e171242afc">\r
- <SHORT-NAME>SwComposition_blinker_node_arm_cm3</SHORT-NAME>\r
+ <ECU-SW-COMPOSITION UUID="9aecec1e-749c-47fe-9fdb-98ed851bf12f">\r
+ <SHORT-NAME>SwComposition_tiny_arm_cm3</SHORT-NAME>\r
</ECU-SW-COMPOSITION>\r
- <MODULE-CONFIGURATION UUID="4fe46a12-0672-428f-99e3-c4ca6570a776">\r
+ <MODULE-CONFIGURATION UUID="d9b75d00-e6eb-4671-a7cf-0abd1e1ed6a7">\r
<SHORT-NAME>Os</SHORT-NAME>\r
<ADMIN-DATA>\r
<SDGS>\r
<SDG/>\r
<SDG GID="Arccore::ModuleOptions">\r
<SD GID="GENERATE_AND_VALIDATE">true</SD>\r
- <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
</SDG>\r
</SDGS>\r
</ADMIN-DATA>\r
<DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
<CONTAINERS>\r
- <CONTAINER UUID="80853be9-55dc-435f-95ed-9a1c90750299">\r
+ <CONTAINER UUID="5ceca27a-71ff-4c71-bcb8-69a1f31f5d79">\r
<SHORT-NAME>OsOS</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</INTEGER-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
- <VALUE>true</VALUE>\r
+ <VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
</BOOLEAN-VALUE>\r
</PARAMETER-VALUES>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="7f1dfe11-aeff-4131-89a9-2fbe9a87f01f">\r
+ <CONTAINER UUID="185f3281-13f7-459b-9ccd-66eb1aff52ca">\r
<SHORT-NAME>OsHooks</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="77224460-9071-4c32-9ba5-5ee19d0a5be2">\r
- <SHORT-NAME>alarm25</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
- <REFERENCE-VALUES>\r
- <REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
- </REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
- <SUB-CONTAINERS>\r
- <CONTAINER UUID="28398b0a-02ef-4aa0-9f06-90c0683ad934">\r
- <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
- <REFERENCE-VALUES>\r
- <REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask25</VALUE-REF>\r
- </REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
- </CONTAINER>\r
- </SUB-CONTAINERS>\r
- </CONTAINER>\r
- <CONTAINER UUID="b4e4c707-af7c-4d9f-a156-1507283b4ebe">\r
- <SHORT-NAME>OsTick</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
- <PARAMETER-VALUES>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
- <VALUE>65535</VALUE>\r
- </INTEGER-VALUE>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
- <VALUE>0</VALUE>\r
- </INTEGER-VALUE>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
- <VALUE>0</VALUE>\r
- </INTEGER-VALUE>\r
- <ENUMERATION-VALUE>\r
- <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
- <VALUE>OS_TICK</VALUE>\r
- </ENUMERATION-VALUE>\r
- </PARAMETER-VALUES>\r
- </CONTAINER>\r
- <CONTAINER UUID="44a8dc3f-2e97-4bb7-8139-57852146269a">\r
- <SHORT-NAME>bTask25</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
- <PARAMETER-VALUES>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
- <VALUE>1</VALUE>\r
- </INTEGER-VALUE>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
- <VALUE>1</VALUE>\r
- </INTEGER-VALUE>\r
- <ENUMERATION-VALUE>\r
- <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
- <VALUE>BASIC</VALUE>\r
- </ENUMERATION-VALUE>\r
- <INTEGER-VALUE>\r
- <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
- <VALUE>2048</VALUE>\r
- </INTEGER-VALUE>\r
- <ENUMERATION-VALUE>\r
- <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
- <VALUE>FULL</VALUE>\r
- </ENUMERATION-VALUE>\r
- </PARAMETER-VALUES>\r
- </CONTAINER>\r
- <CONTAINER UUID="f9e78da1-ee81-40a0-940b-3e04d9e9034c">\r
- <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <CONTAINER UUID="4c1d9bd6-69e7-48c8-8036-35c6279f2240">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
<INTEGER-VALUE>\r
</INTEGER-VALUE>\r
<ENUMERATION-VALUE>\r
<DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
- <VALUE>BASIC</VALUE>\r
+ <VALUE>EXTENDED</VALUE>\r
</ENUMERATION-VALUE>\r
<INTEGER-VALUE>\r
<DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
<VALUE>FULL</VALUE>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="fbcd933e-5944-44dd-ac92-f9eace6bb55c">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="157c6a3d-f8ad-4493-9d76-a8f9411066aa">\r
- <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <CONTAINER UUID="41f28680-c88e-4083-bacc-40cf82ec3122">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
<INTEGER-VALUE>\r
</INTEGER-VALUE>\r
<INTEGER-VALUE>\r
<DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
- <VALUE>1</VALUE>\r
+ <VALUE>2</VALUE>\r
</INTEGER-VALUE>\r
<ENUMERATION-VALUE>\r
<DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
- <VALUE>BASIC</VALUE>\r
+ <VALUE>EXTENDED</VALUE>\r
</ENUMERATION-VALUE>\r
<INTEGER-VALUE>\r
<DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
<VALUE>FULL</VALUE>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="53d449ae-bdbe-49cb-bb22-141480e62565">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="ace8439e-ddb7-4bd7-b9e5-643a759f3e55">\r
- <SHORT-NAME>Startup</SHORT-NAME>\r
+ <CONTAINER UUID="b5120b2f-2b4e-4e0f-8a7f-c7466b489644">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
<PARAMETER-VALUES>\r
<INTEGER-VALUE>\r
</INTEGER-VALUE>\r
<INTEGER-VALUE>\r
<DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
- <VALUE>2</VALUE>\r
+ <VALUE>3</VALUE>\r
</INTEGER-VALUE>\r
<ENUMERATION-VALUE>\r
<DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
<VALUE>FULL</VALUE>\r
</ENUMERATION-VALUE>\r
</PARAMETER-VALUES>\r
- <SUB-CONTAINERS>\r
- <CONTAINER UUID="40214336-c4be-4506-8ccc-75ff014f39fe">\r
- <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
- </CONTAINER>\r
- </SUB-CONTAINERS>\r
</CONTAINER>\r
- <CONTAINER UUID="08cf618f-ebe2-483c-8ba5-fde04f3c6160">\r
- <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <CONTAINER UUID="759524bb-836c-4d61-b59a-cf8edfb6e162">\r
+ <SHORT-NAME>Alarm_4ms</SHORT-NAME>\r
<DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
<REFERENCE-VALUES>\r
<REFERENCE-VALUE>\r
<DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_arm_cm3/Os/OsTick</VALUE-REF>\r
</REFERENCE-VALUE>\r
</REFERENCE-VALUES>\r
<SUB-CONTAINERS>\r
- <CONTAINER UUID="8a235c19-4b95-4bf1-a309-f15916dd2d8d">\r
- <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <CONTAINER UUID="45cda08c-e07f-4670-8f14-b85acb209a6f">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5801fbe7-6b9b-4390-9341-2dd9ab4412f5">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
<REFERENCE-VALUES>\r
<REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask10</VALUE-REF>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_arm_cm3/Os/EVENT_2</VALUE-REF>\r
</REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
- </CONTAINER>\r
- </SUB-CONTAINERS>\r
- </CONTAINER>\r
- <CONTAINER UUID="0f791241-110b-4cac-9e54-b41ad56c7f05">\r
- <SHORT-NAME>alarm100</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
- <REFERENCE-VALUES>\r
- <REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
- </REFERENCE-VALUE>\r
- </REFERENCE-VALUES>\r
- <SUB-CONTAINERS>\r
- <CONTAINER UUID="3eb17f20-d68e-4d62-87e3-6775933e93a2">\r
- <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
- <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
- <REFERENCE-VALUES>\r
<REFERENCE-VALUE>\r
- <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
- <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask100</VALUE-REF>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_arm_cm3/Os/etask_1</VALUE-REF>\r
</REFERENCE-VALUE>\r
</REFERENCE-VALUES>\r
</CONTAINER>\r
</SUB-CONTAINERS>\r
</CONTAINER>\r
+ <CONTAINER UUID="f289efa7-5957-47a1-9c32-2248195ca090">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6dde7c3-6596-4a33-96ab-3a43d4ab1429">\r
+ <SHORT-NAME>EVENT_0</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d93f5687-240e-465d-afb4-da563598d37a">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="94eef554-c26c-44d5-9b8f-501597b53d51">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
</CONTAINERS>\r
</MODULE-CONFIGURATION>\r
</ELEMENTS>\r
--- /dev/null
+-include ../config/*.mk\r
+-include ../config/$(BOARDDIR)/*.mk\r
+\r
+MOD_USE += WDG WDGM PORT DIO MCU KERNEL ECUM DET GPT\r
+\r
+SELECT_CONSOLE = RAMLOG\r
+\r
+SELECT_OPT = OPT_DEBUG \r
+\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+
+#if !(((DIO_SW_MAJOR_VERSION == 1) && (DIO_SW_MINOR_VERSION == 0)) )
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_OFF\r
+#define DIO_DEV_ERROR_DETECT STD_OFF\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ A = 0,\r
+ B = 1,\r
+ C = 2,\r
+ D = 3,\r
+ E = 4,\r
+ F = 5,\r
+ G = 6,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_HeartBeatLED 31\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_DioPort_1 (B)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_HeartBeatLED,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_DioPort_1, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+#include "Gpt.h"\r
+#include "Gpt_Cfg.h"\r
+#include <stdlib.h>\r
+\r
+#if defined(USE_KERNEL)\r
+extern void OsTick( void );\r
+#endif\r
+\r
+extern WdgM_Cbk_GptNotification (void);\r
+\r
+const Gpt_ConfigType GptConfigData[] =\r
+{\r
+ {\r
+ .GptChannelId = GPT_CHANNEL_TIM_2,\r
+ .GptChannelMode = GPT_MODE_ONESHOT,\r
+ .GptChannelClkSrc = 0,\r
+ .GptNotification = NULL,\r
+ .GptChannelPrescale = 72, // 1MHz\r
+ .GptEnableWakeup = FALSE,\r
+ },\r
+ {\r
+ .GptChannelId = GPT_CHANNEL_TIM_3,\r
+ .GptChannelMode = GPT_MODE_CONTINUOUS,\r
+ .GptChannelClkSrc = 0,\r
+ .GptNotification = WdgM_Cbk_GptNotification,\r
+ .GptChannelPrescale = 72, // 1MHz\r
+ .GptEnableWakeup = FALSE,\r
+ },\r
+\r
+ {\r
+ // Last channel in list\r
+ .GptChannelId = GPT_CHANNEL_ILL,\r
+ }\r
+};\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @addtogroup Gpt GPT Driver\r
+ * @{ */\r
+\r
+/** @file Gpt_Cfg.h\r
+ * Definitions of configuration parameters for GPT Driver.\r
+ */\r
+\r
+#warning "This default file may only be used as an example!"\r
+\r
+#ifndef GPT_CFG_H_\r
+#define GPT_CFG_H_\r
+#include "Std_Types.h"\r
+\r
+\r
+/** Configuration is pre-compile only. Not supported. */\r
+#define GPT_VARIANT_PC STD_OFF\r
+/** Configuration is a mix of pre-compile and post-build */\r
+#define GPT_VARIANT_PB STD_ON\r
+\r
+//#define DEC_TEST\r
+//#define GPT_TEST\r
+\r
+/** HW PIT channels */\r
+#define GPT_CHANNEL_TIM_1 0\r
+#define GPT_CHANNEL_TIM_2 1\r
+#define GPT_CHANNEL_TIM_3 2\r
+#define GPT_CHANNEL_TIM_4 3\r
+\r
+#define GPT_CHANNEL_CNT (GPT_CHANNEL_TIM_4 + 1)\r
+\r
+// Illegal channel\r
+#define GPT_CHANNEL_ILL 31\r
+\r
+/** Enable Development Error Trace */\r
+#define GPT_DEV_ERROR_DETECT STD_ON\r
+/** Enables/Disables wakeup source reporting. Not supported. */\r
+#define GPT_REPORT_WAKEUP_SOURCE STD_OFF\r
+/** Build DeInit API */\r
+#define GPT_DEINIT_API STD_ON\r
+/** Build notification API */\r
+#define GPT_ENABLE_DISABLE_NOTIFICATION_API STD_ON\r
+/** Build time remaining API */\r
+#define GPT_TIME_REMAINING_API STD_ON\r
+/** Build time elapsed API */\r
+#define GPT_TIME_ELAPSED_API STD_ON\r
+/** Build version info API */\r
+#define GPT_VERSION_INFO_API STD_ON\r
+/** Build wakeup API. Not supported */\r
+#define GPT_WAKEUP_FUNCTIONALITY_API STD_OFF\r
+\r
+\r
+/** This container contains the channel-wide configuration (parameters) of the\r
+ * GPT Driver */\r
+typedef struct {\r
+ /** GPT187: The GPT module specific clock input for the timer unit can\r
+ * statically be configured and allows to select different clock sources\r
+ * (external clock, internal GPT specific clock) per channel */\r
+ uint32 GptChannelClkSrc;\r
+\r
+ /** Channel Id of the GPT channel. */\r
+ Gpt_ChannelType GptChannelId;\r
+\r
+ /** Specifies the behaviour of the timer channel after the timeout has expired. */\r
+ Gpt_ChannelMode GptChannelMode;\r
+\r
+ /** Function pointer to callback function */\r
+ void (*GptNotification)();\r
+\r
+ /** GPT module specific prescaler factor per channel */\r
+ uint32 GptChannelPrescale;\r
+\r
+ /** GPT188: Enables wakeup capability of CPU for a channel when timeout\r
+ * period expires. This might be different to enabling the notification\r
+ * depending on hardware capabilities. Not supported. */\r
+ boolean GptEnableWakeup;\r
+} Gpt_ConfigType;\r
+\r
+/** The list of channel configurations */\r
+extern const Gpt_ConfigType GptConfigData[];\r
+\r
+#endif /*GPT_CFG_H_*/\r
+/** @} */\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+\r
+#ifndef MCU_CFG_C_\r
+#define MCU_CFG_C_\r
+\r
+#include "Mcu.h"\r
+\r
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {\r
+ {\r
+ .McuRamDefaultValue = 0,\r
+ .McuRamSectionBaseAddress = 0,\r
+ .McuRamSectionSize = 0xFF,\r
+ }\r
+};\r
+\r
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+{\r
+ {\r
+ .McuClockReferencePointFrequency = 8000000UL,\r
+ .Pll1 = 9,\r
+ .Pll2 = 8,\r
+ .Pll3 = 0,\r
+ },\r
+};\r
+\r
+const Mcu_PerClockConfigType McuPerClockConfigData =\r
+{\r
+ .AHBClocksEnable = 0,\r
+ .APB1ClocksEnable = RCC_APB1Periph_TIM3 | RCC_APB1Periph_WWDG | RCC_APB1Periph_TIM2,\r
+ .APB2ClocksEnable = RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO\r
+};\r
+\r
+const Mcu_ConfigType McuConfigData[] = {\r
+ {\r
+ .McuClockSrcFailureNotification = 0,\r
+ .McuRamSectors = 1,\r
+ .McuClockSettings = 1,\r
+ .McuDefaultClockSettings = 0,\r
+ .McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],\r
+ .McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],\r
+ }\r
+};\r
+\r
+#endif /*MCU_CFG_C_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Mcu (Mcu_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:04 CET 2011\r
+ */\r
+\r
+
+#if !(((MCU_SW_MAJOR_VERSION == 2) && (MCU_SW_MINOR_VERSION == 0)) )
+#error "Mcu: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef MCU_CFG_H_\r
+#define MCU_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Mcu_ConfigTypes.h"\r
+\r
+#define MCU_DEV_ERROR_DETECT STD_OFF \r
+#define MCU_PERFORM_RESET_API STD_ON\r
+#define MCU_VERSION_INFO_API STD_ON\r
+\r
+typedef enum {\r
+ MCU_CLOCKTYPE_Clock = 0,\r
+ MCU_NBR_OF_CLOCKS,\r
+} Mcu_ClockType;\r
+\r
+#define MCU_DEFAULT_CONFIG McuConfigData[0]\r
+\r
+#endif /*MCU_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Os (Os_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.11\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 2000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 0,\r
+ 0),\r
+ GEN_COUNTER( COUNTER_ID_WDFailureCounter,\r
+ "WDFailureCounter",\r
+ COUNTER_TYPE_SOFT,\r
+ COUNTER_UNIT_NANO,\r
+ 65535,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm_4ms, ALARM_AUTOSTART_ABSOLUTE, 10, 50, OSDEFAULTAPPMODE );\r
+ \r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm_WdM, ALARM_AUTOSTART_ABSOLUTE, 1, 1, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm_4ms,\r
+ "Alarm_4ms",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm_4ms),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+ GEN_ALARM( ALARM_ID_Alarm_WdM,\r
+ "Alarm_WdM",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm_WdM),\r
+ ALARM_ACTION_ACTIVATETASK,\r
+ TASK_ID_WDTask,\r
+ NULL,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(WDTask,1048);\r
+DECLARE_STACK(btask_3,1048);\r
+DECLARE_STACK(etask_1,2048);\r
+DECLARE_STACK(etask_2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ WDTask,\r
+ 4,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*\r
+ * Configuration of module Os (Os_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.11\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm_4ms 0\r
+#define ALARM_ID_Alarm_WdM 1\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+#define COUNTER_ID_WDFailureCounter 1\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+#define OSMAXALLOWEDVALUE_WDFailureCounter 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_0 0\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_WDTask 1\r
+#define TASK_ID_btask_3 2\r
+#define TASK_ID_etask_1 3\r
+#define TASK_ID_etask_2 4\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void WDTask( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512\r
+\r
+#define OS_ALARM_CNT 2 \r
+#define OS_TASK_CNT 5\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 2\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+ \r
+#include "stm32f10x_gpio.h"\r
+#include "Port.h"\r
+\r
+const uint32 remaps[] = {\r
+};\r
+\r
+const GpioPinCnfMode_Type GPIOConf[] =\r
+{\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_9 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_10 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_11 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_12 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_13 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_14 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ .GpioPinCnfMode_15 = GPIO_OUTPUT_2MHz_MODE | GPIO_OUTPUT_PUSHPULL_CNF, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinCnfMode_0 = 0, \r
+ .GpioPinCnfMode_1 = 0, \r
+ .GpioPinCnfMode_2 = 0, \r
+ .GpioPinCnfMode_3 = 0, \r
+ .GpioPinCnfMode_4 = 0, \r
+ .GpioPinCnfMode_5 = 0, \r
+ .GpioPinCnfMode_6 = 0, \r
+ .GpioPinCnfMode_7 = 0, \r
+ .GpioPinCnfMode_8 = 0, \r
+ .GpioPinCnfMode_9 = 0, \r
+ .GpioPinCnfMode_10 = 0, \r
+ .GpioPinCnfMode_11 = 0, \r
+ .GpioPinCnfMode_12 = 0, \r
+ .GpioPinCnfMode_13 = 0, \r
+ .GpioPinCnfMode_14 = 0, \r
+ .GpioPinCnfMode_15 = 0, \r
+ },\r
+};\r
+\r
+\r
+const GpioPinOutLevel_Type GPIOOutConf[] =\r
+{\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_9 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_10 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_11 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_12 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_13 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_14 = GPIO_OUTPUT_LOW, \r
+ .GpioPinOutLevel_15 = GPIO_OUTPUT_HIGH, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+ {\r
+ .GpioPinOutLevel_0 = 0, \r
+ .GpioPinOutLevel_1 = 0, \r
+ .GpioPinOutLevel_2 = 0, \r
+ .GpioPinOutLevel_3 = 0, \r
+ .GpioPinOutLevel_4 = 0, \r
+ .GpioPinOutLevel_5 = 0, \r
+ .GpioPinOutLevel_6 = 0, \r
+ .GpioPinOutLevel_7 = 0, \r
+ .GpioPinOutLevel_8 = 0, \r
+ .GpioPinOutLevel_9 = 0, \r
+ .GpioPinOutLevel_10 = 0, \r
+ .GpioPinOutLevel_11 = 0, \r
+ .GpioPinOutLevel_12 = 0, \r
+ .GpioPinOutLevel_13 = 0, \r
+ .GpioPinOutLevel_14 = 0, \r
+ .GpioPinOutLevel_15 = 0, \r
+ },\r
+};\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .padCnt = 7,\r
+ .padConfig = GPIOConf,\r
+ .outConfig = GPIOOutConf,\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(uint32),\r
+ .remaps = &remaps[0]\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): STM32_F103\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Mon Feb 28 18:42:03 CET 2011\r
+ */\r
+\r
+
+#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "Port_ConfigTypes.h"\r
+\r
+#define PORT_VERSION_INFO_API STD_OFF\r
+#define PORT_DEV_ERROR_DETECT STD_OFF\r
+#define PORT_SET_PIN_DIRECTION_API STD_OFF\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "WdgIf.h"\r
+#include "Wdg.h"\r
+\r
+const WdgIf_DeviceType WdgIfDevice[] =\r
+{\r
+ {\r
+ .WdgIf_DeviceIndex = 0,\r
+ .WdgRef = &WdgWWDGGeneral,\r
+ },\r
+ {\r
+ .WdgIf_DeviceIndex = 1,\r
+ .WdgRef = &WdgIWDGGeneral,\r
+ },\r
+};\r
+\r
+const WdgIf_GeneralType WdgIfGeneral =\r
+{\r
+ .WdgIf_NumberOfDevices = sizeof(WdgIfDevice)/sizeof(WdgIfDevice[0]),\r
+};\r
+\r
+const WdgIf_ConfigType WdgIfConfig =\r
+{\r
+ .WdgIf_General = &WdgIfGeneral,\r
+ .WdgIf_Device = WdgIfDevice,\r
+};\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef WDGIF_CFG_H_\r
+#define WDGIF_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "WdgIf_Types.h"\r
+\r
+typedef struct\r
+{\r
+ uint8 WdgIf_DeviceIndex;\r
+ const Wdg_GeneralType *WdgRef;\r
+}WdgIf_DeviceType;\r
+\r
+typedef struct\r
+{\r
+ uint8 WdgIf_NumberOfDevices;\r
+}WdgIf_GeneralType;\r
+\r
+typedef struct\r
+{\r
+ const WdgIf_GeneralType *WdgIf_General;\r
+ const WdgIf_DeviceType *WdgIf_Device;\r
+}WdgIf_ConfigType;\r
+\r
+extern const WdgIf_DeviceType WdgIfDevice[];\r
+extern const WdgIf_ConfigType WdgIfConfig;\r
+#endif /* WDGIF_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+\r
+#ifndef WDGM_CFG_H_\r
+#define WDGM_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "WdgIf_Types.h"\r
+#include "WdgIf.h"\r
+#include "Gpt.h"\r
+\r
+#define WDGM_DEV_ERROR_DETECT STD_ON\r
+#define WDGM_OFF_MODE_ENABLED STD_OFF\r
+\r
+typedef enum\r
+{\r
+ WDGM_ALIVE_ETASK1,\r
+ WDGM_ALIVE_ETASK2,\r
+ WDGM_ALIVE_BTASK3,\r
+\r
+ /** @req WDGM085 **/\r
+ WDGM_NBR_OF_ALIVE_SIGNALS\r
+}WdgM_SupervisedEntityIdType;\r
+\r
+typedef enum\r
+{\r
+ WDGM_WIDE_MODE,\r
+ WDGM_NARROW_MODE,\r
+ WDGM_OFF_MODE,\r
+ WDGM_GPT_MODE,\r
+ WDGM_NBR_OF_MODES,\r
+}WdgM_ModeType;\r
+\r
+typedef enum\r
+{\r
+ WDGM_TRIGGER_INSTANCE0,\r
+ WDGM_TRIGGER_INSTANCE1,\r
+ WDGM_NBR_OF_TRIGGERS,\r
+}WdgM_TriggerIdType;\r
+\r
+typedef enum\r
+{\r
+ WDGM_ALIVE_OK,\r
+ WDGM_ALIVE_FAILED,\r
+ WDGM_ALIVE_EXPIRED,\r
+ WDGM_ALIVE_STOPPED,\r
+ WDGM_ALIVE_DEACTIVATED,\r
+}WdgM_AliveSupervisionStatusType;\r
+\r
+typedef enum\r
+{\r
+ WDGM_SUPERVISION_DISABLED,\r
+ WDGM_SUPERVISION_ENABLED\r
+}WdgM_ActivationStatusType;\r
+\r
+typedef int16_t WdgM_SupervisionCounterType ;\r
+typedef uint16_t WdgM_TriggerCounterType ;\r
+\r
+typedef struct\r
+{\r
+ WdgM_SupervisionCounterType AliveCounter;\r
+ WdgM_SupervisionCounterType SupervisionCycle;\r
+ WdgM_AliveSupervisionStatusType SupervisionStatus;\r
+ WdgM_SupervisionCounterType NbrOfFailedRefCycles;\r
+}WdgM_AliveEntityStateType;\r
+\r
+typedef struct\r
+{\r
+ /** @req WDGM093 **/\r
+ const boolean WdgM_DeactivationAccessEnabled;\r
+ const WdgM_SupervisedEntityIdType WdgM_SupervisedEntityID;\r
+}WdgM_SupervisedEntityType;\r
+\r
+/** @req WDGM046 **/\r
+/** @req WDGM090 **/\r
+/** @req WDGM091 **/\r
+/** @req WDGM095 **/\r
+/** @req WDGM096 **/\r
+typedef struct\r
+{\r
+ const boolean WdgM_ActivationActivated;\r
+ const WdgM_SupervisedEntityIdType WdgM_AliveSupervisionConfigID;\r
+ const WdgM_SupervisionCounterType WdgM_ExpectedAliveIndications;\r
+ const WdgM_SupervisionCounterType WdgM_SupervisionReferenceCycle;\r
+ const WdgM_SupervisionCounterType WdgM_FailedSupervisionReferenceCycleTolerance;\r
+ const WdgM_SupervisionCounterType WdgM_MinMargin;\r
+ const WdgM_SupervisionCounterType WdgM_MaxMargin;\r
+ const WdgM_SupervisedEntityType *WdgM_SupervisedEntityRef;\r
+}WdgM_AliveSupervisionType;\r
+\r
+typedef struct\r
+{\r
+ const sint8 *WdgM_WatchdogName;\r
+ const WdgIf_DeviceType *WdgM_DeviceRef;\r
+}WdgM_WatchdogType;\r
+\r
+/** @req WDGM002 **/\r
+/** @req WDGM003 **/\r
+typedef struct\r
+{\r
+ const uint16 WdgM_NumberOfSupervisedEntities;\r
+ const uint16 WdgM_NumberOfWatchdogs;\r
+ const WdgM_SupervisedEntityType *WdgM_SupervisedEntityPtr;\r
+ const WdgM_WatchdogType *WdgM_Watchdog;\r
+}WdgM_GeneralType;\r
+\r
+/** @req WDGM116 **/\r
+typedef struct\r
+{\r
+ const uint16 WdgM_TriggerReferenceCycle;\r
+ const WdgIf_ModeType WdgM_WatchdogMode;\r
+ const WdgM_WatchdogType *WdgM_WatchdogRef;\r
+}WdgM_TriggerType;\r
+\r
+typedef struct\r
+{\r
+ const float32 WdgM_SupervisionCycle;\r
+ const float32 WdgM_TriggerCycle;\r
+}WdgM_ActivationSchMType;\r
+\r
+typedef struct\r
+{\r
+ const uint32 WdgM_GptCycle;\r
+ const Gpt_ChannelType WdgM_GptChannelRef; // TODO type??\r
+}WdgM_ActivationGPTType;\r
+\r
+typedef struct\r
+{\r
+ const boolean WdgM_IsGPTActivated;\r
+ const WdgM_ActivationSchMType WdgM_ActivationSchM;\r
+ const WdgM_ActivationGPTType WdgM_ActivationGPT;\r
+}WdgM_ActivationType;\r
+\r
+typedef struct\r
+{\r
+ const WdgM_SupervisionCounterType WdgM_ExpiredSupervisionCycleTol;\r
+ const WdgM_ModeType WdgM_ModeId;\r
+ const WdgM_ActivationType WdgM_Activation;\r
+ const WdgM_AliveSupervisionType *WdgM_AliveSupervisionPtr;\r
+ const WdgM_TriggerType WdgM_Trigger[WDGM_NBR_OF_TRIGGERS];\r
+}WdgM_ModeConfigType;\r
+\r
+typedef struct\r
+{\r
+ const WdgM_ModeType WdgM_InitialMode;\r
+ WdgM_AliveEntityStateType *WdgM_AliveEntityStatePtr;\r
+ const WdgM_ModeConfigType WdgM_Mode[];\r
+}WdgM_ConfigSetType;\r
+\r
+/** @req WDGM118 **/\r
+typedef struct\r
+{\r
+ const WdgM_GeneralType *WdgM_General;\r
+ const WdgM_ConfigSetType *WdgM_ConfigSet;\r
+}WdgM_ConfigType;\r
+\r
+extern const WdgM_ConfigType WdgMConfig;\r
+\r
+#endif /* WDGM_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "WdgM.h"\r
+#include "WdgIf.h"\r
+\r
+\r
+WdgM_AliveEntityStateType WdgM_Supervision[WDGM_NBR_OF_ALIVE_SIGNALS];\r
+\r
+const WdgM_SupervisedEntityType WdgM_SupervisedEntity [WDGM_NBR_OF_ALIVE_SIGNALS] =\r
+{\r
+ {\r
+ .WdgM_DeactivationAccessEnabled = TRUE,\r
+ .WdgM_SupervisedEntityID = WDGM_ALIVE_ETASK1,\r
+ },\r
+ {\r
+ .WdgM_DeactivationAccessEnabled = TRUE,\r
+ .WdgM_SupervisedEntityID = WDGM_ALIVE_ETASK2,\r
+ },\r
+ {\r
+ .WdgM_DeactivationAccessEnabled = TRUE,\r
+ .WdgM_SupervisedEntityID = WDGM_ALIVE_BTASK3,\r
+ },\r
+};\r
+\r
+\r
+const WdgM_AliveSupervisionType WdgM_AliveSupervisionNarrow [WDGM_NBR_OF_ALIVE_SIGNALS] =\r
+{\r
+ {\r
+ .WdgM_ActivationActivated = TRUE,\r
+ .WdgM_AliveSupervisionConfigID = WDGM_ALIVE_ETASK1, // TODO Is this really what we should do??\r
+ .WdgM_ExpectedAliveIndications = 2,\r
+ .WdgM_SupervisionReferenceCycle = 76,\r
+ .WdgM_FailedSupervisionReferenceCycleTolerance = 2,\r
+ .WdgM_MinMargin = 1,\r
+ .WdgM_MaxMargin = 0,\r
+ .WdgM_SupervisedEntityRef = &WdgM_SupervisedEntity[WDGM_ALIVE_ETASK1],\r
+ },\r
+ {\r
+ .WdgM_ActivationActivated = TRUE,\r
+ .WdgM_AliveSupervisionConfigID = WDGM_ALIVE_ETASK2, // TODO Is this really what we should do??\r
+ .WdgM_ExpectedAliveIndications = 2,\r
+ .WdgM_SupervisionReferenceCycle = 76,\r
+ .WdgM_FailedSupervisionReferenceCycleTolerance = 2,\r
+ .WdgM_MinMargin = 1,\r
+ .WdgM_MaxMargin = 0,\r
+ .WdgM_SupervisedEntityRef = &WdgM_SupervisedEntity[WDGM_ALIVE_ETASK2],\r
+ },\r
+ {\r
+ .WdgM_ActivationActivated = TRUE,\r
+ .WdgM_AliveSupervisionConfigID = WDGM_ALIVE_BTASK3, // TODO Is this really what we should do??\r
+ .WdgM_ExpectedAliveIndications = 2,\r
+ .WdgM_SupervisionReferenceCycle = 76,\r
+ .WdgM_FailedSupervisionReferenceCycleTolerance = 2,\r
+ .WdgM_MinMargin = 1,\r
+ .WdgM_MaxMargin = 0,\r
+ .WdgM_SupervisedEntityRef = &WdgM_SupervisedEntity[WDGM_ALIVE_BTASK3],\r
+ },\r
+};\r
+\r
+// Much wider tolerance..\r
+const WdgM_AliveSupervisionType WdgM_AliveSupervisionWide [WDGM_NBR_OF_ALIVE_SIGNALS] =\r
+{\r
+ {\r
+ .WdgM_ActivationActivated = TRUE,\r
+ .WdgM_AliveSupervisionConfigID = WDGM_ALIVE_ETASK1, // TODO Is this really what we should do??\r
+ .WdgM_ExpectedAliveIndications = 2,\r
+ .WdgM_SupervisionReferenceCycle = 76,\r
+ .WdgM_FailedSupervisionReferenceCycleTolerance = 10,\r
+ .WdgM_MinMargin = 10,\r
+ .WdgM_MaxMargin = 10,\r
+ .WdgM_SupervisedEntityRef = &WdgM_SupervisedEntity[WDGM_ALIVE_ETASK1],\r
+ },\r
+ {\r
+ .WdgM_ActivationActivated = TRUE,\r
+ .WdgM_AliveSupervisionConfigID = WDGM_ALIVE_ETASK2, // TODO Is this really what we should do??\r
+ .WdgM_ExpectedAliveIndications = 2,\r
+ .WdgM_SupervisionReferenceCycle = 76,\r
+ .WdgM_FailedSupervisionReferenceCycleTolerance = 10,\r
+ .WdgM_MinMargin = 10,\r
+ .WdgM_MaxMargin = 10,\r
+ .WdgM_SupervisedEntityRef = &WdgM_SupervisedEntity[WDGM_ALIVE_ETASK2],\r
+ },\r
+ {\r
+ .WdgM_ActivationActivated = TRUE,\r
+ .WdgM_AliveSupervisionConfigID = WDGM_ALIVE_BTASK3, // TODO Is this really what we should do??\r
+ .WdgM_ExpectedAliveIndications = 2,\r
+ .WdgM_SupervisionReferenceCycle = 76,\r
+ .WdgM_FailedSupervisionReferenceCycleTolerance = 10,\r
+ .WdgM_MinMargin = 10,\r
+ .WdgM_MaxMargin = 10,\r
+ .WdgM_SupervisedEntityRef = &WdgM_SupervisedEntity[WDGM_ALIVE_BTASK3],\r
+ },\r
+};\r
+\r
+const WdgM_WatchdogType WdgMWatchdog[] =\r
+{\r
+ {\r
+ .WdgM_WatchdogName = "STM32 Windowed Watchdog",\r
+ .WdgM_DeviceRef = &WdgIfDevice[WDGM_TRIGGER_INSTANCE0],\r
+ },\r
+ {\r
+ .WdgM_WatchdogName = "STM32 Independant Watchdog",\r
+ .WdgM_DeviceRef = &WdgIfDevice[WDGM_TRIGGER_INSTANCE1],\r
+ }\r
+};\r
+\r
+/** @req WDGMXXX **/\r
+const WdgM_ConfigSetType WdgMConfigSet =\r
+{\r
+ .WdgM_AliveEntityStatePtr = WdgM_Supervision,\r
+ .WdgM_InitialMode = WDGM_GPT_MODE,\r
+ .WdgM_Mode =\r
+ {\r
+ {\r
+ .WdgM_ExpiredSupervisionCycleTol = 5,\r
+ .WdgM_ModeId = WDGM_WIDE_MODE,\r
+ .WdgM_Activation =\r
+ {\r
+ .WdgM_IsGPTActivated = FALSE,\r
+ .WdgM_ActivationSchM = {.WdgM_SupervisionCycle = 0.001, .WdgM_TriggerCycle = 0.001},\r
+ .WdgM_ActivationGPT = {0,0},\r
+ },\r
+ .WdgM_AliveSupervisionPtr = WdgM_AliveSupervisionWide,\r
+ .WdgM_Trigger =\r
+ {\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 1,\r
+ .WdgM_WatchdogMode = WDGIF_SLOW_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE0],\r
+ },\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 20,\r
+ .WdgM_WatchdogMode = WDGIF_SLOW_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE1],\r
+ },\r
+ },\r
+ },\r
+ {\r
+ .WdgM_ExpiredSupervisionCycleTol = 1,\r
+ .WdgM_ModeId = WDGM_NARROW_MODE,\r
+ .WdgM_Activation =\r
+ {\r
+ .WdgM_IsGPTActivated = FALSE,\r
+ .WdgM_ActivationSchM = {.WdgM_SupervisionCycle = 0.001, .WdgM_TriggerCycle = 0.001},\r
+ .WdgM_ActivationGPT = {0,0},\r
+ },\r
+ .WdgM_AliveSupervisionPtr = WdgM_AliveSupervisionNarrow,\r
+ .WdgM_Trigger =\r
+ {\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 1,\r
+ .WdgM_WatchdogMode = WDGIF_FAST_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE0],\r
+ },\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 10,\r
+ .WdgM_WatchdogMode = WDGIF_FAST_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE1],\r
+ },\r
+ },\r
+ },\r
+ {\r
+ .WdgM_ExpiredSupervisionCycleTol = 1,\r
+ .WdgM_ModeId = WDGM_OFF_MODE,\r
+ .WdgM_Activation =\r
+ {\r
+ .WdgM_IsGPTActivated = FALSE,\r
+ .WdgM_ActivationSchM = {.WdgM_SupervisionCycle = 0.001, .WdgM_TriggerCycle = 0.001},\r
+ .WdgM_ActivationGPT = {0,0},\r
+ },\r
+ .WdgM_AliveSupervisionPtr = WdgM_AliveSupervisionWide,\r
+ .WdgM_Trigger =\r
+ {\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 1,\r
+ .WdgM_WatchdogMode = WDGIF_OFF_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE0],\r
+ },\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 1,\r
+ .WdgM_WatchdogMode = WDGIF_OFF_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE1],\r
+ },\r
+ },\r
+ },\r
+ {\r
+ .WdgM_ExpiredSupervisionCycleTol = 1,\r
+ .WdgM_ModeId = WDGM_GPT_MODE,\r
+ .WdgM_Activation =\r
+ {\r
+ .WdgM_IsGPTActivated = TRUE,\r
+ .WdgM_ActivationSchM = {.WdgM_SupervisionCycle = 0.001, .WdgM_TriggerCycle = 0.001},\r
+ .WdgM_ActivationGPT = {.WdgM_GptCycle = 5000, .WdgM_GptChannelRef = GPT_CHANNEL_TIM_3},\r
+ },\r
+ .WdgM_AliveSupervisionPtr = WdgM_AliveSupervisionWide,\r
+ .WdgM_Trigger =\r
+ {\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 1,\r
+ .WdgM_WatchdogMode = WDGIF_SLOW_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE0],\r
+ },\r
+ {\r
+ .WdgM_TriggerReferenceCycle = 10,\r
+ .WdgM_WatchdogMode = WDGIF_SLOW_MODE,\r
+ .WdgM_WatchdogRef = &WdgMWatchdog[WDGM_TRIGGER_INSTANCE1],\r
+ },\r
+ },\r
+ },\r
+ }\r
+};\r
+\r
+\r
+const WdgM_GeneralType WdgMGeneral =\r
+{\r
+ .WdgM_NumberOfSupervisedEntities = WDGM_NBR_OF_ALIVE_SIGNALS,\r
+ .WdgM_NumberOfWatchdogs = sizeof(WdgMWatchdog)/sizeof(WdgMWatchdog[0]),\r
+ //.WdgM_SupervisedEntityPtr; = ,\r
+ .WdgM_SupervisedEntityPtr = WdgM_SupervisedEntity,\r
+ .WdgM_Watchdog = WdgMWatchdog,\r
+};\r
+\r
+const WdgM_ConfigType WdgMConfig =\r
+{\r
+ .WdgM_General = &WdgMGeneral,\r
+ .WdgM_ConfigSet = &WdgMConfigSet,\r
+};\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef WDG_CFG_H_\r
+#define WDG_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "WdgIf_Types.h"\r
+\r
+typedef enum\r
+{\r
+ IWDG_CK_Counter_Clock_4 = 0,\r
+ IWDG_CK_Counter_Clock_8,\r
+ IWDG_CK_Counter_Clock_16,\r
+ IWDG_CK_Counter_Clock_32,\r
+ IWDG_CK_Counter_Clock_64,\r
+ IWDG_CK_Counter_Clock_128,\r
+ IWDG_CK_Counter_Clock_256,\r
+}Wdg_IWDG_TimerBaseType;\r
+\r
+typedef struct\r
+{\r
+ Wdg_IWDG_TimerBaseType TimerBase;\r
+ uint16 ReloadValue;\r
+ uint8 ActivationBit;\r
+}Wdg_IWDG_SettingsType;\r
+\r
+typedef struct\r
+{\r
+ WdgIf_ModeType Wdg_DefaultMode;\r
+ Wdg_IWDG_SettingsType WdgSettingsFast;\r
+ Wdg_IWDG_SettingsType WdgSettingsSlow;\r
+ Wdg_IWDG_SettingsType WdgSettingsOff;\r
+}Wdg_IWDG_ModeConfigType;\r
+\r
+typedef struct\r
+{\r
+ const Wdg_GeneralType *Wdg_General;\r
+ const Wdg_IWDG_ModeConfigType *Wdg_IWDGModeConfig;\r
+}Wdg_IWDG_ConfigType;\r
+\r
+extern const Wdg_GeneralType WdgIWDGGeneral;\r
+extern const Wdg_IWDG_ConfigType WdgIWDGConfig;\r
+\r
+typedef enum\r
+{\r
+ WDG_CK_Counter_Clock_1 = 0,\r
+ WDG_CK_Counter_Clock_2,\r
+ WDG_CK_Counter_Clock_4,\r
+ WDG_CK_Counter_Clock_8,\r
+}Wdg_WWDG_TimerBaseType;\r
+\r
+typedef struct\r
+{\r
+ Wdg_WWDG_TimerBaseType TimerBase;\r
+ uint8 WindowValue;\r
+ uint8 CounterPreset;\r
+ uint8 ActivationBit;\r
+}Wdg_WWDG_SettingsType;\r
+\r
+typedef struct\r
+{\r
+ WdgIf_ModeType Wdg_DefaultMode;\r
+ Wdg_WWDG_SettingsType WdgSettingsFast;\r
+ Wdg_WWDG_SettingsType WdgSettingsSlow;\r
+ Wdg_WWDG_SettingsType WdgSettingsOff;\r
+}Wdg_WWDG_ModeConfigType;\r
+\r
+typedef struct\r
+{\r
+ const Wdg_GeneralType *Wdg_General;\r
+ const Wdg_WWDG_ModeConfigType *Wdg_WWDGModeConfig;\r
+}Wdg_WWDG_ConfigType;\r
+\r
+typedef struct\r
+{\r
+ const Wdg_IWDG_ConfigType *Wdg_IWDG_Config;\r
+ const Wdg_WWDG_ConfigType *Wdg_WWDG_Config;\r
+}Wdg_ConfigType;\r
+\r
+ extern const Wdg_GeneralType WdgWWDGGeneral;\r
+ extern const Wdg_WWDG_ConfigType WdgWWDGConfig;\r
+ extern const Wdg_ConfigType WdgConfig;\r
+\r
+#endif /* WDG_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "Wdg.h"\r
+\r
+const Wdg_IWDG_ModeConfigType WdgIWDGModeConfig =\r
+{\r
+ .Wdg_DefaultMode = WDGIF_OFF_MODE,\r
+ .WdgSettingsFast =\r
+ {\r
+ .TimerBase = IWDG_CK_Counter_Clock_8,\r
+ .ReloadValue = 0x7FF,\r
+ .ActivationBit = 1,\r
+ },\r
+ .WdgSettingsSlow =\r
+ {\r
+ .TimerBase = IWDG_CK_Counter_Clock_256,\r
+ .ReloadValue = 0xFFF,\r
+ .ActivationBit = 1,\r
+ },\r
+ .WdgSettingsOff =\r
+ {\r
+ .TimerBase = IWDG_CK_Counter_Clock_4,\r
+ .ReloadValue = 0x7F,\r
+ .ActivationBit = 0,\r
+ },\r
+};\r
+\r
+const Wdg_GeneralType WdgIWDGGeneral =\r
+{\r
+ .Wdg_Index = 1,\r
+ .Wdg_TriggerLocationPtr = Wdg_IWDG_Trigger,\r
+ .Wdg_SetModeLocationPtr = Wdg_IWDG_SetMode,\r
+};\r
+\r
+\r
+const Wdg_IWDG_ConfigType WdgIWDGConfig =\r
+{\r
+ .Wdg_General = &WdgIWDGGeneral,\r
+ .Wdg_IWDGModeConfig = &WdgIWDGModeConfig,\r
+};\r
+\r
+\r
+/* The windowed watchdog is clocked from PCLK1. Max allowed frequency\r
+ * of this is 36Mhz.\r
+ *\r
+ * Max Twwdg = T_PCLK1 * 4096 * 2^TimerBase * (CounterPreset & 0x3F) + 1)=\r
+ *\r
+ * = 58.25 ms\r
+ *\r
+ *\r
+ *\r
+ * Min Twwdg = T_PCLK1 * 4096 * 2^TimerBase * (CounterPreset & 0x3F) + 1)=\r
+ *\r
+ * = 7.28 ms\r
+ * */\r
+\r
+/* TODO: Add implementation for Independent WD as well. This will make it\r
+ * possible to test a multiple WD design within the STM32. */\r
+const Wdg_WWDG_ModeConfigType WdgWWDGModeConfig =\r
+{\r
+ .Wdg_DefaultMode = WDGIF_OFF_MODE,\r
+ .WdgSettingsFast =\r
+ {\r
+ .TimerBase = WDG_CK_Counter_Clock_4,\r
+ .WindowValue = 0x7F,\r
+ .CounterPreset = 0x7F,\r
+ .ActivationBit = 1,\r
+ },\r
+ .WdgSettingsSlow =\r
+ {\r
+ .TimerBase = WDG_CK_Counter_Clock_8,\r
+ .WindowValue = 0x7F,\r
+ .CounterPreset = 0x7F,\r
+ .ActivationBit = 1,\r
+ },\r
+ .WdgSettingsOff =\r
+ {\r
+ .TimerBase = WDG_CK_Counter_Clock_8,\r
+ .WindowValue = 0x7F,\r
+ .CounterPreset = 0x7F,\r
+ .ActivationBit = 0,\r
+ },\r
+};\r
+const Wdg_GeneralType WdgWWDGGeneral =\r
+{\r
+ .Wdg_Index = 0,\r
+ .Wdg_TriggerLocationPtr = Wdg_WWDG_Trigger,\r
+ .Wdg_SetModeLocationPtr = Wdg_WWDG_SetMode,\r
+};\r
+\r
+const Wdg_WWDG_ConfigType WdgWWDGConfig =\r
+{\r
+ .Wdg_General = &WdgWWDGGeneral,\r
+ .Wdg_WWDGModeConfig = &WdgWWDGModeConfig,\r
+};\r
+\r
+const Wdg_ConfigType WdgConfig =\r
+{\r
+ &WdgIWDGConfig,\r
+ &WdgWWDGConfig,\r
+};\r
--- /dev/null
+# Project files (adds all .c files in project root)\r
+PROJECT_C_FILES=$(notdir $(wildcard ../*.c))\r
+obj-y += $(PROJECT_C_FILES:%.c=%.o)\r
+\r
+VPATH += ..\r
+\r
+inc-y += $(ROOTDIR)/system/kernel/$(objdir)\r
+inc-y += $(ROOTDIR)/system/kernel/include\r
+\r
+# The more precise configuration, the higher preceedance.\r
+VPATH := ../config/$(BOARDDIR) ../config $(VPATH)\r
+inc-y := ../config/$(BOARDDIR) ../config $(inc-y)\r
+\r
+# Board object files\r
+include $(ROOTDIR)/boards/board_common.mk\r
+\r
+# linkfile\r
+ldcmdfile-y = linkscript_gcc.ldp\r
+vpath %.ldf $(ROOTDIR)/$(ARCH_PATH-y)/scripts\r
+\r
+# What I want to build\r
+build-exe-y = wdgm_node_project.elf\r
+\r
+\r
+#################### Arctic Core make system ######################\r
+# Following is an explanation of the most usable features \r
+# of the Arctic Core make system.\r
+#\r
+# obj-y : list of object files to build.\r
+# VPATH : list of directories in which to\r
+# look for source files.\r
+# inc-y : list of directories in which to\r
+# look for header files.\r
+# libitem-y : list of libraries to include. \r
+# build-exe-y : the name of build the output file.\r
+# ldcmdfile-y: path to linkscript, used when building "build-exe-y"\r
+#\r
+# For more information see:\r
+# http://arccore.com/wiki/Makesystem\r
+###################################################################\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+/*\r
+ * wdgm_node.c\r
+ *\r
+ * Created on: 28 feb 2011\r
+ * Author: Fredrik\r
+ */\r
+\r
+#include "Os.h"\r
+#include "Mcu.h"\r
+#include "arc.h"\r
+#include "WdgM.h"\r
+#include "Dio.h"\r
+#include "Gpt.h"\r
+\r
+#define USE_LDEBUG_PRINTF\r
+#include "debug.h"\r
+\r
+// How many errors to keep in error log.\r
+#define ERROR_LOG_SIZE 20\r
+\r
+/**\r
+ * Just an example of a basic task.\r
+ */\r
+\r
+void btask_3( void ) {\r
+ StackInfoType si;\r
+ TaskType currTask;\r
+ LDEBUG_PRINTF("[%08u] btask_3 start\n", (unsigned)GetOsTick() );\r
+\r
+ WdgM_UpdateAliveCounter (WDGM_ALIVE_BTASK3);\r
+\r
+ GetTaskID(&currTask);\r
+ Os_Arc_GetStackInfo(currTask,&si);\r
+ LDEBUG_PRINTF("btask_3: Stack usage %u%%\n",\r
+ (unsigned)OS_STACK_USAGE(&si));\r
+\r
+ TerminateTask();\r
+}\r
+\r
+void WDTask( void ) {\r
+\r
+ /* Service the WD manager. */\r
+ WdgM_MainFunction_AliveSupervision();\r
+ WdgM_MainFunction_Trigger();\r
+\r
+ TerminateTask();\r
+}\r
+\r
+/**\r
+ * An extended task is auto-started and is also triggered by an alarm\r
+ * that sets event 2.\r
+ */\r
+\r
+void etask_1( void ) {\r
+ volatile float tryFloatingPoint = 0.0F;\r
+ StackInfoType si;\r
+ TaskType currTask;\r
+\r
+ LDEBUG_PRINTF("etask_1 start\n");\r
+ for(;;) {\r
+ WdgM_UpdateAliveCounter (WDGM_ALIVE_ETASK1);\r
+\r
+ SetEvent(TASK_ID_etask_2,EVENT_MASK_EVENT_1);\r
+ WaitEvent(EVENT_MASK_EVENT_2);\r
+ ClearEvent(EVENT_MASK_EVENT_2);\r
+\r
+ tryFloatingPoint += 1.0F;\r
+ GetTaskID(&currTask);\r
+ Os_Arc_GetStackInfo(currTask,&si);\r
+ LDEBUG_PRINTF("etask_1: Stack usage %u%% \n",\r
+ (unsigned)OS_STACK_USAGE(&si));\r
+\r
+ }\r
+}\r
+\r
+/**\r
+ * An extended task that receives events from someone\r
+ * and activates task: btask_3.\r
+ */\r
+static Dio_LevelType level;\r
+\r
+void etask_2( void ) {\r
+ TickType wdCnt;\r
+ LDEBUG_PRINTF("etask_2 start\n");\r
+\r
+ WdgM_SetMode(WDGM_WIDE_MODE);\r
+\r
+ for(;;) {\r
+ WaitEvent(EVENT_MASK_EVENT_1);\r
+ ClearEvent(EVENT_MASK_EVENT_1);\r
+ ActivateTask(TASK_ID_btask_3);\r
+ {\r
+ StackInfoType si;\r
+ TaskType currTask;\r
+ GetTaskID(&currTask);\r
+ Os_Arc_GetStackInfo(currTask,&si);\r
+ LDEBUG_PRINTF("etask_1: Stack usage %u%% \n",\r
+ (unsigned)OS_STACK_USAGE(&si));\r
+\r
+ level ^= 1;\r
+ Dio_WriteChannel(DIO_CHANNEL_NAME_HeartBeatLED, level);\r
+\r
+ {\r
+ static uint8 changeMode = 1;\r
+ if (changeMode)\r
+ {\r
+ WdgM_SetMode(WDGM_NARROW_MODE);\r
+ changeMode = 0;\r
+ }\r
+ }\r
+ /* WdgM supervised task. */\r
+ GetCounterValue(COUNTER_ID_WDFailureCounter, &wdCnt);\r
+ if (wdCnt < 75)\r
+ {\r
+ IncrementCounter(COUNTER_ID_WDFailureCounter);\r
+ WdgM_UpdateAliveCounter (WDGM_ALIVE_ETASK2);\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+\r
+\r
+/*\r
+ * Functions that must be supplied by the example\r
+ */\r
+\r
+void OsIdle( void ) {\r
+ for(;;);\r
+}\r
+\r
+\r
+/* Global hooks */\r
+ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
+ LDEBUG_PRINTF("## ProtectionHook\n");\r
+ return PRO_KILLAPPL;\r
+}\r
+\r
+void StartupHook( void ) {\r
+ uint32_t sys_freq = McuE_GetSystemClock();\r
+\r
+ LDEBUG_PRINTF("## StartupHook\n");\r
+\r
+ LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);\r
+}\r
+\r
+void ShutdownHook( StatusType Error ) {\r
+ LDEBUG_PRINTF("## ShutdownHook\n");\r
+ while(1);\r
+}\r
+\r
+struct LogBad_s {\r
+ uint32_t param1;\r
+ uint32_t param2;\r
+ uint32_t param3;\r
+ TaskType taskId;\r
+ OsServiceIdType serviceId;\r
+ StatusType error;\r
+};\r
+\r
+void ErrorHook( StatusType Error ) {\r
+\r
+ TaskType task;\r
+ static struct LogBad_s LogBad[ERROR_LOG_SIZE];\r
+ static uint8_t ErrorCount = 0;\r
+\r
+ GetTaskID(&task);\r
+\r
+\r
+ OsServiceIdType service = OSErrorGetServiceId();\r
+\r
+ /* Grab the arguments to the functions\r
+ * This is the standard way, see 11.2 in OSEK spec\r
+ */\r
+ switch(service) {\r
+ case OSServiceId_SetRelAlarm:\r
+ {\r
+ // Read the arguments to the faulty functions...\r
+ AlarmType alarm_id = OSError_SetRelAlarm_AlarmId;\r
+ TickType increment = OSError_SetRelAlarm_Increment;\r
+ TickType cycle = OSError_SetRelAlarm_Cycle;\r
+ (void)alarm_id;\r
+ (void)increment;\r
+ (void)cycle;\r
+\r
+ // ... Handle this some way.\r
+ break;\r
+ }\r
+ /*\r
+ * The same pattern as above applies for all other OS functions.\r
+ * See Os.h for names and definitions.\r
+ */\r
+\r
+ default:\r
+ break;\r
+ }\r
+\r
+ LDEBUG_PRINTF("## ErrorHook err=%u\n",Error);\r
+\r
+ /* Log the errors in a buffer for later review */\r
+ LogBad[ErrorCount].param1 = os_error.param1;\r
+ LogBad[ErrorCount].param2 = os_error.param2;\r
+ LogBad[ErrorCount].param3 = os_error.param3;\r
+ LogBad[ErrorCount].serviceId = service;\r
+ LogBad[ErrorCount].taskId = task;\r
+ LogBad[ErrorCount].error = Error;\r
+\r
+ ErrorCount++;\r
+\r
+ // Stall if buffer is full.\r
+ while(ErrorCount >= ERROR_LOG_SIZE);\r
+}\r
+\r
+void PreTaskHook( void ) {\r
+ TaskType task;\r
+ GetTaskID(&task);\r
+// LDEBUG_PRINTF("## PreTaskHook, taskid=%u\n",task);\r
+}\r
+\r
+void PostTaskHook( void ) {\r
+ TaskType task;\r
+ GetTaskID(&task);\r
+// LDEBUG_PRINTF("## PostTaskHook, taskid=%u\n",task);\r
+}\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>wdgm_node_stm32</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="89230a07-67e7-4bd4-8d9e-df0ae13db81a">\r
+ <SHORT-NAME>wdgm_node_stm32</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F103</SD>\r
+ <SD GID="GENDIR">/wdgm_node_project/config</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/wdgm_node_stm32/SwComposition_wdgm_node_stm32</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/wdgm_node_stm32/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/wdgm_node_stm32/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/wdgm_node_stm32/Dio</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/wdgm_node_stm32/Mcu</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="78904906-8b4f-46c9-8e94-40bc3b38406a">\r
+ <SHORT-NAME>SwComposition_wdgm_node_stm32</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="eea1174a-2357-431d-b661-7a5f37e9bd98">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="9eb8b182-ead5-4730-a2fb-86299bbcbb48">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>2000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b1d08a2d-a888-481e-8ff6-1d5317a6a3dd">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7c72fe14-02cd-4e7c-bbfc-cdd4b9293dd4">\r
+ <SHORT-NAME>Alarm_4ms</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/wdgm_node_stm32/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="420a57db-4d62-4af2-a2f2-3cfea8169a56">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>50</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c5d73d2e-ad5b-43cc-b6a4-5469bc7ce3b8">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/wdgm_node_stm32/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/wdgm_node_stm32/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="eb0ca011-126f-447b-ba13-4b8bb28c223c">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="51028494-a1ca-4d6e-bbf7-1260e3c066af">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>1048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a32eecce-e3bc-433c-9d6a-aa606acfe835">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="e0c2403a-a4b7-498e-8464-5275f17fa4a8">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="58eeb099-530b-46b1-b885-1d77f0f50438">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="dbe07b3f-c444-4ee9-8505-a72b21dbe7a7">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4f746f41-25a7-4aea-92e5-f302ce664b48">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="c1679e07-893b-42a5-993c-69763eedd086">\r
+ <SHORT-NAME>EVENT_0</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="82b28084-c8af-46ae-b0ba-415bec4e1fad">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="16f600bd-14ac-45dd-8895-bdf40713e30d">\r
+ <SHORT-NAME>Alarm_WdM</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/wdgm_node_stm32/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="e8690413-12d0-4ed4-ac61-37f179399a22">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/wdgm_node_stm32/Os/WDTask</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f2cdf144-e9d6-494c-8188-a709b34d823e">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0064690c-9c22-41e5-8d6b-4b4d2c858100">\r
+ <SHORT-NAME>WDTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>1048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="216b2d88-9860-4527-9150-9a2bfa973bcd">\r
+ <SHORT-NAME>WDFailureCounter</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>SOFTWARE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="3af34507-eb57-452c-82c5-b546fd9452f2">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="569221ec-0a10-41ff-b296-34211660bc6a">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b54df27d-2511-4f19-8d93-2d4f2447c42b">\r
+ <SHORT-NAME>PortContainer_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="51704227-b8a9-4651-b486-dd3b567fec46">\r
+ <SHORT-NAME>B15</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>31</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8254079b-0f5f-4825-bd83-9a609421a6f6">\r
+ <SHORT-NAME>B8</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>24</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e20dd6fa-9a86-40e0-9bc6-05b0e8a0072d">\r
+ <SHORT-NAME>B9</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>25</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="bdd76e30-8fb6-45be-a6eb-c4639880df0c">\r
+ <SHORT-NAME>B10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>26</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a510ee0a-5ee8-4a25-a213-5f01fe6d0af7">\r
+ <SHORT-NAME>B11</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>27</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a629bc64-f63a-48e3-aa26-fc32cc282ace">\r
+ <SHORT-NAME>B12</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>28</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="534c0a29-bf50-40b3-a4ca-31b0d81f310f">\r
+ <SHORT-NAME>B13</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>29</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0b37d04a-b9af-49a5-80be-295a41def502">\r
+ <SHORT-NAME>B14</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>OUTPUT_2MHz_MODE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcReducedDrive</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>30</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/ArcPortPinName</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>OUTPUT_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>OUTPUT_PUSHPULL_CNF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f7a113fe-4e0f-4c13-9c60-eddd8058d49c">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortGeneral/ArcGpioRemap</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="73bfa297-4f1b-4455-8253-1956d206eb2e">\r
+ <SHORT-NAME>Dio</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Dio</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="f3e2efa7-378a-41dd-b798-d3aabbaf7598">\r
+ <SHORT-NAME>DioGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Dio/DioGeneral/DioVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f8c73a1f-5735-4223-a36d-c24a4839c529">\r
+ <SHORT-NAME>DioPort_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioPortId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/Dio/DioPort/ArcCoreDioPhysicalPort</DEFINITION-REF>\r
+ <VALUE>B</VALUE>\r
+ </STRING-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="48e24619-3677-4209-99b3-bab28acb542d">\r
+ <SHORT-NAME>HeartBeatLED</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Dio/DioPort/DioChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Dio/DioPort/DioChannel/DioChannelId</DEFINITION-REF>\r
+ <VALUE>31</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="7b2f91d1-e84d-4bdc-876f-8d7581a696ba">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.2</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="8c73f81c-807c-4144-9091-04c56e8967c3">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="28d25fa3-3c24-45d4-b204-1fdebe9baa64">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="965c2963-e7b6-4070-8abb-0b1e79548df7">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>TIM3</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>GPIOB</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>WWDG</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB1ClocksEnable</DEFINITION-REF>\r
+ <VALUE>TIM2</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/ArcAPB2ClocksEnable</DEFINITION-REF>\r
+ <VALUE>AFIO</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/wdgm_node_stm32/Mcu/McuModuleConfiguration/McuClockSettingConfig/Clock</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="ea2ad50a-a4a8-402a-9ee3-89014c982b14">\r
+ <SHORT-NAME>Clock</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>8000000.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>9</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>8</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a06bc2ba-4821-4992-aee0-db6623a2f37a">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
typedef enum {\r
CAN_OK,\r
CAN_NOT_OK,\r
- CAN_BUSY,\r
+ CAN_BUSY\r
// CAN_WAKEUP, // Removed in 3.0\r
} Can_ReturnType;\r
\r
/* Error from CAN controller */\r
typedef union {\r
- volatile uint32_t R;\r
+ volatile uint32_t R;\r
struct {\r
- volatile uint32_t:24;\r
+ volatile uint32_t:24;\r
volatile uint32_t BIT1ERR:1;\r
volatile uint32_t BIT0ERR:1;\r
volatile uint32_t ACKERR:1;\r
#include "Can_Cfg.h"\r
\r
void Can_Init( const Can_ConfigType *Config );\r
-void Can_DeInit();\r
+void Can_DeInit(void);\r
\r
#if ( CAN_VERSION_INFO_API == STD_ON )\r
#define Can_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,CAN)\r
#define CANIF_AR_PATCH_VERSION 2\r
\r
#define CANIF_SW_MAJOR_VERSION 1\r
-#define CANIF_SW_MINOR_VERSION 1\r
+#define CANIF_SW_MINOR_VERSION 2\r
#define CANIF_SW_PATCH_VERSION 0\r
\r
#include "Det.h"\r
Std_ReturnType CanIf_SetPduMode( uint8 Controller, CanIf_ChannelSetModeType PduModeRequest );\r
Std_ReturnType CanIf_GetPduMode( uint8 Controller, CanIf_ChannelGetModeType *PduModePtr );\r
\r
-#if ( CANIF_SETDYNAMICTXID_API == STD_ON )\r
+#if ( CANIF_ARC_RUNTIME_PDU_CONFIGURATION == STD_ON )
void CanIf_SetDynamicTxId( PduIdType CanTxPduId, Can_IdType CanId );\r
+CanIf_TxPduConfigType * CanIf_FindTxPduEntry(PduIdType id);
+CanIf_RxPduConfigType * CanIf_FindRxPduEntry(PduIdType id);
+const CanIf_HrhConfigType* CanIf_Arc_GetReceiveHandler(CanIf_Arc_ChannelIdType Channel);
+const CanIf_HthConfigType* CanIf_Arc_GetTransmitHandler(CanIf_Arc_ChannelIdType Channel);
#endif\r
\r
#if ( CANIF_TRANSCEIVER_API == STD_ON )\r
#define CanIf_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,CANIF)\r
#endif\r
\r
+uint8 CanIf_Arc_GetChannelDefaultConfIndex(CanIf_Arc_ChannelIdType Channel);
+
#endif /*CANIF_H_*/\r
* SLEEP mode and can be woken up by request of the\r
* CAN driver or by a network event (must be supported\r
* by CAN hardware) */\r
- CANIF_CS_SLEEP,\r
+ CANIF_CS_SLEEP\r
} CanIf_ControllerModeType;\r
\r
/** Status of the PDU channel group. Current mode of the channel defines its\r
* shall be set to the offline active mode\r
* => notifications are processed but transmit\r
* requests are blocked. */\r
- CANIF_SET_TX_OFFLINE_ACTIVE,\r
+ CANIF_SET_TX_OFFLINE_ACTIVE\r
} CanIf_ChannelSetModeType;\r
\r
\r
CANIF_NO_NOTIFICATION = 0, \r
/** The requested Rx/Tx CAN L-PDU was\r
* successfully transmitted or received. */\r
- CANIF_TX_RX_NOTIFICATION,\r
+ CANIF_TX_RX_NOTIFICATION\r
\r
} CanIf_NotifStatusType;\r
\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-#ifndef CANNM_H_\r
-#define CANNM_H_\r
+#ifndef CANNM_H\r
+#define CANNM_H\r
\r
#include "ComStack_Types.h"\r
#include "NmStack_Types.h"\r
#include "CanNm_Cfg.h"\r
\r
/** @req CANNM018 */\r
-#define CANNM_E_NO_INIT 0x01 /**< API service used */\r
-#define CANNM_E_INVALID_CHANNEL 0x02 /**< API service called with wrong channel handle */\r
+#define CANNM_E_NO_INIT 0x01u /**< API service used */\r
+#define CANNM_E_INVALID_CHANNEL 0x02u /**< API service called with wrong channel handle */\r
/** NM-Timeout Timer has abnormally expired outside of the Ready Sleep State;\r
it may happen: (1) because of Bus-Off state, (2) if some ECU requests bus communication or node detection shortly\r
before the NMTimeout Timer expires so that a NM message can not be transmitted in time;\r
this race condition applies to event-triggered systems */\r
-#define CANNM_E_DEV_NETWORK_TIMEOUT 0x11\r
-#define NM_E_NULL_POINTER 0x12 /**< Null pointer has been passed as an argument (Does not apply to function CanNm_Init) */\r
-\r
-\r
-#define CANNM_SERVICEID_INIT 0x00\r
-#define CANNM_SERVICEID_PASSIVESTARTUP 0x01\r
-#define CANNM_SERVICEID_NETWORKREQUEST 0x02\r
-#define CANNM_SERVICEID_NETWORKRELEASE 0x03\r
-#define CANNM_SERVICEID_DISABLECOMMUNICATION 0x0C\r
-#define CANNM_SERVICEID_ENABLECOMMUNICATION 0x0D\r
-#define CANNM_SERVICEID_SETUSERDATA 0x04\r
-#define CANNM_SERVICEID_GETUSERDATA 0x05\r
-#define CANNM_SERVICEID_GETNODEIDENTIFIER 0x06\r
-#define CANNM_SERVICEID_GETLOCALNODEIDENTIFIER 0x07\r
-#define CANNM_SERVICEID_REPEATMESSAGEREQUEST 0x08\r
-#define CANNM_SERVICEID_GETPDUDATA 0x0A\r
-#define CANNM_SERVICEID_GETSTATE 0x0B\r
-#define CANNM_SERVICEID_GETVERSIONINFO 0xF1\r
-#define CANNM_SERVICEID_REQUESTBUSSYNCHRONIZATION 0xC0\r
-#define CANNM_SERVICEID_CHECKREMOTESLEEPINDICATION 0xD0\r
-#define CANNM_SERVICEID_TXCONFIRMATION 0x0F\r
-#define CANNM_SERVICEID_RXINDICATION 0x10\r
-#define CANNM_SERVICEID_ARC_MAINFUNCTION 0x13\r
-\r
-#define CANNM_CBV_REPEAT_MESSAGE_REQUEST (1 << 0) /**< @req CANNM045 */\r
+#define CANNM_E_DEV_NETWORK_TIMEOUT 0x11u\r
+#define NM_E_NULL_POINTER 0x12u /**< Null pointer has been passed as an argument (Does not apply to function CanNm_Init) */\r
+\r
+\r
+#define CANNM_SERVICEID_INIT 0x00u\r
+#define CANNM_SERVICEID_PASSIVESTARTUP 0x01u\r
+#define CANNM_SERVICEID_NETWORKREQUEST 0x02u\r
+#define CANNM_SERVICEID_NETWORKRELEASE 0x03u\r
+#define CANNM_SERVICEID_DISABLECOMMUNICATION 0x0Cu\r
+#define CANNM_SERVICEID_ENABLECOMMUNICATION 0x0Du\r
+#define CANNM_SERVICEID_SETUSERDATA 0x04u\r
+#define CANNM_SERVICEID_GETUSERDATA 0x05u\r
+#define CANNM_SERVICEID_GETNODEIDENTIFIER 0x06u\r
+#define CANNM_SERVICEID_GETLOCALNODEIDENTIFIER 0x07u\r
+#define CANNM_SERVICEID_REPEATMESSAGEREQUEST 0x08u\r
+#define CANNM_SERVICEID_GETPDUDATA 0x0Au\r
+#define CANNM_SERVICEID_GETSTATE 0x0Bu\r
+#define CANNM_SERVICEID_GETVERSIONINFO 0xF1u\r
+#define CANNM_SERVICEID_REQUESTBUSSYNCHRONIZATION 0xC0u\r
+#define CANNM_SERVICEID_CHECKREMOTESLEEPINDICATION 0xD0u\r
+#define CANNM_SERVICEID_TXCONFIRMATION 0x0Fu\r
+#define CANNM_SERVICEID_RXINDICATION 0x10u\r
+#define CANNM_SERVICEID_ARC_MAINFUNCTION 0x13u\r
+\r
+#define CANNM_CBV_REPEAT_MESSAGE_REQUEST 0x01u /**< @req CANNM045 */\r
\r
// Functions called by NM Interface\r
// --------------------------------\r
Nm_ReturnType CanNm_GetState( const NetworkHandleType nmChannelHandle, Nm_StateType * const nmStatePtr, Nm_ModeType * const nmModePtr );\r
\r
/** This service returns the version information of this module. */\r
-void CanNm_GetVersionInfo( Std_VersionInfoType * versioninfo );\r
+#if ( CANNM_VERSION_INFO_API == STD_ON )\r
+#define CanNm_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,CANNM)\r
+#endif /* CANNM_VERSION_INFO_API */\r
\r
/** Request bus synchronization. */\r
Nm_ReturnType CanNm_RequestBusSynchronization( const NetworkHandleType nmChannelHandle );\r
void CanNm_RxIndication( PduIdType canNmRxPduId, const uint8 *canSduPtr );\r
\r
\r
-#endif /* CANNM_H_ */\r
+#endif /* CANNM_H */\r
typedef enum {\r
CANNM_PDU_BYTE_0 = 0x00,\r
CANNM_PDU_BYTE_1 = 0x01,\r
- CANNM_PDU_OFF = 0xFF,\r
+ CANNM_PDU_OFF = 0xFF\r
} CanNm_PduBytePositionType;\r
\r
/** @req CANNM202 @req CANNM203 */\r
/** @req CANNM188 @req CANNM196 @req CANNM199 */\r
#if (CANNM_DEV_ERROR_DETECT == STD_ON)\r
#define CANNM_DET_REPORTERROR(serviceId, errorId, instanceId) \\r
- Det_ReportError(MODULE_ID_CANNM, instanceId, serviceId, errorId)\r
+ Det_ReportError(MODULE_ID_CANNM, (uint8)instanceId, serviceId, errorId)\r
\r
#define CANNM_VALIDATE(expression, serviceId, errorId, instanceId, ...) \\r
if (!(expression)) { \\r
\r
typedef enum {\r
CANNM_INIT,\r
- CANNM_UNINIT,\r
+ CANNM_UNINIT\r
} CanNm_InitStatusType;\r
\r
typedef struct {\r
CANSM_UNINITED,\r
CANSM_NO_COMMUNICATION,\r
CANSM_SILENT_COMMUNICATION,\r
- CANSM_FULL_COMMUNICATION,\r
+ CANSM_FULL_COMMUNICATION\r
} CanSM_NetworkModeStateType;\r
\r
/** This type shall define the states of the bus-off recovery state machine. */\r
CANSM_BOR_TXOFF_L1, /**< Bus-off recovery level 1 state, TX disabled */\r
CANSM_BOR_CHECK_L1, /**< Bus-off recovery level 1 state, TX enabled again */\r
CANSM_BOR_TXOFF_L2, /**< Bus-off recovery level 2 state, TX disabled */\r
- CANSM_BOR_CHECK_L2, /**< Bus-off recovery level 2 state, TX enabled again */\r
-};\r
+ CANSM_BOR_CHECK_L2 /**< Bus-off recovery level 2 state, TX enabled again */\r
+} CanSM_BusOffRecoveryStateType; /** @req CANSM169 */\r
\r
/** @req CANSM037 */\r
\r
\r
/** Scheduled function of the CanSM */\r
/** @req CANSM065 */\r
-void CanSM_MainFunction();\r
+void CanSM_MainFunction(void);\r
\r
\r
\r
* Implemented functions\r
****************************/\r
\r
-void CanTp_Init(); /** @req CANTP208 **/\r
+void CanTp_Init(void); /** @req CANTP208 **/\r
\r
#if ( CANTP_VERSION_INFO_API == STD_ON ) /** @req CANTP162 *//** @req CANTP163 */\r
#define CanTp_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,CANTP) /** @req CANTP210 */ /* @req CANTP218 */\r
#endif /* CANTP_VERSION_INFO_API */\r
\r
-void CanTp_Shutdown(); /** @req CANTP211 */\r
+void CanTp_Shutdown(void); /** @req CANTP211 */\r
\r
Std_ReturnType CanTp_Transmit( PduIdType CanTpTxSduId, const PduInfoType * CanTpTxInfoPtr ); /** @req CANTP212 */\r
\r
Std_ReturnType FrTp_CancelTransmitRequest( PduIdType FrTpTxPduId, FrTp_CancelReasonType FrTpCancelReason ); /** @req CANTP246 */\r
\r
-void CanTp_MainFunction(); /** @req CANTP213 */\r
+void CanTp_MainFunction(void); /** @req CANTP213 */\r
\r
\r
#endif /* CANTP_H_ */\r
/** @req CANTP239 */\r
/** @req CANTP242 */\r
\r
+//lint -save -e451 //PC-Lint Wrong interpretation, "Platform_Types.h included twice without a standard include guard."\r
+\r
#ifndef CANTP_TYPES_H_\r
#define CANTP_TYPES_H_\r
\r
\r
\r
typedef struct {\r
- const int CanIf_FcPduId; // The polite CanIf PDU index.\r
- const int PduR_PduId; // The polite PduR index.\r
+ const PduIdType CanIf_FcPduId; // The polite CanIf PDU index.\r
+ const PduIdType PduR_PduId; // The polite PduR index.\r
const CanTp_AddressingFormantType CanTpAddressingFormant; /** @req CANTP242 */\r
const uint8 CanTpBs; /** @req CANTP243 */ /* Sets the maximum number of messages of N-PDUs before flow control. */\r
const uint16 CanTpNar; /** @req CANTP244 */ /* Timeout for transmission of a CAN frame (ms). */\r
} CanTp_RxNSduType; /** @req CANTP137 */\r
\r
typedef struct {\r
- const int CanIf_PduId; // The polite CanIf index.\r
- const int PduR_PduId; // The polite PduR index.\r
+ const PduIdType CanIf_PduId; // The polite CanIf index.\r
+ const PduIdType PduR_PduId; // The polite PduR index.\r
const CanTp_AddressingFormantType CanTpAddressingMode; /** @req CANTP262 */\r
const uint16 CanTpNas; /** @req CANTP263 */ /* N_As timeout for transmission of any CAN frame. */\r
const uint16 CanTpNbs; /** @req CANTP264 */ /* N_Bs timeout of transmission until reception of next Flow Control. */\r
\r
\r
#define COM_SW_MAJOR_VERSION 1\r
-#define COM_SW_MINOR_VERSION 0\r
+#define COM_SW_MINOR_VERSION 1\r
#define COM_SW_PATCH_VERSION 0\r
\r
#include "Com_Cfg.h"\r
#include "Com_Types.h"\r
#include "Com_PbCfg.h"\r
+//#include "Com_Internal.h" //TODO: Remove completely?\r
#include "Com_Com.h"\r
#include "Com_Sched.h"\r
\r
\r
\r
// From Autosar\r
-void Com_Init(const Com_ConfigType * ConfigPtr);\r
+void Com_Init(const Com_ConfigType * config);\r
void Com_DeInit(void);\r
\r
void Com_IpduGroupStart(Com_PduGroupIdType IpduGroupId, boolean Initialize);\r
\r
\r
\r
-#ifndef COMM_H_\r
-#define COMM_H_\r
+#ifndef COMM_H\r
+#define COMM_H\r
\r
/** @req COMM466 @req COMM518 @req COMM692 */\r
#include "ComStack_Types.h"\r
\r
\r
/** Initializes the AUTOSAR Communication Manager and restarts the internal state machines.*/\r
-void ComM_Init(const ComM_ConfigType *); /**< @req COMM146 */\r
+void ComM_Init(const ComM_ConfigType* Config); /**< @req COMM146 */\r
\r
/** De-initializes (terminates) the AUTOSAR Communication Manager. */\r
-void ComM_DeInit(); /**< @req COMM147 */\r
+void ComM_DeInit(void); /**< @req COMM147 */\r
\r
/** @req COMM370 */\r
#if (COMM_VERSION_INFO_API == STD_ON)\r
Std_ReturnType ComM_LimitChannelToNoComMode( NetworkHandleType Channel, boolean Status ); /**< @req COMM163 */\r
Std_ReturnType ComM_LimitECUToNoComMode( boolean Status ); /**< @req COMM124 */\r
Std_ReturnType ComM_ReadInhibitCounter( uint16* CounterValue ); /**< @req COMM224 */\r
-Std_ReturnType ComM_ResetInhibitCounter(); /**< @req COMM108 */\r
+Std_ReturnType ComM_ResetInhibitCounter(void); /**< @req COMM108 */\r
Std_ReturnType ComM_SetECUGroupClassification( ComM_InhibitionStatusType Status );\r
\r
\r
-#endif /*COMM_H_*/\r
+#endif /*COMM_H*/\r
COMM_BUS_TYPE_CAN,\r
COMM_BUS_TYPE_FR,\r
COMM_BUS_TYPE_INTERNAL,\r
- COMM_BUS_TYPE_LIN,\r
+ COMM_BUS_TYPE_LIN\r
} ComM_BusTypeType;\r
\r
typedef enum {\r
COMM_NM_VARIANT_NONE,\r
COMM_NM_VARIANT_LIGHT,\r
COMM_NM_VARIANT_PASSIVE,\r
- COMM_NM_VARIANT_FULL,\r
+ COMM_NM_VARIANT_FULL\r
} ComM_NmVariantType;\r
\r
typedef struct {\r
\r
\r
\r
-#ifndef COMM_DCM_H_\r
-#define COMM_DCM_H_\r
+#ifndef COMM_DCM_H\r
+#define COMM_DCM_H\r
\r
-void ComM_DCM_ActiveDiagnostic();\r
-void ComM_DCM_InactiveDiagnostic();\r
+void ComM_DCM_ActiveDiagnostic(void);\r
+void ComM_DCM_InactiveDiagnostic(void);\r
\r
-#endif /*COMM_DCM_H_*/\r
+#endif /*COMM_DCM_H*/\r
\r
\r
\r
-#ifndef COMM_ECUM_H_\r
-#define COMM_ECUM_H_\r
+#ifndef COMM_ECUM_H\r
+#define COMM_ECUM_H\r
\r
-void ComM_EcuM_RunModeIndication( NetworkHandleType channel );\r
+void ComM_EcuM_RunModeIndication( NetworkHandleType Channel );\r
void ComM_EcuM_WakeUpIndication( NetworkHandleType Channel );\r
\r
-#endif /*COMM_ECUM_H_*/\r
+#endif /*COMM_ECUM_H*/\r
\r
\r
\r
-#ifndef COMM_TYPES_H_\r
-#define COMM_TYPES_H_\r
+#ifndef COMM_TYPES_H\r
+#define COMM_TYPES_H\r
\r
/** Current mode of the Communication Manager (main state of the state machine). */\r
/** @req COMM484 @req COMM190 @req COMM248 */\r
typedef enum {\r
COMM_NO_COMMUNICATION = 0,\r
COMM_SILENT_COMMUNICATION = 1,\r
- COMM_FULL_COMMUNICATION = 2,\r
+ COMM_FULL_COMMUNICATION = 2\r
} ComM_ModeType;\r
\r
/** Initialization status of ComM. */\r
typedef enum {\r
COMM_UNINIT,\r
- COMM_INIT,\r
+ COMM_INIT\r
} ComM_InitStatusType; /**< @req COMM494 */\r
\r
/** Inhibition status of ComM. */\r
typedef uint8 ComM_InhibitionStatusType; /**< @req COMM496 */\r
\r
-#define COMM_INHIBITION_STATUS_NONE (0)\r
+#define COMM_INHIBITION_STATUS_NONE (0u)\r
/** Wake Up inhibition active */\r
-#define COMM_INHIBITION_STATUS_WAKE_UP (1 << 0)\r
+#define COMM_INHIBITION_STATUS_WAKE_UP (1u)\r
/** Limit to \93No Communication\94 mode active */\r
-#define COMM_INHIBITION_STATUS_NO_COMMUNICATION (1 << 1)\r
+#define COMM_INHIBITION_STATUS_NO_COMMUNICATION (uint8)(1u << 1)\r
\r
-#endif /*COMM_TYPES_H_*/\r
+#endif /*COMM_TYPES_H*/\r
BUFREQ_OK=0,\r
BUFREQ_NOT_OK,\r
BUFREQ_BUSY,\r
- BUFREQ_OVFL,\r
+ BUFREQ_OVFL\r
} BufReq_ReturnType;\r
\r
// 0x00--0x1e General return types\r
#ifndef COM_COM_H_\r
#define COM_COM_H_\r
\r
-#include "Com.h"\r
-#include "PduR.h"\r
+#include <Com.h>\r
+#include <PduR.h>\r
\r
uint8 Com_SendSignal(Com_SignalIdType SignalId, const void *SignalDataPtr);\r
uint8 Com_ReceiveSignal(Com_SignalIdType SignalId, void* SignalDataPtr);\r
\r
void Com_TriggerIPduSend(PduIdType ComTxPduId);\r
\r
-Std_ReturnType Com_RxIndication(PduIdType ComRxPduId, const uint8* PduInfoPtr);\r
+void Com_RxIndication(PduIdType ComRxPduId, const uint8* SduPtr); // TODO: Parameter SduPtr should be const PduInfoType* PduInfoPtr\r
void Com_TxConfirmation(PduIdType ComTxPduId);\r
\r
\r
\r
#include "Com.h"\r
\r
-void Com_MainFunctionRx();\r
-void Com_MainFunctionTx();\r
+void Com_MainFunctionRx(void);\r
+void Com_MainFunctionTx(void);\r
\r
// Not supported in this version.\r
//void Com_MainFunctionRouteSignals();\r
\r
typedef enum {\r
IMMEDIATE,\r
- DEFERRED,\r
+ DEFERRED\r
} Com_IPduSignalProcessingMode;\r
\r
typedef enum {\r
\r
typedef enum {\r
PENDING,\r
- TRIGGERED,\r
+ TRIGGERED\r
} ComTransferProperty_type;\r
\r
typedef enum {\r
DIRECT,\r
MIXED,\r
NONE,\r
- PERIODIC,\r
+ PERIODIC\r
} ComTxModeMode_type;\r
\r
\r
NEVER,\r
NEW_IS_OUTSIDE,\r
NEW_IS_WITHIN,\r
- ONE_EVERY_N,\r
+ ONE_EVERY_N\r
} ComFilterAlgorithm_type;\r
\r
typedef enum {\r
COM_BIG_ENDIAN,\r
COM_LITTLE_ENDIAN,\r
- COM_OPAQUE,\r
+ COM_OPAQUE\r
} ComSignalEndianess_type;\r
\r
typedef enum {\r
type == SINT32 ? sizeof(sint32) : sizeof(boolean)) \\r
\r
#define SignalTypeSignedness(type) \\r
- ((type == SINT8 || type == SINT16 || type == SINT32) ? \\r
+ (( (type == SINT8) || (type == SINT16) || (type == SINT32) ) ? \\r
COM_SIGNALTYPE_SIGNED : COM_SIGNALTYPE_UNSIGNED)\r
\r
/** Filter configuration type.\r
/** Filter for this signal.\r
* NOT SUPPORTED\r
*/\r
- const ComFilter_type ComFilter;\r
+ //const ComFilter_type ComFilter;\r
\r
/* Pointer to the shadow buffer of the signal group that this group signal is contained in.\r
*\r
/** The number of bytes if the signal has type UINT8_N;\r
* Range 1 to 8.\r
*/\r
- const uint8 ComSignalLength;\r
+ //const uint8 ComSignalLength;\r
\r
/** Defines the type of the signal. */\r
const Com_SignalType ComSignalType;\r
/** Filter for this signal.\r
* NOT SUPPORTED.\r
*/\r
- const ComFilter_type ComFilter;\r
+ //const ComFilter_type ComFilter;\r
\r
/** Marks if this signal is a signal group.\r
* Should be set to 1 if the signal is a signal group.\r
boolean (*ComIPduCallout)(PduIdType PduId, const uint8 *IPduData);\r
\r
\r
- /** The ID of this IPDU. */\r
- const uint8 ComIPduRxHandleId;\r
-\r
/** The outgoing PDU id. For polite PDU id handling. */\r
const uint8 ArcIPduOutgoingId;\r
\r
\r
/* REQ:COMPILER040,049,051 */\r
#define AUTOMATIC\r
-#define _STATIC_ static\r
+#define STATIC static\r
#define NULL_PTR ((void *)0)\r
\r
+#if defined(__GNUC__)\r
+#define CC_EXTENSION __extension__\r
+#elif defined(__CWCC__)\r
+#define CC_EXTENSION\r
+#endif\r
+\r
+#if defined(__GNUC__)\r
+#define SECTION_BALIGN(_align ) __attribute__ ((aligned (_align)));\r
+#else\r
+#error SECTION_BALIGN not defined for compiler\r
+#endif\r
+\r
+\r
/* REQ:COMPILER005 */\r
/* TODO: skip the memclass for now */\r
#define FUNC(rettype,memclass) rettype\r
#ifndef DCM_CBK_H_\r
#define DCM_CBK_H_\r
\r
+//lint -e451 //451 PC-Lint OK. Slå av regel helt?\r
#include "ComStack_Types.h"\r
\r
/*\r
Std_ReturnType Dem_GetEventFailed(Dem_EventIdType eventId, boolean *eventFailed); /** @req DEM196 */\r
Std_ReturnType Dem_GetEventTested(Dem_EventIdType eventId, boolean *eventTested); /** @req DEM197 */\r
Std_ReturnType Dem_GetFaultDetectionCounter(Dem_EventIdType eventId, sint8 *counter); /** @req DEM203 */\r
-Std_ReturnType Dem_SetOperationCycleState(Dem_OperationCycleIdType OperationCycleId, Dem_OperationCycleStateType CycleState); /** @req DEM194 */\r
+Std_ReturnType Dem_SetOperationCycleState(Dem_OperationCycleIdType operationCycleId, Dem_OperationCycleStateType cycleState); /** @req DEM194 */\r
Std_ReturnType Dem_GetDTCOfEvent(Dem_EventIdType eventId, Dem_DTCKindType dtcKind, uint32* dtcOfEvent); /** @req DEM198 */\r
\r
\r
*/\r
Dem_ReturnClearDTCType Dem_ClearDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin); /** @req DEM241 */\r
Dem_ReturnSetDTCFilterType Dem_SetDTCFilter(uint8 dtcStatusMask, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, Dem_FilterWithSeverityType filterWithSeverity, Dem_DTCSeverityType dtcSeverityMask, Dem_FilterForFDCType filterForFaultDetectionCounter); /** @req DEM208 */\r
-Dem_ReturnGetStatusOfDTCType Dem_GetStatusOfDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, Dem_EventStatusExtendedType* dtcStatus); /** @req DEM212 */\r
+Dem_ReturnGetStatusOfDTCType Dem_GetStatusOfDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, Dem_EventStatusExtendedType* status); /** @req DEM212 */\r
Std_ReturnType Dem_GetDTCStatusAvailabilityMask(uint8 *dtcStatusMask); /** @req DEM213 */\r
Dem_ReturnGetNumberOfFilteredDTCType Dem_GetNumberOfFilteredDtc(uint16* numberOfFilteredDTC); /** @req DEM214 */\r
Dem_ReturnGetNextFilteredDTCType Dem_GetNextFilteredDTC(uint32* dtc, Dem_EventStatusExtendedType* dtcStatus); /** @req DEM215 */\r
Dem_ReturnTypeOfDtcSupportedType Dem_GetTranslationType(void); /** @req DEM230 */\r
Dem_ReturnControlDTCStorageType Dem_DisableDTCStorage(Dem_DTCGroupType dtcGroup, Dem_DTCKindType dtcKind); /** @req DEM242 */\r
Dem_ReturnControlDTCStorageType Dem_EnableDTCStorage(Dem_DTCGroupType dtcGroup, Dem_DTCKindType dtcKind); /** @req DEM243 */\r
-Dem_ReturnGetExtendedDataRecordByDTCType Dem_GetExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint8 *destBuffer, uint8 *bufSize); /** @req DEM239 */\r
+Dem_ReturnGetExtendedDataRecordByDTCType Dem_GetExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint8 *destBuffer, uint16 *bufSize); /** @req DEM239 */\r
Dem_ReturnGetSizeOfExtendedDataRecordByDTCType Dem_GetSizeOfExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint16 *sizeOfExtendedDataRecord); /** @req DEM240 */\r
\r
\r
/*\r
* Development Error Tracer driver\r
*\r
- * Specification: Autosar v2.0.1, Final\r
- *\r
*/\r
\r
-#ifndef _DET_H_\r
-#define _DET_H_\r
+\r
+/*\r
+ * General requirements\r
+ */\r
+/** @req DET004 */\r
+\r
+#ifndef DET_H\r
+#define DET_H\r
\r
#define DET_MODULE_ID MODULE_ID_DET\r
#define DET_VENDOR_ID 1\r
\r
+/* Implementation version */\r
#define DET_SW_MAJOR_VERSION 1\r
#define DET_SW_MINOR_VERSION 0\r
#define DET_SW_PATCH_VERSION 0\r
\r
+/* AUTOSAR specification document version */\r
#define DET_AR_MAJOR_VERSION 2\r
#define DET_AR_MINOR_VERSION 2\r
#define DET_AR_PATCH_VERSION 2\r
\r
#define DET_CALLBACK_API 0xFF\r
\r
+#define DET_CBK_REGISTRATION_FAILED_INDEX 0xFF\r
+\r
// Type used to store errors\r
typedef struct\r
{\r
} Det_EntryType;\r
\r
#if ( DET_ENABLE_CALLBACKS == STD_ON )\r
-typedef void *(*detCbk_t)( uint16 ModuleId, uint8 InstanceId , uint8 ApiId, uint8 ErrorId);\r
+typedef void (*detCbk_t)( uint16 ModuleId, uint8 InstanceId , uint8 ApiId, uint8 ErrorId);\r
\r
/*\r
* Add a callback function to the array of callback. After a call to Det_ReportError the callback\r
* is called. This can be used in for instance unit tests to verify that correct errors are\r
* reported when sending invalid parameters to a function.\r
* This function returns the index of the callback in the array when registration is successful. If\r
- * not -1 is returned. The index can be used to remove a callback with the Det_RemoveCbk.\r
+ * not DET_CBK_REGISTRATION_FAILED_INDEX is returned.\r
+ * The index can be used to remove a callback with the Det_RemoveCbk.\r
*/\r
uint8 Det_AddCbk ( detCbk_t detCbk);\r
void Det_RemoveCbk ( uint8 detCbkIndex);\r
#endif\r
\r
-void Det_Init( void );\r
+void Det_Init( void ); /** @req DET008 */\r
#if DET_DEINIT_API == STD_ON\r
void Det_DeInit( void );\r
#endif\r
-void Det_ReportError( uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId);\r
-void Det_Start( void );\r
-#define Det_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,DET)\r
+void Det_ReportError( uint16 ModuleId, uint8 InstanceId, uint8 ApiId, uint8 ErrorId); /** @req DET009 */\r
+void Det_Start( void ); /** @req DET010 */\r
+#define Det_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi,DET) /** @req DET011 */ /** @req DET012 */\r
\r
-#endif /*_DET_H_*/\r
+#endif /*DET_H*/\r
#define DIO_E_PARAM_INVALID_PORT_ID 20
#define DIO_E_PARAM_INVALID_GROUP_ID 31
-#if defined(CFG_HC1X)
+#if defined(CFG_HC1X) || defined(CFG_TMS570)
typedef uint8 Dio_ChannelType;
typedef uint8 Dio_PortType;
#define ECUM_H_\r
\r
#include "Std_Types.h"\r
-#include "Os.h"\r
+#include <Os.h>\r
#if defined(USE_COM)\r
#include "ComStack_Types.h"\r
#endif\r
#define ECUM_E_MISMATCHED_RUN_RELEASE (0x15)\r
#define ECUM_E_STATE_PAR_OUT_OF_RANGE (0x16)\r
#define ECUM_E_UNKNOWN_WAKEUP_SOURCE (0x17)\r
+#define ECUM_E_ARC_TIMERERROR (0x18)\r
//@}\r
\r
/** @name Service id's */\r
#define ECUM_GET_BOOTARGET_ID (0x13)\r
#define ECUM_MAINFUNCTION_ID (0x18)\r
#define ECUM_COMM_HASREQUESTEDRUN_ID (0x1b)\r
+#define ECUM_ARC_STARTUPTWO_ID (0x20)\r
\r
/** Possible states */\r
typedef enum {\r
* If hardware cannot distinguish between a\r
* power cycle and a reset reason, then this\r
* shall be the default wakeup source */\r
- ECUM_WKSOURCE_RESET = 0x02,\r
+ ECUM_WKSOURCE_RESET = 0x02\r
};\r
\r
typedef uint32 EcuM_WakeupSourceType;\r
ECUM_WKSTATUS_NONE = 0, /**< No pending wakeup event was detected */\r
ECUM_WKSTATUS_PENDING = 1, /**< The wakeup event was detected but not yet validated */\r
ECUM_WKSTATUS_VALIDATED = 2, /**< The wakeup event is valid */\r
- ECUM_WKSTATUS_EXPIRED = 3, /**< The wakeup event has not been validated and has expired therefore */\r
+ ECUM_WKSTATUS_EXPIRED = 3 /**< The wakeup event has not been validated and has expired therefore */\r
} EcuM_WakeupStatusType;\r
\r
typedef enum\r
{\r
ECUM_WWKACT_RUN = 0, /**< Initialization into RUN state */\r
ECUM_WKACT_TTII = 2, /**< Execute time triggered increased inoperation protocol and shutdown */\r
- ECUM_WKACT_SHUTDOWN = 3, /**< Immediate shutdown */\r
+ ECUM_WKACT_SHUTDOWN = 3 /**< Immediate shutdown */\r
} EcuM_WakeupReactionType;\r
\r
typedef enum\r
{\r
ECUM_BOOT_TARGET_APP = 0, /**< The Ecu will boot into the application */\r
- ECUM_BOOT_TARGET_BOOTLOADER = 1, /**< The Ecu will boot into the bootloader */\r
+ ECUM_BOOT_TARGET_BOOTLOADER = 1 /**< The Ecu will boot into the bootloader */\r
} EcuM_BootTargetType;\r
\r
\r
#endif\r
\r
void EcuM_Init( void );\r
-void EcuM_StartupTwo();\r
-void EcuM_Shutdown();\r
+void EcuM_StartupTwo(void);\r
+void EcuM_Shutdown(void);\r
\r
Std_ReturnType EcuM_GetState(EcuM_StateType* state);\r
\r
Std_ReturnType EcuM_RequestPOST_RUN(EcuM_UserType user);\r
Std_ReturnType EcuM_ReleasePOST_RUN(EcuM_UserType user);\r
\r
-void EcuM_KillAllRUNRequests();\r
+void EcuM_KillAllRUNRequests(void);\r
\r
-#if defined(USE_COM)\r
+#if defined(USE_COMM)\r
Std_ReturnType EcuM_ComM_RequestRUN(NetworkHandleType channel);\r
Std_ReturnType EcuM_ComM_ReleaseRUN(NetworkHandleType channel);\r
boolean EcuM_ComM_HasRequestedRUN(NetworkHandleType channel);\r
#endif\r
\r
-Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType target, uint8 mode);\r
-Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType* target, uint8* mode);\r
-Std_ReturnType EcuM_GetLastShutdownTarget(EcuM_StateType* target, uint8* mode);\r
+Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType shutdownTarget, uint8 sleepMode);\r
+Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode);\r
+Std_ReturnType EcuM_GetLastShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode);\r
\r
-EcuM_WakeupSourceType EcuM_GetPendingWakeupEvents();\r
+EcuM_WakeupSourceType EcuM_GetPendingWakeupEvents(void);\r
void EcuM_ClearWakeupEvent(EcuM_WakeupSourceType sources);\r
-EcuM_WakeupSourceType EcuM_GetValidatedWakeupEvents();\r
-EcuM_WakeupSourceType EcuM_GetExpiredWakeupEvents();\r
+EcuM_WakeupSourceType EcuM_GetValidatedWakeupEvents(void);\r
+EcuM_WakeupSourceType EcuM_GetExpiredWakeupEvents(void);\r
EcuM_WakeupStatusType EcuM_GetStatusOfWakeupSource(EcuM_WakeupSourceType sources);\r
\r
Std_ReturnType EcuM_SelectApplicationMode(AppModeType appMode);\r
\r
void EcuM_MainFunction(void);\r
\r
-void EcuM_OnGoOffTwo( void );\r
-void EcuM_AL_SwitchOff( void );\r
-\r
#endif /*ECUM_H_*/\r
/** @} */\r
\r
void EcuM_ErrorHook(Std_ReturnType reason);\r
\r
-void EcuM_AL_DriverInitZero();\r
-EcuM_ConfigType* EcuM_DeterminePbConfiguration();\r
+void EcuM_AL_DriverInitZero(void);\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void);\r
void EcuM_AL_DriverInitOne(const EcuM_ConfigType* ConfigPtr);\r
void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr);\r
void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr);\r
\r
-void EcuM_OnRTEStartup();\r
+void EcuM_OnRTEStartup(void);\r
\r
-void EcuM_OnEnterRUN();\r
-void EcuM_OnExitRun();\r
-void EcuM_OnExitPostRun();\r
+void EcuM_OnEnterRUN(void);\r
+void EcuM_OnExitRun(void);\r
+void EcuM_OnExitPostRun(void);\r
\r
-void EcuM_OnPrepShutdown();\r
-void EcuM_OnGoSleep();\r
-void EcuM_OnGoOffOne();\r
-void EcuM_OnGoOffTwo();\r
+void EcuM_OnPrepShutdown(void);\r
+void EcuM_OnGoSleep(void);\r
+void EcuM_OnGoOffOne(void);\r
+void EcuM_OnGoOffTwo(void);\r
\r
void EcuM_EnableWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
void Ecum_DisableWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
\r
-void EcuM_GenerateRamHash();\r
-uint8 EcuM_CheckRamHash();\r
+void EcuM_GenerateRamHash(void);\r
+uint8 EcuM_CheckRamHash(void);\r
\r
-void EcuM_AL_SwitchOff();\r
-void Ecum_AL_DriverRestart();\r
+void EcuM_AL_SwitchOff(void);\r
+void Ecum_AL_DriverRestart(void);\r
\r
void EcuM_StartWakeupSources(EcuM_WakeupSourceType wakeupSource);\r
void EcuM_CheckValidation(EcuM_WakeupSourceType wakeupSource);\r
EcuM_WakeupReactionType EcuM_OnWakeupReaction(EcuM_WakeupReactionType wact);\r
\r
void EcuM_CheckWakeup(EcuM_WakeupSourceType wakeupSource);\r
-void EcuM_SleepActivity();\r
+void EcuM_SleepActivity(void);\r
\r
#endif /*ECUM_CBK_H_*/\r
#define EEP_E_UNINIT 0x20\r
#define EEP_E_BUSY 0x21\r
\r
+/* Production errors */\r
+// #define EEP_E_COM_FAILURE 0x30 /* Shall be located in DemIntErrId.h when its available */\r
+\r
/* Service id's for fls functions */\r
#define EEP_INIT_ID 0x00\r
#define EEP_SETMODE_ID 0x01\r
void Fee_MainFunction(void); /** @req FEE097 */\r
\r
void Fee_Init(void); /** @req FEE085 */\r
-void Fee_SetMode(MemIf_ModeType Mode); /** @req FEE086 */\r
-Std_ReturnType Fee_Read(uint16 BlockNumber, uint16 BlockOffset, uint8* DataBufferPtr, uint16 Length); /** @req FEE087 */\r
-Std_ReturnType Fee_Write(uint16 BlockNumber, uint8* DataBufferPtr); /** @req FEE088 */\r
+void Fee_SetMode(MemIf_ModeType mode); /** @req FEE086 */\r
+Std_ReturnType Fee_Read(uint16 blockNumber, uint16 blockOffset, uint8* dataBufferPtr, uint16 length); /** @req FEE087 */\r
+Std_ReturnType Fee_Write(uint16 blockNumber, uint8* dataBufferPtr); /** @req FEE088 */\r
void Fee_Cancel(void); /** @req FEE089 */\r
MemIf_StatusType Fee_GetStatus(void); /** @req FEE090 */\r
MemIf_JobResultType Fee_GetJobResult(void); /** @req FEE091 */\r
-Std_ReturnType Fee_InvalidateBlock(uint16 BlockNumber); /** @req FEE092 */\r
-Std_ReturnType Fee_EraseImmediateBlock(uint16 BlockNumber); /** @req FEE094 */\r
+Std_ReturnType Fee_InvalidateBlock(uint16 blockNumber); /** @req FEE092 */\r
+Std_ReturnType Fee_EraseImmediateBlock(uint16 blockNumber); /** @req FEE094 */\r
\r
\r
\r
\r
void Fls_GetVersionInfo( Std_VersionInfoType *VersioninfoPtr );\r
\r
+void Fls_Check( uint32 flsBaseAddress, uint32 flsTotalSize );\r
\r
#endif /*FLS_H_*/\r
\r
#define GPT_SW_MAJOR_VERSION 1\r
#define GPT_SW_MINOR_VERSION 0\r
-#define GPT_SW_PATCH_VERSION 0\r
+#define GPT_SW_PATCH_VERSION 1\r
\r
#define GPT_AR_MAJOR_VERSION 2\r
#define GPT_AR_MINOR_VERSION 2\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#ifndef COM_RUNTEST_H_\r
-#define COM_RUNTEST_H_\r
-\r
-void RTE_Notification(void);\r
-void RTE_EngineMain(void);\r
-void RTE_EngineChangeSpeed(void);\r
-void RTE_SIL2MESSAGE(void);\r
-\r
-#endif /* COM_RUNTEST_H_ */\r
+#ifndef GPT_CONFIGTYPES_H\r
+#define GPT_CONFIGTYPES_H\r
+\r
+typedef struct {\r
+ uint32 GptChannelClkSrc;\r
+ Gpt_ChannelType GptChannelId;\r
+ Gpt_ChannelMode GptChannelMode;\r
+ void (*GptNotification)();\r
+ uint8 GptNotificationPriority;\r
+ uint32 GptChannelPrescale;\r
+ boolean GptEnableWakeup;\r
+} Gpt_ConfigType;\r
+\r
+#endif /* GPT_CONFIGTYPES_H */\r
\r
\r
\r
-#ifndef _MCU_EXTENSIONS_H_\r
-#define _MCU_EXTENSIONS_H_\r
+#ifndef MCU_EXTENSIONS_H\r
+#define MCU_EXTENSIONS_H\r
\r
#include "Std_Types.h"\r
typedef uint32_t imask_t;\r
#include "Std_Types.h"\r
#include "MemIf_Cfg.h"\r
\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+\r
#if (MEMIF_VERSION_INFO_API == STD_ON)\r
#define MemIf_GetVersionInfo(_vi) STD_GET_VERSION_INFO(_vi, MEMIF)\r
#endif /* MEMIF_VERSION_INFO_API */\r
\r
#if (MEMIF_NUMBER_OF_DEVICES == 1)\r
#if (MEMIF_DEVICE_TO_USE == FLS_DRIVER_INDEX)\r
-#include "Fee.h"\r
-\r
#define MemIf_SetMode(_mode) Fee_SetMode(_mode)\r
#define MemIf_Read(_deviceIndex,_blockNumber,_blockOffset,_dataBufferPtr,_length) Fee_Read(_blockNumber,_blockOffset,_dataBufferPtr,_length)\r
#define MemIf_Write(_deviceIndex,_blockNumber,_dataBufferPtr) Fee_Write(_blockNumber,_dataBufferPtr)\r
#define MemIf_EraseImmediateBlock(_deviceIndex,_blockNumber) Fee_EraseImmediateBlock(_blockNumber)\r
\r
#elif (MEMIF_DEVICE_TO_USE == EEP_DRIVER_INDEX)\r
-#include "Ea.h"\r
-\r
#define MemIf_SetMode(_mode) Ea_SetMode(_mode)\r
#define MemIf_Read(_deviceIndex,_blockNumber,_blockOffset,_dataBufferPtr,_length) Ea_Read(_blockNumber,_blockOffset,_dataBufferPtr,_length)\r
#define MemIf_Write(_deviceIndex,_blockNumber,_dataBufferPtr) Ea_Write(_blockNumber,_dataBufferPtr)\r
MEMIF_BLOCK_INCONSISTENT,\r
// The requested block has been marked as invalid,\r
// the requested operation can not be performed.\r
- MEMIF_BLOCK_INVALID, \r
+ MEMIF_BLOCK_INVALID\r
\r
} MemIf_JobResultType; \r
\r
MEMIF_MODE_SLOW,\r
// The underlying memory abstraction modules and\r
// drivers are working in fast mode.\r
- MEMIF_MODE_FAST,\r
+ MEMIF_MODE_FAST\r
} MemIf_ModeType;\r
\r
// Definition of broadcast device ID\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+/* REFERENCE\r
+ * MemoryMapping.pdf\r
+ *\r
+ * DESCRIPTION\r
+ *\r
+ *\r
+ *
+ */\r
\r
\r
\r
-\r
-\r
-\r
-\r
-/* See MemoryMapping.pdf */\r
-\r
-/* This is module include file */\r
-\r
-/* TODO:This file is crap, crap and crap.\r
- * This assumes that you can define a section for multiple variables.\r
- * GCC can't handle that..and hence cannot be used in the final product\r
- */\r
+#if defined(__GNUC__)\r
+ #define SECTION_RAMLOG __attribute__ ((section (".ramlog")));\r
+#elif defined(__CWCC__)\r
+ #pragma section RW ".ramlog" ".ramlog"\r
+ #define SECTION_RAMLOG __declspec(section ".ramlog")\r
+#endif\r
\r
// Module Id:s from document "List of Basic Sofware Modules" Rev 1.2.1 Part of release 3.0\r
//\r
\r
-#ifndef _MODULES_H_\r
-#define _MODULES_H_\r
+#ifndef MODULES_H\r
+#define MODULES_H\r
\r
#include "Std_Types.h"\r
\r
* cyclic scheduling. This function is supplied for the NM coordinator functionality\r
* (Nm020). However, specific implementation may not need it (Nm093) */\r
/** @req NM118 */\r
-void Nm_MainFunction();\r
+void Nm_MainFunction(void);\r
\r
\r
#endif /* NM_H_ */\r
typedef enum {\r
NM_E_OK,\r
NM_E_NOT_OK,\r
- NM_E_NOT_EXECUTED,\r
+ NM_E_NOT_EXECUTED\r
} Nm_ReturnType;\r
\r
/** Operational modes of the network management */\r
NM_MODE_BUS_SLEEP,\r
NM_MODE_PREPARE_BUS_SLEEP,\r
NM_MODE_SYNCHRONIZE,\r
- NM_MODE_NETWORK,\r
+ NM_MODE_NETWORK\r
} Nm_ModeType;\r
\r
/** States of the network management state machine */\r
NM_STATE_READY_SLEEP,\r
NM_STATE_NORMAL_OPERATION,\r
NM_STATE_REPEAT_MESSAGE,\r
- NM_STATE_SYNCHRONIZE,\r
+ NM_STATE_SYNCHRONIZE\r
} Nm_StateType;\r
\r
/** BusNm Type */\r
typedef enum {\r
- NM_BUSNM_CANNM,\r
- NM_BUSNM_FRNM,\r
- NM_BUSNM_LINNM,\r
- NM_BUSNM_UNDEF = 0xFF,\r
+ NM_BUSNM_CANNM = 0,\r
+ NM_BUSNM_FRNM = 1,\r
+ NM_BUSNM_LINNM = 2,\r
+ NM_BUSNM_UNDEF = 0xFF\r
} Nm_BusNmType;\r
\r
\r
void NvM_ReadAll( void ); /** @req NVM460 */\r
void NvM_WriteAll( void ); /** @req NVM461 */\r
void NvM_CancelWriteAll( void ); /** @req NVM458 */\r
-void NvM_GetErrorStatus( NvM_BlockIdType BlockId, uint8 *RequestResultPtr ); /** @req NVM451 */\r
+void NvM_GetErrorStatus( NvM_BlockIdType blockId, uint8 *requestResultPtr ); /** @req NVM451 */\r
\r
#if (NVM_SET_RAM_BLOCK_STATUS_API == STD_ON)\r
-void Nvm_SetRamBlockStatus( NvM_BlockIdType BlockId, boolean BlockChanged ); /** @req NVM453 */\r
+void Nvm_SetRamBlockStatus( NvM_BlockIdType blockId, boolean blockChanged ); /** @req NVM453 */\r
#endif\r
\r
#if (NVM_API_CONFIG_CLASS > NVM_API_CONFIG_CLASS_1)\r
-void NvM_SetDataIndex( NvM_BlockIdType BlockId, uint8 DataIndex ); /** @req NVM448 */\r
-void NvM_GetDataIndex( NvM_BlockIdType BlockId, uint8 *DataIndexPtr ); /** @req NVM449 */\r
-void Nvm_ReadBlock( NvM_BlockIdType BlockId, uint8 *NvM_DstPtr ); /** @req NVM454 */\r
-void NvM_WriteBlock( NvM_BlockIdType BlockId, const uint8 *NvM_SrcPtr ); /** @req NVM455 */\r
-void Nvm_RestoreBlockDefaults( NvM_BlockIdType BlockId, uint8 *NvM_DstPtr ); /** @req NVM456 */\r
+void NvM_SetDataIndex( NvM_BlockIdType blockId, uint8 dataIndex ); /** @req NVM448 */\r
+void NvM_GetDataIndex( NvM_BlockIdType blockId, uint8 *dataIndexPtr ); /** @req NVM449 */\r
+void Nvm_ReadBlock( NvM_BlockIdType blockId, uint8 *dstPtr ); /** @req NVM454 */\r
+void NvM_WriteBlock( NvM_BlockIdType blockId, const uint8 *srcPtr ); /** @req NVM455 */\r
+void Nvm_RestoreBlockDefaults( NvM_BlockIdType blockId, uint8 *dstPtr ); /** @req NVM456 */\r
#endif\r
\r
#if (NVM_API_CONFIG_CLASS > NVM_API_CONFIG_CLASS_2)\r
-void NvM_SetBlockProtection( NvM_BlockIdType BlockId, boolean ProtectionEnabled ); /** @req NVM450 */\r
-void NvM_EraseNvBlock( NvM_BlockIdType BlockId ); /** @req NVM457 */\r
-void NvM_InvalidateNvBlock( NvM_BlockIdType BlockId ); /** @req NVM459 */\r
+void NvM_SetBlockProtection( NvM_BlockIdType blockId, boolean protectionEnabled ); /** @req NVM450 */\r
+void NvM_EraseNvBlock( NvM_BlockIdType blockId ); /** @req NVM457 */\r
+void NvM_InvalidateNvBlock( NvM_BlockIdType blockId ); /** @req NVM459 */\r
#endif\r
\r
#endif /*NVM_H_*/\r
\r
#include "NvM_Types.h"\r
\r
-typedef enum {\r
- NVM_API_CONFIG_CLASS_1,\r
- NVM_API_CONFIG_CLASS_2,\r
- NVM_API_CONFIG_CLASS_3\r
-} NvM_ApiConfigClassType; /** @req NVM491 */\r
+/* NvM_ApiConfigClassType */ /** @req NVM491 */\r
+#define NVM_API_CONFIG_CLASS_1 0\r
+#define NVM_API_CONFIG_CLASS_2 1\r
+#define NVM_API_CONFIG_CLASS_3 2\r
\r
typedef enum {\r
NVM_CRC16,\r
// The rest of the parameters is realized in NvM_Cfg.h\r
} NvM_CommonType;\r
\r
+#if 0 // Currently not used\r
typedef struct {\r
// ??? EaRef; // TODO: Check this\r
// ??? FeeRef; // TODO: Check this\r
} NvM_TargetBlockReferenceType;\r
+#endif\r
\r
typedef struct {\r
// NVRAM block global settings\r
NvM_InitBlockCallbackFunctionType InitBlockCallback; /** @req NVM116 */\r
\r
// Containers\r
+#if 0 // Currently not used\r
NvM_TargetBlockReferenceType TargetBlockReference; /** @req NVM486 */\r
+#endif\r
} NvM_BlockDescriptorType; /** @req NVM061 */\r
\r
typedef struct {\r
#include "MemMap.h"\r
#include "Cpu.h"\r
\r
+typedef uint8 StatusType;\r
+\r
+#define E_OS_ACCESS (StatusType)1 /**< STD OSEK */\r
+#define E_OS_CALLEVEL (StatusType)2 /**< STD OSEK */\r
+#define E_OS_ID (StatusType)3 /**< STD OSEK */\r
+#define E_OS_LIMIT (StatusType)4 /**< STD OSEK */\r
+#define E_OS_NOFUNC (StatusType)5 /**< STD OSEK */\r
+#define E_OS_RESOURCE (StatusType)6 /**< STD OSEK */\r
+#define E_OS_STATE (StatusType)7 /**< STD OSEK */\r
+#define E_OS_VALUE (StatusType)8 /**< STD OSEK */\r
+\r
+#define E_OS_SERVICEID (StatusType)9 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_RATE (StatusType)10 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_ILLEGAL_ADDRESS (StatusType)11 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_MISSINGEND (StatusType)12 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_DISABLEDINT (StatusType)13 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_STACKFAULT (StatusType)14 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_PROTECTION_MEMORY (StatusType)15 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_PROTECTION_TIME (StatusType)16 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_PROTECTION_LOCKED (StatusType)17 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_PROTECTION_EXCEPTION (StatusType)18 /**< AUTOSAR, see 7.10 */\r
+#define E_OS_PROTECTION_RATE (StatusType)19 /**< AUTOSAR, see 7.10 */\r
+\r
+#define E_COM_ID 255 // TODO: var ska E_COM_ID vara?"\r
+\r
+\r
typedef uint32_t EventMaskType;\r
typedef EventMaskType * EventMaskRefType;\r
typedef uint16_t TaskType;\r
TASK_STATE_WAITING,\r
TASK_STATE_READY,\r
TASK_STATE_SUSPENDED,\r
- TASK_STATE_RUNNING,\r
+ TASK_STATE_RUNNING\r
} TaskStateType;\r
\r
#define INVALID_TASK 0xdeadU\r
\r
/* FIXME: OSMEMORY_IS__ , see 8.2*/\r
\r
+#define OSMEMORY_IS_READABLE(_access)\r
+#define OSMEMORY_IS_WRITEABLE(_access)\r
+#define OSMEMORY_IS_EXECUTABLE(_access)\r
+#define OSMEMORY_IS_STACKSPACE(_access)\r
+\r
#define OSDEFAULTAPPMODE 1\r
\r
#define INVALID_OSAPPLICATION (-1)\r
\r
/* TODO, I have no idea what this should be*/\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
typedef sint32 ApplicationType;\r
\r
+typedef enum {\r
+ APPLICATION_ACCESSIBLE,\r
+ APPLICATION_RESTARTING,\r
+ APPLICATION_TERMINATED\r
+} ApplicationStateType;\r
+\r
+typedef ApplicationStateType *ApplicationStateRefType;\r
+#endif\r
+\r
/* See oil config for defines */\r
typedef sint32 AppModeType;\r
\r
#define INVALID_ISR ((sint16)(-1))\r
typedef sint16 ISRType;\r
\r
+#define APP_NO_OWNER (-1UL)\r
+\r
typedef void * MemoryStartAddressType;\r
typedef uint32 MemorySizeType;\r
\r
void InitOS( void );\r
void StartOS( AppModeType Mode );\r
\r
-ApplicationType GetApplicationID( void );\r
ISRType GetISRID( void );\r
StatusType GetActiveApplicationMode( AppModeType* mode);\r
\r
/*\r
* Class 2,3 and 4 API\r
*/\r
+\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+\r
ApplicationType GetApplicationID( void );\r
AccessType CheckISRMemoryAccess( ISRType ISRID,\r
MemoryStartAddressType Address,\r
MemoryStartAddressType Address,\r
MemorySizeType Size );\r
\r
+ObjectAccessType CheckObjectAccess( ApplicationType ApplId,\r
+ ObjectTypeType ObjectType,\r
+ uint32_t objectId );\r
+ApplicationType CheckObjectOwnership( ObjectTypeType ObjectType,\r
+ uint32_t objectId );\r
+StatusType TerminateApplication( ApplicationType Application, RestartType RestartOption );\r
+StatusType AllowAccess( void );\r
+StatusType GetApplicationState( ApplicationType Application, ApplicationStateRefType Value );\r
StatusType CallTrustedFunction( TrustedFunctionIndexType FunctionIndex,\r
TrustedFunctionParameterRefType FunctionParams );\r
+#endif\r
\r
StatusType GetTaskID( TaskRefType TaskID );\r
StatusType GetTaskState( TaskType task_id, TaskStateRefType state);\r
OSServiceId_PostTaskHook,\r
OSServiceId_StartupHook,\r
OSServiceId_ShutdownHook,\r
- OSServiceId_GetTaskState,\r
-} OsServiceIdType;;\r
+ OSServiceId_GetTaskState\r
+} OsServiceIdType;\r
\r
typedef struct OsError {\r
OsServiceIdType serviceId;\r
\r
\r
\r
-#ifndef _PDUR_H_\r
-#define _PDUR_H_\r
+#ifndef PDUR_H\r
+#define PDUR_H\r
\r
#define PDUR_VENDOR_ID 1\r
#define PDUR_AR_MAJOR_VERSION 2\r
// Define macro for state, parameter and data pointer checks.\r
// TODO Implement data range check if needed.\r
#define PduR_DevCheck(PduId,PduPtr,ApiId,...) \\r
- if (PduRState == PDUR_UNINIT || PduRState == PDUR_REDUCED) { \\r
+ if ((PduRState == PDUR_UNINIT) || (PduRState == PDUR_REDUCED)) { \\r
PDUR_DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, ApiId, PDUR_E_INVALID_REQUEST); \\r
return __VA_ARGS__; \\r
} \\r
- if (PduPtr == 0 && PDUR_DEV_ERROR_DETECT) { \\r
+ if ((PduPtr == 0) && (PDUR_DEV_ERROR_DETECT)) { \\r
PDUR_DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, ApiId, PDUR_E_DATA_PTR_INVALID); \\r
return __VA_ARGS__; \\r
} \\r
//#error fail\r
void PduR_Init(const PduR_PBConfigType* ConfigPtr);\r
void PduR_GetVersionInfo(Std_VersionInfoType* versionInfo);\r
-uint32 PduR_GetConfigurationId();\r
+uint32 PduR_GetConfigurationId(void);\r
\r
+void PduR_BufferInc(PduRTxBuffer_type *Buffer, uint8 **ptr);\r
void PduR_BufferQueue(PduRTxBuffer_type *Buffer, const uint8 * SduPtr);\r
void PduR_BufferDeQueue(PduRTxBuffer_type *Buffer, uint8 *SduPtr);\r
void PduR_BufferFlush(PduRTxBuffer_type *Buffer);\r
uint8 PduR_BufferIsFull(PduRTxBuffer_type *Buffer);\r
+void PduR_LoIfRxIndication(PduIdType PduId, const uint8* SduPtr);\r
+void PduR_LoIfTxConfirmation(PduIdType PduId);\r
+void PduR_LoIfTriggerTransmit(PduIdType PduId, uint8* SduPtr);\r
\r
/*\r
* Macros\r
*/\r
-#define setTxConfP(R) R->PduRDestPdu.TxBufferRef->TxConfP = 1\r
-#define clearTxConfP(R) R->PduRDestPdu.TxBufferRef->TxConfP = 0\r
+#define setTxConfP(R) (R->PduRDestPdu.TxBufferRef->TxConfP = 1)\r
+#define clearTxConfP(R) (R->PduRDestPdu.TxBufferRef->TxConfP = 0)\r
\r
#endif\r
\r
extern PduR_FctPtrType PduR_StdCanFctPtrs;\r
extern PduR_FctPtrType PduR_StdLinFctPtrs;\r
\r
-#endif /* _PDUR_H_ */\r
+#endif /* PDUR_H */\r
\r
#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
\r
- void PduR_CanIfRxIndication (PduIdType CanRxPduId, const uint8 *CanSudPtr );\r
+ void PduR_CanIfRxIndication (PduIdType CanRxPduId, const uint8 *CanSduPtr );\r
void PduR_CanIfTxConfirmation(PduIdType CanTxPduId);\r
\r
#else // Zero cost operation active\r
\r
#else\r
\r
- #define PduR_DcmTransmit(... )\r
+ #define PduR_DcmTransmit(... ) E_OK\r
\r
#endif\r
\r
* Type definitions for PDU Router.\r
*/\r
\r
-#ifndef _PDUR_TYPES_H\r
-#define _PDUR_TYPES_H\r
+#ifndef PDUR_TYPES_H\r
+#define PDUR_TYPES_H\r
\r
#include "ComStack_Types.h"\r
\r
} PduR_DataProvisionType;\r
\r
\r
-/* ################## EXTERNAL STRUCTURES ##################\r
- *\r
- * These structures will be external in final implementation\r
- */\r
-typedef struct {\r
- const int foo;\r
-} PduR_LConfigType;\r
-\r
-\r
\r
\r
/* ################ NEW DEFINITIONS ################### */\r
typedef struct {\r
- Std_ReturnType (*TargetIndicationFctPtr)(PduIdType, const uint8*); /**< Pointer to target function in layer above PDU router. */\r
- Std_ReturnType (*TargetTransmitFctPtr)(PduIdType, const PduInfoType*); /**< Pointer to target function below PDU router. */\r
+ Std_ReturnType (*TargetIndicationFctPtr)(PduIdType pduId, const uint8* data); /**< Pointer to target function in layer above PDU router. */\r
+ Std_ReturnType (*TargetTransmitFctPtr)(PduIdType pduId, const PduInfoType* pduInfo); /**< Pointer to target function below PDU router. */\r
\r
\r
- void (*TargetConfirmationFctPtr)(PduIdType);\r
+ void (*TargetConfirmationFctPtr)(PduIdType pduId);\r
\r
/**\r
* Target function for trigger transmit requests from the interface modules, e.g. Com_TriggerTransmit. Only\r
* needed if gateway mode is not used, that is, if .DataProvision is set to PDUR_NO_PROVISION.\r
*/\r
- Std_ReturnType (*TargetTriggerTransmitFctPtr)(PduIdType, uint8*);\r
+ Std_ReturnType (*TargetTriggerTransmitFctPtr)(PduIdType pduId, uint8* data);\r
\r
\r
- Std_ReturnType (*TargetGatewayFctPtr)(PduIdType, const PduInfoType*);\r
+ Std_ReturnType (*TargetGatewayFctPtr)(PduIdType pduId, const PduInfoType* pduInfo);\r
\r
} PduR_FctPtrType;\r
\r
/*\r
* Not part of autosar standard. Added by ArcCore.\r
*/\r
- int BufferId;\r
+ uint16 BufferId;\r
PduR_DataProvisionType BufferType;\r
//uint8 SduLength;\r
uint8 *Last;\r
* General platform type definitions.\r
*/\r
\r
-#ifndef _PLATFORM_TYPES_H_\r
-#define _PLATFORM_TYPES_H_\r
+#include <stdbool.h>\r
+\r
+#ifndef PLATFORM_TYPES_H\r
+#define PLATFORM_TYPES_H\r
\r
#define CPU_TYPE CPU_TYPE_32 \r
#define CPU_BIT_ORDER MSB_FIRST \r
#define CPU_BYTE_ORDER HIGH_BYTE_FIRST\r
\r
-#if !defined(FALSE)\r
-#define FALSE 0\r
-#define TRUE 1\r
-#endif\r
+#define FALSE (boolean)false\r
+#define TRUE (boolean)true\r
\r
-typedef unsigned long boolean; \r
+//typedef unsigned long boolean;\r
+typedef _Bool boolean;\r
typedef signed char sint8; \r
typedef unsigned char uint8; \r
typedef signed short sint16; \r
typedef unsigned short uint16; \r
typedef signed long sint32; \r
-typedef unsigned long uint32; \r
+typedef unsigned long uint32;\r
typedef unsigned long long uint64;\r
typedef unsigned long uint8_least; \r
typedef unsigned long uint16_least; \r
#include "Port_Cfg.h" /** @req PORT130 */
#if (PORT_VERSION_INFO_API == STD_ON)
-void
-Port_GetVersionInfo(Std_VersionInfoType *versionInfo);
+void Port_GetVersionInfo(Std_VersionInfoType *versionInfo);
#endif
/** @name Error Codes */
typedef uint32 Port_PinModeType;
#endif
-void
-Port_Init(const Port_ConfigType *configType);
-#if ( PORT_PIN_DIRECTION_CHANGES_ALLOWED == STD_ON )
-void
-Port_SetPinDirection(Port_PinType pin, Port_PinDirectionType direction);
+void Port_Init(const Port_ConfigType *configType);
+
+#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )
+void Port_SetPinDirection(Port_PinType pin, Port_PinDirectionType direction);
#endif
-void
-Port_RefreshPortDirection(void);
+
+void Port_RefreshPortDirection(void);
+
#if (PORT_SET_PIN_MODE_API == STD_ON)
-void
-Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode);
+void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode);
#endif
#endif /*PORT_H_*/
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+#ifndef RTE_MAIN_H_\r
+#define RTE_MAIN_H_\r
\r
+Std_ReturnType Rte_Start( void );\r
+Std_ReturnType Rte_Stop( void );\r
\r
-\r
-\r
-\r
-\r
-\r
-#ifndef COM_TESTDATA_H_\r
-#define COM_TESTDATA_H_\r
-\r
-extern Com_ConfigType ComConfig_TEST;\r
-\r
-extern const PduR_PBConfigType PduRConfigData_TEST[];\r
-\r
-#endif /* COM_TESTDATA_H_ */\r
+#endif /*RTE_MAIN_H_*/\r
* Definitions of General types.\r
*/\r
\r
-#ifndef _STD_TYPES_H\r
-#define _STD_TYPES_H\r
+#ifndef STD_TYPES_H\r
+#define STD_TYPES_H\r
\r
// Autosar include files....\r
// TODO: we haven't really defined the autosar types yet.\r
#include "Compiler.h"\r
\r
#ifndef NULL\r
+//lint -esym(960,20.2) // PC-Lint LINT EXCEPTION\r
#define NULL 0\r
#endif\r
\r
#define STD_GET_VERSION (_major,_minor,_patch) (_major * 10000 + _minor * 100 + _patch)\r
\r
/** Create Std_VersionInfoType */\r
+// PC-Lint Exception MISRA rule 19.12\r
+//lint -save -esym(960,19.12)\r
#define STD_GET_VERSION_INFO(_vi,_module) \\r
- ((_vi)->vendorID = _module ## _VENDOR_ID);\\r
- ((_vi)->moduleID = _module ## _MODULE_ID);\\r
- ((_vi)->sw_major_version = _module ## _SW_MAJOR_VERSION);\\r
- ((_vi)->sw_minor_version = _module ## _SW_MINOR_VERSION);\\r
- ((_vi)->sw_patch_version = _module ## _SW_PATCH_VERSION);\\r
- ((_vi)->ar_major_version = _module ## _AR_MAJOR_VERSION);\\r
- ((_vi)->ar_minor_version = _module ## _AR_MINOR_VERSION);\\r
- ((_vi)->ar_patch_version = _module ## _AR_PATCH_VERSION);\r
-\r
-\r
-// TODO: Move to OSEK implementation, See 8.2 in SWS_StandardTypes\r
-\r
-#define STATUSTYPEDEFINED\r
-typedef enum {\r
- E_OK = 0,\r
- E_OS_ACCESS = 1, /**< STD OSEK */\r
- E_OS_CALLEVEL = 2, /**< STD OSEK */\r
- E_OS_ID = 3, /**< STD OSEK */\r
- E_OS_LIMIT = 4, /**< STD OSEK */\r
- E_OS_NOFUNC = 5, /**< STD OSEK */\r
- E_OS_RESOURCE = 6, /**< STD OSEK */\r
- E_OS_STATE = 7, /**< STD OSEK */\r
- E_OS_VALUE = 8, /**< STD OSEK */\r
-\r
- E_OS_SERVICEID, /**< AUTOSAR, see 7.10 */\r
- E_OS_RATE , /**< AUTOSAR, see 7.10 */\r
- E_OS_ILLEGAL_ADDRESS , /**< AUTOSAR, see 7.10 */\r
- E_OS_MISSINGEND , /**< AUTOSAR, see 7.10 */\r
- E_OS_DISABLEDINT , /**< AUTOSAR, see 7.10 */\r
- E_OS_STACKFAULT , /**< AUTOSAR, see 7.10 */\r
- E_OS_PROTECTION_MEMORY , /**< AUTOSAR, see 7.10 */\r
- E_OS_PROTECTION_TIME , /**< AUTOSAR, see 7.10 */\r
- E_OS_PROTECTION_LOCKED , /**< AUTOSAR, see 7.10 */\r
- E_OS_PROTECTION_EXCEPTION , /**< AUTOSAR, see 7.10 */\r
- E_OS_PROTECTION_RATE, /**< AUTOSAR, see 7.10 */\r
-\r
- /* COM.. TODO: move ?? */\r
- E_COM_ID,\r
-\r
-\r
- /** Implementation specific */\r
- E_OS_SYS_APA,\r
-\r
- E_NOT_OK,\r
-} StatusType;\r
-\r
-typedef uint8 Std_ReturnType;\r
+ if(_vi != NULL) {\\r
+ ((_vi)->vendorID = _module ## _VENDOR_ID);\\r
+ ((_vi)->moduleID = _module ## _MODULE_ID);\\r
+ ((_vi)->sw_major_version = _module ## _SW_MAJOR_VERSION);\\r
+ ((_vi)->sw_minor_version = _module ## _SW_MINOR_VERSION);\\r
+ ((_vi)->sw_patch_version = _module ## _SW_PATCH_VERSION);\\r
+ ((_vi)->ar_major_version = _module ## _AR_MAJOR_VERSION);\\r
+ ((_vi)->ar_minor_version = _module ## _AR_MINOR_VERSION);\\r
+ ((_vi)->ar_patch_version = _module ## _AR_PATCH_VERSION);\\r
+ }\r
+//lint -restore\r
\r
\r
-#ifndef STATUSTYPEDEFINED\r
-#define STATUSTYPEDEFINED\r
-#define E_OK 0\r
-typedef unsigned char StatusType;\r
-#endif\r
-\r
-#define E_NOT_OK 1\r
+typedef uint8 Std_ReturnType;\r
\r
-#define E_NO_DTC_AVAILABLE 2\r
-#define E_SESSION_NOT_ALLOWED 4\r
-#define E_PROTOCOL_NOT_ALLOWED 5\r
-#define E_REQUEST_NOT_ACCEPTED 8\r
-#define E_REQUEST_ENV_NOK 9\r
-#define E_PENDING 10\r
-#define E_COMPARE_KEY_FAILED 11\r
-#define E_FORCE_RCRRP 12\r
+#define E_OK (Std_ReturnType)0\r
+#define E_NOT_OK (Std_ReturnType)1\r
+\r
+#define E_NO_DTC_AVAILABLE (Std_ReturnType)2\r
+#define E_SESSION_NOT_ALLOWED (Std_ReturnType)4\r
+#define E_PROTOCOL_NOT_ALLOWED (Std_ReturnType)5\r
+#define E_REQUEST_NOT_ACCEPTED (Std_ReturnType)8\r
+#define E_REQUEST_ENV_NOK (Std_ReturnType)9\r
+#define E_PENDING (Std_ReturnType)10\r
+#define E_COMPARE_KEY_FAILED (Std_ReturnType)11\r
+#define E_FORCE_RCRRP (Std_ReturnType)12\r
\r
#define STD_HIGH 0x01\r
#define STD_LOW 0x00\r
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
* for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
+ * -------------------------------- Arctic Core ------------------------------\r
+ * WdgIf.h\r
+ *\r
+ * Created on: 22 feb 2010\r
+ * Author: Fredrik\r
+ */\r
\r
+#ifndef WDGIF_H_\r
+#define WDGIF_H_\r
\r
+#include "Std_Types.h"\r
+#include "WdgIf_Cfg.h"\r
\r
+#define WDGIF_SETMODE_ID 0x01\r
+#define WDGIF_TRIGGER_ID 0x02\r
\r
+#define WDGIF_E_PARAM_DEVICE 0x01\r
\r
+Std_ReturnType WdgIf_SetMode (uint8 DeviceIndex, WdgIf_ModeType Mode);\r
\r
-#include "WdgM_Cfg.h"\r
+void WdgIf_Trigger (uint8 DeviceIndex);\r
\r
-Std_ReturnType WdgM_UpdateAliveCounter (WdgM_SupervisedEntityIdType SEid);\r
-Std_ReturnType WdgM_ActivateAliveSupervision (WdgM_SupervisedEntityIdType SEid);\r
-Std_ReturnType WdgM_DeactivateAliveSupervision (WdgM_SupervisedEntityIdType SEid);\r
-void WdgM_Init(const WdgM_ConfigType* ConfigPtr);\r
-void WdgM_MainFunction_AliveSupervision (void);\r
-void WdgM_MainFunction_Trigger (void);\r
+#endif /* WDGIF_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------\r
+ * WdgIf_Types.h\r
+ *\r
+ * Created on: 14 maj 2010\r
+ * Author: Fredrik\r
+ */\r
+\r
+#ifndef WDGIF_TYPES_H_\r
+#define WDGIF_TYPES_H_\r
+\r
+typedef enum\r
+{\r
+ WDGIF_FAST_MODE,\r
+ WDGIF_OFF_MODE,\r
+ WDGIF_SLOW_MODE\r
+}WdgIf_ModeType;\r
+\r
+typedef void (*Wdg_TriggerLocationPtrType)(void);\r
+typedef Std_ReturnType (*Wdg_SetModeLocationPtrType)(WdgIf_ModeType Mode);\r
+\r
+typedef struct\r
+{\r
+ const uint8 Wdg_Index;\r
+ Wdg_TriggerLocationPtrType Wdg_TriggerLocationPtr;\r
+ Wdg_SetModeLocationPtrType Wdg_SetModeLocationPtr;\r
+}Wdg_GeneralType;\r
+\r
+#endif /* WDGIF_TYPES_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+#ifndef WDGM_H_
+#define WDGM_H_
+
+#include "Std_Types.h"
+#include "WdgM_Cfg.h"
+
+// API Service ID's
+#define WDGM_INIT_ID 0x00
+#define WDGM_SETMODE_ID 0x03
+#define WDGM_UPDATEALIVECOUNTER_ID 0x04
+#define WDGM_ACTIVATEALIVESUPERVISION_ID 0x05
+#define WDGM_DEACTIVATEALIVESUPERVISION_ID 0x06
+#define WDGM_MAINFUNCTION_TRIGGER_ID 0x06
+#define WDGM_MAINFUNCTION_ALIVESUPERVISION_ID 0x08
+#define WDGM_GETMODE_ID 0x0b
+#define WDGM_GETALIVESUPERVISIONSTATUS_ID 0x0c
+#define WDGM_GETGLOBALSTATUS_ID 0x0d
+
+
+/** @req WDGM004 **/
+#define WDGM_E_NO_INIT 0x10
+#define WDGM_E_PARAM_CONFIG 0x11
+#define WDGM_E_PARAM_MODE 0x12
+#define WDGM_E_PARAM_SEID 0x13
+#define WDGM_E_NULL_POINTER 0x14
+#define WDGM_E_DISABLE_NOT_ALLOWED 0x15
+#define WDGM_E_DEACTIVATE_NOT_ALLOWED 0x16
+//#define WDGM_E_ALIVE_SUPERVISION DEM assigned
+//#define WDGM_E_SET_MODE DEM assigned
+\r
+Std_ReturnType WdgM_UpdateAliveCounter (WdgM_SupervisedEntityIdType SEid);\r
+Std_ReturnType WdgM_ActivateAliveSupervision (WdgM_SupervisedEntityIdType SEid);\r
+Std_ReturnType WdgM_DeactivateAliveSupervision (WdgM_SupervisedEntityIdType SEid);
+Std_ReturnType WdgM_GetGlobalStatus (WdgM_AliveSupervisionStatusType *Status);
+Std_ReturnType WdgM_GetAliveSupervisionStatus (WdgM_SupervisedEntityIdType SEid, WdgM_AliveSupervisionStatusType *Status);\r
+void WdgM_Init(const WdgM_ConfigType* ConfigPtr);
+void WdgM_DeInit(void);
+Std_ReturnType WdgM_SetMode(WdgM_ModeType Mode);\r
+Std_ReturnType WdgM_GetMode(WdgM_ModeType *Mode);
+void WdgM_MainFunction_AliveSupervision (void);\r
+void WdgM_MainFunction_Trigger (void);\r
+
+#endif /*WDGM_H_*/
\r
void Os_Arc_GetStackInfo( TaskType pid, StackInfoType *s );\r
\r
-#define OS_STACK_USAGE(_x) ((((_x)->size - (uint32_t)((_x)->usage - (_x)->top))*100)/(_x)->size)\r
+#define OS_STACK_USAGE(_x) ((((_x)->size - (uint32_t)((size_t)(_x)->usage - (size_t)(_x)->top))*100)/(_x)->size)\r
\r
// int printf(const char *format, ...);\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef ADC_CONFIGTYPES_H_\r
+#define ADC_CONFIGTYPES_H_\r
+\r
+typedef uint16_t Adc_ValueGroupType;\r
+/* Group definitions. */\r
+\r
+typedef enum\r
+{\r
+ ADC_CH0,\r
+ ADC_CH1,\r
+ ADC_CH2,\r
+ ADC_CH3,\r
+ ADC_CH4,\r
+ ADC_CH5,\r
+ ADC_CH6,\r
+ ADC_CH7,\r
+ ADC_CH8,\r
+ ADC_CH9,\r
+ ADC_CH10,\r
+ ADC_CH11,\r
+ ADC_CH12,\r
+ ADC_CH13,\r
+ ADC_CH14,\r
+ ADC_CH15,\r
+ ADC_NBR_OF_CHANNELS,\r
+}Adc_ChannelType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK\r
+}Adc_ClockSourceType;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK_DISABLED,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_1,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_2,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_4,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_6,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_10,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_12,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_14,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_16,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_18,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_20,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_22,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_24,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_26,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_28,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_30,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_32,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_34,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_36,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_38,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_40,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_42,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_44,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_46,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_48,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_50,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_52,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_54,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_56,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_58,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_60,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_62,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_64,\r
+}Adc_PrescaleType;\r
+\r
+/* Non-standard type */\r
+typedef struct\r
+{\r
+ Adc_ClockSourceType clockSource;\r
+ uint8_t hwUnitId;\r
+ Adc_PrescaleType adcPrescale;\r
+}Adc_HWConfigurationType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONVERSION_TIME_2_CLOCKS,\r
+ ADC_CONVERSION_TIME_8_CLOCKS,\r
+ ADC_CONVERSION_TIME_64_CLOCKS,\r
+ ADC_CONVERSION_TIME_128_CLOCKS\r
+}Adc_ConversionTimeType;\r
+\r
+/* Channel definitions, std container */\r
+typedef struct\r
+{\r
+ Adc_ConversionTimeType adcChannelConvTime;\r
+ // NOT SUPPORTED Adc_VoltageSourceType adcChannelRefVoltSrcLow;\r
+ // NOT SUPPORTED Adc_VoltageSourceType adcChannelRefVoltSrcHigh;\r
+ // NOT SUPPORTED Adc_ResolutionType adcChannelResolution;\r
+ // NOT SUPPORTED Adc_CalibrationType adcChannelCalibrationEnable;\r
+} Adc_ChannelConfigurationType;\r
+\r
+/* Used ?? */\r
+typedef struct\r
+{\r
+ uint8 notifictionEnable;\r
+ Adc_ValueGroupType * resultBufferPtr;\r
+ Adc_StatusType groupStatus;\r
+} Adc_GroupStatus;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONV_MODE_DISABLED,\r
+ ADC_CONV_MODE_ONESHOT = 1,\r
+ ADC_CONV_MODE_CONTINUOUS = 9,\r
+} Adc_GroupConvModeType;\r
+\r
+/* Implementation specific */\r
+typedef struct\r
+{\r
+ // NOT SUPPORTED Adc_GroupAccessModeType accessMode;\r
+ Adc_GroupConvModeType conversionMode;\r
+ Adc_TriggerSourceType triggerSrc;\r
+ // NOT SUPPORTED Adc_HwTriggerSignalType hwTriggerSignal;\r
+ // NOT SUPPORTED Adc_HwTriggerTimerType hwTriggerTimer;\r
+ void (*groupCallback)(void);\r
+ // NOT SUPPORTED Adc_StreamBufferModeType streamBufferMode;\r
+ // NOT SUPPORTED Adc_StreamNumSampleType streamNumSamples;\r
+ const Adc_ChannelType *channelList;\r
+ Adc_ValueGroupType *resultBuffer;\r
+ // NOT SUPPORTED Adc_CommandType *commandBuffer;\r
+ Adc_ChannelType numberOfChannels;\r
+ Adc_GroupStatus *status;\r
+ // NOT SUPPORTED Dma_ChannelType dmaCommandChannel;\r
+ // NOT SUPPORTED Dma_ChannelType dmaResultChannel;\r
+ // NOT SUPPORTED const struct tcd_t * groupDMACommands;\r
+ // NOT SUPPORTED const struct tcd_t * groupDMAResults;\r
+} Adc_GroupDefType;\r
+\r
+/* Non-standard type */\r
+typedef struct\r
+{\r
+ const Adc_HWConfigurationType* hwConfigPtr;\r
+ const Adc_ChannelConfigurationType* channelConfigPtr;\r
+ const uint16_t nbrOfChannels;\r
+ const Adc_GroupDefType* groupConfigPtr;\r
+ const uint16_t nbrOfGroups;\r
+} Adc_ConfigType;\r
+\r
+extern const Adc_ConfigType AdcConfig [];\r
+\r
+\r
+#endif /* ADC_CONFIGTYPES_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef MCU_CONFIGTYPES_H_\r
+#define MCU_CONFIGTYPES_H_\r
+\r
+#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)\r
+#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)\r
+#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)\r
+#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)\r
+#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)\r
+\r
+#ifndef STM32F10X_CL\r
+ #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)\r
+ #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)\r
+#else\r
+ #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)\r
+ #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)\r
+ #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)\r
+ #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)\r
+#endif\r
+\r
+#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)\r
+#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)\r
+#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)\r
+#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)\r
+#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)\r
+#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)\r
+#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)\r
+#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)\r
+#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)\r
+#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)\r
+#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)\r
+#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)\r
+#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)\r
+#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)\r
+#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)\r
+#define RCC_APB1Periph_USB ((uint32_t)0x00800000)\r
+#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)\r
+#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)\r
+#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)\r
+#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)\r
+#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)\r
+\r
+#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)\r
+#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)\r
+#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)\r
+#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)\r
+#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)\r
+#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)\r
+#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)\r
+#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)\r
+#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)\r
+#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)\r
+#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)\r
+#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)\r
+#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)\r
+#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)\r
+#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)\r
+\r
+typedef struct {\r
+ uint32 AHBClocksEnable;\r
+ uint32 APB1ClocksEnable;\r
+ uint32 APB2ClocksEnable;\r
+} Mcu_PerClockConfigType;\r
+\r
+extern const Mcu_PerClockConfigType McuPerClockConfigData;\r
+\r
+\r
+#endif /* MCU_CONFIGTYPES_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef PORT_CONFIGTYPES_H_\r
+#define PORT_CONFIGTYPES_H_\r
+\r
+#define GPIO_INPUT_MODE (0)\r
+#define GPIO_OUTPUT_10MHz_MODE (1)\r
+#define GPIO_OUTPUT_2MHz_MODE (2)\r
+#define GPIO_OUTPUT_50MHz_MODE (3)\r
+\r
+/* Valid for input modes. */\r
+#define GPIO_ANALOG_INPUT_CNF (0 << 2)\r
+#define GPIO_FLOATING_INPUT_CNF (1 << 2)\r
+#define GPIO_INPUT_PULLUP_CNF (2 << 2)\r
+#define GPIO_RESERVED_CNF (3 << 2)\r
+\r
+/* Valid for output modes. */\r
+#define GPIO_OUTPUT_PUSHPULL_CNF (0 << 2)\r
+#define GPIO_OUTPUT_OPENDRAIN_CNF (1 << 2)\r
+#define GPIO_ALT_PUSHPULL_CNF (2 << 2)\r
+#define GPIO_ALT_OPENDRAIN_CNF (3 << 2)\r
+\r
+#define GPIO_OUTPUT_LOW (0)\r
+#define GPIO_OUTPUT_HIGH (1)\r
+\r
+typedef struct\r
+{\r
+ uint8_t GpioPinCnfMode_0:4;\r
+ uint8_t GpioPinCnfMode_1:4;\r
+ uint8_t GpioPinCnfMode_2:4;\r
+ uint8_t GpioPinCnfMode_3:4;\r
+ uint8_t GpioPinCnfMode_4:4;\r
+ uint8_t GpioPinCnfMode_5:4;\r
+ uint8_t GpioPinCnfMode_6:4;\r
+ uint8_t GpioPinCnfMode_7:4;\r
+ uint8_t GpioPinCnfMode_8:4;\r
+ uint8_t GpioPinCnfMode_9:4;\r
+ uint8_t GpioPinCnfMode_10:4;\r
+ uint8_t GpioPinCnfMode_11:4;\r
+ uint8_t GpioPinCnfMode_12:4;\r
+ uint8_t GpioPinCnfMode_13:4;\r
+ uint8_t GpioPinCnfMode_14:4;\r
+ uint8_t GpioPinCnfMode_15:4;\r
+}GpioPinCnfMode_Type;\r
+\r
+typedef struct\r
+{\r
+ uint8_t GpioPinOutLevel_0:1;\r
+ uint8_t GpioPinOutLevel_1:1;\r
+ uint8_t GpioPinOutLevel_2:1;\r
+ uint8_t GpioPinOutLevel_3:1;\r
+ uint8_t GpioPinOutLevel_4:1;\r
+ uint8_t GpioPinOutLevel_5:1;\r
+ uint8_t GpioPinOutLevel_6:1;\r
+ uint8_t GpioPinOutLevel_7:1;\r
+ uint8_t GpioPinOutLevel_8:1;\r
+ uint8_t GpioPinOutLevel_9:1;\r
+ uint8_t GpioPinOutLevel_10:1;\r
+ uint8_t GpioPinOutLevel_11:1;\r
+ uint8_t GpioPinOutLevel_12:1;\r
+ uint8_t GpioPinOutLevel_13:1;\r
+ uint8_t GpioPinOutLevel_14:1;\r
+ uint8_t GpioPinOutLevel_15:1;\r
+}GpioPinOutLevel_Type;\r
+\r
+/* To be compatible with Port.h */\r
+typedef uint8_t Port_PinType;\r
+\r
+/** Top level configuration container */\r
+typedef struct\r
+{\r
+ /** Total number of pins */\r
+ uint16_t padCnt;\r
+ /** List of pin configurations */\r
+ const GpioPinCnfMode_Type *padConfig;\r
+ const GpioPinOutLevel_Type *outConfig;\r
+ /** Total number of pin default levels */\r
+\r
+ uint16_t remapCount;\r
+ const uint32_t* remaps;\r
+\r
+} Port_ConfigType;\r
+\r
+\r
+#endif /* PORT_CONFIGTYPES_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef PWM_CONFIGTYPES_H_\r
+#define PWM_CONFIGTYPES_H_\r
+typedef uint16 Pwm_PeriodType;\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_11 = 0, // TIM1 Channel 1\r
+ PWM_CHANNEL_12,\r
+ PWM_CHANNEL_13,\r
+ PWM_CHANNEL_14,\r
+ PWM_CHANNEL_21, // TIM2 Channel 1\r
+ PWM_CHANNEL_22,\r
+ PWM_CHANNEL_23,\r
+ PWM_CHANNEL_24,\r
+ PWM_CHANNEL_31, // TIM3 Channel 1\r
+ PWM_CHANNEL_32,\r
+ PWM_CHANNEL_33,\r
+ PWM_CHANNEL_34,\r
+ PWM_CHANNEL_41, // TIM4 Channel 1\r
+ PWM_CHANNEL_42,\r
+ PWM_CHANNEL_43,\r
+ PWM_CHANNEL_44,\r
+ PWM_TOTAL_NOF_CHANNELS,\r
+} Pwm_ChannelType;\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_PRESCALER_1=0,\r
+ PWM_CHANNEL_PRESCALER_2,\r
+ PWM_CHANNEL_PRESCALER_3,\r
+ PWM_CHANNEL_PRESCALER_4,\r
+} Pwm_ChannelPrescalerType;\r
+#define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period\r
+\r
+typedef struct {\r
+ /* Number of duty ticks */\r
+ uint32_t duty:32;\r
+ /* Length of period, in ticks */\r
+ uint32_t period:32;\r
+ /* Counter */\r
+ uint32_t counter:32;\r
+ /* Enable freezing the channel when in debug mode */\r
+ uint32_t freezeEnable:1;\r
+ /* Disable output */\r
+ uint32_t outputDisable:1;\r
+ /* Select which bus disables the bus\r
+ * TODO: Figure out how this works, i.e. what bus does it refer to? */\r
+ uint32_t outputDisableSelect:2;\r
+ /* Prescale the emios clock some more? */\r
+ Pwm_ChannelPrescalerType prescaler:2;\r
+ /* Prescale the emios clock some more? */\r
+ uint32_t usePrescaler:1;\r
+ /* Whether to use DMA. Currently unsupported */\r
+ uint32_t useDma:1;\r
+ uint32_t reserved_2:1;\r
+ /* Input filter. Ignored in output mode. */\r
+ uint32_t inputFilter:4;\r
+ /* Input filter clock source. Ignored in output mode */\r
+ uint32_t filterClockSelect:1;\r
+ /* Enable interrupts/flags on this channel? Required for DMA as well. */\r
+ uint32_t flagEnable:1;\r
+ uint32_t reserved_3:3;\r
+ /* Trigger a match on channel A */\r
+ uint32_t forceMatchA:1;\r
+ /* Triggers a match on channel B */\r
+ uint32_t forceMatchB:1;\r
+ uint32_t reserved_4:1;\r
+ /* We can use different buses for the counter. Use the internal counter */\r
+ uint32_t busSelect:2;\r
+ /* What edges to flag on? */\r
+ uint32_t edgeSelect:1;\r
+ /* Polarity of the channel */\r
+ uint32_t edgePolarity:1;\r
+ /* EMIOS mode. 0x58 for buffered output PWM */\r
+ uint32_t mode:7;\r
+} Pwm_ChannelRegisterType;\r
+\r
+typedef struct {\r
+ Pwm_ChannelRegisterType r;\r
+ Pwm_ChannelType channel;\r
+} Pwm_ChannelConfigurationType;\r
+\r
+\r
+\r
+// Channel configuration macro.\r
+#define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \\r
+ {\\r
+ .channel = _hwchannel,\\r
+ .r = {\\r
+ DUTY_AND_PERIOD(_duty, _period),\\r
+ .freezeEnable = 1,\\r
+ .outputDisable = 0,\\r
+ .usePrescaler = 1,\\r
+ .prescaler = _prescaler,\\r
+ .useDma = 0,\\r
+ .flagEnable = 0, /* See PWM052 */ \\r
+ .busSelect = 3, /* Use the internal counter bus */\\r
+ .edgePolarity = _polarity,\\r
+ .mode = 0\\r
+ }\\r
+ }\r
+\r
+#endif /* PWM_CONFIGTYPES_H_ */\r
#ifndef BIT_H_\r
#define BIT_H_\r
\r
+#include <stdint.h>\r
/**\r
* @param aPtr Ptr to an array of unsigned chars.\r
* @param num The bit number to get.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
+// PC-Lint Exception to MISRA rule 19.12: stdio ok in debug.h.\r
+//lint -e(829)\r
+\r
\r
#ifndef DEBUG_H_\r
#define DEBUG_H_\r
\r
-\r
/**\r
*\r
* NOTE!!!!\r
#endif\r
\r
#if defined(USE_LDEBUG_PRINTF)\r
-#define LDEBUG_PRINTF(format,...) printf(format,## __VA_ARGS__ )\r
+#define LDEBUG_PRINTF(format,...) printf(format,## __VA_ARGS__ )\r
+#define LDEBUG_FPUTS(_str) fputs((_str),stdout)\r
#else\r
#define LDEBUG_PRINTF(format,...)\r
+#define LDEBUG_FPUTS(_str)\r
#endif\r
\r
\r
\r
#include "Std_Types.h"\r
\r
-#define Irq_Save(flags)\r
-#define Irq_Restore(flags)\r
+#define Irq_Save(flags) ((flags) = 0) // Dummy assignment to avoid compiler warnings\r
+#define Irq_Restore(flags) (void)(flags)\r
\r
#define Irq_Disable()\r
#define Irq_Enable()\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef ADC_CONFIGTYPES_H_\r
+#define ADC_CONFIGTYPES_H_\r
+\r
+\r
+typedef uint16_t Adc_ValueGroupType;\r
+\r
+\r
+typedef enum\r
+{\r
+ ADC_CH0,\r
+ ADC_CH1,\r
+ ADC_CH2,\r
+ ADC_CH3,\r
+ ADC_CH4,\r
+ ADC_CH5,\r
+ ADC_CH6,\r
+ ADC_CH7,\r
+ ADC_NOF_CHANNELS,\r
+}Adc_ChannelType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_2,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_4,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_6,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_10,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_12,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_14,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_16,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_18,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_20,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_22,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_24,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_26,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_28,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_30,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_32,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_34,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_36,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_38,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_40,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_42,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_44,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_46,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_48,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_50,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_52,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_54,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_56,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_58,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_60,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_62,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_64,\r
+}Adc_PrescaleType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONVERSION_TIME_2_CLOCKS,\r
+ ADC_CONVERSION_TIME_4_CLOCKS,\r
+ ADC_CONVERSION_TIME_8_CLOCKS,\r
+ ADC_CONVERSION_TIME_16_CLOCKS\r
+}Adc_ConversionTimeType;\r
+\r
+\r
+typedef enum\r
+{\r
+ ADC_RESOLUTION_10_BIT,\r
+ ADC_RESOLUTION_8_BIT,\r
+}Adc_ResolutionType;\r
+\r
+typedef struct\r
+{\r
+ uint8 notifictionEnable;\r
+ Adc_ValueGroupType * resultBufferPtr;\r
+ Adc_StatusType groupStatus;\r
+} Adc_GroupStatus;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONV_MODE_DISABLED,\r
+ ADC_CONV_MODE_ONESHOT = 1,\r
+ ADC_CONV_MODE_CONTINUOUS = 9,\r
+} Adc_GroupConvModeType;\r
+\r
+typedef struct\r
+{\r
+ Adc_GroupConvModeType conversionMode;\r
+ Adc_TriggerSourceType triggerSrc;\r
+ void (*groupCallback)(void);\r
+ const Adc_ChannelType *channelList;\r
+ Adc_ValueGroupType *resultBuffer;\r
+ Adc_ChannelType numberOfChannels;\r
+ Adc_GroupStatus *status;\r
+} Adc_GroupDefType;\r
+\r
+typedef struct\r
+{\r
+ Adc_ConversionTimeType convTime;\r
+ Adc_ResolutionType resolution;\r
+ Adc_PrescaleType adcPrescale;\r
+}Adc_HWConfigurationType;\r
+\r
+typedef struct\r
+{\r
+ const Adc_HWConfigurationType* hwConfigPtr;\r
+ const Adc_GroupDefType* groupConfigPtr;\r
+} Adc_ConfigType;\r
+\r
+extern const Adc_ConfigType AdcConfig[];\r
+#endif /* ADC_CONFIGTYPES_H_ */\r
#ifndef IRQ_H_\r
#define IRQ_H_\r
\r
+#include <stdint.h>\r
+#include "os.h"\r
#include "irq_types.h"\r
#include "bit.h"\r
\r
typedef void ( * func_t)(void);\r
\r
-extern uint8_t Irq_PriorityTable[];\r
-extern uint8_t Irq_IsrTypeTable[];\r
\r
-#define ISR_TYPE_1 0\r
-#define ISR_TYPE_2 1\r
\r
-typedef _Bool IsrType;\r
+#if (OS_SC2==STD_ON) || (OS_SC4==STD_ON)\r
+#define HAVE_SC2_SC4(_value) _value\r
+#else\r
+#define HAVE_SC2_SC4(_value)\r
+#endif\r
+\r
+#define IRQ_NAME(_vector) IrqVector_ ## _vector\r
+\r
+#define IRQ_DECL_ISR2_TIMING_PROT( \\r
+ _name, \\r
+ _max_all_interrupt_lock_time, \\r
+ _exeution_budget, \\r
+ _os_interrupt_lock_budget, \\r
+ _time_frame, \\r
+ _resource_lock_list )\r
+\r
+\r
+#define IRQ_DECL_ISR1(_name, _vector, _core, _prio, _entry ) \\r
+ const OsIsrConstType Irq_VectorConst_ ## _vector = { \\r
+ .name = _name, \\r
+ .vector = (_vector), \\r
+ .core = (_core), \\r
+ .prio = (_prio), \\r
+ .entry = (_entry), \\r
+ .type = ISR_TYPE_1, \\r
+ }\r
+\r
+\r
+#define IRQ_DECL_ISR2(_name,_vector, _core, _prio, _entry, _resource_mask, _timing_prot) \\r
+ const OsIsrConstType Irq_VectorConst_ ## _vector = { \\r
+ .name = _name, \\r
+ .vector = (_vector), \\r
+ .core = (_core), \\r
+ .prio = (_prio), \\r
+ .entry = (_entry), \\r
+ .type = ISR_TYPE_2, \\r
+ .resourceMask = (_resource_mask), \\r
+ .timingProtPtr = (_timing_prot) \\r
+ }\r
+\r
+\r
+#define IRQ_ATTACH(_vector) Irq_Attach(&Irq_VectorConst_ ## _vector)\r
+\r
+/* Example:\r
+ * IRQ_DECL_ISR2_RESOURCE(res2, RES_ID_2, 500000U ); // Max 50us\r
+ * IRQ_DECL_ISR2_TIMING_PROT(timing,0,0,0,0,res2);\r
+ * IRQ_DECL_ISR2("MyIsr",10,10,MyIsr,HAVE_SC2_SC4(RES_ID_1),HAVE_SC2_SC4(timing));\r
+ *
+ */\r
+\r
+// typedef _Bool IsrType;\r
\r
/**\r
* Init the interrupt controller\r
void Irq_Init( void );\r
\r
\r
-\r
-\r
#if defined(CFG_HC1X)\r
/**\r
*\r
*/\r
void *Irq_Entry( void *stack_p );\r
#endif\r
+\r
+//ISRType Irq_Attach( const OsIsrConstType *isrPtr );\r
+ISRType Irq_Attach( int vector );\r
+ISRType Irq_Attach2( const OsIsrConstType * );\r
+\r
/**\r
* Attach an ISR type 1 to the interrupt controller.\r
*\r
*/\r
uint8_t Irq_GetCurrentPriority( Cpu_t cpu);\r
\r
-\r
/**\r
* Set the priority in the interrupt controller for vector\r
*/\r
void Irq_SetPriority( Cpu_t cpu, IrqType vector, uint8_t prio );\r
\r
+void Irq_EnableVector( int16_t vector, int priority, int core );\r
+\r
/**\r
*\r
* @param vector\r
* @param type\r
*/\r
-static inline void Irq_SetIsrType( IrqType vector, IsrType type ) {\r
+#if 0\r
+static inline void Irq_SetIsrType( IrqType vector, int8_t type ) {\r
Irq_IsrTypeTable[vector] = type;\r
}\r
\r
* @return 0 - Isr1\r
* 1 - Isr2\r
*/\r
-static inline IsrType Irq_GetIsrType( IrqType vector ) {\r
+static inline int8_t Irq_GetIsrType( IrqType vector ) {\r
return Irq_IsrTypeTable[vector];\r
}\r
+#endif\r
\r
\r
#if 0\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef ISR_H_\r
+#define ISR_H_\r
+\r
+/*\r
+ * INCLUDE "RULES"\r
+ * Since this types and methods defined here are used by the drivers, they should\r
+ * include it. E.g. #include "isr.h"\r
+ *\r
+ * This file is also used internally by the kernel\r
+ *\r
+ *\r
+ * irq_types.h ( Vector enums )\r
+ * irq.h ( Interface )\r
+ *\r
+ * Problem:\r
+ * Os_Cfg.h needs types from isr.h\r
+ *\r
+ */\r
+\r
+/* ----------------------------[includes]------------------------------------*/\r
+/* ----------------------------[define]--------------------------------------*/\r
+\r
+#define ISR_TYPE_1 0\r
+#define ISR_TYPE_2 1\r
+\r
+/* ----------------------------[macro]---------------------------------------*/\r
+#define ISR_DECLARE_ISR2(_name, _entry, _unique, _vector,_priority,_app ) \\r
+ const OsIsrConstType _entry ## _unique = { \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_2, \\r
+ .priority = _priority, \\r
+ .entry = _entry, \\r
+ .name = _name, \\r
+ .resourceMask = 0, \\r
+ .timingProtPtr = NULL, \\r
+ .appOwner = _app, \\r
+ }; \\r
+\r
+#define _ISR_INSTALL_ISR2(_name, _entry, _unique, _vector,_priority,_app ) \\r
+ do { \\r
+ const OsIsrConstType _entry ## _unique = { \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_2, \\r
+ .priority = _priority, \\r
+ .entry = _entry, \\r
+ .name = _name, \\r
+ .resourceMask = 0, \\r
+ .timingProtPtr = NULL, \\r
+ .appOwner = _app, \\r
+ }; \\r
+ Os_IsrAdd( & _entry ## _unique); \\r
+ } while(0);\r
+\r
+#define ISR_INSTALL_ISR2(_name,_entry, _vector,_priority,_app) \\r
+ _ISR_INSTALL_ISR2(_name,_entry, __LINE__, _vector,_priority,_app)\r
+\r
+\r
+/* ----------------------------[typedef]-------------------------------------*/\r
+\r
+\r
+\r
+/* STD container : OsIsrResourceLock\r
+ * Class: 2 and 4\r
+ *\r
+ * OsIsrResourceLockBudget 1 Float in seconds (MAXRESOURCELOCKINGTIME)\r
+ * OsIsrResourceLockResourceRef 1 Ref to OsResource\r
+ * */\r
+\r
+typedef struct OsIsrResourceLock {\r
+ uint32_t lockBudget;\r
+ uint32_t lockResourceRef; /* Wrong type */\r
+} OsIsrResourceLockType;\r
+\r
+\r
+/* STD container : OsIsrTimingProtection\r
+ * Class: 2 and 4\r
+ *\r
+ * OsIsrAllInterruptLockBudget 0..1 float\r
+ * OsIsrExecutionBudget 0..1 float\r
+ * OsIsrOsInterruptLockBudget 0..1 float\r
+ * OsIsrTimeFrame 0..1 float\r
+ * OsIsrResourceLock[C] 0..*\r
+ * */\r
+\r
+typedef struct OsIsrTimingProtection {\r
+ uint32_t allInterruptLockBudget;\r
+ uint32_t executionBudget;\r
+ uint32_t osInterruptLockBudget;\r
+ uint32_t timeFrame;\r
+ uint32_t resourceLock; /* Wrong type */\r
+} OsIsrTimingProtectionType;\r
+\r
+typedef struct {\r
+ void *curr; /* Current stack ptr( at swap time ) */\r
+ void *top; /* Top of the stack( low address ) */\r
+ uint32 size; /* The size of the stack */\r
+} OsIsrStackType;\r
+\r
+\r
+/* STD container : OsIsr\r
+ * Class: ALL\r
+ *\r
+ * OsIsrCategory: 1 CATEGORY_1 or CATEGORY_2\r
+ * OsIsrResourceRef: 0..* Reference to OsResources\r
+ * OsIsrTimingProtection[C] 0..1\r
+ * */\r
+\r
+typedef struct {\r
+ const char *name;\r
+ uint8_t core;\r
+ int16_t vector;\r
+ int16_t type;\r
+ int16_t priority;\r
+ void (*entry)();\r
+ uint32_t appOwner;\r
+ /* Mapped against OsIsrResourceRef */\r
+ uint32_t resourceMask;\r
+#if ( OS_USE_ISR_TIMING_PROT == STD_ON )\r
+ /* Mapped against OsIsrTimingProtection[C] */\r
+ OsIsrTimingProtectionType *timingProtPtr;\r
+#else\r
+ void *timingProtPtr;\r
+#endif\r
+} OsIsrConstType;\r
+\r
+/*\r
+ *\r
+ */\r
+typedef struct {\r
+ ISRType id;\r
+ OsIsrStackType stack;\r
+ int state;\r
+ const OsIsrConstType *constPtr;\r
+} OsIsrVarType;\r
+\r
+\r
+/* ----------------------------[functions]-----------------------------------*/\r
+\r
+void Os_IsrInit( void );\r
+ISRType Os_IsrAdd( const OsIsrConstType * restrict isrPtr );\r
+const OsIsrConstType * Os_IsrGet( int16_t vector);\r
+void Os_IsrGetStackInfo( OsIsrStackType *stack );\r
+\r
+#endif /*ISR_H_*/\r
assert(#_a #_b); \\r
}\r
\r
-\r
-\r
-\r
void Os_CfgValidate(void ) {\r
OS_VALIDATE(OS_COUNTER_CNT,ARRAY_SIZE(counter_list));\r
#if (RESOURCE_CNT!=0)\r
OS_VALIDATE(OS_RESOURCE_CNT,ARRAY_SIZE(resource_list));\r
#endif\r
- OS_VALIDATE(OS_TASK_CNT ,ARRAY_SIZE(rom_pcb_list));\r
+ OS_VALIDATE(OS_TASK_CNT ,ARRAY_SIZE( Os_TaskConstList));\r
#if (RESOURCE_CNT!=0)\r
OS_VALIDATE(OS_ALARM_CNT,ARRAY_SIZE(alarm_list));\r
#endif\r
#endif\r
\r
/*-----------------------------------------------------------------*/\r
-#if ( OS_SC3 == STD_ON) || ( OS_SC4==STD_ON)\r
-int Os_CfgGetApplCnt(void) {\r
- return APPLICATION_CNT;\r
-}\r
+#if 0\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
\r
-OsRomApplicationType *Os_CfgGetApplObj( ApplicationType application_id ) {\r
+OsRomApplicationType *Os_CfgGetApplObj( ApplicationType appId ) {\r
return &rom_app_list[application_id];\r
}\r
#endif\r
+#endif\r
\r
/*-----------------------------------------------------------------*/\r
\r
OsResourceType *Os_CfgGetResource( ResourceType resource ) {\r
+#if OS_RESOURCE_CNT!=0\r
return &resource_list[resource];\r
+#else\r
+ return NULL;\r
+#endif\r
}\r
\r
/*-----------------------------------------------------------------*/\r
\r
/*-----------------------------------------------------------------*/\r
\r
-#if ( OS_SC3 == STD_ON) || ( OS_SC4 == STD_ON)\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
uint32 Os_CfgGetServiceCnt( void ) {\r
- return SERVICE_CNT;\r
+ return OS_SERVICE_CNT;\r
}\r
#endif\r
\r
\r
-/*-----------------------------------------------------------------*/\r
-\r
-void Os_CfgGetInterruptStackInfo( OsStackType *stack ) {\r
- stack->top = os_interrupt_stack;\r
- stack->size = sizeof(os_interrupt_stack);\r
-}\r
-\r
-\r
\r
\r
\r
\r
\r
// +1 here.. easy to have a reference..\r
-#define GEN_TRUSTEDFUNCTIONS_LIST trusted_func_t os_cfg_trusted_list[SERVICE_CNT];\r
+#define GEN_TRUSTEDFUNCTIONS_LIST trusted_func_t os_cfg_trusted_list[OS_SERVICE_CNT];\r
\r
-#define GEN_APPLICATION_HEAD const OsRomApplicationType rom_app_list[] =\r
+#define GEN_APPLICATION_HEAD const OsAppConstType Os_AppConst[OS_APPLICATION_CNT]\r
\r
-#define GEN_APPLICATON( _id,_name,_trusted,_startuphook,_shutdownhook, \\r
- _errorhook,_isr_mask,_scheduletable_mask, _alarm_mask, \\r
- _counter_mask,_resource_mask,_message_mask ) \\r
+#define GEN_APPLICATION( _id,_name, _core, _trusted,_startuphook,_shutdownhook, _errorhook, \\r
+ _restart_task ) \\r
{ \\r
- .application_id = _id, \\r
+ .appId = _id, \\r
.name = _name, \\r
+ .core = _core, \\r
.trusted = _trusted, \\r
.StartupHook = _startuphook, \\r
.ShutdownHook = _shutdownhook, \\r
.ErrorHook = _errorhook, \\r
- .isr_mask = _isr_mask, \\r
- .scheduletable_mask = _scheduletable_mask, \\r
- .alarm_mask = _alarm_mask, \\r
- .counter_mask = _counter_mask, \\r
- .resource_mask = _resource_mask, \\r
- .message_mask = _message_mask, \\r
+ .restartTaskId = _restart_task \\r
}\r
\r
-\r
-#define GEN_TASK_HEAD const OsRomPcbType rom_pcb_list[] =\r
+#define GEN_TASK_HEAD const OsTaskConstType Os_TaskConstList[OS_TASK_CNT]\r
\r
\r
\r
* become (1<<2)|(1<<4) = 0x14 (limits resources to 32).\r
* Currently used for calculating the ceiling priority.\r
*/\r
-#define GEN_ETASK( _id, _priority, _scheduling, _autostart, _resource_int_p, _resource_mask ) \\r
+#define GEN_ETASK( _id, _name, _priority, _scheduling, \\r
+ _autostart, _resource_int_p, _resource_mask, \\r
+ _appl_owner, _accessing_appl_mask ) \\r
{ \\r
- .pid = TASK_ID_##_id, \\r
- .name = #_id, \\r
+ .pid = TASK_ID_ ## _id, \\r
+ .name = _name, \\r
.entry = _id, \\r
.prio = _priority, \\r
.proc_type = PROC_EXTENDED, \\r
.stack.size = sizeof stack_##_id, \\r
.stack.top = stack_##_id, \\r
.autostart = _autostart, \\r
- .resource_int_p = _resource_int_p, \\r
+ .resourceIntPtr = _resource_int_p, \\r
.scheduling = _scheduling, \\r
.resourceAccess = _resource_mask, \\r
.activationLimit = 1, \\r
+ .applOwnerId = _appl_owner, \\r
+ .accessingApplMask = _accessing_appl_mask, \\r
}\r
\r
-#define GEN_BTASK( _id, _priority, _scheduling, _autostart, _resource_int_p, _resource_mask, _activation_limit ) \\r
+#define GEN_BTASK( _id, _name, _priority, _scheduling, \\r
+ _autostart, _resource_int_p, _resource_mask, \\r
+ _activation_limit, _appl_owner, _accessing_appl_mask ) \\r
{ \\r
- .pid = TASK_ID_##_id, \\r
- .name = #_id, \\r
+ .pid = TASK_ID_ ## _id, \\r
+ .name = _name, \\r
.entry = _id, \\r
.prio = _priority, \\r
.proc_type = PROC_BASIC, \\r
.stack.size = sizeof stack_##_id, \\r
.stack.top = stack_##_id, \\r
.autostart = _autostart, \\r
- .resource_int_p = _resource_int_p, \\r
+ .resourceIntPtr = _resource_int_p, \\r
.scheduling = _scheduling, \\r
.resourceAccess = _resource_mask, \\r
.activationLimit = _activation_limit, \\r
+ .applOwnerId = _appl_owner, \\r
+ .accessingApplMask = _accessing_appl_mask, \\r
+}\r
+\r
+#define GEN_ISR_HEAD const OsIsrConstType Os_IsrConstList[OS_ISR_CNT]\r
+\r
+#define GEN_ISR1( _name, _vector, _priority, _entry, _appOwner ) \\r
+{ \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_1, \\r
+ .priority = _priority, \\r
+ .entry = _entry, \\r
+ .name = _name, \\r
+ .resourceMask = 0, \\r
+ .appOwner = _appOwner, \\r
+}\r
+\r
+#define GEN_ISR2( _name, _vector, _priority, _entry, _appOwner, _resourceMask ) \\r
+{ \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_1, \\r
+ .priority = _priority, \\r
+ .entry = _entry, \\r
+ .name = _name, \\r
+ .resourceMask = _resourceMask, \\r
+ .appOwner = _appOwner, \\r
}\r
\r
+\r
+#define GEN_ISR_MAP const uint8_t Os_VectorToIsr[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS]\r
+\r
+\r
+#if 0\r
#define GEN_ISR_2( _id, _name, _entry, _priority, _vector ) \\r
{ \\r
.pid = _id, \\r
.proc_type = PROC_ISR1, \\r
.vector = _vector, \\r
}\r
+#endif\r
\r
-//#define GEN_PCB_LIST() uint8_t pcb_list[PCB_T_SIZE*ARRAY_SIZE(rom_pcb_list)];\r
-#define GEN_PCB_LIST() OsPcbType pcb_list[ARRAY_SIZE(rom_pcb_list)];\r
\r
-#define GEN_RESOURCE_HEAD OsResourceType resource_list[] =\r
+//#define GEN_PCB_LIST() uint8_t Os_TaskVarList[PCB_T_SIZE*ARRAY_SIZE( Os_TaskConstList)];\r
+#define GEN_PCB_LIST() OsTaskVarType Os_TaskVarList[ARRAY_SIZE( Os_TaskConstList)];\r
+\r
+#define GEN_RESOURCE_HEAD OsResourceType resource_list[OS_RESOURCE_CNT] =\r
\r
\r
/**\r
* NOT USED. Set to 0\r
*/\r
\r
-#define GEN_COUNTER_HEAD OsCounterType counter_list[] =\r
+#define GEN_COUNTER_HEAD OsCounterType counter_list[OS_COUNTER_CNT]\r
#define GEN_COUNTER( _id, _name, _type, _unit, \\r
_maxallowedvalue, \\r
_ticksperbase, \\r
_mincycle, \\r
- _gpt_ch ) \\r
+ _gpt_ch, \\r
+ _appl_owner, \\r
+ _accessing_appl_mask ) \\r
{ \\r
.type = _type, \\r
.unit = _unit, \\r
.alarm_base.maxallowedvalue = _maxallowedvalue, \\r
.alarm_base.tickperbase = _ticksperbase, \\r
.alarm_base.mincycle = _mincycle, \\r
+ .applOwnerId = _appl_owner, \\r
+ .accessingApplMask = _accessing_appl_mask, \\r
}\r
-#if 0\r
- // For now...\r
- .driver.OsGptChannelRef = _gpt_ch\r
-#endif\r
-\r
\r
#define GEN_ALARM_AUTOSTART_NAME(_id) &(Os_AlarmAutoStart_ ## _id)\r
\r
.appModeRef = _app_mode \\r
}\r
\r
-#define GEN_ALARM_HEAD OsAlarmType alarm_list[] =\r
+#define GEN_ALARM_HEAD OsAlarmType alarm_list[OS_ALARM_CNT]\r
\r
/**\r
* _id\r
* _X_counter_id - The counter ID if type is ALARM_ACTION_INCREMENTCOUNTER\r
*\r
*/\r
-#define GEN_ALARM( _id, _name, _counter_id, \\r
- _autostart_ref, \\r
- _action_type, \\r
- _action_task_id, \\r
- _action_event_id, \\r
- _action_counter_id ) \\r
+#define GEN_ALARM( _id, _name, _counter_id, \\r
+ _autostart_ref, \\r
+ _action_type, \\r
+ _action_task_id, \\r
+ _action_event_id, \\r
+ _action_counter_id, \\r
+ _appl_owner, \\r
+ _accessing_appl_mask ) \\r
{ \\r
.name = _name, \\r
.counter = &counter_list[_counter_id], \\r
.counter_id = _counter_id, \\r
- .autostartPtr = _autostart_ref, \\r
+ .autostartPtr = _autostart_ref, \\r
.action = { \\r
.type = _action_type, \\r
.task_id = _action_task_id, \\r
.event_id = _action_event_id, \\r
.counter_id = _action_counter_id \\r
}, \\r
+ .applOwnerId = _appl_owner, \\r
+ .accessingApplMask = _accessing_appl_mask, \\r
}\r
\r
/*\r
}\r
\r
\r
-#if ( OS_SC3 == STD_ON) || ( OS_SC4 == STD_ON)\r
-#error OLD or NOT implemented\r
#define GEN_HOOKS( _startup, _protection, _shutdown, _error, _pretask, _posttask ) \\r
struct OsHooks os_conf_global_hooks = { \\r
.StartupHook = _startup, \\r
.ShutdownHook = _shutdown, \\r
.ErrorHook = _error, \\r
.PreTaskHook = _pretask, \\r
- .PostTaskHook = _posttask, \\r
-};\r
-#else\r
-#define GEN_HOOKS( _startup, _protection, _shutdown, _error, _pretask, _posttask ) \\r
-struct OsHooks os_conf_global_hooks = { \\r
- .StartupHook = _startup, \\r
- .ShutdownHook = _shutdown, \\r
- .ErrorHook = _error, \\r
- .PreTaskHook = _pretask, \\r
- .PostTaskHook = _posttask, \\r
-};\r
-\r
-#endif\r
-\r
-\r
-#define GEN_IRQ_VECTOR_TABLE_HEAD \\r
- void * Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS] =\r
-\r
-#define GEN_IRQ_ISR_TYPE_TABLE_HEAD \\r
- uint8_t Irq_IsrTypeTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS] =\r
-\r
-#define GEN_IRQ_PRIORITY_TABLE_HEAD \\r
- uint8_t Irq_PriorityTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS] =\r
+ .PostTaskHook = _posttask \\r
+}\r
\r
#define ALIGN_16(x) (((x)>>4)<<4)\r
\r
* Note! Tried lots of other ways to do this but came up empty\r
*/\r
\r
-#define get_spr(spr_nr) \\r
+#define get_spr(spr_nr) CC_EXTENSION \\r
({\\r
uint32_t __val;\\r
asm volatile (" mfspr %0," STRINGIFY__(spr_nr) : "=r"(__val) : );\\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#ifndef _ASM_BOOK_E_H\r
-#define _ASM_BOOK_E_H\r
-\r
-/*\r
- *\r
- *\r
- *\r
- *\r
- *\r
- *\r
- */\r
-\r
-\r
-/*\r
- * TODO: This file should be split in two. One handle the exceptions for book-e\r
- * and one for this arch stack-frame-> asm_stack_frame.h\r
- */\r
-\r
-/*\r
-\r
- Mcu_Exceptions.S maps exceptions to the kernel through the exception_tbl.\r
-\r
-\r
- exception_tbl: ( Mcu_Exceptions.S )\r
- |\r
- | exc_intc_pcb_tbl ( kernel )\r
- |-----> exception_IVORx: ------> -------------\r
- |-----> exception_IVORy: -, | 0 | ISR2\r
- | | .. . |<>----------> my_isr_c_routine( C )\r
- | | |\r
- '----> | 32x |\r
- | 324 |\r
- | 3 | -----------> my_isr_routine: (assembler)\r
- ' '\r
- '-----------'\r
- In kernel for IVOR4:\r
- 1. Get vector through INTC_IACKR\r
- 2. Get pcb for vector\r
- If pcb==0, goto 10\r
- 3. Get ISR type\r
- if type==1, goto 5\r
- 4. Save some GPR regs\r
- 5. Call pcb->entry\r
- 10: done!\r
-\r
-\r
- ,--------,\r
- | SP |\r
- | Type | Context\r
- | LR |\r
- .....\r
- +--------+\r
- | | NVGPR's\r
- .....\r
- +--------+\r
-\r
-\r
- b exception_IVOR4\r
- {\r
- save EF regs\r
- get interrupt vector\r
- if (soft int) {\r
- ack int\r
- }\r
- get intc table\r
- jump to function\r
-\r
- }\r
-\r
- The are two types of ISR, ISR1 and ISR2:\r
- ISR1 - assembler routine, return with blr( Only EF exist on stack )\r
- ISR2 - normal C-routine( can save small or big frame depending on config )\r
-\r
-\r
- Use cases:\r
- - InstallVector(vector, func, type )\r
- 1. InstallVector( 320+10, exception_dec, 1 ); // dec exception\r
- 2. InstallVector( 320+11, exception_fit, 2 ); // fit exception\r
- 3. InstallVector( 5, softint , 2 ); // soft int\r
- 4. InstallVector( 100, normal_int, 2 ) // normal int.\r
- 5. InstallVector( 101, normal_int_2, 1 ) // normal int.\r
-\r
- In case 1, the user have to install a prologue/epilogues to access\r
- it from C( i.e store small frame )\r
-*/\r
-\r
-\r
-\r
-#define SC_PATTERN 0xde\r
-#define LC_PATTERN 0xad\r
-\r
-\r
-/* Alignment for architecture, see e500-ABI */\r
-#define ARCH_ALIGN 16\r
-\r
-#if defined(USE_KERNEL)\r
-#define C_SIZE 32\r
-#define C_SP_OFF 0\r
-// 4- backchain\r
-// 8 -padding\r
-#define C_CONTEXT_OFF 12\r
-#define C_LR_OFF 16\r
-#define C_CR_OFF 20\r
-#define C_MSR_OFF 24\r
-#else\r
-#define C_SIZE 0\r
-#endif\r
-\r
-\r
-\r
-#if defined(CFG_SPE)\r
-//-----------------------------------------------------------------\r
-#define GPR_SIZE 8\r
-#elif defined(CFG_MPC5516)\r
-#define GPR_SIZE 4\r
-#else\r
-#error No MCU set\r
-#endif\r
-\r
-\r
-#if defined(USE_KERNEL)\r
-/* Small context */\r
-#define SC_GPRS_SIZE ((31-14+1)*GPR_SIZE)\r
-#define SC_GPRS_OFFS C_SIZE\r
-#define SC_SIZE (C_SIZE + SC_GPRS_SIZE)\r
-\r
-/* Large context */\r
-#define LC_GPRS_SIZE ((31-0+1)*GPR_SIZE)\r
-#define LC_SIZE (C_SIZE + LC_GPRS_SIZE)\r
-#endif\r
-\r
-// GPR save and restore macros\r
-\r
-#if defined(CFG_SPE)\r
- #define SAVE_GPR(reg,_offset,rel_reg) evstdd reg,(((reg)*GPR_SIZE)+_offset)(rel_reg)\r
- #define RESTORE_GPR(reg,_offset,rel_reg) evldd reg,(((reg)*GPR_SIZE)+_offset)(rel_reg)\r
-#elif defined(CFG_MPC5516)\r
- #define SAVE_GPR(reg,_offset,rel_reg) stw reg,(((reg)*GPR_SIZE)+_offset)(rel_reg)\r
- #define RESTORE_GPR(reg,_offset,rel_reg) lwz reg,(((reg)*GPR_SIZE)+_offset)(rel_reg)\r
-#endif\r
-\r
-#define SAVE_GPR2(reg,_offset,rel_reg) SAVE_GPR(reg,_offset,rel_reg);SAVE_GPR(reg+1,_offset,rel_reg)\r
-#define SAVE_GPR4(reg,_offset,rel_reg) SAVE_GPR2(reg,_offset,rel_reg);SAVE_GPR2(reg+2,_offset,rel_reg)\r
-#define SAVE_GPR8(reg,_offset,rel_reg) SAVE_GPR4(reg,_offset,rel_reg);SAVE_GPR4(reg+4,_offset,rel_reg)\r
-\r
-#define RESTORE_GPR2(reg,_offset,rel_reg) RESTORE_GPR(reg,_offset,rel_reg);RESTORE_GPR(reg+1,_offset,rel_reg)\r
-#define RESTORE_GPR4(reg,_offset,rel_reg) RESTORE_GPR2(reg,_offset,rel_reg);RESTORE_GPR2(reg+2,_offset,rel_reg)\r
-#define RESTORE_GPR8(reg,_offset,rel_reg) RESTORE_GPR4(reg,_offset,rel_reg);RESTORE_GPR4(reg+4,_offset,rel_reg)\r
-\r
-// Non volatile regs, 14-31( saved by function called )\r
-#define SAVE_NVGPR(rel_reg,_offset) SAVE_GPR2(14,_offset,rel_reg); \\r
- SAVE_GPR8(16,_offset,rel_reg); \\r
- SAVE_GPR8(24,_offset,rel_reg);\r
-\r
-#define RESTORE_NVGPR(rel_reg,_offset) RESTORE_GPR2(14,_offset,rel_reg); \\r
- RESTORE_GPR8(16,_offset,rel_reg); \\r
- RESTORE_GPR8(24,_offset,rel_reg);\r
-\r
-#define NVGPR_SIZE (18*GPR_SIZE)\r
-\r
-// Volatile regs, r0, r5-r12, [r13] ( r3, r4 are assumed to be save else where )\r
-#define SAVE_VGPR(rel_reg,_offset) SAVE_GPR(0,_offset,rel_reg);SAVE_GPR8(5,_offset, rel_reg)\r
-#define RESTORE_VGPR(rel_reg,_offset) RESTORE_GPR(0,_offset, rel_reg);RESTORE_GPR8(5,_offset, rel_reg)\r
-#define VGPR_SIZE (14*GPR_SIZE)\r
-\r
-#define EXC_BASE_OFF 0 //(VGPR_SIZE+NVGPR_SIZE+C_SIZE)\r
-#define EXC_OFF_FROM_BOTTOM (VGPR_SIZE+NVGPR_SIZE+C_SIZE)\r
-\r
-\r
-/* Exception frame */\r
-#if defined(CFG_SPE)\r
-#define EXC_SIZE 80\r
-#else\r
-#define EXC_SIZE 64 /* MUST be 16 byte aligned, again eabi */\r
-#endif\r
-\r
-#define EXC_SP_OFF (EXC_BASE_OFF+0)\r
-// 4 - backchain\r
-// 8 - padding\r
-#define EXC_SRR0_OFF (EXC_BASE_OFF+12)\r
-#define EXC_SRR1_OFF (EXC_BASE_OFF+16)\r
-#define EXC_LR_OFF (EXC_BASE_OFF+20)\r
-#define EXC_CTR_OFF (EXC_BASE_OFF+24)\r
-#define EXC_XER_OFF (EXC_BASE_OFF+28)\r
-#define EXC_CR_OFF (EXC_BASE_OFF+32)\r
-#define EXC_ESR_OFF (EXC_BASE_OFF+36)\r
-#define EXC_MCSR_OFF (EXC_BASE_OFF+40)\r
-#define EXC_DEAR_OFF (EXC_BASE_OFF+44)\r
-#define EXC_VECTOR_OFF (EXC_BASE_OFF+48)\r
-#if defined(CFG_SPE)\r
-#define EXC_SPEFSCR (EXC_BASE_OFF+52)\r
-#define EXC_R3_OFF (EXC_BASE_OFF+56) // 8 bytes..\r
-#define EXC_R4_OFF (EXC_BASE_OFF+64) // 8 bytes..\r
-#define EXC_SPE_ACC (EXC_BASE_OFF+72) // 8 bytes\r
-#else\r
-#define EXC_R3_OFF (EXC_BASE_OFF+52)\r
-#define EXC_R4_OFF (EXC_BASE_OFF+56)\r
-#endif\r
-\r
-\r
-/*-------------------------------------------------------------------\r
- * Save exception frame macro\r
- *-----------------------------------------------------------------*/\r
-\r
-#define SAVE_EXC_FRAME(work,rel_reg,_offset,xsrr0_spr,xsrr1_spr) \\r
- mfspr work,xsrr0_spr; \\r
- stw work,(EXC_SRR0_OFF+_offset)(rel_reg); \\r
- mfspr work,xsrr1_spr; \\r
- stw work,(EXC_SRR1_OFF+_offset)(rel_reg); \\r
- mfspr work,SPR_XER; \\r
- stw work,(EXC_XER_OFF+_offset)(rel_reg); \\r
- mfspr work,SPR_CTR; \\r
- stw work,(EXC_CTR_OFF+_offset)(rel_reg); \\r
- mflr work; \\r
- stw work,(EXC_LR_OFF+_offset)(rel_reg); \\r
- /* TODO: all exceptions dont't need all the info below... but it's simple */ \\r
- mfspr work,SPR_ESR; \\r
- stw work,(EXC_ESR_OFF+_offset)(rel_reg); \\r
- mfspr work,SPR_DEAR; \\r
- stw work,(EXC_DEAR_OFF+_offset)(rel_reg); \\r
- mfspr work,SPR_MCSR; \\r
- stw work,(EXC_MCSR_OFF+_offset)(rel_reg); \\r
- mfcr work; \\r
- stw work,(EXC_CR_OFF+_offset)(rel_reg);\r
-\r
-\r
-/*-------------------------------------------------------------------\r
- * Restore exception frame macro\r
- *-----------------------------------------------------------------*/\r
-#define RESTORE_EXC_FRAME(work,rel_reg,_offset,xsrr0_spr,xsrr1_spr) \\r
- lwz work,(EXC_SRR0_OFF+_offset)(rel_reg); \\r
- mtspr xsrr0_spr,work; \\r
- lwz work,(EXC_SRR1_OFF+_offset)(rel_reg); \\r
- mtspr xsrr1_spr,work; \\r
- lwz work,(EXC_XER_OFF+_offset)(rel_reg); \\r
- mtspr SPR_XER,work; \\r
- lwz work,(EXC_CTR_OFF+_offset)(rel_reg); \\r
- mtspr SPR_CTR,work; \\r
- lwz work,(EXC_LR_OFF+_offset)(rel_reg); \\r
- mtlr work; \\r
- lwz work,(EXC_ESR_OFF+_offset)(rel_reg); \\r
- mtspr SPR_ESR,work; \\r
- lwz work,(EXC_DEAR_OFF+_offset)(rel_reg); \\r
- mtspr SPR_DEAR,work; \\r
- lwz work,(EXC_MCSR_OFF+_offset)(rel_reg); \\r
- mtspr SPR_MCSR,work; \\r
- lwz work,(EXC_CR_OFF+_offset)(rel_reg); \\r
- mtcr work; \\r
-\r
-\r
-\r
-#define EXCEPTION_CRITICAL_PROLOGUE(vector) \\r
- addi sp,sp,-EXC_SIZE; \\r
- stw r3,EXC_R3_OFF(r1); \\r
- stw r4,EXC_R4_OFF(r1); \\r
- li r4,vector; \\r
- stw r4,EXC_VECTOR_OFF(r1); \\r
- SAVE_EXC_FRAME(3,1,0,SPR_CSRR0,SPR_CSRR1)\r
-\r
-\r
-#define EXCEPTION_CRITICAL_EPILOGUE(vector) \\r
- RESTORE_EXC_FRAME(3,1,0,SPR_CSRR0,SPR_CSRR1); \\r
- lwz r3,EXC_R3_OFF(r1); \\r
- lwz r4,EXC_R4_OFF(r1); \\r
- addi sp,sp,EXC_SIZE;\r
-\r
-\r
-#define EXCEPTION_PROLOGUE(vector) \\r
- addi sp,sp,-EXC_SIZE; \\r
- stw r3,EXC_R3_OFF(r1); \\r
- stw r4,EXC_R4_OFF(r1); \\r
- li r4,vector; \\r
- stw r4,EXC_VECTOR_OFF(r1); \\r
- SAVE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1)\r
-\r
-\r
-#define EXCEPTION_EPILOGUE() \\r
- RESTORE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1); \\r
- lwz r3,EXC_R3_OFF(r1); \\r
- lwz r4,EXC_R4_OFF(r1); \\r
- addi sp,sp,EXC_SIZE;\r
-\r
-\r
-#define CALL_HANDLER() CALL_HANDLER_(Irq_VectorTable)\r
-\r
-//-------------------------------------------------------------------\r
-\r
-#define CALL_HANDLER_(_table) \\r
- lis r3, _table@h; \\r
- ori r3, r3, _table@l; \\r
- slwi r4,r4,2; /* times 4 */ \\r
- add r3,r3,r4; \\r
- lwz r3,0(r3); /* get the entry */ \\r
- cmpli 0,r3,0; \\r
- beq+ bad_int; \\r
- mtctr r3; \\r
- mr r3,r1; /* use stack as arg */ \\r
- subi r1,r1,16; /* space for backchain */ \\r
- bctrl; \\r
- addi r1,r1,16\r
-\r
-//-------------------------------------------------------------------\r
-\r
-#define EXCEPTION_CSRRx(_section,_vector) \\r
- .global _section; \\r
- .balign 16; \\r
-_section:; \\r
- EXCEPTION_CRITICAL_PROLOGUE(_vector); \\r
- CALL_HANDLER(); \\r
- EXCEPTION_CRITICAL_EPILOGUE(); \\r
- rfci\r
-\r
-\r
-#define EXCEPTION_SRRx(_section,_vector) \\r
- .global _section; \\r
- .balign 16; \\r
-_section:; \\r
- EXCEPTION_PROLOGUE(_vector); \\r
- CALL_HANDLER(); \\r
- EXCEPTION_EPILOGUE(); \\r
- rfi\r
-\r
-\r
-#if defined(_ASSEMBLER_)\r
-#if defined(CFG_SPE)\r
-\r
-.macro save_work_and_more\r
- // work on the exception frame for now..\r
- addi sp,sp,-(EXC_SIZE)\r
-\r
- mtspr SPR_SPRG0_RW_S,r3\r
- // Enable SPE (exceptions turns it off)\r
- mfmsr r3\r
- oris r3,r3,0x0200\r
- mtmsr r3\r
- isync\r
-\r
- mfspr r3, SPR_SPRG0_RW_S\r
-\r
- // Save 64-bit r3 and r4\r
- evstdd r3,EXC_R3_OFF(r1)\r
- evstdd r4,EXC_R4_OFF(r1)\r
-\r
- // SPEFSCR\r
- mfspr r3,SPR_SPEFSCR\r
- clrlwi r3,r3,24 /* Mask off non-status bits */\r
- stw r3,EXC_SPEFSCR(sp)\r
-\r
- // Save SPE acc\r
- evsubfw r3,r3,r3 // zero r3\r
- evaddumiaaw r3,r3 // Add r3 = r3 + acc -> r3 = acc\r
- evstdd r3,EXC_SPE_ACC(r1)\r
-\r
- SAVE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1)\r
-\r
- // Save access through r4\r
- mr r4,r1\r
- // Make place for the other stack frames.\r
- addi sp,sp,-(VGPR_SIZE+NVGPR_SIZE+C_SIZE)\r
-.endm\r
-\r
-.macro restore_work_and_more\r
- // Stack is below C frame.... access EXC frame.\r
- addi sp,sp,(C_SIZE+NVGPR_SIZE+VGPR_SIZE)\r
-\r
- // Store the SPE control/status reg.\r
- lwz r3,EXC_SPEFSCR(sp)\r
- mtspr SPR_CSRR0,r3\r
-\r
- /* Load SPE acc */\r
- evldd r3,EXC_SPE_ACC(r1)\r
- evmra r3,r3\r
-\r
- RESTORE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1);\r
-\r
- evldd r3,EXC_R3_OFF(r1)\r
- evldd r4,EXC_R4_OFF(r1)\r
-\r
- addi sp,sp,EXC_SIZE\r
-\r
-.endm\r
-#else\r
-.macro save_work_and_more\r
- addi sp,sp,-(EXC_SIZE)\r
-\r
- stw r3,EXC_R3_OFF(r1)\r
- stw r4,EXC_R4_OFF(r1)\r
-\r
- SAVE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1)\r
-\r
- // Save access through r4\r
- mr r4,r1\r
- // Make place for the other stack frames.\r
- addi sp,sp,-(VGPR_SIZE+NVGPR_SIZE+C_SIZE)\r
-.endm\r
-\r
-.macro restore_work_and_more\r
- // Work on the exception frame.\r
- addi sp,sp,(VGPR_SIZE+NVGPR_SIZE+C_SIZE)\r
-\r
- RESTORE_EXC_FRAME(3,1,0,SPR_SRR0,SPR_SRR1);\r
-\r
- lwz r3,EXC_R3_OFF(r1);\r
- lwz r4,EXC_R4_OFF(r1);\r
-\r
- addi sp,sp,EXC_SIZE\r
-.endm\r
-#endif\r
-#endif\r
-\r
-#endif /* _ASM_BOOK_E_H */\r
-\r
*\r
*/\r
\r
-/*\r
- * -------- botton(high address )\r
- * Context\r
- * --------\r
- *\r
- * -------- top\r
- *\r
- * kind of frames...\r
- * -------------------------------\r
- * C_xxxx - common frame to both large and small context\r
- * EXC_xxx - exception frame\r
- * SC_xxx - small context frame\r
- * LC_xxx - large context frame\r
- *\r
- *\r
- *\r
- *\r
- */\r
-\r
-\r
#define SPR_SRR0 26\r
#define SPR_SRR1 27\r
\r
#define SPR_XER 1\r
#define SPR_CTR 9\r
\r
+#define INTC_SSCIR7 0xFFF48027\r
\r
+#if defined(_ASSEMBLER_)\r
/*\r
* Misc macros\r
*/\r
addi reg, reg, addr@l\r
\r
\r
+\r
/* GPRS */\r
#define sp 1\r
#define r0 0\r
#define r29 29\r
#define r30 30\r
#define r31 31\r
+#endif\r
\r
#endif /*PPC_ASM_H_*/\r
# BOARDDIR=<board dir> \r
# Select what board to build for \r
# BDIR=<dir>[,<dir>] \r
-# Select what directories to build. The kernel if always built.\r
+# Select what directories to build. The kernel is always built.\r
# CROSS_COMPILE\r
# Specify the compiler to use. \r
# Q=[(@)/empty] \r
\r
.PHONY: help\r
help:\r
- @echo "Make kernel and a simple example"\r
+ @echo "Build a simple example"\r
@echo " > make BOARDDIR=mpc551xsim CROSS_COMPILE=/opt/powerpc-eabi/bin/powerpc-eabi- BDIR=examples/simple all"\r
@echo ""\r
- @echo "Save the config (CROSS_COMPILE and BDIR)"\r
- @echo " > make BOARDDIR=mpc551xsim CROSS_COMPILE=/opt/powerpc-eabi/bin/powerpc-eabi- BDIR=examples/simple save"\r
- @echo ""\r
@echo "Clean"\r
@echo " > make clean"\r
@echo ""\r
@echo "Present config:"\r
- @echo " ARCH=$(ARCH)"\r
- @echo " ARCH_FAM=$(ARCH_FAM)"\r
- @echo " BOARDDIR =$(BOARDDIR)"\r
- @echo " CROSS_COMPILE =$(CROSS_COMPILE)"\r
+ @echo " BDIR = ${BDIR}"\r
+ @echo " BOARDDIR = $(BOARDDIR)"\r
+ @echo " CROSS_COMPILE = $(CROSS_COMPILE)"\r
+ @echo " CWD = ${CWD}"\r
@echo ""\r
\r
export CFG_MCU \r
@echo $(all_boards)\r
\r
show_build:\r
- @echo "BUILD INFO"\r
+ @echo ""\r
+ @echo "==========[ BUILD INFO ]==========="\r
@echo "BOARDDIR: $(BOARDDIR) [$(origin BOARDDIR)]"\r
@echo "BDIR: $(BDIR) [$(origin BDIR)]"\r
@echo "CROSS_COMPILE: $(CROSS_COMPILE) [$(origin CROSS_COMPILE)]"\r
- @echo "cmd_cmd_goals: $(cmd_cmd_goals)"\r
+ @echo "CWD: ${CWD}"\r
\r
\r
$(dir_cmd_goals) :: show_build FORCE \r
- @echo ==========[ $@ ]===========\r
+ @echo ""\r
+ @echo ==========[ ${abspath $@} ]===========\r
@if [ ! -d $@ ]; then echo "No such directory: \"$@\" quitting"; exit 1; fi\r
+@[ -d $@/$(objdir) ] || mkdir -p $@/$(objdir)\r
@chmod 777 $@/$(objdir)\r
\r
\r
\r
+//lint -emacro(904,VALIDATE_RV,VALIDATE_NO_RV) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
+\r
+// Exception made as a result of that NVM_DATASET_SELECTION_BITS can be zero\r
+//lint -emacro(835, MIN_BLOCKNR) // 835 PC-lint: A zero has been given as right argument to operator '<<' or '>>'\r
+//lint -emacro(835, GET_BLOCK_INDEX_FROM_BLOCK_NUMBER) // 835 PC-lint: A zero has been given as right argument to operator '<<' or '>>'\r
+//lint -emacro(835, GET_DATASET_FROM_BLOCK_NUMBER) // 835 PC-lint: A zero has been given as right argument to operator '<<' or '>>'\r
+//lint -emacro(778, GET_DATASET_FROM_BLOCK_NUMBER) // 778 PC-lint: Constant expression evaluates to 0 in operation '-'\r
+//lint -emacro(845, GET_DATASET_FROM_BLOCK_NUMBER) // 845 PC-lint: The right argument to operator '&' is certain to be 0\r
+//lint -emacro(835, BLOCK_INDEX_AND_SET_TO_BLOCKNR) // 835 PC-lint: A zero has been given as right argument to operator '<<' or '>>'\r
\r
#include <string.h>\r
#include "Fee.h"\r
\r
#define DET_REPORTERROR(_module,_instance,_api,_err) Det_ReportError(_module,_instance,_api,_err)\r
\r
+#define MIN_BLOCKNR ((uint16)((uint16)1 << NVM_DATASET_SELECTION_BITS))\r
+\r
#else\r
#define VALIDATE(_exp,_api,_err )\r
#define VALIDATE_RV(_exp,_api,_err,_rv )\r
/*\r
* Block numbering recalculation macros
*/\r
-#define GET_BLOCK_INDEX_FROM_BLOCK_NUMBER(_blocknr) (((_blocknr) >> NVM_DATASET_SELECTION_BITS) - 1)\r
-#define GET_DATASET_FROM_BLOCK_NUMBER(_blocknr) ((_blocknr) & ((1 << NVM_DATASET_SELECTION_BITS) - 1))\r
-#define BLOCK_INDEX_AND_SET_TO_BLOCKNR(_blocknr, _set) ((_blocknr + 1) << NVM_DATASET_SELECTION_BITS | set)\r
+#define GET_BLOCK_INDEX_FROM_BLOCK_NUMBER(_blocknr) (((_blocknr) >> NVM_DATASET_SELECTION_BITS) - 1u)\r
+#define GET_DATASET_FROM_BLOCK_NUMBER(_blocknr) ((_blocknr) & ((uint16)((uint16)1u << NVM_DATASET_SELECTION_BITS) - 1u))\r
+#define BLOCK_INDEX_AND_SET_TO_BLOCKNR(_blocknr, _set) ((uint16)((_blocknr + 1u) << NVM_DATASET_SELECTION_BITS) | _set)\r
\r
/*\r
* Page alignment macros
*/\r
-#define PAGE_ALIGN(_size) ((((_size) + FEE_VIRTUAL_PAGE_SIZE - 1) / FEE_VIRTUAL_PAGE_SIZE) * FEE_VIRTUAL_PAGE_SIZE)\r
+#define PAGE_ALIGN(_size) ((uint16)((((_size) + FEE_VIRTUAL_PAGE_SIZE - 1) / FEE_VIRTUAL_PAGE_SIZE) * FEE_VIRTUAL_PAGE_SIZE))\r
\r
/*\r
* Bank properties list
\r
#define BLOCK_CTRL_PAGE_SIZE PAGE_ALIGN(sizeof(FlsBlockControlType))\r
\r
-#define BLOCK_CTRL_DATA_POS_OFFSET 0\r
+#define BLOCK_CTRL_DATA_POS_OFFSET (/*lint --e(835)*/0) // Inform PC-Lint that I want the constant to be zero\r
#define BLOCK_CTRL_MAGIC_POS_OFFSET BLOCK_CTRL_DATA_PAGE_SIZE\r
\r
typedef union {\r
FEE_READ_REQUESTED,\r
FEE_READ,\r
\r
- FEE_CANCEL_REQUESTED,\r
- FEE_CANCEL_PENDING,\r
-\r
FEE_INVALIDATE_REQUESTED,\r
FEE_INVALIDATE_MARK_BANK_OLD,\r
FEE_WRITE_INVALIDATE_HEADER_REQUESTED,\r
FEE_GARBAGE_COLLECT_DATA_WRITE,\r
FEE_GARBAGE_COLLECT_MAGIC_WRITE_REQUESTED,\r
FEE_GARBAGE_COLLECT_MAGIC_WRITE,\r
- FEE_GARBAGE_COLLECT_ERASE,\r
+ FEE_GARBAGE_COLLECT_ERASE\r
} CurrentJobStateType;\r
\r
typedef struct {\r
AdminFlsBlockType *AdminFlsBlockPtr;\r
union {\r
struct {\r
- uint16 NrOfBanks;\r
- uint16 BankNumber;\r
+ uint8 NrOfBanks;\r
+ uint8 BankNumber;\r
Fls_AddressType BlockAdminAddress;\r
}Startup;\r
struct {\r
Fls_AddressType WriteDataAddress;\r
}Invalidate;\r
struct {\r
- uint16 NrOfBanks;\r
- uint16 BankNumber;\r
+ uint8 BankNumber;\r
Fls_AddressType WriteAdminAddress;\r
Fls_AddressType WriteDataAddress;\r
- sint16 BytesLeft;\r
+ uint16 BytesLeft;\r
uint16 DataOffset;\r
}GarbageCollect;\r
} Op;\r
static CurrentJobType CurrentJob = {\r
.State = FEE_IDLE,\r
.InStateCounter = 0\r
+ //lint -e{785} PC-Lint (785) - rest of structure members is initialized when used.\r
};\r
\r
/*\r
***************************************/\r
\r
#if (FEE_POLLING_MODE == STD_ON)\r
-static void SetFlsJobBusy()\r
-{\r
- /* Nothing needed here */\r
-}\r
+#define SetFlsJobBusy() /* Nothing needs to be done here */\r
\r
static boolean CheckFlsJobFinnished(void)\r
{\r
if (Fls_GetStatus() == MEMIF_IDLE) {\r
CurrentJob.State = FEE_STARTUP_READ_BANK1_STATUS;\r
/* Read bank status of bank 1 */\r
- if (Fls_Read(BankProp[0].End - BANK_CTRL_PAGE_SIZE, (uint8*)&AdminFls.BankStatus[0], sizeof(FlsBankStatusType)) == E_OK) {\r
+ // PC-Lint exception (MISRA 11.4) - Pointer to pointer conversion ok by AUTOSAR\r
+ if (Fls_Read(BankProp[0].End - BANK_CTRL_PAGE_SIZE, /*lint -e(926)*/(uint8*)&AdminFls.BankStatus[0], sizeof(FlsBankStatusType)) == E_OK) {\r
SetFlsJobBusy();\r
} else {\r
AbortStartup(Fls_GetJobResult());\r
if (Fls_GetStatus() == MEMIF_IDLE) {\r
/* Read bank status of bank 2 */\r
CurrentJob.State = FEE_STARTUP_READ_BANK2_STATUS;\r
- if (Fls_Read(BankProp[1].End - BANK_CTRL_PAGE_SIZE, (uint8*)&AdminFls.BankStatus[1], sizeof(FlsBankStatusType)) == E_OK) {\r
+ // PC-Lint exception (MISRA 11.4) - Pointer to pointer conversion ok by AUTOSAR\r
+ if (Fls_Read(BankProp[1].End - BANK_CTRL_PAGE_SIZE, /*lint -e(926)*/(uint8*)&AdminFls.BankStatus[1], sizeof(FlsBankStatusType)) == E_OK) {\r
SetFlsJobBusy();\r
} else {\r
AbortStartup(Fls_GetJobResult());\r
if (jobResult != MEMIF_JOB_OK) {\r
AbortStartup(jobResult);\r
} else {\r
- CurrentJob.Op.Startup.BlockAdminAddress = BankProp[CurrentJob.Op.Startup.BankNumber].End - BLOCK_CTRL_PAGE_SIZE - BANK_CTRL_PAGE_SIZE;\r
+ CurrentJob.Op.Startup.BlockAdminAddress = BankProp[CurrentJob.Op.Startup.BankNumber].End - (BLOCK_CTRL_PAGE_SIZE + BANK_CTRL_PAGE_SIZE);\r
CurrentJob.State = FEE_STARTUP_READ_BLOCK_ADMIN_REQUESTED;\r
}\r
}\r
VALIDATE(CurrentJob.Op.Startup.NrOfBanks != 0, FEE_STARTUP_ID, FEE_FLASH_CORRUPT);\r
CurrentJob.Op.Startup.NrOfBanks--;\r
CurrentJob.Op.Startup.BankNumber = (CurrentJob.Op.Startup.BankNumber + 1) % 2;\r
- CurrentJob.Op.Startup.BlockAdminAddress = BankProp[CurrentJob.Op.Startup.BankNumber].End - BLOCK_CTRL_PAGE_SIZE - BANK_CTRL_PAGE_SIZE;\r
+ CurrentJob.Op.Startup.BlockAdminAddress = BankProp[CurrentJob.Op.Startup.BankNumber].End - (BLOCK_CTRL_PAGE_SIZE + BANK_CTRL_PAGE_SIZE);\r
} else { /* Block not empty */\r
- if ((memcmp(RWBuffer.BlockCtrl.MagicPage.Byte, BlockMagicMaster, BLOCK_MAGIC_LEN) == 0) &&\r
+ if ((memcmp(RWBuffer.BlockCtrl.MagicPage.Magic, BlockMagicMaster, BLOCK_MAGIC_LEN) == 0) &&\r
((RWBuffer.BlockCtrl.DataPage.Data.Status == BLOCK_STATUS_INUSE) || (RWBuffer.BlockCtrl.DataPage.Data.Status == BLOCK_STATUS_INVALIDATED))) {\r
/* This is a valid admin block */\r
uint16 blockIndex;\r
/* If current bank is marked as old we need to switch to a new bank */\r
if (AdminFls.BankStatus[AdminFls.BankNumber] == BANK_STATUS_OLD) {\r
AdminFls.BankNumber = (AdminFls.BankNumber + 1) % 2;\r
- AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - BLOCK_CTRL_PAGE_SIZE - BANK_CTRL_PAGE_SIZE;\r
+ AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - (BLOCK_CTRL_PAGE_SIZE + BANK_CTRL_PAGE_SIZE);\r
AdminFls.NewBlockDataAddress = BankProp[AdminFls.BankNumber].Start;\r
}\r
/* We are done! */\r
AdminFls.BankStatus[AdminFls.BankNumber] = BANK_STATUS_OLD;\r
\r
/* Change of bank */\r
- AdminFls.BankNumber ^= 0x1;\r
+ AdminFls.BankNumber ^= 0x1u;\r
AdminFls.NewBlockDataAddress = BankProp[AdminFls.BankNumber].Start;\r
- AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - BLOCK_CTRL_PAGE_SIZE - BANK_CTRL_PAGE_SIZE;\r
+ AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - (BLOCK_CTRL_PAGE_SIZE + BANK_CTRL_PAGE_SIZE);\r
\r
CurrentJob.Op.Write.WriteDataAddress = AdminFls.NewBlockDataAddress;\r
CurrentJob.Op.Write.WriteAdminAddress = AdminFls.NewBlockAdminAddress;\r
if (Fls_GetStatus() == MEMIF_IDLE) {\r
CurrentJob.State = FEE_WRITE_MAGIC;\r
memset(RWBuffer.BlockCtrl.MagicPage.Byte, 0xff, BLOCK_CTRL_MAGIC_PAGE_SIZE);\r
- memcpy(RWBuffer.BlockCtrl.MagicPage.Byte, BlockMagicMaster, BLOCK_MAGIC_LEN);\r
+ memcpy(RWBuffer.BlockCtrl.MagicPage.Magic, BlockMagicMaster, BLOCK_MAGIC_LEN);\r
if (Fls_Write(CurrentJob.Op.Write.WriteAdminAddress + BLOCK_CTRL_MAGIC_POS_OFFSET, RWBuffer.BlockCtrl.MagicPage.Byte, BLOCK_CTRL_MAGIC_PAGE_SIZE) == E_OK) {\r
SetFlsJobBusy();\r
} else {\r
*/\r
static void GarbageCollectStartJob(void)\r
{\r
- uint16 blockIndex,set;\r
+ uint16 blockIndex;\r
+ uint16 set;\r
boolean found = FALSE;\r
- uint8 sourceBank, destBank;\r
+ uint8 sourceBank;\r
\r
if (Fls_GetStatus() == MEMIF_IDLE) {\r
- if (AdminFls.BankStatus[0] == BANK_STATUS_OLD) {\r
- sourceBank = 0;\r
- destBank = 1;\r
- } else if (AdminFls.BankStatus[1] == BANK_STATUS_OLD) {\r
- sourceBank = 1;\r
- destBank = 0;\r
- } else {\r
- CurrentJob.State = FEE_IDLE;\r
- return;\r
- }\r
+ if ((AdminFls.BankStatus[0] == BANK_STATUS_OLD) || (AdminFls.BankStatus[1] == BANK_STATUS_OLD)) {\r
+ if (AdminFls.BankStatus[0] == BANK_STATUS_OLD) {\r
+ sourceBank = 0;\r
+ } else {\r
+ sourceBank = 1;\r
+ }\r
\r
- for (blockIndex = 0; (blockIndex < FEE_NUM_OF_BLOCKS) && !found; blockIndex++) {\r
- for (set = 0; (set < FEE_MAX_NUM_SETS) && !found; set++) {\r
- if (AdminFls.BlockDescrTbl[blockIndex][set].Status != BLOCK_STATUS_EMPTY) {\r
- if ((AdminFls.BlockDescrTbl[blockIndex][set].BlockAdminAddress >= BankProp[sourceBank].Start) && (AdminFls.BlockDescrTbl[blockIndex][set].BlockAdminAddress < (BankProp[sourceBank].End))) {\r
- CurrentJob.AdminFlsBlockPtr = &AdminFls.BlockDescrTbl[blockIndex][set];\r
- CurrentJob.BlockConfigPtr = &Fee_Config.BlockConfig[blockIndex];\r
- CurrentJob.BlockNumber = BLOCK_INDEX_AND_SET_TO_BLOCKNR(blockIndex, set);\r
- if (AdminFls.BlockDescrTbl[blockIndex][set].Status == BLOCK_STATUS_INVALIDATED) {\r
- CurrentJob.Length = 0;\r
- } else {\r
- CurrentJob.Length = PAGE_ALIGN(CurrentJob.BlockConfigPtr->BlockSize);\r
+ for (blockIndex = 0; (blockIndex < FEE_NUM_OF_BLOCKS) && (!found); blockIndex++) {\r
+ for (set = 0; (set < FEE_MAX_NUM_SETS) && (!found); set++) {\r
+ if (AdminFls.BlockDescrTbl[blockIndex][set].Status != BLOCK_STATUS_EMPTY) {\r
+ if ((AdminFls.BlockDescrTbl[blockIndex][set].BlockAdminAddress >= BankProp[sourceBank].Start) && (AdminFls.BlockDescrTbl[blockIndex][set].BlockAdminAddress < (BankProp[sourceBank].End))) {\r
+ CurrentJob.AdminFlsBlockPtr = &AdminFls.BlockDescrTbl[blockIndex][set];\r
+ CurrentJob.BlockConfigPtr = &Fee_Config.BlockConfig[blockIndex];\r
+ CurrentJob.BlockNumber = BLOCK_INDEX_AND_SET_TO_BLOCKNR(blockIndex, set);\r
+ if (AdminFls.BlockDescrTbl[blockIndex][set].Status == BLOCK_STATUS_INVALIDATED) {\r
+ CurrentJob.Length = 0;\r
+ } else {\r
+ CurrentJob.Length = PAGE_ALIGN(CurrentJob.BlockConfigPtr->BlockSize);\r
+ }\r
+\r
+ found = TRUE;\r
}\r
-\r
- found = TRUE;\r
}\r
}\r
}\r
- }\r
\r
- if (found) {\r
- CurrentJob.Op.GarbageCollect.WriteDataAddress = AdminFls.NewBlockDataAddress;\r
- CurrentJob.Op.GarbageCollect.WriteAdminAddress = AdminFls.NewBlockAdminAddress;\r
+ if (found) {\r
+ CurrentJob.Op.GarbageCollect.WriteDataAddress = AdminFls.NewBlockDataAddress;\r
+ CurrentJob.Op.GarbageCollect.WriteAdminAddress = AdminFls.NewBlockAdminAddress;\r
\r
- CurrentJob.State = FEE_GARBAGE_COLLECT_HEADER_WRITE;\r
- BlockHeaderDataWrite();\r
- } else {\r
- if (Fls_Erase(BankProp[sourceBank].Start, BankProp[sourceBank].End - BankProp[sourceBank].Start) == E_OK) {\r
- SetFlsJobBusy();\r
+ CurrentJob.State = FEE_GARBAGE_COLLECT_HEADER_WRITE;\r
+ BlockHeaderDataWrite();\r
} else {\r
- AbortJob(Fls_GetJobResult());\r
+ if (Fls_Erase(BankProp[sourceBank].Start, BankProp[sourceBank].End - BankProp[sourceBank].Start) == E_OK) {\r
+ SetFlsJobBusy();\r
+ } else {\r
+ AbortJob(Fls_GetJobResult());\r
+ }\r
+ CurrentJob.Op.GarbageCollect.BankNumber = sourceBank;\r
+ CurrentJob.State = FEE_GARBAGE_COLLECT_ERASE;\r
}\r
- CurrentJob.Op.GarbageCollect.BankNumber = sourceBank;\r
- CurrentJob.State = FEE_GARBAGE_COLLECT_ERASE;\r
+ } else {\r
+ CurrentJob.State = FEE_IDLE;\r
}\r
}\r
}\r
{\r
if (CheckFlsJobFinnished()) {\r
if (Fls_GetJobResult() == MEMIF_JOB_OK) {\r
- CurrentJob.Op.GarbageCollect.DataOffset += RWBUFFER_SIZE;\r
- CurrentJob.Op.GarbageCollect.BytesLeft -= RWBUFFER_SIZE;\r
- if (CurrentJob.Op.GarbageCollect.BytesLeft <= 0) {\r
+ if (CurrentJob.Op.GarbageCollect.BytesLeft <= RWBUFFER_SIZE) {\r
/* Yes, we are finished */\r
CurrentJob.State = FEE_GARBAGE_COLLECT_MAGIC_WRITE_REQUESTED;\r
} else {\r
/* More data to move */\r
+ CurrentJob.Op.GarbageCollect.DataOffset += RWBUFFER_SIZE;\r
+ CurrentJob.Op.GarbageCollect.BytesLeft -= RWBUFFER_SIZE;\r
CurrentJob.State = FEE_GARBAGE_COLLECT_DATA_READ_REQUESTED;\r
}\r
} else {\r
if (Fls_GetStatus() == MEMIF_IDLE) {\r
CurrentJob.State = FEE_GARBAGE_COLLECT_MAGIC_WRITE;\r
memset(RWBuffer.BlockCtrl.MagicPage.Byte, 0xff, BLOCK_CTRL_MAGIC_PAGE_SIZE);\r
- memcpy(RWBuffer.BlockCtrl.MagicPage.Byte, BlockMagicMaster, BLOCK_MAGIC_LEN);\r
+ memcpy(RWBuffer.BlockCtrl.MagicPage.Magic, BlockMagicMaster, BLOCK_MAGIC_LEN);\r
if (Fls_Write(CurrentJob.Op.GarbageCollect.WriteAdminAddress + BLOCK_CTRL_MAGIC_POS_OFFSET, RWBuffer.BlockCtrl.MagicPage.Byte, BLOCK_CTRL_MAGIC_PAGE_SIZE) == E_OK) {\r
SetFlsJobBusy();\r
} else {\r
RWBuffer.BlockCtrl.DataPage.Data.BlockNo = CurrentJob.BlockNumber;\r
RWBuffer.BlockCtrl.DataPage.Data.BlockDataAddress = AdminFls.NewBlockDataAddress;\r
RWBuffer.BlockCtrl.DataPage.Data.BlockDataLength = 0;\r
- memcpy(RWBuffer.BlockCtrl.MagicPage.Byte, BlockMagicMaster, BLOCK_MAGIC_LEN);\r
+ memset(RWBuffer.BlockCtrl.MagicPage.Byte, 0xff, BLOCK_CTRL_MAGIC_PAGE_SIZE);\r
+ memcpy(RWBuffer.BlockCtrl.MagicPage.Magic, BlockMagicMaster, BLOCK_MAGIC_LEN);\r
\r
if (Fls_Write(CurrentJob.Op.Invalidate.WriteAdminAddress + BLOCK_CTRL_DATA_POS_OFFSET, RWBuffer.Byte, BLOCK_CTRL_PAGE_SIZE) == E_OK) {\r
SetFlsJobBusy();\r
AdminFls.BankStatus[AdminFls.BankNumber] = BANK_STATUS_OLD;\r
\r
// Change of bank\r
- AdminFls.BankNumber ^= 0x1;\r
+ AdminFls.BankNumber ^= 0x1u;\r
AdminFls.NewBlockDataAddress = BankProp[AdminFls.BankNumber].Start;\r
- AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - BLOCK_CTRL_PAGE_SIZE - BANK_CTRL_PAGE_SIZE;\r
+ AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - (BLOCK_CTRL_PAGE_SIZE + BANK_CTRL_PAGE_SIZE);\r
\r
CurrentJob.Op.Invalidate.WriteDataAddress = AdminFls.NewBlockDataAddress;\r
CurrentJob.Op.Invalidate.WriteAdminAddress = AdminFls.NewBlockAdminAddress;\r
\r
AdminFls.BankNumber = 0;\r
AdminFls.NewBlockDataAddress = BankProp[AdminFls.BankNumber].Start;\r
- AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - BLOCK_CTRL_PAGE_SIZE - BANK_CTRL_PAGE_SIZE;\r
+ AdminFls.NewBlockAdminAddress = BankProp[AdminFls.BankNumber].End - (BLOCK_CTRL_PAGE_SIZE + BANK_CTRL_PAGE_SIZE);\r
\r
for (i = 0; i < NUM_OF_BANKS; i++) {\r
AdminFls.BankStatus[i] = BANK_STATUS_NEW;\r
#if ( FLS_SET_MODE_API == STD_ON )\r
Fls_SetMode(mode);\r
#else\r
+ //lint --e{715} PC-Lint (715) - variable "mode" not used in this case\r
DET_REPORTERROR(MODULE_ID_FEE, 0, FEE_SET_MODE_ID, FEE_E_NOT_SUPPORTED);\r
#endif\r
}\r
VALIDATE_RV(ModuleStatus != MEMIF_UNINIT, FEE_READ_ID, FEE_E_UNINIT, E_NOT_OK);\r
VALIDATE_RV(ModuleStatus == MEMIF_IDLE, FEE_READ_ID, FEE_E_BUSY, E_NOT_OK);\r
\r
- VALIDATE_RV(blockNumber >= (1 << NVM_DATASET_SELECTION_BITS), FEE_READ_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
+ VALIDATE_RV(blockNumber >= MIN_BLOCKNR, FEE_READ_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
blockIndex = GET_BLOCK_INDEX_FROM_BLOCK_NUMBER(blockNumber);\r
VALIDATE_RV(blockIndex < FEE_NUM_OF_BLOCKS, FEE_READ_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
VALIDATE_RV(dataBufferPtr != NULL, FEE_READ_ID, FEE_E_INVALID_DATA_PTR, E_NOT_OK);\r
VALIDATE_RV(ModuleStatus != MEMIF_UNINIT, FEE_WRITE_ID, FEE_E_UNINIT, E_NOT_OK);\r
VALIDATE_RV(ModuleStatus == MEMIF_IDLE, FEE_WRITE_ID, FEE_E_BUSY, E_NOT_OK);\r
\r
- VALIDATE_RV(blockNumber >= (1 << NVM_DATASET_SELECTION_BITS), FEE_WRITE_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
+ VALIDATE_RV(blockNumber >= MIN_BLOCKNR, FEE_WRITE_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
blockIndex = GET_BLOCK_INDEX_FROM_BLOCK_NUMBER(blockNumber);\r
VALIDATE_RV(blockIndex < FEE_NUM_OF_BLOCKS, FEE_WRITE_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
VALIDATE_RV(dataBufferPtr != NULL, FEE_WRITE_ID, FEE_E_INVALID_DATA_PTR, E_NOT_OK);\r
VALIDATE_RV(ModuleStatus != MEMIF_UNINIT, FEE_INVALIDATE_BLOCK_ID, FEE_E_UNINIT, E_NOT_OK);\r
VALIDATE_RV(ModuleStatus == MEMIF_IDLE, FEE_INVALIDATE_BLOCK_ID, FEE_E_BUSY, E_NOT_OK);\r
\r
- VALIDATE_RV(blockNumber >= (1 << NVM_DATASET_SELECTION_BITS), FEE_INVALIDATE_BLOCK_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
+ VALIDATE_RV(blockNumber >= MIN_BLOCKNR, FEE_INVALIDATE_BLOCK_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
blockIndex = GET_BLOCK_INDEX_FROM_BLOCK_NUMBER(blockNumber);\r
VALIDATE_RV(blockIndex < FEE_NUM_OF_BLOCKS, FEE_INVALIDATE_BLOCK_ID, FEE_E_INVALID_BLOCK_NO, E_NOT_OK);\r
\r
*/\r
Std_ReturnType Fee_EraseImmediateBlock(uint16 blockNumber)\r
{\r
+ //lint --e{715} PC-Lint (715) - function is not implemented and thus variable "blockNumber" is not used yet\r
+\r
DET_REPORTERROR(MODULE_ID_FEE, 0, FEE_ERASE_IMMEDIATE_ID, FEE_E_NOT_IMPLEMENTED_YET);\r
\r
+\r
return E_NOT_OK;\r
}\r
\r
* and shall not be used.
*/\r
\r
+//lint -esym(522,CalcCrc) // 522 PC-Lint exception for empty functions\r
+//lint -emacro(904,VALIDATE_RV,VALIDATE_NO_RV) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
+\r
+// Exception made as a result of that NVM_DATASET_SELECTION_BITS can be zero\r
+//lint -emacro(835, BLOCK_BASE_AND_SET_TO_BLOCKNR) // 835 PC-lint: A zero has been given as right argument to operator '<<' or '>>'\r
+\r
+\r
\r
#include "NvM.h"\r
+#include "NvM_Cbk.h"\r
#include "Rte.h" // ???\r
#if defined(USE_DEM)\r
#include "Dem.h"\r
Det_ReportError(MODULE_ID_NVM, 0, _api, _err); \\r
}\r
\r
+/*\r
#define VALIDATE_RV(_exp,_api,_err,_rv ) \\r
if( !(_exp) ) { \\r
Det_ReportError(MODULE_ID_NVM, 0, _api, _err); \\r
return _rv; \\r
}\r
+*/\r
\r
#define VALIDATE_NO_RV(_exp,_api,_err ) \\r
- if( !(_exp) ) { \\r
+ if( !(_exp) ) { \\r
Det_ReportError(MODULE_ID_NVM, 0, _api, _err); \\r
return; \\r
}\r
#define DET_REPORTERROR(_module,_instance,_api,_err)\r
#endif\r
\r
+#define BLOCK_BASE_AND_SET_TO_BLOCKNR(_blockbase, _set) ((uint16)(_blockbase << NVM_DATASET_SELECTION_BITS) | _set)\r
+\r
+\r
// State variable\r
typedef enum {\r
NVM_UNINITIALIZED = 0,\r
NVM_WRITE_ALL_PENDING\r
} NvmStateType;\r
\r
-typedef enum {\r
- MEMIF_STATE_IDLE,\r
- MEMIF_STATE_PENDING\r
-} MemIfStateType;\r
-\r
typedef enum {\r
BLOCK_STATE_IDLE,\r
BLOCK_STATE_RECALC_CRC,\r
BLOCK_STATE_POSTCALC_CRC_DONE,\r
\r
BLOCK_STATE_LOAD_FROM_NV,\r
- BLOCK_STATE_LOAD_FROM_NV_DONE,\r
- BLOCK_STATE_LOAD_FROM_NV_REDUNDANT,\r
- BLOCK_STATE_LOAD_FROM_ROM,\r
+// BLOCK_STATE_LOAD_FROM_NV_DONE,\r
+// BLOCK_STATE_LOAD_FROM_NV_REDUNDANT,\r
+// BLOCK_STATE_LOAD_FROM_ROM,\r
\r
- BLOCK_STATE_WRITE_TO_NV,\r
- BLOCK_STATE_WRITE_TO_NV_DONE,\r
+ BLOCK_STATE_WRITE_TO_NV\r
+// BLOCK_STATE_WRITE_TO_NV_DONE\r
} BlockStateType;\r
\r
\r
SetMemifJobBusy();\r
MemIfJobAdmin.BlockAdmin = adminBlock;\r
MemIfJobAdmin.BlockDescriptor = blockDescriptor;\r
- returnCode = MemIf_Read(blockDescriptor->NvramDeviceId, (blockDescriptor->NvBlockBaseNumber << NVM_DATASET_SELECTION_BITS) | setNumber, blockOffset, destAddress, blockDescriptor->NvBlockLength);\r
+ returnCode = MemIf_Read(blockDescriptor->NvramDeviceId, BLOCK_BASE_AND_SET_TO_BLOCKNR(blockDescriptor->NvBlockBaseNumber, setNumber), blockOffset, destAddress, blockDescriptor->NvBlockLength);\r
if (returnCode != E_OK) {\r
AbortMemIfJob(MEMIF_JOB_FAILED);\r
}\r
AdminMultiReq.NextBlockIndex = 0;\r
\r
for (i = 0; i < NVM_NUM_OF_NVRAM_BLOCKS; i++) {\r
- if (BlockDescriptorList->SelectBlockForReadall\r
+ if ((BlockDescriptorList->SelectBlockForReadall)\r
#if (NVM_SET_RAM_BLOCK_STATUS_API == STD_ON) /** @req NVM345 */\r
- && (!AdminBlockTable->BlockValid // TODO: Check if this is to be done like this\r
- || !AdminBlockTable->BlockChanged) // TODO: Check if this is to be done like this\r
+ && ((!AdminBlockTable->BlockValid) // TODO: Check if this is to be done like this\r
+ || (!AdminBlockTable->BlockChanged)) // TODO: Check if this is to be done like this\r
#endif\r
) {\r
VALIDATE_NO_RV(BlockDescriptorList->RamBlockDataAddress != NULL, NVM_READ_ALL_ID, NVM_E_WRONG_CONFIG);\r
}\r
\r
if (MemIfJobAdmin.BlockDescriptor->SingleBlockCallback != NULL) {\r
- MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus); /** @req NVM281 */\r
+ (void)MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus); /** @req NVM281 */\r
}\r
}\r
} else {\r
}\r
\r
if (MemIfJobAdmin.BlockDescriptor->SingleBlockCallback != NULL) {\r
- MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus); /** @req NVM281 */\r
+ (void)MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus); /** @req NVM281 */\r
}\r
}\r
nvmState = NVM_READ_ALL_PROCESSING;\r
SetMemifJobBusy();\r
MemIfJobAdmin.BlockAdmin = adminBlock;\r
MemIfJobAdmin.BlockDescriptor = blockDescriptor;\r
- returnCode = MemIf_Write(blockDescriptor->NvramDeviceId, (blockDescriptor->NvBlockBaseNumber << NVM_DATASET_SELECTION_BITS) | setNumber, sourceAddress);\r
+ returnCode = MemIf_Write(blockDescriptor->NvramDeviceId, BLOCK_BASE_AND_SET_TO_BLOCKNR(blockDescriptor->NvBlockBaseNumber, setNumber), sourceAddress);\r
if (returnCode != E_OK) {\r
AbortMemIfJob(MEMIF_JOB_FAILED);\r
}\r
for (i = 0; i < NVM_NUM_OF_NVRAM_BLOCKS; i++) {\r
if ((BlockDescriptorList->RamBlockDataAddress != NULL)\r
#if (NVM_SET_RAM_BLOCK_STATUS_API == STD_ON) /** @req NVM344 */\r
- && AdminBlockTable->BlockValid /** @req NVM682 */\r
- && AdminBlockTable->BlockChanged /** @req NVM682 */\r
+ && (AdminBlockTable->BlockValid) /** @req NVM682 */\r
+ && (AdminBlockTable->BlockChanged) /** @req NVM682 */\r
#endif\r
- && !AdminBlockTable->BlockWriteProtected){ /** @req NVM432 *//** @req NVM433 */\r
+ && (!AdminBlockTable->BlockWriteProtected)){ /** @req NVM432 *//** @req NVM433 */\r
if (BlockDescriptorList->BlockUseCrc) {\r
AdminBlockTable->BlockState = BLOCK_STATE_RECALC_CRC; /** @req NVM253 */\r
} else {\r
MemIfJobAdmin.BlockAdmin->ErrorStatus = NVM_REQ_OK;\r
\r
if (MemIfJobAdmin.BlockDescriptor->SingleBlockCallback != NULL) {\r
- MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus);\r
+ (void)MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus);\r
}\r
} else {\r
MemIfJobAdmin.BlockAdmin->NumberOfWriteFailed++;\r
#endif\r
\r
if (MemIfJobAdmin.BlockDescriptor->SingleBlockCallback != NULL) {\r
- MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus);\r
+ (void)MemIfJobAdmin.BlockDescriptor->SingleBlockCallback(NVM_SERVICE_ID, MemIfJobAdmin.BlockAdmin->ErrorStatus);\r
}\r
}\r
}\r
--- /dev/null
+\r
+\r
+HOST := $(shell uname)\r
+export prefix\r
+\r
+# If we are using codesourcery and cygwin..\r
+ifneq ($(findstring CYGWIN,$(UNAME)),)\r
+cygpath:= $(shell cygpath -m $(shell which cygpath))\r
+export CYGPATH=$(cygpath)\r
+endif\r
+\r
+# CW and paths...\r
+# Bin: PowerPC_EABI_Tools/Command_Line_Tools/mwXXXXXX\r
+# libs: PowerPC_EABI_Support/Runtime/Lib/Runtime.XXXX\r
+# PowerPC_EABI_Support/MSL/MSL_C/PPC_EABI/Lib\r
+\r
+CW_COMPILE=/c/devtools/cw_55xx\r
+CW_BIN=$(CW_COMPILE)/PowerPC_EABI_Tools/Command_Line_Tools\r
+CW_LIB=$(CW_COMPILE)/PowerPC_EABI_Support/Runtime/Lib\r
+\r
+\r
+# ---------------------------------------------------------------------------\r
+# Compiler\r
+# CCFLAGS - compile flags\r
+\r
+CC = $(CW_BIN)/mwcceppc.exe\r
+#cflags-$(CFG_OPT_RELEASE) += -O3\r
+#cflags-$(CFG_OPT_DEBUG) += make -O0\r
+\r
+#cflags-y += -c \r
+cflags-y += -dialect=c99\r
+cflags-y += -gccext=on\r
+cflags-y += -gdwarf-2\r
+cflags-y += -gccinc\r
+\r
+# Generate dependencies\r
+cflags-y += -gccdepends -MMD\r
+\r
+# Warnings\r
+cflags-y += -W=most\r
+\r
+# Conformance\r
+cflags-y += -abi=eabi\r
+cflags-$(CFG_VLE) += -ppc_asm_to_vle # Convert ppc to vle ppc\r
+cflags-y += -abi=eabi\r
+cflags-y += -proc=5565\r
+cflags-y += -fp=soft\r
+cflags-y += -use_isel=on\r
+cflags-y += -sdata=0xFFFF -sdata2=16\r
+\r
+#cflags-y += -fno-strict-aliasing\r
+#cflags-y += -fno-builtin\r
+\r
+# Get machine cflags\r
+#cflags-y += $(cflags-$(ARCH))\r
+\r
+CFLAGS = $(cflags-y) $(cflags-yy)\r
+\r
+CCOUT = -o $@ \r
+\r
+# ---------------------------------------------------------------------------\r
+# Preprocessor\r
+\r
+CPP = $(CC) -E\r
+\r
+CPP_ASM_FLAGS += -ppopt noline -dialect c\r
+\r
+comma = ,\r
+empty = \r
+space = $(empty) $(empty)\r
+\r
+\r
+\r
+cw_lib_path += -L$(CW_COMPILE)/PowerPC_EABI_Support/Runtime/Lib\r
+cw_lib_path += -L$(CW_COMPILE)/PowerPC_EABI_Support/MSL/MSL_C/PPC_EABI/Lib\r
+cc_inc_path += $(CW_COMPILE)/PowerPC_EABI_Support/MSL/MSL_C/MSL_Common/Include\r
+cc_inc_path += $(CW_COMPILE)/PowerPC_EABI_Support/MSL/MSL_C/PPC_EABI/Include\r
+inc-y += $(cc_inc_path)\r
+libpath-y += $(cw_lib_path)\r
+\r
+\r
+# libnames .bare - No operating system\r
+# .E - e500, e200\r
+# UC - Noooooo\r
+# S - software float\r
+# nothing really matches.......\r
+lib-$(CFG_VLE) += -lRuntime.PPCEABI.VS.a # is this VLE?\r
+lib-$(CFG_VLE) += -lMSL_C.PPCEABI.bare.SZ.VS.a\r
+ifneq ($(CFG_VLE),y)\r
+lib-y += -lRuntime.PPCEABI.S.a \r
+lib-y += -lMSL_C.PPCEABI.bare.SZ.S.a\r
+endif\r
+\r
+C_TO_ASM = -P\r
+\r
+# ---------------------------------------------------------------------------\r
+# Linker\r
+#\r
+# LDFLAGS - linker flags\r
+# LDOUT - How to Generate linker output file\r
+# LDMAPFILE - How to generate mapfile \r
+# ldcmdfile-y - link cmd file\r
+# libpath-y - lib paths\r
+# libitem-y - the libs with path\r
+# lib-y - the libs, without path\r
+\r
+\r
+LD = $(CW_BIN)/mwldeppc.exe\r
+\r
+LDSCRIPT = -lcf\r
+\r
+# To make "rom" images (make LOAD() work)\r
+ldflags-y += -romaddr 0x0 \r
+ldflags-y += -rambuffer 0x0\r
+#ldflags-y += -nodefaults\r
+ldflags-y += -gdwarf-2\r
+ldflags-y += -m _start\r
+TE = elf\r
+ldflags-y += -map $(subst .$(TE),.map, $@)\r
+\r
+LDFLAGS += $(ldflags-y) \r
+LDOUT = -o $@\r
+\r
+LD_FILE = -lcf\r
+\r
+libitem-y += $(libitem-yy)\r
+\r
+# ---------------------------------------------------------------------------\r
+# Assembler\r
+#\r
+# ASFLAGS - assembler flags\r
+# ASOUT - how to generate output file\r
+\r
+AS = $(CW_BIN)/mwasmeppc.exe\r
+\r
+asflags-y += -gnu_mode\r
+asflags-y += -proc e500 -gdwarf-2\r
+asflags-$(CFG_VLE) += -vle\r
+ASFLAGS += $(asflags-y)\r
+ASOUT = -o $@\r
+\r
+# ---------------------------------------------------------------------------\r
+# Dumper\r
+\r
+#DDUMP = $(Q)$(COMPILER_ROOT)/$(cross_machine-y)-objcopy\r
+#DDUMP_FLAGS = -O srec\r
+#OBJCOPY = $(CROSS_COMPILE)objcopy\r
+\r
+# ---------------------------------------------------------------------------\r
+# Archiver\r
+#\r
+# AROUT - archiver flags\r
+\r
+#AR = $(CROSS_COMPILE)ar\r
+#AROUT = $@\r
+\r
+\r
+\r
+\r
\r
\r
+# Arch specific settings\r
+ifneq ($(ARCH),)\r
+ include $(ROOTDIR)/$(ARCH_PATH-y)/scripts/gcc.mk\r
+endif\r
+\r
+\r
HOST := $(shell uname)\r
export prefix\r
\r
\r
# Warnings\r
cflags-y += -Wall\r
-cflags-y += -Winline # warn if inline failed\r
+#cflags-y += -Winline # warn if inline failed\r
#cflags-y += -pedantic\r
\r
# Conformance\r
# Preprocessor\r
\r
CPP = $(CC) -E\r
+CPP_ASM_FLAGS = -x assembler-with-cpp \r
\r
comma = ,\r
empty = \r
# lib/gcc/<machine>/<version>/<multilib>\r
# Libs related to the library (libc.a,libm.a,etc) are under:\r
# <machine>/lib/<multilib>\r
+# \r
+# Can't remember why haven't I just used gcc to link instead of ld? (it should \r
+# figure out the things below by itself)\r
\r
# It seems some versions of make want "\=" and some "="\r
# "=" - msys cpmake on windows 7 \r
\r
LD = $(CROSS_COMPILE)ld\r
\r
+\r
+LD_FILE = -T\r
+\r
LDOUT = -o $@\r
TE = elf\r
-LDMAPFILE = -M > $(subst .$(TE),.map, $@)\r
+LDFLAGS += -Map $(subst .$(TE),.map, $@)\r
\r
libitem-y += $(libitem-yy)\r
+\r
+LD_START_GRP = --start-group\r
+LD_END_GRP = --end-group\r
+\r
#LDFLAGS += --gc-section\r
\r
# ---------------------------------------------------------------------------\r
--- /dev/null
+\r
+BEGIN {\r
+ kilobyte = 1024\r
+ \r
+ print " >> Image size: (decimal)"\r
+}\r
+\r
+/^\.text/ {\r
+ text += $3; \r
+ rom+=$3 \r
+};\r
+\r
+/^\.data/ {\r
+ data += $3;\r
+ rom+=$3; \r
+ ram+=$3\r
+};\r
+\r
+/^\.bss/ {\r
+ bss += $3; \r
+ ram+=$3\r
+};\r
+\r
+END { \r
+\r
+ printf "%-10s %10s %10.1f %s\n", " text:", text " B", text/kilobyte, "kB";\r
+ printf "%-10s %10s %10.1f %s\n", " data:", data " B", data/kilobyte, "kB";\r
+ printf "%-10s %10s %10.1f %s\n", " bss:", bss " B", bss/kilobyte, "kB"; \r
+ printf "%-10s %10s %10.1f %s\n", " ROM:", rom " B", rom/kilobyte, "kB";\r
+ printf "%-10s %10s %10.1f %s\n", " RAM:", ram " B", ram/kilobyte, "kB";\r
+ \r
+}
\ No newline at end of file
\r
\r
// EIJAS STUFF:\r
+-u //unit-checkout since not checking the test-files. Supresses the inter-module\r
+ //messages 526,552,628,714.720,755-759,765,768-769,948,974,1526-1527,1711,1714-1715,1755\r
+\r
-zero //always return exit code 0 (avoiding makefile interruption)\r
\r
-//Reset which files are viewed library-files to only treat <> as such\r
-+libclass(angle)\r
+// SET WARNING LEVEL:\r
+-w3 //-wlib(0)// 1:only errors, 2: +warnings 3: + infos\r
+\r
+//Reset which files are viewed library-files to only treat the ones in msys library as such\r
++libclass()\r
++libdir(*/msys/include*)\r
\r
//+os(lintOutput.TMP) //append output to file\r
//+oe(lintErrorOutput.TMP)//append error output to file\r
-format=%f:%l:%c:\s%t:\s%n\sPC-lint:\s%m\r
\r
\r
-// SET WARNING LEVEL:\r
--w3 //-wlib(0)// 1:only errors, 2: +warnings 3: + infos\r
+\r
\r
\r
-A(C99)//use C99 standard\r
+fie // Use to view enums as ints (tar bort tex PC641)\r
\r
\r
-// RULES TO TURN OFF\r
+// RULES TO TURN OFF (diskussed and confirmed)\r
//-efile(755,*.h)\r
-e755 //e switch off for header files\r
-e756 //e switch off for header files\r
-esym(961, 19.7) //Advisory Rule that should be switched off\r
-esym(961, 19.13)//Advisory Rule that should be switched off\r
\r
+\r
+-esym(960, 10.1) //implicit conversion...\r
+-esym(960,18.4) // Unions shall not be used.\r
+-e621 //Complains about identifiers names longer than _ characters. Length set by -idlen(). [1.4, 5.1] OK in autosar.\r
+\r
+-e766 //Header file not used in module...\r
+\r
+// Rules ok to remove by autosar:\r
+// [1.4, 5.1](621), 8.10, 12.10, 11.1-11.5, 14.3(960).\r
+-esym(960,14.3)\r
+\r
+\r
// RULES MAYBE TO TURN OFF\r
//-e534 //only turned of for OS, printf? kolla hur vanlig...\r
//-e757\r
\r
// RULES TO DISCUSS IF TO SWITCH OFF OR NOT\r
-esym(961,12.6)//Advisory Rule (Boolean expression required for operator...)\r
+-esym(961,12.13)//Advisory Rule (++, -- not with other operators...)\r
+-esym(961,12.1)\r
+\r
+-e830 //location cited in prior message\r
+-e831 //reference cited in prior message\r
+\r
+-e788 // PC-Lint message: Enum constant 'Symbol' not used within defaulted switch\r
+\r
+-esym(960, 16.9) // Function identifier used without '&'\r
+\r
+\r
+// RULES TO TURN OFF FOR OLD MODULES, but think of them when having new modules\r
+-esym(960,17.4) // To many messages to be possible to handle locally!\r
+\r
\r
// ERRORS SWITCHED OFF TEMPORARLY\r
//-e525\r
//-e714 //Symbol not referenced\r
//-e715 //Symbol not referenced\r
\r
-//-e830 //location cited in prior message\r
-//-e831 //reference cited in prior message\r
-\r
//-esym(960, 12.5) //Non-primary expression used with logical operator.\r
+\r
+//-e785 // Too few initializers for aggregate ...\r
\r
-CFG_ARCH_$(ARCH):=y\r
-\r
-RELDIR := $(subst $(TOPDIR)/,,$(CURDIR))\r
-\r
-# Create the target name... \r
-target := $(subst /,_,$(SUBDIR))\r
\r
-#goal=$(subst /cygdrive/c/,c:/,$(abspath $@))\r
-#goal=$(abspath $@)\r
-goal=$@\r
+###############################################################################\r
+# BUILD SETTINGS #\r
+###############################################################################\r
\r
-#===== MODULE CONFIGURATION =====\r
+# Board settings\r
include $(ROOTDIR)/boards/$(BOARDDIR)/build_config.mk\r
+\r
+# Project settings\r
-include ../build_config.mk\r
\r
+# Perform build system version check\r
+include $(ROOTDIR)/scripts/version_check.mk\r
+\r
+\r
+\r
+###############################################################################\r
+# MODULE CONFIGURATION #\r
+###############################################################################\r
+\r
+# Some useful vars\r
+CFG_ARCH_$(ARCH):=y\r
+RELDIR := $(subst $(TOPDIR)/,,$(CURDIR))\r
+target := $(subst /,_,$(SUBDIR))\r
+goal=$@\r
+\r
define MOD_AVAIL_template\r
MOD_$(1)=y\r
endef\r
$(error Trying to build a module that is not available: $(not_avail))\r
endif\r
\r
-#===== COMPILER CONFIG =====\r
+\r
+\r
+###############################################################################\r
+# TOOLS CONFIGURATION #\r
+###############################################################################\r
\r
# set debug optimization level as default\r
ifeq ($(SELECT_OPT),)\r
\r
ARCH_PATH-y = arch/$(ARCH_FAM)/$(ARCH)\r
\r
-# Include compiler generic and arch specific\r
+# Include compiler settings\r
COMPILER?=gcc\r
-ifneq ($(ARCH),)\r
-include $(ROOTDIR)/$(ARCH_PATH-y)/scripts/gcc.mk\r
-endif\r
include $(ROOTDIR)/scripts/cc_$(COMPILER).mk\r
+\r
+# Include pclint or splint settings\r
ifneq ($(PCLINT),)\r
include $(ROOTDIR)/scripts/cc_pclint.mk\r
endif\r
\r
\r
\r
-# Get object files\r
+###############################################################################\r
+# PROJECT MAKEFILE #\r
+###############################################################################\r
+\r
+# Include project makefile\r
include ../makefile\r
\r
+# All module object files (guarded for backwards compatability)\r
+ifndef _BOARD_COMMON_MK\r
+include $(ROOTDIR)/boards/board_common.mk\r
+endif\r
+\r
+\r
+##### For backwards compatability with older project makefiles:\r
\r
-##### For backwards compatability with older project makefiles\r
# Remove dependency on libkernel\r
deprecated-libs += $(ROOTDIR)/libs/libkernel_$(ARCH_MCU).a\r
deprecated-libs-included = $(filter $(deprecated-libs),$(libitem-y))\r
\r
#####\r
\r
+inc-y += ../include\r
inc-y += $(ROOTDIR)/include\r
inc-y += $(ROOTDIR)/include/$(ARCH_FAM)\r
+inc-y += $(ROOTDIR)/include/$(ARCH_FAM)/$(ARCH)\r
+ \r
+VPATH += $(ROOTDIR)/$(SUBDIR)/src\r
+VPATH += $(ROOTDIR)/$(SUBDIR)\r
+\r
+\r
+\r
+###############################################################################\r
+# LINT #\r
+###############################################################################\r
+\r
+LINT_EXCLUDE_PATHS := $(abspath $(LINT_EXCLUDE_PATHS))\r
+$(info $(LINT_EXCLUDE_PATHS))\r
+\r
+LINT_BAD_EXCLUDE_PATHS := $(filter %/,$(LINT_EXCLUDE_PATHS))\r
+ifneq ($(LINT_BAD_EXCLUDE_PATHS),)\r
+$(warning LINT_EXCLUDE_PATHS entries must not end in '/'. Ignoring $(LINT_BAD_EXCLUDE_PATHS))\r
+endif\r
+\r
+LINT_NICE_EXCLUDE_PATHS := $(filter-out %/,$(LINT_EXCLUDE_PATHS))\r
+LINT_NICE_EXCLUDE_PATHS := $(foreach path,$(LINT_NICE_EXCLUDE_PATHS),$(path)/)\r
+\r
+ifneq ($(PCLINT),)\r
+define run_pclint\r
+$(if \r
+$(filter $(dir $(abspath $<)),$(LINT_NICE_EXCLUDE_PATHS)),\r
+$(info $(abspath $<):0:0: Info: Not running lint check on $(abspath $<)),\r
+$(Q)$(PCLINT) $(lint_extra) $(addprefix $(lintinc_ext),$(inc-y)) $(addprefix $(lintdef_ext),$(def-y)) $(abspath $<))\r
+endef\r
+endif\r
+\r
+ifneq ($(SPLINT),)\r
+define run_splint\r
+$(if \r
+$(filter $(dir $(abspath $<)),$(LINT_NICE_EXCLUDE_PATHS)),\r
+$(info $(abspath $<):0:0: Info: Not running lint check on $(abspath $<)),\r
+$(Q)$(SPLINT) $(splint_extra) $(addprefix $(lintinc_ext),$(inc-y)) $(addprefix $(lintdef_ext),$(def-y)) $(abspath $<))\r
+endef\r
+endif\r
+\r
\r
\r
+###############################################################################\r
+# TOP-LEVEL TARGETS #\r
+###############################################################################\r
+\r
.PHONY clean: \r
clean: FORCE\r
@-rm -f *.o *.d *.h *.elf *.a *.ldp\r
$(ROOTDIR)/binaries:\r
@mkdir -p $@\r
\r
-# build- targets are "end" target that the included makefile want's to build\r
.PHONY all:\r
all: $(build-exe-y) $(build-hex-y) $(build-lib-y) $(build-bin-y) $(ROOTDIR)/binaries\r
@cp -v $(build-lib-y) $(build-exe-y) $(build-hex-y) $(build-bin-y) $(ROOTDIR)/binaries\r
\r
\r
-# Determine what kind of filetype to build from \r
-VPATH += $(ROOTDIR)/$(SUBDIR)/src\r
-VPATH += $(ROOTDIR)/$(SUBDIR)\r
+.SUFFIXES:\r
\r
-inc-y += ../include\r
\r
-.SUFFIXES:\r
\r
+###############################################################################\r
+# TARGETS #\r
+###############################################################################\r
+ \r
# Simple depencendy stuff\r
-include $(subst .o,.d,$(obj-y))\r
# Some dependency for xxx_offset.c/h also\r
-include $(subst .h,.d,$(dep-y))\r
\r
-ifneq ($(PCLINT),)\r
-define run_pclint\r
-$(Q)$(PCLINT) $(lint_extra) $(addprefix $(lintinc_ext),$(inc-y)) $(addprefix $(lintdef_ext),$(def-y)) $(abspath $<)\r
-endef\r
-endif\r
-\r
-ifneq ($(SPLINT),)\r
-define run_splint\r
-$(Q)$(SPLINT) $(splint_extra) $(addprefix $(lintinc_ext),$(inc-y)) $(addprefix $(lintdef_ext),$(def-y)) $(abspath $<)\r
-endef\r
-endif\r
-\r
-\r
# Compile\r
%.o: %.c\r
@echo " >> CC $(notdir $<)"\r
- $(Q)$(CC) -c $(CFLAGS) -o $(goal) $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $(abspath $<)\r
+ $(Q)$(CC) -c $(CFLAGS) -o $(goal) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $(abspath $<)\r
+# run lint if enabled\r
$(run_pclint)\r
$(run_splint)\r
\r
# Assembler\r
-\r
%.o: %.s\r
@echo " >> AS $(notdir $<) $(ASFLAGS)"\r
$(Q)$(AS) $(ASFLAGS) -o $(goal) $<\r
\r
%.s: %.sx\r
@echo " >> CPP $(notdir $<)"\r
- $(Q)$(CPP) -x assembler-with-cpp -E -o $@ $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
-\r
+ $(Q)$(CPP) $(CPP_ASM_FLAGS) -o $@ $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
\r
# Board linker files are in the board directory \r
inc-y += $(ROOTDIR)/boards/$(BOARDDIR)\r
\r
# Preprocess linker files..\r
-%.ldp: %.ldf\r
+%.ldp %.lcf: %.ldf\r
@echo " >> CPP $<"\r
- $(Q)$(CPP) -E -P -x assembler-with-cpp -o $@ $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
+ $(Q)$(CPP) -E -P $(CPP_ASM_FLAGS) -o $@ $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
\r
-# @cat $@ \r
- \r
.PHONY $(ROOTDIR)/libs:\r
$(ROOTDIR)/libs:\r
$(Q)mkdir -p $@\r
\r
dep-y += $(ROOTDIR)/libs\r
\r
-# lib \r
+# lib output\r
$(build-lib-y): $(dep-y) $(obj-y)\r
@echo " >> AR $@" \r
$(Q)$(AR) -r -o $@ $(obj-y) 2> /dev/null\r
\r
+# hex output\r
$(build-hex-y): $(build-exe-y)\r
@echo " >> OBJCOPY $@" \r
$(Q)$(CROSS_COMPILE)objcopy -O ihex $< $@\r
\r
+# bin output\r
$(build-bin-y): $(build-exe-y)\r
@echo " >> OBJCOPY $@" \r
$(Q)$(CROSS_COMPILE)objcopy -O binary $< $@ \r
\r
# Linker\r
-# Could use readelf -S instead of parsing the *.map file.\r
$(build-exe-y): $(dep-y) $(obj-y) $(sim-y) $(libitem-y) $(ldcmdfile-y)\r
@echo " >> LD $@"\r
ifeq ($(CROSS_COMPILE),)\r
$(Q)$(CC) $(LDFLAGS) -o $@ $(libpath-y) $(obj-y) $(lib-y) $(libitem-y) \r
-else \r
- $(Q)$(LD) $(LDFLAGS) -T $(ldcmdfile-y) -o $@ $(libpath-y) --start-group $(obj-y) $(lib-y) $(libitem-y) --end-group $(LDMAPFILE)\r
-ifdef CFG_HC1X\r
- @$(CROSS_COMPILE)objdump -h $@ | gawk -f $(ROOTDIR)/scripts/hc1x_memory.awk\r
else\r
- @echo "Image size: (decimal)"\r
- @gawk --non-decimal-data '/^\.text/ { print " text:" $$3+0 " bytes"; rom+=$$3 };\\r
- /^\.data/ { print " data:" $$3+0 " bytes"; rom+=$$3; ram+=$$3}; \\r
- /^\.bss/ { print " bss :" $$3+0 " bytes"; ram+=$$3}; \\r
- END { print " ROM: ~" rom " bytes"; print " RAM: ~" ram " bytes"}' $(subst .elf,.map,$@)\r
-ifeq ($(BUILD_LOAD_MODULE),y)\r
+ $(Q)$(LD) $(LDFLAGS) $(LD_FILE) $(ldcmdfile-y) -o $@ $(libpath-y) $(LD_START_GRP) $(obj-y) $(lib-y) $(libitem-y) $(LD_END_GRP) $(LDMAPFILE)\r
+ ifdef CFG_MC912DG128A\r
+ # Print memory layout\r
+ @$(CROSS_COMPILE)objdump -h $@ | gawk -f $(ROOTDIR)/scripts/hc1x_memory.awk\r
+ else\r
+ ifeq ($(COMPILER),gcc) \r
+ # Print memory layout\r
+ @echo ""\r
+ @gawk --non-decimal-data -f $(ROOTDIR)/scripts/gcc_map_memory.awk $(subst .elf,.map,$@)\r
+ endif # ($(COMPILER),gcc)\r
+ \r
+ ifeq ($(BUILD_LOAD_MODULE),y)\r
@$(CROSS_COMPILE)objcopy -O srec $@ $@.raw.s19\r
srec_cat $@.raw.s19 --crop 0x8008000 0x803fffc --fill 0x00 0x8008000 0x803fffc --l-e-crc32 0x803fffc -o $@.lm.s19\r
-endif\r
-endif\r
-endif\r
+ endif #($(BUILD_LOAD_MODULE),y)\r
+ \r
+ endif #CFG_MC912DG128A\r
+\r
+endif #($(CROSS_COMPILE),)\r
@echo\r
@echo " >>>>>>> DONE <<<<<<<<<"\r
@echo\r
\r
- \r
-$(size-exe-y): $(build-exe-y)\r
- $(Q)$(OBJDUMP) -h $<\r
- @echo TODO: Parse the file....\r
-\r
--- /dev/null
+\r
+\r
+# Verification that the build settings are sound\r
+\r
+CORE_BUILD_SYSTEM_VERSION_MAJOR = 1\r
+CORE_BUILD_SYSTEM_VERSION_MINOR = 0\r
+CORE_BUILD_SYSTEM_VERSION_PATCH = 0\r
+\r
+# Only check if specified \r
+# (remove when we want to start checking always)\r
+ifneq ($(REQUIRED_BUILD_SYSTEM_VERSION),)\r
+\r
+REQUIRED_BUILD_SYSTEM_VERSION:=$(subst ., ,$(REQUIRED_BUILD_SYSTEM_VERSION))\r
+REQUIRED_BUILD_SYSTEM_VERSION_MAJOR=$(word 1,$(REQUIRED_BUILD_SYSTEM_VERSION))\r
+REQUIRED_BUILD_SYSTEM_VERSION_MINOR=$(word 2,$(REQUIRED_BUILD_SYSTEM_VERSION))\r
+REQUIRED_BUILD_SYSTEM_VERSION_PATCH=$(word 3,$(REQUIRED_BUILD_SYSTEM_VERSION))\r
+\r
+ifneq ($(CORE_BUILD_SYSTEM_VERSION_MAJOR),$(REQUIRED_BUILD_SYSTEM_VERSION_MAJOR))\r
+ERROR_BUILD_SYSTEM_VERSION = y\r
+endif\r
+ifneq ($(CORE_BUILD_SYSTEM_VERSION_MINOR),$(REQUIRED_BUILD_SYSTEM_VERSION_MINOR))\r
+ERROR_BUILD_SYSTEM_VERSION = y\r
+endif\r
+ifeq (y,$(ERROR_BUILD_SYSTEM_VERSION))\r
+$(error Build system version mismatch. Core has $(CORE_BUILD_SYSTEM_VERSION_MAJOR).$(CORE_BUILD_SYSTEM_VERSION_MINOR), Project requires $(REQUIRED_BUILD_SYSTEM_VERSION_MAJOR).$(REQUIRED_BUILD_SYSTEM_VERSION_MINOR))\r
+endif\r
+\r
+else # Only check if specified\r
+$(info >>>> Build system version check not performed.)\r
+\r
+endif # Only check if specified\r
+\r
+define assert_exist\r
+$(if $(value $(1)),,\r
+$(error [Build system] Missing variable: $(1)))\r
+endef\r
+\r
+#$(call assert_exist,BOARDDIR)\r
+#$(call assert_exist,CROSS_COMPILE)\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+//lint -emacro(904,VALIDATE,VALIDATE_RV,VALIDATE_NO_RV) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
+\r
#include "EcuM.h"\r
#include "Modules.h"\r
-#include "string.h"\r
-#include "Os.h"\r
+#include <string.h>\r
+#include <Os.h>\r
#include "EcuM_Internals.h"\r
#include "EcuM_Cbk.h"\r
#include "Mcu.h"\r
#include "Det.h"\r
-#include "irq.h"\r
+//#include "isr.h"\r
#if defined(USE_NVM)\r
#include "Nvm.h"\r
#endif\r
+#if defined(USE_RTE)\r
+#include "Rte_Main.h"\r
+#endif\r
\r
-EcuM_GobalType internal_data;\r
+EcuM_GlobalType internal_data;\r
\r
void EcuM_Init( void )\r
{\r
+ Std_ReturnType status;\r
internal_data.current_state = ECUM_STATE_STARTUP_ONE;\r
\r
// Initialize drivers that are needed to determine PostBuild configuration\r
InitOS();\r
\r
// Enable interrupts\r
- Irq_Init();\r
+ Os_IsrInit();\r
\r
// Determine PostBuild configuration\r
internal_data.config = EcuM_DeterminePbConfiguration();\r
\r
- // Check consistency of PB configuration\r
- // TODO\r
+ // TODO: Check consistency of PB configuration\r
\r
// Initialize drivers needed before the OS-starts\r
EcuM_AL_DriverInitOne(internal_data.config);\r
// Determine the reset/wakeup reason\r
// TODO Mcu_ResetType type = Mcu_GetResetReason();\r
\r
+ // Moved this here because EcuM_SelectShutdownTarget needs us to be initilized.\r
+ internal_data.initiated = TRUE;\r
+\r
// Set default shutdown target\r
- internal_data.shutdown_target = internal_data.config->EcuMDefaultShutdownTarget;\r
- internal_data.shutdown_mode = internal_data.config->EcuMDefaultShutdownMode;\r
+ status = EcuM_SelectShutdownTarget(internal_data.config->EcuMDefaultShutdownTarget,internal_data.config->EcuMDefaultSleepMode);/** @req EcuM2181 */\r
+ if(status!=E_OK){\r
+ //TODO: Report error.\r
+ }\r
+\r
\r
// Set default application mode\r
- internal_data.app_mode = internal_data.config->EcuMDefaultAppMode;\r
+ status = EcuM_SelectApplicationMode(internal_data.config->EcuMDefaultAppMode);\r
+ if(status!=E_OK){\r
+ //TODO: Report error.\r
+ }\r
+\r
#if defined(USE_COMM)\r
internal_data.run_comm_requests = 0;\r
#endif\r
internal_data.run_requests = 0;\r
internal_data.postrun_requests = 0;\r
\r
- internal_data.initiated = TRUE;\r
-\r
// Start this baby up\r
- StartOS(internal_data.app_mode);\r
+ AppModeType appMode;\r
+ EcuM_GetApplicationMode(&appMode);\r
+ StartOS(appMode); /** @req EcuM2141 */\r
}\r
\r
-void EcuM_StartupTwo()\r
+void EcuM_StartupTwo(void)\r
{\r
+ //TODO: Validate that we are in state STARTUP_ONE.\r
#if defined(USE_NVM)\r
extern CounterType Os_Arc_OsTickCounter;\r
TickType tickTimerStart, tickTimer, tickTimerElapsed;\r
// Start timer to wait for NVM job to complete\r
tickTimerStatus = GetCounterValue(Os_Arc_OsTickCounter , &tickTimerStart);\r
if (tickTimerStatus != E_OK) {\r
- // TODO: Generate error?\r
+ Det_ReportError(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
}\r
#endif\r
\r
tickTimer = tickTimerStart; // Save this because the GetElapsedCounterValue() will destroy it.\r
tickTimerStatus = GetElapsedCounterValue(Os_Arc_OsTickCounter, &tickTimer, &tickTimerElapsed);\r
if (tickTimerStatus != E_OK) {\r
- // TODO: Generate error?\r
+ Det_ReportError(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
}\r
} while( (readAllResult == NVM_REQ_PENDING) && (tickTimerElapsed < internal_data.config->EcuMNvramReadAllTimeout) );\r
-#endif\r
\r
// Initialize drivers that need NVRAM data\r
EcuM_AL_DriverInitThree(internal_data.config);\r
+#endif\r
\r
- // Indicate mode change to RTE\r
- // TODO\r
+ // TODO: Indicate mode change to RTE\r
\r
// If coming from startup sequence, enter Run mode\r
// if (internal_data.current_state == ECUM_STATE_STARTUP_TWO)\r
}\r
\r
// Typically called from OS shutdown hook\r
-void EcuM_Shutdown()\r
+void EcuM_Shutdown(void)\r
{\r
internal_data.current_state = ECUM_STATE_GO_OFF_TWO;\r
\r
#if (MCU_PERFORM_RESET_API == STD_ON)\r
Mcu_PerformReset();\r
#else\r
- for(;;);\r
+ for(;;)\r
+ {\r
+ ;\r
+ }\r
#endif\r
}\r
}\r
\r
Std_ReturnType EcuM_GetState(EcuM_StateType* state)\r
{\r
+ VALIDATE_RV(internal_data.initiated, ECUM_GETSTATE_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
VALIDATE_RV(state != NULL, ECUM_GETSTATE_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
\r
*state = internal_data.current_state;\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_SELECTAPPMODE_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
\r
- // TODO Save this application mode for next startup\r
+ internal_data.app_mode = appMode;\r
\r
- return E_NOT_OK;\r
+ return E_OK;\r
}\r
\r
Std_ReturnType EcuM_GetApplicationMode(AppModeType* appMode)\r
VALIDATE_RV(internal_data.initiated, ECUM_SELECT_BOOTARGET_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
\r
// TODO Do something great here\r
+ (void) target;\r
\r
return E_NOT_OK;\r
}\r
VALIDATE_RV(target != NULL, ECUM_GET_BOOTARGET_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
\r
// TODO Return selected boot target here\r
+ (void) target;\r
\r
return E_NOT_OK;\r
}\r
\r
\r
-Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType target, uint8 mode)\r
+Std_ReturnType EcuM_SelectShutdownTarget(EcuM_StateType shutdownTarget, uint8 sleepMode)\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_SELECTSHUTDOWNTARGET_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV((target == ECUM_STATE_OFF) || (target == ECUM_STATE_RESET) || (target == ECUM_STATE_SLEEP), ECUM_SELECTSHUTDOWNTARGET_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV((shutdownTarget == ECUM_STATE_OFF) || (shutdownTarget == ECUM_STATE_RESET) || (shutdownTarget == ECUM_STATE_SLEEP), ECUM_SELECTSHUTDOWNTARGET_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
\r
- internal_data.shutdown_target = target;\r
- internal_data.shutdown_mode = mode;\r
+ internal_data.shutdown_target = shutdownTarget;\r
+ internal_data.sleep_mode = sleepMode;\r
\r
return E_OK;\r
}\r
\r
\r
-Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType *shutdownTarget, uint8 *sleepMode)\r
+Std_ReturnType EcuM_GetShutdownTarget(EcuM_StateType* shutdownTarget, uint8* sleepMode) /** @req EcuM2824 */\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_GETSHUTDOWNTARGET_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
+ VALIDATE_RV(shutdownTarget != NULL, ECUM_GETSHUTDOWNTARGET_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
+ VALIDATE_RV(sleepMode != NULL, ECUM_GETSHUTDOWNTARGET_ID, ECUM_E_NULL_POINTER, E_NOT_OK);\r
\r
*shutdownTarget = internal_data.shutdown_target;\r
- *sleepMode = internal_data.shutdown_mode;\r
+ *sleepMode = internal_data.sleep_mode;\r
\r
return E_OK;\r
}\r
}\r
\r
#if defined(USE_COMM)\r
-Std_ReturnType EcuM_ComM_RequestRUN(NetworkHandleType user)\r
+Std_ReturnType EcuM_ComM_RequestRUN(NetworkHandleType channel)\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_COMM_REQUESTRUN_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV(user < 32, ECUM_COMM_REQUESTRUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV(channel < 32, ECUM_COMM_REQUESTRUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
\r
- internal_data.run_comm_requests |= (uint32)1 << user;\r
+ internal_data.run_comm_requests |= (uint32)1 << channel;\r
\r
return E_OK;\r
}\r
\r
-Std_ReturnType EcuM_ComM_ReleaseRUN(NetworkHandleType user)\r
+Std_ReturnType EcuM_ComM_ReleaseRUN(NetworkHandleType channel)\r
{\r
VALIDATE_RV(internal_data.initiated, ECUM_COMM_RELEASERUN_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV(user < 32, ECUM_COMM_RELEASERUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV(channel < 32, ECUM_COMM_RELEASERUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
\r
- internal_data.run_comm_requests &= ~((uint32)1 << user);\r
+ internal_data.run_comm_requests &= ~((uint32)1 << channel);\r
\r
return E_OK;\r
}\r
\r
-boolean EcuM_ComM_HasRequestedRUN(NetworkHandleType user)\r
+boolean EcuM_ComM_HasRequestedRUN(NetworkHandleType channel)\r
{\r
- VALIDATE_RV(internal_data.initiated, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_NOT_INITIATED, E_NOT_OK);\r
- VALIDATE_RV(user < 32, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_INVALID_PAR, E_NOT_OK);\r
+ VALIDATE_RV(internal_data.initiated, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_NOT_INITIATED, FALSE);\r
+ VALIDATE_RV(channel < 32, ECUM_COMM_HASREQUESTEDRUN_ID, ECUM_E_INVALID_PAR, FALSE);\r
\r
- return (internal_data.run_comm_requests &((uint32)1 << user)) != 0;\r
+ return (internal_data.run_comm_requests &((uint32)1 << channel)) != 0;\r
}\r
#endif\r
\r
boolean initiated;\r
EcuM_ConfigType* config;\r
EcuM_StateType shutdown_target;\r
- uint8 shutdown_mode;\r
+ uint8 sleep_mode;\r
AppModeType app_mode;\r
EcuM_StateType current_state;\r
#if defined(USE_COMM)\r
#endif\r
uint32 run_requests;\r
uint32 postrun_requests;\r
-} EcuM_GobalType;\r
+} EcuM_GlobalType;\r
\r
-extern EcuM_GobalType internal_data;\r
+extern EcuM_GlobalType internal_data;\r
\r
void EcuM_enter_run_mode(void);\r
\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
+//lint -emacro(904,VALIDATE,VALIDATE_RV,VALIDATE_NO_RV) //904 PC-Lint exception to MISRA 14.7 (validate macros).\r
\r
#include "EcuM.h"\r
#include "EcuM_Cbk.h"\r
static uint32 internal_data_run_state_timeout = 0;\r
#if defined(USE_NVM)\r
static uint32 internal_data_go_off_one_state_timeout = 0;\r
+static NvM_RequestResultType writeAllResult;\r
#endif\r
\r
\r
-void EcuM_enter_run_mode(void)\r
-{\r
+void EcuM_enter_run_mode(void){\r
internal_data.current_state = ECUM_STATE_APP_RUN;\r
- EcuM_OnEnterRUN();\r
- internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD;\r
+ EcuM_OnEnterRUN(); /** @req EcuM2308 */\r
+ //TODO: Call ComM_EcuM_RunModeIndication(NetworkHandleType Channel) for all channels that have requested run.\r
+ internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD; /** @req EcuM2310 */\r
}\r
\r
-static inline void enter_post_run_mode(void)\r
-{\r
- internal_data.current_state = ECUM_STATE_APP_POST_RUN;\r
-}\r
\r
-static inline void enter_prep_shutdown_mode(void)\r
-{\r
- internal_data.current_state = ECUM_STATE_PREP_SHUTDOWN;\r
- EcuM_OnPrepShutdown();\r
-}\r
+//--------- Local functions ------------------------------------------------------------------------------------------------\r
\r
-static inline void enter_go_sleep_mode(void)\r
-{\r
+static inline void enter_go_sleep_mode(void){\r
internal_data.current_state = ECUM_STATE_GO_SLEEP;\r
- void EcuM_OnGoSleep();\r
+ EcuM_OnGoSleep();\r
}\r
\r
-static inline void enter_go_off_one_mode(void)\r
-{\r
+static inline void enter_go_off_one_mode(void){\r
internal_data.current_state = ECUM_STATE_GO_OFF_ONE;\r
EcuM_OnGoOffOne();\r
\r
#endif\r
}\r
\r
-static inline boolean hasRunRequests(void)\r
-{\r
- boolean result = internal_data.run_requests;\r
+\r
+static inline boolean hasRunRequests(void){\r
+ uint32 result = internal_data.run_requests;\r
\r
#if defined(USE_COMM)\r
result |= internal_data.run_comm_requests;\r
return (result != 0);\r
}\r
\r
-static inline boolean hasPostRunRequests(void)\r
-{\r
+static inline boolean hasPostRunRequests(void){\r
return (internal_data.postrun_requests != 0);\r
}\r
\r
-void EcuM_MainFunction(void)\r
-{\r
-#if defined(USE_NVM)\r
-static NvM_RequestResultType writeAllResult;\r
-#endif\r
\r
-VALIDATE_NO_RV(internal_data.initiated, ECUM_MAINFUNCTION_ID, ECUM_E_NOT_INITIATED);\r
\r
- if (internal_data.current_state == ECUM_STATE_APP_RUN)\r
- {\r
- if (internal_data_run_state_timeout)\r
- internal_data_run_state_timeout--;\r
+static inline void in_state_appRun(void){\r
+ if (internal_data_run_state_timeout){\r
+ internal_data_run_state_timeout--;\r
+ }\r
\r
- if (!hasRunRequests() && (internal_data_run_state_timeout == 0))\r
- {\r
- EcuM_OnExitRun(); // ECUM_2865\r
- enter_post_run_mode();\r
- return;\r
- }\r
+ if ((!hasRunRequests()) && (internal_data_run_state_timeout == 0)){\r
+ EcuM_OnExitRun(); /** @req EcuM2865 */\r
+ internal_data.current_state = ECUM_STATE_APP_POST_RUN;/** @req EcuM2865 */\r
}\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_APP_POST_RUN)\r
- {\r
- if (hasRunRequests())\r
- {\r
- EcuM_enter_run_mode(); // ECUM_2866\r
- return;\r
- }\r
\r
- if (!hasPostRunRequests())\r
- {\r
- EcuM_OnExitPostRun(); // ECUM_2761\r
- enter_prep_shutdown_mode();\r
- return;\r
- }\r
+static inline void in_state_appPostRun(void){\r
+ if (hasRunRequests()){\r
+ internal_data.current_state = ECUM_STATE_APP_RUN;/** @req EcuM2866 */ /** @req EcuM2308 */\r
+ EcuM_OnEnterRUN(); /** @req EcuM2308 */\r
+ //TODO: Call ComM_EcuM_RunModeIndication(NetworkHandleType Channel) for all channels that have requested run.\r
+ internal_data_run_state_timeout = internal_data.config->EcuMRunMinimumDuration / ECUM_MAIN_FUNCTION_PERIOD; /** @req EcuM2310 */\r
+\r
+ } else if (!hasPostRunRequests()){\r
+ EcuM_OnExitPostRun(); /** @req EcuM2761 */\r
+ internal_data.current_state = ECUM_STATE_PREP_SHUTDOWN;/** @req EcuM2761 */\r
+\r
+ EcuM_OnPrepShutdown();\r
+ } else {\r
+ // TODO: Do something?\r
}\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_PREP_SHUTDOWN)\r
- {\r
+static inline void in_state_prepShutdown(void){\r
#if defined(USE_DEM)\r
- // DEM shutdown\r
- Dem_Shutdown();\r
+ // DEM shutdown\r
+ Dem_Shutdown();\r
#endif\r
\r
- // Switch shutdown mode\r
- if ((internal_data.shutdown_target == ECUM_STATE_OFF) || (internal_data.shutdown_target == ECUM_STATE_RESET)) {\r
+ // Switch shutdown mode\r
+ switch(internal_data.shutdown_target){\r
+ //If in state Off or Reset go into Go_Off_One:\r
+ case ECUM_STATE_OFF:\r
+ case ECUM_STATE_RESET:\r
enter_go_off_one_mode();\r
- }\r
-\r
- if (internal_data.shutdown_target == ECUM_STATE_SLEEP) {\r
+ break;\r
+ case ECUM_STATE_SLEEP:\r
enter_go_sleep_mode();\r
- }\r
+ break;\r
+ default:\r
+ //TODO: Report error.\r
+ break;\r
}\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_GO_OFF_ONE)\r
- {\r
+static inline void in_state_goOffOne(void){\r
#if defined(USE_NVM)\r
- if (internal_data_go_off_one_state_timeout)\r
+ if (internal_data_go_off_one_state_timeout){\r
internal_data_go_off_one_state_timeout--;\r
-\r
+ }\r
// Wait for the NVM job (NvmWriteAll) to terminate\r
NvM_GetErrorStatus(0, &writeAllResult);\r
- if ((writeAllResult != NVM_REQ_PENDING) || (internal_data_go_off_one_state_timeout == 0))\r
- {\r
+ if ((writeAllResult != NVM_REQ_PENDING) || (internal_data_go_off_one_state_timeout == 0)){\r
ShutdownOS(E_OK);\r
}\r
#else\r
ShutdownOS(E_OK);\r
#endif\r
- }\r
+}\r
\r
- if (internal_data.current_state == ECUM_STATE_GO_SLEEP)\r
- {\r
- // TODO: Fill out\r
- }\r
\r
+//----- MAIN -----------------------------------------------------------------------------------------------------------------\r
+void EcuM_MainFunction(void){\r
+ VALIDATE_NO_RV(internal_data.initiated, ECUM_MAINFUNCTION_ID, ECUM_E_NOT_INITIATED);\r
+\r
+ switch(internal_data.current_state){\r
+\r
+ case ECUM_STATE_APP_RUN:\r
+ in_state_appRun();\r
+ break;\r
+ case ECUM_STATE_APP_POST_RUN:\r
+ in_state_appPostRun();\r
+ break;\r
+ case ECUM_STATE_PREP_SHUTDOWN:\r
+ in_state_prepShutdown();\r
+ break;\r
+ case ECUM_STATE_GO_OFF_ONE:\r
+ in_state_goOffOne();\r
+ break;\r
+ case ECUM_STATE_GO_SLEEP:\r
+ // TODO: Fill out\r
+ break;\r
+ default:\r
+ //TODO: Report error.\r
+ break;\r
+ }\r
}\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------\r
+ * WdgIf.c\r
+ *\r
+ * Created on: 22 feb 2010\r
+ * Author: Fredrik\r
+ */\r
+\r
+// 904 PC-Lint MISRA 14.7: OK. Allow VALIDATE_ENTITY_ID, VALIDATE and VALIDATE_NO_RETURNVAL to return value.\r
+//lint -emacro(904,VALIDATE,VALIDATE_NO_RETURNVAL)\r
+\r
+#include "WdgIf.h"\r
+#include "Det.h"\r
+\r
+#define VALIDATE(_expr, _api, _errorcode) \\r
+ if(!_expr) { \\r
+ Det_ReportError(MODULE_ID_WDGIF,0,_api,_errorcode ); \\r
+ ret = E_NOT_OK; \\r
+ return ret; \\r
+ }\r
+\r
+#define VALIDATE_NO_RETURNVAL(_expr, _api, _errorcode) \\r
+ if(!_expr) { \\r
+ Det_ReportError(MODULE_ID_WDGIF,0,_api,_errorcode ); \\r
+ return; \\r
+ }\r
+\r
+\r
+Std_ReturnType WdgIf_SetMode (uint8 DeviceIndex, WdgIf_ModeType Mode)\r
+{\r
+ Std_ReturnType ret = E_NOT_OK;\r
+ VALIDATE((WdgIfConfig.WdgIf_General->WdgIf_NumberOfDevices > DeviceIndex), WDGIF_SETMODE_ID, WDGIF_E_PARAM_DEVICE);\r
+\r
+ return WdgIfConfig.WdgIf_Device[DeviceIndex].WdgRef->Wdg_SetModeLocationPtr(Mode);\r
+}\r
+\r
+void WdgIf_Trigger (uint8 DeviceIndex)\r
+{\r
+ VALIDATE_NO_RETURNVAL((WdgIfConfig.WdgIf_General->WdgIf_NumberOfDevices > DeviceIndex), WDGIF_TRIGGER_ID, WDGIF_E_PARAM_DEVICE);\r
+ WdgIfConfig.WdgIf_Device[DeviceIndex].WdgRef->Wdg_TriggerLocationPtr();\r
+}\r
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#include "WdgM.h"\r
-#include "Mcu.h"\r
-\r
-const WdgM_ConfigType *wdgMConfigPtr;\r
-static WdgM_SupervisedStatusType WdgM_GlobalSupervisionStatus = WDBG_ALIVE_OK;\r
-\r
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+// 904 PC-Lint MISRA 14.7: OK. Allow VALIDATE_ENTITY_ID, VALIDATE and VALIDATE_NO_RETURNVAL to return value.
+//lint -emacro(904,VALIDATE_ENTITY_ID,VALIDATE,VALIDATE_NO_RETURNVAL)
+
+#include "WdgM.h"
+#include "WdgIf.h"\r
+#include "Det.h"
+
+#define VALIDATE_ENTITY_ID(_SEId, _api) \
+ if(_SEId >= WDGM_NBR_OF_ALIVE_SIGNALS) { \
+ Det_ReportError(MODULE_ID_WDGM,0,_api,WDGM_E_PARAM_SEID ); \
+ ret = E_NOT_OK; \
+ return ret; \
+ }\r
+
+#define VALIDATE(_expr, _api, _errorcode) \
+ if(!_expr) { \
+ Det_ReportError(MODULE_ID_WDGM,0,_api,_errorcode ); \
+ ret = E_NOT_OK; \
+ return ret; \
+ }
+
+#define VALIDATE_NO_RETURNVAL(_expr, _api, _errorcode) \
+ if(!_expr) { \
+ Det_ReportError(MODULE_ID_WDGM,0,_api,_errorcode ); \
+ return; \
+ }
+struct
+{
+ const WdgM_ConfigType *WdgM_ConfigPtr;
+ WdgM_AliveSupervisionStatusType WdgM_GlobalSupervisionStatus;
+ WdgM_SupervisionCounterType WdgM_ExpiredSupervisionCycles;
+ WdgM_TriggerCounterType WdgMTriggerCounter;
+ WdgM_ModeType WdgMActiveMode;
+ boolean WdgMModeConfigured;
+}wdgMInternalState;\r
+
+
+/* Helper macros */
+#define GET_ENTITY_STATE_PTR(_SEId) (&(wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_AliveEntityStatePtr)[_SEId])
+
+/* Function prototypes. */
+static boolean WdgM_IsAlive(void);
+static void wdgm_Check_AliveSupervision (void);
+static void wdgm_Trigger (void);
+void WdgM_Cbk_GptNotification (void);
+
+
Std_ReturnType WdgM_UpdateAliveCounter (WdgM_SupervisedEntityIdType SEid)\r
-{\r
- Wdgm_SupervisionType *supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
-\r
- if (supervisionPtr->ActivationStatus == WDBG_SUPERVISION_ENABLED)\r
+{
+ Std_ReturnType ret = E_NOT_OK;
+ /** @req WDGM027 **/
+ VALIDATE_ENTITY_ID(SEid, WDGM_UPDATEALIVECOUNTER_ID);\r
+ /** @req WDGM028 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_UPDATEALIVECOUNTER_ID, WDGM_E_NO_INIT);
+ WdgM_AliveEntityStateType *entityStatePtr = GET_ENTITY_STATE_PTR(SEid);\r
+
+ /** @req WDGM083 **/
+ /** @req WDGM114 **/
+ if (entityStatePtr->SupervisionStatus < WDGM_ALIVE_EXPIRED)
{\r
- supervisionPtr->AliveCounter++;\r
+ entityStatePtr->AliveCounter++;
+ ret = E_OK;
}\r
- return (E_OK);\r
+ return (ret);\r
}\r
-\r
+
+/** @req WDGM053 **/
+/** @req WDGM059 **/\r
+/** @req WDGM156 **/
Std_ReturnType WdgM_ActivateAliveSupervision (WdgM_SupervisedEntityIdType SEid)\r
{\r
- Wdgm_SupervisionType *supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
-\r
- supervisionPtr->ActivationStatus = WDBG_SUPERVISION_ENABLED;\r
-\r
- return (E_OK);\r
+ Std_ReturnType ret = E_NOT_OK;
+ /** @req WDGM055 **/
+ VALIDATE_ENTITY_ID(SEid, WDGM_ACTIVATEALIVESUPERVISION_ID);
+ /** @req WDGM056 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_ACTIVATEALIVESUPERVISION_ID, WDGM_E_NO_INIT);
+ WdgM_AliveEntityStateType *entityStatePtr = GET_ENTITY_STATE_PTR(SEid);
+
+ if ((WDGM_ALIVE_EXPIRED > entityStatePtr->SupervisionStatus) ||
+ (WDGM_ALIVE_DEACTIVATED == entityStatePtr->SupervisionStatus))\r
+ {
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_OK;
+ ret = E_OK;
+ }\r
+ return (ret);\r
}\r
-\r
+
+/** @req WDGM079 **/
+/** @req WDGM157 **/\r
Std_ReturnType WdgM_DeactivateAliveSupervision (WdgM_SupervisedEntityIdType SEid)\r
-{\r
- Wdgm_SupervisionType *supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
-\r
- supervisionPtr->ActivationStatus = WDBG_SUPERVISION_DISABLED;\r
- return (E_OK);\r
+{
+ Std_ReturnType ret = E_NOT_OK;\r
+ /** @req WDGM057 **/
+ VALIDATE_ENTITY_ID(SEid, WDGM_DEACTIVATEALIVESUPERVISION_ID);
+ /** @req WDGM058 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_DEACTIVATEALIVESUPERVISION_ID, WDGM_E_NO_INIT);
+ WdgM_AliveEntityStateType *entityStatePtr = GET_ENTITY_STATE_PTR(SEid);
+ const WdgM_SupervisedEntityType *supervisedEntityPtr = wdgMInternalState.WdgM_ConfigPtr->WdgM_General->WdgM_SupervisedEntityPtr;
+
+ /** @req WDGM082 **/
+ /** @req WDGM174 **/
+ /** @req WDGM108 **/
+ VALIDATE((supervisedEntityPtr->WdgM_DeactivationAccessEnabled != 0), WDGM_DEACTIVATEALIVESUPERVISION_ID, WDGM_E_DEACTIVATE_NOT_ALLOWED);
+
+ /** @req WDGM114 **/
+ if (WDGM_ALIVE_EXPIRED > entityStatePtr->SupervisionStatus)
+ {\r
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_DEACTIVATED;
+ ret = E_OK;
+ }
+
+ return (ret);\r
+}
+
+/** @req WDGM169 **/
+Std_ReturnType WdgM_GetAliveSupervisionStatus (WdgM_SupervisedEntityIdType SEid, WdgM_AliveSupervisionStatusType *Status)
+{
+ Std_ReturnType ret;
+ /** @req WDGM172 **/
+ VALIDATE_ENTITY_ID(SEid, WDGM_GETALIVESUPERVISIONSTATUS_ID);
+ /** @req WDGM173 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_GETALIVESUPERVISIONSTATUS_ID, WDGM_E_NO_INIT);
+ VALIDATE((Status != 0), WDGM_GETALIVESUPERVISIONSTATUS_ID, WDGM_E_NULL_POINTER);
+ WdgM_AliveEntityStateType *entityStatePtr = GET_ENTITY_STATE_PTR(SEid);
+ *Status = entityStatePtr->SupervisionStatus;
+ ret = E_OK;
+ return ret;
+}
+
+/** @req WDGM175 **/
+Std_ReturnType WdgM_GetGlobalStatus (WdgM_AliveSupervisionStatusType *Status)
+{
+ Std_ReturnType ret = E_NOT_OK;
+ /** @req WDGM176 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_GETGLOBALSTATUS_ID, WDGM_E_NO_INIT);
+ *Status = wdgMInternalState.WdgM_GlobalSupervisionStatus;
+ ret = E_OK;
+ return ret;
+}
+
+/** @req WDGM154 **/
+Std_ReturnType WdgM_SetMode(WdgM_ModeType Mode)
+{
+ Std_ReturnType ret = E_NOT_OK;
+ /** @req WDGM021 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_SETMODE_ID, WDGM_E_NO_INIT);
+ /** @req WDGM020 **/
+ VALIDATE(((Mode >= 0) && (Mode < WDGM_NBR_OF_MODES)), WDGM_SETMODE_ID, WDGM_E_PARAM_MODE);
+
+#if WDGM_OFF_MODE_ENABLED == STD_OFF
+ const WdgM_ModeConfigType * modeConfigPtr = &wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[Mode];
+ const WdgM_ModeConfigType * oldModeConfigPtr = &wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode];
+ /** @req WDGM031 **/
+ VALIDATE((modeConfigPtr->WdgM_Trigger->WdgM_WatchdogMode != WDGIF_OFF_MODE),WDGM_SETMODE_ID, WDGM_E_DISABLE_NOT_ALLOWED);
+#endif
+
+ WdgIf_ModeType mode;
+ uint8 deviceIndex;
+ uint8 i;
+
+ /** @req WDGM145 **/
+ if (wdgMInternalState.WdgM_GlobalSupervisionStatus == WDGM_ALIVE_OK)
+ {
+ /* Compare activation type between new and old mode. */
+ if (oldModeConfigPtr->WdgM_Activation.WdgM_IsGPTActivated != modeConfigPtr->WdgM_Activation.WdgM_IsGPTActivated)
+ {
+ /** @req WDGM188 **/
+ if (modeConfigPtr->WdgM_Activation.WdgM_IsGPTActivated)
+ {
+ const WdgM_ActivationGPTType * gptConfigPtr = &modeConfigPtr->WdgM_Activation.WdgM_ActivationGPT;
+ /* New mode is activated from GPT callback. Start GPT. */
+ Gpt_StartTimer(gptConfigPtr->WdgM_GptChannelRef, gptConfigPtr->WdgM_GptCycle);
+ Gpt_EnableNotification(gptConfigPtr->WdgM_GptChannelRef);
+ }
+ /** @req WDGM187 **/
+ else
+ {
+ /* Only if a mode already have been configured. */
+ if (wdgMInternalState.WdgMModeConfigured)
+ {
+ /* Old mode was GPT driven, but not new mode. Disable GPT. */
+ const WdgM_ActivationGPTType * oldGptConfigPtr = &oldModeConfigPtr->WdgM_Activation.WdgM_ActivationGPT;
+ Gpt_DisableNotification(oldGptConfigPtr->WdgM_GptChannelRef);
+ Gpt_StopTimer(oldGptConfigPtr->WdgM_GptChannelRef);
+ }
+ else
+ {
+ /* Do nothing since no mode have been configured. */
+ }
+ }
+ }
+ else
+ {
+ /* No activation change needed. */
+ }
+ /* Write new mode to internal state. */
+ wdgMInternalState.WdgMActiveMode = Mode;
+
+ /* Pass mode to all watchdog instances. */
+ for (i = 0; i < wdgMInternalState.WdgM_ConfigPtr->WdgM_General->WdgM_NumberOfWatchdogs;i++)
+ {
+ mode = wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[Mode].WdgM_Trigger[i].WdgM_WatchdogMode;
+ deviceIndex = wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[Mode].WdgM_Trigger[i].WdgM_WatchdogRef->WdgM_DeviceRef->WdgIf_DeviceIndex;
+ /** @req WDGM139 **/
+ if (E_NOT_OK == WdgIf_SetMode (deviceIndex, mode))
+ {
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_STOPPED;
+ }
+ }
+ ret = E_OK;
+ }
+ wdgMInternalState.WdgMModeConfigured = TRUE;
+ return (ret);
}\r
-\r
+
+/** @req WDGM168 **/
+Std_ReturnType WdgM_GetMode(WdgM_ModeType *Mode)
+{
+ Std_ReturnType ret = E_NOT_OK;
+ /** @req WDGM170 **/
+ VALIDATE((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_GETMODE_ID, WDGM_E_NO_INIT);
+ VALIDATE((Mode != 0), WDGM_GETMODE_ID, WDGM_E_NULL_POINTER);
+
+ *Mode = wdgMInternalState.WdgMActiveMode;
+ ret = E_OK;
+ return ret;
+}
+
+/** @req WDGM151 **/\r
void WdgM_Init(const WdgM_ConfigType *ConfigPtr)\r
{\r
WdgM_SupervisedEntityIdType SEid;\r
- Wdgm_SupervisionType *supervisionPtr;\r
- WdgM_SupervisedEntityType* supervisedEntityPtr;\r
-\r
- for (SEid = 0; SEid < WDBG_NBR_OF_ALIVE_SIGNALS; SEid++)\r
+ WdgM_AliveEntityStateType *entityStatePtr;
+ WdgM_ModeType initialMode;
+ const WdgM_ModeConfigType *modeConfigPtr;\r
+
+ /** @req WDGM010 **/
+ VALIDATE_NO_RETURNVAL((ConfigPtr != 0),WDGM_INIT_ID, WDGM_E_PARAM_CONFIG);
+ wdgMInternalState.WdgM_ConfigPtr = ConfigPtr;
+ initialMode = wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_InitialMode;
+ modeConfigPtr = &wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[initialMode];
+
+#if WDGM_OFF_MODE_ENABLED == STD_OFF
+ /** @req WDGM030 **/
+ VALIDATE_NO_RETURNVAL((modeConfigPtr->WdgM_Trigger->WdgM_WatchdogMode != WDGIF_OFF_MODE),WDGM_INIT_ID, WDGM_E_DISABLE_NOT_ALLOWED);
+#endif
+
+ /** @req WDGM018 **/\r
+ for (SEid = 0; SEid < WDGM_NBR_OF_ALIVE_SIGNALS; SEid++)\r
{\r
- supervisionPtr = &(ConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
- supervisedEntityPtr = (WdgM_SupervisedEntityType*)&(ConfigPtr->WdgM_SupervisedEntityPtr)[SEid];\r
- supervisionPtr->ActivationStatus = supervisedEntityPtr->WdgM_ActivationStatus;\r
- }\r
- wdgMConfigPtr = ConfigPtr;\r
-\r
-}\r
-\r
-void WdgM_MainFunction_AliveSupervision (void)\r
-{\r
+ entityStatePtr = GET_ENTITY_STATE_PTR(SEid);\r
+ if (wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[initialMode].WdgM_AliveSupervisionPtr[SEid].WdgM_ActivationActivated)
+ {
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_OK;
+ }
+ else
+ {
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_DEACTIVATED;
+ }
+ entityStatePtr->AliveCounter = 0;
+ entityStatePtr->SupervisionCycle = 0;
+ entityStatePtr->NbrOfFailedRefCycles = 0;
+ }
+
+ /* Start initial mode. Raise error if initial mode was not entered properly. */
+ VALIDATE_NO_RETURNVAL((WdgM_SetMode(initialMode) != E_OK),WDGM_INIT_ID, WDGM_E_PARAM_CONFIG);
+
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_OK;
+ wdgMInternalState.WdgMActiveMode = initialMode;
+ wdgMInternalState.WdgM_ExpiredSupervisionCycles = 0;
+ wdgMInternalState.WdgMTriggerCounter = 0;
+ wdgMInternalState.WdgMModeConfigured = FALSE;
+}
+
+/* Non standard API for test purpose. */
+void WdgM_DeInit( void)
+{
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = 0;
+ wdgMInternalState.WdgM_ConfigPtr = 0;
+}
+
+static void wdgm_Check_AliveSupervision (void)
+{
WdgM_SupervisedEntityIdType SEid;\r
- Wdgm_SupervisionType *supervisionPtr;\r
- const WdgM_SupervisedEntityType *entityPtr;\r
- WdgM_SupervisionCounterType aliveCalc, nSC, nAl, eai;\r
- WdgM_SupervisedStatusType maxLocal = WDBG_ALIVE_OK;\r
- static WdgM_SupervisionCounterType expiredSupervisionCycles = 0;\r
-\r
- for (SEid = 0; SEid < WDBG_NBR_OF_ALIVE_SIGNALS; SEid++)\r
+ WdgM_AliveEntityStateType *entityStatePtr;
+ const WdgM_AliveSupervisionType *entityPtr;\r
+ WdgM_SupervisionCounterType aliveCalc, nSC, nAl, f;\r
+ WdgM_AliveSupervisionStatusType maxLocal = WDGM_ALIVE_OK;\r
+
+ for (SEid = 0; SEid < wdgMInternalState.WdgM_ConfigPtr->WdgM_General->WdgM_NumberOfSupervisedEntities; SEid++)\r
{\r
- supervisionPtr = &(wdgMConfigPtr->Wdgm_SupervisionPtr)[SEid];\r
- entityPtr = &(wdgMConfigPtr->WdgM_SupervisedEntityPtr)[SEid];\r
-\r
- if (WDBG_SUPERVISION_ENABLED == supervisionPtr->ActivationStatus)\r
- {\r
- supervisionPtr->SupervisionCycle++;\r
+ entityStatePtr = GET_ENTITY_STATE_PTR(SEid);\r
+ entityPtr = &(wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode].WdgM_AliveSupervisionPtr)[SEid];\r
+
+ /** @req WDGM083 **/\r
+ if (WDGM_ALIVE_DEACTIVATED != entityStatePtr->SupervisionStatus)\r
+ {
+ entityStatePtr->SupervisionCycle++;\r
+ /** @req WDGM090 **/
/* Only perform supervision on the reference cycle. */\r
- if (supervisionPtr->SupervisionCycle == entityPtr->WdgM_SupervisionReferenceCycle)\r
- {\r
+ if (entityStatePtr->SupervisionCycle == entityPtr->WdgM_SupervisionReferenceCycle)\r
+ {
/* Alive algorithm. *\r
- * n (Al) - n(SC) + EAI == 0 */\r
- if (entityPtr->WdgM_ExpectedAliveIndications > entityPtr->WdgM_SupervisionReferenceCycle)\r
- {\r
- /* Scenario A */\r
- eai = -entityPtr->WdgM_ExpectedAliveIndications + 1;\r
-\r
- }\r
- else\r
- {\r
- /* Scenario B */\r
- eai = entityPtr->WdgM_SupervisionReferenceCycle - 1;\r
- }\r
- nSC = supervisionPtr->SupervisionCycle;\r
- nAl = supervisionPtr->AliveCounter;\r
- aliveCalc = nAl - nSC + eai;\r
-\r
+ * n (Al) - n(SC) + f(SRC,EAI) == 0; f(SRC,EAI) = SRC - EAI
+ * This algorithm is from revision 4.0 of the WdgM specification.
+ * Revision 3.1 does not seem to work.. */\r
+ nSC = entityStatePtr->SupervisionCycle;\r
+ nAl = entityStatePtr->AliveCounter;
+ f = entityPtr->WdgM_SupervisionReferenceCycle - entityPtr->WdgM_ExpectedAliveIndications;\r
+ aliveCalc = nAl + f - nSC;
+
+ /** @req WDGM091 **/
if ((aliveCalc <= entityPtr->WdgM_MaxMargin) &&\r
(aliveCalc >= -entityPtr->WdgM_MinMargin))\r
{\r
- /* Entity alive OK. */\r
- supervisionPtr->SupervisionStatus = WDBG_ALIVE_OK;\r
+ /* Entity alive OK. */
+ /** @req WDGM113 **/
+ if (entityStatePtr->SupervisionStatus <= WDGM_ALIVE_FAILED)
+ {\r
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_OK;
+ }\r
}\r
else\r
- {\r
+ {
+ /** @req WDGM024 **/\r
/* Entity alive NOK. */\r
- supervisionPtr->SupervisionStatus = WDBG_ALIVE_FAILED;\r
- if (WDBG_ALIVE_FAILED > maxLocal)\r
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_FAILED;\r
+ if (WDGM_ALIVE_FAILED > maxLocal)\r
{\r
- maxLocal = WDBG_ALIVE_FAILED;\r
+ maxLocal = WDGM_ALIVE_FAILED;\r
}\r
}\r
-\r
- if (WDBG_ALIVE_FAILED == supervisionPtr->SupervisionStatus)\r
- {\r
- if (supervisionPtr->NbrOfFailedRefCycles > entityPtr->WdgM_FailedSupervisionReferenceCycleTolerance)\r
+
+ /** @req WDGM097 **/
+ if (WDGM_ALIVE_FAILED == entityStatePtr->SupervisionStatus)\r
+ {
+ /** @req WDGM125 **/
+ /** @req WDGM130 **/\r
+ if (++entityStatePtr->NbrOfFailedRefCycles >= entityPtr->WdgM_FailedSupervisionReferenceCycleTolerance)\r
{\r
- supervisionPtr->SupervisionStatus = WDBG_ALIVE_EXPIRED;\r
- if (WDBG_ALIVE_EXPIRED > maxLocal)\r
+ entityStatePtr->SupervisionStatus = WDGM_ALIVE_EXPIRED;\r
+ if (WDGM_ALIVE_EXPIRED > maxLocal)\r
{\r
- maxLocal = WDBG_ALIVE_EXPIRED;\r
+ maxLocal = WDGM_ALIVE_EXPIRED;\r
}\r
}\r
- else\r
- {\r
- supervisionPtr->NbrOfFailedRefCycles++;\r
- }\r
}\r
\r
/* Reset counters. */\r
- supervisionPtr->SupervisionCycle = 0;\r
- supervisionPtr->AliveCounter = 0;\r
+ entityStatePtr->SupervisionCycle = 0;\r
+ entityStatePtr->AliveCounter = 0;\r
+ }
+ else
+ {
+ /* No update, but we need to keep maximum status updated. */
+ if (entityStatePtr->SupervisionStatus > maxLocal)
+ {
+ maxLocal = entityStatePtr->SupervisionStatus;
+ }
}\r
}\r
}\r
-\r
- /* Try to heal global status. */\r
- if (WDBG_ALIVE_EXPIRED != WdgM_GlobalSupervisionStatus)\r
- {\r
- WdgM_GlobalSupervisionStatus = maxLocal;\r
- }\r
- else\r
- {\r
- WdgM_GlobalSupervisionStatus = WDBG_ALIVE_EXPIRED;\r
- }\r
-\r
- if (WDBG_ALIVE_EXPIRED == WdgM_GlobalSupervisionStatus)\r
- {\r
- expiredSupervisionCycles++;\r
- }\r
-\r
- if (expiredSupervisionCycles >= wdgMConfigPtr->WdgM_ExpiredSupervisionCycleTolerance)\r
- {\r
- WdgM_GlobalSupervisionStatus = WDBG_ALIVE_STOPPED;\r
- }\r
+
+ /** @req WDGM075 **/
+ /** @req WDGM076 **/
+ /** @req WDGM077 **/
+ /** @req WDGM100 **/
+ /** @req WDGM101 **/\r
+ /** @req WDGM117 **/
+ /* Handle the global status. */
+ switch (wdgMInternalState.WdgM_GlobalSupervisionStatus)
+ {
+ case WDGM_ALIVE_OK:
+ case WDGM_ALIVE_FAILED:
+ if (WDGM_ALIVE_FAILED == maxLocal)
+ {
+ wdgMInternalState.WdgM_ExpiredSupervisionCycles = 1;
+ if (wdgMInternalState.WdgM_ExpiredSupervisionCycles >
+ wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode].WdgM_ExpiredSupervisionCycleTol)
+ {
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_STOPPED;
+ }
+ else
+ {
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_FAILED;
+ }
+ }
+ else if (WDGM_ALIVE_EXPIRED == maxLocal)
+ {
+ wdgMInternalState.WdgM_ExpiredSupervisionCycles = 1;
+ if (wdgMInternalState.WdgM_ExpiredSupervisionCycles >
+ wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode].WdgM_ExpiredSupervisionCycleTol)
+ {
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_STOPPED;
+ }
+ else
+ {
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_EXPIRED;
+ }
+ }
+ else if (WDGM_ALIVE_OK == maxLocal)
+ {
+ wdgMInternalState.WdgM_ExpiredSupervisionCycles = 0;
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_OK;
+ }
+ else
+ {
+ /* No more exits from state. Do nothing. */
+ }
+ break;
+ case WDGM_ALIVE_EXPIRED:
+ if (++wdgMInternalState.WdgM_ExpiredSupervisionCycles >
+ wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode].WdgM_ExpiredSupervisionCycleTol)
+ {
+ wdgMInternalState.WdgM_GlobalSupervisionStatus = WDGM_ALIVE_STOPPED;
+ }
+ break;
+ case WDGM_ALIVE_DEACTIVATED:
+ case WDGM_ALIVE_STOPPED:
+ break;
+ }\r
}\r
-\r
-boolean WdgM_IsAlive(void)\r
-{\r
-\r
- if ( WDBG_ALIVE_STOPPED > WdgM_GlobalSupervisionStatus )\r
- {\r
- return (TRUE);\r
- }\r
- else\r
- {\r
- return (FALSE);\r
- }\r
+
+/** @req WDGM060 **/
+/** @req WDGM061 **/
+/** @req WDGM063 **/
+/** @req WDGM099 **/
+/** @req WDGM159 **/
+void WdgM_MainFunction_AliveSupervision (void)
+{
+ VALIDATE_NO_RETURNVAL((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_MAINFUNCTION_ALIVESUPERVISION_ID, WDGM_E_NO_INIT);
+
+ const WdgM_ModeConfigType * modeConfigPtr = &wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode];
+
+ /** @req WDGM189 **/
+ if (!modeConfigPtr->WdgM_Activation.WdgM_IsGPTActivated)
+ {
+ wdgm_Check_AliveSupervision();
+ }
+}
+
+static boolean WdgM_IsAlive(void)
+{
+ boolean res;
+ /** @req WDGM119 **/
+ /** @req WDGM120 **/
+ /** @req WDGM121 **/
+ /** @req WDGM122 **/
+ if (WDGM_ALIVE_STOPPED > wdgMInternalState.WdgM_GlobalSupervisionStatus)
+ {
+ res = TRUE;
+ }
+ else
+ {
+ res = FALSE;
+ }
+ return res;
}\r
-\r
-void WdgM_MainFunction_Trigger (void)\r
+
+/** @req WDGM002 **/
+/** @req WDGM065 **/\r
+static void wdgm_Trigger (void)
{\r
+ uint8 i;
+
+ /* Update trigger counter. */
+ wdgMInternalState.WdgMTriggerCounter++;
+
+ /** @req WDGM041 **/
+ /** @req WDGM051 **/
if ( WdgM_IsAlive() )\r
- {\r
- KickWatchdog();\r
+ {
+ /* Loop through all managed watchdogs. */
+ for (i = 0; i < wdgMInternalState.WdgM_ConfigPtr->WdgM_General->WdgM_NumberOfWatchdogs;i++)
+ {
+ /** @req WDGM040 **/
+ /** @req WDGM103 **/
+ /** @req WDGM109 **/
+ /* Time to trig this particular watchdog instance? */
+ if (0 == (wdgMInternalState.WdgMTriggerCounter %
+ wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode].WdgM_Trigger[i].WdgM_TriggerReferenceCycle))
+ {
+ /** @req WDGM066 **/
+ WdgIf_Trigger(wdgMInternalState.WdgM_ConfigPtr->WdgM_General->WdgM_Watchdog[i].WdgM_DeviceRef->WdgIf_DeviceIndex);
+ }
+ }\r
}\r
}\r
-\r
+
+/** @req WDGM160 **/
+void WdgM_MainFunction_Trigger (void)
+{
+ /** @req WDGM068 **/
+ VALIDATE_NO_RETURNVAL((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_MAINFUNCTION_TRIGGER_ID, WDGM_E_NO_INIT);
+ const WdgM_ModeConfigType * modeConfigPtr = &wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode];
+
+ /** @req WDGM189 **/
+ if (!modeConfigPtr->WdgM_Activation.WdgM_IsGPTActivated)
+ {
+ wdgm_Trigger();
+ }
+}
+
+void WdgM_Cbk_GptNotification (void)
+{
+ VALIDATE_NO_RETURNVAL((wdgMInternalState.WdgM_ConfigPtr != 0), WDGM_MAINFUNCTION_TRIGGER_ID, WDGM_E_NO_INIT);
+ const WdgM_ModeConfigType * modeConfigPtr = &wdgMInternalState.WdgM_ConfigPtr->WdgM_ConfigSet->WdgM_Mode[wdgMInternalState.WdgMActiveMode];
+
+ /** @req WDGM190 **/
+ if (modeConfigPtr->WdgM_Activation.WdgM_IsGPTActivated)
+ {
+ wdgm_Check_AliveSupervision();
+ wdgm_Trigger();
+ }
+}
\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-#ifndef WDGM_CFG_H_\r
-#define WDGM_CFG_H_\r
-\r
-#include "Std_Types.h"\r
-#include "WdgM_Lcfg.h"\r
-\r
-typedef enum\r
-{\r
- WDBG_ALIVE_OK,\r
- WDBG_ALIVE_FAILED,\r
- WDBG_ALIVE_EXPIRED,\r
- WDBG_ALIVE_STOPPED,\r
- WDBG_ALIVE_DEACTIVATED,\r
-}WdgM_SupervisedStatusType;\r
-\r
-typedef enum\r
-{\r
- WDBG_SUPERVISION_DISABLED,\r
- WDBG_SUPERVISION_ENABLED\r
-}WdgM_ActivationStatusType;\r
-\r
-typedef int16_t WdgM_SupervisionCounterType ;\r
-\r
-typedef struct\r
-{\r
- WdgM_SupervisionCounterType AliveCounter;\r
- WdgM_SupervisionCounterType SupervisionCycle;\r
- WdgM_SupervisedStatusType SupervisionStatus;\r
- WdgM_SupervisionCounterType NbrOfFailedRefCycles;\r
- WdgM_ActivationStatusType ActivationStatus;\r
-}Wdgm_SupervisionType;\r
-\r
-typedef struct\r
-{\r
- const WdgM_SupervisedEntityIdType WdgM_SupervisedEntityID;\r
- const WdgM_ActivationStatusType WdgM_ActivationStatus;\r
- const WdgM_SupervisionCounterType WdgM_ExpectedAliveIndications;\r
- const WdgM_SupervisionCounterType WdgM_SupervisionReferenceCycle;\r
- const WdgM_SupervisionCounterType WdgM_FailedSupervisionReferenceCycleTolerance;\r
- const WdgM_SupervisionCounterType WdgM_MinMargin;\r
- const WdgM_SupervisionCounterType WdgM_MaxMargin;\r
-}WdgM_SupervisedEntityType;\r
-\r
-typedef struct\r
-{\r
- uint16 WdgM_SupervisionCycle;\r
- uint16 WdgM_NumberOfSupervisedEntities;\r
- uint16 WdgM_ExpiredSupervisionCycleTolerance;\r
- const WdgM_SupervisedEntityType *WdgM_SupervisedEntityPtr;\r
- Wdgm_SupervisionType *Wdgm_SupervisionPtr;\r
-}WdgM_ConfigType;\r
-\r
-extern const WdgM_ConfigType WdgMAliveSupervision;\r
-\r
-#endif /* WDGM_CFG_H_ */\r
if (alarmPtr->autostartPtr != NULL) {\r
const OsAlarmAutostartType *autoPtr = alarmPtr->autostartPtr;\r
\r
- if (os_sys.appMode & autoPtr->appModeRef) {\r
+ if (Os_Sys.appMode & autoPtr->appModeRef) {\r
if (autoPtr->autostartType == ALARM_AUTOSTART_ABSOLUTE) {\r
SetAbsAlarm(j, autoPtr->alarmTime, autoPtr->cycleTime);\r
} else {\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+/* ----------------------------[includes]------------------------------------*/\r
+\r
#include <stdlib.h>\r
+#include <stdint.h>\r
#include "Os.h"\r
\r
#include "internal.h"\r
#include "arc.h"\r
#include "arch.h"\r
\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+#define APPL_ID_TO_MASK(_x) (1<<(_x))\r
+\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+#if OS_APPLICATION_CNT!=0\r
+OsAppVarType Os_AppVar[OS_APPLICATION_CNT];\r
+#endif\r
+\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
+\r
+/* @req OS547\r
+ * Availability of AllowAccess(): Available in Scalability Classes 3 and 4.\r
+ * @req OS536\r
+ * Availability of TerminateApplication(): Available in Scalability Classes 3 and 4.\r
+ * @req OS520\r
+ * Availability of CheckObjectOwnership():Available in Scalability Classes 3 and 4.\r
+ *\r
+ */\r
+\r
+\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+\r
+/**\r
+ * This service determines the currently running OS-Application (a unique\r
+ * identifier has to be allocated to each application).\r
+ *
+ * @return <identifier of running OS-Application> or INVALID_OSAPPLICATION
+ */\r
+\r
+ApplicationType GetApplicationID( void ) {\r
+ return Os_Sys.currApplId;\r
+}\r
+\r
+\r
+/**\r
+ * A (trusted or non-trusted) OS-Application uses this service to call a trusted\r
+ * function\r
+ *
+ * @param FunctionIndex Index of the function to be called.
+ * @param FunctionParams Pointer to the parameters for the function -\r
+ * specified by the FunctionIndex - to be called.\r
+ * If no parameters are provided, a NULL pointer has\r
+ * to be passed.
+ * @return
+ */\r
+StatusType CallTrustedFunction( TrustedFunctionIndexType FunctionIndex,\r
+ TrustedFunctionParameterRefType FunctionParams ) {\r
+\r
+\r
+ return E_OK;\r
+}\r
+\r
+\r
+\r
+/**\r
+ * This service checks if a memory region is write/read/execute accessible\r
+ * and also returns information if the memory region is part of the stack\r
+ * space.\r
+ *
+ * @param ISRID ISR reference
+ * @param Address Start of memory area
+ * @param Size Size of memory area
+ * @return
+ */\r
+AccessType CheckISRMemoryAccess( ISRType isrId,\r
+ MemoryStartAddressType address,\r
+ MemorySizeType size )\r
+{\r
+ ptrdiff_t addr = (ptrdiff_t)address;\r
+ (void)addr;\r
+ (void)size;\r
+\r
+ if( isrId > OS_TASK_CNT ) {\r
+ return 0;\r
+ }\r
+ return 0;\r
+}\r
+/**\r
+ * This service checks if a memory region is write/read/execute accessible\r
+ * and also returns information if the memory region is part of the stack\r
+ * space.\r
+ *\r
+ * Check returned accesstype with:\r
+ * OSMEMORY_IS_READABLE(<AccessType>)\r
+ * OSMEMORY_IS_WRITEABLE(<AccessType>)\r
+ * OSMEMORY_IS_EXECUTABLE(<AccessType>)\r
+ * OSMEMORY_IS_STACKSPACE(<AccessType>)\r
+ *\r
+ * TODO: Not really sure what this function is actually good for? Add a use-case!\r
+ *
+ * @param TaskID Task reference
+ * @param Address Start of memory area
+ * @param Size Size of memory area
+ * @return
+ */\r
+AccessType CheckTaskMemoryAccess( TaskType taskId,\r
+ MemoryStartAddressType address,\r
+ MemorySizeType size )\r
+{\r
+ ptrdiff_t addr = (ptrdiff_t)address;\r
+ (void)addr;\r
+ (void)size;\r
+\r
+ /* @req OS270:\r
+ * if the Task reference <TaskID> in a call of CheckTaskMemoryAccess() is\r
+ * not valid, CheckTaskMemoryAccess() shall yield no access rights.\r
+ */\r
+ if( taskId > OS_TASK_CNT ) {\r
+ return 0;\r
+ }\r
+\r
+ /* TODO: Add body :) */\r
+ return 0;\r
+}\r
+\r
+\r
+/**\r
+ * This service determines if the OS-Applications, given by ApplID,\r
+ * is allowed to use the IDs of a Task, ISR, Resource, Counter,\r
+ * Alarm or Schedule Table in API calls.\r
+ *\r
+ * @param ApplID OS-Application identifier
+ * @param ObjectType Type of the following parameter
+ * @param object The object to be examined
+ * @return ACCESS if the ApplID has access to the object\r
+ * NO_ACCESS otherwise
+ */\r
+ObjectAccessType CheckObjectAccess( ApplicationType ApplId,\r
+ ObjectTypeType ObjectType,\r
+ uint32_t objectId )\r
+{\r
+ uint32 appMask = APPL_ID_TO_MASK(ApplId);\r
+ ObjectAccessType orv;\r
+ _Bool rv = 0;\r
+\r
+\r
+ /* @req OS423\r
+ * If in a call of CheckObjectAccess() the object to be examined\r
+ * is not avalid object OR <ApplID> is invalid OR <ObjectType> is\r
+ * invalid THEN CheckObjectAccess() shall return NO_ACCESS.\r
+ */\r
+ if( ApplId > OS_APPLICATION_CNT ) {\r
+ return NO_ACCESS;\r
+ }\r
+\r
+ /* @req OS272\r
+ * If the OS-Application <ApplID> in a call of CheckObjectAccess() has no\r
+ * access to the queried object, CheckObjectAccess() shall return NO_ACCESS.\r
+ *\r
+ * TODO: Could be that OS450 comes into play here....and then this is wrong.\r
+ */\r
+ if( Os_AppVar[ApplId].state != APPLICATION_ACCESSIBLE ) {\r
+ return NO_ACCESS;\r
+ }\r
+\r
+ /* TODO: check id */\r
+ switch( ObjectType ) {\r
+ case OBJECT_ALARM:\r
+ rv = ((OsAlarmType *)objectId)->accessingApplMask & (appMask);\r
+ break;\r
+ case OBJECT_COUNTER:\r
+ rv = ((OsCounterType *)objectId)->accessingApplMask & (appMask);\r
+ break;\r
+ case OBJECT_ISR:\r
+ /* TODO: Add more things here for missing objects */\r
+ break;\r
+ case OBJECT_MESSAGE:\r
+ case OBJECT_RESOURCE:\r
+ case OBJECT_SCHEDULETABLE:\r
+ break;\r
+ case OBJECT_TASK:\r
+ rv = ((OsCounterType *)objectId)->accessingApplMask & (appMask);\r
+ break;\r
+ default:\r
+ /* @req OS423 */\r
+ rv = NO_ACCESS;\r
+ break;\r
+ }\r
\r
+ orv = rv ? ACCESS : NO_ACCESS;\r
+\r
+ return orv;\r
+}\r
+\r
+/**\r
+ * This service determines to which OS-Application a given Task, ISR, Resource,\r
+ * Counter, Alarm or Schedule Table belongs\r
+ *
+ * @param ObjectType Type of the following parameter
+ * @param object The object to be examined\r
+ * @return The OS-Application to which the object ObjectType belongs or\r
+ * INVALID_OSAPPLICATION if the object does not exists
+ */\r
+ApplicationType CheckObjectOwnership( ObjectTypeType ObjectType,\r
+ uint32_t objectId )\r
+{\r
+ ApplicationType rv = INVALID_OSAPPLICATION;\r
+\r
+ switch( ObjectType ) {\r
+ case OBJECT_ALARM:\r
+ break;\r
+ case OBJECT_COUNTER:\r
+ break;\r
+ case OBJECT_ISR:\r
+ break;\r
+ case OBJECT_MESSAGE:\r
+ break;\r
+ case OBJECT_RESOURCE:\r
+ break;\r
+ case OBJECT_SCHEDULETABLE:\r
+ break;\r
+ case OBJECT_TASK:\r
+ if( objectId < OS_TASK_CNT ) {\r
+ rv = Os_TaskGetApplicationOwner((TaskType)objectId);\r
+ }\r
+ break;\r
+ default:\r
+ break;\r
+ }\r
+\r
+ return rv;\r
+}\r
+\r
+\r
+/**\r
+ * This service terminates the OS-Application to which the calling Task/Category 2\r
+ * ISR/application specific error hook belongs.\r
+ *
+ * @param Application - The identifier of the OS-Application to be terminated.\r
+ * If the caller belongs to <Application> the call results in a\r
+ * self termination.\r
+ *\r
+ * @param RestartOption - Either RESTART for doing a restart of the\r
+ * OS-Application or NO_RESTART if OS-Application shall not be restarted.\r
+ *
+ * @return E_OK: No errors\r
+ * E_OS_ID: <Application> was not valid\r
+ * E_OS_VALUE: <RestartOption> was neither RESTART nor NO_RESTART\r
+ * E_OS_ACCESS: The caller does not have the right to terminate <Application>\r
+ * E_OS_STATE: The state of <Application> does not allow terminating <Application>
+ */\r
+StatusType TerminateApplication( ApplicationType applId, RestartType restartOption ) {\r
+ (void)applId;\r
+ (void)restartOption;\r
+ return E_OK;\r
+}\r
+\r
+\r
+/**\r
+ * This service sets the own state of an OS-Application from\r
+ * APPLICATION_RESTARTING to APPLICATION_ACCESSIBLE.\r
+ *
+ * @return E_OK : No errors\r
+ * E_OS_STATE : The OS-Application of the caller is in the wrong\r
+state
+ */\r
+StatusType AllowAccess( void ) {\r
+ ApplicationType applId = Os_Sys.currApplId;\r
+\r
+ /* @req OS497 */\r
+ if( Os_AppVar[applId].state != APPLICATION_RESTARTING ) {\r
+ return E_OS_STATE;\r
+ }\r
+\r
+ /* @req OS498 */\r
+ Os_AppVar[applId].state = APPLICATION_ACCESSIBLE;\r
+ return E_OK;\r
+}\r
+\r
+/**\r
+ * This service returns the current state of an OS-Application.\r
+ * SC: SC3 and SC4\r
+ *
+ * @param ApplId The OS-Application from which the state is requested
+ * @param Value The current state of the application
+ * @return E_OK: No errors, E_OS_ID: <Application> is not valid
+ */\r
+StatusType GetApplicationState( ApplicationType applId, ApplicationStateRefType value ) {\r
+\r
+ if(applId > OS_APPLICATION_CNT ) {\r
+ return E_OS_ID;\r
+ }\r
+\r
+ *value = Os_AppVar[applId].state;\r
+\r
+ return E_OK;\r
+}\r
+\r
+\r
+/**\r
+ * TODO: Move somewhere else
+ * @param mode
+ * @return
+ */\r
StatusType GetActiveApplicationMode( AppModeType* mode) {\r
- *mode = os_sys.appMode;\r
+ *mode = Os_Sys.appMode;\r
return E_OK;\r
}\r
+\r
+\r
+/**\r
+ *
+ */\r
+void Os_ApplStart( void ) {\r
+ uint16_t i;\r
+\r
+ /* Call startuphooks for all applications */\r
+ for(i=0;i<OS_APPLICATION_CNT;i++) {\r
+\r
+ Os_AppVar[i].state = APPLICATION_ACCESSIBLE;\r
+\r
+ if( Os_AppConst[i].StartupHook != NULL ) {\r
+ Os_AppConst[i].StartupHook();\r
+ }\r
+ }\r
+}\r
+\r
+uint8_t Os_ApplGetCore( ApplicationType appl )\r
+{\r
+ return Os_AppConst[appl].core;\r
+}\r
+\r
+\r
+#endif\r
#include <stddef.h>\r
#include "internal.h"\r
\r
+#if defined(__GNUC__)\r
#define DECLARE(sym,val) \\r
__asm("#define\t" #sym "\t%0" : : "n" ((val)))\r
\r
void asm_foo(void) {\r
- DECLARE(PCB_STACK_CURR_P, offsetof(OsPcbType, stack));\r
- DECLARE(PCB_ENTRY_P, offsetof(OsPcbType, entry));\r
- DECLARE(SYS_CURR_PCB_P, offsetof(sys_t, curr_pcb));\r
- DECLARE(SYS_INT_NEST_CNT, offsetof(sys_t, int_nest_cnt));\r
- DECLARE(SYS_INT_STACK, offsetof(sys_t, int_stack));\r
+#elif defined(__CWCC__)\r
+#define DECLARE(_var,_offset) \\r
+ __declspec(section ".apa") char _var[100+ (_offset)]\r
+#pragma section ".apa" ".apa"\r
+#endif\r
+DECLARE(PCB_STACK_CURR_P, offsetof(OsTaskVarType, stack));\r
+ DECLARE(PCB_CONST_P, offsetof(OsTaskVarType, constPtr));\r
+// DECLARE(PCB_ENTRY_P, offsetof(OsTaskVarType, entry));\r
+ DECLARE(SYS_CURR_PCB_P, offsetof(Os_SysType, currTaskPtr));\r
+ DECLARE(SYS_INT_NEST_CNT, offsetof(Os_SysType, intNestCnt));\r
+ DECLARE(SYS_INT_STACK, offsetof(Os_SysType, intStack));\r
+#if defined(__GNUC__)\r
}\r
-\r
-\r
+#endif\r
\r
*\r
*/\r
\r
+#include "Os.h"\r
+\r
void apa(void *);\r
\r
void interrupt(void) __attribute__((__interrupt__));\r
\r
void func1( int a ) {\r
\r
+\r
}\r
\r
int func3( int a ) {\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-#include "Os.h"\r
-#include "internal.h"\r
-\r
-/* Queued message\r
- * The messages are put in a queue. Copied to the destination...\r
- *\r
- * Unqueued message\r
- * Latest message in queue. Put the message in a container ref by message_id.\r
- * It's just a copy. The message can be read by "anyone" and as many times as you\r
- * would like\r
- *\r
- * Add new functions ??\r
- * SendMessageNoCopy( ) .. must have GetMsgApa().. this gets to be a resource lock... hmm\r
- *\r
- *\r
- *\r
- */\r
-\r
-StatusType SendMessage( MessageType message_id, ApplicationDataRef dataRef ) {\r
-\r
-\r
- OsMessageType *msg;\r
-\r
- // Is the message valid ?\r
- if( message_id > Os_CfgGetMessageCnt() ) {\r
- // TODO: Add error hook here\r
- return E_COM_ID;\r
- }\r
-\r
- if( msg->property != SEND_STATIC_INTERNAL ) {\r
- // TODO: Add error hook here\r
- return E_COM_ID;\r
- }\r
-\r
- // Copy the data to interal buffers\r
- msg = Os_CfgGetMessage(message_id);\r
-\r
- // copy data\r
- memcpy(msg->data,dataRef,msg->data_size);\r
-\r
-\r
-#if 0\r
- // Is it a queue message?\r
- switch( msg->notification ) {\r
- case MESSAGE_NOTIFICATION_ACTION_ACTIVATETASK:\r
- // TODO: Is this activatetask ???\r
- break;\r
- case MESSAGE_NOTIFICATION_ACTION_SETEVENT:\r
- // TODO:\r
- break;\r
- case MESSAGE_NOTIFICATION_ACTION_NONE:\r
- break;\r
- default:\r
- assert(0);\r
- break;\r
- }\r
-#endif\r
-\r
- return E_OK;\r
-}\r
-\r
-StatusType ReceiveMessage( MessageType message_id, ApplicationDataRef dataRef ) {\r
- OsMessageType *msg;\r
- // Check if valid\r
-\r
- // Copy from container to dataRef\r
- msg = Os_CfgGetMessage(message_id);\r
- memcpy(dataRef,msg->data,msg->data_size);\r
-\r
- return E_OK;\r
-}\r
-\r
-\r
-\r
if( cPtr->type == COUNTER_TYPE_HARD ) {\r
if( cPtr->driver == NULL ) {\r
/* It's OSINTERNAL */\r
- *tick_ref = os_sys.tick;\r
+ *tick_ref = Os_Sys.tick;\r
} else {\r
#if 0\r
/* We support only GPT for now */\r
OsPcbType *pcbPtr;\r
#endif\r
\r
- os_sys.tick++;\r
+ Os_Sys.tick++;\r
\r
cPtr->val = Os_CounterAdd( cPtr->val, Os_CounterGetMaxValue(cPtr), 1 );\r
\r
}\r
\r
TickType GetOsTick( void ) {\r
- return get_os_tick();\r
+ return Os_Sys.tick;\r
}\r
\r
\r
\r
StatusType WaitEvent( EventMaskType Mask ) {\r
\r
- OsPcbType *curr_pcb = get_curr_pcb();\r
+ OsTaskVarType *curr_pcb = get_curr_pcb();\r
StatusType rv = E_OK;\r
\r
OS_DEBUG(D_EVENT,"# WaitEvent %s\n",Os_TaskGetCurrent()->name);\r
\r
- if( os_sys.int_nest_cnt != 0 ) {\r
+ if( Os_Sys.intNestCnt != 0 ) {\r
rv = E_OS_CALLEVEL;\r
goto err;\r
}\r
\r
- if (curr_pcb->proc_type != PROC_EXTENDED) {\r
+ if (curr_pcb->constPtr->proc_type != PROC_EXTENDED) {\r
rv = E_OS_ACCESS;\r
goto err;\r
}\r
\r
- if ( Os_TaskOccupiesResources(curr_pcb) ||\r
- !Os_SchedulerResourceIsFree() ) {\r
+ if ( Os_TaskOccupiesResources(curr_pcb) ) {\r
rv = E_OS_RESOURCE;\r
goto err;\r
}\r
\r
curr_pcb->ev_wait = Mask;\r
\r
- Os_Dispatch(OP_WAIT_EVENT);\r
- assert( curr_pcb->state & ST_RUNNING );\r
+ if ( Os_SchedulerResourceIsFree() ) {\r
+ // Os_TaskMakeWaiting(currTaskPtr);\r
+ Os_Dispatch(OP_WAIT_EVENT);\r
+ assert( curr_pcb->state & ST_RUNNING );\r
+ } else {\r
+ Os_TaskMakeWaiting(curr_pcb);\r
+ }\r
}\r
\r
Irq_Enable();\r
\r
StatusType SetEvent( TaskType TaskID, EventMaskType Mask ) {\r
StatusType rv = E_OK;\r
- OsPcbType *dest_pcb;\r
- OsPcbType *currPcbPtr;\r
+ OsTaskVarType *destPcbPtr;\r
+ OsTaskVarType *currPcbPtr;\r
uint32_t flags;\r
\r
OS_DEBUG(D_EVENT,"# SetEvent %s\n",Os_TaskGetCurrent()->name);\r
goto err;\r
}\r
\r
- dest_pcb = os_get_pcb(TaskID);\r
+ destPcbPtr = Os_TaskGet(TaskID);\r
+\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ if( destPcbPtr->constPtr->applOwnerId != Os_Sys.currApplId ) {\r
+ /* We are activating a task in another application */\r
+ if( Os_AppVar[Os_Sys.currApplId].state != APPLICATION_ACCESSIBLE ) {\r
+ rv=E_OS_ACCESS;\r
+ goto err;\r
+ }\r
+ }\r
+#endif\r
\r
#if (OS_STATUS_EXTENDED == STD_ON )\r
- if( dest_pcb->proc_type != PROC_EXTENDED ) {\r
+ if( destPcbPtr->constPtr->proc_type != PROC_EXTENDED ) {\r
rv = E_OS_ACCESS;\r
goto err;\r
}\r
\r
- if( (dest_pcb->state & ST_SUSPENDED ) ) {\r
+ if( (destPcbPtr->state & ST_SUSPENDED ) ) {\r
rv = E_OS_STATE;\r
goto err;\r
}\r
* defined, see chapter 9.2)\r
* ... */\r
\r
- dest_pcb->ev_set |= Mask;\r
-\r
- if( (Mask & dest_pcb->ev_wait)\r
-#if defined(USE_KERNEL_EXTRA)\r
- /* Don't dispatch if target task is sleeping */\r
- && !(dest_pcb->state & ST_SLEEPING)\r
-#endif\r
-\r
- ) {\r
- assert(dest_pcb->state & ST_WAITING );\r
-\r
- Os_TaskMakeReady(dest_pcb);\r
-\r
- currPcbPtr = Os_TaskGetCurrent();\r
- /* Checking "4.6.2 Non preemptive scheduling" it does not dispatch if NON */\r
- if( (os_sys.int_nest_cnt == 0) &&\r
- (currPcbPtr->scheduling == FULL) &&\r
- (dest_pcb->prio > currPcbPtr->prio) &&\r
- (Os_SchedulerResourceIsFree()) )\r
- {\r
- Os_Dispatch(OP_SET_EVENT);\r
+ destPcbPtr->ev_set |= Mask;\r
+\r
+ if( (Mask & destPcbPtr->ev_wait) ) {\r
+ /* We have an event match */\r
+ if( destPcbPtr->state & ST_WAITING) {\r
+ Os_TaskMakeReady(destPcbPtr);\r
+\r
+ currPcbPtr = Os_TaskGetCurrent();\r
+ /* Checking "4.6.2 Non preemptive scheduling" it does not dispatch if NON */\r
+ if( (Os_Sys.intNestCnt == 0) &&\r
+ (currPcbPtr->constPtr->scheduling == FULL) &&\r
+ (destPcbPtr->activePriority > currPcbPtr->activePriority) &&\r
+ (Os_SchedulerResourceIsFree()) )\r
+ {\r
+ Os_Dispatch(OP_SET_EVENT);\r
+ }\r
+\r
+ } else if(destPcbPtr->state & (ST_READY|ST_RUNNING|ST_SLEEPING) ) {\r
+ /* Hmm, we do nothing */\r
+ } else {\r
+ assert( 0 );\r
}\r
}\r
\r
*/\r
StatusType GetEvent( TaskType TaskId, EventMaskRefType Mask) {\r
\r
- OsPcbType *dest_pcb;\r
+ OsTaskVarType *destPcbPtr;\r
StatusType rv = E_OK;\r
\r
if( TaskId >= OS_TASK_CNT ) {\r
goto err;\r
}\r
\r
- dest_pcb = os_get_pcb(TaskId);\r
+ destPcbPtr = Os_TaskGet(TaskId);\r
\r
- VALIDATE_W_RV(dest_pcb->proc_type != PROC_EXTENDED,E_OS_ACCESS);\r
- VALIDATE_W_RV(dest_pcb->state & ST_SUSPENDED,E_OS_STATE);\r
+ VALIDATE_W_RV(destPcbPtr->constPtr->proc_type != PROC_EXTENDED,E_OS_ACCESS);\r
+ VALIDATE_W_RV(destPcbPtr->state & ST_SUSPENDED,E_OS_STATE);\r
\r
- *Mask = dest_pcb->ev_set;\r
+ *Mask = destPcbPtr->ev_set;\r
\r
if (0) goto err;\r
\r
*/\r
StatusType ClearEvent( EventMaskType Mask) {\r
StatusType rv = E_OK;\r
- OsPcbType *pcb;\r
+ OsTaskVarType *pcb;\r
\r
- if( os_sys.int_nest_cnt != 0 ) {\r
+ if( Os_Sys.intNestCnt != 0 ) {\r
rv = E_OS_CALLEVEL;\r
goto err;\r
}\r
\r
pcb = get_curr_pcb();\r
\r
- if (pcb->proc_type != PROC_EXTENDED) {\r
+ if (pcb->constPtr->proc_type != PROC_EXTENDED) {\r
rv = E_OS_ACCESS;\r
goto err;\r
}\r
ALARM_ACTION_ACTIVATETASK=0,\r
ALARM_ACTION_SETEVENT,\r
ALARM_ACTION_ALARMCALLBACK, /* Only class 1 */\r
- ALARM_ACTION_INCREMENTCOUNTER, /* SWS OS302 */\r
+ ALARM_ACTION_INCREMENTCOUNTER/* SWS OS302 */\r
} alarm_action_type_t;\r
\r
\r
// Start with SetAbsAlarm()\r
ALARM_AUTOSTART_ABSOLUTE,\r
// Start with SetRelAlarm()\r
- ALARM_AUTOSTART_RELATIVE,\r
+ ALARM_AUTOSTART_RELATIVE\r
};\r
\r
\r
} OsAlarmAutostartType;\r
\r
/* STD container : OsAlarm\r
- * OsAlarmAccessionApplication: 0..* Ref to OS application\r
+ * OsAlarmAccessingApplication: 0..* Ref to OS application\r
* OsAlamCounterRef: 1 Ref to counter\r
* OsAlarmAction[C] 1 Action when alarm expires\r
* OsAlarmAutostart[C] 0..1 Autostart\r
/* Reference to counter */\r
struct OsCounter *counter;\r
\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ ApplicationType applOwnerId;\r
+ uint32 accessingApplMask;\r
+#endif\r
+\r
CounterType counter_id;\r
/* cycle, 0 = no cycle */\r
uint32 alarmtime;\r
\r
\r
void Os_AlarmCheck(OsCounterType *c_p);\r
+void Os_AlarmAutostart(void);\r
\r
#endif /*ALARM_I_H_*/\r
#ifndef APPLICATION_H_\r
#define APPLICATION_H_\r
\r
-#if ( OS_SC3 == STD_ON) || ( OS_SC4 == STD_ON )\r
+/*\r
+ * IMPLEMENTATION NOTES:\r
+ *\r
+ * OS448: The Operating System module shall prevent access of\r
+ * OS-Applications, trusted or non-trusted, to objects not belonging\r
+ * to this OS-Application, except access rights for such objects are\r
+ * explicitly granted by configuration.\r
+ *\r
+ * OS509: If a service call is made on an Operating System\r
+ * object that is owned by another OS-Application without state\r
+ * APPLICATION_ACCESSIBLE, then the Operating System module shall return E_OS_ACCESS.\r
+ *\r
+ * OS056: If an OS-object identifier is the parameter of an Operating System module\92s\r
+ * system service, and no sufficient access rights have been assigned to this OS-object\r
+ * at configuration time (Parameter Os[...]AccessingApplication) to the calling\r
+ * Task/Category 2 ISR, the Operating System module\92s system service shall return\r
+ * E_OS_ACCESS.\r
+ *\r
+ * OS311: If OsScalabilityClass is SC3 or SC4 AND a Task OR Category 2 ISR OR\r
+ * Resources OR Counters OR Alarms OR Schedule tables does not belong to exactly\r
+ * one OS-Application the consistency check shall issue an error.\r
+ *\r
+ * Page 52:\r
+ * It is assumed that the Operating System module itself is trusted.\r
+ *\r
+ * Sooo, that gives us:\r
+ * 1. For each\r
+ *\r
+ *\r
+ * 1. App1, NT\r
+ * Task11\r
+ * 2. App2, NT\r
+ * Task21\r
+ * 3. App3, T\r
+ * Task31\r
+ * 4. App4, T\r
+ * Task41\r
+ *\r
+ * * App2->App1: ActivateTask(Task11)\r
+ * This is OK as long as Task11 have granted access to it during configuration\r
+ * * App4->App3: ActivateTask(Task31)\r
+ * This is OK as long as Task31 have granted access to it during configuration\r
+ * * App1->App4: ActivateTask(Task41)\r
+ * It's not really clear if the OS automagically exports all services..\r
+ * But this could also be CallTrustedFunction(ServiceId_AcivateTask,???)\r
+ *
+ */\r
+\r
+\r
+\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
\r
/* STD container : OsApplicationHooks\r
* class: 3,4\r
* management issue, not an access issue.\r
* */\r
\r
-typedef struct OsApplication {\r
+typedef struct OsAppVar {\r
/* 0 - Non-trusted application\r
* 1 - Trusted application */\r
_Bool trusted;\r
\r
/* NOTE! Refs here is memory management issue */\r
\r
- /* The application hooks */\r
- OsAppHooksType hooks;\r
+ /* The current state of the application */\r
+ ApplicationStateType state;\r
\r
/* Trusted functions */\r
/* .... */\r
-} OsApplicationType;\r
+} OsAppVarType;\r
\r
\r
/* NON standard type.\r
* Used for ROM based parameters.... TODO\r
*/\r
-typedef struct OsRomApplication {\r
- uint32 application_id;\r
+typedef struct OsApplication {\r
+ uint32 appId;\r
char name[16];\r
- uint8 trusted;\r
+ _Bool trusted;\r
+ uint8_t core;\r
\r
- /* hooks */\r
+ /* hooks, the names are StartupHook_<name>(), etc. */\r
void (*StartupHook)( void );\r
- void (*ShutdownHook)( Std_ReturnType Error );\r
- void (*ErrorHook)( Std_ReturnType Error );\r
+ void (*ShutdownHook)( StatusType Error );\r
+ void (*ErrorHook)( StatusType Error );\r
+\r
+ int restartTaskId;\r
+} OsAppConstType;\r
\r
- uint32 isr_mask;\r
- uint32 scheduletable_mask;\r
- uint32 alarm_mask;\r
- uint32 counter_mask;\r
- uint32 resource_mask;\r
- uint32 message_mask;\r
+#if OS_APPLICATION_CNT!=0\r
+extern OsAppVarType Os_AppVar[OS_APPLICATION_CNT];\r
+#endif\r
\r
-} OsRomApplicationType;\r
+uint8_t Os_ApplGetCore( ApplicationType appl );\r
\r
-#endif /* ( OS_SC1 == STD_ON ) || ( OS_SC4 == STD_ON ) */\r
+#endif /* (OS_USE_APPLICATIONS == STD_ON) */\r
\r
\r
#endif /* APPLICATION_H_ */\r
*\r
* @param pcb Ptr to pcb\r
*/\r
-void Os_ArchSetupContext( OsPcbType *pcb );\r
+void Os_ArchSetupContext( OsTaskVarType *pcb );\r
\r
/**\r
* Get current stack pointer\r
*/\r
unsigned int Os_ArchGetScSize( void );\r
\r
-void Os_ArchSetTaskEntry(OsPcbType *pcbPtr );\r
+void Os_ArchSetTaskEntry(OsTaskVarType *pcbPtr );\r
\r
\r
#endif /*ARCH_H_*/\r
+++ /dev/null
-\r
-#ifndef COM_INTERNAL_H_\r
-#define COM_INTERNAL_H_\r
-\r
-\r
-/*-----------------------------------------------------------------*/\r
-\r
-/*\r
- * The only information about the COM that is valid is\r
- * in the COM specification ..SWS_COM.pdf.\r
- *\r
- * The most important requirements are COM010 and COM013\r
- *\r
- * Com_Init()\r
- * Com_DeInit()\r
- *\r
- * No error hooks..\r
- * No. GetMessageStatus()\r
- * No. SendZeroMessage()\r
- * No. SendDynamicMessage(), RecieveDynamicMessage()\r
- * Yes. SendMessage()\r
- *\r
- * */\r
-\r
-typedef enum OsMessageProperty {\r
- // ???\r
- SEND_STATIC_INTERNAL,\r
- // messages are not consumed during read\r
- RECEIVE_UNQUEUED_INTERNAL,\r
- // We have an internal queue\r
- RECEIVE_QUEUE_INTERNAL,\r
-} OsMessagePropertyType;\r
-\r
-\r
-\r
-typedef enum OsMessageNotificationAction {\r
- MESSAGE_NOTIFICATION_ACTION_NONE=0,\r
- MESSAGE_NOTIFICATION_ACTION_ACTIVATETASK,\r
- MESSAGE_NOTIFICATION_ACTION_SETEVENT,\r
-} OsMessageNotificationActionType;\r
-\r
-typedef struct OsMessageNotification {\r
- OsMessageNotificationActionType type;\r
- TaskType task_id;\r
- EventMaskType event_id;\r
-} OsMessageNotificationType;\r
-\r
-\r
-typedef struct OsMessage {\r
- OsMessagePropertyType property; // send/recieve...\r
- OsMessageNotificationType notification;\r
- int q_size; // 0-Not queued\r
-\r
- // TODO: This is not a good solution but it will have to do for now\r
- void *data;\r
- int data_size;\r
-} OsMessageType;\r
-\r
-\r
-#endif /* COM_INTERNAL_H_ */\r
// The counter value ( if software counter )\r
uint32_t val;\r
// Application mask, SWS OS317\r
- uint32_t app_mask;\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ ApplicationType applOwnerId;\r
+ uint32 accessingApplMask;\r
+#endif\r
// hmm, strange to call it alarm base.... but see spec.\r
AlarmBaseType alarm_base;\r
/* Used only if we configure a GPT timer as os timer */\r
#define EXT_CONFIG_H_\r
\r
/* Created in Os_CfgConfig */\r
-struct OsPcb;\r
+struct OsTaskVar;\r
struct OsAlarm;\r
struct OsCounter;\r
struct OsSchTbl;\r
struct OsResource;\r
struct OsMessage;\r
-#if ( OS_SC1 == STD_ON ) || ( OS_SC4 == STD_ON )\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
struct OsRomApplication;\r
#endif\r
\r
-#if ( OS_SC1 == STD_ON ) || ( OS_SC4 == STD_ON )\r
-int Os_CfgGetApplCnt(void);\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+extern const OsAppConstType Os_AppConst[OS_APPLICATION_CNT];\r
+\r
struct OsRomApplication *Os_CfgGetApplObj( ApplicationType application_id );\r
#endif\r
-int Os_CfgGetTaskCnt(void);\r
void *Os_CfgGetIdleProcStack(void);\r
-int Os_CfgGetResourceCnt(void);\r
StatusType Os_CfgGetAlarmBase(AlarmType alarm_id, AlarmBaseRefType info);\r
-uint32 Os_CfgGetAlarmCnt(void);\r
struct OsAlarm *Os_CfgGetAlarmObj( AlarmType alarm_id );\r
struct OsCounter *Os_CfgGetCounter(CounterType);\r
-uint32 Os_CfgGetCounterCnt(void );\r
-uint32 Os_CfgGetSchedCnt( void );\r
struct OsSchTbl *Os_CfgGetSched( ScheduleTableType sched_id );\r
-uint32 Os_CfgGetServiceCnt( void ) ;\r
struct OsResource *Os_CfgGetResource( ResourceType resource );\r
-\r
struct OsMessage *Os_CfgGetMessage(MessageType message_id);\r
-uint32 Os_CfgGetMessageCnt(void );\r
void Os_CfgValidate( void );\r
\r
#endif /*EXT_CONFIG_H_*/\r
*\r
* Os.h\r
* |\r
- * |--- Os_Cfg.h\r
- * |\r
* |--- Std_Types.h\r
* | |--- Platform_Types.h (std?)\r
* | |--- Compiler.h (std?)\r
* |\r
+ * |--- Os_Cfg.h\r
+ * |\r
* |--- MemMap.h\r
*\r
*\r
*/\r
\r
#define ERRORHOOK(x) \\r
- if( os_sys.hooks->ErrorHook != NULL ) { \\r
- os_sys.hooks->ErrorHook(x); \\r
+ if( Os_Sys.hooks->ErrorHook != NULL ) { \\r
+ Os_Sys.hooks->ErrorHook(x); \\r
}\r
\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+#define PROTECTIONHOOK(_x) \\r
+ do { \\r
+ if( Os_Sys.hooks->ProtectionHook != NULL ) { \\r
+ Os_Sys.hooks->ProtectionHook(_x); \\r
+ } \\r
+ } while(0)\r
+\r
+#endif\r
+\r
\r
#define PRETASKHOOK() \\r
- assert( os_sys.curr_pcb->state & ST_RUNNING ); \\r
- assert( os_sys.curr_pcb->flags == SYS_FLAG_HOOK_STATE_EXPECTING_PRE ); \\r
- os_sys.curr_pcb->flags = SYS_FLAG_HOOK_STATE_EXPECTING_POST; \\r
- if( os_sys.hooks->PreTaskHook != NULL ) { \\r
- os_sys.hooks->PreTaskHook(); \\r
+ assert( Os_Sys.currTaskPtr->state & ST_RUNNING ); \\r
+ assert( Os_Sys.currTaskPtr->flags == SYS_FLAG_HOOK_STATE_EXPECTING_PRE ); \\r
+ Os_Sys.currTaskPtr->flags = SYS_FLAG_HOOK_STATE_EXPECTING_POST; \\r
+ if( Os_Sys.hooks->PreTaskHook != NULL ) { \\r
+ Os_Sys.hooks->PreTaskHook(); \\r
}\r
\r
#define POSTTASKHOOK() \\r
- assert( os_sys.curr_pcb->state & ST_RUNNING ); \\r
- assert( os_sys.curr_pcb->flags == SYS_FLAG_HOOK_STATE_EXPECTING_POST ); \\r
- os_sys.curr_pcb->flags = SYS_FLAG_HOOK_STATE_EXPECTING_PRE; \\r
- if( os_sys.hooks->PostTaskHook != NULL ) { \\r
- os_sys.hooks->PostTaskHook(); \\r
+ assert( Os_Sys.currTaskPtr->state & ST_RUNNING ); \\r
+ assert( Os_Sys.currTaskPtr->flags == SYS_FLAG_HOOK_STATE_EXPECTING_POST ); \\r
+ Os_Sys.currTaskPtr->flags = SYS_FLAG_HOOK_STATE_EXPECTING_PRE; \\r
+ if( Os_Sys.hooks->PostTaskHook != NULL ) { \\r
+ Os_Sys.hooks->PostTaskHook(); \\r
}\r
\r
/*\r
* PCB manipulating functions\r
*/\r
\r
+#if 0\r
static inline OsTaskidType get_curr_pid( void ) {\r
- return os_sys.curr_pcb->pid;\r
+ return Os_Sys.currTaskPtr->pid;\r
}\r
+#endif\r
\r
-static inline OsPcbType *get_curr_pcb( void ) {\r
- return os_sys.curr_pcb;\r
+static inline OsTaskVarType *get_curr_pcb( void ) {\r
+ return Os_Sys.currTaskPtr;\r
}\r
\r
-static inline void set_curr_pcb( OsPcbType *pcb ) {\r
- os_sys.curr_pcb = pcb;\r
+static inline void set_curr_pcb( OsTaskVarType *pcb ) {\r
+ Os_Sys.currTaskPtr = pcb;\r
}\r
-\r
-static inline _Bool is_idle_task( OsPcbType *pcb ){\r
+#if 0\r
+static inline _Bool is_idle_task( OsTaskVarType *pcb ){\r
return (pcb->pid == 0);\r
}\r
\r
+\r
static inline OsTaskidType get_curr_prio( void ){\r
- return os_sys.curr_pcb->prio;\r
+ return Os_Sys.currTaskPtr->prio;\r
}\r
\r
-static inline TickType get_os_tick( void ) {\r
- return os_sys.tick;\r
-}\r
\r
-#if ( OS_SC3 == STD_ON ) || ( OS_SC4 == STD_ON )\r
-static inline OsApplicationType *get_curr_application( void ) {\r
- return get_curr_pcb()->application;\r
+static inline TickType get_os_tick( void ) {\r
+ return Os_Sys.tick;\r
}\r
\r
-static inline uint32_t get_curr_application_id( void ) {\r
- return get_curr_pcb()->application->application_id;\r
-}\r
-#endif\r
\r
static inline struct OsResource *os_get_resource_int_p( void ) {\r
- return get_curr_pcb()->resource_int_p;\r
+ return get_curr_pcb()->resourceIntPtr;\r
}\r
+#endif\r
\r
/*\r
* Misc\r
*/\r
\r
static inline uint32_t os_task_nr_to_mask( uint32_t nr ) {\r
- return (1<<nr);\r
+ return ((uint32_t) 1 << nr); // 701 PC-lint [10.5]: OK om skriver 1u... får då istället: 960 PC-lint [10.5]: Båda ok om skriver 1ul eller castar till uint32_t\r
}\r
\r
// task_i.c\r
-OsPcbType *Os_TaskGetTop( void );\r
-OsPcbType *os_find_task( TaskType tid );\r
+OsTaskVarType *Os_TaskGetTop( void );\r
+OsTaskVarType *Os_TaskGet( TaskType tid );\r
\r
// resource.c\r
void Os_ResourceGetInternal(void );\r
void Os_ResourceReleaseInternal( void );\r
-void Os_ResourceAlloc( OsResourceType *rPtr, OsPcbType *pcbPtr);\r
-void Os_ResourceFree( OsResourceType *rPtr , OsPcbType *pcbPtr);\r
+void Os_ResourceAlloc( OsResourceType *rPtr, OsTaskVarType *pcbPtr);\r
+void Os_ResourceFree( OsResourceType *rPtr , OsTaskVarType *pcbPtr);\r
\r
void Os_ResourceInit( void );\r
\r
\r
-static inline void Os_ResourceFreeAll( OsPcbType *pcbPtr ) {\r
+/* Application */\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+void Os_ApplStart( void );\r
+#endif\r
+\r
+static inline void Os_ResourceFreeAll( OsTaskVarType *pcbPtr ) {\r
OsResourceType *rPtr;\r
\r
/* Pop the queue */\r
- TAILQ_FOREACH(rPtr, &pcbPtr->resource_head, listEntry ) {\r
+ TAILQ_FOREACH(rPtr, &pcbPtr->resourceHead, listEntry ) {\r
Os_ResourceFree(rPtr,pcbPtr);\r
}\r
}\r
\r
-#if 0\r
-/**\r
- *\r
- * @return 1 - if any resources were found.\r
- */\r
-static inline _Bool Os_ResourceCheckAndRelease( OsPcbType *pcb ) {\r
- _Bool rv = 0;\r
- if( !TAILQ_EMPTY(&pcb->resource_head) ) {\r
- OsResourceType *rPtr;\r
-\r
- TAILQ_FOREACH(rPtr, &pcb->resource_head, listEntry ) {\r
- ReleaseResource(rPtr->nr);\r
- /* Requirements are a little fuzzy here, no explicit\r
- * requirement for this.\r
- *\r
- * For OSEK this is a req.\r
- */\r
- ERRORHOOK(E_OS_RESOURCE);\r
- rv = 1;\r
- }\r
- }\r
- return rv;\r
+static inline _Bool Os_TaskOccupiesResources( OsTaskVarType *pcb ) {\r
+ return !(TAILQ_EMPTY(&pcb->resourceHead));\r
}\r
-#endif\r
\r
-static inline _Bool Os_TaskOccupiesResources( OsPcbType *pcb ) {\r
- return !(TAILQ_EMPTY(&pcb->resource_head));\r
-}\r
-\r
-/*\r
-static inline void Os_GetSchedulerResource() {\r
- os_sys.scheduler_lock = 1;\r
-}\r
-\r
-static inline void Os_ReleaseSchedulerResource() {\r
- os_sys.scheduler_lock = 0;\r
-}\r
-*/\r
-/*\r
-static inline _Bool Os_SchedulerResourceIsOccupied() {\r
-#if 0\r
- return (os_sys.resScheduler.owner != NO_TASK_OWNER );\r
-#else\r
- return (os_sys.scheduler_lock == 1);\r
-#endif\r
-}\r
-*/\r
#define NO_TASK_OWNER (TaskType)(~0)\r
\r
static inline _Bool Os_SchedulerResourceIsFree() {\r
#if 1\r
- return (os_sys.resScheduler.owner == NO_TASK_OWNER );\r
+ return (Os_Sys.resScheduler.owner == NO_TASK_OWNER );\r
#else\r
- return (os_sys.scheduler_lock == 0);\r
+ return (Os_Sys.scheduler_lock == 0);\r
#endif\r
}\r
\r
// Create.c\r
-OsPcbType * os_alloc_new_pcb( void );\r
+OsTaskVarType * os_alloc_new_pcb( void );\r
\r
void os_dispatch(void);\r
\r
void TailChaining(void *stack);\r
#endif\r
\r
-void *Os_Isr( void *stack, void *pcb_p );\r
+void *Os_Isr( void *stack, int16_t vector);\r
void Os_Dispatch( uint32_t op );\r
\r
#define STACK_PATTERN 0x42\r
\r
-static inline void *Os_StackGetUsage( OsPcbType *pcb ) {\r
+static inline void *Os_StackGetUsage( OsTaskVarType *pcb ) {\r
\r
uint8_t *p = pcb->stack.curr;\r
uint8_t *end = pcb->stack.top;\r
return (void *)end;\r
}\r
\r
-static inline void Os_StackSetEndmark( OsPcbType *pcbPtr ) {\r
+static inline void Os_StackSetEndmark( OsTaskVarType *pcbPtr ) {\r
uint8_t *end = pcbPtr->stack.top;\r
*end = STACK_PATTERN;\r
}\r
\r
-static inline _Bool Os_StackIsEndmarkOk( OsPcbType *pcbPtr ) {\r
+static inline _Bool Os_StackIsEndmarkOk( OsTaskVarType *pcbPtr ) {\r
_Bool rv;\r
uint8_t *end = pcbPtr->stack.top;\r
rv = ( *end == STACK_PATTERN);\r
return rv;\r
}\r
\r
-static inline void Os_StackPerformCheck( OsPcbType *pcbPtr ) {\r
+static inline void Os_StackPerformCheck( OsTaskVarType *pcbPtr ) {\r
#if (OS_STACK_MONITORING == 1)\r
if( !Os_StackIsEndmarkOk(pcbPtr) ) {\r
-#if ( OS_SC1 == 1) || ( OS_SC2 == 1)\r
+#if (OS_SC1 == STD_ON) || (OS_SC2 == STD_ON)\r
/** @req OS068 */\r
ShutdownOS(E_OS_STACKFAULT);\r
-#else\r
-#error SC3 or SC4 not supported. Protection hook should be called here\r
+#elif (OS_SC3 == STD_ON) || (OS_SC4 == STD_ON)\r
+ /** @req OS396 */\r
+ PROTECTIONHOOK(E_OS_STACKFAULT);\r
#endif\r
}\r
#endif\r
\r
\r
int Os_CfgGetTaskCnt(void);\r
-void Os_ContextReInit( OsPcbType *pcbPtr );\r
+void Os_ContextReInit( OsTaskVarType *pcbPtr );\r
\r
\r
static inline _Bool Os_IrqAnyDisabled( void ) {\r
\r
// What application may access this resource. A resource may only be\r
// accessed by one application\r
-#if ( OS_SC3 == STD_ON ) || ( OS_SC4 == STD_ON )\r
- uint32 application_owner_id;\r
+#if defined(SC3) || defined(SC4)\r
+ uint32 accessingApplMask;\r
#endif\r
// What tasks may access this resource. A resource may be be shared\r
// several tasks.\r
\r
typedef enum {\r
LOCK_TYPE_RESOURCE,\r
- LOCK_TYPE_INTERRUPT,\r
+ LOCK_TYPE_INTERRUPT\r
} OsLocktypeType;\r
\r
typedef struct OsLockingtime {\r
#include "application.h"\r
#include "pcb.h"\r
#include "sys.h"\r
+#include "isr.h"\r
+//#include "isr.h"\r
\r
/*-----------------------------------------------------------------*/\r
\r
#define PCB_H\r
\r
struct OsApplication;\r
-struct OsRomPcb;\r
+struct OsTaskConst;\r
\r
#define PID_IDLE 0\r
#define PRIO_IDLE 0\r
#define ST_NOT_STARTED (1<<4)\r
#define ST_SLEEPING (1<<5)\r
\r
+#define ST_ISR_RUNNING 1\r
+#define ST_ISR_NOT_RUNNING 2\r
+\r
typedef uint16_t state_t;\r
\r
/* from Os.h types */\r
#define TASK_NAME_SIZE 16\r
\r
\r
-/* STD container : OsIsr\r
- * Class: ALL\r
- *\r
- * OsIsrCategory: 1 CATEGORY_1 or CATEGORY_2\r
- * OsIsrResourceRef: 0..1 Reference to OsResource\r
- * OsIsrTimingProtection[C] 0..1\r
- * */\r
-\r
-/* STD container : OsIsrResourceLock\r
- * Class: 2 and 4\r
- *\r
- * OsIsrResourceLockBudget 1 Float in seconds (MAXRESOURCELOCKINGTIME)\r
- * OsIsrResourceLockResourceRef 1 Ref to OsResource\r
- * */\r
-\r
-/* STD container : OsIsrTimingProtection\r
- * Class: 2 and 4\r
- *\r
- * OsIsrAllInterruptLockBudget 0..1 float\r
- * OsIsrExecutionBudget 0..1 float\r
- * OsIsrOsInterruptLockBudget 0..1 float\r
- * OsIsrTimeFrame 0..1 float\r
- * OsIsrResourceLock[C] 0..1\r
- * */\r
-\r
-\r
\r
/* STD container : OsHooks\r
* OsErrorHooks: 1\r
* */\r
\r
typedef struct OsHooks {\r
-#if ( OS_SC2 == STD_ON ) || ( OS_SC3 == STD_ON ) || ( OS_SC4 == STD_ON )\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
ProtectionHookType ProtectionHook;\r
#endif\r
StartupHookType StartupHook;\r
#define PROC_BASIC 0x1\r
#define PROC_EXTENDED 0x3\r
\r
+#if 0\r
#define PROC_ISR 0x4\r
#define PROC_ISR1 0x4\r
#define PROC_ISR2 0xc\r
+#endif\r
\r
\r
typedef struct {\r
#define SYS_FLAG_HOOK_STATE_EXPECTING_POST 1\r
\r
/* We do ISR and TASK the same struct for now */\r
-typedef struct OsPcb {\r
- OsTaskidType pid; // TASK\r
- OsPriorityType prio;\r
-#if ( OS_SC1 == STD_ON ) || ( OS_SC4 == STD_ON )\r
- ApplicationType application_id;\r
- uint32 app_mask;\r
-#endif\r
- void (*entry)();\r
- proc_type_t proc_type;\r
- uint8 autostart:1; // TASK\r
+typedef struct OsTaskVar {\r
OsStackType stack; // TASK\r
\r
- int vector; // ISR\r
- char name[TASK_NAME_SIZE];\r
#if ( OS_SC2 == STD_ON ) || ( OS_SC4 == STD_ON )\r
OsTimingProtectionType *timing_protection;\r
#endif\r
\r
state_t state; // TASK\r
- OsEventType ev_wait; // TASK\r
- OsEventType ev_set; // TASK\r
+\r
+ /* Events the task wait for ( what events WaitEvent() was called with) */\r
+ OsEventType ev_wait;\r
+ /* Events that are set by SetEvent() on the task */\r
+ OsEventType ev_set;\r
+ /* The events the task may react on */\r
+ OsEventType ev_react;\r
\r
uint32_t flags;\r
\r
+ /* Priority of the task, this can be different depening on if the\r
+ * task hold resources. Related to priority inversion */\r
+ OsPriorityType activePriority;\r
+#if 0\r
+ void (*entry)();\r
+\r
+ char name[TASK_NAME_SIZE];\r
+\r
+ OsTaskidType pid; // TASK\r
+ OsPriorityType prio;\r
+\r
+ proc_type_t proc_type;\r
+ int autostart; // TASK\r
+\r
enum OsTaskSchedule scheduling; // TASK\r
/* belongs to this application */\r
struct OsApplication *application;\r
-\r
/* OsTaskActivation\r
* The limit from OsTaskActivation. This is 1 for extended tasks */\r
uint8_t activationLimit;\r
- // The number of queued activation of a task\r
- int8_t activations;\r
\r
// A task can hold only one internal resource and only i f\r
// OsTaskSchedule == FULL\r
- OsResourceType *resource_int_p; // TASK\r
+ OsResourceType *resourceIntPtr; // TASK\r
\r
// OsTaskResourceRef\r
// What resources this task have access to\r
// Typically (1<<RES_xxx) | (1<<RES_yyy)\r
uint32_t resourceAccess;\r
\r
+#endif\r
+\r
+ // The number of queued activation of a task\r
+ int8_t activations;\r
\r
// What resource that are currently held by this task\r
// Typically (1<<RES_xxx) | (1<<RES_yyy)\r
uint32_t resourceMaskTaken;\r
\r
- TAILQ_HEAD(head,OsResource) resource_head; // TASK\r
+ TAILQ_HEAD(head,OsResource) resourceHead; // TASK\r
\r
- const struct OsRomPcb *pcb_rom_p;\r
+ const struct OsTaskConst *constPtr;\r
\r
/* TODO: Arch specific regs .. make space for them later...*/\r
uint32_t regs[16]; // TASK\r
int32_t timerDec;\r
#endif\r
/* List of PCB's */\r
- TAILQ_ENTRY(OsPcb) pcb_list; // TASK\r
+// TAILQ_ENTRY(OsTaskVar) pcb_list; // TASK\r
/* ready list */\r
- TAILQ_ENTRY(OsPcb) ready_list; // TASK\r
-} OsPcbType;\r
+ TAILQ_ENTRY(OsTaskVar) ready_list; // TASK\r
+} OsTaskVarType;\r
+\r
+/*-----------------------------------------------------------------*/\r
+\r
\r
/*-----------------------------------------------------------------*/\r
\r
-typedef struct OsRomPcb {\r
+/* STD container : OsTask\r
+ * OsTaskActivation: 1\r
+ * OsTaskPriority: 1\r
+ * OsTaskSchedule: 1\r
+ * OsTaskAccessingApplication: 0..*\r
+ * OsTaskEventRef: 0..*\r
+ * OsTaskResourceRef: 0..*\r
+ * OsTaskAutoStart[C] 0..1\r
+ * OsTaskTimingProtection[C] 0..1\r
+ * */\r
+\r
+\r
+typedef struct OsTaskConst {\r
OsTaskidType pid;\r
OsPriorityType prio;\r
uint32 app_mask;\r
proc_type_t proc_type;\r
uint8 autostart;\r
OsStackType stack;\r
- int vector; // ISR\r
- ApplicationType application_id;\r
+ int vector; // ISR\r
+\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ /* Application that owns this task */\r
+ ApplicationType applOwnerId;\r
+ /* Applications that may access task when state is APPLICATION_ACCESSIBLE */\r
+ uint32 accessingApplMask;\r
+#endif\r
+\r
char name[16];\r
enum OsTaskSchedule scheduling;\r
uint32_t resourceAccess;\r
// pointer to internal resource\r
// NULL if none\r
- OsResourceType *resource_int_p;\r
+ OsResourceType *resourceIntPtr;\r
OsTimingProtectionType *timing_protection;\r
uint8_t activationLimit;\r
// lockingtime_obj_t\r
-} OsRomPcbType;\r
+} OsTaskConstType;\r
\r
#endif\r
\r
// Start with StartScheduleTableRel()\r
SCHTBL_AUTOSTART_RELATIVE,\r
// Start with StartScheduleTableSyncon()\r
- SCHTBL_AUTOSTART_SYNCHRONE,\r
+ SCHTBL_AUTOSTART_SYNCHRONE\r
};\r
\r
\r
/** @req OS413 */\r
_Bool repeating;\r
\r
+#if defined(SC3) || defined(SC4)\r
+ uint32 accessingApplMask;\r
+#endif\r
+\r
// pointer to this tables counter\r
// OsScheduleTableCounterRef\r
/** @req OS409 */\r
/* NULL if NONE, and non-NULL if EXPLICIT and IMPLICIT */\r
struct OsScheduleTableSync *sync;\r
\r
-#if (OS_SC3 == STD_ON ) || (OS_SC4 == STD_ON )\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
uint32 app_mask;\r
#endif\r
\r
OP_TERMINATE_TASK = 8,\r
OP_SCHEDULE = 16,\r
OP_CHAIN_TASK = 32,\r
- OP_RELEASE_RESOURCE = 64,\r
+ OP_RELEASE_RESOURCE = 64\r
OP_SLEEP = 128,\r
+\r
} OpType ;\r
\r
-typedef struct sys_s {\r
+/*\r
+ * Global system structure\r
+ */\r
+typedef struct Os_Sys {\r
// OsApplicationType *curr_application;\r
/* Current running task*/\r
- OsPcbType *curr_pcb;\r
+ OsTaskVarType *currTaskPtr;\r
+\r
/* List of all tasks */\r
- OsPcbType *pcb_list;\r
+ OsTaskVarType *pcb_list;\r
\r
- OsPcbType *chainedPcbPtr;\r
+ OsTaskVarType *chainedPcbPtr;\r
/* Interrupt nested count */\r
- uint32 int_nest_cnt;\r
+ uint32 intNestCnt;\r
/* The current operation */\r
uint8_t op;\r
/* Ptr to the interrupt stack */\r
- void *int_stack;\r
+ void *intStack;\r
// The os tick\r
TickType tick;\r
// 1-The scheduler is locked (by GetResource() or something else)\r
/* Current Application mode */\r
AppModeType appMode;\r
\r
-// uint32_t flags;\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ ApplicationStateType currApplState;\r
+ ApplicationType currApplId;\r
+#endif\r
\r
uint32_t task_cnt;\r
\r
+ uint32_t isrCnt;\r
#if defined(USE_KERNEL_EXTRA)\r
- /* List of PCB's to be put in ready list when timeout */\r
+\r
+/* List of PCB's to be put in ready list when timeout */\r
TAILQ_HEAD(,OsPcb) timerHead; // TASK\r
#endif\r
\r
/* List of all pcb's,\r
* Only needed for non-static configuration of the kernel\r
*/\r
- TAILQ_HEAD(,OsPcb) pcb_head;\r
+// TAILQ_HEAD(,OsTaskVar) pcb_head;\r
/* Ready queue */\r
- TAILQ_HEAD(,OsPcb) ready_head;\r
+ TAILQ_HEAD(,OsTaskVar) ready_head;\r
+\r
+// TAILQ_HEAD(,OsIsrVar) isrHead;\r
\r
/* Occording to OSEK 8.3 RES_SCHEDULER is accessible to all tasks */\r
OsResourceType resScheduler;\r
-} sys_t;\r
+} Os_SysType;\r
\r
-extern sys_t os_sys;\r
+extern Os_SysType Os_Sys;\r
\r
-static inline OsPcbType *Os_TaskGetCurrent( void ) {\r
- return os_sys.curr_pcb;\r
+static inline OsTaskVarType *Os_TaskGetCurrent( void ) {\r
+ return Os_Sys.currTaskPtr;\r
}\r
\r
#if 0\r
static uint32_t OSErrorGetServiceId( void ) {\r
- return os_sys.serviceId;\r
+ return Os_Sys.serviceId;\r
}\r
#endif\r
\r
#include "Ramlog.h"\r
\r
static inline void os_pcb_print_rq( void ) {\r
- OsPcbType *i_pcb;\r
+ OsTaskVarType *i_pcb;\r
int cnt = 0;\r
\r
- TAILQ_FOREACH(i_pcb,&os_sys.ready_head,ready_list) {\r
+ TAILQ_FOREACH(i_pcb,&Os_Sys.ready_head,ready_list) {\r
//printf("%02d: %02d %s\n",cnt,i_pcb->state,i_pcb->name);\r
cnt++;\r
// assert( i_pcb->state == ST_READY );\r
}\r
\r
// schedule()\r
-static inline void Os_TaskRunningToReady( OsPcbType *pcb ) {\r
+static inline void Os_TaskRunningToReady( OsTaskVarType *pcb ) {\r
assert(pcb->state == ST_RUNNING );\r
pcb->state = ST_READY;\r
}\r
\r
// ActivateTask(pid)\r
// SetEvent(pid)\r
-static inline void Os_TaskMakeReady( OsPcbType *pcb ) {\r
+static inline void Os_TaskMakeReady( OsTaskVarType *pcb ) {\r
if( !( pcb->state & ( ST_READY | ST_RUNNING )) ) {\r
pcb->state = ST_READY;\r
- TAILQ_INSERT_TAIL(& os_sys.ready_head,pcb,ready_list);\r
+ TAILQ_INSERT_TAIL(& Os_Sys.ready_head,pcb,ready_list);\r
OS_DEBUG(D_TASK,"Added %s to ready list\n",pcb->name);\r
}\r
}\r
\r
// WaitEvent\r
-static inline void Os_TaskMakeWaiting( OsPcbType *pcb )\r
+static inline void Os_TaskMakeWaiting( OsTaskVarType *pcb )\r
{\r
assert( pcb->state & (ST_READY|ST_RUNNING) );\r
\r
pcb->state = ST_WAITING;\r
- TAILQ_REMOVE(&os_sys.ready_head,pcb,ready_list);\r
+ TAILQ_REMOVE(&Os_Sys.ready_head,pcb,ready_list);\r
OS_DEBUG(D_TASK,"Removed %s from ready list\n",pcb->name);\r
}\r
\r
// Terminate task\r
-static inline void Os_TaskMakeSuspended( OsPcbType *pcb )\r
+static inline void Os_TaskMakeSuspended( OsTaskVarType *pcb )\r
{\r
assert( pcb->state & (ST_READY|ST_RUNNING) );\r
pcb->state = ST_SUSPENDED;\r
- TAILQ_REMOVE(&os_sys.ready_head,pcb,ready_list);\r
+ TAILQ_REMOVE(&Os_Sys.ready_head,pcb,ready_list);\r
OS_DEBUG(D_TASK,"Removed %s from ready list\n",pcb->name);\r
}\r
\r
*\r
* @params pcb Ptr to pcb\r
*/\r
-static inline void Os_TaskMakeRunning( OsPcbType *pcb ) {\r
+static inline void Os_TaskMakeRunning( OsTaskVarType *pcb ) {\r
pcb->state = ST_RUNNING;\r
}\r
\r
-_Bool os_pcb_pid_valid( OsPcbType *restrict pcb );\r
+_Bool os_pcb_pid_valid( OsTaskVarType *restrict pcb );\r
void Os_TaskStartExtended( void );\r
void Os_TaskStartBasic( void );\r
-void Os_ContextInit( OsPcbType *pcb );\r
-OsPcbType *Os_TaskGetTop( void );\r
+void Os_TaskContextInit( OsTaskVarType *pcb );\r
+OsTaskVarType *Os_TaskGetTop( void );\r
\r
// Added by Mattias in order to avoid compiler warning\r
-TaskType Os_AddTask( OsPcbType *pcb );\r
+TaskType Os_AddTask( OsTaskVarType *pcb );\r
\r
#if 0 // Not used any more\r
-OsPcbType *os_find_higher_priority_task( OsPriorityType prio );\r
+OsTaskVarType *os_find_higher_priority_task( OsPriorityType prio );\r
#endif\r
\r
\r
\r
\r
-extern OsPcbType pcb_list[];\r
-extern const OsRomPcbType rom_pcb_list[];\r
+extern OsTaskVarType Os_TaskVarList[OS_TASK_CNT];\r
+extern OsTaskConstType Os_TaskConstList[OS_TASK_CNT];\r
\r
-static inline OsPcbType * os_get_pcb( OsTaskidType pid ) {\r
- return &pcb_list[pid];\r
+static inline OsTaskVarType * Os_TaskGet( TaskType pid ) {\r
+ return &Os_TaskVarList[pid];\r
}\r
\r
-static inline const OsRomPcbType * os_get_rom_pcb( OsTaskidType pid ) {\r
- return &rom_pcb_list[pid];\r
+static inline ApplicationType Os_TaskGetApplicationOwner( TaskType id ) {\r
+ return Os_TaskGet(id)->constPtr->applOwnerId;\r
}\r
\r
-static inline OsPriorityType os_pcb_set_prio( OsPcbType *pcb, OsPriorityType new_prio ) {\r
+\r
+#if 0\r
+extern const OsTaskConstType Os_TaskConstList[];\r
+static inline const OsTaskConstType * os_get_rom_pcb( OsTaskidType pid ) {\r
+ return & Os_TaskConstList[pid];\r
+}\r
+#endif\r
+\r
+\r
+#if 0\r
+static inline OsPriorityType os_pcb_set_prio( OsTaskVarType *pcb, OsPriorityType new_prio ) {\r
OsPriorityType old_prio;\r
old_prio = pcb->prio;\r
pcb->prio = new_prio;\r
//printf("set_prio of %s to %d from %d\n",pcb->name,new_prio,pcb->prio);\r
return old_prio;\r
}\r
+#endif\r
\r
#define os_pcb_get_state(pcb) ((pcb)->state)\r
\r
-void Os_TaskSwapContext(OsPcbType *old_pcb, OsPcbType *new_pcb );\r
-void Os_TaskSwapContextTo(OsPcbType *old_pcb, OsPcbType *new_pcb );\r
+void Os_TaskSwapContext(OsTaskVarType *old_pcb, OsTaskVarType *new_pcb );\r
+void Os_TaskSwapContextTo(OsTaskVarType *old_pcb, OsTaskVarType *new_pcb );\r
\r
\r
#endif /*TASK_I_H_*/\r
* for more details.
* -------------------------------- Arctic Core ------------------------------*/
-
+/* ----------------------------[includes]------------------------------------*/
#include <stdlib.h>
#include <string.h>
#include "Os.h"
#include "debug.h"
#include "arch.h"
-extern void Os_CfgGetInterruptStackInfo( OsStackType *stack );
-extern uint32_t McuE_GetSystemClock( void );
-extern OsTickType OsTickFreq;
-
-sys_t os_sys;
+/* ----------------------------[private define]------------------------------*/
+/* ----------------------------[private macro]-------------------------------*/
+/* ----------------------------[private typedef]-----------------------------*/
+/* ----------------------------[private function prototypes]-----------------*/
+/* ----------------------------[private variables]---------------------------*/
+Os_SysType Os_Sys;
Os_IntCounterType Os_IntDisableAllCnt;
Os_IntCounterType Os_IntSuspendAllCnt;
Os_IntCounterType Os_IntSuspendOsCnt;
+/* ----------------------------[private functions]---------------------------*/
+/* ----------------------------[public functions]----------------------------*/
+
+extern uint32_t McuE_GetSystemClock( void );
+extern OsTickType OsTickFreq;
+
/**
* Copy rom pcb data(r_pcb) to ram data
* @param r_pcb rom data
*/
-static void os_pcb_rom_copy( OsPcbType *pcb, const OsRomPcbType *r_pcb ) {
+static void copyPcbParts( OsTaskVarType *pcb, const OsTaskConstType *r_pcb ) {
+
+ /* Copy VAR stuff first */
+
+
+
#if 0 //?????
// Check to that the memory is ok
{
- int cnt = sizeof(OsPcbType);
+ int cnt = sizeof(OsTaskVarType);
for(int i=0;i<cnt;i++) {
if( *((unsigned char *)pcb) != 0 ) {
while(1);
}
#endif
-// memset(pcb,sizeof(OsPcbType),0);
- pcb->pid = r_pcb->pid;
- pcb->prio = r_pcb->prio;
-#if ( OS_SC3 == STD_ON ) || ( OS_SC4 == STD_ON )
- pcb->application = Os_CfgGetApplObj(r_pcb->application_id);
+// memset(pcb,sizeof(OsTaskVarType),0);
+// pcb->pid = r_pcb->pid;
+ assert(r_pcb->prio<=OS_TASK_PRIORITY_MAX);
+ pcb->activePriority = r_pcb->prio;
+#if (OS_USE_APPLICATIONS == STD_ON)
+// pcb->accessingApp = Os_CfgGetApplObj(r_pcb->application_id);
#endif
- pcb->entry = r_pcb->entry;
- pcb->proc_type = r_pcb->proc_type;
- pcb->autostart = r_pcb->autostart;
+// pcb->entry = r_pcb->entry;
+// pcb->proc_type = r_pcb->proc_type;
+// pcb->autostart = r_pcb->autostart;
pcb->stack= r_pcb->stack;
- pcb->pcb_rom_p = r_pcb;
- pcb->resource_int_p = r_pcb->resource_int_p;
- pcb->scheduling = r_pcb->scheduling;
- pcb->resourceAccess = r_pcb->resourceAccess;
- pcb->activationLimit = r_pcb->activationLimit;
+ pcb->constPtr = r_pcb;
+// pcb->resourceIntPtr = r_pcb->resourceIntPtr;
+// pcb->scheduling = r_pcb->scheduling;
+// pcb->resourceAccess = r_pcb->resourceAccess;
+// pcb->activationLimit = r_pcb->activationLimit;
// pcb->app = &app_list[r_pcb->app];
// pcb->app_mask = app_mask[r_pcb->app];
- strncpy(pcb->name,r_pcb->name,16);
- pcb->name[15] = '\0';
+// strncpy(pcb->name,r_pcb->name,16);
+// pcb->name[15] = '\0';
}
static _Bool init_os_called = 0;
void InitOS( void ) {
int i;
- OsPcbType *tmp_pcb;
- OsStackType int_stack;
+ OsTaskVarType *tmpPcbPtr;
+ OsIsrStackType intStack;
init_os_called = 1;
DEBUG(DEBUG_LOW,"os_init");
/* Clear sys */
- memset(&os_sys,0,sizeof(sys_t));
+ memset(&Os_Sys,0,sizeof(Os_SysType));
Os_ArchInit();
// Assign pcb list and init ready queue
- os_sys.pcb_list = pcb_list;
- TAILQ_INIT(& os_sys.ready_head);
- TAILQ_INIT(& os_sys.pcb_head);
+ Os_Sys.pcb_list = Os_TaskVarList;
+ TAILQ_INIT(& Os_Sys.ready_head);
+// TAILQ_INIT(& Os_Sys.pcb_head);
#if defined(USE_KERNEL_EXTRA)
TAILQ_INIT(& os_sys.timerHead);
#endif
// Calc interrupt stack
- Os_CfgGetInterruptStackInfo(&int_stack);
+ Os_IsrGetStackInfo(&intStack);
// TODO: 16 is arch dependent
- os_sys.int_stack = int_stack.top + int_stack.size - 16;
+ Os_Sys.intStack = (void *)((size_t)intStack.top + (size_t)intStack.size - 16);
// Init counter.. with alarms and schedule tables
#if OS_COUNTER_CNT!=0
// TODO: we should really hash on priority here to get speed, but I don't care for the moment
// TODO: Isn't this just EXTENED tasks ???
for( i=0; i < OS_TASK_CNT; i++) {
- tmp_pcb = os_get_pcb(i);
+ tmpPcbPtr = Os_TaskGet(i);
- assert(tmp_pcb->prio<=OS_TASK_PRIORITY_MAX);
+ copyPcbParts(tmpPcbPtr,&Os_TaskConstList[i]);
- os_pcb_rom_copy(tmp_pcb,os_get_rom_pcb(i));
- if( !(tmp_pcb->proc_type & PROC_ISR) ) {
- Os_ContextInit(tmp_pcb);
+#if 1
+ Os_TaskContextInit(tmpPcbPtr);
+#else
+ if( !(tmpPcbPtr->constPtr->proc_type & PROC_ISR) ) {
+ Os_TaskContextInit(tmpPcbPtr);
}
+#endif
- TAILQ_INIT(&tmp_pcb->resource_head);
+ TAILQ_INIT(&tmpPcbPtr->resourceHead);
- Os_AddTask(tmp_pcb);
+#if 0
+ Os_AddTask(tmpPcbPtr);
+#endif
- DEBUG(DEBUG_LOW,"pid:%d name:%s prio:%d\n",tmp_pcb->pid,tmp_pcb->name,tmp_pcb->prio);
+ DEBUG(DEBUG_LOW,"pid:%d name:%s prio:%d\n",tmpPcbPtr->pid,tmpPcbPtr->name,tmpPcbPtr->prio);
}
Os_ResourceInit();
}
static void os_start( void ) {
- OsPcbType *tmp_pcb;
+ uint16_t i;
+ OsTaskVarType *tmpPcbPtr = NULL;
// We will be setting up interrupts,
// but we don't want them to fire just yet
/* TODO: fix ugly */
/* Call the startup hook */
extern struct OsHooks os_conf_global_hooks;
- os_sys.hooks = &os_conf_global_hooks;
- if( os_sys.hooks->StartupHook!=NULL ) {
- os_sys.hooks->StartupHook();
+ Os_Sys.hooks = &os_conf_global_hooks;
+ if( Os_Sys.hooks->StartupHook!=NULL ) {
+ Os_Sys.hooks->StartupHook();
}
+
+#if (OS_USE_APPLICATIONS == STD_ON)
+ /* Start applications */
+ Os_ApplStart();
+#endif
+
+
/* Alarm autostart */
#if OS_ALARM_CNT!=0
Os_AlarmAutostart();
/* Find highest Autostart task */
{
- OsPcbType *iterPcbPtr;
+ OsTaskVarType *iterPcbPtr;
OsPriorityType topPrio = -1;
- TAILQ_FOREACH(iterPcbPtr,& os_sys.pcb_head,pcb_list) {
- if( iterPcbPtr->autostart ) {
- if( iterPcbPtr->prio > topPrio ) {
- tmp_pcb = iterPcbPtr;
- topPrio = iterPcbPtr->prio;
+ for(i=0;i<OS_TASK_CNT;i++) {
+ iterPcbPtr = Os_TaskGet(i);
+ if( iterPcbPtr->constPtr->autostart ) {
+ if( iterPcbPtr->activePriority > topPrio ) {
+ tmpPcbPtr = iterPcbPtr;
+ topPrio = iterPcbPtr->activePriority;
+ }
+ }
+ }
+#if 0
+ TAILQ_FOREACH(iterPcbPtr,& Os_Sys.pcb_head,pcb_list) {
+ if( iterPcbPtr->constPtr->autostart ) {
+ if( iterPcbPtr->activePriority > topPrio ) {
+ tmpPcbPtr = iterPcbPtr;
+ topPrio = iterPcbPtr->activePriority;
}
}
}
+#endif
}
// Swap in prio proc.
{
- // FIXME: Do this in a more structured way.. setting os_sys.curr_pcb manually is not the way to go..
- os_sys.curr_pcb = tmp_pcb;
+ // FIXME: Do this in a more structured way.. setting Os_Sys.currTaskPtr manually is not the way to go..
+ Os_Sys.currTaskPtr = tmpPcbPtr;
+#if (OS_USE_APPLICATIONS == STD_ON)
+ /* Set current application */
+ Os_Sys.currApplId = tmpPcbPtr->constPtr->applOwnerId;
+#endif
// register this auto-start activation
- assert(tmp_pcb->activations < tmp_pcb->activationLimit);
- tmp_pcb->activations++;
+ assert(tmpPcbPtr->activations < tmpPcbPtr->constPtr->activationLimit);
+ tmpPcbPtr->activations++;
// NOTE! We don't go for os_swap_context() here..
// first arg(NULL) is dummy only
- Os_TaskSwapContextTo(NULL,tmp_pcb);
+ Os_TaskSwapContextTo(NULL,tmpPcbPtr);
// We should not return here
assert(0);
}
noooo();
}
- os_sys.appMode = Mode;
+ Os_Sys.appMode = Mode;
Os_CfgValidate();
/** @req OS071 */
void ShutdownOS( StatusType Error ) {
- if( os_sys.hooks->ShutdownHook != NULL ) {
- os_sys.hooks->ShutdownHook(Error);
+ if( Os_Sys.hooks->ShutdownHook != NULL ) {
+ Os_Sys.hooks->ShutdownHook(Error);
}
Irq_Disable();
* for more details.
* -------------------------------- Arctic Core ------------------------------*/
+
#include <sys/types.h>
#include <stdint.h>
#include <string.h>
+#include "Compiler.h"
#include "internal.h"
+#include "isr.h"
#include "irq.h"
-#if 0
+//#include "irq_config.h"
-#include <stdint.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <sys/queue.h>
-#include <string.h>
-#include "internal.h"
+extern const uint8_t Os_VectorToIsr[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];
+extern const OsIsrConstType Os_IsrConstList[OS_ISR_CNT];
+#if OS_ISR_MAX_CNT!=0
+OsIsrVarType Os_IsrVarList[OS_ISR_MAX_CNT];
#endif
+SECTION_BALIGN(0x10) uint8_t Os_IsrStack[OS_INTERRUPT_STACK_SIZE];
// TODO: remove. Make soft links or whatever
#if defined(CFG_ARM_CM3)
#define os_alloc(_x) sbrk(_x)
-OsPcbType * os_alloc_new_pcb( void ) {
- void *h = os_alloc(sizeof(OsPcbType));
- memset(h,0,sizeof(OsPcbType));
+OsTaskVarType * os_alloc_new_pcb( void ) {
+ void *h = os_alloc(sizeof(OsTaskVarType));
+ memset(h,0,sizeof(OsTaskVarType));
assert(h!=NULL);
return h;
}
-#if 0
-typedef void (*Os_IsrEntryType)(void);
+//extern TaskType Os_AddTask( OsTaskVarType *pcb );
+
+//static uint8 stackTop = 0x42;
-typedef Os_IsrInfo_s {
- Os_IsrEntryType entry;
- uint32_t vector;
- uint8_t priority;
-} Os_IsrInfoType;
-#endif
-extern TaskType Os_AddTask( OsPcbType *pcb );
+void Os_IsrInit( void ) {
+
+ Irq_Init();
+
+ /* Attach the interrupts */
+ for (int i = 0; i < sizeof(Os_IsrConstList) / sizeof(OsIsrConstType); i++) {
+ Os_IsrAdd(&Os_IsrConstList[i]);
+ }
+}
-static uint8 stackTop = 0x42;
/**
- * Creates an ISR dynamically
- * @param entry
- * @param prio
- * @param name
+ * Adds an ISR to a list of Isr's. The ISRType (id) is returned
+ * for the "created" ISR.
*
- * @return The PID of the ISR created
+ * @param isrPtr Pointer to const data holding ISR information.
+ * @return
*/
-TaskType Os_Arc_CreateIsr( void (*entry)(void ), uint8_t prio, const char *name )
-{
- OsPcbType *pcb = os_alloc_new_pcb();
- strncpy(pcb->name,name,TASK_NAME_SIZE);
- pcb->vector = -1;
- pcb->prio = prio;
- /* TODO: map to interrupt controller priority */
- assert(prio<=OS_TASK_PRIORITY_MAX);
- pcb->proc_type = PROC_ISR2;
- pcb->state = ST_SUSPENDED;
- pcb->entry = entry;
- pcb->stack.top = &stackTop;
-
- return Os_AddTask(pcb);
+ISRType Os_IsrAdd( const OsIsrConstType * restrict isrPtr ) {
+ ISRType id;
+
+ id = Os_Sys.isrCnt++;
+ /* We have no VAR entires for ISR1 */
+ if( isrPtr->type == ISR_TYPE_2) {
+ Os_IsrVarList[id].constPtr = isrPtr;
+ }
+
+ Irq_EnableVector( isrPtr->vector, isrPtr->priority, Os_ApplGetCore(isrPtr->appOwner ) );
+
+ return id;
+}
+
+const OsIsrConstType * Os_IsrGet( int16_t vector) {
+ return &Os_IsrConstList[Os_VectorToIsr[vector]];
+}
+
+#if 0
+void Os_IsrDisable( ISRType isr) {
+
}
+void Os_IsrEnable( ISRType isr) {
+
+}
+#endif
+
+
+/*
+ * Resources:
+ * Irq_VectorTable[]
+ * Irq_IsrTypeTable[]
+ * Irq_PriorityTable[]
+ *
+ * exception table
+ * interrupt table
+ *
+ * Usual HW resources.
+ * - prio in HW (ppc and arm (even cortex m4))
+ *
+ *
+ * TOOL GENERATES ALL
+ * Irq_VectorTable CONST
+ * Irq_IsrTypeTable CONST
+ * Irq_PriorityTable CONST Can probably be a table with ISR_MAX number
+ * of for a CPU with prio registers. For masking
+ * CPUs it's better to keep an array to that indexing
+ * can be used.
+ *
+ * The problem with this approach is that the tool needs to know everything.
+ *
+ * TOOL GENERATES PART
+ * Irq_VectorTable VAR Since we must add vectors later
+ * Irq_IsrTypeTable VAR Since we must add vectors later
+ * Irq_PriorityTable VAR
+ *
+ * We move the
+ *
+ */
+
+
+
/**
* Before we have proper editor for ISR2 use this function to add resources
* to an ISR2
void TailChaining(void *stack)
{
- struct OsPcb *pPtr = NULL;
+ struct OsTaskVar *pPtr = NULL;
POSTTASKHOOK();
Os_StackPerformCheck(pPtr);
/* We interrupted a task */
- OsPcbType *new_pcb = Os_TaskGetTop();
+ OsTaskVarType *new_pcb = Os_TaskGetTop();
Os_StackPerformCheck(new_pcb);
- if( (new_pcb == os_sys.curr_pcb) ||
- (os_sys.curr_pcb->scheduling == NON) ||
+ if( (new_pcb == Os_Sys.currTaskPtr) ||
+ (Os_Sys.currTaskPtr->scheduling == NON) ||
!Os_SchedulerResourceIsFree() )
{
/* Just bring the preempted task back to running */
- Os_TaskSwapContextTo(NULL,os_sys.curr_pcb);
+ Os_TaskSwapContextTo(NULL,Os_Sys.currTaskPtr);
} else {
OS_DEBUG(D_TASK,"Found candidate %s\n",new_pcb->name);
Os_TaskSwapContextTo(NULL,new_pcb);
void Os_Isr_cm3( void *isr_p ) {
- struct OsPcb *isrPtr;
+ struct OsTaskVar *isrPtr;
- os_sys.int_nest_cnt++;
+ Os_Sys.intNestCnt++;
/* Grab the ISR "pcb" */
- isrPtr = (struct OsPcb *)isr_p;
+ isrPtr = (struct OsTaskVar *)isr_p;
isrPtr->state = ST_RUNNING;
if( isrPtr->proc_type & ( PROC_EXTENDED | PROC_BASIC ) ) {
Irq_EOI();
- --os_sys.int_nest_cnt;
+ --Os_Sys.intNestCnt;
/* Scheduling is done in PendSV handler for ARM CM3 */
*((uint32_t volatile *)0xE000ED04) = 0x10000000; // PendSV
}
#endif
+/*-----------------------------------------------------------------*/
+
+void Os_IsrGetStackInfo( OsIsrStackType *stack ) {
+ stack->top = Os_IsrStack;
+ stack->size = sizeof(Os_IsrStack);
+}
+
+
/**
* Handle ISR type 2 interrupts from interrupt controller.
*
- * @param stack Ptr to the current stack
- * @param vector The vector that took the interrupt
+ * @param stack Pointer to the current stack
+ * @param vector
*/
-void *Os_Isr( void *stack, void *isr_p ) {
- struct OsPcb *isrPtr;
- struct OsPcb *pPtr = NULL;
+void *Os_Isr( void *stack, int16_t vector ) {
+ uint8_t isrId = Os_VectorToIsr[vector];
+ OsTaskVarType *taskPtr = NULL;
/* Check if we interrupted a task or ISR */
- if( os_sys.int_nest_cnt == 0 ) {
+ if( Os_Sys.intNestCnt == 0 ) {
/* We interrupted a task */
POSTTASKHOOK();
/* Save info for preempted pcb */
- pPtr = get_curr_pcb();
- pPtr->stack.curr = stack;
- pPtr->state = ST_READY;
- OS_DEBUG(D_TASK,"Preempted %s\n",pPtr->name);
+ taskPtr = get_curr_pcb();
+ taskPtr->stack.curr = stack;
+ taskPtr->state = ST_READY;
+ OS_DEBUG(D_TASK,"Preempted %s\n",taskPtr->name);
- Os_StackPerformCheck(pPtr);
+ Os_StackPerformCheck(taskPtr);
} else {
/* We interrupted an ISR */
}
- os_sys.int_nest_cnt++;
+ Os_Sys.intNestCnt++;
/* Grab the ISR "pcb" */
- isrPtr = (struct OsPcb *)isr_p;
- isrPtr->state = ST_RUNNING;
-
- if( isrPtr->proc_type & ( PROC_EXTENDED | PROC_BASIC ) ) {
- assert(0);
- }
+ Os_IsrVarList[isrId].state = ST_ISR_RUNNING;
Irq_SOI();
-#if !defined(CFG_HCS12D)
+#if defined(CFG_HCS12D)
+ Os_IsrConstList[isrId].entry();
+#else
Irq_Enable();
- isrPtr->entry();
+ Os_IsrConstList[isrId].entry();
Irq_Disable();
-#else
- isrPtr->entry();
#endif
/* Check so that ISR2 haven't disabled the interrupts */
/* Check so that the ISR2 have called ReleaseResource() for each GetResource() */
/** @req OS369 */
- if( Os_TaskOccupiesResources(isrPtr) ) {
- Os_ResourceFreeAll(isrPtr);
+ if( Os_TaskOccupiesResources(taskPtr) ) {
+ Os_ResourceFreeAll(taskPtr);
ERRORHOOK(E_OS_RESOURCE);
}
- isrPtr->state = ST_SUSPENDED;
+ Os_IsrVarList[isrId].state = ST_ISR_NOT_RUNNING;
Irq_EOI();
- --os_sys.int_nest_cnt;
+ --Os_Sys.intNestCnt;
#if defined(CFG_ARM_CM3)
/* Scheduling is done in PendSV handler for ARM CM3 */
*((uint32_t volatile *)0xE000ED04) = 0x10000000; // PendSV
#else
// We have preempted a task
- if( (os_sys.int_nest_cnt == 0) ) {
- OsPcbType *new_pcb = Os_TaskGetTop();
+ if( (Os_Sys.intNestCnt == 0) ) {
+ OsTaskVarType *new_pcb = Os_TaskGetTop();
Os_StackPerformCheck(new_pcb);
- if( (new_pcb == os_sys.curr_pcb) ||
- (os_sys.curr_pcb->scheduling == NON) ||
+ if( (new_pcb == Os_Sys.currTaskPtr) ||
+ (Os_Sys.currTaskPtr->constPtr->scheduling == NON) ||
!Os_SchedulerResourceIsFree() )
{
/* Just bring the preempted task back to running */
- os_sys.curr_pcb->state = ST_RUNNING;
+ Os_Sys.currTaskPtr->state = ST_RUNNING;
PRETASKHOOK();
} else {
OS_DEBUG(D_TASK,"Found candidate %s\n",new_pcb->name);
\r
#include <stddef.h>\r
\r
-#define DECLARE(sym,val) \\r
- __asm("#define " #sym " %0" : : "i" ((val)))\r
-\r
#include "Os.h"\r
#include "kernel.h"\r
#include "pcb.h"\r
//#include "app_i.h"\r
#include "sys.h"\r
+#include "application.h"\r
\r
\r
+#if defined(__GNUC__)\r
+\r
+#define DECLARE(sym,val) \\r
+ __asm("#define " #sym " %0" : : "i" ((val)))\r
\r
void oil_foo(void) {\r
\r
- DECLARE(PCB_T_SIZE, sizeof(OsPcbType));\r
-#if ( OS_SC3 == STD_ON ) || ( OS_SC4 == STD_ON )\r
- DECLARE(APP_T_SIZE, sizeof(OsApplicationType));\r
+/* PCB */\r
+\r
+#elif defined(__CWCC__)\r
+#define DECLARE(_var,_offset) \\r
+ __declspec(section ".apa") char _var[100+(_offset)]\r
+#pragma section ".apa" ".apa"\r
+#endif\r
+\r
+\r
+ DECLARE(PCB_T_SIZE, sizeof(OsTaskVarType));\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+// DECLARE(APP_T_SIZE, sizeof(OsApplicationType));\r
+\r
#endif\r
- DECLARE(PCB_STACK_CURR_P, offsetof(OsPcbType, stack));\r
- DECLARE(PCB_ENTRY_P, offsetof(OsPcbType, entry));\r
- DECLARE(SYS_CURR_PCB_P, offsetof(sys_t, curr_pcb));\r
- DECLARE(SYS_INT_NEST_CNT, offsetof(sys_t, int_nest_cnt));\r
- DECLARE(SYS_INT_STACK, offsetof(sys_t, int_stack));\r
+ DECLARE(PCB_STACK_CURR_P, offsetof(OsTaskVarType, stack));\r
+ DECLARE(PCB_ENTRY_P, offsetof(OsTaskVarType, entry));\r
+ DECLARE(SYS_CURR_PCB_P, offsetof(Os_SysType, currTaskPtr));\r
+ DECLARE(SYS_INT_NEST_CNT, offsetof(Os_SysType, intNestCnt));\r
+ DECLARE(SYS_INT_STACK, offsetof(Os_SysType, intStack));\r
+#if defined(__GNUC__)\r
}\r
+#endif\r
\r
obj-y += irq.o\r
\r
# We are compiling the kernel\r
+dep-$(CFG_PPC) += arch_offset.h\r
dep-y += asm_offset.h\r
-dep-y += kernel_offset.h\r
+#dep-y += kernel_offset.h\r
dep-$(CFG_ARM_CM3) += arch_offset.h\r
\r
\r
+ifeq ($(COMPILER),gcc)\r
# ARM assembler generates "define STACK_APA $12". The extra '$' we want to go.\r
# Assembler offsets\r
%_offset.h: %_offset.c\r
@echo " >> generating $@ from $<"\r
- $(Q)$(CC) -S $(CFLAGS) -o $(@:.h=.s) $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
+ $(Q)$(CC) -S $(CFLAGS) -o $(@:.h=.s) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
$(Q)gawk '/.*define/ { print $$1 " " $$2 " " gensub("#","","g",$$3) }' $(@:.h=.s) > $@\r
\r
# Assembler offsets\r
asm_offset.h: asm_offset.c\r
@echo " >> asm offset gen $<"\r
- $(Q)$(CC) -S $(CFLAGS) -o $(<:.c=.s) $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $< \r
+ $(Q)$(CC) -S $(CFLAGS) -o $(<:.c=.s) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $< \r
@$(SED) -n "/#define/p" $(<:.c=.s) > $@\r
@rm $(<:.c=.s)\r
- \r
+endif\r
+\r
+ifeq ($(COMPILER),cw)\r
+# The "\r" in the awk is a little strang...sed and awk if that does not work \r
+# sed -e '/.apa/!d' -e '/OBJ/!d' -e 's/\[//' 123.tmp | gawk '{ print "#define " $9 " " $4 }'\r
+\r
+%_offset.h: %_offset.c\r
+ @echo " >> generating $@ from $<"\r
+ $(Q)$(CC) -dis $(CFLAGS) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $< > 123.tmp\r
+ gawk '$$9 ~/.apa/ && $$0 ~/OBJ/ { gsub(/\r/,""); printf("#define %s %d\n",$$10,$$5-100) }' 123.tmp > $@\r
+endif\r
+\r
#VPATH += ..\r
VPATH += $(ROOTDIR)/system/kernel\r
VPATH += $(ROOTDIR)/arch/$(ARCH_FAM)/$(ARCH)/kernel\r
\r
#include "Os.h"\r
\r
-\r
-/* See 8.4.4 */\r
-AccessType CheckISRMemoryAccess( ISRType ISRID,\r
- MemoryStartAddressType Address,\r
- MemorySizeType Size )\r
-{\r
- // get hold of application memory space\r
-\r
-\r
-}\r
-\r
-AccessType CheckTaskMemoryAccess( TaskType TaskID,\r
- MemoryStartAddressType Address,\r
- MemorySizeType Size )\r
-{\r
-\r
-\r
-}\r
-\r
-/* Object access\r
- *\r
- *\r
- * resource\r
- *\r
- *\r
- */\r
-\r
-\r
-\r
-\r
-/* This is probably macros */\r
-ObjectAccessType CheckObjectAccess( ApplicationType ApplID,\r
- ObjectTypeType ObjectType,\r
- void *object )\r
-{\r
- uint32 app_mask = (1<<ApplID);\r
- uint32 rv;\r
-\r
- /* TODO: check id */\r
- switch( ObjectType ) {\r
- case OBJECT_ALARM:\r
- rv = ((OsAlarmType *)object)->app_mask & (app_mask);\r
- break;\r
- case OBJECT_COUNTER:\r
- rv = ((OsCounterType *)object)->app_mask & (app_mask);\r
- break;\r
- case OBJECT_ISR:\r
- break;\r
- case OBJECT_MESSAGE:\r
- case OBJECT_RESOURCE:\r
- case OBJECT_SCHEDULETABLE:\r
- break;\r
- case OBJECT_TASK:\r
- rv = ((OsCounterType *)object)->app_mask & (app_mask);\r
- break;\r
- default:\r
- break;\r
- }\r
-\r
-\r
-\r
-\r
- return ACCESS;\r
-}\r
-\r
-/* return application id for object */\r
-ApplicationType CheckObjectOwnership( ObjectTypeType ObjectType,\r
- void *object )\r
-{\r
- switch( ObjectType ) {\r
- case OBJECT_ALARM:\r
- case OBJECT_COUNTER:\r
- case OBJECT_ISR:\r
- case OBJECT_MESSAGE:\r
- case OBJECT_RESOURCE:\r
- case OBJECT_SCHEDULETABLE:\r
- case OBJECT_TASK:\r
- default:\r
- break;\r
- }\r
-\r
- return (-1);\r
-}\r
\r
int Os_ArcTest_GetTaskActivationLimit( TaskType TaskId ) {\r
\r
- return os_get_pcb(TaskId)->activationLimit;\r
+ return Os_TaskGet(TaskId)->constPtr->activationLimit;\r
}\r
\r
/**\r
\r
void Os_ArcTest_SetIrqNestLevel( int level ) {\r
\r
- os_sys.int_nest_cnt = level;\r
+ Os_Sys.intNestCnt = level;\r
\r
return;\r
}\r
\r
task.rsrcAccessMask & (1 << RES_SCHEDULER)\r
\r
- *
+ *\r
*/\r
\r
/* INFO\r
#define valid_internal_id() (rPtr->nr < OS_RESOURCE_CNT) //&& (rPtr->type == RESOURCE_TYPE_INTERNAL) )\r
\r
\r
-void Os_ResourceAlloc( OsResourceType *rPtr, OsPcbType *pcbPtr) {\r
+void Os_ResourceAlloc( OsResourceType *rPtr, OsTaskVarType *pcbPtr) {\r
/* Save old task prio in resource and set new task prio */\r
- rPtr->owner = pcbPtr->pid;\r
- rPtr->old_task_prio = pcbPtr->prio;\r
- pcbPtr->prio = rPtr->ceiling_priority;\r
+ rPtr->owner = pcbPtr->constPtr->pid;\r
+ rPtr->old_task_prio = pcbPtr->activePriority;\r
+ pcbPtr->activePriority = rPtr->ceiling_priority;\r
\r
if( rPtr->type != RESOURCE_TYPE_INTERNAL ) {\r
- TAILQ_INSERT_TAIL(&pcbPtr->resource_head, rPtr, listEntry);\r
+ TAILQ_INSERT_TAIL(&pcbPtr->resourceHead, rPtr, listEntry);\r
}\r
}\r
\r
-void Os_ResourceFree( OsResourceType *rPtr , OsPcbType *pcbPtr) {\r
- assert( rPtr->owner == pcbPtr->pid );\r
+void Os_ResourceFree( OsResourceType *rPtr , OsTaskVarType *pcbPtr) {\r
+ assert( rPtr->owner == pcbPtr->constPtr->pid );\r
rPtr->owner = NO_TASK_OWNER;\r
- pcbPtr->prio = rPtr->old_task_prio;\r
+ pcbPtr->activePriority = rPtr->old_task_prio;\r
\r
if( rPtr->type != RESOURCE_TYPE_INTERNAL ) {\r
/* The list can't be empty here */\r
- assert( !TAILQ_EMPTY(&pcbPtr->resource_head) );\r
+ assert( !TAILQ_EMPTY(&pcbPtr->resourceHead) );\r
\r
/* The list should be popped in LIFO order */\r
- assert( TAILQ_LAST(&pcbPtr->resource_head, head) == rPtr );\r
+ assert( TAILQ_LAST(&pcbPtr->resourceHead, head) == rPtr );\r
\r
/* Remove the entry */\r
- TAILQ_REMOVE(&pcbPtr->resource_head, rPtr, listEntry);\r
+ TAILQ_REMOVE(&pcbPtr->resourceHead, rPtr, listEntry);\r
}\r
}\r
\r
\r
StatusType GetResource( ResourceType ResID ) {\r
StatusType rv = E_OK;\r
- OsPcbType *pcbPtr = Os_TaskGetCurrent();\r
+ OsTaskVarType *pcbPtr = Os_TaskGetCurrent();\r
OsResourceType *rPtr;\r
uint32_t flags;\r
\r
\r
if( ResID == RES_SCHEDULER ) {\r
\r
- rPtr = &os_sys.resScheduler;\r
+ rPtr = &Os_Sys.resScheduler;\r
} else {\r
/* Check we can access it */\r
- if( (pcbPtr->resourceAccess & (1<< ResID)) == 0 ) {\r
+ if( (pcbPtr->constPtr->resourceAccess & (1<< ResID)) == 0 ) {\r
rv = E_OS_ID;\r
goto err;\r
}\r
\r
/* Check for invalid configuration */\r
if( (rPtr->owner != NO_TASK_OWNER) ||\r
- (pcbPtr->prio > rPtr->ceiling_priority) )\r
+ (pcbPtr->activePriority > rPtr->ceiling_priority) )\r
{\r
rv = E_OS_ACCESS;\r
Irq_Restore(flags);\r
\r
StatusType ReleaseResource( ResourceType ResID) {\r
StatusType rv = E_OK;\r
- OsPcbType *pcbPtr = Os_TaskGetCurrent();\r
+ OsTaskVarType *pcbPtr = Os_TaskGetCurrent();\r
OsResourceType *rPtr;\r
uint32_t flags;\r
\r
Irq_Save(flags);\r
if( ResID == RES_SCHEDULER ) {\r
- rPtr = &os_sys.resScheduler;\r
+ rPtr = &Os_Sys.resScheduler;\r
} else {\r
/* Check we can access it */\r
- if( (pcbPtr->resourceAccess & (1<< ResID)) == 0 ) {\r
+ if( (pcbPtr->constPtr->resourceAccess & (1<< ResID)) == 0 ) {\r
rv = E_OS_ID;\r
goto err;\r
}\r
goto err;\r
}\r
\r
- if( (pcbPtr->prio < rPtr->ceiling_priority))\r
+ if( (pcbPtr->activePriority < rPtr->ceiling_priority))\r
{\r
rv = E_OS_ACCESS;\r
Irq_Restore(flags);\r
Os_ResourceFree(rPtr,pcbPtr);\r
\r
/* do a rescheduling (in some cases) (see OSEK OS 4.6.1) */\r
- if ( (pcbPtr->scheduling == FULL) &&\r
- (os_sys.int_nest_cnt == 0) &&\r
+ if ( (pcbPtr->constPtr->scheduling == FULL) &&\r
+ (Os_Sys.intNestCnt == 0) &&\r
(Os_SchedulerResourceIsFree()) ) {\r
\r
- OsPcbType* top_pcb = Os_TaskGetTop();\r
+ OsTaskVarType* top_pcb = Os_TaskGetTop();\r
\r
/* only dispatch if some other ready task has higher prio */\r
- if (top_pcb->prio > Os_TaskGetCurrent()->prio) {\r
+ if (top_pcb->activePriority > Os_TaskGetCurrent()->activePriority) {\r
Os_Dispatch(OP_RELEASE_RESOURCE);\r
}\r
}\r
\r
\r
void Os_ResourceGetInternal( void ) {\r
- OsPcbType *pcbPtr = Os_TaskGetCurrent();\r
- OsResourceType *rt = pcbPtr->resource_int_p;\r
+ OsTaskVarType *pcbPtr = Os_TaskGetCurrent();\r
+ OsResourceType *rt = pcbPtr->constPtr->resourceIntPtr;\r
\r
if( rt != NULL ) {\r
OS_DEBUG(D_RESOURCE,"Get IR proc:%s prio:%u old_task_prio:%u\n",\r
}\r
\r
void Os_ResourceReleaseInternal( void ) {\r
- OsPcbType *pcbPtr = Os_TaskGetCurrent();\r
- OsResourceType *rt = pcbPtr->resource_int_p;\r
+ OsTaskVarType *pcbPtr = Os_TaskGetCurrent();\r
+ OsResourceType *rt = pcbPtr->constPtr->resourceIntPtr;\r
\r
if( rt != NULL ) {\r
OS_DEBUG(D_RESOURCE,"Rel IR proc:%s prio:%u old_task_prio:%u\n",\r
* @return\r
*/\r
void Os_ResourceInit( void ) {\r
- //TAILQ_INIT(&pcb_p->resource_head);\r
- OsPcbType *pcb_p;\r
+ //TAILQ_INIT(&pcb_p->resourceHead);\r
+ OsTaskVarType *pcb_p;\r
OsResourceType *rsrc_p;\r
int topPrio;\r
\r
\r
/* For now, assign the scheduler resource here */\r
- os_sys.resScheduler.ceiling_priority = OS_RES_SCHEDULER_PRIO;\r
- strcpy(os_sys.resScheduler.id,"RES_SCHEDULER");\r
- os_sys.resScheduler.nr = RES_SCHEDULER;\r
- os_sys.resScheduler.owner = NO_TASK_OWNER;\r
+ Os_Sys.resScheduler.ceiling_priority = OS_RES_SCHEDULER_PRIO;\r
+ strcpy(Os_Sys.resScheduler.id,"RES_SCHEDULER");\r
+ Os_Sys.resScheduler.nr = RES_SCHEDULER;\r
+ Os_Sys.resScheduler.owner = NO_TASK_OWNER;\r
\r
/* Calculate ceiling priority\r
* We make this as simple as possible. The ceiling priority\r
\r
for( int pi = 0; pi < OS_TASK_CNT; pi++) {\r
\r
- pcb_p = os_get_pcb(pi);\r
+ pcb_p = Os_TaskGet(pi);\r
\r
\r
- if(pcb_p->resourceAccess & (1<<i) ) {\r
- topPrio = MAX(topPrio,pcb_p->prio);\r
+ if(pcb_p->constPtr->resourceAccess & (1<<i) ) {\r
+ topPrio = MAX(topPrio,pcb_p->constPtr->prio);\r
}\r
\r
/* Generator fix, add RES_SCHEDULER */\r
- pcb_p->resourceAccess |= (1 << RES_SCHEDULER) ;\r
+// pcb_p->constPtr->resourceAccess |= (1 << RES_SCHEDULER) ;\r
}\r
rsrc_p->ceiling_priority = topPrio;\r
}\r
const struct OsSchTblAutostart *autoPtr = sPtr->autostartPtr;\r
\r
/* Check appmode */\r
- if( os_sys.appMode & autoPtr->appMode ) {\r
+ if( Os_Sys.appMode & autoPtr->appMode ) {\r
\r
/* Start the schedule table */\r
switch(autoPtr->type) {\r
* for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+/* ----------------------------[includes]------------------------------------*/\r
+\r
#include <stdlib.h>\r
#include "Os.h"\r
\r
#include "arc.h"\r
#include "arch.h"\r
\r
+/* ----------------------------[private define]------------------------------*/\r
+/* ----------------------------[private macro]-------------------------------*/\r
+/* ----------------------------[private typedef]-----------------------------*/\r
+/* ----------------------------[private function prototypes]-----------------*/\r
+/* ----------------------------[private variables]---------------------------*/\r
+#if OS_TASK_CNT!=0\r
+OsTaskVarType Os_TaskVarList[OS_TASK_CNT];\r
+#endif\r
+\r
+/* ----------------------------[private functions]---------------------------*/\r
+/* ----------------------------[public functions]----------------------------*/\r
+\r
+\r
+\r
/** @req OS067 */\r
\r
-_Bool os_pcb_pid_valid( OsPcbType *restrict pcb ) {\r
- return ( pcb->pid > OS_TASK_CNT ) ? 0 : 1;\r
+_Bool os_pcb_pid_valid( OsTaskVarType *restrict pcb ) {\r
+ return ( pcb->constPtr->pid > OS_TASK_CNT ) ? 0 : 1;\r
}\r
/**\r
* Start an extended task.\r
*/\r
void Os_TaskStartExtended( void ) {\r
\r
- OsPcbType *pcb;\r
+ OsTaskVarType *pcb;\r
\r
pcb = Os_TaskGetCurrent();\r
#if 0\r
\r
void Os_TaskStartBasic( void ) {\r
\r
- OsPcbType *pcb;\r
+ OsTaskVarType *pcb;\r
\r
pcb = Os_TaskGetCurrent();\r
#if 0\r
}\r
\r
\r
-static void Os_StackSetup( OsPcbType *pcbPtr ) {\r
+static void Os_StackSetup( OsTaskVarType *pcbPtr ) {\r
uint8_t *bottom;\r
\r
/* Find bottom of the stack so that we can place the\r
*\r
* @param pcbPtr Pointer to the pcb to fill with pattern\r
*/\r
-static void Os_StackFill(OsPcbType *pcbPtr) {\r
+static void Os_StackFill(OsTaskVarType *pcbPtr) {\r
uint8_t *p = pcbPtr->stack.curr;\r
\r
assert(pcbPtr->stack.curr > pcbPtr->stack.top);\r
*\r
* @param pcbPtr\r
*/\r
-static void Os_TaskSetEntry(OsPcbType *pcbPtr ) {\r
+static void Os_TaskSetEntry(OsTaskVarType *pcbPtr ) {\r
\r
}\r
#endif\r
*\r
* @param pcb Ptr to the pcb to setup context for.\r
*/\r
-void Os_ContextInit( OsPcbType *pcb ) {\r
+void Os_TaskContextInit( OsTaskVarType *pcb ) {\r
\r
- if( pcb->autostart ) {\r
+ if( pcb->constPtr->autostart ) {\r
Os_TaskMakeReady(pcb);\r
} else {\r
pcb->state = ST_SUSPENDED;\r
*\r
* @param pcb\r
*/\r
-void Os_ContextReInit( OsPcbType *pcbPtr ) {\r
+void Os_ContextReInit( OsTaskVarType *pcbPtr ) {\r
Os_StackSetup(pcbPtr);\r
}\r
\r
+#if 0\r
/**\r
* Search for a specific task in the pcb list.\r
*\r
* @param tid The task id to search for\r
* @return Ptr to the found pcb or NULL\r
*/\r
-OsPcbType *os_find_task( TaskType tid ) {\r
- OsPcbType *i_pcb;\r
-\r
- /* TODO: Implement this as an array */\r
- TAILQ_FOREACH(i_pcb,& os_sys.pcb_head,pcb_list) {\r
- if(i_pcb->pid == tid ) {\r
+OsTaskVarType *Os_TaskGet( TaskType tid ) {\r
+ OsTaskVarType *i_pcb;\r
+ TAILQ_FOREACH(i_pcb,& Os_Sys.pcb_head,pcb_list) {\r
+ if(i_pcb->constPtr->pid == tid ) {\r
return i_pcb;\r
}\r
}\r
+\r
assert(0);\r
return NULL;\r
}\r
+#endif\r
\r
+#if 0\r
/**\r
* Adds a pcb to the list of pcb's\r
* @param pcb\r
*/\r
-TaskType Os_AddTask( OsPcbType *pcb ) {\r
+TaskType Os_AddTask( OsTaskVarType *pcb ) {\r
long msr;\r
\r
Irq_Save(msr); // Save irq status and disable interrupts\r
\r
- pcb->pid = os_sys.task_cnt;\r
+ pcb->pid = Os_Sys.task_cnt;\r
// Add to list of PCB's\r
- TAILQ_INSERT_TAIL(& os_sys.pcb_head,pcb,pcb_list);\r
- os_sys.task_cnt++;\r
+ TAILQ_INSERT_TAIL(& Os_Sys.pcb_head,pcb,pcb_list);\r
+ Os_Sys.task_cnt++;\r
+ Os_Sys.isrCnt++;\r
\r
Irq_Restore(msr); // Restore interrupts\r
return pcb->pid;\r
}\r
+#endif\r
\r
\r
#define PRIO_ILLEGAL -100\r
* @return\r
*/\r
\r
-OsPcbType *Os_TaskGetTop( void ){\r
- OsPcbType *i_pcb;\r
- OsPcbType *top_prio_pcb = NULL;\r
+OsTaskVarType *Os_TaskGetTop( void ){\r
+ OsTaskVarType *i_pcb;\r
+ OsTaskVarType *top_prio_pcb = NULL;\r
OsPriorityType top_prio = PRIO_ILLEGAL;\r
\r
// OS_DEBUG(D_TASK,"os_find_top_prio_proc\n");\r
\r
- TAILQ_FOREACH(i_pcb,& os_sys.ready_head,ready_list) {\r
+ TAILQ_FOREACH(i_pcb,& Os_Sys.ready_head,ready_list) {\r
// all ready task are canidates\r
if( i_pcb->state & (ST_READY|ST_RUNNING)) {\r
if( top_prio != PRIO_ILLEGAL ) {\r
- if( i_pcb->prio > top_prio ) {\r
- top_prio = i_pcb->prio;\r
+ if( i_pcb->activePriority > top_prio ) {\r
+ top_prio = i_pcb->activePriority;\r
top_prio_pcb = i_pcb;\r
}\r
} else {\r
- top_prio = i_pcb->prio;\r
+ top_prio = i_pcb->activePriority;\r
top_prio_pcb = i_pcb;\r
}\r
} else {\r
* + No need to remove the running process from ready queue\r
*/\r
\r
-OsPcbType *Os_FindTopPrioTask( void ) {\r
+OsTaskVarType *Os_FindTopPrioTask( void ) {\r
\r
\r
return NULL;\r
*\r
*/\r
void Os_Dispatch( uint32_t op ) {\r
- OsPcbType *pcbPtr;\r
- OsPcbType *currPcbPtr = Os_TaskGetCurrent();\r
+ OsTaskVarType *pcbPtr;\r
+ OsTaskVarType *currPcbPtr = Os_TaskGetCurrent();\r
\r
- assert(os_sys.int_nest_cnt == 0);\r
+ assert(Os_Sys.intNestCnt == 0);\r
assert(Os_SchedulerResourceIsFree());\r
\r
/* When calling post hook we must still be in ST_RUNNING */\r
} else if( op & OP_ACTIVATE_TASK ) {\r
Os_TaskMakeReady(currPcbPtr);\r
} else if( op & OP_CHAIN_TASK ) {\r
- assert( os_sys.chainedPcbPtr != NULL );\r
+ assert( Os_Sys.chainedPcbPtr != NULL );\r
\r
/* # from chain top\r
* ----------------------------------------------------------\r
*\r
* - Chained task is always READY when coming from ChainTask()\r
*/\r
- if( currPcbPtr != os_sys.chainedPcbPtr ) {\r
+ if( currPcbPtr != Os_Sys.chainedPcbPtr ) {\r
/* #3 and #4 */\r
--currPcbPtr->activations;\r
if( currPcbPtr->activations <= 0 ) {\r
}\r
/* Chained task is already in READY */\r
}\r
- os_sys.chainedPcbPtr = NULL;\r
+ Os_Sys.chainedPcbPtr = NULL;\r
\r
} else if( op & OP_TERMINATE_TASK ) {\r
/*@req OSEK TerminateTask\r
/* Swap if we found any process or are forced (multiple activations)*/\r
if( pcbPtr != currPcbPtr ) {\r
\r
- if( (op & OP_CHAIN_TASK) && ( currPcbPtr == os_sys.chainedPcbPtr ) ) {\r
+ if( (op & OP_CHAIN_TASK) && ( currPcbPtr == Os_Sys.chainedPcbPtr ) ) {\r
/* #2 */\r
Os_TaskRunningToReady(currPcbPtr);\r
}\r
\r
#if (OS_STACK_MONITORING == 1)\r
if( !Os_StackIsEndmarkOk(currPcbPtr) ) {\r
-#if ( OS_SC1 == 1) || ( OS_SC2 == 1)\r
+#if ( OS_SC1 == STD_ON) || ( OS_SC2 == STD_ON )\r
/** @req OS068 */\r
ShutdownOS(E_OS_STACKFAULT);\r
#else\r
-#error SC3 or SC4 not supported. Protection hook should be called here\r
+ /** @req OS396\r
+ * If a stack fault is detected by stack monitoring AND the configured scalability\r
+ * class is 3 or 4, the Operating System module shall call the ProtectionHook() with\r
+ * the status E_OS_STACKFAULT.\r
+ * */\r
+ PROTECTIONHOOK(E_OS_STACKFAULT);\r
#endif\r
}\r
#endif\r
OS_DEBUG(D_TASK,"Swapping to: %s\n",pcbPtr->name);\r
Os_TaskSwapContext(currPcbPtr,pcbPtr);\r
-\r
- /* ActivateTask, SetEvent, Schedule, .. */\r
-// pcbPtr = Os_TaskGetCurrent();\r
-// Os_TaskMakeRunning(pcbPtr);\r
-// PRETASKHOOK();\r
-\r
-// Os_ResourceGetInternal();\r
-\r
} else {\r
OS_DEBUG(D_TASK,"Continuing task %s\n",pcbPtr->name);\r
/* Setup the stack again, and just call the basic task */\r
* Do we need virtual memory??\r
*/\r
\r
-void Os_TaskSwapContext(OsPcbType *old_pcb, OsPcbType *new_pcb ) {\r
+void Os_TaskSwapContext(OsTaskVarType *old_pcb, OsTaskVarType *new_pcb ) {\r
set_curr_pcb(new_pcb);\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ Os_Sys.currApplId = new_pcb->constPtr->applOwnerId;\r
+#endif\r
Os_ResourceGetInternal();\r
Os_TaskMakeRunning(new_pcb);\r
/* TODO: The pretask hook is not called with the right stack\r
Os_ArchSwapContext(old_pcb,new_pcb);\r
}\r
\r
-void Os_TaskSwapContextTo(OsPcbType *old_pcb, OsPcbType *new_pcb ) {\r
+void Os_TaskSwapContextTo(OsTaskVarType *old_pcb, OsTaskVarType *new_pcb ) {\r
set_curr_pcb(new_pcb);\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ Os_Sys.currApplId = new_pcb->constPtr->applOwnerId;\r
+#endif\r
Os_ResourceGetInternal();\r
Os_TaskMakeRunning(new_pcb);\r
PRETASKHOOK();\r
\r
\r
void Os_Arc_GetStackInfo( TaskType task, StackInfoType *s) {\r
- OsPcbType *pcb = os_get_pcb(task);\r
+ OsTaskVarType *pcb = Os_TaskGet(task);\r
\r
s->curr = Os_ArchGetStackPtr();\r
s->top = pcb->stack.top;\r
\r
TASK_CHECK_ID(TaskId);\r
\r
- curr_state = os_pcb_get_state(os_get_pcb(TaskId));\r
+ curr_state = os_pcb_get_state(Os_TaskGet(TaskId));\r
\r
// TODO: Lazy impl. for now */\r
switch(curr_state) {\r
\r
/* Test specification say return CALLEVEL if in ISR\r
* but impl. spec says otherwise */\r
- if( os_sys.int_nest_cnt == 0 ) {\r
- if( os_sys.curr_pcb->state & ST_RUNNING ) {\r
- *TaskID = os_sys.curr_pcb->pid;\r
+ if( Os_Sys.intNestCnt == 0 ) {\r
+ if( Os_Sys.currTaskPtr->state & ST_RUNNING ) {\r
+ *TaskID = Os_Sys.currTaskPtr->constPtr->pid;\r
} else {\r
/* This is not a real error since this could\r
- * be the case when called from ErrorHook */
+ * be the case when called from ErrorHook */\r
}\r
}\r
\r
}\r
\r
\r
+/**\r
+ * This service returns the identifier of the currently executing ISR\r
+ *\r
+ * If its caller is not a category 2 ISR (or Hook routines called\r
+ * inside a category 2 ISR), GetISRID() shall return INVALID_ISR.\r
+ *\r
+ * @return\r
+ */\r
ISRType GetISRID( void ) {\r
\r
/** @req OS264 */\r
- if(os_sys.int_nest_cnt == 0 ) {\r
+ if(Os_Sys.intNestCnt == 0 ) {\r
return INVALID_ISR;\r
}\r
\r
/** @req OS263 */\r
- return (ISRType)Os_TaskGetCurrent()->pid;\r
+ return (ISRType)Os_TaskGetCurrent()->constPtr->pid;\r
}\r
\r
-static inline void Os_Arc_SetCleanContext( OsPcbType *pcb ) {\r
- if (pcb->proc_type == PROC_EXTENDED) {\r
+static inline void Os_Arc_SetCleanContext( OsTaskVarType *pcb ) {\r
+ if (pcb->constPtr->proc_type == PROC_EXTENDED) {\r
/** @req OSEK ActivateTask Cleanup events\r
* OSEK,ActivateTask, When an extended task is transferred from suspended\r
* state into ready state all its events are cleared.*/\r
\r
StatusType ActivateTask( TaskType TaskID ) {\r
long msr;\r
- OsPcbType *pcb = os_get_pcb(TaskID);\r
+ OsTaskVarType *pcb = Os_TaskGet(TaskID);\r
StatusType rv = E_OK;\r
\r
OS_DEBUG(D_TASK,"# ActivateTask %s\n",pcb->name);\r
#endif\r
\r
Irq_Save(msr);\r
+\r
+#if (OS_USE_APPLICATIONS == STD_ON)\r
+ /* @req OS504/ActivateTask\r
+ * The Operating System module shall deny access to Operating System\r
+ * objects from other OS-Applications to an OS-Application which is not in state\r
+ * APPLICATION_ACCESSIBLE.\r
+ * */\r
+ if( pcb->constPtr->applOwnerId != Os_Sys.currApplId ) {\r
+ /* We are activating a task in another application */\r
+ if( Os_AppVar[Os_Sys.currApplId].state != APPLICATION_ACCESSIBLE ) {\r
+ rv=E_OS_ACCESS;\r
+ goto err;\r
+ }\r
+ }\r
+#endif\r
+\r
/* @req OS093 ActivateTask */\r
if( Os_IrqAnyDisabled() ) {\r
/* Standard */\r
pcb->activations++;\r
if( os_pcb_get_state(pcb) != ST_SUSPENDED ) {\r
/** @req OSEK_? Too many task activations */\r
- if( pcb->activations >= (pcb->activationLimit + 1) ) {\r
+ if( pcb->activations >= (pcb->constPtr->activationLimit + 1) ) {\r
/* Standard */\r
rv=E_OS_LIMIT;\r
Irq_Restore(msr);\r
}\r
\r
/* Preempt only if we are preemptable and target has higher prio than us */\r
- if( (Os_TaskGetCurrent()->scheduling == FULL) &&\r
- (os_sys.int_nest_cnt == 0) &&\r
- (pcb->prio > Os_TaskGetCurrent()->prio) &&\r
+ if( (Os_TaskGetCurrent()->constPtr->scheduling == FULL) &&\r
+ (Os_Sys.intNestCnt == 0) &&\r
+ (pcb->activePriority > Os_TaskGetCurrent()->activePriority) &&\r
(Os_SchedulerResourceIsFree()))\r
{\r
Os_Dispatch(OP_ACTIVATE_TASK);\r
*/\r
\r
StatusType TerminateTask( void ) {\r
- OsPcbType *curr_pcb = Os_TaskGetCurrent();\r
+ OsTaskVarType *curr_pcb = Os_TaskGetCurrent();\r
StatusType rv = E_OK;\r
uint32_t flags;\r
\r
- OS_DEBUG(D_TASK,"# TerminateTask %s\n",curr_pcb->name);\r
+ OS_DEBUG(D_TASK,"# TerminateTask %s\n",currTaskPtr->name);\r
\r
#if (OS_STATUS_EXTENDED == STD_ON )\r
\r
\r
- if( os_sys.int_nest_cnt != 0 ) {\r
+ if( Os_Sys.intNestCnt != 0 ) {\r
rv = E_OS_CALLEVEL;\r
goto err;\r
}\r
}\r
\r
StatusType ChainTask( TaskType TaskId ) {\r
- OsPcbType *curr_pcb = Os_TaskGetCurrent();\r
+ OsTaskVarType *curr_pcb = Os_TaskGetCurrent();\r
StatusType rv = E_OK;\r
uint32_t flags;\r
- OsPcbType *pcb = os_get_pcb(TaskId);\r
+ OsTaskVarType *pcb = Os_TaskGet(TaskId);\r
\r
\r
- OS_DEBUG(D_TASK,"# ChainTask %s\n",curr_pcb->name);\r
+ OS_DEBUG(D_TASK,"# ChainTask %s\n",currTaskPtr->name);\r
\r
#if (OS_STATUS_EXTENDED == STD_ON )\r
/* extended */\r
TASK_CHECK_ID(TaskId);\r
\r
- if( os_sys.int_nest_cnt != 0 ) {\r
+ if( Os_Sys.intNestCnt != 0 ) {\r
/* extended */\r
rv = E_OS_CALLEVEL;\r
goto err;\r
// if( os_pcb_get_state(pcb) != ST_SUSPENDED ) {\r
if (curr_pcb != pcb) {\r
/** @req OSEK_? Too many task activations */\r
- if( (pcb->activations + 1) > pcb->activationLimit ) {\r
+ if( (pcb->activations + 1) > pcb->constPtr->activationLimit ) {\r
/* standard */\r
rv = E_OS_LIMIT;\r
Irq_Restore(flags);\r
\r
}\r
\r
- os_sys.chainedPcbPtr = pcb;\r
+ Os_Sys.chainedPcbPtr = pcb;\r
\r
Os_Dispatch(OP_CHAIN_TASK);\r
\r
StatusType Schedule( void ) {\r
StatusType rv = E_OK;\r
uint32_t flags;\r
- OsPcbType *curr_pcb = get_curr_pcb();\r
+ OsTaskVarType *curr_pcb = get_curr_pcb();\r
\r
OS_DEBUG(D_TASK,"# Schedule %s\n",Os_TaskGetCurrent()->name);\r
\r
/* Check that we are not calling from interrupt context */\r
- if( os_sys.int_nest_cnt != 0 ) {\r
+ if( Os_Sys.intNestCnt != 0 ) {\r
rv = E_OS_CALLEVEL;\r
goto err;\r
}\r
* FULL - Assigned internal resource OR\r
* No assigned internal resource.\r
* */\r
- if( Os_TaskGetCurrent()->scheduling != NON ) {\r
+ if( Os_TaskGetCurrent()->constPtr->scheduling != NON ) {\r
return E_OK;\r
}\r
\r
Irq_Save(flags);\r
- OsPcbType* top_pcb = Os_TaskGetTop();\r
+ OsTaskVarType* top_pcb = Os_TaskGetTop();\r
/* only dispatch if some other ready task has higher prio */\r
- if (top_pcb->prio > Os_TaskGetCurrent()->prio) {\r
+ if (top_pcb->activePriority > Os_TaskGetCurrent()->activePriority) {\r
Os_Dispatch(OP_SCHEDULE);\r
}\r
\r
add\r
menu\r
(\r
- popup "Autosar"\r
+ popup "ArcCore"\r
(\r
popup "&Breakpoint"\r
(\r
DEFBUTTON "Cancel" "jumpto win_close"\r
CLOSE "jumpto win_close"\r
)\r
-\r
+ dialog.set CPU "&cfg_cpu_g"\r
stop\r
save_close:\r
&cfg_cpu_g=dialog.string(CPU)\r
// arg 2-blaj\r
// arg 3-debug : 0 \r
\r
- sim.load mpc55xx_sim.dll 20000 0 1\r
- ;sim.load C:\projects\t32sim\Debug\mpc55xx_sim.dll 20000 0 0\r
-; sim.load &dll 0xfff84000 0\r
+ sim.load mpc55xx_sim.dll 20000 0 0\r
+// sim.load C:\projects\workspace\t32_sim\Release\mpc55xx_sim.dll 20000 0 1\r
\r
enddo\r
\r
\r
\r
\r
+\r
+\r
setup.var %SYMBOL.on %HEX.on %decimal.on %index.on %string.on\r
setup.tabsize 2.\r
\r
-menu.rp autosar.men\r
+menu.rp arccore.men\r
\r
winpos 0% 70% 50% 30%\r
area\r
\r
area.select\r
-print "## Welcome to Arc-Core simulator environment for T32 ##"\r
+print "## Welcome to ArcCore simulator environment for T32 ##"\r
print ""\r
\r
-\r
enddo\r
\r
\r
projects / arc.git / commitdiff