-# TMS570LS3137ZWT 08/28/12 09:04:43\r
+# TMS570LS3137ZWT 08/30/12 15:16:52\r
# \r
ARCH=TMS570LS3137ZWT\r
# \r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_106_INT_TYPE.VALUE=IRQ\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_9_INT_PRAGMA_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.ADC1_ENABLE.VALUE=1\r
-DRIVER.SYSTEM.VAR.MIBSPI_ENABLE.VALUE=0\r
+DRIVER.SYSTEM.VAR.MIBSPI_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.ECLK_VCLK1_FREQ.VALUE=80.000\r
DRIVER.SYSTEM.VAR.CLKT_EXTERNAL_FREQ.VALUE=00.0\r
DRIVER.SYSTEM.VAR.CORE_MPU_REGION_11_SIZE_VALUE.VALUE=0x0A\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_59_INT_PRAGMA_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_8_INT_ENABLE.VALUE=0\r
DRIVER.SYSTEM.VAR.SAFETY_INIT_STC_CPUSELFTEST_ENA.VALUE=0\r
-DRIVER.SYSTEM.VAR.HET1_ENABLE.VALUE=0\r
+DRIVER.SYSTEM.VAR.HET1_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.CLKT_RTI1_PRE_SOURCE.VALUE=PLL1\r
DRIVER.SYSTEM.VAR.FLASH_MODE_VALUE.VALUE=1\r
DRIVER.SYSTEM.VAR.CORE_MPU_REGION_5_SIZE_VALUE.VALUE=0x19\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_96_INT_PRAGMA_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_88_INT_PRAGMA_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.SAFETY_INIT_CAN1_RAMPARITYCHECK_ENA.VALUE=1\r
-DRIVER.SYSTEM.VAR.GIO_ENABLE.VALUE=0\r
+DRIVER.SYSTEM.VAR.GIO_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.CORE_MPU_REGION_10_SIZE_VALUE.VALUE=0x17\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_94_MAPPING.VALUE=94\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_86_MAPPING.VALUE=86\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_19_INT_PRAGMA_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.SAFETY_INIT_FRAY_RAMPARITYCHECK_ENA.VALUE=0\r
DRIVER.SYSTEM.VAR.SAFETY_INIT_DMA_DP_PBISTCHECK_ENA.VALUE=0x00000800\r
-DRIVER.SYSTEM.VAR.HET_ENABLE.VALUE=0\r
+DRIVER.SYSTEM.VAR.HET_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.PBIST_ALGO_13_14.VALUE=0\r
DRIVER.SYSTEM.VAR.RAM_STACK_UNDEF_BASE.VALUE=0x08001400\r
DRIVER.SYSTEM.VAR.RAM_STACK_SVC_BASE.VALUE=0x08001000\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_99_INT_PRAGMA_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.VIM_CHANNEL_3_INT_TYPE.VALUE=IRQ\r
DRIVER.SYSTEM.VAR.DMM_ENABLE.VALUE=0\r
-DRIVER.SYSTEM.VAR.MIBSPI5_ENABLE.VALUE=0\r
+DRIVER.SYSTEM.VAR.MIBSPI5_ENABLE.VALUE=1\r
DRIVER.SYSTEM.VAR.FLASH_BANK_CONFIG_0.VALUE=ACTIVE\r
DRIVER.SYSTEM.VAR.CLKT_AVCLK4_FREQ.VALUE=80.000\r
DRIVER.SYSTEM.VAR.FLASH_BANK_CONFIG_1.VALUE=ACTIVE\r
DRIVER.RTI.VAR.RTI_1_NTU_4_FREQ.VALUE=0.0\r
DRIVER.RTI.VAR.RTI_1_COMPARE_2_INPUT_FREQ.VALUE=10.000000000\r
DRIVER.RTI.VAR.RTI_1_COUNTER_0_FREQUENCY.VALUE=10.000\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT4_PULL.VALUE=1\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT4_PULL.VALUE=2\r
DRIVER.GIO.VAR.GIO_PORT0_BIT5_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT4_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT7_DOUT.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT5_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT7_ENA.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT3_PSL.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT5_PULL.VALUE=1\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT5_PULL.VALUE=2\r
DRIVER.GIO.VAR.GIO_PORT0_BIT7_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT4_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT5_PDR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT1_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT6_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT2_ENA.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT2_DIR.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT2_DIR.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT0_PDR.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT0_PULL.VALUE=1\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT0_PULL.VALUE=2\r
DRIVER.GIO.VAR.GIO_PORT0_BIT3_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT3_DOUT.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT4_PULL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT3_ENA.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT7_DOUT.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT3_DIR.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT3_DIR.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT0_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT1_PDR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT0_POL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT4_ENA.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT0_PSL.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT0_PSL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT4_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT4_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_BASE_PORTA.VALUE=0xFFF7BC34\r
DRIVER.GIO.VAR.GIO_PORT1_BIT1_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT2_PDR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT1_POL.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT1_PULL.VALUE=1\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT1_PULL.VALUE=2\r
DRIVER.GIO.VAR.GIO_PORT1_BIT4_DOUT.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT5_PULL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT5_ENA.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT1_PSL.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT1_PSL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT5_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT2_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT1_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT0_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT6_ENA.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT2_PSL.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT6_DIR.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT6_DIR.VALUE=1\r
DRIVER.GIO.VAR.GIO_BASE.VALUE=0xFFF7BC00\r
DRIVER.GIO.VAR.GIO_PORT1_BIT3_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT1_ENA.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT7_ENA.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULDIS.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT3_PSL.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT7_DIR.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT7_DIR.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT4_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT2_ENA.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT5_PDR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT2_DIR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT0_DOUT.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT6_PULDIS.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT4_PSL.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT4_PSL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT0_BIT0_PDR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORTB_ENABLE.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT1_BIT5_LVL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT6_DOUT.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT7_PULL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT0_BIT0_LVL.VALUE=0\r
-DRIVER.GIO.VAR.GIO_PORT1_BIT5_PSL.VALUE=0\r
+DRIVER.GIO.VAR.GIO_PORT1_BIT5_PSL.VALUE=1\r
DRIVER.GIO.VAR.GIO_PORT0_BIT1_PDR.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT0_BIT0_POL.VALUE=0\r
DRIVER.GIO.VAR.GIO_PORT1_BIT6_LVL.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI1_ENABLEHIGHZ.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI5_WDELAY1.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT25_FUN.VALUE=1\r
-DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT17_FUN.VALUE=1\r
+DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT17_FUN.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI5_TG5_TRGEVT.VALUE=TRG_ALWAYS\r
DRIVER.MIBSPI.VAR.MIBSPI5_WDELAY2.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI3_PORT_BIT1_FUN.VALUE=1\r
DRIVER.MIBSPI.VAR.MIBSPI1_SHIFTDIR2.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI1_SHIFTDIR3.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT26_FUN.VALUE=1\r
-DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT18_FUN.VALUE=1\r
+DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT18_FUN.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI5_TG0_BUF_CSHOLD.VALUE=0\r
DRIVER.MIBSPI.VAR.MIBSPI3_PORT_BIT2_FUN.VALUE=1\r
DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT8_DIR.VALUE=0\r
DRIVER.HET.VAR.HET1_EDGE2_LVL.VALUE=0x00000000\r
DRIVER.HET.VAR.HET1_PWM2_DUTY_LVL.VALUE=0x00000000\r
DRIVER.HET.VAR.HET1_PWM2_DUTY_PRESCALER.VALUE=80128\r
-DRIVER.HET.VAR.HET1_BIT9_DIR.VALUE=0x00000000\r
+DRIVER.HET.VAR.HET1_BIT9_DIR.VALUE=0x00000200\r
DRIVER.HET.VAR.HET2_BIT6_ANDSHARE.VALUE=0x00000000\r
DRIVER.HET.VAR.HET1_PWM6_DUTY.VALUE=50\r
DRIVER.HET.VAR.HET1_BIT1_PULDIS.VALUE=0x00000000\r
DRIVER.HET.VAR.HET1_EDGE0_BOTH.VALUE=0\r
DRIVER.HET.VAR.HET1_BIT30_DIR.VALUE=0x00000000\r
DRIVER.HET.VAR.HET1_BIT22_DIR.VALUE=0x00000000\r
-DRIVER.HET.VAR.HET1_BIT14_DIR.VALUE=0x00000000\r
+DRIVER.HET.VAR.HET1_BIT14_DIR.VALUE=0x00004000\r
DRIVER.HET.VAR.HET1_INT_X0.VALUE=0x00000000\r
DRIVER.HET.VAR.HET2_EDGE2_POLARITY.VALUE=0\r
DRIVER.HET.VAR.HET2_PWM4_PERIOD_INTENA.VALUE=0x00000000\r
DRIVER.DMM.VAR.DMM_PORT_BIT7_PULL.VALUE=2\r
DRIVER.DMM.VAR.DMM_PORT_BIT18_PULL.VALUE=2\r
DRIVER.DMM.VAR.DMM_PORT_BIT6_PDR.VALUE=0\r
-DRIVER.DMM.VAR.DMM_PORT_BIT10_DIR.VALUE=1\r
+DRIVER.DMM.VAR.DMM_PORT_BIT10_DIR.VALUE=0\r
DRIVER.DMM.VAR.DMM_PORT_BIT7_FUN.VALUE=1\r
DRIVER.DMM.VAR.DMM_PORT_BIT5_PULDIS.VALUE=0\r
DRIVER.DMM.VAR.DMM_PORT_BIT5_PSL.VALUE=1\r
DRIVER.DMM.VAR.DMM_PORT_BIT1_DOUT.VALUE=0\r
-DRIVER.DMM.VAR.DMM_PORT_BIT9_DIR.VALUE=1\r
+DRIVER.DMM.VAR.DMM_PORT_BIT9_DIR.VALUE=0\r
DRIVER.DMM.VAR.DMM_PORT_BIT12_DOUT.VALUE=0\r
DRIVER.DMM.VAR.DMM_PORT_BIT7_PDR.VALUE=0\r
DRIVER.DMM.VAR.DMM_PORT_BIT11_DIR.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_2.VALUE=0\r
DRIVER.PINMUX.VAR.MUX61_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX53_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX45_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX45_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX37_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX29_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX7_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_IFT_COUNT_24.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_IFT_COUNT_16.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_INTLFSEN_12.VALUE=1\r
-DRIVER.PINMUX.VAR.MUX30_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX30_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX22_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX14_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_FIDXD_29.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_PRITY_1_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.PINMUX11.VALUE="PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_M17_EMIF_nCS_4 | PINMUX_BALL_L15_ETMDATA_17 | PINMUX_BALL_P1_HET1_24"\r
DRIVER.PINMUX.VAR.DMA_PRITY_12.VALUE=FIXED\r
-DRIVER.PINMUX.VAR.PINMUX20.VALUE="PINMUX_BALL_C11_EMIF_ADDR_13 | PINMUX_BALL_C10_EMIF_ADDR_12 | PINMUX_BALL_F3_MIBSPI1NCS_1 | PINMUX_BALL_C9_EMIF_ADDR_11"\r
-DRIVER.PINMUX.VAR.PINMUX12.VALUE="PINMUX_BALL_A14_HET1_26 | PINMUX_BALL_K15_ETMDATA_16 | PINMUX_BALL_G19_MIBSPI1NENA | PINMUX_BALL_H18_MIBSPI5NENA"\r
+DRIVER.PINMUX.VAR.PINMUX20.VALUE="PINMUX_BALL_C11_EMIF_ADDR_13 | PINMUX_BALL_C10_EMIF_ADDR_12 | PINMUX_BALL_F3_HET1_17 | PINMUX_BALL_C9_EMIF_ADDR_11"\r
+DRIVER.PINMUX.VAR.PINMUX12.VALUE="PINMUX_BALL_A14_HET1_26 | PINMUX_BALL_K15_ETMDATA_16 | PINMUX_BALL_G19_HET1_23 | PINMUX_BALL_H18_MIBSPI5NENA"\r
DRIVER.PINMUX.VAR.DMA_PRITY_13.VALUE=FIXED\r
DRIVER.PINMUX.VAR.PINMUX21.VALUE="PINMUX_BALL_D5_EMIF_ADDR_1 | PINMUX_BALL_C8_EMIF_ADDR_10 | PINMUX_BALL_C7_EMIF_ADDR_9"\r
DRIVER.PINMUX.VAR.PINMUX13.VALUE="PINMUX_BALL_J18_MIBSPI5SOMI_0 | PINMUX_BALL_J19_MIBSPI5SIMO_0 | PINMUX_BALL_H19_MIBSPI5CLK | PINMUX_BALL_R2_MIBSPI1NCS_0"\r
DRIVER.PINMUX.VAR.PINMUX29.VALUE=PINMUX_BALL_D3_SPI2NENA\r
DRIVER.PINMUX.VAR.MUX98_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_10.VALUE=CHANNEL0\r
-DRIVER.PINMUX.VAR.MUX98_OPTION2.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX98_OPTION2.VALUE=1\r
DRIVER.PINMUX.VAR.MUX7_CONFLICT.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_11.VALUE=CHANNEL0\r
DRIVER.PINMUX.VAR.DMA_PRITY_10_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.MUX83_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX75_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX67_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX59_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX59_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_25.VALUE=CHANNEL0\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_17.VALUE=CHANNEL0\r
DRIVER.PINMUX.VAR.DMA_FIDXS_3.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_AIM_3.VALUE=ENABLED\r
DRIVER.PINMUX.VAR.DMA_ENABLEREG_3.VALUE=1\r
-DRIVER.PINMUX.VAR.MUX91_OPTION1.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX91_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.MUX83_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX75_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX67_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX75_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX67_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX59_OPTION4.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX6_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX6_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_29.VALUE=CHANNEL0\r
DRIVER.PINMUX.VAR.DMA_FIDXS_7.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_AIM_7.VALUE=ENABLED\r
DRIVER.PINMUX.VAR.DMA_AIM_9.VALUE=ENABLED\r
DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_8_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.MUX6_OPTION3.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX60_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX60_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX52_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX44_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX44_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX36_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX28_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX6_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX60_OPTION1.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX52_OPTION1.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX52_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.MUX44_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX36_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX28_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_5.VALUE=8BIT\r
DRIVER.PINMUX.VAR.GATE_EMIF_CLK.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_6.VALUE=8BIT\r
-DRIVER.PINMUX.VAR.MUX97_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX89_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX97_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX89_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_7.VALUE=8BIT\r
DRIVER.PINMUX.VAR.MUX97_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX89_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMW_29_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_9_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_TTYPE_2_VALUE.VALUE=0x0001\r
-DRIVER.PINMUX.VAR.MUX90_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX90_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX82_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX74_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX66_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX82_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX74_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.MUX66_OPTION1.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX58_OPTION1.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX58_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_ADDMW_0.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.DMA_ERRACT.VALUE=IGNORE\r
DRIVER.PINMUX.VAR.MUX90_OPTION2.VALUE=0\r
DRIVER.PINMUX.VAR.MUX74_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX66_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX58_OPTION4.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX5_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX5_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_ADDMW_3.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.MUX5_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMW_4.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.MUX5_OPTION3.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMW_6.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.DMA_INTFTCEN_2.VALUE=1\r
-DRIVER.PINMUX.VAR.MUX51_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX43_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX51_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX43_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX35_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX27_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX19_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX19_OPTION2.VALUE=0\r
DRIVER.PINMUX.VAR.MUX17_CONFLICT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_99_SELECT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_8_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_8_SELECT.VALUE=2\r
DRIVER.PINMUX.VAR.DMA_ADDMR_27_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_21_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_ADDMR_19_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_CHAS_1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ACC_3_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_CHAS_2.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX96_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX88_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX96_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX88_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_CHAS_3.VALUE=0\r
DRIVER.PINMUX.VAR.MUX96_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX88_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_AIM_16.VALUE=ENABLED\r
DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_6.VALUE=8BIT\r
DRIVER.PINMUX.VAR.MUX81_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX73_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX65_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX57_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX73_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX65_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX57_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX49_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_FIDXS_25.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_AIM_25.VALUE=ENABLED\r
DRIVER.PINMUX.VAR.DMA_IFT_COUNT_6.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_BYP_12.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_INTBTCEN_2.VALUE=1\r
-DRIVER.PINMUX.VAR.MUX50_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX42_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX50_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX42_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX34_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX26_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX18_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_82_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_74_SELECT.VALUE=1\r
DRIVER.PINMUX.VAR.PIN_MUX_66_SELECT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_58_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_58_SELECT.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_ADDMW_8_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_INTMP_16_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_INTBTCEN_9.VALUE=1\r
DRIVER.PINMUX.VAR.MUX104_OPTION3.VALUE=0\r
DRIVER.PINMUX.VAR.MUX104_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX95_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX87_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX79_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX87_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX79_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX95_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.MUX87_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX79_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_12.VALUE=0\r
DRIVER.PINMUX.VAR.MUX80_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX72_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX64_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX56_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX64_OPTION0.VALUE=1\r
+DRIVER.PINMUX.VAR.MUX56_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX48_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_21.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_13.VALUE=0\r
-DRIVER.PINMUX.VAR.HET1.VALUE=0\r
+DRIVER.PINMUX.VAR.HET1.VALUE=1\r
DRIVER.PINMUX.VAR.MUX80_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX72_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX64_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX56_OPTION1.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX48_OPTION1.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX48_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_30.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_22.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_14.VALUE=0\r
DRIVER.PINMUX.VAR.MUX64_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX56_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX48_OPTION4.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX3_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX3_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_25.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_EIDXD_21.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_17.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_72_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_64_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_56_SELECT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_48_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_48_SELECT.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_IET_COUNT_31.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMR_27.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.DMA_IET_COUNT_23.VALUE=0\r
DRIVER.PINMUX.VAR.MUX103_OPTION2.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMW_9_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_TRIG_7_VALUE.VALUE=0x0001\r
-DRIVER.PINMUX.VAR.MIBSPI5.VALUE=0\r
+DRIVER.PINMUX.VAR.MIBSPI5.VALUE=1\r
DRIVER.PINMUX.VAR.DMM.VALUE=0\r
DRIVER.PINMUX.VAR.W2FC.VALUE=0\r
DRIVER.PINMUX.VAR.OHCI1.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CHPR_12.VALUE=HIGH\r
DRIVER.PINMUX.VAR.MUX71_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX63_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX55_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX55_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX47_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX39_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX9_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_EIDXD_8.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_IET_COUNT_4.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_TRIG_10.VALUE=HARDWARE_TRIGGER\r
-DRIVER.PINMUX.VAR.MUX2_OPTION2.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX2_OPTION2.VALUE=1\r
DRIVER.PINMUX.VAR.PIN_MUX_9_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMW_31.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_31_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_IET_COUNT_6.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_TRIG_12.VALUE=HARDWARE_TRIGGER\r
DRIVER.PINMUX.VAR.MUX40_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX32_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX32_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX24_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX16_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX2_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_85_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_77_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_69_SELECT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_2_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_2_SELECT.VALUE=2\r
DRIVER.PINMUX.VAR.DMA_ADDMW_27.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.DMA_ADDMW_19.VALUE=CONSTANT\r
DRIVER.PINMUX.VAR.DMA_IET_COUNT_9.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_70_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_62_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_54_SELECT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_46_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_46_SELECT.VALUE=1\r
DRIVER.PINMUX.VAR.PIN_MUX_38_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_TTYPE_9_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_ADDMW_0_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_INTMP_6.VALUE=GROUP_A\r
DRIVER.PINMUX.VAR.DMA_ACC_2.VALUE=ALL\r
DRIVER.PINMUX.VAR.MUX102_OPTION4.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX93_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX93_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX85_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX77_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX69_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX69_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX8_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX8_OPTION1.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX8_OPTION2.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX8_OPTION2.VALUE=1\r
DRIVER.PINMUX.VAR.DMA_BASE.VALUE=0xFFFFF000\r
DRIVER.PINMUX.VAR.MUX8_OPTION3.VALUE=0\r
DRIVER.PINMUX.VAR.MUX70_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX62_OPTION0.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX54_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX54_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX46_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX38_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX8_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX70_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX62_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX54_OPTION1.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX46_OPTION1.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX46_OPTION1.VALUE=1\r
DRIVER.PINMUX.VAR.MUX38_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX8_OPTION5.VALUE=0\r
DRIVER.PINMUX.VAR.MUX70_OPTION2.VALUE=0\r
DRIVER.PINMUX.VAR.MUX54_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX46_OPTION4.VALUE=0\r
DRIVER.PINMUX.VAR.MUX38_OPTION4.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX1_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX1_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX54_OPTION5.VALUE=0\r
DRIVER.PINMUX.VAR.MUX46_OPTION5.VALUE=0\r
DRIVER.PINMUX.VAR.MUX38_OPTION5.VALUE=0\r
DRIVER.PINMUX.VAR.MUX1_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX1_OPTION2.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_98_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_98_SELECT.VALUE=2\r
DRIVER.PINMUX.VAR.PIN_MUX_7_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_ADDMR_25_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_ADDMR_17_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.MUX23_CONFLICT.VALUE=0\r
DRIVER.PINMUX.VAR.MUX15_OPTION2.VALUE=0\r
DRIVER.PINMUX.VAR.MUX15_CONFLICT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_91_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_91_SELECT.VALUE=1\r
DRIVER.PINMUX.VAR.PIN_MUX_83_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_75_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_67_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.MUX96_CONFLICT.VALUE=0\r
DRIVER.PINMUX.VAR.MUX88_CONFLICT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_60_SELECT.VALUE=0\r
-DRIVER.PINMUX.VAR.PIN_MUX_52_SELECT.VALUE=0\r
+DRIVER.PINMUX.VAR.PIN_MUX_52_SELECT.VALUE=1\r
DRIVER.PINMUX.VAR.PIN_MUX_44_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_36_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.PIN_MUX_28_SELECT.VALUE=0\r
DRIVER.PINMUX.VAR.RMII.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CHAS_16.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_INTLFSEN_6.VALUE=1\r
-DRIVER.PINMUX.VAR.PINMUX0.VALUE="PINMUX_BALL_C3_MIBSPI3NCS_3 | PINMUX_BALL_B2_MIBSPI3NCS_2"\r
+DRIVER.PINMUX.VAR.PINMUX0.VALUE="PINMUX_BALL_C3_HET1_29 | PINMUX_BALL_B2_HET1_27"\r
DRIVER.PINMUX.VAR.MUX99_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_INTLFSEN_7.VALUE=1\r
DRIVER.PINMUX.VAR.PINMUX1.VALUE="PINMUX_BALL_E3_HET1_11 | PINMUX_BALL_E5_ETMDATA_20 | PINMUX_BALL_F5_ETMDATA_21"\r
DRIVER.PINMUX.VAR.DMA_ADDMW_1_VALUE.VALUE=0x0001\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_1.VALUE=CHANNEL0\r
DRIVER.PINMUX.VAR.DMA_CHPR_3_VALUE.VALUE=0x0001\r
-DRIVER.PINMUX.VAR.PINMUX7.VALUE="PINMUX_BALL_R6_ETMDATA_29 | PINMUX_BALL_V5_MIBSPI3NCS_1 | PINMUX_BALL_W3_SCIRX | PINMUX_BALL_R7_ETMDATA_30"\r
+DRIVER.PINMUX.VAR.PINMUX7.VALUE="PINMUX_BALL_R6_ETMDATA_29 | PINMUX_BALL_V5_HET1_25 | PINMUX_BALL_W3_SCIRX | PINMUX_BALL_R7_ETMDATA_30"\r
DRIVER.PINMUX.VAR.MUX101_OPTION3.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_24.VALUE=8BIT\r
DRIVER.PINMUX.VAR.DMA_EIDXS_20.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_16.VALUE=8BIT\r
DRIVER.PINMUX.VAR.DMA_EIDXS_12.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_2.VALUE=CHANNEL0\r
-DRIVER.PINMUX.VAR.PINMUX8.VALUE="PINMUX_BALL_N2_SCITX | PINMUX_BALL_G3_MIBSPI1NCS_2 | PINMUX_BALL_N1_HET1_15 | PINMUX_BALL_R8_ETMDATA_31"\r
+DRIVER.PINMUX.VAR.PINMUX8.VALUE="PINMUX_BALL_N2_SCITX | PINMUX_BALL_G3_HET1_19 | PINMUX_BALL_N1_HET1_15 | PINMUX_BALL_R8_ETMDATA_31"\r
DRIVER.PINMUX.VAR.MUX101_OPTION4.VALUE=0\r
-DRIVER.PINMUX.VAR.MUX92_OPTION0.VALUE=0\r
+DRIVER.PINMUX.VAR.MUX92_OPTION0.VALUE=1\r
DRIVER.PINMUX.VAR.MUX84_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX76_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.MUX68_OPTION0.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_17.VALUE=8BIT\r
DRIVER.PINMUX.VAR.DMA_EIDXS_13.VALUE=0\r
DRIVER.PINMUX.VAR.DMA_CHANNEL_3.VALUE=CHANNEL0\r
-DRIVER.PINMUX.VAR.PINMUX9.VALUE="PINMUX_BALL_R9_ETMTRACECLKIN | PINMUX_BALL_W9_MIBSPI3NENA | PINMUX_BALL_V10_MIBSPI3NCS_0 | PINMUX_BALL_J3_MIBSPI1NCS_3"\r
+DRIVER.PINMUX.VAR.PINMUX9.VALUE="PINMUX_BALL_R9_ETMTRACECLKIN | PINMUX_BALL_W9_HET1_31 | PINMUX_BALL_V10_MIBSPI3NCS_0 | PINMUX_BALL_J3_HET1_21"\r
DRIVER.PINMUX.VAR.MUX92_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX84_OPTION1.VALUE=0\r
DRIVER.PINMUX.VAR.MUX76_OPTION1.VALUE=0\r
<HDRGIO>\r
<NAME>gio.h</NAME>\r
</HDRGIO>\r
- <SRCGIO/>\r
+ <SRCGIO>\r
+ <NAME>gio.c</NAME>\r
+ </SRCGIO>\r
<HDRSCI>\r
<NAME>sci.h</NAME>\r
</HDRSCI>\r
<HDRADC>\r
<NAME>adc.h</NAME>\r
</HDRADC>\r
- <SRCADC/>\r
+ <SRCADC>\r
+ <NAME>adc.c</NAME>\r
+ </SRCADC>\r
<HET1ASMHDR>\r
<NAME/>\r
</HET1ASMHDR>\r
<HDRHTU>\r
<NAME>htu.h</NAME>\r
</HDRHTU>\r
- <SRCHET/>\r
+ <SRCHET>\r
+ <NAME>het.c</NAME>\r
+ </SRCHET>\r
<HET2ASMHDR>\r
<NAME/>\r
</HET2ASMHDR>\r
<HDRDMM>\r
<NAME>dmm.h</NAME>\r
</HDRDMM>\r
- <SRCDMM/>\r
+ <SRCDMM>\r
+ <NAME>dmm.c</NAME>\r
+ </SRCDMM>\r
<HDREMIF>\r
<NAME>emif.h</NAME>\r
</HDREMIF>\r
<PATH>include\gio.h</PATH>\r
</HDRGIO>\r
<SRCGIO>\r
- <PATH/>\r
+ <PATH>source\gio.c</PATH>\r
</SRCGIO>\r
</FILENAMES>\r
</GIO>\r
<PATH>include\adc.h</PATH>\r
</HDRADC>\r
<SRCADC>\r
- <PATH/>\r
+ <PATH>source\adc.c</PATH>\r
</SRCADC>\r
</FILENAMES>\r
</ADC>\r
<PATH>include\htu.h</PATH>\r
</HDRHTU>\r
<SRCHET>\r
- <PATH/>\r
+ <PATH>source\het.c</PATH>\r
</SRCHET>\r
</FILENAMES>\r
</HET>\r
<PATH>include\dmm.h</PATH>\r
</HDRDMM>\r
<SRCDMM>\r
- <PATH/>\r
+ <PATH>source\dmm.c</PATH>\r
</SRCDMM>\r
</FILENAMES>\r
</DMM>\r
******************************************************************************
TMS470 Linker Unix v4.9.1
******************************************************************************
->> Linked Tue Aug 28 14:08:25 2012
+>> Linked Thu Aug 30 15:34:53 2012
OUTPUT FILE NAME: <CmdProcTISCI.out>
-ENTRY POINT SYMBOL: "_c_int00" address: 00008590
+ENTRY POINT SYMBOL: "_c_int00" address: 0000a460
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
VECTORS 00000000 00000020 00000020 00000000 X
- FLASH0 00000020 0017ffe0 0000cd38 001732a8 R X
+ FLASH0 00000020 0017ffe0 00010715 0016f8cb R X
FLASH1 00180000 00180000 00000000 00180000 R X
STACKS 08000000 00001500 00000000 00001500 RW
- RAM 08001500 00026b00 00004254 000228ac RW
+ RAM 08001500 00026b00 0000438c 00022774 RW
SEGMENT ALLOCATION MAP
run origin load origin length init length attrs members
---------- ----------- ---------- ----------- ----- -------
-00000000 00000000 0000cd58 0000cd58 r-x
+00000000 00000000 00010738 00010738 r-x
00000000 00000000 00000020 00000020 r-x .intvecs
- 00000020 00000020 0000c2f4 0000c2f4 r-x .text
- 0000c314 0000c314 00000974 00000974 r-- .const
- 0000cc88 0000cc88 000000d0 000000d0 r-- .cinit
-08001500 08001500 00004158 00000000 rw-
- 08001500 08001500 00004158 00000000 rw- .bss
-08005658 08005658 000000fc 000000fc rw-
- 08005658 08005658 000000fc 000000fc rw- .data
+ 00000020 00000020 0000f638 0000f638 r-x .text
+ 0000f658 0000f658 00000f75 00000f75 r-- .const
+ 000105d0 000105d0 00000168 00000168 r-- .cinit
+08001500 08001500 0000415c 00000000 rw-
+ 08001500 08001500 0000415c 00000000 rw- .bss
+08005660 08005660 00000230 00000230 rw-
+ 08005660 08005660 00000230 00000230 rw- .data
SECTION ALLOCATION MAP
.intvecs 0 00000000 00000020
00000000 00000020 sys_intvecs.obj (.intvecs)
-.text 0 00000020 0000c2f4
+.text 0 00000020 0000f638
00000020 00002d4c can.obj (.text)
00002d6c 000014c8 sys_selftest.obj (.text)
00004234 00001460 os_tasks.obj (.text)
- 00005694 00000b48 os_queue.obj (.text)
- 000061dc 00000b18 cmd_proc.obj (.text)
- 00006cf4 000009ec commands.obj (.text)
- 000076e0 00000878 adc.obj (.text)
- 00007f58 00000638 os_port.obj (.text)
- 00008590 000005ac sys_startup.obj (.text:retain)
- 00008b3c 00000540 sci.obj (.text)
- 0000907c 0000043c esm.obj (.text)
- 000094b8 000003cc cmd_io_line.obj (.text)
- 00009884 000003bc cmdio_tisci.obj (.text)
- 00009c40 00000384 sci.obj (.text:retain)
- 00009fc4 00000384 sys_core.obj (.text)
- 0000a348 00000308 system.obj (.text)
- 0000a650 00000300 pinmux.obj (.text)
- 0000a950 000002e0 can.obj (.text:retain)
- 0000ac30 000002b8 i2str.obj (.text)
- 0000aee8 00000240 os_list.obj (.text)
- 0000b128 00000220 esm.obj (.text:retain)
- 0000b348 000001d8 notification.obj (.text)
- 0000b520 000001d8 adc.obj (.text:retain)
- 0000b6f8 000001d4 cmd_io.obj (.text)
- 0000b8cc 00000180 cmd_proc_freertos_tms570.obj (.text)
- 0000ba4c 0000016c os_portasm.obj (.text)
- 0000bbb8 00000150 cmd_proc_run.obj (.text)
- 0000bd08 000000e8 os_heap.obj (.text)
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LINKER GENERATED HANDLER TABLE
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address name
-------- ----
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+0000c130 _coreGetAuxiliaryDataFault_
+0000c138 _coreClearAuxiliaryDataFault_
+0000c14c _coreGetAuxiliaryInstructionFault_
+0000c154 _coreClearAuxiliaryInstructionFault_
+0000c168 _disable_interrupt_
+0000c170 _disable_FIQ_interrupt_
+0000c178 _disable_IRQ_interrupt_
+0000c180 _enable_interrupt_
+0000c188 _esmCcmErrorsClear_
+0000c210 __TI_PINIT_Base
+0000c214 __TI_PINIT_Limit
+0000c218 muxInit
+0000c524 setupPLL
+0000c558 trimLPO
+0000c5a0 setupFlash
+0000c5e0 periphInit
+0000c638 mapClocks
+0000c710 systemInit
+0000c79c systemPowerDown
+0000c82c can1HighLevelInterrupt
+0000c8e8 can1LowLevelInterrupt
+0000c984 can2HighLevelInterrupt
+0000ca40 can2LowLevelInterrupt
+0000cb0c i2str
+0000cdc4 gioInit
+0000ce94 gioSetDirection
+0000ceb4 gioSetBit
+0000cf04 gioSetPort
+0000cf24 gioGetBit
+0000cf4c gioGetPort
+0000cf64 gioToggleBit
+0000cfbc gioEnableNotification
+0000cfe0 gioDisableNotification
+0000d048 vListInitialise
+0000d0a0 vListInitialiseItem
+0000d0bc vListInsertEnd
+0000d140 vListInsert
+0000d204 vListRemove
+0000d288 esmGroup1Notification
+0000d294 esmGroup2Notification
+0000d2a0 memoryPort0TestFailNotification
+0000d2b8 memoryPort1TestFailNotification
+0000d2d0 adcNotification
+0000d38c canErrorNotification
+0000d3b0 canMessageNotification
+0000d408 gioNotification
+0000d414 mibspiNotification
+0000d424 mibspiGroupNotification
+0000d434 sciNotification
+0000d470 pwmNotification
+0000d484 edgeNotification
+0000d494 hetNotification
+0000d4c0 esmHighInterrupt
+0000d604 esmLowInterrupt
+0000d6e1 __aeabi_uldivmod
+0000d8d5 strtod
+0000dab9 strtold
+0000dc99 strtoll
+0000de74 adc1Group0Interrupt
+0000dec0 adc1Group1Interrupt
+0000df00 adc1Group2Interrupt
+0000df4c adc2Group0Interrupt
+0000df98 adc2Group1Interrupt
+0000dfe4 adc2Group2Interrupt
+0000e090 cmd_io_puts
+0000e124 cmd_io_write_bychar
+0000e19c cmd_io_read_bychar
+0000e220 initCmdProc
+0000e340 processCmd
+0000e3a1 strtoull
+0000e51c mibspi5HighLevelInterrupt
+0000e5cc mibspi5LowLevelInterrupt
+0000e694 vPortStartFirstTask
+0000e6c8 vPortYieldProcessor
+0000e750 vPreemptiveTick
+0000e7ec vPortYield
+0000e800 het1HighLevelInterrupt
+0000e8a8 het1LowLevelInterrupt
+0000e998 cmd_processor_run
+0000eaad strtol
+0000ebdd strtoul
+0000ecec pvPortMalloc
+0000ed94 vPortFree
+0000eda4 vPortInitialiseBlocks
+0000edb4 xPortGetFreeHeapSize
+0000edd4 moutSetPort
+0000ee38 moutGetPort
+0000eeac gioHighLevelInterrupt
+0000ef0c gioLowLevelInterrupt
+0000ef74 _dabort
+0000f035 sscanf
+0000f0ed __aeabi_memcpy
+0000f0ed __aeabi_memcpy4
+0000f0ed __aeabi_memcpy8
+0000f0ed memcpy
+0000f189 __aeabi_memclr
+0000f189 __aeabi_memclr4
+0000f189 __aeabi_memclr8
+0000f18b __aeabi_memset
+0000f18b __aeabi_memset4
+0000f18b __aeabi_memset8
+0000f191 memset
+0000f200 main
+0000f2d4 __aeabi_uidivmod
+0000f329 atoi
+0000f379 atol
+0000f3c9 copy_in
+0000f415 C$$EXIT
+0000f419 abort
+0000f421 exit
+0000f459 strtok
+0000f499 strncpy
+0000f4c8 dinSetPort
+0000f4e0 dinGetPort
+0000f4f5 strspn
+0000f51f strncmp
+0000f545 strcspn
+0000f565 _register_unlock
+0000f56b _register_lock
+0000f571 _nop
+0000f57d __aeabi_lmul
+0000f595 strcmp
+0000f5ad strrchr
+0000f5c5 strchr
+0000f5db strlen
+0000f5ef __TI_zero_init
+0000f601 isalnum
+0000f611 isdigit
+0000f621 isspace
+0000f631 strcpy
+0000f641 __TI_decompress_none
+0000f64f __TI_decompress_rle24
+0000f654 phantomInterrupt
+0000fae4 het1PROGRAM
+00010088 cmd_des_setPin
+000100a0 cmd_des_read
+000100b8 cmd_des_testadcconnetion
+000100d0 cmd_des_testcanloopback
+000100e8 cmd_des_help
+00010100 cmd_des_val
+00010118 cmd_des_valro
+00010130 cmd_des_valwo
+00010148 cmd_des_opchar_test
+00010160 cmd_des_testio
+00010178 cmd_des_error
+00010190 cmd_des_param
+000101a8 cmd_des_opchar_testro
+000101c0 cmd_des_test
+000101d8 cmd_des_prefix
+000101f0 cmd_des_num
+00010208 cmd_des_char
+00010220 cmd_des_charmid
+00010238 cmd_des_hiddedn
+00010278 _ctypes_
+000105a4 cmd_io_std_line
+00010710 __TI_Handler_Table_Base
+0001071c __TI_Handler_Table_Limit
+00010728 __TI_CINIT_Base
+00010738 __TI_CINIT_Limit
0800555c ed_line_in_std
080055b0 ed_line_out_std
08005608 g_sciTransfer
0800564c val
08005650 processCmdHandler
08005654 prompt
-08005658 cmd_list_1
-08005670 cmd_list_2
-08005690 cmd_list
-08005694 ed_line_buf_in_std
-080056ac ed_line_buf_out_std
-080056c4 pxCurrentTCB
-080056f4 cmd_list_main
-08005720 cmd_io_buf
-0800573c _lock
-08005740 _unlock
-08005744 _cleanup_ptr
-08005748 _dtors_ptr
-08005750 ulCriticalNesting
+08005660 _Denorm
+08005670 _Eps
+08005680 _Hugeval
+08005690 _Inf
+080056a0 _Nan
+080056b0 _Snan
+080056c0 _Rteps
+080056d0 _Xbig
+080056d8 _Zero
+080056e0 _LDenorm
+080056f0 _LEps
+08005700 _LInf
+08005710 _LNan
+08005720 _LSnan
+08005730 _LRteps
+08005740 _LXbig
+08005748 _LZero
+08005750 cmd_list_1
+08005768 cmd_list_2
+08005788 cmd_list
+0800578c cmd_list_main
+080057bc ed_line_buf_in_std
+080057d4 ed_line_buf_out_std
+080057ec moutPorts
+0800581c pxCurrentTCB
+0800584c cmd_io_buf
+08005868 moutBits
+08005874 _lock
+08005878 _unlock
+0800587c _cleanup_ptr
+08005880 _dtors_ptr
+08005888 ulCriticalNesting
+0800588c _Errno
ffffffff __binit__
ffffffff __c_args__
ffffffff binit
-[347 symbols]
+[438 symbols]
-"./source/system.obj" "./source/sys_startup.obj" "./source/sys_selftest.obj" "./source/sys_pmu.obj" "./source/sys_phantom.obj" "./source/sys_mpu.obj" "./source/sys_main.obj" "./source/sys_intvecs.obj" "./source/sys_core.obj" "./source/sci.obj" "./source/pinmux.obj" "./source/os_timer.obj" "./source/os_tasks.obj" "./source/os_queue.obj" "./source/os_portasm.obj" "./source/os_port.obj" "./source/os_list.obj" "./source/os_heap.obj" "./source/os_croutine.obj" "./source/notification.obj" "./source/i2str.obj" "./source/esm.obj" "./source/dma.obj" "./source/dabort.obj" "./source/commands.obj" "./source/cmdio_tisci.obj" "./source/cmdio_std_line.obj" "./source/cmd_proc_run.obj" "./source/cmd_proc_freertos_tms570.obj" "./source/cmd_proc.obj" "./source/cmd_io_line.obj" "./source/cmd_io.obj" "./source/can.obj" "./source/adc.obj" -l"rtsv7R4_T_be_v3D16_eabi.lib" "../source/sys_link.cmd"
\ No newline at end of file
+"./source/system.obj" "./source/sys_startup.obj" "./source/sys_selftest.obj" "./source/sys_pmu.obj" "./source/sys_phantom.obj" "./source/sys_mpu.obj" "./source/sys_main.obj" "./source/sys_intvecs.obj" "./source/sys_core.obj" "./source/sci.obj" "./source/pinmux.obj" "./source/os_timer.obj" "./source/os_tasks.obj" "./source/os_queue.obj" "./source/os_portasm.obj" "./source/os_port.obj" "./source/os_list.obj" "./source/os_heap.obj" "./source/os_croutine.obj" "./source/notification.obj" "./source/mout.obj" "./source/mibspi.obj" "./source/i2str.obj" "./source/het.obj" "./source/gio.obj" "./source/esm.obj" "./source/dma.obj" "./source/din.obj" "./source/dabort.obj" "./source/commands.obj" "./source/cmdio_tisci.obj" "./source/cmdio_std_line.obj" "./source/cmd_proc_run.obj" "./source/cmd_proc_freertos_tms570.obj" "./source/cmd_proc.obj" "./source/cmd_io_line.obj" "./source/cmd_io.obj" "./source/can.obj" "./source/adc.obj" -l"rtsv7R4_T_be_v3D16_eabi.lib" "../source/sys_link.cmd"
\ No newline at end of file
"./source/os_heap.obj" \
"./source/os_croutine.obj" \
"./source/notification.obj" \
+"./source/mout.obj" \
+"./source/mibspi.obj" \
"./source/i2str.obj" \
+"./source/het.obj" \
+"./source/gio.obj" \
"./source/esm.obj" \
"./source/dma.obj" \
+"./source/din.obj" \
"./source/dabort.obj" \
"./source/commands.obj" \
"./source/cmdio_tisci.obj" \
# Other Targets
clean:
-$(RM) $(TMS470_EXECUTABLE_OUTPUTS__QUOTED) "CmdProcTISCI.out"
- -$(RM) "source/adc.pp" "source/can.pp" "source/cmd_io.pp" "source/cmd_io_line.pp" "source/cmd_proc.pp" "source/cmd_proc_freertos_tms570.pp" "source/cmd_proc_run.pp" "source/cmdio_std_line.pp" "source/cmdio_tisci.pp" "source/commands.pp" "source/dma.pp" "source/esm.pp" "source/i2str.pp" "source/notification.pp" "source/os_croutine.pp" "source/os_heap.pp" "source/os_list.pp" "source/os_port.pp" "source/os_queue.pp" "source/os_tasks.pp" "source/os_timer.pp" "source/pinmux.pp" "source/sci.pp" "source/sys_main.pp" "source/sys_phantom.pp" "source/sys_selftest.pp" "source/sys_startup.pp" "source/system.pp"
- -$(RM) "source/adc.obj" "source/can.obj" "source/cmd_io.obj" "source/cmd_io_line.obj" "source/cmd_proc.obj" "source/cmd_proc_freertos_tms570.obj" "source/cmd_proc_run.obj" "source/cmdio_std_line.obj" "source/cmdio_tisci.obj" "source/commands.obj" "source/dabort.obj" "source/dma.obj" "source/esm.obj" "source/i2str.obj" "source/notification.obj" "source/os_croutine.obj" "source/os_heap.obj" "source/os_list.obj" "source/os_port.obj" "source/os_portasm.obj" "source/os_queue.obj" "source/os_tasks.obj" "source/os_timer.obj" "source/pinmux.obj" "source/sci.obj" "source/sys_core.obj" "source/sys_intvecs.obj" "source/sys_main.obj" "source/sys_mpu.obj" "source/sys_phantom.obj" "source/sys_pmu.obj" "source/sys_selftest.obj" "source/sys_startup.obj" "source/system.obj"
+ -$(RM) "source/adc.pp" "source/can.pp" "source/cmd_io.pp" "source/cmd_io_line.pp" "source/cmd_proc.pp" "source/cmd_proc_freertos_tms570.pp" "source/cmd_proc_run.pp" "source/cmdio_std_line.pp" "source/cmdio_tisci.pp" "source/commands.pp" "source/din.pp" "source/dma.pp" "source/esm.pp" "source/gio.pp" "source/het.pp" "source/i2str.pp" "source/mibspi.pp" "source/mout.pp" "source/notification.pp" "source/os_croutine.pp" "source/os_heap.pp" "source/os_list.pp" "source/os_port.pp" "source/os_queue.pp" "source/os_tasks.pp" "source/os_timer.pp" "source/pinmux.pp" "source/sci.pp" "source/sys_main.pp" "source/sys_phantom.pp" "source/sys_selftest.pp" "source/sys_startup.pp" "source/system.pp"
+ -$(RM) "source/adc.obj" "source/can.obj" "source/cmd_io.obj" "source/cmd_io_line.obj" "source/cmd_proc.obj" "source/cmd_proc_freertos_tms570.obj" "source/cmd_proc_run.obj" "source/cmdio_std_line.obj" "source/cmdio_tisci.obj" "source/commands.obj" "source/dabort.obj" "source/din.obj" "source/dma.obj" "source/esm.obj" "source/gio.obj" "source/het.obj" "source/i2str.obj" "source/mibspi.obj" "source/mout.obj" "source/notification.obj" "source/os_croutine.obj" "source/os_heap.obj" "source/os_list.obj" "source/os_port.obj" "source/os_portasm.obj" "source/os_queue.obj" "source/os_tasks.obj" "source/os_timer.obj" "source/pinmux.obj" "source/sci.obj" "source/sys_core.obj" "source/sys_intvecs.obj" "source/sys_main.obj" "source/sys_mpu.obj" "source/sys_phantom.obj" "source/sys_pmu.obj" "source/sys_selftest.obj" "source/sys_startup.obj" "source/system.obj"
-$(RM) "source/dabort.pp" "source/os_portasm.pp" "source/sys_core.pp" "source/sys_intvecs.pp" "source/sys_mpu.pp" "source/sys_pmu.pp"
-@echo 'Finished clean'
-@echo ' '
-"../source/adc.c" "../source/can.c" "../source/cmd_io.c" "../source/cmd_io_line.c" "../source/cmd_proc.c" "../source/cmd_proc_freertos_tms570.c" "../source/cmd_proc_run.c" "../source/cmdio_std_line.c" "../source/cmdio_tisci.c" "../source/commands.c" "../source/dabort.asm" "../source/dma.c" "../source/esm.c" "../source/i2str.c" "../source/notification.c" "../source/os_croutine.c" "../source/os_heap.c" "../source/os_list.c" "../source/os_port.c" "../source/os_portasm.asm" "../source/os_queue.c" "../source/os_tasks.c" "../source/os_timer.c" "../source/pinmux.c" "../source/sci.c" "../source/sys_core.asm" "../source/sys_intvecs.asm" "../source/sys_main.c" "../source/sys_mpu.asm" "../source/sys_phantom.c" "../source/sys_pmu.asm" "../source/sys_selftest.c" "../source/sys_startup.c" "../source/system.c"
\ No newline at end of file
+"../source/adc.c" "../source/can.c" "../source/cmd_io.c" "../source/cmd_io_line.c" "../source/cmd_proc.c" "../source/cmd_proc_freertos_tms570.c" "../source/cmd_proc_run.c" "../source/cmdio_std_line.c" "../source/cmdio_tisci.c" "../source/commands.c" "../source/dabort.asm" "../source/din.c" "../source/dma.c" "../source/esm.c" "../source/gio.c" "../source/het.c" "../source/i2str.c" "../source/mibspi.c" "../source/mout.c" "../source/notification.c" "../source/os_croutine.c" "../source/os_heap.c" "../source/os_list.c" "../source/os_port.c" "../source/os_portasm.asm" "../source/os_queue.c" "../source/os_tasks.c" "../source/os_timer.c" "../source/pinmux.c" "../source/sci.c" "../source/sys_core.asm" "../source/sys_intvecs.asm" "../source/sys_main.c" "../source/sys_mpu.asm" "../source/sys_phantom.c" "../source/sys_pmu.asm" "../source/sys_selftest.c" "../source/sys_startup.c" "../source/system.c"
\ No newline at end of file
source/commands.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/stdarg.h
source/commands.obj: ../include/can.h
source/commands.obj: ../include/adc.h
+source/commands.obj: ../include/din.h
+source/commands.obj: ../include/gio.h
+source/commands.obj: ../include/mout.h
+source/commands.obj: ../include/gio.h
+source/commands.obj: ../include/het.h
+source/commands.obj: ../include/gio.h
+source/commands.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h
+source/commands.obj: ../include/mibspi.h
+source/commands.obj: ../include/gio.h
../source/commands.c:
../include/cmd_proc.h:
/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/stdarg.h:
../include/can.h:
../include/adc.h:
+../include/din.h:
+../include/gio.h:
+../include/mout.h:
+../include/gio.h:
+../include/het.h:
+../include/gio.h:
+/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h:
+../include/mibspi.h:
+../include/gio.h:
--- /dev/null
+# FIXED
+
+source/din.obj: ../source/din.c
+source/din.obj: ../include/din.h
+source/din.obj: ../include/gio.h
+source/din.obj: ../include/sys_common.h
+
+../source/din.c:
+../include/din.h:
+../include/gio.h:
+../include/sys_common.h:
--- /dev/null
+# FIXED
+
+source/dmm.obj: ../source/dmm.c
+source/dmm.obj: ../include/dmm.h
+source/dmm.obj: ../include/sys_common.h
+source/dmm.obj: ../include/gio.h
+
+../source/dmm.c:
+../include/dmm.h:
+../include/sys_common.h:
+../include/gio.h:
--- /dev/null
+# FIXED
+
+source/gio.obj: ../source/gio.c
+source/gio.obj: ../include/gio.h
+source/gio.obj: ../include/sys_common.h
+
+../source/gio.c:
+../include/gio.h:
+../include/sys_common.h:
--- /dev/null
+# FIXED
+
+source/het.obj: ../source/het.c
+source/het.obj: ../include/het.h
+source/het.obj: ../include/sys_common.h
+source/het.obj: ../include/gio.h
+source/het.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h
+source/het.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/linkage.h
+
+../source/het.c:
+../include/het.h:
+../include/sys_common.h:
+../include/gio.h:
+/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h:
+/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/linkage.h:
--- /dev/null
+# FIXED
+
+source/mibspi.obj: ../source/mibspi.c
+source/mibspi.obj: ../include/mibspi.h
+source/mibspi.obj: ../include/sys_common.h
+source/mibspi.obj: ../include/gio.h
+
+../source/mibspi.c:
+../include/mibspi.h:
+../include/sys_common.h:
+../include/gio.h:
--- /dev/null
+# FIXED
+
+source/mout.obj: ../source/mout.c
+source/mout.obj: ../include/mout.h
+source/mout.obj: ../include/gio.h
+source/mout.obj: ../include/sys_common.h
+source/mout.obj: ../include/het.h
+source/mout.obj: ../include/gio.h
+source/mout.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h
+source/mout.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/linkage.h
+source/mout.obj: ../include/mibspi.h
+source/mout.obj: ../include/gio.h
+
+../source/mout.c:
+../include/mout.h:
+../include/gio.h:
+../include/sys_common.h:
+../include/het.h:
+../include/gio.h:
+/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h:
+/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/linkage.h:
+../include/mibspi.h:
+../include/gio.h:
source/notification.obj: ../include/htu.h
source/notification.obj: ../include/adc.h
source/notification.obj: ../include/can.h
+source/notification.obj: ../include/gio.h
source/notification.obj: ../include/sci.h
source/notification.obj: ../include/gio.h
source/notification.obj: ../include/FreeRTOS.h
../include/htu.h:
../include/adc.h:
../include/can.h:
+../include/gio.h:
../include/sci.h:
../include/gio.h:
../include/FreeRTOS.h:
@echo 'Finished building: $<'
@echo ' '
+source/din.obj: ../source/din.c $(GEN_OPTS) $(GEN_SRCS)
+ @echo 'Building file: $<'
+ @echo 'Invoking: ARM Compiler'
+ "/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/bin/cl470" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi -g --include_path="/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include" --include_path="../include" --diag_warning=225 --display_error_number --enum_type=packed --preproc_with_compile --preproc_dependency="source/din.pp" --obj_directory="source" $(GEN_OPTS__FLAG) "$(shell echo $<)"
+ @echo 'Finished building: $<'
+ @echo ' '
+
source/dma.obj: ../source/dma.c $(GEN_OPTS) $(GEN_SRCS)
@echo 'Building file: $<'
@echo 'Invoking: ARM Compiler'
@echo 'Finished building: $<'
@echo ' '
+source/gio.obj: ../source/gio.c $(GEN_OPTS) $(GEN_SRCS)
+ @echo 'Building file: $<'
+ @echo 'Invoking: ARM Compiler'
+ "/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/bin/cl470" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi -g --include_path="/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include" --include_path="../include" --diag_warning=225 --display_error_number --enum_type=packed --preproc_with_compile --preproc_dependency="source/gio.pp" --obj_directory="source" $(GEN_OPTS__FLAG) "$(shell echo $<)"
+ @echo 'Finished building: $<'
+ @echo ' '
+
+source/het.obj: ../source/het.c $(GEN_OPTS) $(GEN_SRCS)
+ @echo 'Building file: $<'
+ @echo 'Invoking: ARM Compiler'
+ "/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/bin/cl470" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi -g --include_path="/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include" --include_path="../include" --diag_warning=225 --display_error_number --enum_type=packed --preproc_with_compile --preproc_dependency="source/het.pp" --obj_directory="source" $(GEN_OPTS__FLAG) "$(shell echo $<)"
+ @echo 'Finished building: $<'
+ @echo ' '
+
source/i2str.obj: ../source/i2str.c $(GEN_OPTS) $(GEN_SRCS)
@echo 'Building file: $<'
@echo 'Invoking: ARM Compiler'
@echo 'Finished building: $<'
@echo ' '
+source/mibspi.obj: ../source/mibspi.c $(GEN_OPTS) $(GEN_SRCS)
+ @echo 'Building file: $<'
+ @echo 'Invoking: ARM Compiler'
+ "/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/bin/cl470" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi -g --include_path="/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include" --include_path="../include" --diag_warning=225 --display_error_number --enum_type=packed --preproc_with_compile --preproc_dependency="source/mibspi.pp" --obj_directory="source" $(GEN_OPTS__FLAG) "$(shell echo $<)"
+ @echo 'Finished building: $<'
+ @echo ' '
+
+source/mout.obj: ../source/mout.c $(GEN_OPTS) $(GEN_SRCS)
+ @echo 'Building file: $<'
+ @echo 'Invoking: ARM Compiler'
+ "/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/bin/cl470" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi -g --include_path="/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include" --include_path="../include" --diag_warning=225 --display_error_number --enum_type=packed --preproc_with_compile --preproc_dependency="source/mout.pp" --obj_directory="source" $(GEN_OPTS__FLAG) "$(shell echo $<)"
+ @echo 'Finished building: $<'
+ @echo ' '
+
source/notification.obj: ../source/notification.c $(GEN_OPTS) $(GEN_SRCS)
@echo 'Building file: $<'
@echo 'Invoking: ARM Compiler'
../source/cmdio_std_line.c \
../source/cmdio_tisci.c \
../source/commands.c \
+../source/din.c \
../source/dma.c \
../source/esm.c \
+../source/gio.c \
+../source/het.c \
../source/i2str.c \
+../source/mibspi.c \
+../source/mout.c \
../source/notification.c \
../source/os_croutine.c \
../source/os_heap.c \
./source/cmdio_tisci.obj \
./source/commands.obj \
./source/dabort.obj \
+./source/din.obj \
./source/dma.obj \
./source/esm.obj \
+./source/gio.obj \
+./source/het.obj \
./source/i2str.obj \
+./source/mibspi.obj \
+./source/mout.obj \
./source/notification.obj \
./source/os_croutine.obj \
./source/os_heap.obj \
./source/cmdio_std_line.pp \
./source/cmdio_tisci.pp \
./source/commands.pp \
+./source/din.pp \
./source/dma.pp \
./source/esm.pp \
+./source/gio.pp \
+./source/het.pp \
./source/i2str.pp \
+./source/mibspi.pp \
+./source/mout.pp \
./source/notification.pp \
./source/os_croutine.pp \
./source/os_heap.pp \
"source/cmdio_std_line.pp" \
"source/cmdio_tisci.pp" \
"source/commands.pp" \
+"source/din.pp" \
"source/dma.pp" \
"source/esm.pp" \
+"source/gio.pp" \
+"source/het.pp" \
"source/i2str.pp" \
+"source/mibspi.pp" \
+"source/mout.pp" \
"source/notification.pp" \
"source/os_croutine.pp" \
"source/os_heap.pp" \
"source/cmdio_tisci.obj" \
"source/commands.obj" \
"source/dabort.obj" \
+"source/din.obj" \
"source/dma.obj" \
"source/esm.obj" \
+"source/gio.obj" \
+"source/het.obj" \
"source/i2str.obj" \
+"source/mibspi.obj" \
+"source/mout.obj" \
"source/notification.obj" \
"source/os_croutine.obj" \
"source/os_heap.obj" \
"../source/cmdio_std_line.c" \
"../source/cmdio_tisci.c" \
"../source/commands.c" \
+"../source/din.c" \
"../source/dma.c" \
"../source/esm.c" \
+"../source/gio.c" \
+"../source/het.c" \
"../source/i2str.c" \
+"../source/mibspi.c" \
+"../source/mout.c" \
"../source/notification.c" \
"../source/os_croutine.c" \
"../source/os_heap.c" \
source/sys_main.obj: ../include/os_list.h
source/sys_main.obj: ../include/sci.h
source/sys_main.obj: ../include/gio.h
+source/sys_main.obj: ../include/mibspi.h
+source/sys_main.obj: ../include/gio.h
source/sys_main.obj: ../include/can.h
source/sys_main.obj: ../include/adc.h
+source/sys_main.obj: ../include/gio.h
+source/sys_main.obj: ../include/het.h
+source/sys_main.obj: ../include/gio.h
+source/sys_main.obj: /opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h
../source/sys_main.c:
../include/sys_common.h:
../include/os_list.h:
../include/sci.h:
../include/gio.h:
+../include/mibspi.h:
+../include/gio.h:
../include/can.h:
../include/adc.h:
+../include/gio.h:
+../include/het.h:
+../include/gio.h:
+/opt/ti/ccsv5/tools/compiler/tms470_4.9.1/include/string.h:
--- /dev/null
+/*
+ * din.h
+ *
+ * Created on: 29.8.2012
+ * Author: Michal Horn
+ */
+
+#ifndef DIN_H_
+#define DIN_H_
+
+#include "gio.h"
+
+#define DINGetBit( port, bit ) gioGetBit(port, bit)
+#define DINSetBit( port, bit, value ) gioSetBit(port, bit, value)
+
+#define DIN_PORT gioPORTA
+
+#define DIN8_BIT 0
+#define DIN9_BIT 1
+#define DIN10_BIT 2
+#define DIN11_BIT 3
+#define DIN12_BIT 4
+#define DIN13_BIT 5
+#define DIN14_BIT 6
+#define DIN15_BIT 7
+
+#define DIN8 DIN_PORT,DIN8_BIT
+#define DIN9 DIN_PORT,DIN9_BIT
+#define DIN10 DIN_PORT,DIN10_BIT
+#define DIN11 DIN_PORT,DIN11_BIT
+#define DIN12 DIN_PORT,DIN12_BIT
+#define DIN13 DIN_PORT,DIN13_BIT
+#define DIN14 DIN_PORT,DIN14_BIT
+#define DIN15 DIN_PORT,DIN15_BIT
+
+void dinSetPort(uint32_t value);
+uint32_t dinGetPort();
+
+
+#endif /* DIN_H_ */
--- /dev/null
+/*
+ * mout.h
+ *
+ * Created on: 29.8.2012
+ * Author: Michal Horn
+ */
+
+#ifndef MOUT_H_
+#define MOUT_H_
+
+#include "gio.h"
+#include "het.h"
+#include "mibspi.h"
+
+#define MOUTGetBit( port, bit ) gioGetBit(port, bit)
+#define MOUTSetBit( port, bit, value ) gioSetBit(port, bit, value)
+
+
+#define MOUT_PORT_GIO gioPORTB
+#define MOUT_PORT_SPI mibspiPORT5
+#define MOUT_PORT_HET hetPORT1
+
+#define MOUT6_EN_BIT 0
+#define MOUT5_EN_BIT 1
+#define MOUT6_IN_BIT 2
+#define MOUT5_IN_BIT 3
+#define MOUT4_EN_BIT 4
+#define MOUT3_EN_BIT 5
+#define MOUT4_IN_BIT 6
+#define MOUT3_IN_BIT 7
+#define MOUT2_EN_BIT PIN_SIMO_2
+#define MOUT1_EN_BIT PIN_SIMO_1
+#define MOUT2_IN_BIT PIN_HET_14
+#define MOUT1_IN_BIT PIN_HET_9
+
+#define MOUT6_EN MOUT_PORT_GIO,MOUT6_EN_BIT
+#define MOUT5_EN MOUT_PORT_GIO,MOUT5_EN_BIT
+#define MOUT6_IN MOUT_PORT_GIO,MOUT6_IN_BIT
+#define MOUT5_IN MOUT_PORT_GIO,MOUT5_IN_BIT
+#define MOUT4_EN MOUT_PORT_GIO,MOUT4_EN_BIT
+#define MOUT3_EN MOUT_PORT_GIO,MOUT3_EN_BIT
+#define MOUT4_IN MOUT_PORT_GIO,MOUT4_IN_BIT
+#define MOUT3_IN MOUT_PORT_GIO,MOUT3_IN_BIT
+#define MOUT2_EN MOUT_PORT_DMM,MOUT2_EN_BIT
+#define MOUT1_EN MOUT_PORT_DMM,MOUT1_EN_BIT
+#define MOUT2_IN MOUT_PORT_HET,MOUT2_IN_BIT
+#define MOUT1_IN MOUT_PORT_HET,MOUT1_IN_BIT
+
+void moutSetPort(uint32_t value);
+uint32_t moutGetPort();
+
+
+#endif /* MOUT_H_ */
void adc1Group1Interrupt(void)\r
{\r
/* USER CODE BEGIN (49) */\r
+ // Delete generated content after user code block!!!\r
adcNotification(adcREG1, adcGROUP1);\r
/* USER CODE END */\r
\r
#include "stdio.h"
#include "can.h"
#include "adc.h"
+#include "din.h"
+#include "mout.h"
#define ADC1_CHANNEL_COUNT 12
xSemaphoreHandle adcDataConverted;
ADCData_t adc1Data;
+extern gioPORT_t * dinPorts[8];
+extern gioPORT_t * moutPorts[12];
+extern uint8_t dinBits[8];
+extern uint8_t moutBits[12];
/* ------------------------------
* User defined command functions
* ------------------------------
*/
+int cmd_do_readMOUTValues(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[]) {
+ print((uint8_t *)"\r\nValues from MOUT port:");
+ uint32_t portVal = moutGetPort();
+ print((uint8_t *)"\r\npin\t|\tvalue");
+ uint8_t i;
+ for (i = 6, portVal>>6; i < 12; i++, portVal>>1) {
+ uint8_t bit = portVal&1;
+ char numBuf[2];
+ i2str(numBuf, i-5, 1, 10);
+ print((uint8_t *)"\r\n");
+ print((uint8_t *)numBuf);
+ print((uint8_t *)"\t|\t");
+ if (bit) {
+ print((uint8_t *)"1");
+ }
+ else {
+ print((uint8_t *)"0");
+ }
+ }
+ return 0;
+}
+int cmd_do_readDINValues(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[]) {
+ print((uint8_t *)"\r\nValues from DIN port:");
+ uint32_t portVal = dinGetPort();
+ print((uint8_t *)"\r\npin\t|\tvalue");
+ uint8_t i;
+ for (i = 0; i < 8; i++,portVal>>1) {
+ uint8_t bit = portVal&1;
+ print((uint8_t *)"\r\n");
+ char numBuf[1];
+ i2str(numBuf, i+8, 1, 10);
+ print((uint8_t *)numBuf);
+ print((uint8_t *)"\t|\t");
+ if (bit) {
+ print((uint8_t *)"1");
+ }
+ else {
+ print((uint8_t *)"0");
+ }
+ }
+ return 0;
+}
+
int cmd_do_readADC1Values(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
char numBuf[4]; // Buffer used for i2str conversion
print((uint8_t *)"\tvalue: ");
i2str(numBuf, adc1Data.adc_data[i].value, 1, 10);
print((uint8_t *)numBuf);
- print((uint8_t *)" (0x");
- i2str(numBuf, adc1Data.adc_data[i].value, 3, 16);
+ print((uint8_t *)" 0x");
+ i2str(numBuf, adc1Data.adc_data[i].value, 1, 16);
print((uint8_t *)numBuf);
}
return 0;
}
+int cmd_do_readValues(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[]) {
+ uint32_t suffix = 100;
+ int ret;
+ char* token = NULL;
+ if ((token = strtok(param[1], " ")) == NULL) {
+ print((uint8_t *)"ERROR: No suffix! MOUT Expected.");
+ return 1;
+ }
+
+ if (!strcmp(token, "ADC1"))
+ suffix = 1;
+ else if (!strcmp(token, "DIN"))
+ suffix = 2;
+ else if (!strcmp(token, "MOUT"))
+ suffix = 3;
+ else {
+ print((uint8_t *)"ERROR: Wrong suffix!");
+ return 1;
+ }
+ switch(suffix) {
+ case 1:
+ ret = cmd_do_readADC1Values(cmd_io, des, param);
+ break;
+ case 2:
+ ret = cmd_do_readDINValues(cmd_io, des, param);
+ break;
+ case 3:
+ ret = cmd_do_readMOUTValues(cmd_io, des, param);
+ break;
+ }
+
+ return ret;
+}
+
+int cmd_do_setPin(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[]) {
+ void (*setBit)(gioPORT_t *, uint32_t, uint32_t) = NULL;
+ gioPORT_t * port = NULL;
+ char* token = NULL;
+ uint32_t pin;
+ uint32_t bit;
+ uint32_t value;
+ uint32_t postfix = 100;
+ if ((token = strtok(param[1], " ")) == NULL) {
+ print((uint8_t *)"ERROR: No suffix! MOUT Expected.");
+ return 1;
+ }
+
+ if (!strcmp(token, "MOUT"))
+ postfix = 1;
+ else {
+ print((uint8_t *)"ERROR: Wrong suffix!");
+ return 1;
+ }
+ if ((token = strtok(param[2], " ")) == NULL) {
+ print((uint8_t *)"ERROR: Parameter 1 expected.");
+ return 1;
+ }
+ if (EOF == sscanf(token, "%d", &pin)){
+ print((uint8_t *)"ERROR: unsigned number expected as param 1!");
+ return 1;
+ }
+ if ((token = strtok(NULL, " ")) == NULL) {
+ print((uint8_t *)"ERROR: Parameter 2 expected.");
+ return 1;
+ }
+ if (EOF == sscanf(token, "%d", &value)){
+ print((uint8_t *)"ERROR: unsigned number expected as param 2!");
+ return 1;
+ }
+ if ((token = strtok(NULL, " ")) != NULL) {
+ print((uint8_t *)"ERROR: More than 2 parameters detected!");
+ return 1;
+ }
+ switch(postfix) {
+ case 1 :
+ setBit=&gioSetBit;
+ if (pin < 1 || pin > 6) {
+ print((uint8_t *)"ERROR: 1st parameter out of range <1;6>!");
+ return 1;
+ }
+ if (value != 1 && value != 0) {
+ print((uint8_t *)"ERROR: 2nd parameter out of range <0;1>!");
+ return 1;
+ }
+ port = moutPorts[pin-1];
+ bit = moutBits[pin-1];
+ break;
+ }
+ setBit(port, bit, value);
+ print((uint8_t *)"Bit has been set.");
+ return 0;
+}
+
int cmd_do_testADC1Connection(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
{
uint32_t Vn[ADC1_CHANNEL_COUNT]; // Nominal value, converted from ADC
* Command definitions
* -------------------
*/
+cmd_des_t const cmd_des_setPin={
+ 0, 0,
+ "SETBIT*","Sets given value to defined pin of port in suffix\r\n\t"
+ "-suffix: MOUT pin<1;6> value <0;1> - MOUT<pin>_IN <- value",
+ cmd_do_setPin, (void *)&cmd_list
+};
-cmd_des_t const cmd_des_readadc1={
+cmd_des_t const cmd_des_read={
0, 0,
- "ADCREAD","Read values from channels of ADC1",
- cmd_do_readADC1Values, (void *)&cmd_list
+ "READVAL*","Read values from channel\r\n\t"
+ "-suffix ADC1 - read values from ADC1\r\n\t"
+ "-suffix DIN - read values from DIN\r\n\t"
+ "-suffix MOUT - read values from MOUT",
+ cmd_do_readValues, (void *)&cmd_list
};
+
cmd_des_t const cmd_des_testadcconnetion={
0, 0,
"ADCCON","Test fitness of each ADC channel connection",
&cmd_des_error,
&cmd_des_testcanloopback,
&cmd_des_testadcconnetion,
- &cmd_des_readadc1,
+ &cmd_des_read,
+ &cmd_des_setPin,
CMD_DES_INCLUDE_SUBLIST(cmd_list_1),
CMD_DES_CONTINUE_AT(cmd_list_2),
&cmd_des_hiddedn,
--- /dev/null
+/*
+ * din.c
+ *
+ * Created on: 29.8.2012
+ * Author: michal
+ */
+#include "din.h"
+
+gioPORT_t * dinPorts[8] = { DIN_PORT, DIN_PORT, DIN_PORT, DIN_PORT,
+ DIN_PORT, DIN_PORT, DIN_PORT, DIN_PORT
+ };
+uint8_t dinBits[8] ={ DIN8_BIT, DIN9_BIT, DIN10_BIT, DIN11_BIT,
+ DIN12_BIT, DIN13_BIT, DIN14_BIT, DIN15_BIT
+ };
+
+
+/** @fn void dinSetPort(uint32_t value)
+* @brief Set value to port connected to DIN
+* @param[in] value to write to port
+* - 0bit - 7bit equals to DIN8 - DIN15 value
+* - 8bit - 31bit does not matter
+*
+* Set value of whole DIN port
+*/
+void dinSetPort(uint32_t value) {
+ gioSetPort(DIN_PORT, value);
+}
+
+/** @fn uint32_t dinGetPort()
+* @brief Read value from port connected to DIN
+*
+* Reads a the current value from the DIN port
+*/
+uint32_t dinGetPort() {
+ return gioGetPort(DIN_PORT);
+}
--- /dev/null
+/** @file gio.c \r
+* @brief GIO Driver Implementation File\r
+* @date 15.Mar.2012\r
+* @version 03.01.00\r
+*\r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2012, All rights reserved. */\r
+\r
+/* USER CODE BEGIN (0) */\r
+/* USER CODE END */\r
+\r
+#include "gio.h"\r
+\r
+/* USER CODE BEGIN (1) */\r
+/* USER CODE END */\r
+\r
+/** @fn void gioInit(void)\r
+* @brief Initializes the GIO Driver\r
+*\r
+* This function initializes the GIO module and set the GIO ports \r
+* to the inital values.\r
+*/\r
+void gioInit(void)\r
+{\r
+/* USER CODE BEGIN (2) */\r
+/* USER CODE END */\r
+\r
+ /** bring GIO module out of reset */\r
+ gioREG->GCR0 = 1;\r
+ gioREG->INTENACLR = 0xFF;\r
+ gioREG->LVLCLR = 0xFF; \r
+\r
+ /** @b initalise @b Port @b A */\r
+\r
+ /** - Port A output values */\r
+ gioPORTA->DOUT = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A direction */\r
+ gioPORTA->DIR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A open drain enable */\r
+ gioPORTA->PDR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A pullup / pulldown selection */\r
+ gioPORTA->PSL = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A pullup / pulldown enable*/\r
+ gioPORTA->PULDIS = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** @b initalise @b Port @b B */\r
+\r
+ /** - Port B output values */\r
+ gioPORTB->DOUT = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B direction */\r
+ gioPORTB->DIR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (1 << 2) /* Bit 2 */\r
+ | (1 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (1 << 6) /* Bit 6 */\r
+ | (1 << 7); /* Bit 7 */\r
+\r
+ /** - Port B open drain enable */\r
+ gioPORTB->PDR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B pullup / pulldown selection */\r
+ gioPORTB->PSL = 1 /* Bit 0 */\r
+ | (1 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (1 << 4) /* Bit 4 */\r
+ | (1 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B pullup / pulldown enable*/\r
+ gioPORTB->PULDIS = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+/* USER CODE BEGIN (3) */\r
+/* USER CODE END */\r
+\r
+ /** @b initalise @b interrupts */\r
+\r
+ /** - interrupt polarity */\r
+ gioREG->POL = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7) /* Bit 7 */\r
+\r
+ | (0 << 8) /* Bit 8 */\r
+ | (0 << 9) /* Bit 9 */\r
+ | (0 << 10) /* Bit 10 */\r
+ | (0 << 11) /* Bit 11 */\r
+ | (0 << 12) /* Bit 12 */\r
+ | (0 << 13) /* Bit 13 */\r
+ | (0 << 14) /* Bit 14 */\r
+ | (0 << 15);/* Bit 15 */\r
+\r
+\r
+ /** - interrupt level */\r
+ gioREG->LVLSET = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7) /* Bit 7 */\r
+\r
+ | (0 << 8) /* Bit 8 */\r
+ | (0 << 9) /* Bit 9 */\r
+ | (0 << 10) /* Bit 10 */\r
+ | (0 << 11) /* Bit 11 */\r
+ | (0 << 12) /* Bit 12 */\r
+ | (0 << 13) /* Bit 13 */\r
+ | (0 << 14) /* Bit 14 */\r
+ | (0 << 15);/* Bit 15 */\r
+\r
+ \r
+\r
+\r
+ /** - clear all pending interrupts */\r
+ gioREG->FLG = 0xFF;\r
+\r
+ /** - enable interrupts */\r
+ gioREG->INTENASET = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7) /* Bit 7 */\r
+\r
+ | (0 << 8) /* Bit 8 */\r
+ | (0 << 9) /* Bit 9 */\r
+ | (0 << 10) /* Bit 10 */\r
+ | (0 << 11) /* Bit 11 */\r
+ | (0 << 12) /* Bit 12 */\r
+ | (0 << 13) /* Bit 13 */\r
+ | (0 << 14) /* Bit 14 */\r
+ | (0 << 15);/* Bit 15 */\r
+\r
+/* USER CODE BEGIN (4) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn void gioSetDirection(gioPORT_t *port, uint32_t dir)\r
+* @brief Set Port Direction\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] dir value to write to DIR register\r
+*\r
+* Set the direction of GIO pins at runtime.\r
+*/\r
+void gioSetDirection(gioPORT_t *port, uint32_t dir)\r
+{\r
+ port->DIR = dir;\r
+}\r
+\r
+\r
+/** @fn void gioSetBit(gioPORT_t *port, uint32_t bit, uint32_t value)\r
+* @brief Write Bit\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] bit number 0-7 that specifies the bit to be written to.\r
+* - 0: LSB\r
+* - 7: MSB\r
+* @param[in] value binrary value to write to bit\r
+*\r
+* Writes a value to the specified pin of the given GIO port\r
+*/\r
+void gioSetBit(gioPORT_t *port, uint32_t bit, uint32_t value)\r
+{\r
+/* USER CODE BEGIN (5) */\r
+/* USER CODE END */\r
+\r
+ if (value != 0)\r
+ {\r
+ port->DSET = 1 << bit;\r
+ }\r
+ else\r
+ {\r
+ port->DCLR = 1 << bit;\r
+ }\r
+}\r
+\r
+\r
+/** @fn void gioSetPort(gioPORT_t *port, uint32_t value)\r
+* @brief Write Port Value\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] value value to write to port\r
+*\r
+* Writes a value to all pin of a given GIO port\r
+*/\r
+void gioSetPort(gioPORT_t *port, uint32_t value)\r
+{\r
+/* USER CODE BEGIN (6) */\r
+/* USER CODE END */\r
+\r
+ port->DOUT = value;\r
+\r
+/* USER CODE BEGIN (7) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+\r
+/** @fn uint32_t gioGetBit(gioPORT_t *port, uint32_t bit)\r
+* @brief Read Bit\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] bit number 0-7 that specifies the bit to be written to.\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Reads a the current value from the specified pin of the given GIO port\r
+*/\r
+uint32_t gioGetBit(gioPORT_t *port, uint32_t bit)\r
+{\r
+/* USER CODE BEGIN (8) */\r
+/* USER CODE END */\r
+\r
+ return (port->DIN >> bit) & 1U;\r
+}\r
+\r
+\r
+/** @fn uint32_t gioGetPort(gioPORT_t *port)\r
+* @brief Read Port Value\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+*\r
+* Reads a the current value of a given GIO port\r
+*/\r
+uint32_t gioGetPort(gioPORT_t *port)\r
+{\r
+/* USER CODE BEGIN (9) */\r
+/* USER CODE END */\r
+\r
+ return port->DIN;\r
+}\r
+\r
+/** @fn void gioToggleBit(gioPORT_t *port, uint32_t bit)\r
+* @brief Write Bit\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] bit number 0-7 that specifies the bit to be written to.\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Toggle a value to the specified pin of the given GIO port\r
+*/\r
+void gioToggleBit(gioPORT_t *port, uint32_t bit)\r
+{\r
+/* USER CODE BEGIN (10) */\r
+/* USER CODE END */\r
+\r
+ if ((port->DIN & (1 << bit)) != 0)\r
+ {\r
+ port->DCLR = 1 << bit;\r
+ }\r
+ else\r
+ {\r
+ port->DSET = 1 << bit;\r
+ }\r
+}\r
+\r
+/** @fn void gioEnableNotification(uint32_t bit)\r
+* @brief Enable Interrupt\r
+* @param[in] bit interrupt pin to enable\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Enables an innterrupt pin of PortA\r
+*/\r
+void gioEnableNotification(uint32_t bit)\r
+{\r
+/* USER CODE BEGIN (11) */\r
+/* USER CODE END */\r
+\r
+ gioREG->INTENASET = 1 << bit;\r
+}\r
+\r
+\r
+/** @fn void gioDisableNotification(uint32_t bit)\r
+* @brief Disable Interrupt\r
+* @param[in] bit interrupt pin to enable\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Disables an innterrupt pin of PortA\r
+*/\r
+void gioDisableNotification(uint32_t bit)\r
+{\r
+/* USER CODE BEGIN (12) */\r
+/* USER CODE END */\r
+\r
+ gioREG->INTENACLR = 1 << bit;\r
+}\r
+\r
+\r
+/** @fn void gioHighLevelInterrupt(void)\r
+* @brief GIO Interrupt Handler\r
+*\r
+* High Level Interrupt handler for GIO pin interrupt \r
+*\r
+*/\r
+#pragma INTERRUPT(gioHighLevelInterrupt, IRQ)\r
+\r
+void gioHighLevelInterrupt(void)\r
+{\r
+ int offset = gioREG->OFFSET0 - 1U;\r
+\r
+/* USER CODE BEGIN (13) */\r
+/* USER CODE END */\r
+\r
+ if (offset >= 0)\r
+ {\r
+ gioNotification(offset);\r
+ }\r
+\r
+/* USER CODE BEGIN (14) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+\r
+/** @fn void gioLowLevelInterrupt(void)\r
+* @brief GIO Interrupt Handler\r
+*\r
+* Low Level Interrupt handler for GIO pin interrupt \r
+*\r
+*/\r
+#pragma INTERRUPT(gioLowLevelInterrupt, IRQ)\r
+\r
+void gioLowLevelInterrupt(void)\r
+{\r
+ int offset = gioREG->OFFSET1 - 1U;\r
+\r
+/* USER CODE BEGIN (15) */\r
+/* USER CODE END */\r
+\r
+ if (offset >= 0)\r
+ {\r
+ gioNotification(offset);\r
+ }\r
+\r
+/* USER CODE BEGIN (16) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+\r
+\r
--- /dev/null
+/** @file het.c \r
+* @brief HET Driver Implementation File\r
+* @date 15.Mar.2012\r
+* @version 03.01.00\r
+*\r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2012, All rights reserved. */\r
+\r
+#include "het.h"\r
+\r
+/* USER CODE BEGIN (0) */\r
+/* USER CODE END */\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Global variables */\r
+\r
+static const uint32_t s_het1pwmPolarity[] =\r
+{\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+};\r
+\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Default Program */\r
+\r
+/** @var const hetINSTRUCTION_t het1PROGRAM[]\r
+* @brief Default Program\r
+*\r
+* Het program running after initialization.\r
+*/\r
+\r
+const hetINSTRUCTION_t het1PROGRAM[] =\r
+{\r
+ /* CNT: Timebase\r
+ * - Instruction = 0\r
+ * - Next instruction = 1\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = na\r
+ * - Reg = T\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00002C80U,\r
+ /* Control */\r
+ 0x01FFFFFFU,\r
+ /* Data */\r
+ 0xFFFFFF80U,\r
+ },\r
+ /* PWCNT: PWM 0 -> Duty Cycle\r
+ * - Instruction = 1\r
+ * - Next instruction = 2\r
+ * - Conditional next instruction = 2\r
+ * - Interrupt = 1\r
+ * - Pin = 8\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000055C0U,\r
+ /* Control */\r
+ (0x00004006U | (8U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 0 -> Period\r
+ * - Instruction = 2\r
+ * - Next instruction = 3\r
+ * - Conditional next instruction = 41\r
+ * - Interrupt = 2\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00007480U,\r
+ /* Control */\r
+ 0x00052006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 1 -> Duty Cycle\r
+ * - Instruction = 3\r
+ * - Next instruction = 4\r
+ * - Conditional next instruction = 4\r
+ * - Interrupt = 3\r
+ * - Pin = 10\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000095C0U,\r
+ /* Control */\r
+ (0x00008006U | (10U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 1 -> Period\r
+ * - Instruction = 4\r
+ * - Next instruction = 5\r
+ * - Conditional next instruction = 43\r
+ * - Interrupt = 4\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000B480U,\r
+ /* Control */\r
+ 0x00056006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 2 -> Duty Cycle\r
+ * - Instruction = 5\r
+ * - Next instruction = 6\r
+ * - Conditional next instruction = 6\r
+ * - Interrupt = 5\r
+ * - Pin = 12\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000D5C0U,\r
+ /* Control */\r
+ (0x0000C006U | (12U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 2 -> Period\r
+ * - Instruction = 6\r
+ * - Next instruction = 7\r
+ * - Conditional next instruction = 45\r
+ * - Interrupt = 6\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000F480U,\r
+ /* Control */\r
+ 0x0005A006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 3 -> Duty Cycle\r
+ * - Instruction = 7\r
+ * - Next instruction = 8\r
+ * - Conditional next instruction = 8\r
+ * - Interrupt = 7\r
+ * - Pin = 14\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000115C0U,\r
+ /* Control */\r
+ (0x00010006U | (14U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 3 -> Period\r
+ * - Instruction = 8\r
+ * - Next instruction = 9\r
+ * - Conditional next instruction = 47\r
+ * - Interrupt = 8\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00013480U,\r
+ /* Control */\r
+ 0x0005E006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 4 -> Duty Cycle\r
+ * - Instruction = 9\r
+ * - Next instruction = 10\r
+ * - Conditional next instruction = 10\r
+ * - Interrupt = 9\r
+ * - Pin = 16\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000155C0U,\r
+ /* Control */\r
+ (0x00014006U | (16U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 4 -> Period\r
+ * - Instruction = 10\r
+ * - Next instruction = 11\r
+ * - Conditional next instruction = 49\r
+ * - Interrupt = 10\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00017480U,\r
+ /* Control */\r
+ 0x00062006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 5 -> Duty Cycle\r
+ * - Instruction = 11\r
+ * - Next instruction = 12\r
+ * - Conditional next instruction = 12\r
+ * - Interrupt = 11\r
+ * - Pin = 17\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000195C0U,\r
+ /* Control */\r
+ (0x00018006U | (17U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 5 -> Period\r
+ * - Instruction = 12\r
+ * - Next instruction = 13\r
+ * - Conditional next instruction = 51\r
+ * - Interrupt = 12\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001B480U,\r
+ /* Control */\r
+ 0x00066006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 6 -> Duty Cycle\r
+ * - Instruction = 13\r
+ * - Next instruction = 14\r
+ * - Conditional next instruction = 14\r
+ * - Interrupt = 13\r
+ * - Pin = 18\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001D5C0U,\r
+ /* Control */\r
+ (0x0001C006U | (18U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 6 -> Period\r
+ * - Instruction = 14\r
+ * - Next instruction = 15\r
+ * - Conditional next instruction = 53\r
+ * - Interrupt = 14\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001F480U,\r
+ /* Control */\r
+ 0x0006A006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 7 -> Duty Cycle\r
+ * - Instruction = 15\r
+ * - Next instruction = 16\r
+ * - Conditional next instruction = 16\r
+ * - Interrupt = 15\r
+ * - Pin = 19\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000215C0U,\r
+ /* Control */\r
+ (0x00020006U | (19U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 7 -> Period\r
+ * - Instruction = 16\r
+ * - Next instruction = 17\r
+ * - Conditional next instruction = 55\r
+ * - Interrupt = 16\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00023480U,\r
+ /* Control */\r
+ 0x0006E006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 0\r
+ * - Instruction = 17\r
+ * - Next instruction = 18\r
+ * - Conditional next instruction = 18\r
+ * - Interrupt = 17\r
+ * - Pin = 9\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00025440U,\r
+ /* Control */\r
+ (0x00024007U | (9U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 1\r
+ * - Instruction = 18\r
+ * - Next instruction = 19\r
+ * - Conditional next instruction = 19\r
+ * - Interrupt = 18\r
+ * - Pin = 11\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00027440U,\r
+ /* Control */\r
+ (0x00026007U | (11U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 2\r
+ * - Instruction = 19\r
+ * - Next instruction = 20\r
+ * - Conditional next instruction = 20\r
+ * - Interrupt = 19\r
+ * - Pin = 13\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00029440U,\r
+ /* Control */\r
+ (0x00028007U | (13U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 3\r
+ * - Instruction = 20\r
+ * - Next instruction = 21\r
+ * - Conditional next instruction = 21\r
+ * - Interrupt = 20\r
+ * - Pin = 15\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0002B440U,\r
+ /* Control */\r
+ (0x0002A007U | (15U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 4\r
+ * - Instruction = 21\r
+ * - Next instruction = 22\r
+ * - Conditional next instruction = 22\r
+ * - Interrupt = 21\r
+ * - Pin = 20\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0002D440U,\r
+ /* Control */\r
+ (0x0002C007U | (20U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 5\r
+ * - Instruction = 22\r
+ * - Next instruction = 23\r
+ * - Conditional next instruction = 23\r
+ * - Interrupt = 22\r
+ * - Pin = 21\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0002F440U,\r
+ /* Control */\r
+ (0x0002E007U | (21U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 6\r
+ * - Instruction = 23\r
+ * - Next instruction = 24\r
+ * - Conditional next instruction = 24\r
+ * - Interrupt = 23\r
+ * - Pin = 22\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00031440U,\r
+ /* Control */\r
+ (0x00030007U | (22U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 7\r
+ * - Instruction = 24\r
+ * - Next instruction = 25\r
+ * - Conditional next instruction = 25\r
+ * - Interrupt = 24\r
+ * - Pin = 23\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00033440U,\r
+ /* Control */\r
+ (0x00032007U | (23U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 0\r
+ * - Instruction = 25\r
+ * - Next instruction = 26\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 0\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00034E00U | (0U << 6U) | (0U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 0\r
+ * - Instruction = 26\r
+ * - Next instruction = 27\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 0 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00036E80U | (0U << 6U) | ((0U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 1\r
+ * - Instruction = 27\r
+ * - Next instruction = 28\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 2\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00038E00U | (0U << 6U) | (2U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 1\r
+ * - Instruction = 28\r
+ * - Next instruction = 29\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 2 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0003AE80U | (0U << 6U) | ((2U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 2\r
+ * - Instruction = 29\r
+ * - Next instruction = 30\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 4\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0003CE00U | (0U << 6U) | (4U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 2\r
+ * - Instruction = 30\r
+ * - Next instruction = 31\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 4 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0003EE80U | (0U << 6U) | ((4U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 3\r
+ * - Instruction = 31\r
+ * - Next instruction = 32\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 6\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00040E00U | (0U << 6U) | (6U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 3\r
+ * - Instruction = 32\r
+ * - Next instruction = 33\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 6 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00042E80U | (0U << 6U) | ((6U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 4\r
+ * - Instruction = 33\r
+ * - Next instruction = 34\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 24\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00044E00U | (0U << 6U) | (24U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 4\r
+ * - Instruction = 34\r
+ * - Next instruction = 35\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 24 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00046E80U | (0U << 6U) | ((24U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 5\r
+ * - Instruction = 35\r
+ * - Next instruction = 36\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 26\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00048E00U | (0U << 6U) | (26U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 5\r
+ * - Instruction = 36\r
+ * - Next instruction = 37\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 26 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0004AE80U | (0U << 6U) | ((26U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 6\r
+ * - Instruction = 37\r
+ * - Next instruction = 38\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 28\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0004CE00U | (0U << 6U) | (28U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 6\r
+ * - Instruction = 38\r
+ * - Next instruction = 39\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 28 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0004EE80U | (0U << 6U) | ((28U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 7\r
+ * - Instruction = 39\r
+ * - Next instruction = 40\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 30\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00050E00U | (0U << 6U) | (30U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 7\r
+ * - Instruction = 40\r
+ * - Next instruction = 57\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 30 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00072E80U | (0U << 6U) | ((30U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* MOV64: PWM 0 -> Duty Cycle Update\r
+ * - Instruction = 41\r
+ * - Next instruction = 42\r
+ * - Conditional next instruction = 2\r
+ * - Interrupt = 1\r
+ * - Pin = 8\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00054201U,\r
+ /* Control */\r
+ (0x00004007U | (0U << 22U) | (8U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 0 -> Period Update\r
+ * - Instruction = 42\r
+ * - Next instruction = 3\r
+ * - Conditional next instruction = 41\r
+ * - Interrupt = 2\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00006202U,\r
+ /* Control */\r
+ (0x00052007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 1 -> Duty Cycle Update\r
+ * - Instruction = 43\r
+ * - Next instruction = 44\r
+ * - Conditional next instruction = 4\r
+ * - Interrupt = 3\r
+ * - Pin = 10\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00058203U,\r
+ /* Control */\r
+ (0x00008007U | (0U << 22U) | (10U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 1 -> Period Update\r
+ * - Instruction = 44\r
+ * - Next instruction = 5\r
+ * - Conditional next instruction = 43\r
+ * - Interrupt = 4\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000A204U,\r
+ /* Control */\r
+ (0x00056007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 2 -> Duty Cycle Update\r
+ * - Instruction = 45\r
+ * - Next instruction = 46\r
+ * - Conditional next instruction = 6\r
+ * - Interrupt = 5\r
+ * - Pin = 12\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0005C205U,\r
+ /* Control */\r
+ (0x0000C007U | (0U << 22U) | (12U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 2 -> Period Update\r
+ * - Instruction = 46\r
+ * - Next instruction = 7\r
+ * - Conditional next instruction = 45\r
+ * - Interrupt = 6\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000E206U,\r
+ /* Control */\r
+ (0x0005A007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 3 -> Duty Cycle Update\r
+ * - Instruction = 47\r
+ * - Next instruction = 48\r
+ * - Conditional next instruction = 8\r
+ * - Interrupt = 7\r
+ * - Pin = 14\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00060207U,\r
+ /* Control */\r
+ (0x00010007U | (0U << 22U) | (14U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 3 -> Period Update\r
+ * - Instruction = 48\r
+ * - Next instruction = 9\r
+ * - Conditional next instruction = 47\r
+ * - Interrupt = 8\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00012208U,\r
+ /* Control */\r
+ (0x0005E007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 4 -> Duty Cycle Update\r
+ * - Instruction = 49\r
+ * - Next instruction = 50\r
+ * - Conditional next instruction = 10\r
+ * - Interrupt = 9\r
+ * - Pin = 16\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00064209U,\r
+ /* Control */\r
+ (0x00014007U | (0U << 22U) | (16U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 4 -> Period Update\r
+ * - Instruction = 50\r
+ * - Next instruction = 11\r
+ * - Conditional next instruction = 49\r
+ * - Interrupt = 10\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001620AU,\r
+ /* Control */\r
+ (0x00062007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 5 -> Duty Cycle Update\r
+ * - Instruction = 51\r
+ * - Next instruction = 52\r
+ * - Conditional next instruction = 12\r
+ * - Interrupt = 11\r
+ * - Pin = 17\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0006820BU,\r
+ /* Control */\r
+ (0x00018007U | (0U << 22U) | (17U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 5 -> Period Update\r
+ * - Instruction = 52\r
+ * - Next instruction = 13\r
+ * - Conditional next instruction = 51\r
+ * - Interrupt = 12\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001A20CU,\r
+ /* Control */\r
+ (0x00066007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 6 -> Duty Cycle Update\r
+ * - Instruction = 53\r
+ * - Next instruction = 54\r
+ * - Conditional next instruction = 14\r
+ * - Interrupt = 13\r
+ * - Pin = 18\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0006C20DU,\r
+ /* Control */\r
+ (0x0001C007U | (0U << 22U) | (18U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 6 -> Period Update\r
+ * - Instruction = 54\r
+ * - Next instruction = 15\r
+ * - Conditional next instruction = 53\r
+ * - Interrupt = 14\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001E20EU,\r
+ /* Control */\r
+ (0x0006A007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 7 -> Duty Cycle Update\r
+ * - Instruction = 55\r
+ * - Next instruction = 56\r
+ * - Conditional next instruction = 16\r
+ * - Interrupt = 15\r
+ * - Pin = 19\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0007020FU,\r
+ /* Control */\r
+ (0x00020007U | (0U << 22U) | (19U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 7 -> Period Update\r
+ * - Instruction = 56\r
+ * - Next instruction = 17\r
+ * - Conditional next instruction = 55\r
+ * - Interrupt = 16\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00022210U,\r
+ /* Control */\r
+ (0x0006E007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* WCAP: Capture timestamp\r
+ * - Instruction = 57\r
+ * - Next instruction = 0\r
+ * - Conditional next instruction = 0\r
+ * - Interrupt = na\r
+ * - Pin = na\r
+ * - Reg = T\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00001600U,\r
+ /* Control */\r
+ (0x00000004U),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+};\r
+\r
+\r
+\r
+/** @fn void hetInit(void)\r
+* @brief Initializes the het Driver\r
+*\r
+* This function initializes the het 1 module.\r
+*/\r
+void hetInit(void)\r
+{\r
+ /** @b intalise @b HET */\r
+\r
+ /** - Set HET pins default output value */\r
+ hetREG1->DOUT = (0U << 31U)\r
+ | (0U << 30U)\r
+ | (0U << 29U)\r
+ | (0U << 28U) \r
+ | (0U << 27U) \r
+ | (0U << 26U) \r
+ | (0U << 25U) \r
+ | (0U << 24U) \r
+ | (0U << 23U) \r
+ | (0U << 22U) \r
+ | (0U << 21U) \r
+ | (0U << 20U) \r
+ | (0U << 19U) \r
+ | (0U << 18U) \r
+ | (0U << 17U) \r
+ | (0U << 16U) \r
+ | (0U << 15U) \r
+ | (0U << 14U) \r
+ | (0U << 13U) \r
+ | (0U << 12U) \r
+ | (0U << 11U) \r
+ | (0U << 10U) \r
+ | (0U << 9U)\r
+ | (0U << 8U)\r
+ | (0U << 7U)\r
+ | (0U << 6U)\r
+ | (0U << 5U)\r
+ | (0U << 4U)\r
+ | (0U << 3U)\r
+ | (0U << 2U)\r
+ | (0U << 1U)\r
+ | (0U);\r
+\r
+ /** - Set HET pins direction */\r
+ hetREG1->DIR = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00004000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000200U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins open drain enable */\r
+ hetREG1->PDR = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins pullup/down enable */\r
+ hetREG1->PULDIS = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins pullup/down select */\r
+ hetREG1->PSL = 0x80000000U \r
+ | 0x40000000U \r
+ | 0x20000000U \r
+ | 0x10000000U \r
+ | 0x08000000U \r
+ | 0x04000000U \r
+ | 0x02000000U \r
+ | 0x01000000U \r
+ | 0x00800000U \r
+ | 0x00400000U \r
+ | 0x00200000U \r
+ | 0x00100000U \r
+ | 0x00080000U \r
+ | 0x00040000U \r
+ | 0x00020000U \r
+ | 0x00010000U \r
+ | 0x00008000U \r
+ | 0x00004000U \r
+ | 0x00002000U \r
+ | 0x00001000U \r
+ | 0x00000800U \r
+ | 0x00000400U \r
+ | 0x00000200U\r
+ | 0x00000100U\r
+ | 0x00000080U\r
+ | 0x00000040U\r
+ | 0x00000020U\r
+ | 0x00000010U\r
+ | 0x00000008U\r
+ | 0x00000004U\r
+ | 0x00000002U\r
+ | 0x00000001U;\r
+\r
+ /** - Set HET pins high resolution share */\r
+ hetREG1->HRSH = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins AND share */\r
+ hetREG1->AND = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U; \r
+\r
+ /** - Set HET pins XOR share */\r
+ hetREG1->XOR = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+ \r
+/* USER CODE BEGIN (1) */\r
+/* USER CODE END */\r
+\r
+ /** - Setup prescaler values\r
+ * - Loop resolution prescaler\r
+ * - High resolution prescaler\r
+ */\r
+ hetREG1->PFR = (6U << 8U)\r
+ | (0U);\r
+ \r
+ /** - Fill HET RAM with opcodes and Data */\r
+ memcpy((void *)hetRAM1, (const void *)het1PROGRAM, sizeof(het1PROGRAM));\r
+\r
+ /** - Setup interrupt priority level \r
+ * - PWM 0 end of duty level\r
+ * - PWM 0 end of period level\r
+ * - PWM 1 end of duty level\r
+ * - PWM 1 end of period level\r
+ * - PWM 2 end of duty level\r
+ * - PWM 2 end of period level\r
+ * - PWM 3 end of duty level\r
+ * - PWM 3 end of period level\r
+ * - PWM 4 end of duty level\r
+ * - PWM 4 end of period level\r
+ * - PWM 5 end of duty level\r
+ * - PWM 5 end of period level\r
+ * - PWM 6 end of duty level\r
+ * - PWM 6 end of period level\r
+ * - PWM 7 end of duty level\r
+ * - PWM 7 end of period level\r
+\r
+ * - CCU Edge Detection 0 level\r
+ * - CCU Edge Detection 1 level\r
+ * - CCU Edge Detection 2 level\r
+ * - CCU Edge Detection 3 level\r
+ * - CCU Edge Detection 4 level\r
+ * - CCU Edge Detection 5 level\r
+ * - CCU Edge Detection 6 level\r
+ * - CCU Edge Detection 7 level\r
+ */\r
+ hetREG1->PRY = 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+ \r
+ /** - Enable interrupts \r
+ * - PWM 0 end of duty\r
+ * - PWM 0 end of period\r
+ * - PWM 1 end of duty\r
+ * - PWM 1 end of period\r
+ * - PWM 2 end of duty\r
+ * - PWM 2 end of period\r
+ * - PWM 3 end of duty\r
+ * - PWM 3 end of period\r
+ * - PWM 4 end of duty\r
+ * - PWM 4 end of period\r
+ * - PWM 5 end of duty\r
+ * - PWM 5 end of period\r
+ * - PWM 6 end of duty\r
+ * - PWM 6 end of period\r
+ * - PWM 7 end of duty\r
+ * - PWM 7 end of period\r
+ * - CCU Edge Detection 0\r
+ * - CCU Edge Detection 1\r
+ * - CCU Edge Detection 2\r
+ * - CCU Edge Detection 3\r
+ * - CCU Edge Detection 4\r
+ * - CCU Edge Detection 5\r
+ * - CCU Edge Detection 6\r
+ * - CCU Edge Detection 7\r
+ */\r
+ hetREG1->INTENAC = 0xFFFFFFFFU;\r
+ hetREG1->INTENAS = 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ \r
+ /** - Parity control register \r
+ * - Enable/Disable Parity check\r
+ */\r
+ hetREG1->PCREG = 0x00000005U;\r
+ \r
+ /** - Setup control register \r
+ * - Enable output buffers\r
+ * - Ignore software breakpoints\r
+ * - Master mode\r
+ * - Enable HET\r
+ */\r
+ hetREG1->GCR = 0x01030001U;\r
+ /** @note This function has to be called before the driver can be used.\n\r
+ * This function has to be executed in priviledged mode.\n\r
+ */\r
+\r
+\r
+\r
+}\r
+\r
+/** @fn void pwmStart( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+* @brief Start pwm signal\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+*\r
+* Start the given pwm signal\r
+*/\r
+\r
+void pwmStart( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+{\r
+ \r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control |= 0x00400000U;\r
+}\r
+\r
+\r
+/** @fn void pwmStop( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+* @brief Stop pwm signal\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+*\r
+* Stop the given pwm signal\r
+*/\r
+\r
+void pwmStop( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+{\r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control &= ~0x00400000U;\r
+}\r
+\r
+\r
+/** @fn void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32_t pwm, uint32_t duty)\r
+* @brief Set duty cycle\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] duty duty cycle in %.\r
+*\r
+* Sets a new duty cycle on the given pwm signal\r
+*/\r
+\r
+void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32_t pwm, uint32_t duty)\r
+{\r
+ uint32_t action;\r
+ uint32_t pwmPolarity;\r
+ double period = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128U;\r
+ if(hetRAM == hetRAM1)\r
+ {\r
+ pwmPolarity = s_het1pwmPolarity[pwm];\r
+ }\r
+ else\r
+ {\r
+ }\r
+ if (duty == 0U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 0U : 2U;\r
+ }\r
+ else if (duty >= 100U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 2U : 0U;\r
+ }\r
+ else\r
+ {\r
+ action = pwmPolarity;\r
+ }\r
+ \r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control = (hetRAM->Instruction[(pwm << 1U) + 41U].Control & ~0x18U) | (action << 3U);\r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Data = (uint32_t)(period * duty / 100.0) + 128U;\r
+}\r
+\r
+\r
+/** @fn void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm, hetSIGNAL_t signal)\r
+* @brief Set period\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] signal signal \r
+ - duty cycle in %.\r
+* - period period in us.\r
+*\r
+* Sets a new pwm signal\r
+*/\r
+\r
+void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm, hetSIGNAL_t signal)\r
+{\r
+ uint32_t action;\r
+ uint32_t period;\r
+ uint32_t pwmPolarity;\r
+ \r
+ if(hetRAM == hetRAM1)\r
+ {\r
+ period = (uint32_t)(signal.period * 1000.0 / 800.000) << 7U;\r
+ pwmPolarity = s_het1pwmPolarity[pwm];\r
+ }\r
+ else\r
+ {\r
+ }\r
+ if (signal.duty == 0U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 0U : 2U;\r
+ }\r
+ else if (signal.duty >= 100U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 2U : 0U;\r
+ }\r
+ else\r
+ {\r
+ action = pwmPolarity;\r
+ }\r
+ \r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control = (hetRAM->Instruction[(pwm << 1U) + 41U].Control & ~0x18U) | (action << 3U);\r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Data = (uint32_t)(period * signal.duty / 100.0) + 128U;\r
+ hetRAM->Instruction[(pwm << 1U) + 42U].Data = period - 128U;\r
+}\r
+\r
+\r
+/** @fn hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+* @brief Get duty cycle\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+*\r
+* Gets current signal of the given pwm signal.\r
+*/\r
+\r
+hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+{\r
+ hetSIGNAL_t signal; \r
+ uint32_t duty = hetRAM->Instruction[(pwm << 1U) + 41U].Data - 128;\r
+ uint32_t period = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128;\r
+ \r
+ signal.duty = (uint32_t)(100.0 * duty / period);\r
+\r
+ if(hetRAM == hetRAM1)\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ else\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ return signal;\r
+}\r
+\r
+\r
+/** @fn void pwmEnableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+* @brief Enable pwm notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] notification Pwm notification:\r
+* - pwmEND_OF_DUTY: Notification on end of duty\r
+* - pwmEND_OF_PERIOD: Notification on end of end period\r
+* - pwmEND_OF_BOTH: Notification on end of both duty and period\r
+*/\r
+\r
+void pwmEnableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+{\r
+ hetREG->FLG = notification << (pwm << 1U);\r
+ hetREG->INTENAS = notification << (pwm << 1U);\r
+}\r
+\r
+\r
+/** @fn void pwmDisableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+* @brief Enable pwm notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] notification Pwm notification:\r
+* - pwmEND_OF_DUTY: Notification on end of duty\r
+* - pwmEND_OF_PERIOD: Notification on end of end period\r
+* - pwmEND_OF_BOTH: Notification on end of both duty and period\r
+*/\r
+\r
+void pwmDisableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+{\r
+ hetREG->INTENAC = notification << (pwm << 1U);\r
+}\r
+\r
+\r
+/** @fn void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+* @brief Resets edge counter to 0\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*\r
+* Reset edge counter to 0.\r
+*/\r
+\r
+void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+{\r
+ hetRAM->Instruction[edge + 17U].Data = 0U;\r
+}\r
+\r
+\r
+/** @fn uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+* @brief Get current edge counter value\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*\r
+* Gets current edge counter value.\r
+*/\r
+\r
+uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+{\r
+ return hetRAM->Instruction[edge + 17U].Data >> 7U;\r
+}\r
+\r
+\r
+/** @fn void edgeEnableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+* @brief Enable edge notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*/\r
+\r
+void edgeEnableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+{\r
+ hetREG->FLG = 0x20000U << edge;\r
+ hetREG->INTENAS = 0x20000U << edge;\r
+}\r
+\r
+\r
+/** @fn void edgeDisableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+* @brief Enable edge notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*/\r
+\r
+void edgeDisableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+{\r
+ hetREG->INTENAC = 0x20000U << edge;\r
+}\r
+\r
+\r
+/** @fn hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM, uint32_t cap)\r
+* @brief Get capture signal\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] cap captured signal:\r
+* - cap0: Captured signal 0\r
+* - cap1: Captured signal 1\r
+* - cap2: Captured signal 2\r
+* - cap3: Captured signal 3\r
+* - cap4: Captured signal 4\r
+* - cap5: Captured signal 5\r
+* - cap6: Captured signal 6\r
+* - cap7: Captured signal 7\r
+*\r
+* Gets current signal of the given capture signal.\r
+*/\r
+\r
+hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM, uint32_t cap)\r
+{\r
+ uint32_t duty = hetRAM->Instruction[(cap << 1U) + 25U].Data;\r
+ uint32_t period = hetRAM->Instruction[(cap << 1U) + 26U].Data;\r
+ hetSIGNAL_t signal; \r
+ \r
+ signal.duty = (uint32_t)(100.0 * duty / period);\r
+ \r
+ if( hetRAM == hetRAM1)\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ else\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ return signal;\r
+}\r
+\r
+\r
+/** @fn void hetResetTimestamp(hetRAMBASE_t *hetRAM)\r
+* @brief Resets timestamp\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+*\r
+* Resets loop count based timstamp.\r
+*/\r
+\r
+void hetResetTimestamp(hetRAMBASE_t * hetRAM)\r
+{\r
+ hetRAM->Instruction[0U].Data = 0;\r
+}\r
+\r
+\r
+/** @fn uint32_t hetGetTimestamp(hetRAMBASE_t *hetRAM)\r
+* @brief Returns timestamp\r
+*\r
+* Returns loop count based timstamp.\r
+*/\r
+\r
+uint32_t hetGetTimestamp(hetRAMBASE_t * hetRAM)\r
+{\r
+ return hetRAM->Instruction[57U].Data;\r
+}\r
+\r
+/* USER CODE BEGIN (4) */\r
+/* USER CODE END */\r
+\r
+/** @fn void het1HighLevelInterrupt(void)\r
+* @brief Level 0 Interrupt for HET1\r
+*/\r
+#pragma INTERRUPT(het1HighLevelInterrupt, IRQ)\r
+\r
+void het1HighLevelInterrupt(void)\r
+{\r
+ uint32_t vec = hetREG1->OFF1;\r
+ \r
+ if (vec < 18U)\r
+ {\r
+ if ((vec & 1U) != 0)\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_PERIOD);\r
+ }\r
+ else\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_DUTY);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ edgeNotification(hetREG1,vec - 18U);\r
+ }\r
+}\r
+\r
+\r
+/** @fn void het1LowLevelInterrupt(void)\r
+* @brief Level 1 Interrupt for HET1\r
+*/\r
+#pragma INTERRUPT(het1LowLevelInterrupt, IRQ)\r
+\r
+void het1LowLevelInterrupt(void)\r
+{\r
+ uint32_t vec = hetREG1->OFF2;\r
+ \r
+ if (vec < 18U)\r
+ {\r
+ if ((vec & 1U) != 0)\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_PERIOD);\r
+ }\r
+ else\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_DUTY);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ edgeNotification(hetREG1,vec - 18U);\r
+ }\r
+}\r
+\r
--- /dev/null
+/** @file mibspi.c \r
+* @brief MIBSPI Driver Implementation File\r
+* @date 15.Mar.2012\r
+* @version 03.01.00\r
+*\r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2012, All rights reserved. */\r
+\r
+/* USER CODE BEGIN (0) */\r
+/* USER CODE END */\r
+\r
+#include "mibspi.h"\r
+\r
+/* USER CODE BEGIN (1) */\r
+/* USER CODE END */\r
+\r
+/** @fn void mibspiInit(void)\r
+* @brief Initializes the MIBSPI Driver\r
+*\r
+* This function initializes the MIBSPI module.\r
+*/\r
+void mibspiInit(void)\r
+{\r
+int i ;\r
+\r
+/* USER CODE BEGIN (2) */\r
+/* USER CODE END */\r
+\r
+\r
+\r
+\r
+ /** @b intalise @b MIBSPI5 */\r
+\r
+ /** bring MIBSPI out of reset */\r
+ mibspiREG5->GCR0 = 1U;\r
+ \r
+ /** enable MIBSPI RAM Parity */\r
+ mibspiREG5->EDEN = 0x00000005U;\r
+\r
+ /** enable MIBSPI5 multibuffered mode and enable buffer RAM */\r
+ mibspiREG5->MIBSPIE = 1U;\r
+\r
+ /** MIBSPI5 master mode and clock configuration */\r
+ mibspiREG5->GCR1 = (1 << 1) /* CLOKMOD */\r
+ | 1; /* MASTER */\r
+\r
+ /** MIBSPI5 enable pin configuration */\r
+ mibspiREG5->ENAHIGHZ = 0; /* ENABLE HIGHZ */\r
+\r
+ /** - Delays */\r
+ mibspiREG5->DELAY = (0 << 24) /* C2TDELAY */\r
+ | (0 << 16) /* T2CDELAY */\r
+ | (0 << 8) /* T2EDELAY */\r
+ | 0; /* C2EDELAY */\r
+\r
+ /** - Data Format 0 */\r
+ mibspiREG5->FMT0 = (0 << 24) /* wdelay */\r
+ | (0 << 23) /* parity Polarity */\r
+ | (0 << 22) /* parity enable */\r
+ | (0 << 21) /* wait on enable */\r
+ | (0 << 20) /* shift direction */\r
+ | (0 << 17) /* clock polarity */\r
+ | (0 << 16) /* clock phase */\r
+ | (79 << 8) /* baudrate prescale */\r
+ | 16; /* data word length */\r
+\r
+ /** - Data Format 1 */\r
+ mibspiREG5->FMT1 = (0 << 24) /* wdelay */\r
+ | (0 << 23) /* parity Polarity */\r
+ | (0 << 22) /* parity enable */\r
+ | (0 << 21) /* wait on enable */\r
+ | (0 << 20) /* shift direction */\r
+ | (0 << 17) /* clock polarity */\r
+ | (0 << 16) /* clock phase */\r
+ | (79 << 8) /* baudrate prescale */\r
+ | 16; /* data word length */\r
+\r
+ /** - Data Format 2 */\r
+ mibspiREG5->FMT2 = (0 << 24) /* wdelay */\r
+ | (0 << 23) /* parity Polarity */\r
+ | (0 << 22) /* parity enable */\r
+ | (0 << 21) /* wait on enable */\r
+ | (0 << 20) /* shift direction */\r
+ | (0 << 17) /* clock polarity */\r
+ | (0 << 16) /* clock phase */\r
+ | (79 << 8) /* baudrate prescale */\r
+ | 16; /* data word length */\r
+\r
+ /** - Data Format 3 */\r
+ mibspiREG5->FMT3 = (0 << 24) /* wdelay */\r
+ | (0 << 23) /* parity Polarity */\r
+ | (0 << 22) /* parity enable */\r
+ | (0 << 21) /* wait on enable */\r
+ | (0 << 20) /* shift direction */\r
+ | (0 << 17) /* clock polarity */\r
+ | (0 << 16) /* clock phase */\r
+ | (79 << 8) /* baudrate prescale */\r
+ | 16; /* data word length */\r
+\r
+ /** - wait for buffer inialisation complete before accessing MibSPI registers */\r
+ while ((mibspiREG5->BUFINIT) != 0) { /* wait */ } \r
+\r
+ /** - inialise transfer groups */\r
+ mibspiREG5->TGCTRL[0] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | (0 << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[1] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | (8 << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[2] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | ((8+0) << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[3] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | ((8+0+0) << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[4] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | ((8+0+0+0) << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[5] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | ((8+0+0+0+0) << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[6] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | ((8+0+0+0+0+0) << 8); /* start buffer */\r
+\r
+ mibspiREG5->TGCTRL[7] = (1 << 30) /* oneshot */\r
+ | (0 << 29) /* pcurrent reset */\r
+ | (TRG_ALWAYS << 20) /* trigger event */\r
+ | (TRG_DISABLED << 16) /* trigger source */\r
+ | ((8+0+0+0+0+0+0) << 8); /* start buffer */\r
+\r
+ \r
+ mibspiREG5->TGCTRL[8] = 8+0+0+0+0+0+0+0 << 8;\r
+\r
+ mibspiREG5->LTGPEND = 8+0+0+0+0+0+0+0-1;\r
+\r
+ /** - initalise buffer ram */\r
+ { i = 0;\r
+\r
+ if (8 > 0)\r
+ {\r
+ while (i < 8-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_0; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_0; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_1; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_1; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_2; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_2; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0+0+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_3; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_3; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0+0+0+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_4; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_4; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0+0+0+0+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_5; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_5; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0+0+0+0+0+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_6; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_6; /* chip select */\r
+ }\r
+ if (0 > 0)\r
+ {\r
+ while (i < 8+0+0+0+0+0+0+0-1)\r
+ {\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* hold chip select Based on Lock selection */\r
+ | (0 << 11) /* lock transmission */\r
+ | (0 << 8) /* data format */\r
+ | CS_7; /* chip select */\r
+ }\r
+ mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */\r
+ | (0 << 12) /* chip select hold */\r
+ | (0 << 10) /* enable WDELAY */\r
+ | (0 << 8) /* data format */\r
+ | CS_7; /* chip select */\r
+ }\r
+ }\r
+\r
+ /** - set interrupt levels */\r
+ mibspiREG5->LVL = (0 << 9) /* TXINT */\r
+ | (0 << 8) /* RXINT */\r
+ | (0 << 6) /* OVRNINT */\r
+ | (0 << 4) /* BITERR */\r
+ | (0 << 3) /* DESYNC */\r
+ | (0 << 2) /* PARERR */\r
+ | (0 << 1) /* TIMEOUT */\r
+ | (0); /* DLENERR */\r
+\r
+ /** - clear any pending interrupts */\r
+ mibspiREG5->FLG = 0xFFFFU;\r
+\r
+ /** - enable interrupts */\r
+ mibspiREG5->INT0 = (0 << 9) /* TXINT */\r
+ | (0 << 8) /* RXINT */\r
+ | (0 << 6) /* OVRNINT */\r
+ | (0 << 4) /* BITERR */\r
+ | (0 << 3) /* DESYNC */\r
+ | (0 << 2) /* PARERR */\r
+ | (0 << 1) /* TIMEOUT */\r
+ | (0); /* DLENERR */\r
+\r
+ /** @b initalise @b MIBSPI5 @b Port */\r
+\r
+ /** - MIBSPI5 Port output values */\r
+ mibspiREG5->PCDOUT = 0 /* SCS[0] */\r
+ | (0 << 1) /* SCS[1] */\r
+ | (0 << 2) /* SCS[2] */\r
+ | (0 << 3) /* SCS[3] */\r
+ | (0 << 8) /* ENA */\r
+ | (0 << 9) /* CLK */\r
+ | (0 << 10) /* SIMO */\r
+ | (0 << 19)\r
+ | (0 << 25) \r
+ | (0 << 26) \r
+ | (0 << 27)\r
+ | (0 << 17) \r
+ | (0 << 18)\r
+ | (0 << 11); /* SOMI */\r
+\r
+ /** - MIBSPI5 Port direction */\r
+ mibspiREG5->PCDIR = 1 /* SCS[0] */\r
+ | (1 << 1) /* SCS[1] */\r
+ | (1 << 2) /* SCS[2] */\r
+ | (1 << 3) /* SCS[3] */\r
+ | (0 << 8) /* ENA */\r
+ | (1 << 9) /* CLK */\r
+ | (1 << 10) /* SIMO */\r
+ | (0 << 19)\r
+ | (0 << 25) \r
+ | (0 << 26) \r
+ | (0 << 27)\r
+ | (0 << 17) \r
+ | (0 << 18)\r
+ | (0 << 11); /* SOMI */\r
+\r
+ /** - MIBSPI5 Port open drain enable */\r
+ mibspiREG5->PCPDR = 0 /* SCS[0] */\r
+ | (0 << 1) /* SCS[1] */\r
+ | (0 << 2) /* SCS[2] */\r
+ | (0 << 3) /* SCS[3] */\r
+ | (0 << 8) /* ENA */\r
+ | (0 << 9) /* CLK */\r
+ | (0 << 10) /* SIMO */\r
+ | (0 << 19)\r
+ | (0 << 25) \r
+ | (0 << 26) \r
+ | (0 << 27)\r
+ | (0 << 17) \r
+ | (0 << 18)\r
+ | (0 << 11); /* SOMI */\r
+\r
+ /** - MIBSPI5 Port pullup / pulldown selection */\r
+ mibspiREG5->PCPSL = 1 /* SCS[0] */\r
+ | (1 << 1) /* SCS[1] */\r
+ | (1 << 2) /* SCS[2] */\r
+ | (1 << 3) /* SCS[3] */\r
+ | (1 << 8) /* ENA */\r
+ | (1 << 9) /* CLK */\r
+ | (1 << 10) /* SIMO */\r
+ | (1 << 19)\r
+ | (1 << 25) \r
+ | (1 << 26) \r
+ | (1 << 27)\r
+ | (1 << 17) \r
+ | (1 << 18)\r
+ | (1 << 11); /* SOMI */\r
+\r
+ /** - MIBSPI5 Port pullup / pulldown enable*/\r
+ mibspiREG5->PCDIS = 0 /* SCS[0] */\r
+ | (0 << 1) /* SCS[1] */\r
+ | (0 << 2) /* SCS[2] */\r
+ | (0 << 3) /* SCS[3] */\r
+ | (0 << 8) /* ENA */\r
+ | (0 << 9) /* CLK */\r
+ | (0 << 10) /* SIMO */\r
+ | (0 << 19)\r
+ | (0 << 25) \r
+ | (0 << 26) \r
+ | (0 << 27)\r
+ | (0 << 17) \r
+ | (0 << 18)\r
+ | (0 << 11); /* SOMI */\r
+\r
+ /* MIBSPI5 set all pins to functional */\r
+ mibspiREG5->PCFUN = 1 /* SCS[0] */\r
+ | (1 << 1) /* SCS[1] */\r
+ | (1 << 2) /* SCS[2] */\r
+ | (1 << 3) /* SCS[3] */\r
+ | (1 << 8) /* ENA */\r
+ | (1 << 9) /* CLK */\r
+ | (1 << 10) /* SIMO */\r
+ | (1 << 19)\r
+ | (1 << 25) \r
+ | (1 << 26) \r
+ | (1 << 27)\r
+ | (0 << 17) \r
+ | (0 << 18)\r
+ | (1 << 11); /* SOMI */\r
+ \r
+\r
+\r
+ /** - Finaly start MIBSPI5 */\r
+ mibspiREG5->ENA = 1U;\r
+\r
+/* USER CODE BEGIN (3) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+\r
+/** @fn void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32_t port)\r
+* @brief Change functional behavoiur of pins at runtime.\r
+* @param[in] mibspi - mibspi module base address\r
+* @param[in] port - Value to write to PCFUN register\r
+*\r
+* Change the value of the PCFUN register at runtime, this allows to\r
+* dynaimcaly change the functionality of the MIBSPI pins between functional\r
+* and GIO mode.\r
+*/\r
+void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32_t port)\r
+{\r
+/* USER CODE BEGIN (4) */\r
+/* USER CODE END */\r
+\r
+ mibspi->PCFUN = port;\r
+\r
+/* USER CODE BEGIN (5) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn void mibspiSetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])\r
+* @brief Set Buffer Data\r
+* @param[in] mibspi - Spi module base address\r
+* @param[in] group - Transfer group (0..7)\r
+* @param[in] data - new data for transfer group\r
+*\r
+* This function updates the data for the specified transfer group,\r
+* the length of the data must match the length of the transfer group.\r
+*/\r
+void mibspiSetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])\r
+{\r
+/* USER CODE BEGIN (6) */\r
+/* USER CODE END */\r
+\r
+ mibspiRAM_t *ram = mibspi == mibspiREG1 ? mibspiRAM1 : (mibspi == mibspiREG3 ? mibspiRAM3 : mibspiRAM5);\r
+ uint32_t start = (mibspi->TGCTRL[group] >> 8) & 0xFF;\r
+ uint32_t end = group == 7 ? (mibspi->LTGPEND + 1) : (mibspi->TGCTRL[group+1] >> 8) & 0xFF;\r
+\r
+ if (end < start) {end = 128;}\r
+\r
+ while (start < end)\r
+ {\r
+ ram->tx[start].data = *data++;\r
+ start++;\r
+ }\r
+/* USER CODE BEGIN (7) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn void mibspiGetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])\r
+* @brief Retrieves Buffer Data fro receive buffer\r
+* @param[in] mibspi - Spi module base address\r
+* @param[in] group - Transfer group (0..7)\r
+* @param[out] data - pointer to data array\r
+*\r
+* @return error flags from data buffer, if there was a receive error on\r
+* one of the buffers this will be rerflected in the return value.\r
+*\r
+* This function transfers the data from the specified transfer group receve\r
+* buffers to the data array, the length of the data must match the length \r
+* of the transfer group.\r
+*/\r
+uint32_t mibspiGetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])\r
+{\r
+/* USER CODE BEGIN (8) */\r
+/* USER CODE END */\r
+\r
+ mibspiRAM_t *ram = mibspi == mibspiREG1 ? mibspiRAM1 : (mibspi == mibspiREG3 ? mibspiRAM3 : mibspiRAM5);\r
+ uint32_t start = (mibspi->TGCTRL[group] >> 8) & 0xFF;\r
+ uint32_t end = group == 7 ? (mibspi->LTGPEND + 1) : (mibspi->TGCTRL[group+1] >> 8) & 0xFF;\r
+ uint32_t flags = 0;\r
+\r
+ if (end < start) {end = 128;}\r
+\r
+ while (start < end)\r
+ {\r
+ flags |= ram->rx[start].flags;\r
+ *data++ = ram->rx[start].data;\r
+ start++;\r
+ }\r
+\r
+/* USER CODE BEGIN (9) */\r
+/* USER CODE END */\r
+\r
+ return (flags >> 8) & 0x5F;\r
+}\r
+\r
+\r
+/** @fn void mibspiTransfer(mibspiBASE_t *mibspi, uint32_t group)\r
+* @brief Transmit Transfer Group\r
+* @param[in] mibspi - Spi module base address\r
+* @param[in] group - Transfer group (0..7)\r
+*\r
+* Initiates a transfer for the specified transfer group.\r
+*/\r
+void mibspiTransfer(mibspiBASE_t *mibspi, uint32_t group)\r
+{\r
+/* USER CODE BEGIN (10) */\r
+/* USER CODE END */\r
+\r
+ mibspi->TGCTRL[group] |= 0x80000000;\r
+\r
+/* USER CODE BEGIN (11) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn int mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32_t group)\r
+* @brief Check for Transfer Group Ready\r
+* @param[in] mibspi - Spi module base address\r
+* @param[in] group - Transfer group (0..7)\r
+*\r
+* @return 1 is transfer complete, otherwise 0.\r
+*\r
+* Checks to see if the transfer for the specified transfer group\r
+* has finished.\r
+*/\r
+int mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32_t group)\r
+{\r
+/* USER CODE BEGIN (12) */\r
+/* USER CODE END */\r
+ return (mibspi->INTFLGRDY >> group) & 1;\r
+}\r
+\r
+\r
+/** @fn void mibspiEnableLoopback(mibspiBASE_t *mibspi, Loopbacktype_t Loopbacktype)\r
+* @brief Enable Loopback mode for self test\r
+* @param[in] mibspi - Mibspi module base address\r
+* @param[in] Loopbacktype - Digital or Analog\r
+*\r
+* This function enables the Loopback mode for self test.\r
+*/\r
+void mibspiEnableLoopback(mibspiBASE_t *mibspi, Loopbacktype_t Loopbacktype)\r
+{\r
+/* USER CODE BEGIN (13) */\r
+/* USER CODE END */\r
+ \r
+ /* Clear Loopback incase enbaled already */\r
+ mibspi->IOLPKTSTCR = 0;\r
+ \r
+ /* Enable Loopback either in Analog or Digital Mode */\r
+ mibspi->IOLPKTSTCR = 0x00000A00\r
+ | Loopbacktype << 1;\r
+ \r
+/* USER CODE BEGIN (14) */\r
+/* USER CODE END */\r
+}\r
+\r
+/** @fn void mibspiDisableLoopback(mibspiBASE_t *mibspi)\r
+* @brief Enable Loopback mode for self test\r
+* @param[in] mibspi - Mibspi module base address\r
+*\r
+* This function disable the Loopback mode.\r
+*/\r
+void mibspiDisableLoopback(mibspiBASE_t *mibspi)\r
+{\r
+/* USER CODE BEGIN (15) */\r
+/* USER CODE END */\r
+ \r
+ /* Disable Loopback Mode */\r
+ mibspi->IOLPKTSTCR = 0x000005000;\r
+ \r
+/* USER CODE BEGIN (16) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32_t group, uint32_t level)\r
+* @brief Enable Transfer Group interrupt\r
+* @param[in] mibspi - Spi module base address\r
+* @param[in] group - Transfer group (0..7)\r
+* @param[in] level - Interrupt level\r
+*\r
+* This function enables the transfer group finished interrupt.\r
+*/\r
+void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32_t group, uint32_t level)\r
+{\r
+/* USER CODE BEGIN (17) */\r
+/* USER CODE END */\r
+\r
+ if (level != 0)\r
+ {\r
+ mibspi->SETINTLVLRDY = 1 << group;\r
+ }\r
+ else\r
+ {\r
+ mibspi->CLRINTLVLRDY = 1 << group;\r
+ }\r
+ mibspi->SETINTENARDY = 1 << group;\r
+\r
+/* USER CODE BEGIN (18) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32_t group)\r
+* @brief Disable Transfer Group interrupt\r
+* @param[in] mibspi - Spi module base address\r
+* @param[in] group - Transfer group (0..7)\r
+*\r
+* This function disables the transfer group finished interrupt.\r
+*/\r
+void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32_t group)\r
+{\r
+/* USER CODE BEGIN (19) */\r
+/* USER CODE END */\r
+\r
+ mibspi->CLRINTENARDY = 1 << group;\r
+\r
+/* USER CODE BEGIN (20) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+\r
+/** @fn void mibspi5HighLevelInterrupt(void)\r
+* @brief Level 0 Interrupt for MIBSPI5\r
+*/\r
+#pragma INTERRUPT(mibspi5HighLevelInterrupt, IRQ)\r
+\r
+void mibspi5HighLevelInterrupt(void)\r
+{\r
+ uint32_t vec = mibspiREG5->INTVECT0;\r
+\r
+/* USER CODE BEGIN (29) */\r
+/* USER CODE END */\r
+\r
+ if (vec > 0x21U)\r
+ {\r
+ uint32_t flags = mibspiREG5->FLG & (~mibspiREG5->LVL & 0x035F);\r
+ mibspiREG5->FLG = flags;\r
+ mibspiNotification(mibspiREG5, flags);\r
+ }\r
+ else\r
+ {\r
+ mibspiGroupNotification(mibspiREG5, ((vec & 0x3FU) >> 1U) - 1U);\r
+ }\r
+/* USER CODE BEGIN (30) */\r
+/* USER CODE END */\r
+}\r
+\r
+\r
+/** @fn void mibspi5LowLevelInterrupt(void)\r
+* @brief Level 1 Interrupt for MIBSPI5\r
+*/\r
+#pragma INTERRUPT(mibspi5LowLevelInterrupt, IRQ)\r
+\r
+void mibspi5LowLevelInterrupt(void)\r
+{\r
+ uint32_t vec = mibspiREG5->INTVECT1;\r
+\r
+/* USER CODE BEGIN (31) */\r
+/* USER CODE END */\r
+\r
+ if (vec > 0x21U)\r
+ {\r
+ uint32_t flags = mibspiREG5->FLG & (mibspiREG5->LVL & 0x035F);\r
+ mibspiREG5->FLG = flags;\r
+ mibspiNotification(mibspiREG5, flags);\r
+ }\r
+ else\r
+ {\r
+ mibspiGroupNotification(mibspiREG5, ((vec & 0x3FU) >> 1U) - 1U);\r
+ }\r
+/* USER CODE BEGIN (32) */\r
+/* USER CODE END */\r
+}\r
+\r
--- /dev/null
+/*
+ * mout.c
+ *
+ * Created on: 29.8.2012
+ * Author: michal
+ */
+
+#include "mout.h"
+
+gioPORT_t * moutPorts[12] = { MOUT_PORT_HET, MOUT_PORT_HET, MOUT_PORT_GIO,
+ MOUT_PORT_GIO, MOUT_PORT_GIO, MOUT_PORT_GIO,
+ MOUT_PORT_SPI, MOUT_PORT_SPI, MOUT_PORT_GIO,
+ MOUT_PORT_GIO, MOUT_PORT_GIO, MOUT_PORT_GIO
+ };
+uint8_t moutBits[12] ={ MOUT1_IN_BIT, MOUT2_IN_BIT, MOUT3_IN_BIT,
+ MOUT4_IN_BIT, MOUT5_IN_BIT, MOUT6_IN_BIT,
+ MOUT1_EN_BIT, MOUT2_EN_BIT, MOUT3_EN_BIT,
+ MOUT4_EN_BIT, MOUT5_EN_BIT, MOUT6_EN_BIT
+ };
+
+/** @fn void moutSetPort(uint32_t value)
+* @brief Set value to ports connected to MOUT
+* @param[in] value to write to port
+* - bit 0 - MOUT1_IN - defined as output port HETPORT1
+* - bit 1 - MOUT2_IN - defined as output port HETPORT1
+* - bit 2 - MOUT3_IN - defined as output port GIOB
+* - bit 3 - MOUT4_IN - defined as output port GIOB
+* - bit 4 - MOUT5_IN - defined as output port GIOB
+* - bit 5 - MOUT6_IN - defined as output port GIOB
+* - bit 6 - MOUT1_EN - defined as input port SPIPORT
+* - bit 7 - MOUT2_EN - defined as input port SPIPORT
+* - bit 8 - MOUT3_EN - defined as input port GIOB
+* - bit 9 - MOUT4_EN - defined as input port GIOB
+* - bit 10 - MOUT5_EN - defined as input port GIOB
+* - bit 11 - MOUT6_EN - defined as input port GIOB
+* Set value to whole MOUT port. Setting values to bits connected with ports defined as output makes no effect.
+*/
+void moutSetPort(uint32_t value) {
+ uint8_t i;
+ for (i = 0; i < 12; i++) {
+ gioSetBit(moutPorts[i], moutBits[i], value&(1<<i));
+ }
+}
+
+/** @fn void moutGetPort()
+* @brief Get value from ports connected to MOUT
+* - bit 0 - MOUT1_IN - defined as output port HETPORT1
+* - bit 1 - MOUT2_IN - defined as output port HETPORT1
+* - bit 2 - MOUT3_IN - defined as output port GIOB
+* - bit 3 - MOUT4_IN - defined as output port GIOB
+* - bit 4 - MOUT5_IN - defined as output port GIOB
+* - bit 5 - MOUT6_IN - defined as output port GIOB
+* - bit 6 - MOUT1_EN - defined as input port SPIPORT
+* - bit 7 - MOUT2_EN - defined as input port SPIPORT
+* - bit 8 - MOUT3_EN - defined as input port GIOB
+* - bit 9 - MOUT4_EN - defined as input port GIOB
+* - bit 10 - MOUT5_EN - defined as input port GIOB
+* - bit 11 - MOUT6_EN - defined as input port GIOB
+* Get value from whole MOUT port. Getting values from ports defined as output returns values last asserted by Controller itself.
+*/
+uint32_t moutGetPort() {
+ uint8_t i;
+ uint32_t value = 0;
+ for (i = 0; i < 12; i++) {
+ value |= (gioGetBit(moutPorts[i], moutBits[i])<<i);
+ }
+ return value;
+}
#include "sys_selftest.h"\r
#include "adc.h"\r
#include "can.h"\r
+#include "gio.h"\r
+#include "mibspi.h"\r
#include "sci.h"\r
+#include "het.h"\r
/* USER CODE BEGIN (0) */\r
#include "FreeRTOS.h"\r
#include "os_semphr.h"\r
/* USER CODE END */\r
void canErrorNotification(canBASE_t *node, uint32_t notification)\r
{\r
+\r
/* USER CODE BEGIN (13) */\r
if (notification != canERROR_OK) while(1) ;\r
/* USER CODE END */\r
\r
/* USER CODE BEGIN (16) */\r
/* USER CODE END */\r
+void gioNotification(int bit)\r
+{\r
+/* enter user code and remove the while loop... */\r
+ while(1);\r
+/* USER CODE BEGIN (19) */\r
+/* USER CODE END */\r
\r
-void sciNotification(sciBASE_t *sci, uint32_t flags) \r
+}\r
+\r
+/* USER CODE BEGIN (20) */\r
+/* USER CODE END */\r
+void mibspiNotification(mibspiBASE_t *mibspi, uint32_t flags)\r
+{\r
+/* enter user code and remove the while loop... */\r
+ while(1);\r
+/* USER CODE BEGIN (25) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+/* USER CODE BEGIN (26) */\r
+/* USER CODE END */\r
+\r
+void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32_t group)\r
{\r
+/* enter user code and remove the while loop... */\r
+ while(1);\r
+/* USER CODE BEGIN (27) */\r
+/* USER CODE END */\r
+\r
+}\r
+/* USER CODE BEGIN (28) */\r
+/* USER CODE END */\r
\r
+void sciNotification(sciBASE_t *sci, uint32_t flags) \r
+{\r
/* USER CODE BEGIN (29) */\r
if (sci == sciREG) {\r
if (flags & SCI_RX_INT) {\r
\r
/* USER CODE BEGIN (30) */\r
/* USER CODE END */\r
+void pwmNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification)\r
+{\r
+/* enter user code and remove the while loop... */\r
+ while(1);\r
+/* USER CODE BEGIN (33) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+/* USER CODE BEGIN (34) */\r
+/* USER CODE END */\r
+\r
+void edgeNotification(hetBASE_t * hetREG,uint32_t edge)\r
+{\r
+/* enter user code and remove the while loop... */\r
+ while(1);\r
+/* USER CODE BEGIN (35) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+/* USER CODE BEGIN (36) */\r
+/* USER CODE END */\r
+\r
+void hetNotification(hetBASE_t *het, uint32_t offset)\r
+{\r
+/* enter user code and remove the while loop... */\r
+ while(1);\r
+/* USER CODE BEGIN (37) */\r
+/* USER CODE END */\r
+\r
+}\r
+\r
+/* USER CODE BEGIN (38) */\r
+/* USER CODE END */\r
/* USER CODE BEGIN (2) */\r
/* USER CODE END */\r
\r
- pinMuxReg->PINMUX0 = PINMUX_BALL_C3_MIBSPI3NCS_3 | PINMUX_BALL_B2_MIBSPI3NCS_2;\r
+ pinMuxReg->PINMUX0 = PINMUX_BALL_C3_HET1_29 | PINMUX_BALL_B2_HET1_27;\r
\r
pinMuxReg->PINMUX1 = PINMUX_BALL_E3_HET1_11 | PINMUX_BALL_E5_ETMDATA_20 | PINMUX_BALL_F5_ETMDATA_21;\r
\r
\r
pinMuxReg->PINMUX6 = PINMUX_BALL_T1_HET1_07 | PINMUX_BALL_P5_ETMDATA_27 | PINMUX_BALL_V7_HET1_09 | PINMUX_BALL_R5_ETMDATA_28;\r
\r
- pinMuxReg->PINMUX7 = PINMUX_BALL_R6_ETMDATA_29 | PINMUX_BALL_V5_MIBSPI3NCS_1 | PINMUX_BALL_W3_SCIRX | PINMUX_BALL_R7_ETMDATA_30;\r
+ pinMuxReg->PINMUX7 = PINMUX_BALL_R6_ETMDATA_29 | PINMUX_BALL_V5_HET1_25 | PINMUX_BALL_W3_SCIRX | PINMUX_BALL_R7_ETMDATA_30;\r
\r
- pinMuxReg->PINMUX8 = PINMUX_BALL_N2_SCITX | PINMUX_BALL_G3_MIBSPI1NCS_2 | PINMUX_BALL_N1_HET1_15 | PINMUX_BALL_R8_ETMDATA_31;\r
+ pinMuxReg->PINMUX8 = PINMUX_BALL_N2_SCITX | PINMUX_BALL_G3_HET1_19 | PINMUX_BALL_N1_HET1_15 | PINMUX_BALL_R8_ETMDATA_31;\r
\r
- pinMuxReg->PINMUX9 = PINMUX_BALL_R9_ETMTRACECLKIN | PINMUX_BALL_W9_MIBSPI3NENA | PINMUX_BALL_V10_MIBSPI3NCS_0 | PINMUX_BALL_J3_MIBSPI1NCS_3;\r
+ pinMuxReg->PINMUX9 = PINMUX_BALL_R9_ETMTRACECLKIN | PINMUX_BALL_W9_HET1_31 | PINMUX_BALL_V10_MIBSPI3NCS_0 | PINMUX_BALL_J3_HET1_21;\r
\r
pinMuxReg->PINMUX10 = PINMUX_BALL_N19_AD1EVT | PINMUX_BALL_N15_ETMDATA_19 | PINMUX_BALL_N17_EMIF_nCS_0 | PINMUX_BALL_M15_ETMDATA_18;\r
\r
pinMuxReg->PINMUX11 = PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_M17_EMIF_nCS_4 | PINMUX_BALL_L15_ETMDATA_17 | PINMUX_BALL_P1_HET1_24;\r
\r
- pinMuxReg->PINMUX12 = PINMUX_BALL_A14_HET1_26 | PINMUX_BALL_K15_ETMDATA_16 | PINMUX_BALL_G19_MIBSPI1NENA | PINMUX_BALL_H18_MIBSPI5NENA;\r
+ pinMuxReg->PINMUX12 = PINMUX_BALL_A14_HET1_26 | PINMUX_BALL_K15_ETMDATA_16 | PINMUX_BALL_G19_HET1_23 | PINMUX_BALL_H18_MIBSPI5NENA;\r
\r
pinMuxReg->PINMUX13 = PINMUX_BALL_J18_MIBSPI5SOMI_0 | PINMUX_BALL_J19_MIBSPI5SIMO_0 | PINMUX_BALL_H19_MIBSPI5CLK | PINMUX_BALL_R2_MIBSPI1NCS_0;\r
\r
\r
pinMuxReg->PINMUX19 = PINMUX_BALL_E8_ETMDATA_09 | PINMUX_BALL_B11_HET1_30 | PINMUX_BALL_E10_ETMDATA_15 | PINMUX_BALL_E7_ETMDATA_10;\r
\r
- pinMuxReg->PINMUX20 = PINMUX_BALL_C11_EMIF_ADDR_13 | PINMUX_BALL_C10_EMIF_ADDR_12 | PINMUX_BALL_F3_MIBSPI1NCS_1 | PINMUX_BALL_C9_EMIF_ADDR_11;\r
+ pinMuxReg->PINMUX20 = PINMUX_BALL_C11_EMIF_ADDR_13 | PINMUX_BALL_C10_EMIF_ADDR_12 | PINMUX_BALL_F3_HET1_17 | PINMUX_BALL_C9_EMIF_ADDR_11;\r
\r
pinMuxReg->PINMUX21 = PINMUX_BALL_D5_EMIF_ADDR_1 | PINMUX_BALL_C8_EMIF_ADDR_10 | PINMUX_BALL_C7_EMIF_ADDR_9;\r
\r
void sciReceive(sciBASE_t *sci, uint32_t length, uint8_t *data)\r
{\r
/* USER CODE BEGIN (16) */\r
+ // Delete generated content after user code block!!!\r
if (sci->SETINT & SCI_RX_INT)\r
{\r
/* We are in iterrupt mode, clear error flags */\r
}\r
}\r
/* USER CODE END */\r
-\r
/* USER CODE BEGIN (17) */\r
/* USER CODE END */\r
}\r
uint32_t vec = sciREG->INTVECT0;\r
\r
/* USER CODE BEGIN (26) */\r
+ // Delete generated content after user code block!!!\r
switch (vec)\r
{\r
case 1:\r
break;\r
}\r
/* USER CODE END */\r
-\r
/* USER CODE BEGIN (27) */\r
/* USER CODE END */\r
}\r
#include "cmd_proc_freertos_tms570.h"\r
#include "FreeRTOS.h"\r
#include "os_task.h"\r
+#include "mibspi.h"\r
#include "can.h"\r
#include "adc.h"\r
+#include "gio.h"\r
+#include "het.h"\r
/* USER CODE END */\r
\r
\r
void main(void)\r
{\r
/* USER CODE BEGIN (3) */\r
+ gioInit();\r
+ mibspiInit();\r
+ hetInit();\r
sciInit();\r
canInit();\r
adcInit();\r