+/** @file het.c \r
+* @brief HET Driver Implementation File\r
+* @date 15.Mar.2012\r
+* @version 03.01.00\r
+*\r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2012, All rights reserved. */\r
+\r
+#include "het.h"\r
+\r
+/* USER CODE BEGIN (0) */\r
+/* USER CODE END */\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Global variables */\r
+\r
+static const uint32_t s_het1pwmPolarity[] =\r
+{\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+ 3U,\r
+};\r
+\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Default Program */\r
+\r
+/** @var const hetINSTRUCTION_t het1PROGRAM[]\r
+* @brief Default Program\r
+*\r
+* Het program running after initialization.\r
+*/\r
+\r
+const hetINSTRUCTION_t het1PROGRAM[] =\r
+{\r
+ /* CNT: Timebase\r
+ * - Instruction = 0\r
+ * - Next instruction = 1\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = na\r
+ * - Reg = T\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00002C80U,\r
+ /* Control */\r
+ 0x01FFFFFFU,\r
+ /* Data */\r
+ 0xFFFFFF80U,\r
+ },\r
+ /* PWCNT: PWM 0 -> Duty Cycle\r
+ * - Instruction = 1\r
+ * - Next instruction = 2\r
+ * - Conditional next instruction = 2\r
+ * - Interrupt = 1\r
+ * - Pin = 8\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000055C0U,\r
+ /* Control */\r
+ (0x00004006U | (8U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 0 -> Period\r
+ * - Instruction = 2\r
+ * - Next instruction = 3\r
+ * - Conditional next instruction = 41\r
+ * - Interrupt = 2\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00007480U,\r
+ /* Control */\r
+ 0x00052006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 1 -> Duty Cycle\r
+ * - Instruction = 3\r
+ * - Next instruction = 4\r
+ * - Conditional next instruction = 4\r
+ * - Interrupt = 3\r
+ * - Pin = 10\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000095C0U,\r
+ /* Control */\r
+ (0x00008006U | (10U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 1 -> Period\r
+ * - Instruction = 4\r
+ * - Next instruction = 5\r
+ * - Conditional next instruction = 43\r
+ * - Interrupt = 4\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000B480U,\r
+ /* Control */\r
+ 0x00056006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 2 -> Duty Cycle\r
+ * - Instruction = 5\r
+ * - Next instruction = 6\r
+ * - Conditional next instruction = 6\r
+ * - Interrupt = 5\r
+ * - Pin = 12\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000D5C0U,\r
+ /* Control */\r
+ (0x0000C006U | (12U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 2 -> Period\r
+ * - Instruction = 6\r
+ * - Next instruction = 7\r
+ * - Conditional next instruction = 45\r
+ * - Interrupt = 6\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000F480U,\r
+ /* Control */\r
+ 0x0005A006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 3 -> Duty Cycle\r
+ * - Instruction = 7\r
+ * - Next instruction = 8\r
+ * - Conditional next instruction = 8\r
+ * - Interrupt = 7\r
+ * - Pin = 14\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000115C0U,\r
+ /* Control */\r
+ (0x00010006U | (14U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 3 -> Period\r
+ * - Instruction = 8\r
+ * - Next instruction = 9\r
+ * - Conditional next instruction = 47\r
+ * - Interrupt = 8\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00013480U,\r
+ /* Control */\r
+ 0x0005E006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 4 -> Duty Cycle\r
+ * - Instruction = 9\r
+ * - Next instruction = 10\r
+ * - Conditional next instruction = 10\r
+ * - Interrupt = 9\r
+ * - Pin = 16\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000155C0U,\r
+ /* Control */\r
+ (0x00014006U | (16U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 4 -> Period\r
+ * - Instruction = 10\r
+ * - Next instruction = 11\r
+ * - Conditional next instruction = 49\r
+ * - Interrupt = 10\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00017480U,\r
+ /* Control */\r
+ 0x00062006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 5 -> Duty Cycle\r
+ * - Instruction = 11\r
+ * - Next instruction = 12\r
+ * - Conditional next instruction = 12\r
+ * - Interrupt = 11\r
+ * - Pin = 17\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000195C0U,\r
+ /* Control */\r
+ (0x00018006U | (17U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 5 -> Period\r
+ * - Instruction = 12\r
+ * - Next instruction = 13\r
+ * - Conditional next instruction = 51\r
+ * - Interrupt = 12\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001B480U,\r
+ /* Control */\r
+ 0x00066006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 6 -> Duty Cycle\r
+ * - Instruction = 13\r
+ * - Next instruction = 14\r
+ * - Conditional next instruction = 14\r
+ * - Interrupt = 13\r
+ * - Pin = 18\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001D5C0U,\r
+ /* Control */\r
+ (0x0001C006U | (18U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 6 -> Period\r
+ * - Instruction = 14\r
+ * - Next instruction = 15\r
+ * - Conditional next instruction = 53\r
+ * - Interrupt = 14\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001F480U,\r
+ /* Control */\r
+ 0x0006A006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PWCNT: PWM 7 -> Duty Cycle\r
+ * - Instruction = 15\r
+ * - Next instruction = 16\r
+ * - Conditional next instruction = 16\r
+ * - Interrupt = 15\r
+ * - Pin = 19\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x000215C0U,\r
+ /* Control */\r
+ (0x00020006U | (19U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* DJZ: PWM 7 -> Period\r
+ * - Instruction = 16\r
+ * - Next instruction = 17\r
+ * - Conditional next instruction = 55\r
+ * - Interrupt = 16\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00023480U,\r
+ /* Control */\r
+ 0x0006E006U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 0\r
+ * - Instruction = 17\r
+ * - Next instruction = 18\r
+ * - Conditional next instruction = 18\r
+ * - Interrupt = 17\r
+ * - Pin = 9\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00025440U,\r
+ /* Control */\r
+ (0x00024007U | (9U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 1\r
+ * - Instruction = 18\r
+ * - Next instruction = 19\r
+ * - Conditional next instruction = 19\r
+ * - Interrupt = 18\r
+ * - Pin = 11\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00027440U,\r
+ /* Control */\r
+ (0x00026007U | (11U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 2\r
+ * - Instruction = 19\r
+ * - Next instruction = 20\r
+ * - Conditional next instruction = 20\r
+ * - Interrupt = 19\r
+ * - Pin = 13\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00029440U,\r
+ /* Control */\r
+ (0x00028007U | (13U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 3\r
+ * - Instruction = 20\r
+ * - Next instruction = 21\r
+ * - Conditional next instruction = 21\r
+ * - Interrupt = 20\r
+ * - Pin = 15\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0002B440U,\r
+ /* Control */\r
+ (0x0002A007U | (15U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 4\r
+ * - Instruction = 21\r
+ * - Next instruction = 22\r
+ * - Conditional next instruction = 22\r
+ * - Interrupt = 21\r
+ * - Pin = 20\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0002D440U,\r
+ /* Control */\r
+ (0x0002C007U | (20U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 5\r
+ * - Instruction = 22\r
+ * - Next instruction = 23\r
+ * - Conditional next instruction = 23\r
+ * - Interrupt = 22\r
+ * - Pin = 21\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0002F440U,\r
+ /* Control */\r
+ (0x0002E007U | (21U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 6\r
+ * - Instruction = 23\r
+ * - Next instruction = 24\r
+ * - Conditional next instruction = 24\r
+ * - Interrupt = 23\r
+ * - Pin = 22\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00031440U,\r
+ /* Control */\r
+ (0x00030007U | (22U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* ECNT: CCU Edge 7\r
+ * - Instruction = 24\r
+ * - Next instruction = 25\r
+ * - Conditional next instruction = 25\r
+ * - Interrupt = 24\r
+ * - Pin = 23\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00033440U,\r
+ /* Control */\r
+ (0x00032007U | (23U << 8U) | (1U << 4U)),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 0\r
+ * - Instruction = 25\r
+ * - Next instruction = 26\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 0\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00034E00U | (0U << 6U) | (0U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 0\r
+ * - Instruction = 26\r
+ * - Next instruction = 27\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 0 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00036E80U | (0U << 6U) | ((0U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 1\r
+ * - Instruction = 27\r
+ * - Next instruction = 28\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 2\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00038E00U | (0U << 6U) | (2U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 1\r
+ * - Instruction = 28\r
+ * - Next instruction = 29\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 2 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0003AE80U | (0U << 6U) | ((2U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 2\r
+ * - Instruction = 29\r
+ * - Next instruction = 30\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 4\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0003CE00U | (0U << 6U) | (4U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 2\r
+ * - Instruction = 30\r
+ * - Next instruction = 31\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 4 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0003EE80U | (0U << 6U) | ((4U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 3\r
+ * - Instruction = 31\r
+ * - Next instruction = 32\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 6\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00040E00U | (0U << 6U) | (6U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 3\r
+ * - Instruction = 32\r
+ * - Next instruction = 33\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 6 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00042E80U | (0U << 6U) | ((6U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 4\r
+ * - Instruction = 33\r
+ * - Next instruction = 34\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 24\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00044E00U | (0U << 6U) | (24U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 4\r
+ * - Instruction = 34\r
+ * - Next instruction = 35\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 24 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00046E80U | (0U << 6U) | ((24U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 5\r
+ * - Instruction = 35\r
+ * - Next instruction = 36\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 26\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00048E00U | (0U << 6U) | (26U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 5\r
+ * - Instruction = 36\r
+ * - Next instruction = 37\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 26 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0004AE80U | (0U << 6U) | ((26U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 6\r
+ * - Instruction = 37\r
+ * - Next instruction = 38\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 28\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0004CE00U | (0U << 6U) | (28U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 6\r
+ * - Instruction = 38\r
+ * - Next instruction = 39\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 28 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0004EE80U | (0U << 6U) | ((28U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Duty 7\r
+ * - Instruction = 39\r
+ * - Next instruction = 40\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 30\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00050E00U | (0U << 6U) | (30U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* PCNT: Capture Period 7\r
+ * - Instruction = 40\r
+ * - Next instruction = 57\r
+ * - Conditional next instruction = na\r
+ * - Interrupt = na\r
+ * - Pin = 30 + 1\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00072E80U | (0U << 6U) | ((30U) + 1U),\r
+ /* Control */\r
+ 0x00000000U,\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+ /* MOV64: PWM 0 -> Duty Cycle Update\r
+ * - Instruction = 41\r
+ * - Next instruction = 42\r
+ * - Conditional next instruction = 2\r
+ * - Interrupt = 1\r
+ * - Pin = 8\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00054201U,\r
+ /* Control */\r
+ (0x00004007U | (0U << 22U) | (8U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 0 -> Period Update\r
+ * - Instruction = 42\r
+ * - Next instruction = 3\r
+ * - Conditional next instruction = 41\r
+ * - Interrupt = 2\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00006202U,\r
+ /* Control */\r
+ (0x00052007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 1 -> Duty Cycle Update\r
+ * - Instruction = 43\r
+ * - Next instruction = 44\r
+ * - Conditional next instruction = 4\r
+ * - Interrupt = 3\r
+ * - Pin = 10\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00058203U,\r
+ /* Control */\r
+ (0x00008007U | (0U << 22U) | (10U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 1 -> Period Update\r
+ * - Instruction = 44\r
+ * - Next instruction = 5\r
+ * - Conditional next instruction = 43\r
+ * - Interrupt = 4\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000A204U,\r
+ /* Control */\r
+ (0x00056007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 2 -> Duty Cycle Update\r
+ * - Instruction = 45\r
+ * - Next instruction = 46\r
+ * - Conditional next instruction = 6\r
+ * - Interrupt = 5\r
+ * - Pin = 12\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0005C205U,\r
+ /* Control */\r
+ (0x0000C007U | (0U << 22U) | (12U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 2 -> Period Update\r
+ * - Instruction = 46\r
+ * - Next instruction = 7\r
+ * - Conditional next instruction = 45\r
+ * - Interrupt = 6\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0000E206U,\r
+ /* Control */\r
+ (0x0005A007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 3 -> Duty Cycle Update\r
+ * - Instruction = 47\r
+ * - Next instruction = 48\r
+ * - Conditional next instruction = 8\r
+ * - Interrupt = 7\r
+ * - Pin = 14\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00060207U,\r
+ /* Control */\r
+ (0x00010007U | (0U << 22U) | (14U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 3 -> Period Update\r
+ * - Instruction = 48\r
+ * - Next instruction = 9\r
+ * - Conditional next instruction = 47\r
+ * - Interrupt = 8\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00012208U,\r
+ /* Control */\r
+ (0x0005E007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 4 -> Duty Cycle Update\r
+ * - Instruction = 49\r
+ * - Next instruction = 50\r
+ * - Conditional next instruction = 10\r
+ * - Interrupt = 9\r
+ * - Pin = 16\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00064209U,\r
+ /* Control */\r
+ (0x00014007U | (0U << 22U) | (16U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 4 -> Period Update\r
+ * - Instruction = 50\r
+ * - Next instruction = 11\r
+ * - Conditional next instruction = 49\r
+ * - Interrupt = 10\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001620AU,\r
+ /* Control */\r
+ (0x00062007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 5 -> Duty Cycle Update\r
+ * - Instruction = 51\r
+ * - Next instruction = 52\r
+ * - Conditional next instruction = 12\r
+ * - Interrupt = 11\r
+ * - Pin = 17\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0006820BU,\r
+ /* Control */\r
+ (0x00018007U | (0U << 22U) | (17U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 5 -> Period Update\r
+ * - Instruction = 52\r
+ * - Next instruction = 13\r
+ * - Conditional next instruction = 51\r
+ * - Interrupt = 12\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001A20CU,\r
+ /* Control */\r
+ (0x00066007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 6 -> Duty Cycle Update\r
+ * - Instruction = 53\r
+ * - Next instruction = 54\r
+ * - Conditional next instruction = 14\r
+ * - Interrupt = 13\r
+ * - Pin = 18\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0006C20DU,\r
+ /* Control */\r
+ (0x0001C007U | (0U << 22U) | (18U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 6 -> Period Update\r
+ * - Instruction = 54\r
+ * - Next instruction = 15\r
+ * - Conditional next instruction = 53\r
+ * - Interrupt = 14\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0001E20EU,\r
+ /* Control */\r
+ (0x0006A007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* MOV64: PWM 7 -> Duty Cycle Update\r
+ * - Instruction = 55\r
+ * - Next instruction = 56\r
+ * - Conditional next instruction = 16\r
+ * - Interrupt = 15\r
+ * - Pin = 19\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x0007020FU,\r
+ /* Control */\r
+ (0x00020007U | (0U << 22U) | (19U << 8U) | (3U << 3U)),\r
+ /* Data */\r
+ 80128U,\r
+ },\r
+ /* MOV64: PWM 7 -> Period Update\r
+ * - Instruction = 56\r
+ * - Next instruction = 17\r
+ * - Conditional next instruction = 55\r
+ * - Interrupt = 16\r
+ * - Pin = na\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00022210U,\r
+ /* Control */\r
+ (0x0006E007U),\r
+ /* Data */\r
+ 159872U,\r
+ },\r
+ /* WCAP: Capture timestamp\r
+ * - Instruction = 57\r
+ * - Next instruction = 0\r
+ * - Conditional next instruction = 0\r
+ * - Interrupt = na\r
+ * - Pin = na\r
+ * - Reg = T\r
+ */\r
+ {\r
+ /* Program */\r
+ 0x00001600U,\r
+ /* Control */\r
+ (0x00000004U),\r
+ /* Data */\r
+ 0x00000000U,\r
+ },\r
+};\r
+\r
+\r
+\r
+/** @fn void hetInit(void)\r
+* @brief Initializes the het Driver\r
+*\r
+* This function initializes the het 1 module.\r
+*/\r
+void hetInit(void)\r
+{\r
+ /** @b intalise @b HET */\r
+\r
+ /** - Set HET pins default output value */\r
+ hetREG1->DOUT = (0U << 31U)\r
+ | (0U << 30U)\r
+ | (0U << 29U)\r
+ | (0U << 28U) \r
+ | (0U << 27U) \r
+ | (0U << 26U) \r
+ | (0U << 25U) \r
+ | (0U << 24U) \r
+ | (0U << 23U) \r
+ | (0U << 22U) \r
+ | (0U << 21U) \r
+ | (0U << 20U) \r
+ | (0U << 19U) \r
+ | (0U << 18U) \r
+ | (0U << 17U) \r
+ | (0U << 16U) \r
+ | (0U << 15U) \r
+ | (0U << 14U) \r
+ | (0U << 13U) \r
+ | (0U << 12U) \r
+ | (0U << 11U) \r
+ | (0U << 10U) \r
+ | (0U << 9U)\r
+ | (0U << 8U)\r
+ | (0U << 7U)\r
+ | (0U << 6U)\r
+ | (0U << 5U)\r
+ | (0U << 4U)\r
+ | (0U << 3U)\r
+ | (0U << 2U)\r
+ | (0U << 1U)\r
+ | (0U);\r
+\r
+ /** - Set HET pins direction */\r
+ hetREG1->DIR = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00004000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000200U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins open drain enable */\r
+ hetREG1->PDR = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins pullup/down enable */\r
+ hetREG1->PULDIS = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins pullup/down select */\r
+ hetREG1->PSL = 0x80000000U \r
+ | 0x40000000U \r
+ | 0x20000000U \r
+ | 0x10000000U \r
+ | 0x08000000U \r
+ | 0x04000000U \r
+ | 0x02000000U \r
+ | 0x01000000U \r
+ | 0x00800000U \r
+ | 0x00400000U \r
+ | 0x00200000U \r
+ | 0x00100000U \r
+ | 0x00080000U \r
+ | 0x00040000U \r
+ | 0x00020000U \r
+ | 0x00010000U \r
+ | 0x00008000U \r
+ | 0x00004000U \r
+ | 0x00002000U \r
+ | 0x00001000U \r
+ | 0x00000800U \r
+ | 0x00000400U \r
+ | 0x00000200U\r
+ | 0x00000100U\r
+ | 0x00000080U\r
+ | 0x00000040U\r
+ | 0x00000020U\r
+ | 0x00000010U\r
+ | 0x00000008U\r
+ | 0x00000004U\r
+ | 0x00000002U\r
+ | 0x00000001U;\r
+\r
+ /** - Set HET pins high resolution share */\r
+ hetREG1->HRSH = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ /** - Set HET pins AND share */\r
+ hetREG1->AND = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U; \r
+\r
+ /** - Set HET pins XOR share */\r
+ hetREG1->XOR = 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+ \r
+/* USER CODE BEGIN (1) */\r
+/* USER CODE END */\r
+\r
+ /** - Setup prescaler values\r
+ * - Loop resolution prescaler\r
+ * - High resolution prescaler\r
+ */\r
+ hetREG1->PFR = (6U << 8U)\r
+ | (0U);\r
+ \r
+ /** - Fill HET RAM with opcodes and Data */\r
+ memcpy((void *)hetRAM1, (const void *)het1PROGRAM, sizeof(het1PROGRAM));\r
+\r
+ /** - Setup interrupt priority level \r
+ * - PWM 0 end of duty level\r
+ * - PWM 0 end of period level\r
+ * - PWM 1 end of duty level\r
+ * - PWM 1 end of period level\r
+ * - PWM 2 end of duty level\r
+ * - PWM 2 end of period level\r
+ * - PWM 3 end of duty level\r
+ * - PWM 3 end of period level\r
+ * - PWM 4 end of duty level\r
+ * - PWM 4 end of period level\r
+ * - PWM 5 end of duty level\r
+ * - PWM 5 end of period level\r
+ * - PWM 6 end of duty level\r
+ * - PWM 6 end of period level\r
+ * - PWM 7 end of duty level\r
+ * - PWM 7 end of period level\r
+\r
+ * - CCU Edge Detection 0 level\r
+ * - CCU Edge Detection 1 level\r
+ * - CCU Edge Detection 2 level\r
+ * - CCU Edge Detection 3 level\r
+ * - CCU Edge Detection 4 level\r
+ * - CCU Edge Detection 5 level\r
+ * - CCU Edge Detection 6 level\r
+ * - CCU Edge Detection 7 level\r
+ */\r
+ hetREG1->PRY = 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+ \r
+ /** - Enable interrupts \r
+ * - PWM 0 end of duty\r
+ * - PWM 0 end of period\r
+ * - PWM 1 end of duty\r
+ * - PWM 1 end of period\r
+ * - PWM 2 end of duty\r
+ * - PWM 2 end of period\r
+ * - PWM 3 end of duty\r
+ * - PWM 3 end of period\r
+ * - PWM 4 end of duty\r
+ * - PWM 4 end of period\r
+ * - PWM 5 end of duty\r
+ * - PWM 5 end of period\r
+ * - PWM 6 end of duty\r
+ * - PWM 6 end of period\r
+ * - PWM 7 end of duty\r
+ * - PWM 7 end of period\r
+ * - CCU Edge Detection 0\r
+ * - CCU Edge Detection 1\r
+ * - CCU Edge Detection 2\r
+ * - CCU Edge Detection 3\r
+ * - CCU Edge Detection 4\r
+ * - CCU Edge Detection 5\r
+ * - CCU Edge Detection 6\r
+ * - CCU Edge Detection 7\r
+ */\r
+ hetREG1->INTENAC = 0xFFFFFFFFU;\r
+ hetREG1->INTENAS = 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U\r
+ | 0x00000000U;\r
+\r
+ \r
+ /** - Parity control register \r
+ * - Enable/Disable Parity check\r
+ */\r
+ hetREG1->PCREG = 0x00000005U;\r
+ \r
+ /** - Setup control register \r
+ * - Enable output buffers\r
+ * - Ignore software breakpoints\r
+ * - Master mode\r
+ * - Enable HET\r
+ */\r
+ hetREG1->GCR = 0x01030001U;\r
+ /** @note This function has to be called before the driver can be used.\n\r
+ * This function has to be executed in priviledged mode.\n\r
+ */\r
+\r
+\r
+\r
+}\r
+\r
+/** @fn void pwmStart( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+* @brief Start pwm signal\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+*\r
+* Start the given pwm signal\r
+*/\r
+\r
+void pwmStart( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+{\r
+ \r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control |= 0x00400000U;\r
+}\r
+\r
+\r
+/** @fn void pwmStop( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+* @brief Stop pwm signal\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+*\r
+* Stop the given pwm signal\r
+*/\r
+\r
+void pwmStop( hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+{\r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control &= ~0x00400000U;\r
+}\r
+\r
+\r
+/** @fn void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32_t pwm, uint32_t duty)\r
+* @brief Set duty cycle\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] duty duty cycle in %.\r
+*\r
+* Sets a new duty cycle on the given pwm signal\r
+*/\r
+\r
+void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32_t pwm, uint32_t duty)\r
+{\r
+ uint32_t action;\r
+ uint32_t pwmPolarity;\r
+ double period = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128U;\r
+ if(hetRAM == hetRAM1)\r
+ {\r
+ pwmPolarity = s_het1pwmPolarity[pwm];\r
+ }\r
+ else\r
+ {\r
+ }\r
+ if (duty == 0U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 0U : 2U;\r
+ }\r
+ else if (duty >= 100U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 2U : 0U;\r
+ }\r
+ else\r
+ {\r
+ action = pwmPolarity;\r
+ }\r
+ \r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control = (hetRAM->Instruction[(pwm << 1U) + 41U].Control & ~0x18U) | (action << 3U);\r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Data = (uint32_t)(period * duty / 100.0) + 128U;\r
+}\r
+\r
+\r
+/** @fn void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm, hetSIGNAL_t signal)\r
+* @brief Set period\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] signal signal \r
+ - duty cycle in %.\r
+* - period period in us.\r
+*\r
+* Sets a new pwm signal\r
+*/\r
+\r
+void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm, hetSIGNAL_t signal)\r
+{\r
+ uint32_t action;\r
+ uint32_t period;\r
+ uint32_t pwmPolarity;\r
+ \r
+ if(hetRAM == hetRAM1)\r
+ {\r
+ period = (uint32_t)(signal.period * 1000.0 / 800.000) << 7U;\r
+ pwmPolarity = s_het1pwmPolarity[pwm];\r
+ }\r
+ else\r
+ {\r
+ }\r
+ if (signal.duty == 0U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 0U : 2U;\r
+ }\r
+ else if (signal.duty >= 100U)\r
+ {\r
+ action = (pwmPolarity == 3U) ? 2U : 0U;\r
+ }\r
+ else\r
+ {\r
+ action = pwmPolarity;\r
+ }\r
+ \r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control = (hetRAM->Instruction[(pwm << 1U) + 41U].Control & ~0x18U) | (action << 3U);\r
+ hetRAM->Instruction[(pwm << 1U) + 41U].Data = (uint32_t)(period * signal.duty / 100.0) + 128U;\r
+ hetRAM->Instruction[(pwm << 1U) + 42U].Data = period - 128U;\r
+}\r
+\r
+\r
+/** @fn hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+* @brief Get duty cycle\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+*\r
+* Gets current signal of the given pwm signal.\r
+*/\r
+\r
+hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm)\r
+{\r
+ hetSIGNAL_t signal; \r
+ uint32_t duty = hetRAM->Instruction[(pwm << 1U) + 41U].Data - 128;\r
+ uint32_t period = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128;\r
+ \r
+ signal.duty = (uint32_t)(100.0 * duty / period);\r
+\r
+ if(hetRAM == hetRAM1)\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ else\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ return signal;\r
+}\r
+\r
+\r
+/** @fn void pwmEnableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+* @brief Enable pwm notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] notification Pwm notification:\r
+* - pwmEND_OF_DUTY: Notification on end of duty\r
+* - pwmEND_OF_PERIOD: Notification on end of end period\r
+* - pwmEND_OF_BOTH: Notification on end of both duty and period\r
+*/\r
+\r
+void pwmEnableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+{\r
+ hetREG->FLG = notification << (pwm << 1U);\r
+ hetREG->INTENAS = notification << (pwm << 1U);\r
+}\r
+\r
+\r
+/** @fn void pwmDisableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+* @brief Enable pwm notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] pwm Pwm signal:\r
+* - pwm0: Pwm 0\r
+* - pwm1: Pwm 1\r
+* - pwm2: Pwm 2\r
+* - pwm3: Pwm 3\r
+* - pwm4: Pwm 4\r
+* - pwm5: Pwm 5\r
+* - pwm6: Pwm 6\r
+* - pwm7: Pwm 7\r
+* @param[in] notification Pwm notification:\r
+* - pwmEND_OF_DUTY: Notification on end of duty\r
+* - pwmEND_OF_PERIOD: Notification on end of end period\r
+* - pwmEND_OF_BOTH: Notification on end of both duty and period\r
+*/\r
+\r
+void pwmDisableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)\r
+{\r
+ hetREG->INTENAC = notification << (pwm << 1U);\r
+}\r
+\r
+\r
+/** @fn void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+* @brief Resets edge counter to 0\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*\r
+* Reset edge counter to 0.\r
+*/\r
+\r
+void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+{\r
+ hetRAM->Instruction[edge + 17U].Data = 0U;\r
+}\r
+\r
+\r
+/** @fn uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+* @brief Get current edge counter value\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*\r
+* Gets current edge counter value.\r
+*/\r
+\r
+uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)\r
+{\r
+ return hetRAM->Instruction[edge + 17U].Data >> 7U;\r
+}\r
+\r
+\r
+/** @fn void edgeEnableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+* @brief Enable edge notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*/\r
+\r
+void edgeEnableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+{\r
+ hetREG->FLG = 0x20000U << edge;\r
+ hetREG->INTENAS = 0x20000U << edge;\r
+}\r
+\r
+\r
+/** @fn void edgeDisableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+* @brief Enable edge notification\r
+* @param[in] hetREG Pointer to HET Module:\r
+* - hetREG1: HET1 Module pointer\r
+* - hetREG2: HET2 Module pointer\r
+* @param[in] edge Edge signal:\r
+* - edge0: Edge 0\r
+* - edge1: Edge 1\r
+* - edge2: Edge 2\r
+* - edge3: Edge 3\r
+* - edge4: Edge 4\r
+* - edge5: Edge 5\r
+* - edge6: Edge 6\r
+* - edge7: Edge 7\r
+*/\r
+\r
+void edgeDisableNotification(hetBASE_t * hetREG, uint32_t edge)\r
+{\r
+ hetREG->INTENAC = 0x20000U << edge;\r
+}\r
+\r
+\r
+/** @fn hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM, uint32_t cap)\r
+* @brief Get capture signal\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+* @param[in] cap captured signal:\r
+* - cap0: Captured signal 0\r
+* - cap1: Captured signal 1\r
+* - cap2: Captured signal 2\r
+* - cap3: Captured signal 3\r
+* - cap4: Captured signal 4\r
+* - cap5: Captured signal 5\r
+* - cap6: Captured signal 6\r
+* - cap7: Captured signal 7\r
+*\r
+* Gets current signal of the given capture signal.\r
+*/\r
+\r
+hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM, uint32_t cap)\r
+{\r
+ uint32_t duty = hetRAM->Instruction[(cap << 1U) + 25U].Data;\r
+ uint32_t period = hetRAM->Instruction[(cap << 1U) + 26U].Data;\r
+ hetSIGNAL_t signal; \r
+ \r
+ signal.duty = (uint32_t)(100.0 * duty / period);\r
+ \r
+ if( hetRAM == hetRAM1)\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ else\r
+ {\r
+ signal.period = (period >> 7U) * 800.000 / 1000.0;\r
+ }\r
+ return signal;\r
+}\r
+\r
+\r
+/** @fn void hetResetTimestamp(hetRAMBASE_t *hetRAM)\r
+* @brief Resets timestamp\r
+* @param[in] hetRAM Pointer to HET RAM:\r
+* - hetRAM1: HET1 RAM pointer\r
+* - hetRAM2: HET2 RAM pointer\r
+*\r
+* Resets loop count based timstamp.\r
+*/\r
+\r
+void hetResetTimestamp(hetRAMBASE_t * hetRAM)\r
+{\r
+ hetRAM->Instruction[0U].Data = 0;\r
+}\r
+\r
+\r
+/** @fn uint32_t hetGetTimestamp(hetRAMBASE_t *hetRAM)\r
+* @brief Returns timestamp\r
+*\r
+* Returns loop count based timstamp.\r
+*/\r
+\r
+uint32_t hetGetTimestamp(hetRAMBASE_t * hetRAM)\r
+{\r
+ return hetRAM->Instruction[57U].Data;\r
+}\r
+\r
+/* USER CODE BEGIN (4) */\r
+/* USER CODE END */\r
+\r
+/** @fn void het1HighLevelInterrupt(void)\r
+* @brief Level 0 Interrupt for HET1\r
+*/\r
+#pragma INTERRUPT(het1HighLevelInterrupt, IRQ)\r
+\r
+void het1HighLevelInterrupt(void)\r
+{\r
+ uint32_t vec = hetREG1->OFF1;\r
+ \r
+ if (vec < 18U)\r
+ {\r
+ if ((vec & 1U) != 0)\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_PERIOD);\r
+ }\r
+ else\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_DUTY);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ edgeNotification(hetREG1,vec - 18U);\r
+ }\r
+}\r
+\r
+\r
+/** @fn void het1LowLevelInterrupt(void)\r
+* @brief Level 1 Interrupt for HET1\r
+*/\r
+#pragma INTERRUPT(het1LowLevelInterrupt, IRQ)\r
+\r
+void het1LowLevelInterrupt(void)\r
+{\r
+ uint32_t vec = hetREG1->OFF2;\r
+ \r
+ if (vec < 18U)\r
+ {\r
+ if ((vec & 1U) != 0)\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_PERIOD);\r
+ }\r
+ else\r
+ {\r
+ pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_DUTY);\r
+ }\r
+ }\r
+ else\r
+ {\r
+ edgeNotification(hetREG1,vec - 18U);\r
+ }\r
+}\r
+\r