--- /dev/null
+[submodule "rpp-lib"]
+ path = rpp-lib
+ url = git@rtime.felk.cvut.cz:pes-rpp/rpp-lib
+ update = merge
+ branch = master
+ fetchRecurseSubmodules = true
--- /dev/null
+Subproject commit c66e77d4908800444976f40a653cab1e628ba088
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef INC_FREERTOS_H
-#define INC_FREERTOS_H
-
-
-/*
- * Include the generic headers required for the FreeRTOS port being used.
- */
-#include <stddef.h>
-
-/* Basic FreeRTOS definitions. */
-#include "os/projdefs.h"
-
-/* Application specific configuration options. */
-#include "os/FreeRTOSConfig.h"
-
-/* Definitions specific to the port being used. */
-#include "os/portable.h"
-
-/* Definitions specific R4 core. */
-#include "sys/sys_core.h"
-
-/* Defines the prototype to which the application task hook function must
-conform. */
-typedef portBASE_TYPE (*pdTASK_HOOK_CODE)( void * );
-
-
-
-
-
-/*
- * Check all the required application specific macros have been defined.
- * These macros are application specific and (as downloaded) are defined
- * within FreeRTOSConfig.h.
- */
-
-#ifndef configUSE_PREEMPTION
- #error Missing definition: configUSE_PREEMPTION should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef configUSE_IDLE_HOOK
- #error Missing definition: configUSE_IDLE_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef configUSE_TICK_HOOK
- #error Missing definition: configUSE_TICK_HOOK should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef configUSE_CO_ROUTINES
- #error Missing definition: configUSE_CO_ROUTINES should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_vTaskPrioritySet
- #error Missing definition: INCLUDE_vTaskPrioritySet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_uxTaskPriorityGet
- #error Missing definition: INCLUDE_uxTaskPriorityGet should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_vTaskDelete
- #error Missing definition: INCLUDE_vTaskDelete should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_vTaskSuspend
- #error Missing definition: INCLUDE_vTaskSuspend should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_vTaskDelayUntil
- #error Missing definition: INCLUDE_vTaskDelayUntil should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_vTaskDelay
- #error Missing definition: INCLUDE_vTaskDelay should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef configUSE_16_BIT_TICKS
- #error Missing definition: configUSE_16_BIT_TICKS should be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details.
-#endif
-
-#ifndef INCLUDE_xTaskGetIdleTaskHandle
- #define INCLUDE_xTaskGetIdleTaskHandle 0
-#endif
-
-#ifndef INCLUDE_xTimerGetTimerDaemonTaskHandle
- #define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
-#endif
-
-#ifndef INCLUDE_pcTaskGetTaskName
- #define INCLUDE_pcTaskGetTaskName 0
-#endif
-
-#ifndef configUSE_APPLICATION_TASK_TAG
- #define configUSE_APPLICATION_TASK_TAG 0
-#endif
-
-#ifndef INCLUDE_uxTaskGetStackHighWaterMark
- #define INCLUDE_uxTaskGetStackHighWaterMark 0
-#endif
-
-#ifndef configUSE_RECURSIVE_MUTEXES
- #define configUSE_RECURSIVE_MUTEXES 0
-#endif
-
-#ifndef configUSE_MUTEXES
- #define configUSE_MUTEXES 0
-#endif
-
-#ifndef configUSE_TIMERS
- #define configUSE_TIMERS 0
-#endif
-
-#ifndef configUSE_COUNTING_SEMAPHORES
- #define configUSE_COUNTING_SEMAPHORES 0
-#endif
-
-#ifndef configUSE_ALTERNATIVE_API
- #define configUSE_ALTERNATIVE_API 0
-#endif
-
-#ifndef portCRITICAL_NESTING_IN_TCB
- #define portCRITICAL_NESTING_IN_TCB 0
-#endif
-
-#ifndef configMAX_TASK_NAME_LEN
- #define configMAX_TASK_NAME_LEN 16
-#endif
-
-#ifndef configIDLE_SHOULD_YIELD
- #define configIDLE_SHOULD_YIELD 1
-#endif
-
-#if configMAX_TASK_NAME_LEN < 1
- #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h
-#endif
-
-#ifndef INCLUDE_xTaskResumeFromISR
- #define INCLUDE_xTaskResumeFromISR 1
-#endif
-
-#ifndef configASSERT
- #define configASSERT( x )
-#endif
-
-/* The timers module relies on xTaskGetSchedulerState(). */
-#if configUSE_TIMERS == 1
-
- #ifndef configTIMER_TASK_PRIORITY
- #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined.
- #endif /* configTIMER_TASK_PRIORITY */
-
- #ifndef configTIMER_QUEUE_LENGTH
- #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined.
- #endif /* configTIMER_QUEUE_LENGTH */
-
- #ifndef configTIMER_TASK_STACK_DEPTH
- #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined.
- #endif /* configTIMER_TASK_STACK_DEPTH */
-
-#endif /* configUSE_TIMERS */
-
-#ifndef INCLUDE_xTaskGetSchedulerState
- #define INCLUDE_xTaskGetSchedulerState 0
-#endif
-
-#ifndef INCLUDE_xTaskGetCurrentTaskHandle
- #define INCLUDE_xTaskGetCurrentTaskHandle 0
-#endif
-
-
-#ifndef portSET_INTERRUPT_MASK_FROM_ISR
- #define portSET_INTERRUPT_MASK_FROM_ISR() 0
-#endif
-
-#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR
- #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue
-#endif
-
-
-#ifndef configQUEUE_REGISTRY_SIZE
- #define configQUEUE_REGISTRY_SIZE 0U
-#endif
-
-#if ( configQUEUE_REGISTRY_SIZE < 1 )
- #define vQueueAddToRegistry( xQueue, pcName )
- #define vQueueUnregisterQueue( xQueue )
-#endif
-
-#ifndef portPOINTER_SIZE_TYPE
- #define portPOINTER_SIZE_TYPE unsigned long
-#endif
-
-/* Remove any unused trace macros. */
-#ifndef traceSTART
- /* Used to perform any necessary initialisation - for example, open a file
- into which trace is to be written. */
- #define traceSTART()
-#endif
-
-#ifndef traceEND
- /* Use to close a trace, for example close a file into which trace has been
- written. */
- #define traceEND()
-#endif
-
-#ifndef traceTASK_SWITCHED_IN
- /* Called after a task has been selected to run. pxCurrentTCB holds a pointer
- to the task control block of the selected task. */
- #define traceTASK_SWITCHED_IN()
-#endif
-
-#ifndef traceTASK_SWITCHED_OUT
- /* Called before a task has been selected to run. pxCurrentTCB holds a pointer
- to the task control block of the task being switched out. */
- #define traceTASK_SWITCHED_OUT()
-#endif
-
-#ifndef traceBLOCKING_ON_QUEUE_RECEIVE
- /* Task is about to block because it cannot read from a
- queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore
- upon which the read was attempted. pxCurrentTCB points to the TCB of the
- task that attempted the read. */
- #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue )
-#endif
-
-#ifndef traceBLOCKING_ON_QUEUE_SEND
- /* Task is about to block because it cannot write to a
- queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore
- upon which the write was attempted. pxCurrentTCB points to the TCB of the
- task that attempted the write. */
- #define traceBLOCKING_ON_QUEUE_SEND( pxQueue )
-#endif
-
-#ifndef configCHECK_FOR_STACK_OVERFLOW
- #define configCHECK_FOR_STACK_OVERFLOW 0
-#endif
-
-/* The following event macros are embedded in the kernel API calls. */
-
-#ifndef traceQUEUE_CREATE
- #define traceQUEUE_CREATE( pxNewQueue )
-#endif
-
-#ifndef traceQUEUE_CREATE_FAILED
- #define traceQUEUE_CREATE_FAILED()
-#endif
-
-#ifndef traceCREATE_MUTEX
- #define traceCREATE_MUTEX( pxNewQueue )
-#endif
-
-#ifndef traceCREATE_MUTEX_FAILED
- #define traceCREATE_MUTEX_FAILED()
-#endif
-
-#ifndef traceGIVE_MUTEX_RECURSIVE
- #define traceGIVE_MUTEX_RECURSIVE( pxMutex )
-#endif
-
-#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED
- #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex )
-#endif
-
-#ifndef traceTAKE_MUTEX_RECURSIVE
- #define traceTAKE_MUTEX_RECURSIVE( pxMutex )
-#endif
-
-#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED
- #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex )
-#endif
-
-#ifndef traceCREATE_COUNTING_SEMAPHORE
- #define traceCREATE_COUNTING_SEMAPHORE()
-#endif
-
-#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED
- #define traceCREATE_COUNTING_SEMAPHORE_FAILED()
-#endif
-
-#ifndef traceQUEUE_SEND
- #define traceQUEUE_SEND( pxQueue )
-#endif
-
-#ifndef traceQUEUE_SEND_FAILED
- #define traceQUEUE_SEND_FAILED( pxQueue )
-#endif
-
-#ifndef traceQUEUE_RECEIVE
- #define traceQUEUE_RECEIVE( pxQueue )
-#endif
-
-#ifndef traceQUEUE_PEEK
- #define traceQUEUE_PEEK( pxQueue )
-#endif
-
-#ifndef traceQUEUE_RECEIVE_FAILED
- #define traceQUEUE_RECEIVE_FAILED( pxQueue )
-#endif
-
-#ifndef traceQUEUE_SEND_FROM_ISR
- #define traceQUEUE_SEND_FROM_ISR( pxQueue )
-#endif
-
-#ifndef traceQUEUE_SEND_FROM_ISR_FAILED
- #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue )
-#endif
-
-#ifndef traceQUEUE_RECEIVE_FROM_ISR
- #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue )
-#endif
-
-#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED
- #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue )
-#endif
-
-#ifndef traceQUEUE_DELETE
- #define traceQUEUE_DELETE( pxQueue )
-#endif
-
-#ifndef traceTASK_CREATE
- #define traceTASK_CREATE( pxNewTCB )
-#endif
-
-#ifndef traceTASK_CREATE_FAILED
- #define traceTASK_CREATE_FAILED()
-#endif
-
-#ifndef traceTASK_DELETE
- #define traceTASK_DELETE( pxTaskToDelete )
-#endif
-
-#ifndef traceTASK_DELAY_UNTIL
- #define traceTASK_DELAY_UNTIL()
-#endif
-
-#ifndef traceTASK_DELAY
- #define traceTASK_DELAY()
-#endif
-
-#ifndef traceTASK_PRIORITY_SET
- #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority )
-#endif
-
-#ifndef traceTASK_SUSPEND
- #define traceTASK_SUSPEND( pxTaskToSuspend )
-#endif
-
-#ifndef traceTASK_RESUME
- #define traceTASK_RESUME( pxTaskToResume )
-#endif
-
-#ifndef traceTASK_RESUME_FROM_ISR
- #define traceTASK_RESUME_FROM_ISR( pxTaskToResume )
-#endif
-
-#ifndef traceTASK_INCREMENT_TICK
- #define traceTASK_INCREMENT_TICK( xTickCount )
-#endif
-
-#ifndef traceTIMER_CREATE
- #define traceTIMER_CREATE( pxNewTimer )
-#endif
-
-#ifndef traceTIMER_CREATE_FAILED
- #define traceTIMER_CREATE_FAILED()
-#endif
-
-#ifndef traceTIMER_COMMAND_SEND
- #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn )
-#endif
-
-#ifndef traceTIMER_EXPIRED
- #define traceTIMER_EXPIRED( pxTimer )
-#endif
-
-#ifndef traceTIMER_COMMAND_RECEIVED
- #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue )
-#endif
-
-#ifndef configGENERATE_RUN_TIME_STATS
- #define configGENERATE_RUN_TIME_STATS 0
-#endif
-
-#if ( configGENERATE_RUN_TIME_STATS == 1 )
-
- #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS
- #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base.
- #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */
-
- #ifndef portGET_RUN_TIME_COUNTER_VALUE
- #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE
- #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information.
- #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */
- #endif /* portGET_RUN_TIME_COUNTER_VALUE */
-
-#endif /* configGENERATE_RUN_TIME_STATS */
-
-#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS
- #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
-#endif
-
-#ifndef configUSE_MALLOC_FAILED_HOOK
- #define configUSE_MALLOC_FAILED_HOOK 0
-#endif
-
-#ifndef portPRIVILEGE_BIT
- #define portPRIVILEGE_BIT ( ( unsigned portBASE_TYPE ) 0x00 )
-#endif
-
-#ifndef portYIELD_WITHIN_API
- #define portYIELD_WITHIN_API portYIELD
-#endif
-
-#ifndef pvPortMallocAligned
- #define pvPortMallocAligned( x, puxStackBuffer ) ( ( ( puxStackBuffer ) == NULL ) ? ( pvPortMalloc( ( x ) ) ) : ( puxStackBuffer ) )
-#endif
-
-#ifndef vPortFreeAligned
- #define vPortFreeAligned( pvBlockToFree ) vPortFree( pvBlockToFree )
-#endif
-
-#endif /* INC_FREERTOS_H */
-
+++ /dev/null
-#ifndef FREERTOS_CONFIG_H
-#define FREERTOS_CONFIG_H
-
-/*-----------------------------------------------------------
- * Application specific definitions.
- *
- * These definitions should be adjusted for your particular hardware and
- * application requirements.
- *
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
- *
- * See http://www.freertos.org/a00110.html.
- *----------------------------------------------------------*/
-
-
-/*-----------------------------------------------------------
- * RPP Notes:
- *
- * Please change configCHECK_FOR_STACK_OVERFLOW to 0 when going to production
- * Check http://www.freertos.org/Stacks-and-stack-overflow-checking.html
- *----------------------------------------------------------*/
-
-
-#define configUSE_PREEMPTION 1
-#define configUSE_IDLE_HOOK 0
-#define configUSE_TICK_HOOK 0
-#define configUSE_TRACE_FACILITY 0
-#define configUSE_16_BIT_TICKS 0
-#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 80000000 ) /* Timer clock. */
-#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
-#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 5 )
-#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 )
-#define configTOTAL_HEAP_SIZE ( ( size_t ) 16284 )
-#define configMAX_TASK_NAME_LEN ( 16 )
-#define configIDLE_SHOULD_YIELD 1
-#define configGENERATE_RUN_TIME_STATS 0
-#define configUSE_MALLOC_FAILED_HOOK 1
-#define configCHECK_FOR_STACK_OVERFLOW 2
-
-/* Co-routine definitions. */
-#define configUSE_CO_ROUTINES 0
-#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
-
-/* Mutexes */
-#define configUSE_MUTEXES 1
-#define configUSE_RECURSIVE_MUTEXES 0
-
-/* Semaphores */
-#define configUSE_COUNTING_SEMAPHORES 1
-
-/* Timers */
-#define configUSE_TIMERS 0
-#define configTIMER_TASK_PRIORITY ( 0 )
-#define configTIMER_QUEUE_LENGTH 0
-#define configTIMER_TASK_STACK_DEPTH ( 0 )
-
-/* Set the following definitions to 1 to include the API function, or zero to exclude the API function. */
-#define INCLUDE_vTaskPrioritySet 1
-#define INCLUDE_uxTaskPriorityGet 1
-#define INCLUDE_vTaskDelete 1
-#define INCLUDE_vTaskCleanUpResources 0
-#define INCLUDE_vTaskSuspend 1
-#define INCLUDE_xTaskResumeFromISR 1
-#define INCLUDE_vTaskDelayUntil 1
-#define INCLUDE_vTaskDelay 1
-#define INCLUDE_xTaskGetSchedulerState 1
-#define INCLUDE_uxTaskGetStackHighWaterMark 1
-
-#endif /* FREERTOS_CONFIG_H */
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef STACK_MACROS_H
-#define STACK_MACROS_H
-
-/*
- * Call the stack overflow hook function if the stack of the task being swapped
- * out is currently overflowed, or looks like it might have overflowed in the
- * past.
- *
- * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
- * the current stack state only - comparing the current top of stack value to
- * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
- * will also cause the last few stack bytes to be checked to ensure the value
- * to which the bytes were set when the task was created have not been
- * overwritten. Note this second test does not guarantee that an overflowed
- * stack will always be recognised.
- */
-
-/*-----------------------------------------------------------*/
-
-#if( configCHECK_FOR_STACK_OVERFLOW == 0 )
-
- /* FreeRTOSConfig.h is not set to check for stack overflows. */
- #define taskFIRST_CHECK_FOR_STACK_OVERFLOW()
- #define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 0 */
-/*-----------------------------------------------------------*/
-
-#if( configCHECK_FOR_STACK_OVERFLOW == 1 )
-
- /* FreeRTOSConfig.h is only set to use the first method of
- overflow checking. */
- #define taskSECOND_CHECK_FOR_STACK_OVERFLOW()
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH < 0 ) )
-
- /* Only the current stack state is to be checked. */
- #define taskFIRST_CHECK_FOR_STACK_OVERFLOW() \
- { \
- /* Is the currently saved stack pointer within the stack limit? */ \
- if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \
- { \
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
- } \
- }
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW > 0 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 0 ) && ( portSTACK_GROWTH > 0 ) )
-
- /* Only the current stack state is to be checked. */
- #define taskFIRST_CHECK_FOR_STACK_OVERFLOW() \
- { \
- \
- /* Is the currently saved stack pointer within the stack limit? */ \
- if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \
- { \
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
- } \
- }
-
-#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
-
- #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \
- { \
- static const unsigned char ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
- \
- \
- /* Has the extremity of the task stack ever been written over? */ \
- if( memcmp( ( void * ) pxCurrentTCB->pxStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
- { \
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
- } \
- }
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
-
- #define taskSECOND_CHECK_FOR_STACK_OVERFLOW() \
- { \
- char *pcEndOfStack = ( char * ) pxCurrentTCB->pxEndOfStack; \
- static const unsigned char ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \
- tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \
- \
- \
- pcEndOfStack -= sizeof( ucExpectedStackBytes ); \
- \
- /* Has the extremity of the task stack ever been written over? */ \
- if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \
- { \
- vApplicationStackOverflowHook( ( xTaskHandle ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \
- } \
- }
-
-#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
-/*-----------------------------------------------------------*/
-
-#endif /* STACK_MACROS_H */
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef CO_ROUTINE_H
-#define CO_ROUTINE_H
-
-#ifndef INC_FREERTOS_H
- #error "include FreeRTOS.h must appear in source files before include croutine.h"
-#endif
-
-#include "os/list.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Used to hide the implementation of the co-routine control block. The
-control block structure however has to be included in the header due to
-the macro implementation of the co-routine functionality. */
-typedef void * xCoRoutineHandle;
-
-/* Defines the prototype to which co-routine functions must conform. */
-typedef void (*crCOROUTINE_CODE)( xCoRoutineHandle, unsigned portBASE_TYPE );
-
-typedef struct corCoRoutineControlBlock
-{
- crCOROUTINE_CODE pxCoRoutineFunction;
- xListItem xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */
- xListItem xEventListItem; /*< List item used to place the CRCB in event lists. */
- unsigned portBASE_TYPE uxPriority; /*< The priority of the co-routine in relation to other co-routines. */
- unsigned portBASE_TYPE uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */
- unsigned short uxState; /*< Used internally by the co-routine implementation. */
-} corCRCB; /* Co-routine control block. Note must be identical in size down to uxPriority with tskTCB. */
-
-/**
- * croutine. h
- *<pre>
- portBASE_TYPE xCoRoutineCreate(
- crCOROUTINE_CODE pxCoRoutineCode,
- unsigned portBASE_TYPE uxPriority,
- unsigned portBASE_TYPE uxIndex
- );</pre>
- *
- * Create a new co-routine and add it to the list of co-routines that are
- * ready to run.
- *
- * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine
- * functions require special syntax - see the co-routine section of the WEB
- * documentation for more information.
- *
- * @param uxPriority The priority with respect to other co-routines at which
- * the co-routine will run.
- *
- * @param uxIndex Used to distinguish between different co-routines that
- * execute the same function. See the example below and the co-routine section
- * of the WEB documentation for further information.
- *
- * @return pdPASS if the co-routine was successfully created and added to a ready
- * list, otherwise an error code defined with ProjDefs.h.
- *
- * Example usage:
- <pre>
- // Co-routine to be created.
- void vFlashCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- static const char cLedToFlash[ 2 ] = { 5, 6 };
- static const portTickType uxFlashRates[ 2 ] = { 200, 400 };
-
- // Must start every co-routine with a call to crSTART();
- crSTART( xHandle );
-
- for( ;; )
- {
- // This co-routine just delays for a fixed period, then toggles
- // an LED. Two co-routines are created using this function, so
- // the uxIndex parameter is used to tell the co-routine which
- // LED to flash and how long to delay. This assumes xQueue has
- // already been created.
- vParTestToggleLED( cLedToFlash[ uxIndex ] );
- crDELAY( xHandle, uxFlashRates[ uxIndex ] );
- }
-
- // Must end every co-routine with a call to crEND();
- crEND();
- }
-
- // Function that creates two co-routines.
- void vOtherFunction( void )
- {
- unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-
- // Create two co-routines at priority 0. The first is given index 0
- // so (from the code above) toggles LED 5 every 200 ticks. The second
- // is given index 1 so toggles LED 6 every 400 ticks.
- for( uxIndex = 0; uxIndex < 2; uxIndex++ )
- {
- xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
- }
- }
- </pre>
- * \defgroup xCoRoutineCreate xCoRoutineCreate
- * \ingroup Tasks
- */
-signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex );
-
-
-/**
- * croutine. h
- *<pre>
- void vCoRoutineSchedule( void );</pre>
- *
- * Run a co-routine.
- *
- * vCoRoutineSchedule() executes the highest priority co-routine that is able
- * to run. The co-routine will execute until it either blocks, yields or is
- * preempted by a task. Co-routines execute cooperatively so one
- * co-routine cannot be preempted by another, but can be preempted by a task.
- *
- * If an application comprises of both tasks and co-routines then
- * vCoRoutineSchedule should be called from the idle task (in an idle task
- * hook).
- *
- * Example usage:
- <pre>
- // This idle task hook will schedule a co-routine each time it is called.
- // The rest of the idle task will execute between co-routine calls.
- void vApplicationIdleHook( void )
- {
- vCoRoutineSchedule();
- }
-
- // Alternatively, if you do not require any other part of the idle task to
- // execute, the idle task hook can call vCoRoutineScheduler() within an
- // infinite loop.
- void vApplicationIdleHook( void )
- {
- for( ;; )
- {
- vCoRoutineSchedule();
- }
- }
- </pre>
- * \defgroup vCoRoutineSchedule vCoRoutineSchedule
- * \ingroup Tasks
- */
-void vCoRoutineSchedule( void );
-
-/**
- * croutine. h
- * <pre>
- crSTART( xCoRoutineHandle xHandle );</pre>
- *
- * This macro MUST always be called at the start of a co-routine function.
- *
- * Example usage:
- <pre>
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static long ulAVariable;
-
- // Must start every co-routine with a call to crSTART();
- crSTART( xHandle );
-
- for( ;; )
- {
- // Co-routine functionality goes here.
- }
-
- // Must end every co-routine with a call to crEND();
- crEND();
- }</pre>
- * \defgroup crSTART crSTART
- * \ingroup Tasks
- */
-#define crSTART( pxCRCB ) switch( ( ( corCRCB * )( pxCRCB ) )->uxState ) { case 0:
-
-/**
- * croutine. h
- * <pre>
- crEND();</pre>
- *
- * This macro MUST always be called at the end of a co-routine function.
- *
- * Example usage:
- <pre>
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static long ulAVariable;
-
- // Must start every co-routine with a call to crSTART();
- crSTART( xHandle );
-
- for( ;; )
- {
- // Co-routine functionality goes here.
- }
-
- // Must end every co-routine with a call to crEND();
- crEND();
- }</pre>
- * \defgroup crSTART crSTART
- * \ingroup Tasks
- */
-#define crEND() }
-
-/*
- * These macros are intended for internal use by the co-routine implementation
- * only. The macros should not be used directly by application writers.
- */
-#define crSET_STATE0( xHandle ) ( ( corCRCB * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2):
-#define crSET_STATE1( xHandle ) ( ( corCRCB * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1):
-
-/**
- * croutine. h
- *<pre>
- crDELAY( xCoRoutineHandle xHandle, portTickType xTicksToDelay );</pre>
- *
- * Delay a co-routine for a fixed period of time.
- *
- * crDELAY can only be called from the co-routine function itself - not
- * from within a function called by the co-routine function. This is because
- * co-routines do not maintain their own stack.
- *
- * @param xHandle The handle of the co-routine to delay. This is the xHandle
- * parameter of the co-routine function.
- *
- * @param xTickToDelay The number of ticks that the co-routine should delay
- * for. The actual amount of time this equates to is defined by
- * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_RATE_MS
- * can be used to convert ticks to milliseconds.
- *
- * Example usage:
- <pre>
- // Co-routine to be created.
- void vACoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- // This may not be necessary for const variables.
- // We are to delay for 200ms.
- static const xTickType xDelayTime = 200 / portTICK_RATE_MS;
-
- // Must start every co-routine with a call to crSTART();
- crSTART( xHandle );
-
- for( ;; )
- {
- // Delay for 200ms.
- crDELAY( xHandle, xDelayTime );
-
- // Do something here.
- }
-
- // Must end every co-routine with a call to crEND();
- crEND();
- }</pre>
- * \defgroup crDELAY crDELAY
- * \ingroup Tasks
- */
-#define crDELAY( xHandle, xTicksToDelay ) \
- if( ( xTicksToDelay ) > 0 ) \
- { \
- vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \
- } \
- crSET_STATE0( ( xHandle ) );
-
-/**
- * <pre>
- crQUEUE_SEND(
- xCoRoutineHandle xHandle,
- xQueueHandle pxQueue,
- void *pvItemToQueue,
- portTickType xTicksToWait,
- portBASE_TYPE *pxResult
- )</pre>
- *
- * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
- * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
- *
- * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas
- * xQueueSend() and xQueueReceive() can only be used from tasks.
- *
- * crQUEUE_SEND can only be called from the co-routine function itself - not
- * from within a function called by the co-routine function. This is because
- * co-routines do not maintain their own stack.
- *
- * See the co-routine section of the WEB documentation for information on
- * passing data between tasks and co-routines and between ISR's and
- * co-routines.
- *
- * @param xHandle The handle of the calling co-routine. This is the xHandle
- * parameter of the co-routine function.
- *
- * @param pxQueue The handle of the queue on which the data will be posted.
- * The handle is obtained as the return value when the queue is created using
- * the xQueueCreate() API function.
- *
- * @param pvItemToQueue A pointer to the data being posted onto the queue.
- * The number of bytes of each queued item is specified when the queue is
- * created. This number of bytes is copied from pvItemToQueue into the queue
- * itself.
- *
- * @param xTickToDelay The number of ticks that the co-routine should block
- * to wait for space to become available on the queue, should space not be
- * available immediately. The actual amount of time this equates to is defined
- * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant
- * portTICK_RATE_MS can be used to convert ticks to milliseconds (see example
- * below).
- *
- * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
- * data was successfully posted onto the queue, otherwise it will be set to an
- * error defined within ProjDefs.h.
- *
- * Example usage:
- <pre>
- // Co-routine function that blocks for a fixed period then posts a number onto
- // a queue.
- static void prvCoRoutineFlashTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xNumberToPost = 0;
- static portBASE_TYPE xResult;
-
- // Co-routines must begin with a call to crSTART().
- crSTART( xHandle );
-
- for( ;; )
- {
- // This assumes the queue has already been created.
- crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
-
- if( xResult != pdPASS )
- {
- // The message was not posted!
- }
-
- // Increment the number to be posted onto the queue.
- xNumberToPost++;
-
- // Delay for 100 ticks.
- crDELAY( xHandle, 100 );
- }
-
- // Co-routines must end with a call to crEND().
- crEND();
- }</pre>
- * \defgroup crQUEUE_SEND crQUEUE_SEND
- * \ingroup Tasks
- */
-#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \
-{ \
- *( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \
- if( *( pxResult ) == errQUEUE_BLOCKED ) \
- { \
- crSET_STATE0( ( xHandle ) ); \
- *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \
- } \
- if( *pxResult == errQUEUE_YIELD ) \
- { \
- crSET_STATE1( ( xHandle ) ); \
- *pxResult = pdPASS; \
- } \
-}
-
-/**
- * croutine. h
- * <pre>
- crQUEUE_RECEIVE(
- xCoRoutineHandle xHandle,
- xQueueHandle pxQueue,
- void *pvBuffer,
- portTickType xTicksToWait,
- portBASE_TYPE *pxResult
- )</pre>
- *
- * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine
- * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks.
- *
- * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas
- * xQueueSend() and xQueueReceive() can only be used from tasks.
- *
- * crQUEUE_RECEIVE can only be called from the co-routine function itself - not
- * from within a function called by the co-routine function. This is because
- * co-routines do not maintain their own stack.
- *
- * See the co-routine section of the WEB documentation for information on
- * passing data between tasks and co-routines and between ISR's and
- * co-routines.
- *
- * @param xHandle The handle of the calling co-routine. This is the xHandle
- * parameter of the co-routine function.
- *
- * @param pxQueue The handle of the queue from which the data will be received.
- * The handle is obtained as the return value when the queue is created using
- * the xQueueCreate() API function.
- *
- * @param pvBuffer The buffer into which the received item is to be copied.
- * The number of bytes of each queued item is specified when the queue is
- * created. This number of bytes is copied into pvBuffer.
- *
- * @param xTickToDelay The number of ticks that the co-routine should block
- * to wait for data to become available from the queue, should data not be
- * available immediately. The actual amount of time this equates to is defined
- * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant
- * portTICK_RATE_MS can be used to convert ticks to milliseconds (see the
- * crQUEUE_SEND example).
- *
- * @param pxResult The variable pointed to by pxResult will be set to pdPASS if
- * data was successfully retrieved from the queue, otherwise it will be set to
- * an error code as defined within ProjDefs.h.
- *
- * Example usage:
- <pre>
- // A co-routine receives the number of an LED to flash from a queue. It
- // blocks on the queue until the number is received.
- static void prvCoRoutineFlashWorkTask( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // Variables in co-routines must be declared static if they must maintain value across a blocking call.
- static portBASE_TYPE xResult;
- static unsigned portBASE_TYPE uxLEDToFlash;
-
- // All co-routines must start with a call to crSTART().
- crSTART( xHandle );
-
- for( ;; )
- {
- // Wait for data to become available on the queue.
- crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
- if( xResult == pdPASS )
- {
- // We received the LED to flash - flash it!
- vParTestToggleLED( uxLEDToFlash );
- }
- }
-
- crEND();
- }</pre>
- * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE
- * \ingroup Tasks
- */
-#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \
-{ \
- *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \
- if( *( pxResult ) == errQUEUE_BLOCKED ) \
- { \
- crSET_STATE0( ( xHandle ) ); \
- *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \
- } \
- if( *( pxResult ) == errQUEUE_YIELD ) \
- { \
- crSET_STATE1( ( xHandle ) ); \
- *( pxResult ) = pdPASS; \
- } \
-}
-
-/**
- * croutine. h
- * <pre>
- crQUEUE_SEND_FROM_ISR(
- xQueueHandle pxQueue,
- void *pvItemToQueue,
- portBASE_TYPE xCoRoutinePreviouslyWoken
- )</pre>
- *
- * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
- * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
- * functions used by tasks.
- *
- * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to
- * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and
- * xQueueReceiveFromISR() can only be used to pass data between a task and and
- * ISR.
- *
- * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue
- * that is being used from within a co-routine.
- *
- * See the co-routine section of the WEB documentation for information on
- * passing data between tasks and co-routines and between ISR's and
- * co-routines.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto
- * the same queue multiple times from a single interrupt. The first call
- * should always pass in pdFALSE. Subsequent calls should pass in
- * the value returned from the previous call.
- *
- * @return pdTRUE if a co-routine was woken by posting onto the queue. This is
- * used by the ISR to determine if a context switch may be required following
- * the ISR.
- *
- * Example usage:
- <pre>
- // A co-routine that blocks on a queue waiting for characters to be received.
- static void vReceivingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- char cRxedChar;
- portBASE_TYPE xResult;
-
- // All co-routines must start with a call to crSTART().
- crSTART( xHandle );
-
- for( ;; )
- {
- // Wait for data to become available on the queue. This assumes the
- // queue xCommsRxQueue has already been created!
- crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
-
- // Was a character received?
- if( xResult == pdPASS )
- {
- // Process the character here.
- }
- }
-
- // All co-routines must end with a call to crEND().
- crEND();
- }
-
- // An ISR that uses a queue to send characters received on a serial port to
- // a co-routine.
- void vUART_ISR( void )
- {
- char cRxedChar;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
- // We loop around reading characters until there are none left in the UART.
- while( UART_RX_REG_NOT_EMPTY() )
- {
- // Obtain the character from the UART.
- cRxedChar = UART_RX_REG;
-
- // Post the character onto a queue. xCRWokenByPost will be pdFALSE
- // the first time around the loop. If the post causes a co-routine
- // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
- // In this manner we can ensure that if more than one co-routine is
- // blocked on the queue only one is woken by this ISR no matter how
- // many characters are posted to the queue.
- xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
- }
- }</pre>
- * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR
- * \ingroup Tasks
- */
-#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) )
-
-
-/**
- * croutine. h
- * <pre>
- crQUEUE_SEND_FROM_ISR(
- xQueueHandle pxQueue,
- void *pvBuffer,
- portBASE_TYPE * pxCoRoutineWoken
- )</pre>
- *
- * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the
- * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR()
- * functions used by tasks.
- *
- * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to
- * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and
- * xQueueReceiveFromISR() can only be used to pass data between a task and and
- * ISR.
- *
- * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data
- * from a queue that is being used from within a co-routine (a co-routine
- * posted to the queue).
- *
- * See the co-routine section of the WEB documentation for information on
- * passing data between tasks and co-routines and between ISR's and
- * co-routines.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvBuffer A pointer to a buffer into which the received item will be
- * placed. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from the queue into
- * pvBuffer.
- *
- * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become
- * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a
- * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise
- * *pxCoRoutineWoken will remain unchanged.
- *
- * @return pdTRUE an item was successfully received from the queue, otherwise
- * pdFALSE.
- *
- * Example usage:
- <pre>
- // A co-routine that posts a character to a queue then blocks for a fixed
- // period. The character is incremented each time.
- static void vSendingCoRoutine( xCoRoutineHandle xHandle, unsigned portBASE_TYPE uxIndex )
- {
- // cChar holds its value while this co-routine is blocked and must therefore
- // be declared static.
- static char cCharToTx = 'a';
- portBASE_TYPE xResult;
-
- // All co-routines must start with a call to crSTART().
- crSTART( xHandle );
-
- for( ;; )
- {
- // Send the next character to the queue.
- crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
-
- if( xResult == pdPASS )
- {
- // The character was successfully posted to the queue.
- }
- else
- {
- // Could not post the character to the queue.
- }
-
- // Enable the UART Tx interrupt to cause an interrupt in this
- // hypothetical UART. The interrupt will obtain the character
- // from the queue and send it.
- ENABLE_RX_INTERRUPT();
-
- // Increment to the next character then block for a fixed period.
- // cCharToTx will maintain its value across the delay as it is
- // declared static.
- cCharToTx++;
- if( cCharToTx > 'x' )
- {
- cCharToTx = 'a';
- }
- crDELAY( 100 );
- }
-
- // All co-routines must end with a call to crEND().
- crEND();
- }
-
- // An ISR that uses a queue to receive characters to send on a UART.
- void vUART_ISR( void )
- {
- char cCharToTx;
- portBASE_TYPE xCRWokenByPost = pdFALSE;
-
- while( UART_TX_REG_EMPTY() )
- {
- // Are there any characters in the queue waiting to be sent?
- // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
- // is woken by the post - ensuring that only a single co-routine is
- // woken no matter how many times we go around this loop.
- if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
- {
- SEND_CHARACTER( cCharToTx );
- }
- }
- }</pre>
- * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR
- * \ingroup Tasks
- */
-#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) )
-
-/*
- * This function is intended for internal use by the co-routine macros only.
- * The macro nature of the co-routine implementation requires that the
- * prototype appears here. The function should not be used by application
- * writers.
- *
- * Removes the current co-routine from its ready list and places it in the
- * appropriate delayed list.
- */
-void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList );
-
-/*
- * This function is intended for internal use by the queue implementation only.
- * The function should not be used by application writers.
- *
- * Removes the highest priority co-routine from the event list and places it in
- * the pending ready list.
- */
-signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList );
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* CO_ROUTINE_H */
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-/*
- * This is the list implementation used by the scheduler. While it is tailored
- * heavily for the schedulers needs, it is also available for use by
- * application code.
- *
- * xLists can only store pointers to xListItems. Each xListItem contains a
- * numeric value (xItemValue). Most of the time the lists are sorted in
- * descending item value order.
- *
- * Lists are created already containing one list item. The value of this
- * item is the maximum possible that can be stored, it is therefore always at
- * the end of the list and acts as a marker. The list member pxHead always
- * points to this marker - even though it is at the tail of the list. This
- * is because the tail contains a wrap back pointer to the true head of
- * the list.
- *
- * In addition to it's value, each list item contains a pointer to the next
- * item in the list (pxNext), a pointer to the list it is in (pxContainer)
- * and a pointer to back to the object that contains it. These later two
- * pointers are included for efficiency of list manipulation. There is
- * effectively a two way link between the object containing the list item and
- * the list item itself.
- *
- *
- * \page ListIntroduction List Implementation
- * \ingroup FreeRTOSIntro
- */
-
-
-#ifndef LIST_H
-#define LIST_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-/*
- * Definition of the only type of object that a list can contain.
- */
-struct xLIST_ITEM
-{
- portTickType xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */
- volatile struct xLIST_ITEM * pxNext; /*< Pointer to the next xListItem in the list. */
- volatile struct xLIST_ITEM * pxPrevious;/*< Pointer to the previous xListItem in the list. */
- void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */
- void * pvContainer; /*< Pointer to the list in which this list item is placed (if any). */
-};
-typedef struct xLIST_ITEM xListItem; /* For some reason lint wants this as two separate definitions. */
-
-struct xMINI_LIST_ITEM
-{
- portTickType xItemValue;
- volatile struct xLIST_ITEM *pxNext;
- volatile struct xLIST_ITEM *pxPrevious;
-};
-typedef struct xMINI_LIST_ITEM xMiniListItem;
-
-/*
- * Definition of the type of queue used by the scheduler.
- */
-typedef struct xLIST
-{
- volatile unsigned portBASE_TYPE uxNumberOfItems;
- volatile xListItem * pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to pvListGetOwnerOfNextEntry (). */
- volatile xMiniListItem xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */
-} xList;
-
-/*
- * Access macro to set the owner of a list item. The owner of a list item
- * is the object (usually a TCB) that contains the list item.
- *
- * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER
- * \ingroup LinkedList
- */
-#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( pxListItem )->pvOwner = ( void * ) ( pxOwner )
-
-/*
- * Access macro to set the value of the list item. In most cases the value is
- * used to sort the list in descending order.
- *
- * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE
- * \ingroup LinkedList
- */
-#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( pxListItem )->xItemValue = ( xValue )
-
-/*
- * Access macro the retrieve the value of the list item. The value can
- * represent anything - for example a the priority of a task, or the time at
- * which a task should be unblocked.
- *
- * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
- * \ingroup LinkedList
- */
-#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue )
-
-/*
- * Access macro the retrieve the value of the list item at the head of a given
- * list.
- *
- * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE
- * \ingroup LinkedList
- */
-#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->xItemValue )
-
-/*
- * Access macro to determine if a list contains any items. The macro will
- * only have the value true if the list is empty.
- *
- * \page listLIST_IS_EMPTY listLIST_IS_EMPTY
- * \ingroup LinkedList
- */
-#define listLIST_IS_EMPTY( pxList ) ( ( pxList )->uxNumberOfItems == ( unsigned portBASE_TYPE ) 0 )
-
-/*
- * Access macro to return the number of items in the list.
- */
-#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems )
-
-/*
- * Access function to obtain the owner of the next entry in a list.
- *
- * The list member pxIndex is used to walk through a list. Calling
- * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list
- * and returns that entries pxOwner parameter. Using multiple calls to this
- * function it is therefore possible to move through every item contained in
- * a list.
- *
- * The pxOwner parameter of a list item is a pointer to the object that owns
- * the list item. In the scheduler this is normally a task control block.
- * The pxOwner parameter effectively creates a two way link between the list
- * item and its owner.
- *
- * @param pxList The list from which the next item owner is to be returned.
- *
- * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY
- * \ingroup LinkedList
- */
-#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \
-{ \
-xList * const pxConstList = ( pxList ); \
- /* Increment the index to the next item and return the item, ensuring */ \
- /* we don't return the marker used at the end of the list. */ \
- ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
- if( ( pxConstList )->pxIndex == ( xListItem * ) &( ( pxConstList )->xListEnd ) ) \
- { \
- ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \
- } \
- ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \
-}
-
-
-/*
- * Access function to obtain the owner of the first entry in a list. Lists
- * are normally sorted in ascending item value order.
- *
- * This function returns the pxOwner member of the first item in the list.
- * The pxOwner parameter of a list item is a pointer to the object that owns
- * the list item. In the scheduler this is normally a task control block.
- * The pxOwner parameter effectively creates a two way link between the list
- * item and its owner.
- *
- * @param pxList The list from which the owner of the head item is to be
- * returned.
- *
- * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY
- * \ingroup LinkedList
- */
-#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner )
-
-/*
- * Check to see if a list item is within a list. The list item maintains a
- * "container" pointer that points to the list it is in. All this macro does
- * is check to see if the container and the list match.
- *
- * @param pxList The list we want to know if the list item is within.
- * @param pxListItem The list item we want to know if is in the list.
- * @return pdTRUE is the list item is in the list, otherwise pdFALSE.
- * pointer against
- */
-#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( pxListItem )->pvContainer == ( void * ) ( pxList ) )
-
-/*
- * Must be called before a list is used! This initialises all the members
- * of the list structure and inserts the xListEnd item into the list as a
- * marker to the back of the list.
- *
- * @param pxList Pointer to the list being initialised.
- *
- * \page vListInitialise vListInitialise
- * \ingroup LinkedList
- */
-void vListInitialise( xList *pxList );
-
-/*
- * Must be called before a list item is used. This sets the list container to
- * null so the item does not think that it is already contained in a list.
- *
- * @param pxItem Pointer to the list item being initialised.
- *
- * \page vListInitialiseItem vListInitialiseItem
- * \ingroup LinkedList
- */
-void vListInitialiseItem( xListItem *pxItem );
-
-/*
- * Insert a list item into a list. The item will be inserted into the list in
- * a position determined by its item value (descending item value order).
- *
- * @param pxList The list into which the item is to be inserted.
- *
- * @param pxNewListItem The item to that is to be placed in the list.
- *
- * \page vListInsert vListInsert
- * \ingroup LinkedList
- */
-void vListInsert( xList *pxList, xListItem *pxNewListItem );
-
-/*
- * Insert a list item into a list. The item will be inserted in a position
- * such that it will be the last item within the list returned by multiple
- * calls to listGET_OWNER_OF_NEXT_ENTRY.
- *
- * The list member pvIndex is used to walk through a list. Calling
- * listGET_OWNER_OF_NEXT_ENTRY increments pvIndex to the next item in the list.
- * Placing an item in a list using vListInsertEnd effectively places the item
- * in the list position pointed to by pvIndex. This means that every other
- * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before
- * the pvIndex parameter again points to the item being inserted.
- *
- * @param pxList The list into which the item is to be inserted.
- *
- * @param pxNewListItem The list item to be inserted into the list.
- *
- * \page vListInsertEnd vListInsertEnd
- * \ingroup LinkedList
- */
-void vListInsertEnd( xList *pxList, xListItem *pxNewListItem );
-
-/*
- * Remove an item from a list. The list item has a pointer to the list that
- * it is in, so only the list item need be passed into the function.
- *
- * @param vListRemove The item to be removed. The item will remove itself from
- * the list pointed to by it's pxContainer parameter.
- *
- * \page vListRemove vListRemove
- * \ingroup LinkedList
- */
-void vListRemove( xListItem *pxItemToRemove );
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef MPU_WRAPPERS_H
-#define MPU_WRAPPERS_H
-
-/* This file redefines API functions to be called through a wrapper macro, but
-only for ports that are using the MPU. */
-#ifdef portUSING_MPU_WRAPPERS
-
- /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
- included from queue.c or task.c to prevent it from having an effect within
- those files. */
- #ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
- #define xTaskGenericCreate MPU_xTaskGenericCreate
- #define vTaskAllocateMPURegions MPU_vTaskAllocateMPURegions
- #define vTaskDelete MPU_vTaskDelete
- #define vTaskDelayUntil MPU_vTaskDelayUntil
- #define vTaskDelay MPU_vTaskDelay
- #define uxTaskPriorityGet MPU_uxTaskPriorityGet
- #define vTaskPrioritySet MPU_vTaskPrioritySet
- #define vTaskSuspend MPU_vTaskSuspend
- #define xTaskIsTaskSuspended MPU_xTaskIsTaskSuspended
- #define vTaskResume MPU_vTaskResume
- #define vTaskSuspendAll MPU_vTaskSuspendAll
- #define xTaskResumeAll MPU_xTaskResumeAll
- #define xTaskGetTickCount MPU_xTaskGetTickCount
- #define uxTaskGetNumberOfTasks MPU_uxTaskGetNumberOfTasks
- #define vTaskList MPU_vTaskList
- #define vTaskGetRunTimeStats MPU_vTaskGetRunTimeStats
- #define vTaskStartTrace MPU_vTaskStartTrace
- #define ulTaskEndTrace MPU_ulTaskEndTrace
- #define vTaskSetApplicationTaskTag MPU_vTaskSetApplicationTaskTag
- #define xTaskGetApplicationTaskTag MPU_xTaskGetApplicationTaskTag
- #define xTaskCallApplicationTaskHook MPU_xTaskCallApplicationTaskHook
- #define uxTaskGetStackHighWaterMark MPU_uxTaskGetStackHighWaterMark
- #define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle
- #define xTaskGetSchedulerState MPU_xTaskGetSchedulerState
-
- #define xQueueCreate MPU_xQueueCreate
- #define xQueueCreateMutex MPU_xQueueCreateMutex
- #define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive
- #define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive
- #define xQueueCreateCountingSemaphore MPU_xQueueCreateCountingSemaphore
- #define xQueueGenericSend MPU_xQueueGenericSend
- #define xQueueAltGenericSend MPU_xQueueAltGenericSend
- #define xQueueAltGenericReceive MPU_xQueueAltGenericReceive
- #define xQueueGenericReceive MPU_xQueueGenericReceive
- #define uxQueueMessagesWaiting MPU_uxQueueMessagesWaiting
- #define vQueueDelete MPU_vQueueDelete
-
- #define pvPortMalloc MPU_pvPortMalloc
- #define vPortFree MPU_vPortFree
- #define xPortGetFreeHeapSize MPU_xPortGetFreeHeapSize
- #define vPortInitialiseBlocks MPU_vPortInitialiseBlocks
-
- #if configQUEUE_REGISTRY_SIZE > 0
- #define vQueueAddToRegistry MPU_vQueueAddToRegistry
- #define vQueueUnregisterQueue MPU_vQueueUnregisterQueue
- #endif
-
- /* Remove the privileged function macro. */
- #define PRIVILEGED_FUNCTION
-
- #else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
-
- /* Ensure API functions go in the privileged execution section. */
- #define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions")))
- #define PRIVILEGED_DATA __attribute__((section("privileged_data")))
- //#define PRIVILEGED_DATA
-
- #endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
-
-#else /* portUSING_MPU_WRAPPERS */
-
- #define PRIVILEGED_FUNCTION
- #define PRIVILEGED_DATA
- #define portUSING_MPU_WRAPPERS 0
-
-#endif /* portUSING_MPU_WRAPPERS */
-
-
-#endif /* MPU_WRAPPERS_H */
-
+++ /dev/null
-/**
- * FreeRTOS library interface file.
- *
- * @file os.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __OS_H
-#define __OS_H
-
-#define FREERTOS_VERSION_NUMBER_MAYOR 7
-#define FREERTOS_VERSION_NUMBER_MINOR 0
-#define FREERTOS_VERSION_NUMBER_REV 2
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-#include "os/semphr.h"
-#include "os/queue.h"
-
-
-#endif /* __OS_H */
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-/*-----------------------------------------------------------
- * Portable layer API. Each function must be defined for each port.
- *----------------------------------------------------------*/
-
-#ifndef PORTABLE_H
-#define PORTABLE_H
-
-/* Include the macro file relevant to the port being used. */
-#include "os/portmacro.h"
-
-#if portBYTE_ALIGNMENT == 8
- #define portBYTE_ALIGNMENT_MASK ( 0x0007 )
-#endif
-
-#if portBYTE_ALIGNMENT == 4
- #define portBYTE_ALIGNMENT_MASK ( 0x0003 )
-#endif
-
-#if portBYTE_ALIGNMENT == 2
- #define portBYTE_ALIGNMENT_MASK ( 0x0001 )
-#endif
-
-#if portBYTE_ALIGNMENT == 1
- #define portBYTE_ALIGNMENT_MASK ( 0x0000 )
-#endif
-
-#ifndef portBYTE_ALIGNMENT_MASK
- #error "Invalid portBYTE_ALIGNMENT definition"
-#endif
-
-#ifndef portNUM_CONFIGURABLE_REGIONS
- #define portNUM_CONFIGURABLE_REGIONS 1
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "os/mpu_wrappers.h"
-
-/*
- * Setup the stack of a new task so it is ready to be placed under the
- * scheduler control. The registers have to be placed on the stack in
- * the order that the port expects to find them.
- *
- */
-#if( portUSING_MPU_WRAPPERS == 1 )
- portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged ) PRIVILEGED_FUNCTION;
-#else
- portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters );
-#endif
-
-/*
- * Map to the memory management routines required for the port.
- */
-void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
-void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
-void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
-size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Setup the hardware ready for the scheduler to take control. This generally
- * sets up a tick interrupt and sets timers for the correct tick frequency.
- */
-portBASE_TYPE xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
- * the hardware is left in its original condition after the scheduler stops
- * executing.
- */
-void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The structures and methods of manipulating the MPU are contained within the
- * port layer.
- *
- * Fills the xMPUSettings structure with the memory region information
- * contained in xRegions.
- */
-#if( portUSING_MPU_WRAPPERS == 1 )
- struct xMEMORY_REGION;
- void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth ) PRIVILEGED_FUNCTION;
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* PORTABLE_H */
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- FreeRTOS supports many tools and architectures. V7.0.0 is sponsored by:
- Atollic AB - Atollic provides professional embedded systems development
- tools for C/C++ development, code analysis and test automation.
- See http://www.atollic.com
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef __OS_PORTMACRO_H__
-#define __OS_PORTMACRO_H__
-
-
-/*----------------------------------------------------------------------------*/
-/* RTI Register Frame Definition */
-
-struct rti
-{
- unsigned GCTRL;
- unsigned TBCTRL;
- unsigned CAPCTRL;
- unsigned COMPCTRL;
- struct
- {
- unsigned FRCx;
- unsigned UCx;
- unsigned CPUCx;
- unsigned : 32;
- unsigned CAFRCx;
- unsigned CAUCx;
- unsigned : 32;
- unsigned : 32;
- } CNT[2U];
- struct
- {
- unsigned COMPx;
- unsigned UDCPx;
- } CMP[4U];
- unsigned TBLCOMP;
- unsigned TBHCOMP;
- unsigned : 32;
- unsigned : 32;
- unsigned SETINT;
- unsigned CLEARINT;
- unsigned INTFLAG;
- unsigned : 32;
- unsigned DWDCTRL;
- unsigned DWDPRLD;
- unsigned WDSTATUS;
- unsigned WDKEY;
- unsigned WDCNTR;
-};
-
-#define RTI ((volatile struct rti *)0xFFFFFC00U)
-
-/*----------------------------------------------------------------------------*/
-/* Type Definitions */
-
-#define portCHAR char
-#define portFLOAT float
-#define portDOUBLE double
-#define portLONG long
-#define portSHORT short
-#define portSTACK_TYPE unsigned long
-#define portBASE_TYPE long
-
-#if (configUSE_16_BIT_TICKS == 1)
- typedef unsigned portSHORT portTickType;
- #define portMAX_DELAY (portTickType) 0xFFFF
-#else
- typedef unsigned portLONG portTickType;
- #define portMAX_DELAY (portTickType) 0xFFFFFFFFF
-#endif
-
-
-/*----------------------------------------------------------------------------*/
-/* Architecture Definitions */
-
-#define portSTACK_GROWTH (-1)
-#define portTICK_RATE_MS ((portTickType) 1000 / configTICK_RATE_HZ)
-#define portBYTE_ALIGNMENT 8
-
-/*----------------------------------------------------------------------------*/
-/* External Functions */
-
-extern void vPortEnterCritical(void);
-extern void vPortExitCritical(void);
-
-/*----------------------------------------------------------------------------*/
-/* Functions Macros */
-
-#define portNOP() asm (" nop")
-#define portYIELD() _call_swi(0)
-#define portYIELD_FROM_ISR() vTaskSwitchContext()
-#define portENTER_CRITICAL() vPortEnterCritical()
-#define portEXIT_CRITICAL() vPortExitCritical()
-#define portDISABLE_INTERRUPTS() asm (" CPSID if")
-#define portENABLE_INTERRUPTS() asm (" CPSIE if")
-
-#define portTASK_FUNCTION(vFunction, pvParameters) void vFunction(void *pvParameters)
-#define portTASK_FUNCTION_PROTO(vFunction, pvParameters) void vFunction(void *pvParameters)
-
-#if (configGENERATE_RUN_TIME_STATS == 1)
-#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() \
-{ \
- RTI->GCTRL = 0x00000000U; \
- RTI->TBCTRL = 0x00000000U; \
- RTI->COMPCTRL = 0x00000000U; \
- RTI->CNT[1U].UCx = 0x00000000U; \
- RTI->CNT[1U].FRCx = 0x00000000U; \
- RTI->CNT[1U].CPUCx = (configCPU_CLOCK_HZ / 2 / configTICK_RATE_HZ) / 16; \
- RTI->CMP[1U].UDCPx = (configCPU_CLOCK_HZ / 2 / configTICK_RATE_HZ) / 16; \
- RTI->GCTRL = 0x00000002U; \
-}
-#define portGET_RUN_TIME_COUNTER_VALUE() (RTI->CNT[1].FRCx)
-#endif
-
-#endif
-
-/*----------------------------------------------------------------------------*/
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef PROJDEFS_H
-#define PROJDEFS_H
-
-/* Defines the prototype to which task functions must conform. */
-typedef void (*pdTASK_CODE)( void * );
-
-#define pdTRUE ( 1 )
-#define pdFALSE ( 0 )
-
-#define pdPASS ( 1 )
-#define pdFAIL ( 0 )
-#define errQUEUE_EMPTY ( 0 )
-#define errQUEUE_FULL ( 0 )
-
-/* Error definitions. */
-#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ( -1 )
-#define errNO_TASK_TO_RUN ( -2 )
-#define errQUEUE_BLOCKED ( -4 )
-#define errQUEUE_YIELD ( -5 )
-
-#endif /* PROJDEFS_H */
-
-
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-
-#ifndef QUEUE_H
-#define QUEUE_H
-
-#ifndef INC_FREERTOS_H
- #error "#include FreeRTOS.h" must appear in source files before "#include queue.h"
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#include "os/mpu_wrappers.h"
-
-/**
- * Type by which queues are referenced. For example, a call to xQueueCreate
- * returns (via a pointer parameter) an xQueueHandle variable that can then
- * be used as a parameter to xQueueSend(), xQueueReceive(), etc.
- */
-typedef void * xQueueHandle;
-
-
-/* For internal use only. */
-#define queueSEND_TO_BACK ( 0 )
-#define queueSEND_TO_FRONT ( 1 )
-
-
-/**
- * queue. h
- * <pre>
- xQueueHandle xQueueCreate(
- unsigned portBASE_TYPE uxQueueLength,
- unsigned portBASE_TYPE uxItemSize
- );
- * </pre>
- *
- * Creates a new queue instance. This allocates the storage required by the
- * new queue and returns a handle for the queue.
- *
- * @param uxQueueLength The maximum number of items that the queue can contain.
- *
- * @param uxItemSize The number of bytes each item in the queue will require.
- * Items are queued by copy, not by reference, so this is the number of bytes
- * that will be copied for each posted item. Each item on the queue must be
- * the same size.
- *
- * @return If the queue is successfully create then a handle to the newly
- * created queue is returned. If the queue cannot be created then 0 is
- * returned.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- };
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
-
- // Create a queue capable of containing 10 unsigned long values.
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
- if( xQueue1 == 0 )
- {
- // Queue was not created and must not be used.
- }
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
- if( xQueue2 == 0 )
- {
- // Queue was not created and must not be used.
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueCreate xQueueCreate
- * \ingroup QueueManagement
- */
-xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize );
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueSendToToFront(
- xQueueHandle xQueue,
- const void * pvItemToQueue,
- portTickType xTicksToWait
- );
- * </pre>
- *
- * This is a macro that calls xQueueGenericSend().
- *
- * Post an item to the front of a queue. The item is queued by copy, not by
- * reference. This function must not be called from an interrupt service
- * routine. See xQueueSendFromISR () for an alternative which may be used
- * in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full. The call will return immediately if this is set to 0 and the
- * queue is full. The time is defined in tick periods so the constant
- * portTICK_RATE_MS should be used to convert to real time if this is required.
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 unsigned long values.
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
- // ...
-
- if( xQueue1 != 0 )
- {
- // Send an unsigned long. Wait for 10 ticks for space to become
- // available if necessary.
- if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
- {
- // Failed to post the message, even after 10 ticks.
- }
- }
-
- if( xQueue2 != 0 )
- {
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueSendToBack(
- xQueueHandle xQueue,
- const void * pvItemToQueue,
- portTickType xTicksToWait
- );
- * </pre>
- *
- * This is a macro that calls xQueueGenericSend().
- *
- * Post an item to the back of a queue. The item is queued by copy, not by
- * reference. This function must not be called from an interrupt service
- * routine. See xQueueSendFromISR () for an alternative which may be used
- * in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full. The call will return immediately if this is set to 0 and the queue
- * is full. The time is defined in tick periods so the constant
- * portTICK_RATE_MS should be used to convert to real time if this is required.
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 unsigned long values.
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
- // ...
-
- if( xQueue1 != 0 )
- {
- // Send an unsigned long. Wait for 10 ticks for space to become
- // available if necessary.
- if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
- {
- // Failed to post the message, even after 10 ticks.
- }
- }
-
- if( xQueue2 != 0 )
- {
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueSend(
- xQueueHandle xQueue,
- const void * pvItemToQueue,
- portTickType xTicksToWait
- );
- * </pre>
- *
- * This is a macro that calls xQueueGenericSend(). It is included for
- * backward compatibility with versions of FreeRTOS.org that did not
- * include the xQueueSendToFront() and xQueueSendToBack() macros. It is
- * equivalent to xQueueSendToBack().
- *
- * Post an item on a queue. The item is queued by copy, not by reference.
- * This function must not be called from an interrupt service routine.
- * See xQueueSendFromISR () for an alternative which may be used in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full. The call will return immediately if this is set to 0 and the
- * queue is full. The time is defined in tick periods so the constant
- * portTICK_RATE_MS should be used to convert to real time if this is required.
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 unsigned long values.
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
- // ...
-
- if( xQueue1 != 0 )
- {
- // Send an unsigned long. Wait for 10 ticks for space to become
- // available if necessary.
- if( xQueueSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10 ) != pdPASS )
- {
- // Failed to post the message, even after 10 ticks.
- }
- }
-
- if( xQueue2 != 0 )
- {
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0 );
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
-
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueGenericSend(
- xQueueHandle xQueue,
- const void * pvItemToQueue,
- portTickType xTicksToWait
- portBASE_TYPE xCopyPosition
- );
- * </pre>
- *
- * It is preferred that the macros xQueueSend(), xQueueSendToFront() and
- * xQueueSendToBack() are used in place of calling this function directly.
- *
- * Post an item on a queue. The item is queued by copy, not by reference.
- * This function must not be called from an interrupt service routine.
- * See xQueueSendFromISR () for an alternative which may be used in an ISR.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for space to become available on the queue, should it already
- * be full. The call will return immediately if this is set to 0 and the
- * queue is full. The time is defined in tick periods so the constant
- * portTICK_RATE_MS should be used to convert to real time if this is required.
- *
- * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
- * item at the back of the queue, or queueSEND_TO_FRONT to place the item
- * at the front of the queue (for high priority messages).
- *
- * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- unsigned long ulVar = 10UL;
-
- void vATask( void *pvParameters )
- {
- xQueueHandle xQueue1, xQueue2;
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 unsigned long values.
- xQueue1 = xQueueCreate( 10, sizeof( unsigned long ) );
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
-
- // ...
-
- if( xQueue1 != 0 )
- {
- // Send an unsigned long. Wait for 10 ticks for space to become
- // available if necessary.
- if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( portTickType ) 10, queueSEND_TO_BACK ) != pdPASS )
- {
- // Failed to post the message, even after 10 ticks.
- }
- }
-
- if( xQueue2 != 0 )
- {
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( portTickType ) 0, queueSEND_TO_BACK );
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueSend xQueueSend
- * \ingroup QueueManagement
- */
-signed portBASE_TYPE xQueueGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueuePeek(
- xQueueHandle xQueue,
- void *pvBuffer,
- portTickType xTicksToWait
- );</pre>
- *
- * This is a macro that calls the xQueueGenericReceive() function.
- *
- * Receive an item from a queue without removing the item from the queue.
- * The item is received by copy so a buffer of adequate size must be
- * provided. The number of bytes copied into the buffer was defined when
- * the queue was created.
- *
- * Successfully received items remain on the queue so will be returned again
- * by the next call, or a call to xQueueReceive().
- *
- * This macro must not be used in an interrupt service routine.
- *
- * @param pxQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for an item to receive should the queue be empty at the time
- * of the call. The time is defined in tick periods so the constant
- * portTICK_RATE_MS should be used to convert to real time if this is required.
- * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
- * is empty.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
- if( xQueue == 0 )
- {
- // Failed to create the queue.
- }
-
- // ...
-
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
- // ... Rest of task code.
- }
-
- // Task to peek the data from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
- if( xQueue != 0 )
- {
- // Peek a message on the created queue. Block for 10 ticks if a
- // message is not immediately available.
- if( xQueuePeek( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
- {
- // pcRxedMessage now points to the struct AMessage variable posted
- // by vATask, but the item still remains on the queue.
- }
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueReceive xQueueReceive
- * \ingroup QueueManagement
- */
-#define xQueuePeek( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdTRUE )
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueReceive(
- xQueueHandle xQueue,
- void *pvBuffer,
- portTickType xTicksToWait
- );</pre>
- *
- * This is a macro that calls the xQueueGenericReceive() function.
- *
- * Receive an item from a queue. The item is received by copy so a buffer of
- * adequate size must be provided. The number of bytes copied into the buffer
- * was defined when the queue was created.
- *
- * Successfully received items are removed from the queue.
- *
- * This function must not be used in an interrupt service routine. See
- * xQueueReceiveFromISR for an alternative that can.
- *
- * @param pxQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for an item to receive should the queue be empty at the time
- * of the call. xQueueReceive() will return immediately if xTicksToWait
- * is zero and the queue is empty. The time is defined in tick periods so the
- * constant portTICK_RATE_MS should be used to convert to real time if this is
- * required.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
- if( xQueue == 0 )
- {
- // Failed to create the queue.
- }
-
- // ...
-
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
- // ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
- if( xQueue != 0 )
- {
- // Receive a message on the created queue. Block for 10 ticks if a
- // message is not immediately available.
- if( xQueueReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
- {
- // pcRxedMessage now points to the struct AMessage variable posted
- // by vATask.
- }
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueReceive xQueueReceive
- * \ingroup QueueManagement
- */
-#define xQueueReceive( xQueue, pvBuffer, xTicksToWait ) xQueueGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdFALSE )
-
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueGenericReceive(
- xQueueHandle xQueue,
- void *pvBuffer,
- portTickType xTicksToWait
- portBASE_TYPE xJustPeek
- );</pre>
- *
- * It is preferred that the macro xQueueReceive() be used rather than calling
- * this function directly.
- *
- * Receive an item from a queue. The item is received by copy so a buffer of
- * adequate size must be provided. The number of bytes copied into the buffer
- * was defined when the queue was created.
- *
- * This function must not be used in an interrupt service routine. See
- * xQueueReceiveFromISR for an alternative that can.
- *
- * @param pxQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param xTicksToWait The maximum amount of time the task should block
- * waiting for an item to receive should the queue be empty at the time
- * of the call. The time is defined in tick periods so the constant
- * portTICK_RATE_MS should be used to convert to real time if this is required.
- * xQueueGenericReceive() will return immediately if the queue is empty and
- * xTicksToWait is 0.
- *
- * @param xJustPeek When set to true, the item received from the queue is not
- * actually removed from the queue - meaning a subsequent call to
- * xQueueReceive() will return the same item. When set to false, the item
- * being received from the queue is also removed from the queue.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
- <pre>
- struct AMessage
- {
- char ucMessageID;
- char ucData[ 20 ];
- } xMessage;
-
- xQueueHandle xQueue;
-
- // Task to create a queue and post a value.
- void vATask( void *pvParameters )
- {
- struct AMessage *pxMessage;
-
- // Create a queue capable of containing 10 pointers to AMessage structures.
- // These should be passed by pointer as they contain a lot of data.
- xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
- if( xQueue == 0 )
- {
- // Failed to create the queue.
- }
-
- // ...
-
- // Send a pointer to a struct AMessage object. Don't block if the
- // queue is already full.
- pxMessage = & xMessage;
- xQueueSend( xQueue, ( void * ) &pxMessage, ( portTickType ) 0 );
-
- // ... Rest of task code.
- }
-
- // Task to receive from the queue.
- void vADifferentTask( void *pvParameters )
- {
- struct AMessage *pxRxedMessage;
-
- if( xQueue != 0 )
- {
- // Receive a message on the created queue. Block for 10 ticks if a
- // message is not immediately available.
- if( xQueueGenericReceive( xQueue, &( pxRxedMessage ), ( portTickType ) 10 ) )
- {
- // pcRxedMessage now points to the struct AMessage variable posted
- // by vATask.
- }
- }
-
- // ... Rest of task code.
- }
- </pre>
- * \defgroup xQueueReceive xQueueReceive
- * \ingroup QueueManagement
- */
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle xQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeek );
-
-/**
- * queue. h
- * <pre>unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue );</pre>
- *
- * Return the number of messages stored in a queue.
- *
- * @param xQueue A handle to the queue being queried.
- *
- * @return The number of messages available in the queue.
- *
- * \page uxQueueMessagesWaiting uxQueueMessagesWaiting
- * \ingroup QueueManagement
- */
-unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle xQueue );
-
-/**
- * queue. h
- * <pre>void vQueueDelete( xQueueHandle xQueue );</pre>
- *
- * Delete a queue - freeing all the memory allocated for storing of items
- * placed on the queue.
- *
- * @param xQueue A handle to the queue to be deleted.
- *
- * \page vQueueDelete vQueueDelete
- * \ingroup QueueManagement
- */
-void vQueueDelete( xQueueHandle pxQueue );
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueSendToFrontFromISR(
- xQueueHandle pxQueue,
- const void *pvItemToQueue,
- portBASE_TYPE *pxHigherPriorityTaskWoken
- );
- </pre>
- *
- * This is a macro that calls xQueueGenericSendFromISR().
- *
- * Post an item to the front of a queue. It is safe to use this macro from
- * within an interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR. In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task. If xQueueSendToFromFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
- <pre>
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPrioritTaskWoken;
-
- // We have not woken a task at the start of the ISR.
- xHigherPriorityTaskWoken = pdFALSE;
-
- // Loop until the buffer is empty.
- do
- {
- // Obtain a byte from the buffer.
- cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
- // Post the byte.
- xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
- } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
- // Now the buffer is empty we can switch context if necessary.
- if( xHigherPriorityTaskWoken )
- {
- taskYIELD ();
- }
- }
- </pre>
- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-#define xQueueSendToFrontFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
-
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueSendToBackFromISR(
- xQueueHandle pxQueue,
- const void *pvItemToQueue,
- portBASE_TYPE *pxHigherPriorityTaskWoken
- );
- </pre>
- *
- * This is a macro that calls xQueueGenericSendFromISR().
- *
- * Post an item to the back of a queue. It is safe to use this macro from
- * within an interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR. In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task. If xQueueSendToBackFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
- <pre>
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPriorityTaskWoken;
-
- // We have not woken a task at the start of the ISR.
- xHigherPriorityTaskWoken = pdFALSE;
-
- // Loop until the buffer is empty.
- do
- {
- // Obtain a byte from the buffer.
- cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
- // Post the byte.
- xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
- } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
- // Now the buffer is empty we can switch context if necessary.
- if( xHigherPriorityTaskWoken )
- {
- taskYIELD ();
- }
- }
- </pre>
- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-#define xQueueSendToBackFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueSendFromISR(
- xQueueHandle pxQueue,
- const void *pvItemToQueue,
- portBASE_TYPE *pxHigherPriorityTaskWoken
- );
- </pre>
- *
- * This is a macro that calls xQueueGenericSendFromISR(). It is included
- * for backward compatibility with versions of FreeRTOS.org that did not
- * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()
- * macros.
- *
- * Post an item to the back of a queue. It is safe to use this function from
- * within an interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR. In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task. If xQueueSendFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
- <pre>
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPriorityTaskWoken;
-
- // We have not woken a task at the start of the ISR.
- xHigherPriorityTaskWoken = pdFALSE;
-
- // Loop until the buffer is empty.
- do
- {
- // Obtain a byte from the buffer.
- cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
- // Post the byte.
- xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
-
- } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
- // Now the buffer is empty we can switch context if necessary.
- if( xHigherPriorityTaskWoken )
- {
- // Actual macro used here is port specific.
- taskYIELD_FROM_ISR ();
- }
- }
- </pre>
- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-#define xQueueSendFromISR( pxQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueGenericSendFromISR(
- xQueueHandle pxQueue,
- const void *pvItemToQueue,
- portBASE_TYPE *pxHigherPriorityTaskWoken,
- portBASE_TYPE xCopyPosition
- );
- </pre>
- *
- * It is preferred that the macros xQueueSendFromISR(),
- * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
- * of calling this function directly.
- *
- * Post an item on a queue. It is safe to use this function from within an
- * interrupt service routine.
- *
- * Items are queued by copy not reference so it is preferable to only
- * queue small items, especially when called from an ISR. In most cases
- * it would be preferable to store a pointer to the item being queued.
- *
- * @param xQueue The handle to the queue on which the item is to be posted.
- *
- * @param pvItemToQueue A pointer to the item that is to be placed on the
- * queue. The size of the items the queue will hold was defined when the
- * queue was created, so this many bytes will be copied from pvItemToQueue
- * into the queue storage area.
- *
- * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task. If xQueueGenericSendFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
- * item at the back of the queue, or queueSEND_TO_FRONT to place the item
- * at the front of the queue (for high priority messages).
- *
- * @return pdTRUE if the data was successfully sent to the queue, otherwise
- * errQUEUE_FULL.
- *
- * Example usage for buffered IO (where the ISR can obtain more than one value
- * per call):
- <pre>
- void vBufferISR( void )
- {
- char cIn;
- portBASE_TYPE xHigherPriorityTaskWokenByPost;
-
- // We have not woken a task at the start of the ISR.
- xHigherPriorityTaskWokenByPost = pdFALSE;
-
- // Loop until the buffer is empty.
- do
- {
- // Obtain a byte from the buffer.
- cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
-
- // Post each byte.
- xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
-
- } while( portINPUT_BYTE( BUFFER_COUNT ) );
-
- // Now the buffer is empty we can switch context if necessary. Note that the
- // name of the yield function required is port specific.
- if( xHigherPriorityTaskWokenByPost )
- {
- taskYIELD_YIELD_FROM_ISR();
- }
- }
- </pre>
- *
- * \defgroup xQueueSendFromISR xQueueSendFromISR
- * \ingroup QueueManagement
- */
-signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE *pxHigherPriorityTaskWoken, portBASE_TYPE xCopyPosition );
-
-/**
- * queue. h
- * <pre>
- portBASE_TYPE xQueueReceiveFromISR(
- xQueueHandle pxQueue,
- void *pvBuffer,
- portBASE_TYPE *pxTaskWoken
- );
- * </pre>
- *
- * Receive an item from a queue. It is safe to use this function from within an
- * interrupt service routine.
- *
- * @param pxQueue The handle to the queue from which the item is to be
- * received.
- *
- * @param pvBuffer Pointer to the buffer into which the received item will
- * be copied.
- *
- * @param pxTaskWoken A task may be blocked waiting for space to become
- * available on the queue. If xQueueReceiveFromISR causes such a task to
- * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
- * remain unchanged.
- *
- * @return pdTRUE if an item was successfully received from the queue,
- * otherwise pdFALSE.
- *
- * Example usage:
- <pre>
-
- xQueueHandle xQueue;
-
- // Function to create a queue and post some values.
- void vAFunction( void *pvParameters )
- {
- char cValueToPost;
- const portTickType xBlockTime = ( portTickType )0xff;
-
- // Create a queue capable of containing 10 characters.
- xQueue = xQueueCreate( 10, sizeof( char ) );
- if( xQueue == 0 )
- {
- // Failed to create the queue.
- }
-
- // ...
-
- // Post some characters that will be used within an ISR. If the queue
- // is full then this task will block for xBlockTime ticks.
- cValueToPost = 'a';
- xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
- cValueToPost = 'b';
- xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
-
- // ... keep posting characters ... this task may block when the queue
- // becomes full.
-
- cValueToPost = 'c';
- xQueueSend( xQueue, ( void * ) &cValueToPost, xBlockTime );
- }
-
- // ISR that outputs all the characters received on the queue.
- void vISR_Routine( void )
- {
- portBASE_TYPE xTaskWokenByReceive = pdFALSE;
- char cRxedChar;
-
- while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
- {
- // A character was received. Output the character now.
- vOutputCharacter( cRxedChar );
-
- // If removing the character from the queue woke the task that was
- // posting onto the queue cTaskWokenByReceive will have been set to
- // pdTRUE. No matter how many times this loop iterates only one
- // task will be woken.
- }
-
- if( cTaskWokenByPost != ( char ) pdFALSE;
- {
- taskYIELD ();
- }
- }
- </pre>
- * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
- * \ingroup QueueManagement
- */
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken );
-
-/*
- * Utilities to query queue that are safe to use from an ISR. These utilities
- * should be used only from witin an ISR, or within a critical section.
- */
-signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle pxQueue );
-signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle pxQueue );
-unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle pxQueue );
-
-
-/*
- * xQueueAltGenericSend() is an alternative version of xQueueGenericSend().
- * Likewise xQueueAltGenericReceive() is an alternative version of
- * xQueueGenericReceive().
- *
- * The source code that implements the alternative (Alt) API is much
- * simpler because it executes everything from within a critical section.
- * This is the approach taken by many other RTOSes, but FreeRTOS.org has the
- * preferred fully featured API too. The fully featured API has more
- * complex code that takes longer to execute, but makes much less use of
- * critical sections. Therefore the alternative API sacrifices interrupt
- * responsiveness to gain execution speed, whereas the fully featured API
- * sacrifices execution speed to ensure better interrupt responsiveness.
- */
-signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
-signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );
-#define xQueueAltSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
-#define xQueueAltSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueAltGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
-#define xQueueAltReceive( xQueue, pvBuffer, xTicksToWait ) xQueueAltGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdFALSE )
-#define xQueueAltPeek( xQueue, pvBuffer, xTicksToWait ) xQueueAltGenericReceive( ( xQueue ), ( pvBuffer ), ( xTicksToWait ), pdTRUE )
-
-/*
- * The functions defined above are for passing data to and from tasks. The
- * functions below are the equivalents for passing data to and from
- * co-routines.
- *
- * These functions are called from the co-routine macro implementation and
- * should not be called directly from application code. Instead use the macro
- * wrappers defined within croutine.h.
- */
-signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken );
-signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken );
-signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait );
-signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait );
-
-/*
- * For internal use only. Use xSemaphoreCreateMutex() or
- * xSemaphoreCreateCounting() instead of calling these functions directly.
- */
-xQueueHandle xQueueCreateMutex( void );
-xQueueHandle xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount );
-
-/*
- * For internal use only. Use xSemaphoreTakeMutexRecursive() or
- * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
- */
-portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle pxMutex, portTickType xBlockTime );
-portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle pxMutex );
-
-/*
- * The registry is provided as a means for kernel aware debuggers to
- * locate queues, semaphores and mutexes. Call vQueueAddToRegistry() add
- * a queue, semaphore or mutex handle to the registry if you want the handle
- * to be available to a kernel aware debugger. If you are not using a kernel
- * aware debugger then this function can be ignored.
- *
- * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the
- * registry can hold. configQUEUE_REGISTRY_SIZE must be greater than 0
- * within FreeRTOSConfig.h for the registry to be available. Its value
- * does not effect the number of queues, semaphores and mutexes that can be
- * created - just the number that the registry can hold.
- *
- * @param xQueue The handle of the queue being added to the registry. This
- * is the handle returned by a call to xQueueCreate(). Semaphore and mutex
- * handles can also be passed in here.
- *
- * @param pcName The name to be associated with the handle. This is the
- * name that the kernel aware debugger will display.
- */
-#if configQUEUE_REGISTRY_SIZE > 0U
- void vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName );
-#endif
-
-/* Not a public API function, hence the 'Restricted' in the name. */
-void vQueueWaitForMessageRestricted( xQueueHandle pxQueue, portTickType xTicksToWait );
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* QUEUE_H */
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#ifndef SEMAPHORE_H
-#define SEMAPHORE_H
-
-#ifndef INC_FREERTOS_H
- #error "#include FreeRTOS.h" must appear in source files before "#include semphr.h"
-#endif
-
-#include "os/queue.h"
-
-typedef xQueueHandle xSemaphoreHandle;
-
-#define semBINARY_SEMAPHORE_QUEUE_LENGTH ( ( unsigned char ) 1U )
-#define semSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned char ) 0U )
-#define semGIVE_BLOCK_TIME ( ( portTickType ) 0U )
-
-
-/**
- * semphr. h
- * <pre>vSemaphoreCreateBinary( xSemaphoreHandle xSemaphore )</pre>
- *
- * <i>Macro</i> that implements a semaphore by using the existing queue mechanism.
- * The queue length is 1 as this is a binary semaphore. The data size is 0
- * as we don't want to actually store any data - we just want to know if the
- * queue is empty or full.
- *
- * This type of semaphore can be used for pure synchronisation between tasks or
- * between an interrupt and a task. The semaphore need not be given back once
- * obtained, so one task/interrupt can continuously 'give' the semaphore while
- * another continuously 'takes' the semaphore. For this reason this type of
- * semaphore does not use a priority inheritance mechanism. For an alternative
- * that does use priority inheritance see xSemaphoreCreateMutex().
- *
- * @param xSemaphore Handle to the created semaphore. Should be of type xSemaphoreHandle.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
- // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
- // This is a macro so pass the variable in directly.
- vSemaphoreCreateBinary( xSemaphore );
-
- if( xSemaphore != NULL )
- {
- // The semaphore was created successfully.
- // The semaphore can now be used.
- }
- }
- </pre>
- * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
- * \ingroup Semaphores
- */
-#define vSemaphoreCreateBinary( xSemaphore ) { \
- ( xSemaphore ) = xQueueCreate( ( unsigned portBASE_TYPE ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH ); \
- if( ( xSemaphore ) != NULL ) \
- { \
- xSemaphoreGive( ( xSemaphore ) ); \
- } \
- }
-
-/**
- * semphr. h
- * <pre>xSemaphoreTake(
- * xSemaphoreHandle xSemaphore,
- * portTickType xBlockTime
- * )</pre>
- *
- * <i>Macro</i> to obtain a semaphore. The semaphore must have previously been
- * created with a call to vSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
- * xSemaphoreCreateCounting().
- *
- * @param xSemaphore A handle to the semaphore being taken - obtained when
- * the semaphore was created.
- *
- * @param xBlockTime The time in ticks to wait for the semaphore to become
- * available. The macro portTICK_RATE_MS can be used to convert this to a
- * real time. A block time of zero can be used to poll the semaphore. A block
- * time of portMAX_DELAY can be used to block indefinitely (provided
- * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h).
- *
- * @return pdTRUE if the semaphore was obtained. pdFALSE
- * if xBlockTime expired without the semaphore becoming available.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xSemaphore = NULL;
-
- // A task that creates a semaphore.
- void vATask( void * pvParameters )
- {
- // Create the semaphore to guard a shared resource.
- vSemaphoreCreateBinary( xSemaphore );
- }
-
- // A task that uses the semaphore.
- void vAnotherTask( void * pvParameters )
- {
- // ... Do other things.
-
- if( xSemaphore != NULL )
- {
- // See if we can obtain the semaphore. If the semaphore is not available
- // wait 10 ticks to see if it becomes free.
- if( xSemaphoreTake( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
- {
- // We were able to obtain the semaphore and can now access the
- // shared resource.
-
- // ...
-
- // We have finished accessing the shared resource. Release the
- // semaphore.
- xSemaphoreGive( xSemaphore );
- }
- else
- {
- // We could not obtain the semaphore and can therefore not access
- // the shared resource safely.
- }
- }
- }
- </pre>
- * \defgroup xSemaphoreTake xSemaphoreTake
- * \ingroup Semaphores
- */
-#define xSemaphoreTake( xSemaphore, xBlockTime ) xQueueGenericReceive( ( xQueueHandle ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE )
-
-/**
- * semphr. h
- * xSemaphoreTakeRecursive(
- * xSemaphoreHandle xMutex,
- * portTickType xBlockTime
- * )
- *
- * <i>Macro</i> to recursively obtain, or 'take', a mutex type semaphore.
- * The mutex must have previously been created using a call to
- * xSemaphoreCreateRecursiveMutex();
- *
- * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
- * macro to be available.
- *
- * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
- *
- * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
- * doesn't become available again until the owner has called
- * xSemaphoreGiveRecursive() for each successful 'take' request. For example,
- * if a task successfully 'takes' the same mutex 5 times then the mutex will
- * not be available to any other task until it has also 'given' the mutex back
- * exactly five times.
- *
- * @param xMutex A handle to the mutex being obtained. This is the
- * handle returned by xSemaphoreCreateRecursiveMutex();
- *
- * @param xBlockTime The time in ticks to wait for the semaphore to become
- * available. The macro portTICK_RATE_MS can be used to convert this to a
- * real time. A block time of zero can be used to poll the semaphore. If
- * the task already owns the semaphore then xSemaphoreTakeRecursive() will
- * return immediately no matter what the value of xBlockTime.
- *
- * @return pdTRUE if the semaphore was obtained. pdFALSE if xBlockTime
- * expired without the semaphore becoming available.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
- // Create the mutex to guard a shared resource.
- xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
- // ... Do other things.
-
- if( xMutex != NULL )
- {
- // See if we can obtain the mutex. If the mutex is not available
- // wait 10 ticks to see if it becomes free.
- if( xSemaphoreTakeRecursive( xSemaphore, ( portTickType ) 10 ) == pdTRUE )
- {
- // We were able to obtain the mutex and can now access the
- // shared resource.
-
- // ...
- // For some reason due to the nature of the code further calls to
- // xSemaphoreTakeRecursive() are made on the same mutex. In real
- // code these would not be just sequential calls as this would make
- // no sense. Instead the calls are likely to be buried inside
- // a more complex call structure.
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
-
- // The mutex has now been 'taken' three times, so will not be
- // available to another task until it has also been given back
- // three times. Again it is unlikely that real code would have
- // these calls sequentially, but instead buried in a more complex
- // call structure. This is just for illustrative purposes.
- xSemaphoreGiveRecursive( xMutex );
- xSemaphoreGiveRecursive( xMutex );
- xSemaphoreGiveRecursive( xMutex );
-
- // Now the mutex can be taken by other tasks.
- }
- else
- {
- // We could not obtain the mutex and can therefore not access
- // the shared resource safely.
- }
- }
- }
- </pre>
- * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
- * \ingroup Semaphores
- */
-#define xSemaphoreTakeRecursive( xMutex, xBlockTime ) xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )
-
-
-/*
- * xSemaphoreAltTake() is an alternative version of xSemaphoreTake().
- *
- * The source code that implements the alternative (Alt) API is much
- * simpler because it executes everything from within a critical section.
- * This is the approach taken by many other RTOSes, but FreeRTOS.org has the
- * preferred fully featured API too. The fully featured API has more
- * complex code that takes longer to execute, but makes much less use of
- * critical sections. Therefore the alternative API sacrifices interrupt
- * responsiveness to gain execution speed, whereas the fully featured API
- * sacrifices execution speed to ensure better interrupt responsiveness.
- */
-#define xSemaphoreAltTake( xSemaphore, xBlockTime ) xQueueAltGenericReceive( ( xQueueHandle ) ( xSemaphore ), NULL, ( xBlockTime ), pdFALSE )
-
-/**
- * semphr. h
- * <pre>xSemaphoreGive( xSemaphoreHandle xSemaphore )</pre>
- *
- * <i>Macro</i> to release a semaphore. The semaphore must have previously been
- * created with a call to vSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
- * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake().
- *
- * This macro must not be used from an ISR. See xSemaphoreGiveFromISR () for
- * an alternative which can be used from an ISR.
- *
- * This macro must also not be used on semaphores created using
- * xSemaphoreCreateRecursiveMutex().
- *
- * @param xSemaphore A handle to the semaphore being released. This is the
- * handle returned when the semaphore was created.
- *
- * @return pdTRUE if the semaphore was released. pdFALSE if an error occurred.
- * Semaphores are implemented using queues. An error can occur if there is
- * no space on the queue to post a message - indicating that the
- * semaphore was not first obtained correctly.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xSemaphore = NULL;
-
- void vATask( void * pvParameters )
- {
- // Create the semaphore to guard a shared resource.
- vSemaphoreCreateBinary( xSemaphore );
-
- if( xSemaphore != NULL )
- {
- if( xSemaphoreGive( xSemaphore ) != pdTRUE )
- {
- // We would expect this call to fail because we cannot give
- // a semaphore without first "taking" it!
- }
-
- // Obtain the semaphore - don't block if the semaphore is not
- // immediately available.
- if( xSemaphoreTake( xSemaphore, ( portTickType ) 0 ) )
- {
- // We now have the semaphore and can access the shared resource.
-
- // ...
-
- // We have finished accessing the shared resource so can free the
- // semaphore.
- if( xSemaphoreGive( xSemaphore ) != pdTRUE )
- {
- // We would not expect this call to fail because we must have
- // obtained the semaphore to get here.
- }
- }
- }
- }
- </pre>
- * \defgroup xSemaphoreGive xSemaphoreGive
- * \ingroup Semaphores
- */
-#define xSemaphoreGive( xSemaphore ) xQueueGenericSend( ( xQueueHandle ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
-
-/**
- * semphr. h
- * <pre>xSemaphoreGiveRecursive( xSemaphoreHandle xMutex )</pre>
- *
- * <i>Macro</i> to recursively release, or 'give', a mutex type semaphore.
- * The mutex must have previously been created using a call to
- * xSemaphoreCreateRecursiveMutex();
- *
- * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
- * macro to be available.
- *
- * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
- *
- * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
- * doesn't become available again until the owner has called
- * xSemaphoreGiveRecursive() for each successful 'take' request. For example,
- * if a task successfully 'takes' the same mutex 5 times then the mutex will
- * not be available to any other task until it has also 'given' the mutex back
- * exactly five times.
- *
- * @param xMutex A handle to the mutex being released, or 'given'. This is the
- * handle returned by xSemaphoreCreateMutex();
- *
- * @return pdTRUE if the semaphore was given.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xMutex = NULL;
-
- // A task that creates a mutex.
- void vATask( void * pvParameters )
- {
- // Create the mutex to guard a shared resource.
- xMutex = xSemaphoreCreateRecursiveMutex();
- }
-
- // A task that uses the mutex.
- void vAnotherTask( void * pvParameters )
- {
- // ... Do other things.
-
- if( xMutex != NULL )
- {
- // See if we can obtain the mutex. If the mutex is not available
- // wait 10 ticks to see if it becomes free.
- if( xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 ) == pdTRUE )
- {
- // We were able to obtain the mutex and can now access the
- // shared resource.
-
- // ...
- // For some reason due to the nature of the code further calls to
- // xSemaphoreTakeRecursive() are made on the same mutex. In real
- // code these would not be just sequential calls as this would make
- // no sense. Instead the calls are likely to be buried inside
- // a more complex call structure.
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
- xSemaphoreTakeRecursive( xMutex, ( portTickType ) 10 );
-
- // The mutex has now been 'taken' three times, so will not be
- // available to another task until it has also been given back
- // three times. Again it is unlikely that real code would have
- // these calls sequentially, it would be more likely that the calls
- // to xSemaphoreGiveRecursive() would be called as a call stack
- // unwound. This is just for demonstrative purposes.
- xSemaphoreGiveRecursive( xMutex );
- xSemaphoreGiveRecursive( xMutex );
- xSemaphoreGiveRecursive( xMutex );
-
- // Now the mutex can be taken by other tasks.
- }
- else
- {
- // We could not obtain the mutex and can therefore not access
- // the shared resource safely.
- }
- }
- }
- </pre>
- * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
- * \ingroup Semaphores
- */
-#define xSemaphoreGiveRecursive( xMutex ) xQueueGiveMutexRecursive( ( xMutex ) )
-
-/*
- * xSemaphoreAltGive() is an alternative version of xSemaphoreGive().
- *
- * The source code that implements the alternative (Alt) API is much
- * simpler because it executes everything from within a critical section.
- * This is the approach taken by many other RTOSes, but FreeRTOS.org has the
- * preferred fully featured API too. The fully featured API has more
- * complex code that takes longer to execute, but makes much less use of
- * critical sections. Therefore the alternative API sacrifices interrupt
- * responsiveness to gain execution speed, whereas the fully featured API
- * sacrifices execution speed to ensure better interrupt responsiveness.
- */
-#define xSemaphoreAltGive( xSemaphore ) xQueueAltGenericSend( ( xQueueHandle ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
-
-/**
- * semphr. h
- * <pre>
- xSemaphoreGiveFromISR(
- xSemaphoreHandle xSemaphore,
- signed portBASE_TYPE *pxHigherPriorityTaskWoken
- )</pre>
- *
- * <i>Macro</i> to release a semaphore. The semaphore must have previously been
- * created with a call to vSemaphoreCreateBinary() or xSemaphoreCreateCounting().
- *
- * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
- * must not be used with this macro.
- *
- * This macro can be used from an ISR.
- *
- * @param xSemaphore A handle to the semaphore being released. This is the
- * handle returned when the semaphore was created.
- *
- * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set
- * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task
- * to unblock, and the unblocked task has a priority higher than the currently
- * running task. If xSemaphoreGiveFromISR() sets this value to pdTRUE then
- * a context switch should be requested before the interrupt is exited.
- *
- * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.
- *
- * Example usage:
- <pre>
- \#define LONG_TIME 0xffff
- \#define TICKS_TO_WAIT 10
- xSemaphoreHandle xSemaphore = NULL;
-
- // Repetitive task.
- void vATask( void * pvParameters )
- {
- for( ;; )
- {
- // We want this task to run every 10 ticks of a timer. The semaphore
- // was created before this task was started.
-
- // Block waiting for the semaphore to become available.
- if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
- {
- // It is time to execute.
-
- // ...
-
- // We have finished our task. Return to the top of the loop where
- // we will block on the semaphore until it is time to execute
- // again. Note when using the semaphore for synchronisation with an
- // ISR in this manner there is no need to 'give' the semaphore back.
- }
- }
- }
-
- // Timer ISR
- void vTimerISR( void * pvParameters )
- {
- static unsigned char ucLocalTickCount = 0;
- static signed portBASE_TYPE xHigherPriorityTaskWoken;
-
- // A timer tick has occurred.
-
- // ... Do other time functions.
-
- // Is it time for vATask () to run?
- xHigherPriorityTaskWoken = pdFALSE;
- ucLocalTickCount++;
- if( ucLocalTickCount >= TICKS_TO_WAIT )
- {
- // Unblock the task by releasing the semaphore.
- xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
-
- // Reset the count so we release the semaphore again in 10 ticks time.
- ucLocalTickCount = 0;
- }
-
- if( xHigherPriorityTaskWoken != pdFALSE )
- {
- // We can force a context switch here. Context switching from an
- // ISR uses port specific syntax. Check the demo task for your port
- // to find the syntax required.
- }
- }
- </pre>
- * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
- * \ingroup Semaphores
- */
-#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueueHandle ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
-
-/**
- * semphr. h
- * <pre>xSemaphoreHandle xSemaphoreCreateMutex( void )</pre>
- *
- * <i>Macro</i> that implements a mutex semaphore by using the existing queue
- * mechanism.
- *
- * Mutexes created using this macro can be accessed using the xSemaphoreTake()
- * and xSemaphoreGive() macros. The xSemaphoreTakeRecursive() and
- * xSemaphoreGiveRecursive() macros should not be used.
- *
- * This type of semaphore uses a priority inheritance mechanism so a task
- * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
- * semaphore it is no longer required.
- *
- * Mutex type semaphores cannot be used from within interrupt service routines.
- *
- * See vSemaphoreCreateBinary() for an alternative implementation that can be
- * used for pure synchronisation (where one task or interrupt always 'gives' the
- * semaphore and another always 'takes' the semaphore) and from within interrupt
- * service routines.
- *
- * @return xSemaphore Handle to the created mutex semaphore. Should be of type
- * xSemaphoreHandle.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
- // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
- // This is a macro so pass the variable in directly.
- xSemaphore = xSemaphoreCreateMutex();
-
- if( xSemaphore != NULL )
- {
- // The semaphore was created successfully.
- // The semaphore can now be used.
- }
- }
- </pre>
- * \defgroup vSemaphoreCreateMutex vSemaphoreCreateMutex
- * \ingroup Semaphores
- */
-#define xSemaphoreCreateMutex() xQueueCreateMutex()
-
-
-/**
- * semphr. h
- * <pre>xSemaphoreHandle xSemaphoreCreateRecursiveMutex( void )</pre>
- *
- * <i>Macro</i> that implements a recursive mutex by using the existing queue
- * mechanism.
- *
- * Mutexes created using this macro can be accessed using the
- * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros. The
- * xSemaphoreTake() and xSemaphoreGive() macros should not be used.
- *
- * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
- * doesn't become available again until the owner has called
- * xSemaphoreGiveRecursive() for each successful 'take' request. For example,
- * if a task successfully 'takes' the same mutex 5 times then the mutex will
- * not be available to any other task until it has also 'given' the mutex back
- * exactly five times.
- *
- * This type of semaphore uses a priority inheritance mechanism so a task
- * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
- * semaphore it is no longer required.
- *
- * Mutex type semaphores cannot be used from within interrupt service routines.
- *
- * See vSemaphoreCreateBinary() for an alternative implementation that can be
- * used for pure synchronisation (where one task or interrupt always 'gives' the
- * semaphore and another always 'takes' the semaphore) and from within interrupt
- * service routines.
- *
- * @return xSemaphore Handle to the created mutex semaphore. Should be of type
- * xSemaphoreHandle.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
- // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
- // This is a macro so pass the variable in directly.
- xSemaphore = xSemaphoreCreateRecursiveMutex();
-
- if( xSemaphore != NULL )
- {
- // The semaphore was created successfully.
- // The semaphore can now be used.
- }
- }
- </pre>
- * \defgroup vSemaphoreCreateMutex vSemaphoreCreateMutex
- * \ingroup Semaphores
- */
-#define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex()
-
-/**
- * semphr. h
- * <pre>xSemaphoreHandle xSemaphoreCreateCounting( unsigned portBASE_TYPE uxMaxCount, unsigned portBASE_TYPE uxInitialCount )</pre>
- *
- * <i>Macro</i> that creates a counting semaphore by using the existing
- * queue mechanism.
- *
- * Counting semaphores are typically used for two things:
- *
- * 1) Counting events.
- *
- * In this usage scenario an event handler will 'give' a semaphore each time
- * an event occurs (incrementing the semaphore count value), and a handler
- * task will 'take' a semaphore each time it processes an event
- * (decrementing the semaphore count value). The count value is therefore
- * the difference between the number of events that have occurred and the
- * number that have been processed. In this case it is desirable for the
- * initial count value to be zero.
- *
- * 2) Resource management.
- *
- * In this usage scenario the count value indicates the number of resources
- * available. To obtain control of a resource a task must first obtain a
- * semaphore - decrementing the semaphore count value. When the count value
- * reaches zero there are no free resources. When a task finishes with the
- * resource it 'gives' the semaphore back - incrementing the semaphore count
- * value. In this case it is desirable for the initial count value to be
- * equal to the maximum count value, indicating that all resources are free.
- *
- * @param uxMaxCount The maximum count value that can be reached. When the
- * semaphore reaches this value it can no longer be 'given'.
- *
- * @param uxInitialCount The count value assigned to the semaphore when it is
- * created.
- *
- * @return Handle to the created semaphore. Null if the semaphore could not be
- * created.
- *
- * Example usage:
- <pre>
- xSemaphoreHandle xSemaphore;
-
- void vATask( void * pvParameters )
- {
- xSemaphoreHandle xSemaphore = NULL;
-
- // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
- // The max value to which the semaphore can count should be 10, and the
- // initial value assigned to the count should be 0.
- xSemaphore = xSemaphoreCreateCounting( 10, 0 );
-
- if( xSemaphore != NULL )
- {
- // The semaphore was created successfully.
- // The semaphore can now be used.
- }
- }
- </pre>
- * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
- * \ingroup Semaphores
- */
-#define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )
-
-/**
- * semphr. h
- * <pre>void vSemaphoreDelete( xSemaphoreHandle xSemaphore );</pre>
- *
- * Delete a semaphore. This function must be used with care. For example,
- * do not delete a mutex type semaphore if the mutex is held by a task.
- *
- * @param xSemaphore A handle to the semaphore to be deleted.
- *
- * \page vSemaphoreDelete vSemaphoreDelete
- * \ingroup Semaphores
- */
-#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( xQueueHandle ) xSemaphore )
-
-#endif /* SEMAPHORE_H */
-
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-
-#ifndef TASK_H
-#define TASK_H
-
-#ifndef INC_FREERTOS_H
- #error "include FreeRTOS.h must appear in source files before include task.h"
-#endif
-
-#include "os/portable.h"
-#include "os/list.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*-----------------------------------------------------------
- * MACROS AND DEFINITIONS
- *----------------------------------------------------------*/
-
-#define tskKERNEL_VERSION_NUMBER "V7.0.2"
-
-/**
- * task. h
- *
- * Type by which tasks are referenced. For example, a call to xTaskCreate
- * returns (via a pointer parameter) an xTaskHandle variable that can then
- * be used as a parameter to vTaskDelete to delete the task.
- *
- * \page xTaskHandle xTaskHandle
- * \ingroup Tasks
- */
-typedef void * xTaskHandle;
-
-/*
- * Used internally only.
- */
-typedef struct xTIME_OUT
-{
- portBASE_TYPE xOverflowCount;
- portTickType xTimeOnEntering;
-} xTimeOutType;
-
-/*
- * Defines the memory ranges allocated to the task when an MPU is used.
- */
-typedef struct xMEMORY_REGION
-{
- void *pvBaseAddress;
- unsigned long ulLengthInBytes;
- unsigned long ulParameters;
-} xMemoryRegion;
-
-/*
- * Parameters required to create an MPU protected task.
- */
-typedef struct xTASK_PARAMTERS
-{
- pdTASK_CODE pvTaskCode;
- const signed char * const pcName;
- unsigned short usStackDepth;
- void *pvParameters;
- unsigned portBASE_TYPE uxPriority;
- portSTACK_TYPE *puxStackBuffer;
- xMemoryRegion xRegions[ portNUM_CONFIGURABLE_REGIONS ];
-} xTaskParameters;
-
-/*
- * Defines the priority used by the idle task. This must not be modified.
- *
- * \ingroup TaskUtils
- */
-#define tskIDLE_PRIORITY ( ( unsigned portBASE_TYPE ) 0U )
-
-/**
- * task. h
- *
- * Macro for forcing a context switch.
- *
- * \page taskYIELD taskYIELD
- * \ingroup SchedulerControl
- */
-#define taskYIELD() portYIELD()
-
-/**
- * task. h
- *
- * Macro to mark the start of a critical code region. Preemptive context
- * switches cannot occur when in a critical region.
- *
- * NOTE: This may alter the stack (depending on the portable implementation)
- * so must be used with care!
- *
- * \page taskENTER_CRITICAL taskENTER_CRITICAL
- * \ingroup SchedulerControl
- */
-#define taskENTER_CRITICAL() portENTER_CRITICAL()
-
-/**
- * task. h
- *
- * Macro to mark the end of a critical code region. Preemptive context
- * switches cannot occur when in a critical region.
- *
- * NOTE: This may alter the stack (depending on the portable implementation)
- * so must be used with care!
- *
- * \page taskEXIT_CRITICAL taskEXIT_CRITICAL
- * \ingroup SchedulerControl
- */
-#define taskEXIT_CRITICAL() portEXIT_CRITICAL()
-
-/**
- * task. h
- *
- * Macro to disable all maskable interrupts.
- *
- * \page taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
- * \ingroup SchedulerControl
- */
-#define taskDISABLE_INTERRUPTS() portDISABLE_INTERRUPTS()
-
-/**
- * task. h
- *
- * Macro to enable microcontroller interrupts.
- *
- * \page taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
- * \ingroup SchedulerControl
- */
-#define taskENABLE_INTERRUPTS() portENABLE_INTERRUPTS()
-
-/* Definitions returned by xTaskGetSchedulerState(). */
-#define taskSCHEDULER_NOT_STARTED 0
-#define taskSCHEDULER_RUNNING 1
-#define taskSCHEDULER_SUSPENDED 2
-
-/*-----------------------------------------------------------
- * TASK CREATION API
- *----------------------------------------------------------*/
-
-/**
- * task. h
- *<pre>
- portBASE_TYPE xTaskCreate(
- pdTASK_CODE pvTaskCode,
- const char * const pcName,
- unsigned short usStackDepth,
- void *pvParameters,
- unsigned portBASE_TYPE uxPriority,
- xTaskHandle *pvCreatedTask
- );</pre>
- *
- * Create a new task and add it to the list of tasks that are ready to run.
- *
- * xTaskCreate() can only be used to create a task that has unrestricted
- * access to the entire microcontroller memory map. Systems that include MPU
- * support can alternatively create an MPU constrained task using
- * xTaskCreateRestricted().
- *
- * @param pvTaskCode Pointer to the task entry function. Tasks
- * must be implemented to never return (i.e. continuous loop).
- *
- * @param pcName A descriptive name for the task. This is mainly used to
- * facilitate debugging. Max length defined by tskMAX_TASK_NAME_LEN - default
- * is 16.
- *
- * @param usStackDepth The size of the task stack specified as the number of
- * variables the stack can hold - not the number of bytes. For example, if
- * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes
- * will be allocated for stack storage.
- *
- * @param pvParameters Pointer that will be used as the parameter for the task
- * being created.
- *
- * @param uxPriority The priority at which the task should run. Systems that
- * include MPU support can optionally create tasks in a privileged (system)
- * mode by setting bit portPRIVILEGE_BIT of the priority parameter. For
- * example, to create a privileged task at priority 2 the uxPriority parameter
- * should be set to ( 2 | portPRIVILEGE_BIT ).
- *
- * @param pvCreatedTask Used to pass back a handle by which the created task
- * can be referenced.
- *
- * @return pdPASS if the task was successfully created and added to a ready
- * list, otherwise an error code defined in the file errors. h
- *
- * Example usage:
- <pre>
- // Task to be created.
- void vTaskCode( void * pvParameters )
- {
- for( ;; )
- {
- // Task code goes here.
- }
- }
-
- // Function that creates a task.
- void vOtherFunction( void )
- {
- static unsigned char ucParameterToPass;
- xTaskHandle xHandle;
-
- // Create the task, storing the handle. Note that the passed parameter ucParameterToPass
- // must exist for the lifetime of the task, so in this case is declared static. If it was just an
- // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
- // the new task attempts to access it.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
-
- // Use the handle to delete the task.
- vTaskDelete( xHandle );
- }
- </pre>
- * \defgroup xTaskCreate xTaskCreate
- * \ingroup Tasks
- */
-#define xTaskCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask ) xTaskGenericCreate( ( pvTaskCode ), ( pcName ), ( usStackDepth ), ( pvParameters ), ( uxPriority ), ( pxCreatedTask ), ( NULL ), ( NULL ) )
-
-/**
- * task. h
- *<pre>
- portBASE_TYPE xTaskCreateRestricted( xTaskParameters *pxTaskDefinition, xTaskHandle *pxCreatedTask );</pre>
- *
- * xTaskCreateRestricted() should only be used in systems that include an MPU
- * implementation.
- *
- * Create a new task and add it to the list of tasks that are ready to run.
- * The function parameters define the memory regions and associated access
- * permissions allocated to the task.
- *
- * @param pxTaskDefinition Pointer to a structure that contains a member
- * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
- * documentation) plus an optional stack buffer and the memory region
- * definitions.
- *
- * @param pxCreatedTask Used to pass back a handle by which the created task
- * can be referenced.
- *
- * @return pdPASS if the task was successfully created and added to a ready
- * list, otherwise an error code defined in the file errors. h
- *
- * Example usage:
- <pre>
-// Create an xTaskParameters structure that defines the task to be created.
-static const xTaskParameters xCheckTaskParameters =
-{
- vATask, // pvTaskCode - the function that implements the task.
- "ATask", // pcName - just a text name for the task to assist debugging.
- 100, // usStackDepth - the stack size DEFINED IN WORDS.
- NULL, // pvParameters - passed into the task function as the function parameters.
- ( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
- cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
-
- // xRegions - Allocate up to three separate memory regions for access by
- // the task, with appropriate access permissions. Different processors have
- // different memory alignment requirements - refer to the FreeRTOS documentation
- // for full information.
- {
- // Base address Length Parameters
- { cReadWriteArray, 32, portMPU_REGION_READ_WRITE },
- { cReadOnlyArray, 32, portMPU_REGION_READ_ONLY },
- { cPrivilegedOnlyAccessArray, 128, portMPU_REGION_PRIVILEGED_READ_WRITE }
- }
-};
-
-int main( void )
-{
-xTaskHandle xHandle;
-
- // Create a task from the const structure defined above. The task handle
- // is requested (the second parameter is not NULL) but in this case just for
- // demonstration purposes as its not actually used.
- xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
-
- // Start the scheduler.
- vTaskStartScheduler();
-
- // Will only get here if there was insufficient memory to create the idle
- // task.
- for( ;; );
-}
- </pre>
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted
- * \ingroup Tasks
- */
-#define xTaskCreateRestricted( x, pxCreatedTask ) xTaskGenericCreate( ((x)->pvTaskCode), ((x)->pcName), ((x)->usStackDepth), ((x)->pvParameters), ((x)->uxPriority), (pxCreatedTask), ((x)->puxStackBuffer), ((x)->xRegions) )
-
-/**
- * task. h
- *<pre>
- void vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const pxRegions );</pre>
- *
- * Memory regions are assigned to a restricted task when the task is created by
- * a call to xTaskCreateRestricted(). These regions can be redefined using
- * vTaskAllocateMPURegions().
- *
- * @param xTask The handle of the task being updated.
- *
- * @param xRegions A pointer to an xMemoryRegion structure that contains the
- * new memory region definitions.
- *
- * Example usage:
- <pre>
-// Define an array of xMemoryRegion structures that configures an MPU region
-// allowing read/write access for 1024 bytes starting at the beginning of the
-// ucOneKByte array. The other two of the maximum 3 definable regions are
-// unused so set to zero.
-static const xMemoryRegion xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
-{
- // Base address Length Parameters
- { ucOneKByte, 1024, portMPU_REGION_READ_WRITE },
- { 0, 0, 0 },
- { 0, 0, 0 }
-};
-
-void vATask( void *pvParameters )
-{
- // This task was created such that it has access to certain regions of
- // memory as defined by the MPU configuration. At some point it is
- // desired that these MPU regions are replaced with that defined in the
- // xAltRegions const struct above. Use a call to vTaskAllocateMPURegions()
- // for this purpose. NULL is used as the task handle to indicate that this
- // function should modify the MPU regions of the calling task.
- vTaskAllocateMPURegions( NULL, xAltRegions );
-
- // Now the task can continue its function, but from this point on can only
- // access its stack and the ucOneKByte array (unless any other statically
- // defined or shared regions have been declared elsewhere).
-}
- </pre>
- * \defgroup xTaskCreateRestricted xTaskCreateRestricted
- * \ingroup Tasks
- */
-void vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const pxRegions ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskDelete( xTaskHandle pxTask );</pre>
- *
- * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Remove a task from the RTOS real time kernels management. The task being
- * deleted will be removed from all ready, blocked, suspended and event lists.
- *
- * NOTE: The idle task is responsible for freeing the kernel allocated
- * memory from tasks that have been deleted. It is therefore important that
- * the idle task is not starved of microcontroller processing time if your
- * application makes any calls to vTaskDelete (). Memory allocated by the
- * task code is not automatically freed, and should be freed before the task
- * is deleted.
- *
- * See the demo application file death.c for sample code that utilises
- * vTaskDelete ().
- *
- * @param pxTask The handle of the task to be deleted. Passing NULL will
- * cause the calling task to be deleted.
- *
- * Example usage:
- <pre>
- void vOtherFunction( void )
- {
- xTaskHandle xHandle;
-
- // Create the task, storing the handle.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
- // Use the handle to delete the task.
- vTaskDelete( xHandle );
- }
- </pre>
- * \defgroup vTaskDelete vTaskDelete
- * \ingroup Tasks
- */
-void vTaskDelete( xTaskHandle pxTaskToDelete ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------
- * TASK CONTROL API
- *----------------------------------------------------------*/
-
-/**
- * task. h
- * <pre>void vTaskDelay( portTickType xTicksToDelay );</pre>
- *
- * Delay a task for a given number of ticks. The actual time that the
- * task remains blocked depends on the tick rate. The constant
- * portTICK_RATE_MS can be used to calculate real time from the tick
- * rate - with the resolution of one tick period.
- *
- * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- *
- * vTaskDelay() specifies a time at which the task wishes to unblock relative to
- * the time at which vTaskDelay() is called. For example, specifying a block
- * period of 100 ticks will cause the task to unblock 100 ticks after
- * vTaskDelay() is called. vTaskDelay() does not therefore provide a good method
- * of controlling the frequency of a cyclical task as the path taken through the
- * code, as well as other task and interrupt activity, will effect the frequency
- * at which vTaskDelay() gets called and therefore the time at which the task
- * next executes. See vTaskDelayUntil() for an alternative API function designed
- * to facilitate fixed frequency execution. It does this by specifying an
- * absolute time (rather than a relative time) at which the calling task should
- * unblock.
- *
- * @param xTicksToDelay The amount of time, in tick periods, that
- * the calling task should block.
- *
- * Example usage:
-
- void vTaskFunction( void * pvParameters )
- {
- void vTaskFunction( void * pvParameters )
- {
- // Block for 500ms.
- const portTickType xDelay = 500 / portTICK_RATE_MS;
-
- for( ;; )
- {
- // Simply toggle the LED every 500ms, blocking between each toggle.
- vToggleLED();
- vTaskDelay( xDelay );
- }
- }
-
- * \defgroup vTaskDelay vTaskDelay
- * \ingroup TaskCtrl
- */
-void vTaskDelay( portTickType xTicksToDelay ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskDelayUntil( portTickType *pxPreviousWakeTime, portTickType xTimeIncrement );</pre>
- *
- * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Delay a task until a specified time. This function can be used by cyclical
- * tasks to ensure a constant execution frequency.
- *
- * This function differs from vTaskDelay () in one important aspect: vTaskDelay () will
- * cause a task to block for the specified number of ticks from the time vTaskDelay () is
- * called. It is therefore difficult to use vTaskDelay () by itself to generate a fixed
- * execution frequency as the time between a task starting to execute and that task
- * calling vTaskDelay () may not be fixed [the task may take a different path though the
- * code between calls, or may get interrupted or preempted a different number of times
- * each time it executes].
- *
- * Whereas vTaskDelay () specifies a wake time relative to the time at which the function
- * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to
- * unblock.
- *
- * The constant portTICK_RATE_MS can be used to calculate real time from the tick
- * rate - with the resolution of one tick period.
- *
- * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the
- * task was last unblocked. The variable must be initialised with the current time
- * prior to its first use (see the example below). Following this the variable is
- * automatically updated within vTaskDelayUntil ().
- *
- * @param xTimeIncrement The cycle time period. The task will be unblocked at
- * time *pxPreviousWakeTime + xTimeIncrement. Calling vTaskDelayUntil with the
- * same xTimeIncrement parameter value will cause the task to execute with
- * a fixed interface period.
- *
- * Example usage:
- <pre>
- // Perform an action every 10 ticks.
- void vTaskFunction( void * pvParameters )
- {
- portTickType xLastWakeTime;
- const portTickType xFrequency = 10;
-
- // Initialise the xLastWakeTime variable with the current time.
- xLastWakeTime = xTaskGetTickCount ();
- for( ;; )
- {
- // Wait for the next cycle.
- vTaskDelayUntil( &xLastWakeTime, xFrequency );
-
- // Perform action here.
- }
- }
- </pre>
- * \defgroup vTaskDelayUntil vTaskDelayUntil
- * \ingroup TaskCtrl
- */
-void vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask );</pre>
- *
- * INCLUDE_xTaskPriorityGet must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Obtain the priority of any task.
- *
- * @param pxTask Handle of the task to be queried. Passing a NULL
- * handle results in the priority of the calling task being returned.
- *
- * @return The priority of pxTask.
- *
- * Example usage:
- <pre>
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
- // Create a task, storing the handle.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
- // ...
-
- // Use the handle to obtain the priority of the created task.
- // It was created with tskIDLE_PRIORITY, but may have changed
- // it itself.
- if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
- {
- // The task has changed it's priority.
- }
-
- // ...
-
- // Is our priority higher than the created task?
- if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
- {
- // Our priority (obtained using NULL handle) is higher.
- }
- }
- </pre>
- * \defgroup uxTaskPriorityGet uxTaskPriorityGet
- * \ingroup TaskCtrl
- */
-unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority );</pre>
- *
- * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Set the priority of any task.
- *
- * A context switch will occur before the function returns if the priority
- * being set is higher than the currently executing task.
- *
- * @param pxTask Handle to the task for which the priority is being set.
- * Passing a NULL handle results in the priority of the calling task being set.
- *
- * @param uxNewPriority The priority to which the task will be set.
- *
- * Example usage:
- <pre>
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
- // Create a task, storing the handle.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
- // ...
-
- // Use the handle to raise the priority of the created task.
- vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
-
- // ...
-
- // Use a NULL handle to raise our priority to the same value.
- vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
- }
- </pre>
- * \defgroup vTaskPrioritySet vTaskPrioritySet
- * \ingroup TaskCtrl
- */
-void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskSuspend( xTaskHandle pxTaskToSuspend );</pre>
- *
- * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Suspend any task. When suspended a task will never get any microcontroller
- * processing time, no matter what its priority.
- *
- * Calls to vTaskSuspend are not accumulative -
- * i.e. calling vTaskSuspend () twice on the same task still only requires one
- * call to vTaskResume () to ready the suspended task.
- *
- * @param pxTaskToSuspend Handle to the task being suspended. Passing a NULL
- * handle will cause the calling task to be suspended.
- *
- * Example usage:
- <pre>
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
- // Create a task, storing the handle.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
- // ...
-
- // Use the handle to suspend the created task.
- vTaskSuspend( xHandle );
-
- // ...
-
- // The created task will not run during this period, unless
- // another task calls vTaskResume( xHandle ).
-
- //...
-
-
- // Suspend ourselves.
- vTaskSuspend( NULL );
-
- // We cannot get here unless another task calls vTaskResume
- // with our handle as the parameter.
- }
- </pre>
- * \defgroup vTaskSuspend vTaskSuspend
- * \ingroup TaskCtrl
- */
-void vTaskSuspend( xTaskHandle pxTaskToSuspend ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskResume( xTaskHandle pxTaskToResume );</pre>
- *
- * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
- * See the configuration section for more information.
- *
- * Resumes a suspended task.
- *
- * A task that has been suspended by one of more calls to vTaskSuspend ()
- * will be made available for running again by a single call to
- * vTaskResume ().
- *
- * @param pxTaskToResume Handle to the task being readied.
- *
- * Example usage:
- <pre>
- void vAFunction( void )
- {
- xTaskHandle xHandle;
-
- // Create a task, storing the handle.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
-
- // ...
-
- // Use the handle to suspend the created task.
- vTaskSuspend( xHandle );
-
- // ...
-
- // The created task will not run during this period, unless
- // another task calls vTaskResume( xHandle ).
-
- //...
-
-
- // Resume the suspended task ourselves.
- vTaskResume( xHandle );
-
- // The created task will once again get microcontroller processing
- // time in accordance with it priority within the system.
- }
- </pre>
- * \defgroup vTaskResume vTaskResume
- * \ingroup TaskCtrl
- */
-void vTaskResume( xTaskHandle pxTaskToResume ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void xTaskResumeFromISR( xTaskHandle pxTaskToResume );</pre>
- *
- * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be
- * available. See the configuration section for more information.
- *
- * An implementation of vTaskResume() that can be called from within an ISR.
- *
- * A task that has been suspended by one of more calls to vTaskSuspend ()
- * will be made available for running again by a single call to
- * xTaskResumeFromISR ().
- *
- * @param pxTaskToResume Handle to the task being readied.
- *
- * \defgroup vTaskResumeFromISR vTaskResumeFromISR
- * \ingroup TaskCtrl
- */
-portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------
- * SCHEDULER CONTROL
- *----------------------------------------------------------*/
-
-/**
- * task. h
- * <pre>void vTaskStartScheduler( void );</pre>
- *
- * Starts the real time kernel tick processing. After calling the kernel
- * has control over which tasks are executed and when. This function
- * does not return until an executing task calls vTaskEndScheduler ().
- *
- * At least one task should be created via a call to xTaskCreate ()
- * before calling vTaskStartScheduler (). The idle task is created
- * automatically when the first application task is created.
- *
- * See the demo application file main.c for an example of creating
- * tasks and starting the kernel.
- *
- * Example usage:
- <pre>
- void vAFunction( void )
- {
- // Create at least one task before starting the kernel.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
- // Start the real time kernel with preemption.
- vTaskStartScheduler ();
-
- // Will not get here unless a task calls vTaskEndScheduler ()
- }
- </pre>
- *
- * \defgroup vTaskStartScheduler vTaskStartScheduler
- * \ingroup SchedulerControl
- */
-void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskEndScheduler( void );</pre>
- *
- * Stops the real time kernel tick. All created tasks will be automatically
- * deleted and multitasking (either preemptive or cooperative) will
- * stop. Execution then resumes from the point where vTaskStartScheduler ()
- * was called, as if vTaskStartScheduler () had just returned.
- *
- * See the demo application file main. c in the demo/PC directory for an
- * example that uses vTaskEndScheduler ().
- *
- * vTaskEndScheduler () requires an exit function to be defined within the
- * portable layer (see vPortEndScheduler () in port. c for the PC port). This
- * performs hardware specific operations such as stopping the kernel tick.
- *
- * vTaskEndScheduler () will cause all of the resources allocated by the
- * kernel to be freed - but will not free resources allocated by application
- * tasks.
- *
- * Example usage:
- <pre>
- void vTaskCode( void * pvParameters )
- {
- for( ;; )
- {
- // Task code goes here.
-
- // At some point we want to end the real time kernel processing
- // so call ...
- vTaskEndScheduler ();
- }
- }
-
- void vAFunction( void )
- {
- // Create at least one task before starting the kernel.
- xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
-
- // Start the real time kernel with preemption.
- vTaskStartScheduler ();
-
- // Will only get here when the vTaskCode () task has called
- // vTaskEndScheduler (). When we get here we are back to single task
- // execution.
- }
- </pre>
- *
- * \defgroup vTaskEndScheduler vTaskEndScheduler
- * \ingroup SchedulerControl
- */
-void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>void vTaskSuspendAll( void );</pre>
- *
- * Suspends all real time kernel activity while keeping interrupts (including the
- * kernel tick) enabled.
- *
- * After calling vTaskSuspendAll () the calling task will continue to execute
- * without risk of being swapped out until a call to xTaskResumeAll () has been
- * made.
- *
- * API functions that have the potential to cause a context switch (for example,
- * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler
- * is suspended.
- *
- * Example usage:
- <pre>
- void vTask1( void * pvParameters )
- {
- for( ;; )
- {
- // Task code goes here.
-
- // ...
-
- // At some point the task wants to perform a long operation during
- // which it does not want to get swapped out. It cannot use
- // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
- // operation may cause interrupts to be missed - including the
- // ticks.
-
- // Prevent the real time kernel swapping out the task.
- vTaskSuspendAll ();
-
- // Perform the operation here. There is no need to use critical
- // sections as we have all the microcontroller processing time.
- // During this time interrupts will still operate and the kernel
- // tick count will be maintained.
-
- // ...
-
- // The operation is complete. Restart the kernel.
- xTaskResumeAll ();
- }
- }
- </pre>
- * \defgroup vTaskSuspendAll vTaskSuspendAll
- * \ingroup SchedulerControl
- */
-void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>char xTaskResumeAll( void );</pre>
- *
- * Resumes real time kernel activity following a call to vTaskSuspendAll ().
- * After a call to vTaskSuspendAll () the kernel will take control of which
- * task is executing at any time.
- *
- * @return If resuming the scheduler caused a context switch then pdTRUE is
- * returned, otherwise pdFALSE is returned.
- *
- * Example usage:
- <pre>
- void vTask1( void * pvParameters )
- {
- for( ;; )
- {
- // Task code goes here.
-
- // ...
-
- // At some point the task wants to perform a long operation during
- // which it does not want to get swapped out. It cannot use
- // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
- // operation may cause interrupts to be missed - including the
- // ticks.
-
- // Prevent the real time kernel swapping out the task.
- vTaskSuspendAll ();
-
- // Perform the operation here. There is no need to use critical
- // sections as we have all the microcontroller processing time.
- // During this time interrupts will still operate and the real
- // time kernel tick count will be maintained.
-
- // ...
-
- // The operation is complete. Restart the kernel. We want to force
- // a context switch - but there is no point if resuming the scheduler
- // caused a context switch already.
- if( !xTaskResumeAll () )
- {
- taskYIELD ();
- }
- }
- }
- </pre>
- * \defgroup xTaskResumeAll xTaskResumeAll
- * \ingroup SchedulerControl
- */
-signed portBASE_TYPE xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <pre>signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask );</pre>
- *
- * Utility task that simply returns pdTRUE if the task referenced by xTask is
- * currently in the Suspended state, or pdFALSE if the task referenced by xTask
- * is in any other state.
- *
- */
-signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------
- * TASK UTILITIES
- *----------------------------------------------------------*/
-
-/**
- * task. h
- * <PRE>portTickType xTaskGetTickCount( void );</PRE>
- *
- * @return The count of ticks since vTaskStartScheduler was called.
- *
- * \page xTaskGetTickCount xTaskGetTickCount
- * \ingroup TaskUtils
- */
-portTickType xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <PRE>portTickType xTaskGetTickCountFromISR( void );</PRE>
- *
- * @return The count of ticks since vTaskStartScheduler was called.
- *
- * This is a version of xTaskGetTickCount() that is safe to be called from an
- * ISR - provided that portTickType is the natural word size of the
- * microcontroller being used or interrupt nesting is either not supported or
- * not being used.
- *
- * \page xTaskGetTickCount xTaskGetTickCount
- * \ingroup TaskUtils
- */
-portTickType xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <PRE>unsigned short uxTaskGetNumberOfTasks( void );</PRE>
- *
- * @return The number of tasks that the real time kernel is currently managing.
- * This includes all ready, blocked and suspended tasks. A task that
- * has been deleted but not yet freed by the idle task will also be
- * included in the count.
- *
- * \page uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
- * \ingroup TaskUtils
- */
-unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <PRE>signed char *pcTaskGetTaskName( xTaskHandle xTaskToQuery );</PRE>
- *
- * @return The text (human readable) name of the task referenced by the handle
- * xTaskToQueury. A task can query its own name by either passing in its own
- * handle, or by setting xTaskToQuery to NULL. INCLUDE_pcTaskGetTaskName must be
- * set to 1 in FreeRTOSConfig.h for pcTaskGetTaskName() to be available.
- *
- * \page pcTaskGetTaskName pcTaskGetTaskName
- * \ingroup TaskUtils
- */
-signed char *pcTaskGetTaskName( xTaskHandle xTaskToQuery );
-
-/**
- * task. h
- * <PRE>void vTaskList( char *pcWriteBuffer );</PRE>
- *
- * configUSE_TRACE_FACILITY must be defined as 1 for this function to be
- * available. See the configuration section for more information.
- *
- * NOTE: This function will disable interrupts for its duration. It is
- * not intended for normal application runtime use but as a debug aid.
- *
- * Lists all the current tasks, along with their current state and stack
- * usage high water mark.
- *
- * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
- * suspended ('S').
- *
- * @param pcWriteBuffer A buffer into which the above mentioned details
- * will be written, in ascii form. This buffer is assumed to be large
- * enough to contain the generated report. Approximately 40 bytes per
- * task should be sufficient.
- *
- * \page vTaskList vTaskList
- * \ingroup TaskUtils
- */
-void vTaskList( signed char *pcWriteBuffer ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <PRE>void vTaskGetRunTimeStats( char *pcWriteBuffer );</PRE>
- *
- * configGENERATE_RUN_TIME_STATS must be defined as 1 for this function
- * to be available. The application must also then provide definitions
- * for portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
- * portGET_RUN_TIME_COUNTER_VALUE to configure a peripheral timer/counter
- * and return the timers current count value respectively. The counter
- * should be at least 10 times the frequency of the tick count.
- *
- * NOTE: This function will disable interrupts for its duration. It is
- * not intended for normal application runtime use but as a debug aid.
- *
- * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
- * accumulated execution time being stored for each task. The resolution
- * of the accumulated time value depends on the frequency of the timer
- * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
- * Calling vTaskGetRunTimeStats() writes the total execution time of each
- * task into a buffer, both as an absolute count value and as a percentage
- * of the total system execution time.
- *
- * @param pcWriteBuffer A buffer into which the execution times will be
- * written, in ascii form. This buffer is assumed to be large enough to
- * contain the generated report. Approximately 40 bytes per task should
- * be sufficient.
- *
- * \page vTaskGetRunTimeStats vTaskGetRunTimeStats
- * \ingroup TaskUtils
- */
-void vTaskGetRunTimeStats( signed char *pcWriteBuffer ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <PRE>void vTaskStartTrace( char * pcBuffer, unsigned portBASE_TYPE uxBufferSize );</PRE>
- *
- * Starts a real time kernel activity trace. The trace logs the identity of
- * which task is running when.
- *
- * The trace file is stored in binary format. A separate DOS utility called
- * convtrce.exe is used to convert this into a tab delimited text file which
- * can be viewed and plotted in a spread sheet.
- *
- * @param pcBuffer The buffer into which the trace will be written.
- *
- * @param ulBufferSize The size of pcBuffer in bytes. The trace will continue
- * until either the buffer in full, or ulTaskEndTrace () is called.
- *
- * \page vTaskStartTrace vTaskStartTrace
- * \ingroup TaskUtils
- */
-void vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize ) PRIVILEGED_FUNCTION;
-
-/**
- * task. h
- * <PRE>unsigned long ulTaskEndTrace( void );</PRE>
- *
- * Stops a kernel activity trace. See vTaskStartTrace ().
- *
- * @return The number of bytes that have been written into the trace buffer.
- *
- * \page usTaskEndTrace usTaskEndTrace
- * \ingroup TaskUtils
- */
-unsigned long ulTaskEndTrace( void ) PRIVILEGED_FUNCTION;
-
-/**
- * task.h
- * <PRE>unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask );</PRE>
- *
- * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for
- * this function to be available.
- *
- * Returns the high water mark of the stack associated with xTask. That is,
- * the minimum free stack space there has been (in words, so on a 32 bit machine
- * a value of 1 means 4 bytes) since the task started. The smaller the returned
- * number the closer the task has come to overflowing its stack.
- *
- * @param xTask Handle of the task associated with the stack to be checked.
- * Set xTask to NULL to check the stack of the calling task.
- *
- * @return The smallest amount of free stack space there has been (in bytes)
- * since the task referenced by xTask was created.
- */
-unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask ) PRIVILEGED_FUNCTION;
-
-/* When using trace macros it is sometimes necessary to include tasks.h before
-FreeRTOS.h. When this is done pdTASK_HOOK_CODE will not yet have been defined,
-so the following two prototypes will cause a compilation error. This can be
-fixed by simply guarding against the inclusion of these two prototypes unless
-they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration
-constant. */
-#ifdef configUSE_APPLICATION_TASK_TAG
- #if configUSE_APPLICATION_TASK_TAG == 1
- /**
- * task.h
- * <pre>void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction );</pre>
- *
- * Sets pxHookFunction to be the task hook function used by the task xTask.
- * Passing xTask as NULL has the effect of setting the calling tasks hook
- * function.
- */
- void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction ) PRIVILEGED_FUNCTION;
-
- /**
- * task.h
- * <pre>void xTaskGetApplicationTaskTag( xTaskHandle xTask );</pre>
- *
- * Returns the pxHookFunction value assigned to the task xTask.
- */
- pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( xTaskHandle xTask ) PRIVILEGED_FUNCTION;
- #endif /* configUSE_APPLICATION_TASK_TAG ==1 */
-#endif /* ifdef configUSE_APPLICATION_TASK_TAG */
-
-/**
- * task.h
- * <pre>portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction );</pre>
- *
- * Calls the hook function associated with xTask. Passing xTask as NULL has
- * the effect of calling the Running tasks (the calling task) hook function.
- *
- * pvParameter is passed to the hook function for the task to interpret as it
- * wants.
- */
-portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter ) PRIVILEGED_FUNCTION;
-
-/**
- * xTaskGetIdleTaskHandle() is only available if
- * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
- *
- * Simply returns the handle of the idle task. It is not valid to call
- * xTaskGetIdleTaskHandle() before the scheduler has been started.
- */
-xTaskHandle xTaskGetIdleTaskHandle( void );
-
-/*-----------------------------------------------------------
- * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
- *----------------------------------------------------------*/
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Called from the real time kernel tick (either preemptive or cooperative),
- * this increments the tick count and checks if any tasks that are blocked
- * for a finite period required removing from a blocked list and placing on
- * a ready list.
- */
-void vTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes the calling task from the ready list and places it both
- * on the list of tasks waiting for a particular event, and the
- * list of delayed tasks. The task will be removed from both lists
- * and replaced on the ready list should either the event occur (and
- * there be no higher priority tasks waiting on the same event) or
- * the delay period expires.
- *
- * @param pxEventList The list containing tasks that are blocked waiting
- * for the event to occur.
- *
- * @param xTicksToWait The maximum amount of time that the task should wait
- * for the event to occur. This is specified in kernel ticks,the constant
- * portTICK_RATE_MS can be used to convert kernel ticks into a real time
- * period.
- */
-void vTaskPlaceOnEventList( const xList * const pxEventList, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * This function performs nearly the same function as vTaskPlaceOnEventList().
- * The difference being that this function does not permit tasks to block
- * indefinitely, whereas vTaskPlaceOnEventList() does.
- *
- * @return pdTRUE if the task being removed has a higher priority than the task
- * making the call, otherwise pdFALSE.
- */
-void vTaskPlaceOnEventListRestricted( const xList * const pxEventList, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS AN
- * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
- *
- * Removes a task from both the specified event list and the list of blocked
- * tasks, and places it on a ready queue.
- *
- * xTaskRemoveFromEventList () will be called if either an event occurs to
- * unblock a task, or the block timeout period expires.
- *
- * @return pdTRUE if the task being removed has a higher priority than the task
- * making the call, otherwise pdFALSE.
- */
-signed portBASE_TYPE xTaskRemoveFromEventList( const xList * const pxEventList ) PRIVILEGED_FUNCTION;
-
-/*
- * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE. IT IS ONLY
- * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
- * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
- *
- * Sets the pointer to the current TCB to the TCB of the highest priority task
- * that is ready to run.
- */
-void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Return the handle of the calling task.
- */
-xTaskHandle xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Capture the current time status for future reference.
- */
-void vTaskSetTimeOutState( xTimeOutType * const pxTimeOut ) PRIVILEGED_FUNCTION;
-
-/*
- * Compare the time status now with that previously captured to see if the
- * timeout has expired.
- */
-portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType * const pxTimeOut, portTickType * const pxTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * Shortcut used by the queue implementation to prevent unnecessary call to
- * taskYIELD();
- */
-void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Returns the scheduler state as taskSCHEDULER_RUNNING,
- * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
- */
-portBASE_TYPE xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Raises the priority of the mutex holder to that of the calling task should
- * the mutex holder have a priority less than the calling task.
- */
-void vTaskPriorityInherit( xTaskHandle * const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Set the priority of a task back to its proper priority in the case that it
- * inherited a higher priority while it was holding a semaphore.
- */
-void vTaskPriorityDisinherit( xTaskHandle * const pxMutexHolder ) PRIVILEGED_FUNCTION;
-
-/*
- * Generic version of the task creation function which is in turn called by the
- * xTaskCreate() and xTaskCreateRestricted() macros.
- */
-signed portBASE_TYPE xTaskGenericCreate( pdTASK_CODE pxTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* TASK_H */
-
-
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-
-#ifndef TIMERS_H
-#define TIMERS_H
-
-#ifndef INC_FREERTOS_H
- #error "include FreeRTOS.h must appear in source files before include timers.h"
-#endif
-
-#include "os/portable.h"
-#include "os/list.h"
-#include "os/task.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* IDs for commands that can be sent/received on the timer queue. These are to
-be used solely through the macros that make up the public software timer API,
-as defined below. */
-#define tmrCOMMAND_START 0
-#define tmrCOMMAND_STOP 1
-#define tmrCOMMAND_CHANGE_PERIOD 2
-#define tmrCOMMAND_DELETE 3
-
-/*-----------------------------------------------------------
- * MACROS AND DEFINITIONS
- *----------------------------------------------------------*/
-
- /**
- * Type by which software timers are referenced. For example, a call to
- * xTimerCreate() returns an xTimerHandle variable that can then be used to
- * reference the subject timer in calls to other software timer API functions
- * (for example, xTimerStart(), xTimerReset(), etc.).
- */
-typedef void * xTimerHandle;
-
-/* Define the prototype to which timer callback functions must conform. */
-typedef void (*tmrTIMER_CALLBACK)( xTimerHandle xTimer );
-
-/**
- * xTimerHandle xTimerCreate( const signed char *pcTimerName,
- * portTickType xTimerPeriodInTicks,
- * unsigned portBASE_TYPE uxAutoReload,
- * void * pvTimerID,
- * tmrTIMER_CALLBACK pxCallbackFunction );
- *
- * Creates a new software timer instance. This allocates the storage required
- * by the new timer, initialises the new timers internal state, and returns a
- * handle by which the new timer can be referenced.
- *
- * Timers are created in the dormant state. The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
- * active state.
- *
- * @param pcTimerName A text name that is assigned to the timer. This is done
- * purely to assist debugging. The kernel itself only ever references a timer by
- * its handle, and never by its name.
- *
- * @param xTimerPeriodInTicks The timer period. The time is defined in tick periods so
- * the constant portTICK_RATE_MS can be used to convert a time that has been
- * specified in milliseconds. For example, if the timer must expire after 100
- * ticks, then xTimerPeriodInTicks should be set to 100. Alternatively, if the timer
- * must expire after 500ms, then xPeriod can be set to ( 500 / portTICK_RATE_MS )
- * provided configTICK_RATE_HZ is less than or equal to 1000.
- *
- * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
- * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter. If
- * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
- * enter the dormant state after it expires.
- *
- * @param pvTimerID An identifier that is assigned to the timer being created.
- * Typically this would be used in the timer callback function to identify which
- * timer expired when the same callback function is assigned to more than one
- * timer.
- *
- * @param pxCallbackFunction The function to call when the timer expires.
- * Callback functions must have the prototype defined by tmrTIMER_CALLBACK,
- * which is "void vCallbackFunction( xTimerHandle xTimer );".
- *
- * @return If the timer is successfully create then a handle to the newly
- * created timer is returned. If the timer cannot be created (because either
- * there is insufficient FreeRTOS heap remaining to allocate the timer
- * structures, or the timer period was set to 0) then 0 is returned.
- *
- * Example usage:
- *
- *
- * define NUM_TIMERS 5
- *
- * // An array to hold handles to the created timers.
- * xTimerHandle xTimers[ NUM_TIMERS ];
- *
- * // An array to hold a count of the number of times each timer expires.
- * long lExpireCounters[ NUM_TIMERS ] = { 0 };
- *
- * // Define a callback function that will be used by multiple timer instances.
- * // The callback function does nothing but count the number of times the
- * // associated timer expires, and stop the timer once the timer has expired
- * // 10 times.
- * void vTimerCallback( xTimerHandle pxTimer )
- * {
- * long lArrayIndex;
- * const long xMaxExpiryCountBeforeStopping = 10;
- *
- * // Optionally do something if the pxTimer parameter is NULL.
- * configASSERT( pxTimer );
- *
- * // Which timer expired?
- * lArrayIndex = ( long ) pvTimerGetTimerID( pxTimer );
- *
- * // Increment the number of times that pxTimer has expired.
- * lExpireCounters[ lArrayIndex ] += 1;
- *
- * // If the timer has expired 10 times then stop it from running.
- * if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
- * {
- * // Do not use a block time if calling a timer API function from a
- * // timer callback function, as doing so could cause a deadlock!
- * xTimerStop( pxTimer, 0 );
- * }
- * }
- *
- * void main( void )
- * {
- * long x;
- *
- * // Create then start some timers. Starting the timers before the scheduler
- * // has been started means the timers will start running immediately that
- * // the scheduler starts.
- * for( x = 0; x < NUM_TIMERS; x++ )
- * {
- * xTimers[ x ] = xTimerCreate( "Timer", // Just a text name, not used by the kernel.
- * ( 100 * x ), // The timer period in ticks.
- * pdTRUE, // The timers will auto-reload themselves when they expire.
- * ( void * ) x, // Assign each timer a unique id equal to its array index.
- * vTimerCallback // Each timer calls the same callback when it expires.
- * );
- *
- * if( xTimers[ x ] == NULL )
- * {
- * // The timer was not created.
- * }
- * else
- * {
- * // Start the timer. No block time is specified, and even if one was
- * // it would be ignored because the scheduler has not yet been
- * // started.
- * if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
- * {
- * // The timer could not be set into the Active state.
- * }
- * }
- * }
- *
- * // ...
- * // Create tasks here.
- * // ...
- *
- * // Starting the scheduler will start the timers running as they have already
- * // been set into the active state.
- * xTaskStartScheduler();
- *
- * // Should not reach here.
- * for( ;; );
- * }
- */
-xTimerHandle xTimerCreate( const signed char *pcTimerName, portTickType xTimerPeriodInTicks, unsigned portBASE_TYPE uxAutoReload, void * pvTimerID, tmrTIMER_CALLBACK pxCallbackFunction ) PRIVILEGED_FUNCTION;
-
-/**
- * void *pvTimerGetTimerID( xTimerHandle xTimer );
- *
- * Returns the ID assigned to the timer.
- *
- * IDs are assigned to timers using the pvTimerID parameter of the call to
- * xTimerCreated() that was used to create the timer.
- *
- * If the same callback function is assigned to multiple timers then the timer
- * ID can be used within the callback function to identify which timer actually
- * expired.
- *
- * @param xTimer The timer being queried.
- *
- * @return The ID assigned to the timer being queried.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- */
-void *pvTimerGetTimerID( xTimerHandle xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * portBASE_TYPE xTimerIsTimerActive( xTimerHandle xTimer );
- *
- * Queries a timer to see if it is active or dormant.
- *
- * A timer will be dormant if:
- * 1) It has been created but not started, or
- * 2) It is an expired on-shot timer that has not been restarted.
- *
- * Timers are created in the dormant state. The xTimerStart(), xTimerReset(),
- * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
- * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
- * active state.
- *
- * @param xTimer The timer being queried.
- *
- * @return pdFALSE will be returned if the timer is dormant. A value other than
- * pdFALSE will be returned if the timer is active.
- *
- * Example usage:
- *
- * // This function assumes xTimer has already been created.
- * void vAFunction( xTimerHandle xTimer )
- * {
- * if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- * {
- * // xTimer is active, do something.
- * }
- * else
- * {
- * // xTimer is not active, do something else.
- * }
- * }
- */
-portBASE_TYPE xTimerIsTimerActive( xTimerHandle xTimer ) PRIVILEGED_FUNCTION;
-
-/**
- * xTimerGetTimerDaemonTaskHandle() is only available if
- * INCLUDE_xTimerGetTimerDaemonTaskHandle is set to 1 in FreeRTOSConfig.h.
- *
- * Simply returns the handle of the timer service/daemon task. It it not valid
- * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
- */
-xTaskHandle xTimerGetTimerDaemonTaskHandle( void );
-
-/**
- * portBASE_TYPE xTimerStart( xTimerHandle xTimer, portTickType xBlockTime );
- *
- * Timer functionality is provided by a timer service/daemon task. Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * though a queue called the timer command queue. The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code. The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStart() starts a timer that was previously created using the
- * xTimerCreate() API function. If the timer had already been started and was
- * already in the active state, then xTimerStart() has equivalent functionality
- * to the xTimerReset() API function.
- *
- * Starting a timer ensures the timer is in the active state. If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerStart() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerStart() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerStart() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
- * to be available.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param xBlockTime Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the start command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStart() was called. xBlockTime is ignored if xTimerStart() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue even after xBlockTime ticks had passed. pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called. The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStart( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xBlockTime ) )
-
-/**
- * portBASE_TYPE xTimerStop( xTimerHandle xTimer, portTickType xBlockTime );
- *
- * Timer functionality is provided by a timer service/daemon task. Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * though a queue called the timer command queue. The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code. The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerStop() stops a timer that was previously started using either of the
- * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
- * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
- *
- * Stopping a timer ensures the timer is not in the active state.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
- * to be available.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param xBlockTime Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the stop command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerStop() was called. xBlockTime is ignored if xTimerStop() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue even after xBlockTime ticks had passed. pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system. The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerCreate() API function example usage scenario.
- *
- */
-#define xTimerStop( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xBlockTime ) )
-
-/**
- * portBASE_TYPE xTimerChangePeriod( xTimerHandle xTimer,
- * portTickType xNewPeriod,
- * portTickType xBlockTime );
- *
- * Timer functionality is provided by a timer service/daemon task. Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * though a queue called the timer command queue. The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code. The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerChangePeriod() changes the period of a timer that was previously
- * created using the xTimerCreate() API function.
- *
- * xTimerChangePeriod() can be called to change the period of an active or
- * dormant state timer.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerChangePeriod() to be available.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_RATE_MS can be used to convert a time
- * that has been specified in milliseconds. For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100. Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_RATE_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param xBlockTime Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the change period command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerChangePeriod() was called. xBlockTime is ignored if
- * xTimerChangePeriod() is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the change period command could not be
- * sent to the timer command queue even after xBlockTime ticks had passed.
- * pdPASS will be returned if the command was successfully sent to the timer
- * command queue. When the command is actually processed will depend on the
- * priority of the timer service/daemon task relative to other tasks in the
- * system. The timer service/daemon task priority is set by the
- * configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- *
- * // This function assumes xTimer has already been created. If the timer
- * // referenced by xTimer is already active when it is called, then the timer
- * // is deleted. If the timer referenced by xTimer is not active when it is
- * // called, then the period of the timer is set to 500ms and the timer is
- * // started.
- * void vAFunction( xTimerHandle xTimer )
- * {
- * if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
- * {
- * // xTimer is already active - delete it.
- * xTimerDelete( xTimer );
- * }
- * else
- * {
- * // xTimer is not active, change its period to 500ms. This will also
- * // cause the timer to start. Block for a maximum of 100 ticks if the
- * // change period command cannot immediately be sent to the timer
- * // command queue.
- * if( xTimerChangePeriod( xTimer, 500 / portTICK_RATE_MS, 100 ) == pdPASS )
- * {
- * // The command was successfully sent.
- * }
- * else
- * {
- * // The command could not be sent, even after waiting for 100 ticks
- * // to pass. Take appropriate action here.
- * }
- * }
- * }
- */
- #define xTimerChangePeriod( xTimer, xNewPeriod, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xBlockTime ) )
-
-/**
- * portBASE_TYPE xTimerDelete( xTimerHandle xTimer, portTickType xBlockTime );
- *
- * Timer functionality is provided by a timer service/daemon task. Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * though a queue called the timer command queue. The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code. The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerDelete() deletes a timer that was previously created using the
- * xTimerCreate() API function.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for
- * xTimerDelete() to be available.
- *
- * @param xTimer The handle of the timer being deleted.
- *
- * @param xBlockTime Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the delete command to be
- * successfully sent to the timer command queue, should the queue already be
- * full when xTimerDelete() was called. xBlockTime is ignored if xTimerDelete()
- * is called before the scheduler is started.
- *
- * @return pdFAIL will be returned if the delete command could not be sent to
- * the timer command queue even after xBlockTime ticks had passed. pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system. The timer
- * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * See the xTimerChangePeriod() API function example usage scenario.
- */
-#define xTimerDelete( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xBlockTime ) )
-
-/**
- * portBASE_TYPE xTimerReset( xTimerHandle xTimer, portTickType xBlockTime );
- *
- * Timer functionality is provided by a timer service/daemon task. Many of the
- * public FreeRTOS timer API functions send commands to the timer service task
- * though a queue called the timer command queue. The timer command queue is
- * private to the kernel itself and is not directly accessible to application
- * code. The length of the timer command queue is set by the
- * configTIMER_QUEUE_LENGTH configuration constant.
- *
- * xTimerReset() re-starts a timer that was previously created using the
- * xTimerCreate() API function. If the timer had already been started and was
- * already in the active state, then xTimerReset() will cause the timer to
- * re-evaluate its expiry time so that it is relative to when xTimerReset() was
- * called. If the timer was in the dormant state then xTimerReset() has
- * equivalent functionality to the xTimerStart() API function.
- *
- * Resetting a timer ensures the timer is in the active state. If the timer
- * is not stopped, deleted, or reset in the mean time, the callback function
- * associated with the timer will get called 'n' ticks after xTimerReset() was
- * called, where 'n' is the timers defined period.
- *
- * It is valid to call xTimerReset() before the scheduler has been started, but
- * when this is done the timer will not actually start until the scheduler is
- * started, and the timers expiry time will be relative to when the scheduler is
- * started, not relative to when xTimerReset() was called.
- *
- * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
- * to be available.
- *
- * @param xTimer The handle of the timer being reset/started/restarted.
- *
- * @param xBlockTime Specifies the time, in ticks, that the calling task should
- * be held in the Blocked state to wait for the reset command to be successfully
- * sent to the timer command queue, should the queue already be full when
- * xTimerReset() was called. xBlockTime is ignored if xTimerReset() is called
- * before the scheduler is started.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue even after xBlockTime ticks had passed. pdPASS will
- * be returned if the command was successfully sent to the timer command queue.
- * When the command is actually processed will depend on the priority of the
- * timer service/daemon task relative to other tasks in the system, although the
- * timers expiry time is relative to when xTimerStart() is actually called. The
- * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
- * configuration constant.
- *
- * Example usage:
- *
- * // When a key is pressed, an LCD back-light is switched on. If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off. In
- * // this case, the timer is a one-shot timer.
- *
- * xTimerHandle xBacklightTimer = NULL;
- *
- * // The callback function assigned to the one-shot timer. In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( xTimerHandle pxTimer )
- * {
- * // The timer expired, therefore 5 seconds must have passed since a key
- * // was pressed. Switch off the LCD back-light.
- * vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press event handler.
- * void vKeyPressEventHandler( char cKey )
- * {
- * // Ensure the LCD back-light is on, then reset the timer that is
- * // responsible for turning the back-light off after 5 seconds of
- * // key inactivity. Wait 10 ticks for the command to be successfully sent
- * // if it cannot be sent immediately.
- * vSetBacklightState( BACKLIGHT_ON );
- * if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
- * {
- * // The reset command was not executed successfully. Take appropriate
- * // action here.
- * }
- *
- * // Perform the rest of the key processing here.
- * }
- *
- * void main( void )
- * {
- * long x;
- *
- * // Create then start the one-shot timer that is responsible for turning
- * // the back-light off if no keys are pressed within a 5 second period.
- * xBacklightTimer = xTimerCreate( "BacklightTimer", // Just a text name, not used by the kernel.
- * ( 5000 / portTICK_RATE_MS), // The timer period in ticks.
- * pdFALSE, // The timer is a one-shot timer.
- * 0, // The id is not used by the callback so can take any value.
- * vBacklightTimerCallback // The callback function that switches the LCD back-light off.
- * );
- *
- * if( xBacklightTimer == NULL )
- * {
- * // The timer was not created.
- * }
- * else
- * {
- * // Start the timer. No block time is specified, and even if one was
- * // it would be ignored because the scheduler has not yet been
- * // started.
- * if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
- * {
- * // The timer could not be set into the Active state.
- * }
- * }
- *
- * // ...
- * // Create tasks here.
- * // ...
- *
- * // Starting the scheduler will start the timer running as it has already
- * // been set into the active state.
- * xTaskStartScheduler();
- *
- * // Should not reach here.
- * for( ;; );
- * }
- */
-#define xTimerReset( xTimer, xBlockTime ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xBlockTime ) )
-
-/**
- * portBASE_TYPE xTimerStartFromISR( xTimerHandle xTimer,
- * portBASE_TYPE *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStart() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being started/restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue. Calling xTimerStartFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state. If calling xTimerStartFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStartFromISR() function. If
- * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the start command could not be sent to
- * the timer command queue. pdPASS will be returned if the command was
- * successfully sent to the timer command queue. When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerStartFromISR() is actually called. The timer service/daemon
- * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- *
- * // This scenario assumes xBacklightTimer has already been created. When a
- * // key is pressed, an LCD back-light is switched on. If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off. In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer. In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( xTimerHandle pxTimer )
- * {
- * // The timer expired, therefore 5 seconds must have passed since a key
- * // was pressed. Switch off the LCD back-light.
- * vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
- *
- * // Ensure the LCD back-light is on, then restart the timer that is
- * // responsible for turning the back-light off after 5 seconds of
- * // key inactivity. This is an interrupt service routine so can only
- * // call FreeRTOS API functions that end in "FromISR".
- * vSetBacklightState( BACKLIGHT_ON );
- *
- * // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- * // as both cause the timer to re-calculate its expiry time.
- * // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- * // declared (in this function).
- * if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- * {
- * // The start command was not executed successfully. Take appropriate
- * // action here.
- * }
- *
- * // Perform the rest of the key processing here.
- *
- * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- * // should be performed. The syntax required to perform a context switch
- * // from inside an ISR varies from port to port, and from compiler to
- * // compiler. Inspect the demos for the port you are using to find the
- * // actual syntax required.
- * if( xHigherPriorityTaskWoken != pdFALSE )
- * {
- * // Call the interrupt safe yield function here (actual function
- * // depends on the FreeRTOS port being used.
- * }
- * }
- */
-#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * portBASE_TYPE xTimerStopFromISR( xTimerHandle xTimer,
- * portBASE_TYPE *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerStop() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer being stopped.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue. Calling xTimerStopFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state. If calling xTimerStopFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerStopFromISR() function. If
- * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the stop command could not be sent to
- * the timer command queue. pdPASS will be returned if the command was
- * successfully sent to the timer command queue. When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system. The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- *
- * // This scenario assumes xTimer has already been created and started. When
- * // an interrupt occurs, the timer should be simply stopped.
- *
- * // The interrupt service routine that stops the timer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
- *
- * // The interrupt has occurred - simply stop the timer.
- * // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- * // (within this function). As this is an interrupt service routine, only
- * // FreeRTOS API functions that end in "FromISR" can be used.
- * if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- * {
- * // The stop command was not executed successfully. Take appropriate
- * // action here.
- * }
- *
- * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- * // should be performed. The syntax required to perform a context switch
- * // from inside an ISR varies from port to port, and from compiler to
- * // compiler. Inspect the demos for the port you are using to find the
- * // actual syntax required.
- * if( xHigherPriorityTaskWoken != pdFALSE )
- * {
- * // Call the interrupt safe yield function here (actual function
- * // depends on the FreeRTOS port being used.
- * }
- * }
- */
-#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0, ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * portBASE_TYPE xTimerChangePeriodFromISR( xTimerHandle xTimer,
- * portTickType xNewPeriod,
- * portBASE_TYPE *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerChangePeriod() that can be called from an interrupt
- * service routine.
- *
- * @param xTimer The handle of the timer that is having its period changed.
- *
- * @param xNewPeriod The new period for xTimer. Timer periods are specified in
- * tick periods, so the constant portTICK_RATE_MS can be used to convert a time
- * that has been specified in milliseconds. For example, if the timer must
- * expire after 100 ticks, then xNewPeriod should be set to 100. Alternatively,
- * if the timer must expire after 500ms, then xNewPeriod can be set to
- * ( 500 / portTICK_RATE_MS ) provided configTICK_RATE_HZ is less than
- * or equal to 1000.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue. Calling xTimerChangePeriodFromISR() writes a message to the
- * timer command queue, so has the potential to transition the timer service/
- * daemon task out of the Blocked state. If calling xTimerChangePeriodFromISR()
- * causes the timer service/daemon task to leave the Blocked state, and the
- * timer service/daemon task has a priority equal to or greater than the
- * currently executing task (the task that was interrupted), then
- * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
- * xTimerChangePeriodFromISR() function. If xTimerChangePeriodFromISR() sets
- * this value to pdTRUE then a context switch should be performed before the
- * interrupt exits.
- *
- * @return pdFAIL will be returned if the command to change the timers period
- * could not be sent to the timer command queue. pdPASS will be returned if the
- * command was successfully sent to the timer command queue. When the command
- * is actually processed will depend on the priority of the timer service/daemon
- * task relative to other tasks in the system. The timer service/daemon task
- * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- *
- * // This scenario assumes xTimer has already been created and started. When
- * // an interrupt occurs, the period of xTimer should be changed to 500ms.
- *
- * // The interrupt service routine that changes the period of xTimer.
- * void vAnExampleInterruptServiceRoutine( void )
- * {
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
- *
- * // The interrupt has occurred - change the period of xTimer to 500ms.
- * // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
- * // (within this function). As this is an interrupt service routine, only
- * // FreeRTOS API functions that end in "FromISR" can be used.
- * if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- * {
- * // The command to change the timers period was not executed
- * // successfully. Take appropriate action here.
- * }
- *
- * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- * // should be performed. The syntax required to perform a context switch
- * // from inside an ISR varies from port to port, and from compiler to
- * // compiler. Inspect the demos for the port you are using to find the
- * // actual syntax required.
- * if( xHigherPriorityTaskWoken != pdFALSE )
- * {
- * // Call the interrupt safe yield function here (actual function
- * // depends on the FreeRTOS port being used.
- * }
- * }
- */
-#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/**
- * portBASE_TYPE xTimerResetFromISR( xTimerHandle xTimer,
- * portBASE_TYPE *pxHigherPriorityTaskWoken );
- *
- * A version of xTimerReset() that can be called from an interrupt service
- * routine.
- *
- * @param xTimer The handle of the timer that is to be started, reset, or
- * restarted.
- *
- * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
- * of its time in the Blocked state, waiting for messages to arrive on the timer
- * command queue. Calling xTimerResetFromISR() writes a message to the timer
- * command queue, so has the potential to transition the timer service/daemon
- * task out of the Blocked state. If calling xTimerResetFromISR() causes the
- * timer service/daemon task to leave the Blocked state, and the timer service/
- * daemon task has a priority equal to or greater than the currently executing
- * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
- * get set to pdTRUE internally within the xTimerResetFromISR() function. If
- * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
- * be performed before the interrupt exits.
- *
- * @return pdFAIL will be returned if the reset command could not be sent to
- * the timer command queue. pdPASS will be returned if the command was
- * successfully sent to the timer command queue. When the command is actually
- * processed will depend on the priority of the timer service/daemon task
- * relative to other tasks in the system, although the timers expiry time is
- * relative to when xTimerResetFromISR() is actually called. The timer service/daemon
- * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
- *
- * Example usage:
- *
- * // This scenario assumes xBacklightTimer has already been created. When a
- * // key is pressed, an LCD back-light is switched on. If 5 seconds pass
- * // without a key being pressed, then the LCD back-light is switched off. In
- * // this case, the timer is a one-shot timer, and unlike the example given for
- * // the xTimerReset() function, the key press event handler is an interrupt
- * // service routine.
- *
- * // The callback function assigned to the one-shot timer. In this case the
- * // parameter is not used.
- * void vBacklightTimerCallback( xTimerHandle pxTimer )
- * {
- * // The timer expired, therefore 5 seconds must have passed since a key
- * // was pressed. Switch off the LCD back-light.
- * vSetBacklightState( BACKLIGHT_OFF );
- * }
- *
- * // The key press interrupt service routine.
- * void vKeyPressEventInterruptHandler( void )
- * {
- * portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
- *
- * // Ensure the LCD back-light is on, then reset the timer that is
- * // responsible for turning the back-light off after 5 seconds of
- * // key inactivity. This is an interrupt service routine so can only
- * // call FreeRTOS API functions that end in "FromISR".
- * vSetBacklightState( BACKLIGHT_ON );
- *
- * // xTimerStartFromISR() or xTimerResetFromISR() could be called here
- * // as both cause the timer to re-calculate its expiry time.
- * // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
- * // declared (in this function).
- * if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
- * {
- * // The reset command was not executed successfully. Take appropriate
- * // action here.
- * }
- *
- * // Perform the rest of the key processing here.
- *
- * // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
- * // should be performed. The syntax required to perform a context switch
- * // from inside an ISR varies from port to port, and from compiler to
- * // compiler. Inspect the demos for the port you are using to find the
- * // actual syntax required.
- * if( xHigherPriorityTaskWoken != pdFALSE )
- * {
- * // Call the interrupt safe yield function here (actual function
- * // depends on the FreeRTOS port being used.
- * }
- * }
- */
-#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
-
-/*
- * Functions beyond this part are not part of the public API and are intended
- * for use by the kernel only.
- */
-portBASE_TYPE xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
-portBASE_TYPE xTimerGenericCommand( xTimerHandle xTimer, portBASE_TYPE xCommandID, portTickType xOptionalValue, portBASE_TYPE *pxHigherPriorityTaskWoken, portTickType xBlockTime ) PRIVILEGED_FUNCTION;
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* TIMERS_H */
-
-
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-#include "os/croutine.h"
-
-/*
- * Some kernel aware debuggers require data to be viewed to be global, rather
- * than file scope.
- */
-#ifdef portREMOVE_STATIC_QUALIFIER
- #define static
-#endif
-
-
-/* Lists for ready and blocked co-routines. --------------------*/
-static xList pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */
-static xList xDelayedCoRoutineList1; /*< Delayed co-routines. */
-static xList xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */
-static xList * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */
-static xList * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */
-static xList xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */
-
-/* Other file private variables. --------------------------------*/
-corCRCB * pxCurrentCoRoutine = NULL;
-static unsigned portBASE_TYPE uxTopCoRoutineReadyPriority = 0;
-static portTickType xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0;
-
-/* The initial state of the co-routine when it is created. */
-#define corINITIAL_STATE ( 0 )
-
-/*
- * Place the co-routine represented by pxCRCB into the appropriate ready queue
- * for the priority. It is inserted at the end of the list.
- *
- * This macro accesses the co-routine ready lists and therefore must not be
- * used from within an ISR.
- */
-#define prvAddCoRoutineToReadyQueue( pxCRCB ) \
-{ \
- if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \
- { \
- uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \
- } \
- vListInsertEnd( ( xList * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \
-}
-
-/*
- * Utility to ready all the lists used by the scheduler. This is called
- * automatically upon the creation of the first co-routine.
- */
-static void prvInitialiseCoRoutineLists( void );
-
-/*
- * Co-routines that are readied by an interrupt cannot be placed directly into
- * the ready lists (there is no mutual exclusion). Instead they are placed in
- * in the pending ready list in order that they can later be moved to the ready
- * list by the co-routine scheduler.
- */
-static void prvCheckPendingReadyList( void );
-
-/*
- * Macro that looks at the list of co-routines that are currently delayed to
- * see if any require waking.
- *
- * Co-routines are stored in the queue in the order of their wake time -
- * meaning once one co-routine has been found whose timer has not expired
- * we need not look any further down the list.
- */
-static void prvCheckDelayedList( void );
-
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, unsigned portBASE_TYPE uxPriority, unsigned portBASE_TYPE uxIndex )
-{
-signed portBASE_TYPE xReturn;
-corCRCB *pxCoRoutine;
-
- /* Allocate the memory that will store the co-routine control block. */
- pxCoRoutine = ( corCRCB * ) pvPortMalloc( sizeof( corCRCB ) );
- if( pxCoRoutine )
- {
- /* If pxCurrentCoRoutine is NULL then this is the first co-routine to
- be created and the co-routine data structures need initialising. */
- if( pxCurrentCoRoutine == NULL )
- {
- pxCurrentCoRoutine = pxCoRoutine;
- prvInitialiseCoRoutineLists();
- }
-
- /* Check the priority is within limits. */
- if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES )
- {
- uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1;
- }
-
- /* Fill out the co-routine control block from the function parameters. */
- pxCoRoutine->uxState = corINITIAL_STATE;
- pxCoRoutine->uxPriority = uxPriority;
- pxCoRoutine->uxIndex = uxIndex;
- pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode;
-
- /* Initialise all the other co-routine control block parameters. */
- vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) );
- vListInitialiseItem( &( pxCoRoutine->xEventListItem ) );
-
- /* Set the co-routine control block as a link back from the xListItem.
- This is so we can get back to the containing CRCB from a generic item
- in a list. */
- listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine );
- listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine );
-
- /* Event lists are always in priority order. */
- listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority );
-
- /* Now the co-routine has been initialised it can be added to the ready
- list at the correct priority. */
- prvAddCoRoutineToReadyQueue( pxCoRoutine );
-
- xReturn = pdPASS;
- }
- else
- {
- xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
- }
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vCoRoutineAddToDelayedList( portTickType xTicksToDelay, xList *pxEventList )
-{
-portTickType xTimeToWake;
-
- /* Calculate the time to wake - this may overflow but this is
- not a problem. */
- xTimeToWake = xCoRoutineTickCount + xTicksToDelay;
-
- /* We must remove ourselves from the ready list before adding
- ourselves to the blocked list as the same list item is used for
- both lists. */
- vListRemove( ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );
-
- /* The list item will be inserted in wake time order. */
- listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake );
-
- if( xTimeToWake < xCoRoutineTickCount )
- {
- /* Wake time has overflowed. Place this item in the
- overflow list. */
- vListInsert( ( xList * ) pxOverflowDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );
- }
- else
- {
- /* The wake time has not overflowed, so we can use the
- current block list. */
- vListInsert( ( xList * ) pxDelayedCoRoutineList, ( xListItem * ) &( pxCurrentCoRoutine->xGenericListItem ) );
- }
-
- if( pxEventList )
- {
- /* Also add the co-routine to an event list. If this is done then the
- function must be called with interrupts disabled. */
- vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) );
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckPendingReadyList( void )
-{
- /* Are there any co-routines waiting to get moved to the ready list? These
- are co-routines that have been readied by an ISR. The ISR cannot access
- the ready lists itself. */
- while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE )
- {
- corCRCB *pxUnblockedCRCB;
-
- /* The pending ready list can be accessed by an ISR. */
- portDISABLE_INTERRUPTS();
- {
- pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) );
- vListRemove( &( pxUnblockedCRCB->xEventListItem ) );
- }
- portENABLE_INTERRUPTS();
-
- vListRemove( &( pxUnblockedCRCB->xGenericListItem ) );
- prvAddCoRoutineToReadyQueue( pxUnblockedCRCB );
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckDelayedList( void )
-{
-corCRCB *pxCRCB;
-
- xPassedTicks = xTaskGetTickCount() - xLastTickCount;
- while( xPassedTicks )
- {
- xCoRoutineTickCount++;
- xPassedTicks--;
-
- /* If the tick count has overflowed we need to swap the ready lists. */
- if( xCoRoutineTickCount == 0 )
- {
- xList * pxTemp;
-
- /* Tick count has overflowed so we need to swap the delay lists. If there are
- any items in pxDelayedCoRoutineList here then there is an error! */
- pxTemp = pxDelayedCoRoutineList;
- pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList;
- pxOverflowDelayedCoRoutineList = pxTemp;
- }
-
- /* See if this tick has made a timeout expire. */
- while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE )
- {
- pxCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList );
-
- if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) )
- {
- /* Timeout not yet expired. */
- break;
- }
-
- portDISABLE_INTERRUPTS();
- {
- /* The event could have occurred just before this critical
- section. If this is the case then the generic list item will
- have been moved to the pending ready list and the following
- line is still valid. Also the pvContainer parameter will have
- been set to NULL so the following lines are also valid. */
- vListRemove( &( pxCRCB->xGenericListItem ) );
-
- /* Is the co-routine waiting on an event also? */
- if( pxCRCB->xEventListItem.pvContainer )
- {
- vListRemove( &( pxCRCB->xEventListItem ) );
- }
- }
- portENABLE_INTERRUPTS();
-
- prvAddCoRoutineToReadyQueue( pxCRCB );
- }
- }
-
- xLastTickCount = xCoRoutineTickCount;
-}
-/*-----------------------------------------------------------*/
-
-void vCoRoutineSchedule( void )
-{
- /* See if any co-routines readied by events need moving to the ready lists. */
- prvCheckPendingReadyList();
-
- /* See if any delayed co-routines have timed out. */
- prvCheckDelayedList();
-
- /* Find the highest priority queue that contains ready co-routines. */
- while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) )
- {
- if( uxTopCoRoutineReadyPriority == 0 )
- {
- /* No more co-routines to check. */
- return;
- }
- --uxTopCoRoutineReadyPriority;
- }
-
- /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines
- of the same priority get an equal share of the processor time. */
- listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) );
-
- /* Call the co-routine. */
- ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex );
-
- return;
-}
-/*-----------------------------------------------------------*/
-
-static void prvInitialiseCoRoutineLists( void )
-{
-unsigned portBASE_TYPE uxPriority;
-
- for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ )
- {
- vListInitialise( ( xList * ) &( pxReadyCoRoutineLists[ uxPriority ] ) );
- }
-
- vListInitialise( ( xList * ) &xDelayedCoRoutineList1 );
- vListInitialise( ( xList * ) &xDelayedCoRoutineList2 );
- vListInitialise( ( xList * ) &xPendingReadyCoRoutineList );
-
- /* Start with pxDelayedCoRoutineList using list1 and the
- pxOverflowDelayedCoRoutineList using list2. */
- pxDelayedCoRoutineList = &xDelayedCoRoutineList1;
- pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2;
-}
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xCoRoutineRemoveFromEventList( const xList *pxEventList )
-{
-corCRCB *pxUnblockedCRCB;
-signed portBASE_TYPE xReturn;
-
- /* This function is called from within an interrupt. It can only access
- event lists and the pending ready list. This function assumes that a
- check has already been made to ensure pxEventList is not empty. */
- pxUnblockedCRCB = ( corCRCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
- vListRemove( &( pxUnblockedCRCB->xEventListItem ) );
- vListInsertEnd( ( xList * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) );
-
- if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority )
- {
- xReturn = pdTRUE;
- }
- else
- {
- xReturn = pdFALSE;
- }
-
- return xReturn;
-}
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-/*
- * A sample implementation of pvPortMalloc() and vPortFree() that permits
- * allocated blocks to be freed, but does not combine adjacent free blocks
- * into a single larger block.
- *
- * See heap_1.c and heap_3.c for alternative implementations, and the memory
- * management pages of http://www.FreeRTOS.org for more information.
- */
-#include <stdlib.h>
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers. That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* Allocate the memory for the heap. The struct is used to force byte
-alignment without using any non-portable code. */
-static union xRTOS_HEAP
-{
- #if portBYTE_ALIGNMENT == 8
- volatile portDOUBLE dDummy;
- #else
- volatile unsigned long ulDummy;
- #endif
- unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
-} xHeap;
-
-/* Define the linked list structure. This is used to link free blocks in order
-of their size. */
-typedef struct A_BLOCK_LINK
-{
- struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */
- size_t xBlockSize; /*<< The size of the free block. */
-} xBlockLink;
-
-
-static const unsigned short heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + portBYTE_ALIGNMENT - ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) );
-#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )
-
-/* Create a couple of list links to mark the start and end of the list. */
-static xBlockLink xStart, xEnd;
-
-/* Keeps track of the number of free bytes remaining, but says nothing about
-fragmentation. */
-static size_t xFreeBytesRemaining = configTOTAL_HEAP_SIZE;
-
-/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */
-
-/*
- * Insert a block into the list of free blocks - which is ordered by size of
- * the block. Small blocks at the start of the list and large blocks at the end
- * of the list.
- */
-#define prvInsertBlockIntoFreeList( pxBlockToInsert ) \
-{ \
-xBlockLink *pxIterator; \
-size_t xBlockSize; \
- \
- xBlockSize = pxBlockToInsert->xBlockSize; \
- \
- /* Iterate through the list until a block is found that has a larger size */ \
- /* than the block we are inserting. */ \
- for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock ) \
- { \
- /* There is nothing to do here - just iterate to the correct position. */ \
- } \
- \
- /* Update the list to include the block being inserted in the correct */ \
- /* position. */ \
- pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; \
- pxIterator->pxNextFreeBlock = pxBlockToInsert; \
-}
-/*-----------------------------------------------------------*/
-
-#define prvHeapInit() \
-{ \
-xBlockLink *pxFirstFreeBlock; \
- \
- /* xStart is used to hold a pointer to the first item in the list of free */ \
- /* blocks. The void cast is used to prevent compiler warnings. */ \
- xStart.pxNextFreeBlock = ( void * ) xHeap.ucHeap; \
- xStart.xBlockSize = ( size_t ) 0; \
- \
- /* xEnd is used to mark the end of the list of free blocks. */ \
- xEnd.xBlockSize = configTOTAL_HEAP_SIZE; \
- xEnd.pxNextFreeBlock = NULL; \
- \
- /* To start with there is a single free block that is sized to take up the \
- entire heap space. */ \
- pxFirstFreeBlock = ( void * ) xHeap.ucHeap; \
- pxFirstFreeBlock->xBlockSize = configTOTAL_HEAP_SIZE; \
- pxFirstFreeBlock->pxNextFreeBlock = &xEnd; \
-}
-/*-----------------------------------------------------------*/
-
-void *pvPortMalloc( size_t xWantedSize )
-{
-xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
-static portBASE_TYPE xHeapHasBeenInitialised = pdFALSE;
-void *pvReturn = NULL;
-
- vTaskSuspendAll();
- {
- /* If this is the first call to malloc then the heap will require
- initialisation to setup the list of free blocks. */
- if( xHeapHasBeenInitialised == pdFALSE )
- {
- prvHeapInit();
- xHeapHasBeenInitialised = pdTRUE;
- }
-
- /* The wanted size is increased so it can contain a xBlockLink
- structure in addition to the requested amount of bytes. */
- if( xWantedSize > 0 )
- {
- xWantedSize += heapSTRUCT_SIZE;
-
- /* Ensure that blocks are always aligned to the required number of bytes. */
- if( xWantedSize & portBYTE_ALIGNMENT_MASK )
- {
- /* Byte alignment required. */
- xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
- }
- }
-
- if( ( xWantedSize > 0 ) && ( xWantedSize < configTOTAL_HEAP_SIZE ) )
- {
- /* Blocks are stored in byte order - traverse the list from the start
- (smallest) block until one of adequate size is found. */
- pxPreviousBlock = &xStart;
- pxBlock = xStart.pxNextFreeBlock;
- while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock ) )
- {
- pxPreviousBlock = pxBlock;
- pxBlock = pxBlock->pxNextFreeBlock;
- }
-
- /* If we found the end marker then a block of adequate size was not found. */
- if( pxBlock != &xEnd )
- {
- /* Return the memory space - jumping over the xBlockLink structure
- at its start. */
- pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );
-
- /* This block is being returned for use so must be taken our of the
- list of free blocks. */
- pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
-
- /* If the block is larger than required it can be split into two. */
- if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
- {
- /* This block is to be split into two. Create a new block
- following the number of bytes requested. The void cast is
- used to prevent byte alignment warnings from the compiler. */
- pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize );
-
- /* Calculate the sizes of two blocks split from the single
- block. */
- pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
- pxBlock->xBlockSize = xWantedSize;
-
- /* Insert the new block into the list of free blocks. */
- prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
- }
-
- xFreeBytesRemaining -= pxBlock->xBlockSize;
- }
- }
- }
- xTaskResumeAll();
-
- #if( configUSE_MALLOC_FAILED_HOOK == 1 )
- {
- if( pvReturn == NULL )
- {
- extern void vApplicationMallocFailedHook( void );
- vApplicationMallocFailedHook();
- }
- }
- #endif
-
- return pvReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vPortFree( void *pv )
-{
-unsigned char *puc = ( unsigned char * ) pv;
-xBlockLink *pxLink;
-
- if( pv )
- {
- /* The memory being freed will have an xBlockLink structure immediately
- before it. */
- puc -= heapSTRUCT_SIZE;
-
- /* This casting is to keep the compiler from issuing warnings. */
- pxLink = ( void * ) puc;
-
- vTaskSuspendAll();
- {
- /* Add this block to the list of free blocks. */
- prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) );
- xFreeBytesRemaining += pxLink->xBlockSize;
- }
- xTaskResumeAll();
- }
-}
-/*-----------------------------------------------------------*/
-
-size_t xPortGetFreeHeapSize( void )
-{
- return xFreeBytesRemaining;
-}
-/*-----------------------------------------------------------*/
-
-void vPortInitialiseBlocks( void )
-{
- /* This just exists to keep the linker quiet. */
-}
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-
-#include <stdlib.h>
-#include "os/FreeRTOS.h"
-#include "os/list.h"
-
-/*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
-
-void vListInitialise( xList *pxList )
-{
- /* The list structure contains a list item which is used to mark the
- end of the list. To initialise the list the list end is inserted
- as the only list entry. */
- pxList->pxIndex = ( xListItem * ) &( pxList->xListEnd );
-
- /* The list end value is the highest possible value in the list to
- ensure it remains at the end of the list. */
- pxList->xListEnd.xItemValue = portMAX_DELAY;
-
- /* The list end next and previous pointers point to itself so we know
- when the list is empty. */
- pxList->xListEnd.pxNext = ( xListItem * ) &( pxList->xListEnd );
- pxList->xListEnd.pxPrevious = ( xListItem * ) &( pxList->xListEnd );
-
- pxList->uxNumberOfItems = ( unsigned portBASE_TYPE ) 0U;
-}
-/*-----------------------------------------------------------*/
-
-void vListInitialiseItem( xListItem *pxItem )
-{
- /* Make sure the list item is not recorded as being on a list. */
- pxItem->pvContainer = NULL;
-}
-/*-----------------------------------------------------------*/
-
-void vListInsertEnd( xList *pxList, xListItem *pxNewListItem )
-{
-volatile xListItem * pxIndex;
-
- /* Insert a new list item into pxList, but rather than sort the list,
- makes the new list item the last item to be removed by a call to
- pvListGetOwnerOfNextEntry. This means it has to be the item pointed to by
- the pxIndex member. */
- pxIndex = pxList->pxIndex;
-
- pxNewListItem->pxNext = pxIndex->pxNext;
- pxNewListItem->pxPrevious = pxList->pxIndex;
- pxIndex->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem;
- pxIndex->pxNext = ( volatile xListItem * ) pxNewListItem;
- pxList->pxIndex = ( volatile xListItem * ) pxNewListItem;
-
- /* Remember which list the item is in. */
- pxNewListItem->pvContainer = ( void * ) pxList;
-
- ( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-void vListInsert( xList *pxList, xListItem *pxNewListItem )
-{
-volatile xListItem *pxIterator;
-portTickType xValueOfInsertion;
-
- /* Insert the new list item into the list, sorted in ulListItem order. */
- xValueOfInsertion = pxNewListItem->xItemValue;
-
- /* If the list already contains a list item with the same item value then
- the new list item should be placed after it. This ensures that TCB's which
- are stored in ready lists (all of which have the same ulListItem value)
- get an equal share of the CPU. However, if the xItemValue is the same as
- the back marker the iteration loop below will not end. This means we need
- to guard against this by checking the value first and modifying the
- algorithm slightly if necessary. */
- if( xValueOfInsertion == portMAX_DELAY )
- {
- pxIterator = pxList->xListEnd.pxPrevious;
- }
- else
- {
- /* *** NOTE ***********************************************************
- If you find your application is crashing here then likely causes are:
- 1) Stack overflow -
- see http://www.freertos.org/Stacks-and-stack-overflow-checking.html
- 2) Incorrect interrupt priority assignment, especially on Cortex-M3
- parts where numerically high priority values denote low actual
- interrupt priories, which can seem counter intuitive. See
- configMAX_SYSCALL_INTERRUPT_PRIORITY on http://www.freertos.org/a00110.html
- 3) Calling an API function from within a critical section or when
- the scheduler is suspended.
- 4) Using a queue or semaphore before it has been initialised or
- before the scheduler has been started (are interrupts firing
- before vTaskStartScheduler() has been called?).
- See http://www.freertos.org/FAQHelp.html for more tips.
- **********************************************************************/
-
- for( pxIterator = ( xListItem * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext )
- {
- /* There is nothing to do here, we are just iterating to the
- wanted insertion position. */
- }
- }
-
- pxNewListItem->pxNext = pxIterator->pxNext;
- pxNewListItem->pxNext->pxPrevious = ( volatile xListItem * ) pxNewListItem;
- pxNewListItem->pxPrevious = pxIterator;
- pxIterator->pxNext = ( volatile xListItem * ) pxNewListItem;
-
- /* Remember which list the item is in. This allows fast removal of the
- item later. */
- pxNewListItem->pvContainer = ( void * ) pxList;
-
- ( pxList->uxNumberOfItems )++;
-}
-/*-----------------------------------------------------------*/
-
-void vListRemove( xListItem *pxItemToRemove )
-{
-xList * pxList;
-
- pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
- pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
-
- /* The list item knows which list it is in. Obtain the list from the list
- item. */
- pxList = ( xList * ) pxItemToRemove->pvContainer;
-
- /* Make sure the index is left pointing to a valid item. */
- if( pxList->pxIndex == pxItemToRemove )
- {
- pxList->pxIndex = pxItemToRemove->pxPrevious;
- }
-
- pxItemToRemove->pvContainer = NULL;
- ( pxList->uxNumberOfItems )--;
-}
-/*-----------------------------------------------------------*/
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- FreeRTOS supports many tools and architectures. V7.0.0 is sponsored by:
- Atollic AB - Atollic provides professional embedded systems development
- tools for C/C++ development, code analysis and test automation.
- See http://www.atollic.com
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-/*----------------------------------------------------------------------------*/
-/* Include Files */
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-
-/*----------------------------------------------------------------------------*/
-/* Global Vaiables */
-
-unsigned portLONG ulCriticalNesting = 9999;
-
-/*----------------------------------------------------------------------------*/
-/* Macros */
-
-#define portINITIAL_SPSR ((portSTACK_TYPE) 0x1F)
-#define portINITIAL_FPSCR ((portSTACK_TYPE) 0x00)
-#define portINSTRUCTION_SIZE ((portSTACK_TYPE) 0x04)
-#define portNO_CRITICAL_SECTION_NESTING ((portSTACK_TYPE) 0x00)
-#define portTHUMB_MODE_BIT ((portSTACK_TYPE) 0x20)
-
-/*----------------------------------------------------------------------------*/
-/* pxPortInitialiseStack */
-
-portSTACK_TYPE * pxPortInitialiseStack(portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters)
-{
- portSTACK_TYPE *pxOriginalTOS = pxTopOfStack;
-
- *pxTopOfStack-- = (portSTACK_TYPE) pxCode + portINSTRUCTION_SIZE;
- *pxTopOfStack-- = (portSTACK_TYPE) 0xaaaaaaaa;
- *pxTopOfStack-- = (portSTACK_TYPE) pxOriginalTOS;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x12121212;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x11111111;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x10101010;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x09090909;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x08080808;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x07070707;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x06060606;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x05050505;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x04040404;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x03030303;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x02020202;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x01010101;
- *pxTopOfStack-- = (portSTACK_TYPE) pvParameters;
-
- *pxTopOfStack-- = (portSTACK_TYPE) 0x3F3F3F3F;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x3E3E3E3E;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x3D3D3D3D;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x3C3C3C3C;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x3B3B3B3B;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x3A3A3A3A;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x39393939;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x38383838;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x37373737;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x36363636;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x35353535;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x34343434;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x33333333;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x32323232;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x31313131;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x30303030;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x2F2F2F2F;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x2E2E2E2E;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x2D2D2D2D;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x2C2C2C2C;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x2B2B2B2B;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x2A2A2A2A;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x29292929;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x28282828;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x27272727;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x26262626;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x25252525;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x24242424;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x23232323;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x22222222;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x21212121;
- *pxTopOfStack-- = (portSTACK_TYPE) 0x20202020;
- *pxTopOfStack-- = (portSTACK_TYPE) portINITIAL_FPSCR;
-
- *pxTopOfStack = (portSTACK_TYPE) ((_getCPSRValue_() & ~0xFF) | portINITIAL_SPSR);
-
- if (((unsigned long) pxCode & 0x01UL) != 0x00)
- {
- *pxTopOfStack |= portTHUMB_MODE_BIT;
- }
-
- pxTopOfStack--;
-
- *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING;
-
- return pxTopOfStack;
-}
-
-
-/*----------------------------------------------------------------------------*/
-/* prvSetupTimerInterrupt */
-
-static void prvSetupTimerInterrupt(void)
-{
-#if (configGENERATE_RUN_TIME_STATS == 1)
- RTI->GCTRL &= ~0x00000001U;
-#else
- RTI->GCTRL = 0x00000000U;
-#endif
- RTI->TBCTRL = 0x00000000U;
- RTI->COMPCTRL = 0x00000000U;
- RTI->CNT[0U].UCx = 0x00000000U;
- RTI->CNT[0U].FRCx = 0x00000000U;
- RTI->CNT[0U].CPUCx = 0x00000001U;
- RTI->CMP[0U].COMPx = configCPU_CLOCK_HZ / 2 / configTICK_RATE_HZ;
- RTI->CMP[0U].UDCPx = configCPU_CLOCK_HZ / 2 / configTICK_RATE_HZ;
- RTI->INTFLAG = 0x0007000FU;
- RTI->CLEARINT = 0x00070F0FU;
- RTI->SETINT = 0x00000001U;
- RTI->GCTRL |= 0x00000001U;
-}
-
-
-/*----------------------------------------------------------------------------*/
-/* vPortStartFirstTask */
-
-/* vPortStartFirstSTask() is defined in portASM.asm */
-extern void vPortStartFirstTask(void);
-
-
-/*----------------------------------------------------------------------------*/
-/* xPortStartScheduler */
-
-portBASE_TYPE xPortStartScheduler(void)
-{
- /* Start the timer that generates the tick ISR. */
- prvSetupTimerInterrupt();
- /* Start the first task. This is done from portASM.asm as ARM mode must be
- used. */
- vPortStartFirstTask();
- /* Should not get here! */
- return 0;
-}
-
-
-/*----------------------------------------------------------------------------*/
-/* vPortEndScheduler */
-
-void vPortEndScheduler(void)
-{
- /* It is unlikely that the ARM port will require this function as there
- is nothing to return to. If this is required - stop the tick ISR then
- return back to main. */
-}
-
-
-/*----------------------------------------------------------------------------*/
-/* vNonPreemptiveTick / vPreemptiveTick */
-
-#if configUSE_PREEMPTION == 0
-
- /* The cooperative scheduler requires a normal IRQ service routine to
- * simply increment the system tick. */
- __interrupt void vNonPreemptiveTick( void )
- {
- /* clear clock interrupt flag */
- RTI->INTFLAG = 0x00000001;
-
- /* Increment the tick count - this may make a delaying task ready
- to run - but a context switch is not performed. */
- vTaskIncrementTick();
- }
-
- #else
-
- /*
- **************************************************************************
- * The preemptive scheduler ISR is written in assembler and can be found
- * in the portASM.asm file. This will only get used if portUSE_PREEMPTION
- * is set to 1 in portmacro.h
- **************************************************************************
- */
- void vPreemptiveTick(void);
-
-#endif
-
-
-
-/*----------------------------------------------------------------------------*/
-/* vPortEnterCritical */
-
-void vPortEnterCritical(void)
-{
- /* Disable interrupts as per portDISABLE_INTERRUPTS(); */
- portDISABLE_INTERRUPTS();
- /* Now interrupts are disabled ulCriticalNesting can be accessed
- directly. Increment ulCriticalNesting to keep a count of how many times
- portENTER_CRITICAL() has been called. */
- ulCriticalNesting++;
-}
-
-
-/*----------------------------------------------------------------------------*/
-/* vPortExitCritical */
-
-void vPortExitCritical(void)
-{
- if(ulCriticalNesting > 0)
- {
- /* Decrement the nesting count as we are leaving a critical section. */
- ulCriticalNesting--;
-
- /* If the nesting level has reached zero then interrupts should be
- re-enabled. */
- if(ulCriticalNesting == 0)
- {
- /* Enable interrupts as per portENABLE_INTERRUPTS(). */
- portENABLE_INTERRUPTS();
- }
- }
-}
-
-/*----------------------------------------------------------------------------*/
+++ /dev/null
-;/*
-; FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-;
-;
-; ***************************************************************************
-; * *
-; * FreeRTOS tutorial books are available in pdf and paperback. *
-; * Complete, revised, and edited pdf reference manuals are also *
-; * available. *
-; * *
-; * Purchasing FreeRTOS documentation will not only help you, by *
-; * ensuring you get running as quickly as possible and with an *
-; * in-depth knowledge of how to use FreeRTOS, it will also help *
-; * the FreeRTOS project to continue with its mission of providing *
-; * professional grade, cross platform, de facto standard solutions *
-; * for microcontrollers - completely free of charge! *
-; * *
-; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
-; * *
-; * Thank you for using FreeRTOS, and thank you for your support! *
-; * *
-; ***************************************************************************
-;
-;
-; This file is part of the FreeRTOS distribution.
-;
-; FreeRTOS is free software; you can redistribute it and/or modify it under
-; the terms of the GNU General Public License (version 2) as published by the
-; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
-; >>>NOTE<<< The modification to the GPL is included to allow you to
-; distribute a combined work that includes FreeRTOS without being obliged to
-; provide the source code for proprietary components outside of the FreeRTOS
-; kernel. FreeRTOS is distributed in the hope that it will be useful, but
-; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-; more details. You should have received a copy of the GNU General Public
-; License and the FreeRTOS license exception along with FreeRTOS; if not it
-; can be viewed here: http://www.freertos.org/a00114.html and also obtained
-; by writing to Richard Barry, contact details for whom are available on the
-; FreeRTOS WEB site.
-;
-; 1 tab == 4 spaces!
-;
-; http://www.FreeRTOS.org - Documentation, latest information, license and
-; contact details.
-;
-; http://www.SafeRTOS.com - A version that is certified for use in safety
-; critical systems.
-;
-; http://www.OpenRTOS.com - Commercial support, development, porting,
-; licensing and training services.
-;*/
-
- .text
- .arm
-
-
-;-------------------------------------------------------------------------------
-; Save Task Context
-;
-portSAVE_CONTEXT .macro
- stmfd sp!, {r0}
- stmfd sp, {sp}^
- sub sp, sp, #4
- ldmfd sp!, {r0}
- stmfd r0!, {lr}
- mov lr, r0
- ldmfd sp!, {r0}
- stmfd lr, {r0-lr}^
- sub lr, lr, #0x3C
- fstmdbd lr!, {d0-d15}
- mrs r0, spsr
- fmrx r1, fpscr
- stmfd lr!, {r0,r1}
- ldr r0, critNest
- ldr r0, [r0]
- stmfd lr!, {r0}
- ldr r0, curTCB
- ldr r0, [r0]
- str lr, [r0]
- .endm
-
-;-------------------------------------------------------------------------------
-; Restore Task Context
-;
-portRESTORE_CONTEXT .macro
- ldr r0, curTCB
- ldr r0, [r0]
- ldr lr, [r0]
- ldr r0, critNest
- ldmfd lr!, {r1}
- str r1, [r0]
- ldmfd lr!, {r0,r1}
- fldmiad lr!, {d0-d15}
- fmxr fpscr, r1
- msr spsr_csxf, r0
- ldmfd lr, {r0-r14}^
- ldr lr, [lr, #0x3C]
- subs pc, lr, #4
- .endm
-
-;-------------------------------------------------------------------------------
-; Start First Task
-
- .def vPortStartFirstTask
-
- .asmfunc
-vPortStartFirstTask
- portRESTORE_CONTEXT
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Yield Processor
-
- .def vPortYieldProcessor
- .ref vTaskSwitchContext
-
- .asmfunc
-vPortYieldProcessor
- add lr, lr, #4
- portSAVE_CONTEXT
- bl vTaskSwitchContext
- portRESTORE_CONTEXT
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Preemptive Tick
-
- .def vPreemptiveTick
- .ref vTaskIncrementTick
-
- .asmfunc
-vPreemptiveTick
- portSAVE_CONTEXT
- stmfd sp!, {r0, r1}
- ; clear interrupt flag
- ldr r0, intFlag
- mov r1, #1
- str r1, [r0]
- bl vTaskIncrementTick
- bl vTaskSwitchContext
- ldmfd sp!, {r0, r1}
- portRESTORE_CONTEXT
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; isr stub
-
-
-;-------------------------------------------------------------------------------
-; Port yield
-
- .def vPortYield
-
- .asmfunc
-vPortYield
- svc #0
- bx lr
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Global Definitions
-
- .ref pxCurrentTCB
- .ref ulCriticalNesting
-
-intFlag .word 0xFFFFFC88
-curTCB .word pxCurrentTCB
-critNest .word ulCriticalNesting
-
-
-
-;-------------------------------------------------------------------------------
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-#include <stdlib.h>
-#include <string.h>
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers. That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-
-#if ( configUSE_CO_ROUTINES == 1 )
- #include "os/croutine.h"
-#endif
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/*-----------------------------------------------------------
- * PUBLIC LIST API documented in list.h
- *----------------------------------------------------------*/
-
-/* Constants used with the cRxLock and cTxLock structure members. */
-#define queueUNLOCKED ( ( signed portBASE_TYPE ) -1 )
-#define queueLOCKED_UNMODIFIED ( ( signed portBASE_TYPE ) 0 )
-
-#define queueERRONEOUS_UNBLOCK ( -1 )
-
-/* For internal use only. */
-#define queueSEND_TO_BACK ( 0 )
-#define queueSEND_TO_FRONT ( 1 )
-
-/* Effectively make a union out of the xQUEUE structure. */
-#define pxMutexHolder pcTail
-#define uxQueueType pcHead
-#define uxRecursiveCallCount pcReadFrom
-#define queueQUEUE_IS_MUTEX NULL
-
-/* Semaphores do not actually store or copy data, so have an items size of
-zero. */
-#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( unsigned portBASE_TYPE ) 0 )
-#define queueDONT_BLOCK ( ( portTickType ) 0U )
-#define queueMUTEX_GIVE_BLOCK_TIME ( ( portTickType ) 0U )
-
-/*
- * Definition of the queue used by the scheduler.
- * Items are queued by copy, not reference.
- */
-typedef struct QueueDefinition
-{
- signed char *pcHead; /*< Points to the beginning of the queue storage area. */
- signed char *pcTail; /*< Points to the byte at the end of the queue storage area. Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
-
- signed char *pcWriteTo; /*< Points to the free next place in the storage area. */
- signed char *pcReadFrom; /*< Points to the last place that a queued item was read from. */
-
- xList xTasksWaitingToSend; /*< List of tasks that are blocked waiting to post onto this queue. Stored in priority order. */
- xList xTasksWaitingToReceive; /*< List of tasks that are blocked waiting to read from this queue. Stored in priority order. */
-
- volatile unsigned portBASE_TYPE uxMessagesWaiting;/*< The number of items currently in the queue. */
- unsigned portBASE_TYPE uxLength; /*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
- unsigned portBASE_TYPE uxItemSize; /*< The size of each items that the queue will hold. */
-
- signed portBASE_TYPE xRxLock; /*< Stores the number of items received from the queue (removed from the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */
- signed portBASE_TYPE xTxLock; /*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked. Set to queueUNLOCKED when the queue is not locked. */
-
-} xQUEUE;
-/*-----------------------------------------------------------*/
-
-/*
- * Inside this file xQueueHandle is a pointer to a xQUEUE structure.
- * To keep the definition private the API header file defines it as a
- * pointer to void.
- */
-typedef xQUEUE * xQueueHandle;
-
-/*
- * Prototypes for public functions are included here so we don't have to
- * include the API header file (as it defines xQueueHandle differently). These
- * functions are documented in the API header file.
- */
-xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION;
-unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-void vQueueDelete( xQueueHandle xQueue ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE *pxHigherPriorityTaskWoken, portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken ) PRIVILEGED_FUNCTION;
-xQueueHandle xQueueCreateMutex( void ) PRIVILEGED_FUNCTION;
-xQueueHandle xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount ) PRIVILEGED_FUNCTION;
-portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime ) PRIVILEGED_FUNCTION;
-portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle xMutex ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-void vQueueWaitForMessageRestricted( xQueueHandle pxQueue, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;
-
-/*
- * Co-routine queue functions differ from task queue functions. Co-routines are
- * an optional component.
- */
-#if configUSE_CO_ROUTINES == 1
- signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken ) PRIVILEGED_FUNCTION;
- signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxTaskWoken ) PRIVILEGED_FUNCTION;
- signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;
- signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * The queue registry is just a means for kernel aware debuggers to locate
- * queue structures. It has no other purpose so is an optional component.
- */
-#if configQUEUE_REGISTRY_SIZE > 0
-
- /* The type stored within the queue registry array. This allows a name
- to be assigned to each queue making kernel aware debugging a little
- more user friendly. */
- typedef struct QUEUE_REGISTRY_ITEM
- {
- signed char *pcQueueName;
- xQueueHandle xHandle;
- } xQueueRegistryItem;
-
- /* The queue registry is simply an array of xQueueRegistryItem structures.
- The pcQueueName member of a structure being NULL is indicative of the
- array position being vacant. */
- xQueueRegistryItem xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
-
- /* Removes a queue from the registry by simply setting the pcQueueName
- member to NULL. */
- static void vQueueUnregisterQueue( xQueueHandle xQueue ) PRIVILEGED_FUNCTION;
- void vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcQueueName ) PRIVILEGED_FUNCTION;
-#endif
-
-/*
- * Unlocks a queue locked by a call to prvLockQueue. Locking a queue does not
- * prevent an ISR from adding or removing items to the queue, but does prevent
- * an ISR from removing tasks from the queue event lists. If an ISR finds a
- * queue is locked it will instead increment the appropriate queue lock count
- * to indicate that a task may require unblocking. When the queue in unlocked
- * these lock counts are inspected, and the appropriate action taken.
- */
-static void prvUnlockQueue( xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Uses a critical section to determine if there is any data in a queue.
- *
- * @return pdTRUE if the queue contains no items, otherwise pdFALSE.
- */
-static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Uses a critical section to determine if there is any space in a queue.
- *
- * @return pdTRUE if there is no space, otherwise pdFALSE;
- */
-static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue ) PRIVILEGED_FUNCTION;
-
-/*
- * Copies an item into the queue, either at the front of the queue or the
- * back of the queue.
- */
-static void prvCopyDataToQueue( xQUEUE *pxQueue, const void *pvItemToQueue, portBASE_TYPE xPosition ) PRIVILEGED_FUNCTION;
-
-/*
- * Copies an item out of a queue.
- */
-static void prvCopyDataFromQueue( xQUEUE * const pxQueue, const void *pvBuffer ) PRIVILEGED_FUNCTION;
-/*-----------------------------------------------------------*/
-
-/*
- * Macro to mark a queue as locked. Locking a queue prevents an ISR from
- * accessing the queue event lists.
- */
-#define prvLockQueue( pxQueue ) \
- taskENTER_CRITICAL(); \
- { \
- if( ( pxQueue )->xRxLock == queueUNLOCKED ) \
- { \
- ( pxQueue )->xRxLock = queueLOCKED_UNMODIFIED; \
- } \
- if( ( pxQueue )->xTxLock == queueUNLOCKED ) \
- { \
- ( pxQueue )->xTxLock = queueLOCKED_UNMODIFIED; \
- } \
- } \
- taskEXIT_CRITICAL()
-/*-----------------------------------------------------------*/
-
-
-/*-----------------------------------------------------------
- * PUBLIC QUEUE MANAGEMENT API documented in queue.h
- *----------------------------------------------------------*/
-
-xQueueHandle xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
-{
-xQUEUE *pxNewQueue;
-size_t xQueueSizeInBytes;
-xQueueHandle xReturn = NULL;
-
- /* Allocate the new queue structure. */
- if( uxQueueLength > ( unsigned portBASE_TYPE ) 0 )
- {
- pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) );
- if( pxNewQueue != NULL )
- {
- /* Create the list of pointers to queue items. The queue is one byte
- longer than asked for to make wrap checking easier/faster. */
- xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ) + ( size_t ) 1;
-
- pxNewQueue->pcHead = ( signed char * ) pvPortMalloc( xQueueSizeInBytes );
- if( pxNewQueue->pcHead != NULL )
- {
- /* Initialise the queue members as described above where the
- queue type is defined. */
- pxNewQueue->pcTail = pxNewQueue->pcHead + ( uxQueueLength * uxItemSize );
- pxNewQueue->uxMessagesWaiting = ( unsigned portBASE_TYPE ) 0U;
- pxNewQueue->pcWriteTo = pxNewQueue->pcHead;
- pxNewQueue->pcReadFrom = pxNewQueue->pcHead + ( ( uxQueueLength - ( unsigned portBASE_TYPE ) 1U ) * uxItemSize );
- pxNewQueue->uxLength = uxQueueLength;
- pxNewQueue->uxItemSize = uxItemSize;
- pxNewQueue->xRxLock = queueUNLOCKED;
- pxNewQueue->xTxLock = queueUNLOCKED;
-
- /* Likewise ensure the event queues start with the correct state. */
- vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) );
- vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) );
-
- traceQUEUE_CREATE( pxNewQueue );
- xReturn = pxNewQueue;
- }
- else
- {
- traceQUEUE_CREATE_FAILED();
- vPortFree( pxNewQueue );
- }
- }
- }
-
- configASSERT( xReturn );
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
- xQueueHandle xQueueCreateMutex( void )
- {
- xQUEUE *pxNewQueue;
-
- /* Allocate the new queue structure. */
- pxNewQueue = ( xQUEUE * ) pvPortMalloc( sizeof( xQUEUE ) );
- if( pxNewQueue != NULL )
- {
- /* Information required for priority inheritance. */
- pxNewQueue->pxMutexHolder = NULL;
- pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
-
- /* Queues used as a mutex no data is actually copied into or out
- of the queue. */
- pxNewQueue->pcWriteTo = NULL;
- pxNewQueue->pcReadFrom = NULL;
-
- /* Each mutex has a length of 1 (like a binary semaphore) and
- an item size of 0 as nothing is actually copied into or out
- of the mutex. */
- pxNewQueue->uxMessagesWaiting = ( unsigned portBASE_TYPE ) 0U;
- pxNewQueue->uxLength = ( unsigned portBASE_TYPE ) 1U;
- pxNewQueue->uxItemSize = ( unsigned portBASE_TYPE ) 0U;
- pxNewQueue->xRxLock = queueUNLOCKED;
- pxNewQueue->xTxLock = queueUNLOCKED;
-
- /* Ensure the event queues start with the correct state. */
- vListInitialise( &( pxNewQueue->xTasksWaitingToSend ) );
- vListInitialise( &( pxNewQueue->xTasksWaitingToReceive ) );
-
- /* Start with the semaphore in the expected state. */
- xQueueGenericSend( pxNewQueue, NULL, ( portTickType ) 0U, queueSEND_TO_BACK );
-
- traceCREATE_MUTEX( pxNewQueue );
- }
- else
- {
- traceCREATE_MUTEX_FAILED();
- }
-
- configASSERT( pxNewQueue );
- return pxNewQueue;
- }
-
-#endif /* configUSE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if configUSE_RECURSIVE_MUTEXES == 1
-
- portBASE_TYPE xQueueGiveMutexRecursive( xQueueHandle pxMutex )
- {
- portBASE_TYPE xReturn;
-
- configASSERT( pxMutex );
-
- /* If this is the task that holds the mutex then pxMutexHolder will not
- change outside of this task. If this task does not hold the mutex then
- pxMutexHolder can never coincidentally equal the tasks handle, and as
- this is the only condition we are interested in it does not matter if
- pxMutexHolder is accessed simultaneously by another task. Therefore no
- mutual exclusion is required to test the pxMutexHolder variable. */
- if( pxMutex->pxMutexHolder == xTaskGetCurrentTaskHandle() )
- {
- traceGIVE_MUTEX_RECURSIVE( pxMutex );
-
- /* uxRecursiveCallCount cannot be zero if pxMutexHolder is equal to
- the task handle, therefore no underflow check is required. Also,
- uxRecursiveCallCount is only modified by the mutex holder, and as
- there can only be one, no mutual exclusion is required to modify the
- uxRecursiveCallCount member. */
- ( pxMutex->uxRecursiveCallCount )--;
-
- /* Have we unwound the call count? */
- if( pxMutex->uxRecursiveCallCount == 0 )
- {
- /* Return the mutex. This will automatically unblock any other
- task that might be waiting to access the mutex. */
- xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
- }
-
- xReturn = pdPASS;
- }
- else
- {
- /* We cannot give the mutex because we are not the holder. */
- xReturn = pdFAIL;
-
- traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
- }
-
- return xReturn;
- }
-
-#endif /* configUSE_RECURSIVE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if configUSE_RECURSIVE_MUTEXES == 1
-
- portBASE_TYPE xQueueTakeMutexRecursive( xQueueHandle pxMutex, portTickType xBlockTime )
- {
- portBASE_TYPE xReturn;
-
- configASSERT( pxMutex );
-
- /* Comments regarding mutual exclusion as per those within
- xQueueGiveMutexRecursive(). */
-
- traceTAKE_MUTEX_RECURSIVE( pxMutex );
-
- if( pxMutex->pxMutexHolder == xTaskGetCurrentTaskHandle() )
- {
- ( pxMutex->uxRecursiveCallCount )++;
- xReturn = pdPASS;
- }
- else
- {
- xReturn = xQueueGenericReceive( pxMutex, NULL, xBlockTime, pdFALSE );
-
- /* pdPASS will only be returned if we successfully obtained the mutex,
- we may have blocked to reach here. */
- if( xReturn == pdPASS )
- {
- ( pxMutex->uxRecursiveCallCount )++;
- }
- else
- {
- traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
- }
- }
-
- return xReturn;
- }
-
-#endif /* configUSE_RECURSIVE_MUTEXES */
-/*-----------------------------------------------------------*/
-
-#if configUSE_COUNTING_SEMAPHORES == 1
-
- xQueueHandle xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
- {
- xQueueHandle pxHandle;
-
- pxHandle = xQueueCreate( ( unsigned portBASE_TYPE ) uxCountValue, queueSEMAPHORE_QUEUE_ITEM_LENGTH );
-
- if( pxHandle != NULL )
- {
- pxHandle->uxMessagesWaiting = uxInitialCount;
-
- traceCREATE_COUNTING_SEMAPHORE();
- }
- else
- {
- traceCREATE_COUNTING_SEMAPHORE_FAILED();
- }
-
- configASSERT( pxHandle );
- return pxHandle;
- }
-
-#endif /* configUSE_COUNTING_SEMAPHORES */
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xQueueGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
-{
-signed portBASE_TYPE xEntryTimeSet = pdFALSE;
-xTimeOutType xTimeOut;
-
- configASSERT( pxQueue );
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );
-
- /* This function relaxes the coding standard somewhat to allow return
- statements within the function itself. This is done in the interest
- of execution time efficiency. */
- for( ;; )
- {
- taskENTER_CRITICAL();
- {
- /* Is there room on the queue now? To be running we must be
- the highest priority task wanting to access the queue. */
- if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
- {
- traceQUEUE_SEND( pxQueue );
- prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
- /* If there was a task waiting for data to arrive on the
- queue then unblock it now. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) == pdTRUE )
- {
- /* The unblocked task has a priority higher than
- our own so yield immediately. Yes it is ok to do
- this from within the critical section - the kernel
- takes care of that. */
- portYIELD_WITHIN_API();
- }
- }
-
- taskEXIT_CRITICAL();
-
- /* Return to the original privilege level before exiting the
- function. */
- return pdPASS;
- }
- else
- {
- if( xTicksToWait == ( portTickType ) 0 )
- {
- /* The queue was full and no block time is specified (or
- the block time has expired) so leave now. */
- taskEXIT_CRITICAL();
-
- /* Return to the original privilege level before exiting
- the function. */
- traceQUEUE_SEND_FAILED( pxQueue );
- return errQUEUE_FULL;
- }
- else if( xEntryTimeSet == pdFALSE )
- {
- /* The queue was full and a block time was specified so
- configure the timeout structure. */
- vTaskSetTimeOutState( &xTimeOut );
- xEntryTimeSet = pdTRUE;
- }
- }
- }
- taskEXIT_CRITICAL();
-
- /* Interrupts and other tasks can send to and receive from the queue
- now the critical section has been exited. */
-
- vTaskSuspendAll();
- prvLockQueue( pxQueue );
-
- /* Update the timeout state to see if it has expired yet. */
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- {
- if( prvIsQueueFull( pxQueue ) != pdFALSE )
- {
- traceBLOCKING_ON_QUEUE_SEND( pxQueue );
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
-
- /* Unlocking the queue means queue events can effect the
- event list. It is possible that interrupts occurring now
- remove this task from the event list again - but as the
- scheduler is suspended the task will go onto the pending
- ready last instead of the actual ready list. */
- prvUnlockQueue( pxQueue );
-
- /* Resuming the scheduler will move tasks from the pending
- ready list into the ready list - so it is feasible that this
- task is already in a ready list before it yields - in which
- case the yield will not cause a context switch unless there
- is also a higher priority task in the pending ready list. */
- if( xTaskResumeAll() == pdFALSE )
- {
- portYIELD_WITHIN_API();
- }
- }
- else
- {
- /* Try again. */
- prvUnlockQueue( pxQueue );
- ( void ) xTaskResumeAll();
- }
- }
- else
- {
- /* The timeout has expired. */
- prvUnlockQueue( pxQueue );
- ( void ) xTaskResumeAll();
-
- /* Return to the original privilege level before exiting the
- function. */
- traceQUEUE_SEND_FAILED( pxQueue );
- return errQUEUE_FULL;
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-#if configUSE_ALTERNATIVE_API == 1
-
- signed portBASE_TYPE xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
- {
- signed portBASE_TYPE xEntryTimeSet = pdFALSE;
- xTimeOutType xTimeOut;
-
- configASSERT( pxQueue );
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );
-
- for( ;; )
- {
- taskENTER_CRITICAL();
- {
- /* Is there room on the queue now? To be running we must be
- the highest priority task wanting to access the queue. */
- if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
- {
- traceQUEUE_SEND( pxQueue );
- prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
- /* If there was a task waiting for data to arrive on the
- queue then unblock it now. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) == pdTRUE )
- {
- /* The unblocked task has a priority higher than
- our own so yield immediately. */
- portYIELD_WITHIN_API();
- }
- }
-
- taskEXIT_CRITICAL();
- return pdPASS;
- }
- else
- {
- if( xTicksToWait == ( portTickType ) 0 )
- {
- taskEXIT_CRITICAL();
- return errQUEUE_FULL;
- }
- else if( xEntryTimeSet == pdFALSE )
- {
- vTaskSetTimeOutState( &xTimeOut );
- xEntryTimeSet = pdTRUE;
- }
- }
- }
- taskEXIT_CRITICAL();
-
- taskENTER_CRITICAL();
- {
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- {
- if( prvIsQueueFull( pxQueue ) != pdFALSE )
- {
- traceBLOCKING_ON_QUEUE_SEND( pxQueue );
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
- portYIELD_WITHIN_API();
- }
- }
- else
- {
- taskEXIT_CRITICAL();
- traceQUEUE_SEND_FAILED( pxQueue );
- return errQUEUE_FULL;
- }
- }
- taskEXIT_CRITICAL();
- }
- }
-
-#endif /* configUSE_ALTERNATIVE_API */
-/*-----------------------------------------------------------*/
-
-#if configUSE_ALTERNATIVE_API == 1
-
- signed portBASE_TYPE xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
- {
- signed portBASE_TYPE xEntryTimeSet = pdFALSE;
- xTimeOutType xTimeOut;
- signed char *pcOriginalReadPosition;
-
- configASSERT( pxQueue );
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );
-
- for( ;; )
- {
- taskENTER_CRITICAL();
- {
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
- {
- /* Remember our read position in case we are just peeking. */
- pcOriginalReadPosition = pxQueue->pcReadFrom;
-
- prvCopyDataFromQueue( pxQueue, pvBuffer );
-
- if( xJustPeeking == pdFALSE )
- {
- traceQUEUE_RECEIVE( pxQueue );
-
- /* We are actually removing data. */
- --( pxQueue->uxMessagesWaiting );
-
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- {
- /* Record the information required to implement
- priority inheritance should it become necessary. */
- pxQueue->pxMutexHolder = xTaskGetCurrentTaskHandle();
- }
- }
- #endif
-
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) == pdTRUE )
- {
- portYIELD_WITHIN_API();
- }
- }
- }
- else
- {
- traceQUEUE_PEEK( pxQueue );
-
- /* We are not removing the data, so reset our read
- pointer. */
- pxQueue->pcReadFrom = pcOriginalReadPosition;
-
- /* The data is being left in the queue, so see if there are
- any other tasks waiting for the data. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- /* Tasks that are removed from the event list will get added to
- the pending ready list as the scheduler is still suspended. */
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- {
- /* The task waiting has a higher priority than this task. */
- portYIELD_WITHIN_API();
- }
- }
-
- }
-
- taskEXIT_CRITICAL();
- return pdPASS;
- }
- else
- {
- if( xTicksToWait == ( portTickType ) 0 )
- {
- taskEXIT_CRITICAL();
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- }
- else if( xEntryTimeSet == pdFALSE )
- {
- vTaskSetTimeOutState( &xTimeOut );
- xEntryTimeSet = pdTRUE;
- }
- }
- }
- taskEXIT_CRITICAL();
-
- taskENTER_CRITICAL();
- {
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- {
- if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
- {
- traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
-
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- {
- portENTER_CRITICAL();
- vTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder );
- portEXIT_CRITICAL();
- }
- }
- #endif
-
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
- portYIELD_WITHIN_API();
- }
- }
- else
- {
- taskEXIT_CRITICAL();
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- }
- }
- taskEXIT_CRITICAL();
- }
- }
-
-
-#endif /* configUSE_ALTERNATIVE_API */
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xQueueGenericSendFromISR( xQueueHandle pxQueue, const void * const pvItemToQueue, signed portBASE_TYPE *pxHigherPriorityTaskWoken, portBASE_TYPE xCopyPosition )
-{
-signed portBASE_TYPE xReturn;
-unsigned portBASE_TYPE uxSavedInterruptStatus;
-
- configASSERT( pxQueue );
- configASSERT( pxHigherPriorityTaskWoken );
- configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );
-
- /* Similar to xQueueGenericSend, except we don't block if there is no room
- in the queue. Also we don't directly wake a task that was blocked on a
- queue read, instead we return a flag to say whether a context switch is
- required or not (i.e. has a task with a higher priority than us been woken
- by this post). */
- uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
- {
- if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
- {
- traceQUEUE_SEND_FROM_ISR( pxQueue );
-
- prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
-
- /* If the queue is locked we do not alter the event list. This will
- be done when the queue is unlocked later. */
- if( pxQueue->xTxLock == queueUNLOCKED )
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- {
- /* The task waiting has a higher priority so record that a
- context switch is required. */
- *pxHigherPriorityTaskWoken = pdTRUE;
- }
- }
- }
- else
- {
- /* Increment the lock count so the task that unlocks the queue
- knows that data was posted while it was locked. */
- ++( pxQueue->xTxLock );
- }
-
- xReturn = pdPASS;
- }
- else
- {
- traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
- xReturn = errQUEUE_FULL;
- }
- }
- portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
-{
-signed portBASE_TYPE xEntryTimeSet = pdFALSE;
-xTimeOutType xTimeOut;
-signed char *pcOriginalReadPosition;
-
- configASSERT( pxQueue );
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );
-
- /* This function relaxes the coding standard somewhat to allow return
- statements within the function itself. This is done in the interest
- of execution time efficiency. */
-
- for( ;; )
- {
- taskENTER_CRITICAL();
- {
- /* Is there data in the queue now? To be running we must be
- the highest priority task wanting to access the queue. */
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
- {
- /* Remember our read position in case we are just peeking. */
- pcOriginalReadPosition = pxQueue->pcReadFrom;
-
- prvCopyDataFromQueue( pxQueue, pvBuffer );
-
- if( xJustPeeking == pdFALSE )
- {
- traceQUEUE_RECEIVE( pxQueue );
-
- /* We are actually removing data. */
- --( pxQueue->uxMessagesWaiting );
-
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- {
- /* Record the information required to implement
- priority inheritance should it become necessary. */
- pxQueue->pxMutexHolder = xTaskGetCurrentTaskHandle();
- }
- }
- #endif
-
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) == pdTRUE )
- {
- portYIELD_WITHIN_API();
- }
- }
- }
- else
- {
- traceQUEUE_PEEK( pxQueue );
-
- /* We are not removing the data, so reset our read
- pointer. */
- pxQueue->pcReadFrom = pcOriginalReadPosition;
-
- /* The data is being left in the queue, so see if there are
- any other tasks waiting for the data. */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- /* Tasks that are removed from the event list will get added to
- the pending ready list as the scheduler is still suspended. */
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- {
- /* The task waiting has a higher priority than this task. */
- portYIELD_WITHIN_API();
- }
- }
-
- }
-
- taskEXIT_CRITICAL();
- return pdPASS;
- }
- else
- {
- if( xTicksToWait == ( portTickType ) 0 )
- {
- /* The queue was empty and no block time is specified (or
- the block time has expired) so leave now. */
- taskEXIT_CRITICAL();
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- }
- else if( xEntryTimeSet == pdFALSE )
- {
- /* The queue was empty and a block time was specified so
- configure the timeout structure. */
- vTaskSetTimeOutState( &xTimeOut );
- xEntryTimeSet = pdTRUE;
- }
- }
- }
- taskEXIT_CRITICAL();
-
- /* Interrupts and other tasks can send to and receive from the queue
- now the critical section has been exited. */
-
- vTaskSuspendAll();
- prvLockQueue( pxQueue );
-
- /* Update the timeout state to see if it has expired yet. */
- if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
- {
- if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
- {
- traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
-
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- {
- portENTER_CRITICAL();
- {
- vTaskPriorityInherit( ( void * ) pxQueue->pxMutexHolder );
- }
- portEXIT_CRITICAL();
- }
- }
- #endif
-
- vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
- prvUnlockQueue( pxQueue );
- if( xTaskResumeAll() == pdFALSE )
- {
- portYIELD_WITHIN_API();
- }
- }
- else
- {
- /* Try again. */
- prvUnlockQueue( pxQueue );
- ( void ) xTaskResumeAll();
- }
- }
- else
- {
- prvUnlockQueue( pxQueue );
- ( void ) xTaskResumeAll();
- traceQUEUE_RECEIVE_FAILED( pxQueue );
- return errQUEUE_EMPTY;
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xQueueReceiveFromISR( xQueueHandle pxQueue, void * const pvBuffer, signed portBASE_TYPE *pxTaskWoken )
-{
-signed portBASE_TYPE xReturn;
-unsigned portBASE_TYPE uxSavedInterruptStatus;
-
- configASSERT( pxQueue );
- configASSERT( pxTaskWoken );
- configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( unsigned portBASE_TYPE ) 0U ) ) );
-
- uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
- {
- /* We cannot block from an ISR, so check there is data available. */
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
- {
- traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
-
- prvCopyDataFromQueue( pxQueue, pvBuffer );
- --( pxQueue->uxMessagesWaiting );
-
- /* If the queue is locked we will not modify the event list. Instead
- we update the lock count so the task that unlocks the queue will know
- that an ISR has removed data while the queue was locked. */
- if( pxQueue->xRxLock == queueUNLOCKED )
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- {
- /* The task waiting has a higher priority than us so
- force a context switch. */
- *pxTaskWoken = pdTRUE;
- }
- }
- }
- else
- {
- /* Increment the lock count so the task that unlocks the queue
- knows that data was removed while it was locked. */
- ++( pxQueue->xRxLock );
- }
-
- xReturn = pdPASS;
- }
- else
- {
- xReturn = pdFAIL;
- traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
- }
- }
- portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-unsigned portBASE_TYPE uxQueueMessagesWaiting( const xQueueHandle pxQueue )
-{
-unsigned portBASE_TYPE uxReturn;
-
- configASSERT( pxQueue );
-
- taskENTER_CRITICAL();
- uxReturn = pxQueue->uxMessagesWaiting;
- taskEXIT_CRITICAL();
-
- return uxReturn;
-}
-/*-----------------------------------------------------------*/
-
-unsigned portBASE_TYPE uxQueueMessagesWaitingFromISR( const xQueueHandle pxQueue )
-{
-unsigned portBASE_TYPE uxReturn;
-
- configASSERT( pxQueue );
-
- uxReturn = pxQueue->uxMessagesWaiting;
-
- return uxReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vQueueDelete( xQueueHandle pxQueue )
-{
- configASSERT( pxQueue );
-
- traceQUEUE_DELETE( pxQueue );
- vQueueUnregisterQueue( pxQueue );
- vPortFree( pxQueue->pcHead );
- vPortFree( pxQueue );
-}
-/*-----------------------------------------------------------*/
-
-static void prvCopyDataToQueue( xQUEUE *pxQueue, const void *pvItemToQueue, portBASE_TYPE xPosition )
-{
- if( pxQueue->uxItemSize == ( unsigned portBASE_TYPE ) 0 )
- {
- #if ( configUSE_MUTEXES == 1 )
- {
- if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
- {
- /* The mutex is no longer being held. */
- vTaskPriorityDisinherit( ( void * ) pxQueue->pxMutexHolder );
- pxQueue->pxMutexHolder = NULL;
- }
- }
- #endif
- }
- else if( xPosition == queueSEND_TO_BACK )
- {
- memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize );
- pxQueue->pcWriteTo += pxQueue->uxItemSize;
- if( pxQueue->pcWriteTo >= pxQueue->pcTail )
- {
- pxQueue->pcWriteTo = pxQueue->pcHead;
- }
- }
- else
- {
- memcpy( ( void * ) pxQueue->pcReadFrom, pvItemToQueue, ( unsigned ) pxQueue->uxItemSize );
- pxQueue->pcReadFrom -= pxQueue->uxItemSize;
- if( pxQueue->pcReadFrom < pxQueue->pcHead )
- {
- pxQueue->pcReadFrom = ( pxQueue->pcTail - pxQueue->uxItemSize );
- }
- }
-
- ++( pxQueue->uxMessagesWaiting );
-}
-/*-----------------------------------------------------------*/
-
-static void prvCopyDataFromQueue( xQUEUE * const pxQueue, const void *pvBuffer )
-{
- if( pxQueue->uxQueueType != queueQUEUE_IS_MUTEX )
- {
- pxQueue->pcReadFrom += pxQueue->uxItemSize;
- if( pxQueue->pcReadFrom >= pxQueue->pcTail )
- {
- pxQueue->pcReadFrom = pxQueue->pcHead;
- }
- memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvUnlockQueue( xQueueHandle pxQueue )
-{
- /* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
-
- /* The lock counts contains the number of extra data items placed or
- removed from the queue while the queue was locked. When a queue is
- locked items can be added or removed, but the event lists cannot be
- updated. */
- taskENTER_CRITICAL();
- {
- /* See if data was added to the queue while it was locked. */
- while( pxQueue->xTxLock > queueLOCKED_UNMODIFIED )
- {
- /* Data was posted while the queue was locked. Are any tasks
- blocked waiting for data to become available? */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- /* Tasks that are removed from the event list will get added to
- the pending ready list as the scheduler is still suspended. */
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- {
- /* The task waiting has a higher priority so record that a
- context switch is required. */
- vTaskMissedYield();
- }
-
- --( pxQueue->xTxLock );
- }
- else
- {
- break;
- }
- }
-
- pxQueue->xTxLock = queueUNLOCKED;
- }
- taskEXIT_CRITICAL();
-
- /* Do the same for the Rx lock. */
- taskENTER_CRITICAL();
- {
- while( pxQueue->xRxLock > queueLOCKED_UNMODIFIED )
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- {
- if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- {
- vTaskMissedYield();
- }
-
- --( pxQueue->xRxLock );
- }
- else
- {
- break;
- }
- }
-
- pxQueue->xRxLock = queueUNLOCKED;
- }
- taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue )
-{
-signed portBASE_TYPE xReturn;
-
- taskENTER_CRITICAL();
- xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 );
- taskEXIT_CRITICAL();
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xQueueIsQueueEmptyFromISR( const xQueueHandle pxQueue )
-{
-signed portBASE_TYPE xReturn;
-
- configASSERT( pxQueue );
- xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 );
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue )
-{
-signed portBASE_TYPE xReturn;
-
- taskENTER_CRITICAL();
- xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength );
- taskEXIT_CRITICAL();
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xQueueIsQueueFullFromISR( const xQueueHandle pxQueue )
-{
-signed portBASE_TYPE xReturn;
-
- configASSERT( pxQueue );
- xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength );
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if configUSE_CO_ROUTINES == 1
-signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait )
-{
-signed portBASE_TYPE xReturn;
-
- /* If the queue is already full we may have to block. A critical section
- is required to prevent an interrupt removing something from the queue
- between the check to see if the queue is full and blocking on the queue. */
- portDISABLE_INTERRUPTS();
- {
- if( prvIsQueueFull( pxQueue ) != pdFALSE )
- {
- /* The queue is full - do we want to block or just leave without
- posting? */
- if( xTicksToWait > ( portTickType ) 0 )
- {
- /* As this is called from a coroutine we cannot block directly, but
- return indicating that we need to block. */
- vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
- portENABLE_INTERRUPTS();
- return errQUEUE_BLOCKED;
- }
- else
- {
- portENABLE_INTERRUPTS();
- return errQUEUE_FULL;
- }
- }
- }
- portENABLE_INTERRUPTS();
-
- portNOP();
-
- portDISABLE_INTERRUPTS();
- {
- if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
- {
- /* There is room in the queue, copy the data into the queue. */
- prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
- xReturn = pdPASS;
-
- /* Were any co-routines waiting for data to become available? */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- /* In this instance the co-routine could be placed directly
- into the ready list as we are within a critical section.
- Instead the same pending ready list mechanism is used as if
- the event were caused from within an interrupt. */
- if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- {
- /* The co-routine waiting has a higher priority so record
- that a yield might be appropriate. */
- xReturn = errQUEUE_YIELD;
- }
- }
- }
- else
- {
- xReturn = errQUEUE_FULL;
- }
- }
- portENABLE_INTERRUPTS();
-
- return xReturn;
-}
-#endif
-/*-----------------------------------------------------------*/
-
-#if configUSE_CO_ROUTINES == 1
-signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait )
-{
-signed portBASE_TYPE xReturn;
-
- /* If the queue is already empty we may have to block. A critical section
- is required to prevent an interrupt adding something to the queue
- between the check to see if the queue is empty and blocking on the queue. */
- portDISABLE_INTERRUPTS();
- {
- if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 )
- {
- /* There are no messages in the queue, do we want to block or just
- leave with nothing? */
- if( xTicksToWait > ( portTickType ) 0 )
- {
- /* As this is a co-routine we cannot block directly, but return
- indicating that we need to block. */
- vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
- portENABLE_INTERRUPTS();
- return errQUEUE_BLOCKED;
- }
- else
- {
- portENABLE_INTERRUPTS();
- return errQUEUE_FULL;
- }
- }
- }
- portENABLE_INTERRUPTS();
-
- portNOP();
-
- portDISABLE_INTERRUPTS();
- {
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
- {
- /* Data is available from the queue. */
- pxQueue->pcReadFrom += pxQueue->uxItemSize;
- if( pxQueue->pcReadFrom >= pxQueue->pcTail )
- {
- pxQueue->pcReadFrom = pxQueue->pcHead;
- }
- --( pxQueue->uxMessagesWaiting );
- memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
-
- xReturn = pdPASS;
-
- /* Were any co-routines waiting for space to become available? */
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- {
- /* In this instance the co-routine could be placed directly
- into the ready list as we are within a critical section.
- Instead the same pending ready list mechanism is used as if
- the event were caused from within an interrupt. */
- if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- {
- xReturn = errQUEUE_YIELD;
- }
- }
- }
- else
- {
- xReturn = pdFAIL;
- }
- }
- portENABLE_INTERRUPTS();
-
- return xReturn;
-}
-#endif
-/*-----------------------------------------------------------*/
-
-
-
-#if configUSE_CO_ROUTINES == 1
-signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken )
-{
- /* Cannot block within an ISR so if there is no space on the queue then
- exit without doing anything. */
- if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
- {
- prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
-
- /* We only want to wake one co-routine per ISR, so check that a
- co-routine has not already been woken. */
- if( xCoRoutinePreviouslyWoken == pdFALSE )
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
- {
- if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
- {
- return pdTRUE;
- }
- }
- }
- }
-
- return xCoRoutinePreviouslyWoken;
-}
-#endif
-/*-----------------------------------------------------------*/
-
-#if configUSE_CO_ROUTINES == 1
-signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken )
-{
-signed portBASE_TYPE xReturn;
-
- /* We cannot block from an ISR, so check there is data available. If
- not then just leave without doing anything. */
- if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
- {
- /* Copy the data from the queue. */
- pxQueue->pcReadFrom += pxQueue->uxItemSize;
- if( pxQueue->pcReadFrom >= pxQueue->pcTail )
- {
- pxQueue->pcReadFrom = pxQueue->pcHead;
- }
- --( pxQueue->uxMessagesWaiting );
- memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
-
- if( ( *pxCoRoutineWoken ) == pdFALSE )
- {
- if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
- {
- if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
- {
- *pxCoRoutineWoken = pdTRUE;
- }
- }
- }
-
- xReturn = pdPASS;
- }
- else
- {
- xReturn = pdFAIL;
- }
-
- return xReturn;
-}
-#endif
-/*-----------------------------------------------------------*/
-
-#if configQUEUE_REGISTRY_SIZE > 0
-
- void vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcQueueName )
- {
- unsigned portBASE_TYPE ux;
-
- /* See if there is an empty space in the registry. A NULL name denotes
- a free slot. */
- for( ux = ( unsigned portBASE_TYPE ) 0U; ux < ( unsigned portBASE_TYPE ) configQUEUE_REGISTRY_SIZE; ux++ )
- {
- if( xQueueRegistry[ ux ].pcQueueName == NULL )
- {
- /* Store the information on this queue. */
- xQueueRegistry[ ux ].pcQueueName = pcQueueName;
- xQueueRegistry[ ux ].xHandle = xQueue;
- break;
- }
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if configQUEUE_REGISTRY_SIZE > 0
-
- static void vQueueUnregisterQueue( xQueueHandle xQueue )
- {
- unsigned portBASE_TYPE ux;
-
- /* See if the handle of the queue being unregistered in actually in the
- registry. */
- for( ux = ( unsigned portBASE_TYPE ) 0U; ux < ( unsigned portBASE_TYPE ) configQUEUE_REGISTRY_SIZE; ux++ )
- {
- if( xQueueRegistry[ ux ].xHandle == xQueue )
- {
- /* Set the name to NULL to show that this slot if free again. */
- xQueueRegistry[ ux ].pcQueueName = NULL;
- break;
- }
- }
-
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if configUSE_TIMERS == 1
-
- void vQueueWaitForMessageRestricted( xQueueHandle pxQueue, portTickType xTicksToWait )
- {
- /* This function should not be called by application code hence the
- 'Restricted' in its name. It is not part of the public API. It is
- designed for use by kernel code, and has special calling requirements.
- It can result in vListInsert() being called on a list that can only
- possibly ever have one item in it, so the list will be fast, but even
- so it should be called with the scheduler locked and not from a critical
- section. */
-
- /* Only do anything if there are no messages in the queue. This function
- will not actually cause the task to block, just place it on a blocked
- list. It will not block until the scheduler is unlocked - at which
- time a yield will be performed. If an item is added to the queue while
- the queue is locked, and the calling task blocks on the queue, then the
- calling task will be immediately unblocked when the queue is unlocked. */
- prvLockQueue( pxQueue );
- if( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0U )
- {
- /* There is nothing in the queue, block for the specified period. */
- vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
- }
- prvUnlockQueue( pxQueue );
- }
-
-#endif
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers. That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-#include "os/timers.h"
-#include "os/StackMacros.h"
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/*
- * Macro to define the amount of stack available to the idle task.
- */
-#define tskIDLE_STACK_SIZE configMINIMAL_STACK_SIZE
-
-/*
- * Task control block. A task control block (TCB) is allocated to each task,
- * and stores the context of the task.
- */
-typedef struct tskTaskControlBlock
-{
- volatile portSTACK_TYPE *pxTopOfStack; /*< Points to the location of the last item placed on the tasks stack. THIS MUST BE THE FIRST MEMBER OF THE STRUCT. */
-
- #if ( portUSING_MPU_WRAPPERS == 1 )
- xMPU_SETTINGS xMPUSettings; /*< The MPU settings are defined as part of the port layer. THIS MUST BE THE SECOND MEMBER OF THE STRUCT. */
- #endif
-
- xListItem xGenericListItem; /*< List item used to place the TCB in ready and blocked queues. */
- xListItem xEventListItem; /*< List item used to place the TCB in event lists. */
- unsigned portBASE_TYPE uxPriority; /*< The priority of the task where 0 is the lowest priority. */
- portSTACK_TYPE *pxStack; /*< Points to the start of the stack. */
- signed char pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created. Facilitates debugging only. */
-
- #if ( portSTACK_GROWTH > 0 )
- portSTACK_TYPE *pxEndOfStack; /*< Used for stack overflow checking on architectures where the stack grows up from low memory. */
- #endif
-
- #if ( portCRITICAL_NESTING_IN_TCB == 1 )
- unsigned portBASE_TYPE uxCriticalNesting;
- #endif
-
- #if ( configUSE_TRACE_FACILITY == 1 )
- unsigned portBASE_TYPE uxTCBNumber; /*< This is used for tracing the scheduler and making debugging easier only. */
- #endif
-
- #if ( configUSE_MUTEXES == 1 )
- unsigned portBASE_TYPE uxBasePriority; /*< The priority last assigned to the task - used by the priority inheritance mechanism. */
- #endif
-
- #if ( configUSE_APPLICATION_TASK_TAG == 1 )
- pdTASK_HOOK_CODE pxTaskTag;
- #endif
-
- #if ( configGENERATE_RUN_TIME_STATS == 1 )
- unsigned long ulRunTimeCounter; /*< Used for calculating how much CPU time each task is utilising. */
- #endif
-
-} tskTCB;
-
-
-/*
- * Some kernel aware debuggers require data to be viewed to be global, rather
- * than file scope.
- */
-#ifdef portREMOVE_STATIC_QUALIFIER
- #define static
-#endif
-
-/*lint -e956 */
-PRIVILEGED_DATA tskTCB * volatile pxCurrentTCB = NULL;
-
-/* Lists for ready and blocked tasks. --------------------*/
-
-PRIVILEGED_DATA static xList pxReadyTasksLists[ configMAX_PRIORITIES ]; /*< Prioritised ready tasks. */
-PRIVILEGED_DATA static xList xDelayedTaskList1; /*< Delayed tasks. */
-PRIVILEGED_DATA static xList xDelayedTaskList2; /*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
-PRIVILEGED_DATA static xList * volatile pxDelayedTaskList ; /*< Points to the delayed task list currently being used. */
-PRIVILEGED_DATA static xList * volatile pxOverflowDelayedTaskList; /*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
-PRIVILEGED_DATA static xList xPendingReadyList; /*< Tasks that have been readied while the scheduler was suspended. They will be moved to the ready queue when the scheduler is resumed. */
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
- PRIVILEGED_DATA static xList xTasksWaitingTermination; /*< Tasks that have been deleted - but the their memory not yet freed. */
- PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxTasksDeleted = ( unsigned portBASE_TYPE ) 0U;
-
-#endif
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
- PRIVILEGED_DATA static xList xSuspendedTaskList; /*< Tasks that are currently suspended. */
-
-#endif
-
-#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
-
- PRIVILEGED_DATA static xTaskHandle xIdleTaskHandle = NULL;
-
-#endif
-
-/* File private variables. --------------------------------*/
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxCurrentNumberOfTasks = ( unsigned portBASE_TYPE ) 0U;
-PRIVILEGED_DATA static volatile portTickType xTickCount = ( portTickType ) 0U;
-PRIVILEGED_DATA static unsigned portBASE_TYPE uxTopUsedPriority = tskIDLE_PRIORITY;
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxTopReadyPriority = tskIDLE_PRIORITY;
-PRIVILEGED_DATA static volatile signed portBASE_TYPE xSchedulerRunning = pdFALSE;
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxSchedulerSuspended = ( unsigned portBASE_TYPE ) pdFALSE;
-PRIVILEGED_DATA static volatile unsigned portBASE_TYPE uxMissedTicks = ( unsigned portBASE_TYPE ) 0U;
-PRIVILEGED_DATA static volatile portBASE_TYPE xMissedYield = ( portBASE_TYPE ) pdFALSE;
-PRIVILEGED_DATA static volatile portBASE_TYPE xNumOfOverflows = ( portBASE_TYPE ) 0;
-PRIVILEGED_DATA static unsigned portBASE_TYPE uxTaskNumber = ( unsigned portBASE_TYPE ) 0U;
-PRIVILEGED_DATA static portTickType xNextTaskUnblockTime = ( portTickType ) portMAX_DELAY;
-
-#if ( configGENERATE_RUN_TIME_STATS == 1 )
-
- PRIVILEGED_DATA static char pcStatsString[ 50 ] ;
- PRIVILEGED_DATA static unsigned long ulTaskSwitchedInTime = 0UL; /*< Holds the value of a timer/counter the last time a task was switched in. */
- static void prvGenerateRunTimeStatsForTasksInList( const signed char *pcWriteBuffer, xList *pxList, unsigned long ulTotalRunTime ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/* Debugging and trace facilities private variables and macros. ------------*/
-
-/*
- * The value used to fill the stack of a task when the task is created. This
- * is used purely for checking the high water mark for tasks.
- */
-#define tskSTACK_FILL_BYTE ( 0xa5U )
-
-/*
- * Macros used by vListTask to indicate which state a task is in.
- */
-#define tskBLOCKED_CHAR ( ( signed char ) 'B' )
-#define tskREADY_CHAR ( ( signed char ) 'R' )
-#define tskDELETED_CHAR ( ( signed char ) 'D' )
-#define tskSUSPENDED_CHAR ( ( signed char ) 'S' )
-
-/*
- * Macros and private variables used by the trace facility.
- */
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- #define tskSIZE_OF_EACH_TRACE_LINE ( ( unsigned long ) ( sizeof( unsigned long ) + sizeof( unsigned long ) ) )
- PRIVILEGED_DATA static volatile signed char * volatile pcTraceBuffer;
- PRIVILEGED_DATA static signed char *pcTraceBufferStart;
- PRIVILEGED_DATA static signed char *pcTraceBufferEnd;
- PRIVILEGED_DATA static signed portBASE_TYPE xTracing = pdFALSE;
- static unsigned portBASE_TYPE uxPreviousTask = 255U;
- PRIVILEGED_DATA static char pcStatusString[ 50 ];
-
-#endif
-
-/*-----------------------------------------------------------*/
-
-/*
- * Macro that writes a trace of scheduler activity to a buffer. This trace
- * shows which task is running when and is very useful as a debugging tool.
- * As this macro is called each context switch it is a good idea to undefine
- * it if not using the facility.
- */
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- #define vWriteTraceToBuffer() \
- { \
- if( xTracing != pdFALSE ) \
- { \
- if( uxPreviousTask != pxCurrentTCB->uxTCBNumber ) \
- { \
- if( ( pcTraceBuffer + tskSIZE_OF_EACH_TRACE_LINE ) < pcTraceBufferEnd ) \
- { \
- uxPreviousTask = pxCurrentTCB->uxTCBNumber; \
- *( unsigned long * ) pcTraceBuffer = ( unsigned long ) xTickCount; \
- pcTraceBuffer += sizeof( unsigned long ); \
- *( unsigned long * ) pcTraceBuffer = ( unsigned long ) uxPreviousTask; \
- pcTraceBuffer += sizeof( unsigned long ); \
- } \
- else \
- { \
- xTracing = pdFALSE; \
- } \
- } \
- } \
- }
-
-#else
-
- #define vWriteTraceToBuffer()
-
-#endif
-/*-----------------------------------------------------------*/
-
-/*
- * Place the task represented by pxTCB into the appropriate ready queue for
- * the task. It is inserted at the end of the list. One quirk of this is
- * that if the task being inserted is at the same priority as the currently
- * executing task, then it will only be rescheduled after the currently
- * executing task has been rescheduled.
- */
-#define prvAddTaskToReadyQueue( pxTCB ) \
- if( ( pxTCB )->uxPriority > uxTopReadyPriority ) \
- { \
- uxTopReadyPriority = ( pxTCB )->uxPriority; \
- } \
- vListInsertEnd( ( xList * ) &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xGenericListItem ) )
-/*-----------------------------------------------------------*/
-
-/*
- * Macro that looks at the list of tasks that are currently delayed to see if
- * any require waking.
- *
- * Tasks are stored in the queue in the order of their wake time - meaning
- * once one tasks has been found whose timer has not expired we need not look
- * any further down the list.
- */
-#define prvCheckDelayedTasks() \
-{ \
-portTickType xItemValue; \
- \
- /* Is the tick count greater than or equal to the wake time of the first \
- task referenced from the delayed tasks list? */ \
- if( xTickCount >= xNextTaskUnblockTime ) \
- { \
- for( ;; ) \
- { \
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) \
- { \
- /* The delayed list is empty. Set xNextTaskUnblockTime to the \
- maximum possible value so it is extremely unlikely that the \
- if( xTickCount >= xNextTaskUnblockTime ) test will pass next \
- time through. */ \
- xNextTaskUnblockTime = portMAX_DELAY; \
- break; \
- } \
- else \
- { \
- /* The delayed list is not empty, get the value of the item at \
- the head of the delayed list. This is the time at which the \
- task at the head of the delayed list should be removed from \
- the Blocked state. */ \
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); \
- xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) ); \
- \
- if( xTickCount < xItemValue ) \
- { \
- /* It is not time to unblock this item yet, but the item \
- value is the time at which the task at the head of the \
- blocked list should be removed from the Blocked state - \
- so record the item value in xNextTaskUnblockTime. */ \
- xNextTaskUnblockTime = xItemValue; \
- break; \
- } \
- \
- /* It is time to remove the item from the Blocked state. */ \
- vListRemove( &( pxTCB->xGenericListItem ) ); \
- \
- /* Is the task waiting on an event also? */ \
- if( pxTCB->xEventListItem.pvContainer != NULL ) \
- { \
- vListRemove( &( pxTCB->xEventListItem ) ); \
- } \
- prvAddTaskToReadyQueue( pxTCB ); \
- } \
- } \
- } \
-}
-/*-----------------------------------------------------------*/
-
-/*
- * Several functions take an xTaskHandle parameter that can optionally be NULL,
- * where NULL is used to indicate that the handle of the currently executing
- * task should be used in place of the parameter. This macro simply checks to
- * see if the parameter is NULL and returns a pointer to the appropriate TCB.
- */
-#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? ( tskTCB * ) pxCurrentTCB : ( tskTCB * ) ( pxHandle ) )
-
-/* Callback function prototypes. --------------------------*/
-extern void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed char *pcTaskName );
-extern void vApplicationTickHook( void );
-
-/* File private functions. --------------------------------*/
-
-/*
- * Utility to ready a TCB for a given task. Mainly just copies the parameters
- * into the TCB structure.
- */
-static void prvInitialiseTCBVariables( tskTCB *pxTCB, const signed char * const pcName, unsigned portBASE_TYPE uxPriority, const xMemoryRegion * const xRegions, unsigned short usStackDepth ) PRIVILEGED_FUNCTION;
-
-/*
- * Utility to ready all the lists used by the scheduler. This is called
- * automatically upon the creation of the first task.
- */
-static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The idle task, which as all tasks is implemented as a never ending loop.
- * The idle task is automatically created and added to the ready lists upon
- * creation of the first user task.
- *
- * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific
- * language extensions. The equivalent prototype for this function is:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
-static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters );
-
-/*
- * Utility to free all memory allocated by the scheduler to hold a TCB,
- * including the stack pointed to by the TCB.
- *
- * This does not free memory allocated by the task itself (i.e. memory
- * allocated by calls to pvPortMalloc from within the tasks application code).
- */
-#if ( INCLUDE_vTaskDelete == 1 )
-
- static void prvDeleteTCB( tskTCB *pxTCB ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * Used only by the idle task. This checks to see if anything has been placed
- * in the list of tasks waiting to be deleted. If so the task is cleaned up
- * and its TCB deleted.
- */
-static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The currently executing task is entering the Blocked state. Add the task to
- * either the current or the overflow delayed task list.
- */
-static void prvAddCurrentTaskToDelayedList( portTickType xTimeToWake ) PRIVILEGED_FUNCTION;
-
-/*
- * Allocates memory from the heap for a TCB and associated stack. Checks the
- * allocation was successful.
- */
-static tskTCB *prvAllocateTCBAndStack( unsigned short usStackDepth, portSTACK_TYPE *puxStackBuffer ) PRIVILEGED_FUNCTION;
-
-/*
- * Called from vTaskList. vListTasks details all the tasks currently under
- * control of the scheduler. The tasks may be in one of a number of lists.
- * prvListTaskWithinSingleList accepts a list and details the tasks from
- * within just that list.
- *
- * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM
- * NORMAL APPLICATION CODE.
- */
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- static void prvListTaskWithinSingleList( const signed char *pcWriteBuffer, xList *pxList, signed char cStatus ) PRIVILEGED_FUNCTION;
-
-#endif
-
-/*
- * When a task is created, the stack of the task is filled with a known value.
- * This function determines the 'high water mark' of the task stack by
- * determining how much of the stack remains at the original preset value.
- */
-#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-
- static unsigned short usTaskCheckFreeStackSpace( const unsigned char * pucStackByte ) PRIVILEGED_FUNCTION;
-
-#endif
-
-
-/*lint +e956 */
-
-
-
-/*-----------------------------------------------------------
- * TASK CREATION API documented in task.h
- *----------------------------------------------------------*/
-
-signed portBASE_TYPE xTaskGenericCreate( pdTASK_CODE pxTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
-{
-signed portBASE_TYPE xReturn;
-tskTCB * pxNewTCB;
-
- configASSERT( pxTaskCode );
- configASSERT( ( uxPriority < configMAX_PRIORITIES ) );
-
- /* Allocate the memory required by the TCB and stack for the new task,
- checking that the allocation was successful. */
- pxNewTCB = prvAllocateTCBAndStack( usStackDepth, puxStackBuffer );
-
- if( pxNewTCB != NULL )
- {
- portSTACK_TYPE *pxTopOfStack;
-
- #if( portUSING_MPU_WRAPPERS == 1 )
- /* Should the task be created in privileged mode? */
- portBASE_TYPE xRunPrivileged;
- if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
- {
- xRunPrivileged = pdTRUE;
- }
- else
- {
- xRunPrivileged = pdFALSE;
- }
- uxPriority &= ~portPRIVILEGE_BIT;
- #endif /* portUSING_MPU_WRAPPERS == 1 */
-
- /* Calculate the top of stack address. This depends on whether the
- stack grows from high memory to low (as per the 80x86) or visa versa.
- portSTACK_GROWTH is used to make the result positive or negative as
- required by the port. */
- #if( portSTACK_GROWTH < 0 )
- {
- pxTopOfStack = pxNewTCB->pxStack + ( usStackDepth - ( unsigned short ) 1 );
- pxTopOfStack = ( portSTACK_TYPE * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );
-
- /* Check the alignment of the calculated top of stack is correct. */
- configASSERT( ( ( ( unsigned long ) pxTopOfStack & ( unsigned long ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
- }
- #else
- {
- pxTopOfStack = pxNewTCB->pxStack;
-
- /* Check the alignment of the stack buffer is correct. */
- configASSERT( ( ( ( unsigned long ) pxNewTCB->pxStack & ( unsigned long ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
-
- /* If we want to use stack checking on architectures that use
- a positive stack growth direction then we also need to store the
- other extreme of the stack space. */
- pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( usStackDepth - 1 );
- }
- #endif
-
- /* Setup the newly allocated TCB with the initial state of the task. */
- prvInitialiseTCBVariables( pxNewTCB, pcName, uxPriority, xRegions, usStackDepth );
-
- /* Initialize the TCB stack to look as if the task was already running,
- but had been interrupted by the scheduler. The return address is set
- to the start of the task function. Once the stack has been initialised
- the top of stack variable is updated. */
- #if( portUSING_MPU_WRAPPERS == 1 )
- {
- pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
- }
- #else
- {
- pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
- }
- #endif
-
- /* Check the alignment of the initialised stack. */
- configASSERT( ( ( ( unsigned long ) pxNewTCB->pxTopOfStack & ( unsigned long ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
-
- if( ( void * ) pxCreatedTask != NULL )
- {
- /* Pass the TCB out - in an anonymous way. The calling function/
- task can use this as a handle to delete the task later if
- required.*/
- *pxCreatedTask = ( xTaskHandle ) pxNewTCB;
- }
-
- /* We are going to manipulate the task queues to add this task to a
- ready list, so must make sure no interrupts occur. */
- taskENTER_CRITICAL();
- {
- uxCurrentNumberOfTasks++;
- if( pxCurrentTCB == NULL )
- {
- /* There are no other tasks, or all the other tasks are in
- the suspended state - make this the current task. */
- pxCurrentTCB = pxNewTCB;
-
- if( uxCurrentNumberOfTasks == ( unsigned portBASE_TYPE ) 1 )
- {
- /* This is the first task to be created so do the preliminary
- initialisation required. We will not recover if this call
- fails, but we will report the failure. */
- prvInitialiseTaskLists();
- }
- }
- else
- {
- /* If the scheduler is not already running, make this task the
- current task if it is the highest priority task to be created
- so far. */
- if( xSchedulerRunning == pdFALSE )
- {
- if( pxCurrentTCB->uxPriority <= uxPriority )
- {
- pxCurrentTCB = pxNewTCB;
- }
- }
- }
-
- /* Remember the top priority to make context switching faster. Use
- the priority in pxNewTCB as this has been capped to a valid value. */
- if( pxNewTCB->uxPriority > uxTopUsedPriority )
- {
- uxTopUsedPriority = pxNewTCB->uxPriority;
- }
-
- #if ( configUSE_TRACE_FACILITY == 1 )
- {
- /* Add a counter into the TCB for tracing only. */
- pxNewTCB->uxTCBNumber = uxTaskNumber;
- }
- #endif
- uxTaskNumber++;
-
- prvAddTaskToReadyQueue( pxNewTCB );
-
- xReturn = pdPASS;
- traceTASK_CREATE( pxNewTCB );
- }
- taskEXIT_CRITICAL();
- }
- else
- {
- xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
- traceTASK_CREATE_FAILED();
- }
-
- if( xReturn == pdPASS )
- {
- if( xSchedulerRunning != pdFALSE )
- {
- /* If the created task is of a higher priority than the current task
- then it should run now. */
- if( pxCurrentTCB->uxPriority < uxPriority )
- {
- portYIELD_WITHIN_API();
- }
- }
- }
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
- void vTaskDelete( xTaskHandle pxTaskToDelete )
- {
- tskTCB *pxTCB;
-
- taskENTER_CRITICAL();
- {
- /* Ensure a yield is performed if the current task is being
- deleted. */
- if( pxTaskToDelete == pxCurrentTCB )
- {
- pxTaskToDelete = NULL;
- }
-
- /* If null is passed in here then we are deleting ourselves. */
- pxTCB = prvGetTCBFromHandle( pxTaskToDelete );
-
- /* Remove task from the ready list and place in the termination list.
- This will stop the task from be scheduled. The idle task will check
- the termination list and free up any memory allocated by the
- scheduler for the TCB and stack. */
- vListRemove( &( pxTCB->xGenericListItem ) );
-
- /* Is the task waiting on an event also? */
- if( pxTCB->xEventListItem.pvContainer != NULL )
- {
- vListRemove( &( pxTCB->xEventListItem ) );
- }
-
- vListInsertEnd( ( xList * ) &xTasksWaitingTermination, &( pxTCB->xGenericListItem ) );
-
- /* Increment the ucTasksDeleted variable so the idle task knows
- there is a task that has been deleted and that it should therefore
- check the xTasksWaitingTermination list. */
- ++uxTasksDeleted;
-
- /* Increment the uxTaskNumberVariable also so kernel aware debuggers
- can detect that the task lists need re-generating. */
- uxTaskNumber++;
-
- traceTASK_DELETE( pxTCB );
- }
- taskEXIT_CRITICAL();
-
- /* Force a reschedule if we have just deleted the current task. */
- if( xSchedulerRunning != pdFALSE )
- {
- if( ( void * ) pxTaskToDelete == NULL )
- {
- portYIELD_WITHIN_API();
- }
- }
- }
-
-#endif
-
-
-
-
-
-
-/*-----------------------------------------------------------
- * TASK CONTROL API documented in task.h
- *----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelayUntil == 1 )
-
- void vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
- {
- portTickType xTimeToWake;
- portBASE_TYPE xAlreadyYielded, xShouldDelay = pdFALSE;
-
- configASSERT( pxPreviousWakeTime );
- configASSERT( ( xTimeIncrement > 0U ) );
-
- vTaskSuspendAll();
- {
- /* Generate the tick time at which the task wants to wake. */
- xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
-
- if( xTickCount < *pxPreviousWakeTime )
- {
- /* The tick count has overflowed since this function was
- lasted called. In this case the only time we should ever
- actually delay is if the wake time has also overflowed,
- and the wake time is greater than the tick time. When this
- is the case it is as if neither time had overflowed. */
- if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xTickCount ) )
- {
- xShouldDelay = pdTRUE;
- }
- }
- else
- {
- /* The tick time has not overflowed. In this case we will
- delay if either the wake time has overflowed, and/or the
- tick time is less than the wake time. */
- if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xTickCount ) )
- {
- xShouldDelay = pdTRUE;
- }
- }
-
- /* Update the wake time ready for the next call. */
- *pxPreviousWakeTime = xTimeToWake;
-
- if( xShouldDelay != pdFALSE )
- {
- traceTASK_DELAY_UNTIL();
-
- /* We must remove ourselves from the ready list before adding
- ourselves to the blocked list as the same list item is used for
- both lists. */
- vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
- prvAddCurrentTaskToDelayedList( xTimeToWake );
- }
- }
- xAlreadyYielded = xTaskResumeAll();
-
- /* Force a reschedule if xTaskResumeAll has not already done so, we may
- have put ourselves to sleep. */
- if( xAlreadyYielded == pdFALSE )
- {
- portYIELD_WITHIN_API();
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelay == 1 )
-
- void vTaskDelay( portTickType xTicksToDelay )
- {
- portTickType xTimeToWake;
- signed portBASE_TYPE xAlreadyYielded = pdFALSE;
-
- /* A delay time of zero just forces a reschedule. */
- if( xTicksToDelay > ( portTickType ) 0U )
- {
- vTaskSuspendAll();
- {
- traceTASK_DELAY();
-
- /* A task that is removed from the event list while the
- scheduler is suspended will not get placed in the ready
- list or removed from the blocked list until the scheduler
- is resumed.
-
- This task cannot be in an event list as it is the currently
- executing task. */
-
- /* Calculate the time to wake - this may overflow but this is
- not a problem. */
- xTimeToWake = xTickCount + xTicksToDelay;
-
- /* We must remove ourselves from the ready list before adding
- ourselves to the blocked list as the same list item is used for
- both lists. */
- vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
- prvAddCurrentTaskToDelayedList( xTimeToWake );
- }
- xAlreadyYielded = xTaskResumeAll();
- }
-
- /* Force a reschedule if xTaskResumeAll has not already done so, we may
- have put ourselves to sleep. */
- if( xAlreadyYielded == pdFALSE )
- {
- portYIELD_WITHIN_API();
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskPriorityGet == 1 )
-
- unsigned portBASE_TYPE uxTaskPriorityGet( xTaskHandle pxTask )
- {
- tskTCB *pxTCB;
- unsigned portBASE_TYPE uxReturn;
-
- taskENTER_CRITICAL();
- {
- /* If null is passed in here then we are changing the
- priority of the calling function. */
- pxTCB = prvGetTCBFromHandle( pxTask );
- uxReturn = pxTCB->uxPriority;
- }
- taskEXIT_CRITICAL();
-
- return uxReturn;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskPrioritySet == 1 )
-
- void vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
- {
- tskTCB *pxTCB;
- unsigned portBASE_TYPE uxCurrentPriority;
- portBASE_TYPE xYieldRequired = pdFALSE;
-
- configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );
-
- /* Ensure the new priority is valid. */
- if( uxNewPriority >= configMAX_PRIORITIES )
- {
- uxNewPriority = configMAX_PRIORITIES - ( unsigned portBASE_TYPE ) 1U;
- }
-
- taskENTER_CRITICAL();
- {
- if( pxTask == pxCurrentTCB )
- {
- pxTask = NULL;
- }
-
- /* If null is passed in here then we are changing the
- priority of the calling function. */
- pxTCB = prvGetTCBFromHandle( pxTask );
-
- traceTASK_PRIORITY_SET( pxTask, uxNewPriority );
-
- #if ( configUSE_MUTEXES == 1 )
- {
- uxCurrentPriority = pxTCB->uxBasePriority;
- }
- #else
- {
- uxCurrentPriority = pxTCB->uxPriority;
- }
- #endif
-
- if( uxCurrentPriority != uxNewPriority )
- {
- /* The priority change may have readied a task of higher
- priority than the calling task. */
- if( uxNewPriority > uxCurrentPriority )
- {
- if( pxTask != NULL )
- {
- /* The priority of another task is being raised. If we
- were raising the priority of the currently running task
- there would be no need to switch as it must have already
- been the highest priority task. */
- xYieldRequired = pdTRUE;
- }
- }
- else if( pxTask == NULL )
- {
- /* Setting our own priority down means there may now be another
- task of higher priority that is ready to execute. */
- xYieldRequired = pdTRUE;
- }
-
-
-
- #if ( configUSE_MUTEXES == 1 )
- {
- /* Only change the priority being used if the task is not
- currently using an inherited priority. */
- if( pxTCB->uxBasePriority == pxTCB->uxPriority )
- {
- pxTCB->uxPriority = uxNewPriority;
- }
-
- /* The base priority gets set whatever. */
- pxTCB->uxBasePriority = uxNewPriority;
- }
- #else
- {
- pxTCB->uxPriority = uxNewPriority;
- }
- #endif
-
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( configMAX_PRIORITIES - ( portTickType ) uxNewPriority ) );
-
- /* If the task is in the blocked or suspended list we need do
- nothing more than change it's priority variable. However, if
- the task is in a ready list it needs to be removed and placed
- in the queue appropriate to its new priority. */
- if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxCurrentPriority ] ), &( pxTCB->xGenericListItem ) ) )
- {
- /* The task is currently in its ready list - remove before adding
- it to it's new ready list. As we are in a critical section we
- can do this even if the scheduler is suspended. */
- vListRemove( &( pxTCB->xGenericListItem ) );
- prvAddTaskToReadyQueue( pxTCB );
- }
-
- if( xYieldRequired == pdTRUE )
- {
- portYIELD_WITHIN_API();
- }
- }
- }
- taskEXIT_CRITICAL();
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
- void vTaskSuspend( xTaskHandle pxTaskToSuspend )
- {
- tskTCB *pxTCB;
-
- taskENTER_CRITICAL();
- {
- /* Ensure a yield is performed if the current task is being
- suspended. */
- if( pxTaskToSuspend == pxCurrentTCB )
- {
- pxTaskToSuspend = NULL;
- }
-
- /* If null is passed in here then we are suspending ourselves. */
- pxTCB = prvGetTCBFromHandle( pxTaskToSuspend );
-
- traceTASK_SUSPEND( pxTCB );
-
- /* Remove task from the ready/delayed list and place in the suspended list. */
- vListRemove( &( pxTCB->xGenericListItem ) );
-
- /* Is the task waiting on an event also? */
- if( pxTCB->xEventListItem.pvContainer != NULL )
- {
- vListRemove( &( pxTCB->xEventListItem ) );
- }
-
- vListInsertEnd( ( xList * ) &xSuspendedTaskList, &( pxTCB->xGenericListItem ) );
- }
- taskEXIT_CRITICAL();
-
- if( ( void * ) pxTaskToSuspend == NULL )
- {
- if( xSchedulerRunning != pdFALSE )
- {
- /* We have just suspended the current task. */
- portYIELD_WITHIN_API();
- }
- else
- {
- /* The scheduler is not running, but the task that was pointed
- to by pxCurrentTCB has just been suspended and pxCurrentTCB
- must be adjusted to point to a different task. */
- if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks )
- {
- /* No other tasks are ready, so set pxCurrentTCB back to
- NULL so when the next task is created pxCurrentTCB will
- be set to point to it no matter what its relative priority
- is. */
- pxCurrentTCB = NULL;
- }
- else
- {
- vTaskSwitchContext();
- }
- }
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
- signed portBASE_TYPE xTaskIsTaskSuspended( xTaskHandle xTask )
- {
- portBASE_TYPE xReturn = pdFALSE;
- const tskTCB * const pxTCB = ( tskTCB * ) xTask;
-
- /* It does not make sense to check if the calling task is suspended. */
- configASSERT( xTask );
-
- /* Is the task we are attempting to resume actually in the
- suspended list? */
- if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xGenericListItem ) ) != pdFALSE )
- {
- /* Has the task already been resumed from within an ISR? */
- if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) != pdTRUE )
- {
- /* Is it in the suspended list because it is in the
- Suspended state? It is possible to be in the suspended
- list because it is blocked on a task with no timeout
- specified. */
- if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) == pdTRUE )
- {
- xReturn = pdTRUE;
- }
- }
- }
-
- return xReturn;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskSuspend == 1 )
-
- void vTaskResume( xTaskHandle pxTaskToResume )
- {
- tskTCB *pxTCB;
-
- /* It does not make sense to resume the calling task. */
- configASSERT( pxTaskToResume );
-
- /* Remove the task from whichever list it is currently in, and place
- it in the ready list. */
- pxTCB = ( tskTCB * ) pxTaskToResume;
-
- /* The parameter cannot be NULL as it is impossible to resume the
- currently executing task. */
- if( ( pxTCB != NULL ) && ( pxTCB != pxCurrentTCB ) )
- {
- taskENTER_CRITICAL();
- {
- if( xTaskIsTaskSuspended( pxTCB ) == pdTRUE )
- {
- traceTASK_RESUME( pxTCB );
-
- /* As we are in a critical section we can access the ready
- lists even if the scheduler is suspended. */
- vListRemove( &( pxTCB->xGenericListItem ) );
- prvAddTaskToReadyQueue( pxTCB );
-
- /* We may have just resumed a higher priority task. */
- if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
- {
- /* This yield may not cause the task just resumed to run, but
- will leave the lists in the correct state for the next yield. */
- portYIELD_WITHIN_API();
- }
- }
- }
- taskEXIT_CRITICAL();
- }
- }
-
-#endif
-
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )
-
- portBASE_TYPE xTaskResumeFromISR( xTaskHandle pxTaskToResume )
- {
- portBASE_TYPE xYieldRequired = pdFALSE;
- tskTCB *pxTCB;
-
- configASSERT( pxTaskToResume );
-
- pxTCB = ( tskTCB * ) pxTaskToResume;
-
- if( xTaskIsTaskSuspended( pxTCB ) == pdTRUE )
- {
- traceTASK_RESUME_FROM_ISR( pxTCB );
-
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )
- {
- xYieldRequired = ( pxTCB->uxPriority >= pxCurrentTCB->uxPriority );
- vListRemove( &( pxTCB->xGenericListItem ) );
- prvAddTaskToReadyQueue( pxTCB );
- }
- else
- {
- /* We cannot access the delayed or ready lists, so will hold this
- task pending until the scheduler is resumed, at which point a
- yield will be performed if necessary. */
- vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
- }
- }
-
- return xYieldRequired;
- }
-
-#endif
-
-
-
-
-/*-----------------------------------------------------------
- * PUBLIC SCHEDULER CONTROL documented in task.h
- *----------------------------------------------------------*/
-
-
-void vTaskStartScheduler( void )
-{
-portBASE_TYPE xReturn;
-
- /* Add the idle task at the lowest priority. */
- #if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
- {
- /* Create the idle task, storing its handle in xIdleTaskHandle so it can
- be returned by the xTaskGetIdleTaskHandle() function. */
- xReturn = xTaskCreate( prvIdleTask, ( signed char * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), &xIdleTaskHandle );
- }
- #else
- {
- /* Create the idle task without storing its handle. */
- xReturn = xTaskCreate( prvIdleTask, ( signed char * ) "IDLE", tskIDLE_STACK_SIZE, ( void * ) NULL, ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), NULL );
- }
- #endif
-
- #if ( configUSE_TIMERS == 1 )
- {
- if( xReturn == pdPASS )
- {
- xReturn = xTimerCreateTimerTask();
- }
- }
- #endif
-
- if( xReturn == pdPASS )
- {
- /* Interrupts are turned off here, to ensure a tick does not occur
- before or during the call to xPortStartScheduler(). The stacks of
- the created tasks contain a status word with interrupts switched on
- so interrupts will automatically get re-enabled when the first task
- starts to run.
-
- STEPPING THROUGH HERE USING A DEBUGGER CAN CAUSE BIG PROBLEMS IF THE
- DEBUGGER ALLOWS INTERRUPTS TO BE PROCESSED. */
- portDISABLE_INTERRUPTS();
-
- xSchedulerRunning = pdTRUE;
- xTickCount = ( portTickType ) 0U;
-
- /* If configGENERATE_RUN_TIME_STATS is defined then the following
- macro must be defined to configure the timer/counter used to generate
- the run time counter time base. */
- portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
-
- /* Setting up the timer tick is hardware specific and thus in the
- portable interface. */
- if( xPortStartScheduler() != pdFALSE )
- {
- /* Should not reach here as if the scheduler is running the
- function will not return. */
- }
- else
- {
- /* Should only reach here if a task calls xTaskEndScheduler(). */
- }
- }
-
- /* This line will only be reached if the kernel could not be started. */
- configASSERT( xReturn );
-}
-/*-----------------------------------------------------------*/
-
-void vTaskEndScheduler( void )
-{
- /* Stop the scheduler interrupts and call the portable scheduler end
- routine so the original ISRs can be restored if necessary. The port
- layer must ensure interrupts enable bit is left in the correct state. */
- portDISABLE_INTERRUPTS();
- xSchedulerRunning = pdFALSE;
- vPortEndScheduler();
-}
-/*----------------------------------------------------------*/
-
-void vTaskSuspendAll( void )
-{
- /* A critical section is not required as the variable is of type
- portBASE_TYPE. */
- ++uxSchedulerSuspended;
-}
-/*----------------------------------------------------------*/
-
-signed portBASE_TYPE xTaskResumeAll( void )
-{
-register tskTCB *pxTCB;
-signed portBASE_TYPE xAlreadyYielded = pdFALSE;
-
- /* If uxSchedulerSuspended is zero then this function does not match a
- previous call to vTaskSuspendAll(). */
- configASSERT( uxSchedulerSuspended );
-
- /* It is possible that an ISR caused a task to be removed from an event
- list while the scheduler was suspended. If this was the case then the
- removed task will have been added to the xPendingReadyList. Once the
- scheduler has been resumed it is safe to move all the pending ready
- tasks from this list into their appropriate ready list. */
- taskENTER_CRITICAL();
- {
- --uxSchedulerSuspended;
-
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )
- {
- if( uxCurrentNumberOfTasks > ( unsigned portBASE_TYPE ) 0U )
- {
- portBASE_TYPE xYieldRequired = pdFALSE;
-
- /* Move any readied tasks from the pending list into the
- appropriate ready list. */
- while( listLIST_IS_EMPTY( ( xList * ) &xPendingReadyList ) == pdFALSE )
- {
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xPendingReadyList ) );
- vListRemove( &( pxTCB->xEventListItem ) );
- vListRemove( &( pxTCB->xGenericListItem ) );
- prvAddTaskToReadyQueue( pxTCB );
-
- /* If we have moved a task that has a priority higher than
- the current task then we should yield. */
- if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
- {
- xYieldRequired = pdTRUE;
- }
- }
-
- /* If any ticks occurred while the scheduler was suspended then
- they should be processed now. This ensures the tick count does not
- slip, and that any delayed tasks are resumed at the correct time. */
- if( uxMissedTicks > ( unsigned portBASE_TYPE ) 0U )
- {
- while( uxMissedTicks > ( unsigned portBASE_TYPE ) 0U )
- {
- vTaskIncrementTick();
- --uxMissedTicks;
- }
-
- /* As we have processed some ticks it is appropriate to yield
- to ensure the highest priority task that is ready to run is
- the task actually running. */
- #if configUSE_PREEMPTION == 1
- {
- xYieldRequired = pdTRUE;
- }
- #endif
- }
-
- if( ( xYieldRequired == pdTRUE ) || ( xMissedYield == pdTRUE ) )
- {
- xAlreadyYielded = pdTRUE;
- xMissedYield = pdFALSE;
- portYIELD_WITHIN_API();
- }
- }
- }
- }
- taskEXIT_CRITICAL();
-
- return xAlreadyYielded;
-}
-
-
-
-
-
-
-/*-----------------------------------------------------------
- * PUBLIC TASK UTILITIES documented in task.h
- *----------------------------------------------------------*/
-
-
-
-portTickType xTaskGetTickCount( void )
-{
-portTickType xTicks;
-
- /* Critical section required if running on a 16 bit processor. */
- taskENTER_CRITICAL();
- {
- xTicks = xTickCount;
- }
- taskEXIT_CRITICAL();
-
- return xTicks;
-}
-/*-----------------------------------------------------------*/
-
-portTickType xTaskGetTickCountFromISR( void )
-{
-portTickType xReturn;
-unsigned portBASE_TYPE uxSavedInterruptStatus;
-
- uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
- xReturn = xTickCount;
- portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-unsigned portBASE_TYPE uxTaskGetNumberOfTasks( void )
-{
- /* A critical section is not required because the variables are of type
- portBASE_TYPE. */
- return uxCurrentNumberOfTasks;
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_pcTaskGetTaskName == 1 )
-
- signed char *pcTaskGetTaskName( xTaskHandle xTaskToQuery )
- {
- tskTCB *pxTCB;
-
- /* If null is passed in here then the name of the calling task is being queried. */
- pxTCB = prvGetTCBFromHandle( xTaskToQuery );
- configASSERT( pxTCB );
- return &( pxTCB->pcTaskName[ 0 ] );
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- void vTaskList( signed char *pcWriteBuffer )
- {
- unsigned portBASE_TYPE uxQueue;
-
- /* This is a VERY costly function that should be used for debug only.
- It leaves interrupts disabled for a LONG time. */
-
- vTaskSuspendAll();
- {
- /* Run through all the lists that could potentially contain a TCB and
- report the task name, state and stack high water mark. */
-
- *pcWriteBuffer = ( signed char ) 0x00;
- strcat( ( char * ) pcWriteBuffer, ( const char * ) "\r\n" );
-
- uxQueue = uxTopUsedPriority + ( unsigned portBASE_TYPE ) 1U;
-
- do
- {
- uxQueue--;
-
- if( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) == pdFALSE )
- {
- prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), tskREADY_CHAR );
- }
- }while( uxQueue > ( unsigned short ) tskIDLE_PRIORITY );
-
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) == pdFALSE )
- {
- prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, tskBLOCKED_CHAR );
- }
-
- if( listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) == pdFALSE )
- {
- prvListTaskWithinSingleList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, tskBLOCKED_CHAR );
- }
-
- #if( INCLUDE_vTaskDelete == 1 )
- {
- if( listLIST_IS_EMPTY( &xTasksWaitingTermination ) == pdFALSE )
- {
- prvListTaskWithinSingleList( pcWriteBuffer, &xTasksWaitingTermination, tskDELETED_CHAR );
- }
- }
- #endif
-
- #if ( INCLUDE_vTaskSuspend == 1 )
- {
- if( listLIST_IS_EMPTY( &xSuspendedTaskList ) == pdFALSE )
- {
- prvListTaskWithinSingleList( pcWriteBuffer, &xSuspendedTaskList, tskSUSPENDED_CHAR );
- }
- }
- #endif
- }
- xTaskResumeAll();
- }
-
-#endif
-/*----------------------------------------------------------*/
-
-#if ( configGENERATE_RUN_TIME_STATS == 1 )
-
- void vTaskGetRunTimeStats( signed char *pcWriteBuffer )
- {
- unsigned portBASE_TYPE uxQueue;
- unsigned long ulTotalRunTime;
-
- /* This is a VERY costly function that should be used for debug only.
- It leaves interrupts disabled for a LONG time. */
-
- vTaskSuspendAll();
- {
- #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
- portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
- #else
- ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
- #endif
-
- /* Divide ulTotalRunTime by 100 to make the percentage caluclations
- simpler in the prvGenerateRunTimeStatsForTasksInList() function. */
- ulTotalRunTime /= 100UL;
-
- /* Run through all the lists that could potentially contain a TCB,
- generating a table of run timer percentages in the provided
- buffer. */
-
- *pcWriteBuffer = ( signed char ) 0x00;
- strcat( ( char * ) pcWriteBuffer, ( const char * ) "\r\n" );
-
- uxQueue = uxTopUsedPriority + ( unsigned portBASE_TYPE ) 1U;
-
- do
- {
- uxQueue--;
-
- if( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxQueue ] ) ) == pdFALSE )
- {
- prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) &( pxReadyTasksLists[ uxQueue ] ), ulTotalRunTime );
- }
- }while( uxQueue > ( unsigned short ) tskIDLE_PRIORITY );
-
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) == pdFALSE )
- {
- prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) pxDelayedTaskList, ulTotalRunTime );
- }
-
- if( listLIST_IS_EMPTY( pxOverflowDelayedTaskList ) == pdFALSE )
- {
- prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, ( xList * ) pxOverflowDelayedTaskList, ulTotalRunTime );
- }
-
- #if ( INCLUDE_vTaskDelete == 1 )
- {
- if( listLIST_IS_EMPTY( &xTasksWaitingTermination ) == pdFALSE )
- {
- prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, &xTasksWaitingTermination, ulTotalRunTime );
- }
- }
- #endif
-
- #if ( INCLUDE_vTaskSuspend == 1 )
- {
- if( listLIST_IS_EMPTY( &xSuspendedTaskList ) == pdFALSE )
- {
- prvGenerateRunTimeStatsForTasksInList( pcWriteBuffer, &xSuspendedTaskList, ulTotalRunTime );
- }
- }
- #endif
- }
- xTaskResumeAll();
- }
-
-#endif
-/*----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- void vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )
- {
- configASSERT( pcBuffer );
- configASSERT( ulBufferSize );
-
- taskENTER_CRITICAL();
- {
- pcTraceBuffer = ( signed char * )pcBuffer;
- pcTraceBufferStart = pcBuffer;
- pcTraceBufferEnd = pcBuffer + ( ulBufferSize - tskSIZE_OF_EACH_TRACE_LINE );
- xTracing = pdTRUE;
- }
- taskEXIT_CRITICAL();
- }
-
-#endif
-/*----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- unsigned long ulTaskEndTrace( void )
- {
- unsigned long ulBufferLength;
-
- taskENTER_CRITICAL();
- xTracing = pdFALSE;
- taskEXIT_CRITICAL();
-
- ulBufferLength = ( unsigned long ) ( pcTraceBuffer - pcTraceBufferStart );
-
- return ulBufferLength;
- }
-
-#endif
-/*----------------------------------------------------------*/
-
-#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
-
- xTaskHandle xTaskGetIdleTaskHandle( void )
- {
- /* If xTaskGetIdleTaskHandle() is called before the scheduler has been
- started, then xIdleTaskHandle will be NULL. */
- configASSERT( ( xIdleTaskHandle != NULL ) );
- return xIdleTaskHandle;
- }
-
-#endif
-
-/*-----------------------------------------------------------
- * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
- * documented in task.h
- *----------------------------------------------------------*/
-
-void vTaskIncrementTick( void )
-{
-tskTCB * pxTCB;
-
- /* Called by the portable layer each time a tick interrupt occurs.
- Increments the tick then checks to see if the new tick value will cause any
- tasks to be unblocked. */
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )
- {
- ++xTickCount;
- if( xTickCount == ( portTickType ) 0U )
- {
- xList *pxTemp;
-
- /* Tick count has overflowed so we need to swap the delay lists.
- If there are any items in pxDelayedTaskList here then there is
- an error! */
- configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );
-
- pxTemp = pxDelayedTaskList;
- pxDelayedTaskList = pxOverflowDelayedTaskList;
- pxOverflowDelayedTaskList = pxTemp;
- xNumOfOverflows++;
-
- if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
- {
- /* The new current delayed list is empty. Set
- xNextTaskUnblockTime to the maximum possible value so it is
- extremely unlikely that the
- if( xTickCount >= xNextTaskUnblockTime ) test will pass until
- there is an item in the delayed list. */
- xNextTaskUnblockTime = portMAX_DELAY;
- }
- else
- {
- /* The new current delayed list is not empty, get the value of
- the item at the head of the delayed list. This is the time at
- which the task at the head of the delayed list should be removed
- from the Blocked state. */
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList );
- xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( pxTCB->xGenericListItem ) );
- }
- }
-
- /* See if this tick has made a timeout expire. */
- prvCheckDelayedTasks();
- }
- else
- {
- ++uxMissedTicks;
-
- /* The tick hook gets called at regular intervals, even if the
- scheduler is locked. */
- #if ( configUSE_TICK_HOOK == 1 )
- {
- vApplicationTickHook();
- }
- #endif
- }
-
- #if ( configUSE_TICK_HOOK == 1 )
- {
- /* Guard against the tick hook being called when the missed tick
- count is being unwound (when the scheduler is being unlocked. */
- if( uxMissedTicks == ( unsigned portBASE_TYPE ) 0U )
- {
- vApplicationTickHook();
- }
- }
- #endif
-
- traceTASK_INCREMENT_TICK( xTickCount );
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
- void vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxHookFunction )
- {
- tskTCB *xTCB;
-
- /* If xTask is NULL then we are setting our own task hook. */
- if( xTask == NULL )
- {
- xTCB = ( tskTCB * ) pxCurrentTCB;
- }
- else
- {
- xTCB = ( tskTCB * ) xTask;
- }
-
- /* Save the hook function in the TCB. A critical section is required as
- the value can be accessed from an interrupt. */
- taskENTER_CRITICAL();
- xTCB->pxTaskTag = pxHookFunction;
- taskEXIT_CRITICAL();
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
- pdTASK_HOOK_CODE xTaskGetApplicationTaskTag( xTaskHandle xTask )
- {
- tskTCB *xTCB;
- pdTASK_HOOK_CODE xReturn;
-
- /* If xTask is NULL then we are setting our own task hook. */
- if( xTask == NULL )
- {
- xTCB = ( tskTCB * ) pxCurrentTCB;
- }
- else
- {
- xTCB = ( tskTCB * ) xTask;
- }
-
- /* Save the hook function in the TCB. A critical section is required as
- the value can be accessed from an interrupt. */
- taskENTER_CRITICAL();
- xReturn = xTCB->pxTaskTag;
- taskEXIT_CRITICAL();
-
- return xReturn;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_APPLICATION_TASK_TAG == 1 )
-
- portBASE_TYPE xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
- {
- tskTCB *xTCB;
- portBASE_TYPE xReturn;
-
- /* If xTask is NULL then we are calling our own task hook. */
- if( xTask == NULL )
- {
- xTCB = ( tskTCB * ) pxCurrentTCB;
- }
- else
- {
- xTCB = ( tskTCB * ) xTask;
- }
-
- if( xTCB->pxTaskTag != NULL )
- {
- xReturn = xTCB->pxTaskTag( pvParameter );
- }
- else
- {
- xReturn = pdFAIL;
- }
-
- return xReturn;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-void vTaskSwitchContext( void )
-{
- if( uxSchedulerSuspended != ( unsigned portBASE_TYPE ) pdFALSE )
- {
- /* The scheduler is currently suspended - do not allow a context
- switch. */
- xMissedYield = pdTRUE;
- }
- else
- {
- traceTASK_SWITCHED_OUT();
-
- #if ( configGENERATE_RUN_TIME_STATS == 1 )
- {
- unsigned long ulTempCounter;
-
- #ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
- portALT_GET_RUN_TIME_COUNTER_VALUE( ulTempCounter );
- #else
- ulTempCounter = portGET_RUN_TIME_COUNTER_VALUE();
- #endif
-
- /* Add the amount of time the task has been running to the accumulated
- time so far. The time the task started running was stored in
- ulTaskSwitchedInTime. Note that there is no overflow protection here
- so count values are only valid until the timer overflows. Generally
- this will be about 1 hour assuming a 1uS timer increment. */
- pxCurrentTCB->ulRunTimeCounter += ( ulTempCounter - ulTaskSwitchedInTime );
- ulTaskSwitchedInTime = ulTempCounter;
- }
- #endif
-
- taskFIRST_CHECK_FOR_STACK_OVERFLOW();
- taskSECOND_CHECK_FOR_STACK_OVERFLOW();
-
- /* Find the highest priority queue that contains ready tasks. */
- while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopReadyPriority ] ) ) )
- {
- configASSERT( uxTopReadyPriority );
- --uxTopReadyPriority;
- }
-
- /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the tasks of the
- same priority get an equal share of the processor time. */
- listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopReadyPriority ] ) );
-
- traceTASK_SWITCHED_IN();
- vWriteTraceToBuffer();
- }
-}
-/*-----------------------------------------------------------*/
-
-void vTaskPlaceOnEventList( const xList * const pxEventList, portTickType xTicksToWait )
-{
-portTickType xTimeToWake;
-
- configASSERT( pxEventList );
-
- /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE
- SCHEDULER SUSPENDED. */
-
- /* Place the event list item of the TCB in the appropriate event list.
- This is placed in the list in priority order so the highest priority task
- is the first to be woken by the event. */
- vListInsert( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) );
-
- /* We must remove ourselves from the ready list before adding ourselves
- to the blocked list as the same list item is used for both lists. We have
- exclusive access to the ready lists as the scheduler is locked. */
- vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
-
-
- #if ( INCLUDE_vTaskSuspend == 1 )
- {
- if( xTicksToWait == portMAX_DELAY )
- {
- /* Add ourselves to the suspended task list instead of a delayed task
- list to ensure we are not woken by a timing event. We will block
- indefinitely. */
- vListInsertEnd( ( xList * ) &xSuspendedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
- }
- else
- {
- /* Calculate the time at which the task should be woken if the event does
- not occur. This may overflow but this doesn't matter. */
- xTimeToWake = xTickCount + xTicksToWait;
- prvAddCurrentTaskToDelayedList( xTimeToWake );
- }
- }
- #else
- {
- /* Calculate the time at which the task should be woken if the event does
- not occur. This may overflow but this doesn't matter. */
- xTimeToWake = xTickCount + xTicksToWait;
- prvAddCurrentTaskToDelayedList( xTimeToWake );
- }
- #endif
-}
-/*-----------------------------------------------------------*/
-
-#if configUSE_TIMERS == 1
-
- void vTaskPlaceOnEventListRestricted( const xList * const pxEventList, portTickType xTicksToWait )
- {
- portTickType xTimeToWake;
-
- configASSERT( pxEventList );
-
- /* This function should not be called by application code hence the
- 'Restricted' in its name. It is not part of the public API. It is
- designed for use by kernel code, and has special calling requirements -
- it should be called from a critical section. */
-
-
- /* Place the event list item of the TCB in the appropriate event list.
- In this case it is assume that this is the only task that is going to
- be waiting on this event list, so the faster vListInsertEnd() function
- can be used in place of vListInsert. */
- vListInsertEnd( ( xList * ) pxEventList, ( xListItem * ) &( pxCurrentTCB->xEventListItem ) );
-
- /* We must remove this task from the ready list before adding it to the
- blocked list as the same list item is used for both lists. This
- function is called form a critical section. */
- vListRemove( ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
-
- /* Calculate the time at which the task should be woken if the event does
- not occur. This may overflow but this doesn't matter. */
- xTimeToWake = xTickCount + xTicksToWait;
- prvAddCurrentTaskToDelayedList( xTimeToWake );
- }
-
-#endif /* configUSE_TIMERS */
-/*-----------------------------------------------------------*/
-
-signed portBASE_TYPE xTaskRemoveFromEventList( const xList * const pxEventList )
-{
-tskTCB *pxUnblockedTCB;
-portBASE_TYPE xReturn;
-
- /* THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED OR THE
- SCHEDULER SUSPENDED. It can also be called from within an ISR. */
-
- /* The event list is sorted in priority order, so we can remove the
- first in the list, remove the TCB from the delayed list, and add
- it to the ready list.
-
- If an event is for a queue that is locked then this function will never
- get called - the lock count on the queue will get modified instead. This
- means we can always expect exclusive access to the event list here.
-
- This function assumes that a check has already been made to ensure that
- pxEventList is not empty. */
- pxUnblockedTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList );
- configASSERT( pxUnblockedTCB );
- vListRemove( &( pxUnblockedTCB->xEventListItem ) );
-
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )
- {
- vListRemove( &( pxUnblockedTCB->xGenericListItem ) );
- prvAddTaskToReadyQueue( pxUnblockedTCB );
- }
- else
- {
- /* We cannot access the delayed or ready lists, so will hold this
- task pending until the scheduler is resumed. */
- vListInsertEnd( ( xList * ) &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
- }
-
- if( pxUnblockedTCB->uxPriority >= pxCurrentTCB->uxPriority )
- {
- /* Return true if the task removed from the event list has
- a higher priority than the calling task. This allows
- the calling task to know if it should force a context
- switch now. */
- xReturn = pdTRUE;
- }
- else
- {
- xReturn = pdFALSE;
- }
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskSetTimeOutState( xTimeOutType * const pxTimeOut )
-{
- configASSERT( pxTimeOut );
- pxTimeOut->xOverflowCount = xNumOfOverflows;
- pxTimeOut->xTimeOnEntering = xTickCount;
-}
-/*-----------------------------------------------------------*/
-
-portBASE_TYPE xTaskCheckForTimeOut( xTimeOutType * const pxTimeOut, portTickType * const pxTicksToWait )
-{
-portBASE_TYPE xReturn;
-
- configASSERT( pxTimeOut );
- configASSERT( pxTicksToWait );
-
- taskENTER_CRITICAL();
- {
- #if ( INCLUDE_vTaskSuspend == 1 )
- /* If INCLUDE_vTaskSuspend is set to 1 and the block time specified is
- the maximum block time then the task should block indefinitely, and
- therefore never time out. */
- if( *pxTicksToWait == portMAX_DELAY )
- {
- xReturn = pdFALSE;
- }
- else /* We are not blocking indefinitely, perform the checks below. */
- #endif
-
- if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( ( portTickType ) xTickCount >= ( portTickType ) pxTimeOut->xTimeOnEntering ) )
- {
- /* The tick count is greater than the time at which vTaskSetTimeout()
- was called, but has also overflowed since vTaskSetTimeOut() was called.
- It must have wrapped all the way around and gone past us again. This
- passed since vTaskSetTimeout() was called. */
- xReturn = pdTRUE;
- }
- else if( ( ( portTickType ) ( ( portTickType ) xTickCount - ( portTickType ) pxTimeOut->xTimeOnEntering ) ) < ( portTickType ) *pxTicksToWait )
- {
- /* Not a genuine timeout. Adjust parameters for time remaining. */
- *pxTicksToWait -= ( ( portTickType ) xTickCount - ( portTickType ) pxTimeOut->xTimeOnEntering );
- vTaskSetTimeOutState( pxTimeOut );
- xReturn = pdFALSE;
- }
- else
- {
- xReturn = pdTRUE;
- }
- }
- taskEXIT_CRITICAL();
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-void vTaskMissedYield( void )
-{
- xMissedYield = pdTRUE;
-}
-
-/*
- * -----------------------------------------------------------
- * The Idle task.
- * ----------------------------------------------------------
- *
- * The portTASK_FUNCTION() macro is used to allow port/compiler specific
- * language extensions. The equivalent prototype for this function is:
- *
- * void prvIdleTask( void *pvParameters );
- *
- */
-static portTASK_FUNCTION( prvIdleTask, pvParameters )
-{
- /* Stop warnings. */
- ( void ) pvParameters;
-
- for( ;; )
- {
- /* See if any tasks have been deleted. */
- prvCheckTasksWaitingTermination();
-
- #if ( configUSE_PREEMPTION == 0 )
- {
- /* If we are not using preemption we keep forcing a task switch to
- see if any other task has become available. If we are using
- preemption we don't need to do this as any task becoming available
- will automatically get the processor anyway. */
- taskYIELD();
- }
- #endif
-
- #if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
- {
- /* When using preemption tasks of equal priority will be
- timesliced. If a task that is sharing the idle priority is ready
- to run then the idle task should yield before the end of the
- timeslice.
-
- A critical region is not required here as we are just reading from
- the list, and an occasional incorrect value will not matter. If
- the ready list at the idle priority contains more than one task
- then a task other than the idle task is ready to execute. */
- if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( unsigned portBASE_TYPE ) 1 )
- {
- taskYIELD();
- }
- }
- #endif
-
- #if ( configUSE_IDLE_HOOK == 1 )
- {
- extern void vApplicationIdleHook( void );
-
- /* Call the user defined function from within the idle task. This
- allows the application designer to add background functionality
- without the overhead of a separate task.
- NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
- CALL A FUNCTION THAT MIGHT BLOCK. */
- vApplicationIdleHook();
- }
- #endif
- }
-} /*lint !e715 pvParameters is not accessed but all task functions require the same prototype. */
-
-
-
-
-
-
-
-/*-----------------------------------------------------------
- * File private functions documented at the top of the file.
- *----------------------------------------------------------*/
-
-
-
-static void prvInitialiseTCBVariables( tskTCB *pxTCB, const signed char * const pcName, unsigned portBASE_TYPE uxPriority, const xMemoryRegion * const xRegions, unsigned short usStackDepth )
-{
- /* Store the function name in the TCB. */
- #if configMAX_TASK_NAME_LEN > 1
- {
- /* Don't bring strncpy into the build unnecessarily. */
- strncpy( ( char * ) pxTCB->pcTaskName, ( const char * ) pcName, ( unsigned short ) configMAX_TASK_NAME_LEN );
- }
- #endif
- pxTCB->pcTaskName[ ( unsigned short ) configMAX_TASK_NAME_LEN - ( unsigned short ) 1 ] = ( signed char ) '\0';
-
- /* This is used as an array index so must ensure it's not too large. First
- remove the privilege bit if one is present. */
- if( uxPriority >= configMAX_PRIORITIES )
- {
- uxPriority = configMAX_PRIORITIES - ( unsigned portBASE_TYPE ) 1U;
- }
-
- pxTCB->uxPriority = uxPriority;
- #if ( configUSE_MUTEXES == 1 )
- {
- pxTCB->uxBasePriority = uxPriority;
- }
- #endif
-
- vListInitialiseItem( &( pxTCB->xGenericListItem ) );
- vListInitialiseItem( &( pxTCB->xEventListItem ) );
-
- /* Set the pxTCB as a link back from the xListItem. This is so we can get
- back to the containing TCB from a generic item in a list. */
- listSET_LIST_ITEM_OWNER( &( pxTCB->xGenericListItem ), pxTCB );
-
- /* Event lists are always in priority order. */
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) uxPriority );
- listSET_LIST_ITEM_OWNER( &( pxTCB->xEventListItem ), pxTCB );
-
- #if ( portCRITICAL_NESTING_IN_TCB == 1 )
- {
- pxTCB->uxCriticalNesting = ( unsigned portBASE_TYPE ) 0U;
- }
- #endif
-
- #if ( configUSE_APPLICATION_TASK_TAG == 1 )
- {
- pxTCB->pxTaskTag = NULL;
- }
- #endif
-
- #if ( configGENERATE_RUN_TIME_STATS == 1 )
- {
- pxTCB->ulRunTimeCounter = 0UL;
- }
- #endif
-
- #if ( portUSING_MPU_WRAPPERS == 1 )
- {
- vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, pxTCB->pxStack, usStackDepth );
- }
- #else
- {
- ( void ) xRegions;
- ( void ) usStackDepth;
- }
- #endif
-}
-/*-----------------------------------------------------------*/
-
-#if ( portUSING_MPU_WRAPPERS == 1 )
-
- void vTaskAllocateMPURegions( xTaskHandle xTaskToModify, const xMemoryRegion * const xRegions )
- {
- tskTCB *pxTCB;
-
- if( xTaskToModify == pxCurrentTCB )
- {
- xTaskToModify = NULL;
- }
-
- /* If null is passed in here then we are deleting ourselves. */
- pxTCB = prvGetTCBFromHandle( xTaskToModify );
-
- vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
- }
- /*-----------------------------------------------------------*/
-#endif
-
-static void prvInitialiseTaskLists( void )
-{
-unsigned portBASE_TYPE uxPriority;
-
- for( uxPriority = ( unsigned portBASE_TYPE ) 0U; uxPriority < configMAX_PRIORITIES; uxPriority++ )
- {
- vListInitialise( ( xList * ) &( pxReadyTasksLists[ uxPriority ] ) );
- }
-
- vListInitialise( ( xList * ) &xDelayedTaskList1 );
- vListInitialise( ( xList * ) &xDelayedTaskList2 );
- vListInitialise( ( xList * ) &xPendingReadyList );
-
- #if ( INCLUDE_vTaskDelete == 1 )
- {
- vListInitialise( ( xList * ) &xTasksWaitingTermination );
- }
- #endif
-
- #if ( INCLUDE_vTaskSuspend == 1 )
- {
- vListInitialise( ( xList * ) &xSuspendedTaskList );
- }
- #endif
-
- /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
- using list2. */
- pxDelayedTaskList = &xDelayedTaskList1;
- pxOverflowDelayedTaskList = &xDelayedTaskList2;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckTasksWaitingTermination( void )
-{
- #if ( INCLUDE_vTaskDelete == 1 )
- {
- portBASE_TYPE xListIsEmpty;
-
- /* ucTasksDeleted is used to prevent vTaskSuspendAll() being called
- too often in the idle task. */
- if( uxTasksDeleted > ( unsigned portBASE_TYPE ) 0U )
- {
- vTaskSuspendAll();
- xListIsEmpty = listLIST_IS_EMPTY( &xTasksWaitingTermination );
- xTaskResumeAll();
-
- if( xListIsEmpty == pdFALSE )
- {
- tskTCB *pxTCB;
-
- taskENTER_CRITICAL();
- {
- pxTCB = ( tskTCB * ) listGET_OWNER_OF_HEAD_ENTRY( ( ( xList * ) &xTasksWaitingTermination ) );
- vListRemove( &( pxTCB->xGenericListItem ) );
- --uxCurrentNumberOfTasks;
- --uxTasksDeleted;
- }
- taskEXIT_CRITICAL();
-
- prvDeleteTCB( pxTCB );
- }
- }
- }
- #endif
-}
-/*-----------------------------------------------------------*/
-
-static void prvAddCurrentTaskToDelayedList( portTickType xTimeToWake )
-{
- /* The list item will be inserted in wake time order. */
- listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xGenericListItem ), xTimeToWake );
-
- if( xTimeToWake < xTickCount )
- {
- /* Wake time has overflowed. Place this item in the overflow list. */
- vListInsert( ( xList * ) pxOverflowDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
- }
- else
- {
- /* The wake time has not overflowed, so we can use the current block list. */
- vListInsert( ( xList * ) pxDelayedTaskList, ( xListItem * ) &( pxCurrentTCB->xGenericListItem ) );
-
- /* If the task entering the blocked state was placed at the head of the
- list of blocked tasks then xNextTaskUnblockTime needs to be updated
- too. */
- if( xTimeToWake < xNextTaskUnblockTime )
- {
- xNextTaskUnblockTime = xTimeToWake;
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-static tskTCB *prvAllocateTCBAndStack( unsigned short usStackDepth, portSTACK_TYPE *puxStackBuffer )
-{
-tskTCB *pxNewTCB;
-
- /* Allocate space for the TCB. Where the memory comes from depends on
- the implementation of the port malloc function. */
- pxNewTCB = ( tskTCB * ) pvPortMalloc( sizeof( tskTCB ) );
-
- if( pxNewTCB != NULL )
- {
- /* Allocate space for the stack used by the task being created.
- The base of the stack memory stored in the TCB so the task can
- be deleted later if required. */
- pxNewTCB->pxStack = ( portSTACK_TYPE * ) pvPortMallocAligned( ( ( ( size_t )usStackDepth ) * sizeof( portSTACK_TYPE ) ), puxStackBuffer );
-
- if( pxNewTCB->pxStack == NULL )
- {
- /* Could not allocate the stack. Delete the allocated TCB. */
- vPortFree( pxNewTCB );
- pxNewTCB = NULL;
- }
- else
- {
- /* Just to help debugging. */
- memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) usStackDepth * sizeof( portSTACK_TYPE ) );
- }
- }
-
- return pxNewTCB;
-}
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_TRACE_FACILITY == 1 )
-
- static void prvListTaskWithinSingleList( const signed char *pcWriteBuffer, xList *pxList, signed char cStatus )
- {
- volatile tskTCB *pxNextTCB, *pxFirstTCB;
- unsigned short usStackRemaining;
-
- /* Write the details of all the TCB's in pxList into the buffer. */
- listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
- do
- {
- listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
- #if ( portSTACK_GROWTH > 0 )
- {
- usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned char * ) pxNextTCB->pxEndOfStack );
- }
- #else
- {
- usStackRemaining = usTaskCheckFreeStackSpace( ( unsigned char * ) pxNextTCB->pxStack );
- }
- #endif
-
- sprintf( pcStatusString, ( char * ) "%s\t\t%c\t%u\t%u\t%u\r\n", pxNextTCB->pcTaskName, cStatus, ( unsigned int ) pxNextTCB->uxPriority, usStackRemaining, ( unsigned int ) pxNextTCB->uxTCBNumber );
- strcat( ( char * ) pcWriteBuffer, ( char * ) pcStatusString );
-
- } while( pxNextTCB != pxFirstTCB );
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configGENERATE_RUN_TIME_STATS == 1 )
-
- static void prvGenerateRunTimeStatsForTasksInList( const signed char *pcWriteBuffer, xList *pxList, unsigned long ulTotalRunTime )
- {
- volatile tskTCB *pxNextTCB, *pxFirstTCB;
- unsigned long ulStatsAsPercentage;
-
- /* Write the run time stats of all the TCB's in pxList into the buffer. */
- listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );
- do
- {
- /* Get next TCB in from the list. */
- listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList );
-
- /* Divide by zero check. */
- if( ulTotalRunTime > 0UL )
- {
- /* Has the task run at all? */
- if( pxNextTCB->ulRunTimeCounter == 0UL )
- {
- /* The task has used no CPU time at all. */
- sprintf( pcStatsString, ( char * ) "%s\t\t0\t\t0%%\r\n", pxNextTCB->pcTaskName );
- }
- else
- {
- /* What percentage of the total run time has the task used?
- This will always be rounded down to the nearest integer.
- ulTotalRunTime has already been divided by 100. */
- ulStatsAsPercentage = pxNextTCB->ulRunTimeCounter / ulTotalRunTime;
-
- if( ulStatsAsPercentage > 0UL )
- {
- #ifdef portLU_PRINTF_SPECIFIER_REQUIRED
- {
- sprintf( pcStatsString, ( char * ) "%s\t\t%lu\t\t%lu%%\r\n", pxNextTCB->pcTaskName, pxNextTCB->ulRunTimeCounter, ulStatsAsPercentage );
- }
- #else
- {
- /* sizeof( int ) == sizeof( long ) so a smaller
- printf() library can be used. */
- sprintf( pcStatsString, ( char * ) "%s\t\t%u\t\t%u%%\r\n", pxNextTCB->pcTaskName, ( unsigned int ) pxNextTCB->ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage );
- }
- #endif
- }
- else
- {
- /* If the percentage is zero here then the task has
- consumed less than 1% of the total run time. */
- #ifdef portLU_PRINTF_SPECIFIER_REQUIRED
- {
- sprintf( pcStatsString, ( char * ) "%s\t\t%lu\t\t<1%%\r\n", pxNextTCB->pcTaskName, pxNextTCB->ulRunTimeCounter );
- }
- #else
- {
- /* sizeof( int ) == sizeof( long ) so a smaller
- printf() library can be used. */
- sprintf( pcStatsString, ( char * ) "%s\t\t%u\t\t<1%%\r\n", pxNextTCB->pcTaskName, ( unsigned int ) pxNextTCB->ulRunTimeCounter );
- }
- #endif
- }
- }
-
- strcat( ( char * ) pcWriteBuffer, ( char * ) pcStatsString );
- }
-
- } while( pxNextTCB != pxFirstTCB );
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) )
-
- static unsigned short usTaskCheckFreeStackSpace( const unsigned char * pucStackByte )
- {
- register unsigned short usCount = 0U;
-
- while( *pucStackByte == tskSTACK_FILL_BYTE )
- {
- pucStackByte -= portSTACK_GROWTH;
- usCount++;
- }
-
- usCount /= sizeof( portSTACK_TYPE );
-
- return usCount;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
-
- unsigned portBASE_TYPE uxTaskGetStackHighWaterMark( xTaskHandle xTask )
- {
- tskTCB *pxTCB;
- unsigned char *pcEndOfStack;
- unsigned portBASE_TYPE uxReturn;
-
- pxTCB = prvGetTCBFromHandle( xTask );
-
- #if portSTACK_GROWTH < 0
- {
- pcEndOfStack = ( unsigned char * ) pxTCB->pxStack;
- }
- #else
- {
- pcEndOfStack = ( unsigned char * ) pxTCB->pxEndOfStack;
- }
- #endif
-
- uxReturn = ( unsigned portBASE_TYPE ) usTaskCheckFreeStackSpace( pcEndOfStack );
-
- return uxReturn;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_vTaskDelete == 1 )
-
- static void prvDeleteTCB( tskTCB *pxTCB )
- {
- /* Free up the memory allocated by the scheduler for the task. It is up to
- the task to free any memory allocated at the application level. */
- vPortFreeAligned( pxTCB->pxStack );
- vPortFree( pxTCB );
- }
-
-#endif
-
-
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
-
- xTaskHandle xTaskGetCurrentTaskHandle( void )
- {
- xTaskHandle xReturn;
-
- /* A critical section is not required as this is not called from
- an interrupt and the current TCB will always be the same for any
- individual execution thread. */
- xReturn = pxCurrentTCB;
-
- return xReturn;
- }
-
-#endif
-
-/*-----------------------------------------------------------*/
-
-#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
-
- portBASE_TYPE xTaskGetSchedulerState( void )
- {
- portBASE_TYPE xReturn;
-
- if( xSchedulerRunning == pdFALSE )
- {
- xReturn = taskSCHEDULER_NOT_STARTED;
- }
- else
- {
- if( uxSchedulerSuspended == ( unsigned portBASE_TYPE ) pdFALSE )
- {
- xReturn = taskSCHEDULER_RUNNING;
- }
- else
- {
- xReturn = taskSCHEDULER_SUSPENDED;
- }
- }
-
- return xReturn;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
- void vTaskPriorityInherit( xTaskHandle * const pxMutexHolder )
- {
- tskTCB * const pxTCB = ( tskTCB * ) pxMutexHolder;
-
- configASSERT( pxMutexHolder );
-
- if( pxTCB->uxPriority < pxCurrentTCB->uxPriority )
- {
- /* Adjust the mutex holder state to account for its new priority. */
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) pxCurrentTCB->uxPriority );
-
- /* If the task being modified is in the ready state it will need to
- be moved in to a new list. */
- if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxTCB->uxPriority ] ), &( pxTCB->xGenericListItem ) ) != pdFALSE )
- {
- vListRemove( &( pxTCB->xGenericListItem ) );
-
- /* Inherit the priority before being moved into the new list. */
- pxTCB->uxPriority = pxCurrentTCB->uxPriority;
- prvAddTaskToReadyQueue( pxTCB );
- }
- else
- {
- /* Just inherit the priority. */
- pxTCB->uxPriority = pxCurrentTCB->uxPriority;
- }
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( configUSE_MUTEXES == 1 )
-
- void vTaskPriorityDisinherit( xTaskHandle * const pxMutexHolder )
- {
- tskTCB * const pxTCB = ( tskTCB * ) pxMutexHolder;
-
- if( pxMutexHolder != NULL )
- {
- if( pxTCB->uxPriority != pxTCB->uxBasePriority )
- {
- /* We must be the running task to be able to give the mutex back.
- Remove ourselves from the ready list we currently appear in. */
- vListRemove( &( pxTCB->xGenericListItem ) );
-
- /* Disinherit the priority before adding ourselves into the new
- ready list. */
- pxTCB->uxPriority = pxTCB->uxBasePriority;
- listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), configMAX_PRIORITIES - ( portTickType ) pxTCB->uxPriority );
- prvAddTaskToReadyQueue( pxTCB );
- }
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-
- void vTaskEnterCritical( void )
- {
- portDISABLE_INTERRUPTS();
-
- if( xSchedulerRunning != pdFALSE )
- {
- ( pxCurrentTCB->uxCriticalNesting )++;
- }
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-#if ( portCRITICAL_NESTING_IN_TCB == 1 )
-
-void vTaskExitCritical( void )
-{
- if( xSchedulerRunning != pdFALSE )
- {
- if( pxCurrentTCB->uxCriticalNesting > 0U )
- {
- ( pxCurrentTCB->uxCriticalNesting )--;
-
- if( pxCurrentTCB->uxCriticalNesting == 0U )
- {
- portENABLE_INTERRUPTS();
- }
- }
- }
-}
-
-#endif
-/*-----------------------------------------------------------*/
-
-
-
-
+++ /dev/null
-/*
- FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.
-
-
- ***************************************************************************
- * *
- * FreeRTOS tutorial books are available in pdf and paperback. *
- * Complete, revised, and edited pdf reference manuals are also *
- * available. *
- * *
- * Purchasing FreeRTOS documentation will not only help you, by *
- * ensuring you get running as quickly as possible and with an *
- * in-depth knowledge of how to use FreeRTOS, it will also help *
- * the FreeRTOS project to continue with its mission of providing *
- * professional grade, cross platform, de facto standard solutions *
- * for microcontrollers - completely free of charge! *
- * *
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
- * *
- * Thank you for using FreeRTOS, and thank you for your support! *
- * *
- ***************************************************************************
-
-
- This file is part of the FreeRTOS distribution.
-
- FreeRTOS is free software; you can redistribute it and/or modify it under
- the terms of the GNU General Public License (version 2) as published by the
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
- >>>NOTE<<< The modification to the GPL is included to allow you to
- distribute a combined work that includes FreeRTOS without being obliged to
- provide the source code for proprietary components outside of the FreeRTOS
- kernel. FreeRTOS is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- more details. You should have received a copy of the GNU General Public
- License and the FreeRTOS license exception along with FreeRTOS; if not it
- can be viewed here: http://www.freertos.org/a00114.html and also obtained
- by writing to Richard Barry, contact details for whom are available on the
- FreeRTOS WEB site.
-
- 1 tab == 4 spaces!
-
- http://www.FreeRTOS.org - Documentation, latest information, license and
- contact details.
-
- http://www.SafeRTOS.com - A version that is certified for use in safety
- critical systems.
-
- http://www.OpenRTOS.com - Commercial support, development, porting,
- licensing and training services.
-*/
-
-/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
-all the API functions to use the MPU wrappers. That should only be done when
-task.h is included from an application file. */
-#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-#include "os/FreeRTOS.h"
-#include "os/task.h"
-#include "os/queue.h"
-#include "os/timers.h"
-
-#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
-
-/* This entire source file will be skipped if the application is not configured
-to include software timer functionality. This #if is closed at the very bottom
-of this file. If you want to include software timer functionality then ensure
-configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
-#if ( configUSE_TIMERS == 1 )
-
-/* Misc definitions. */
-#define tmrNO_DELAY ( portTickType ) 0U
-
-/* The definition of the timers themselves. */
-typedef struct tmrTimerControl
-{
- const signed char *pcTimerName; /*<< Text name. This is not used by the kernel, it is included simply to make debugging easier. */
- xListItem xTimerListItem; /*<< Standard linked list item as used by all kernel features for event management. */
- portTickType xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */
- unsigned portBASE_TYPE uxAutoReload; /*<< Set to pdTRUE if the timer should be automatically restarted once expired. Set to pdFALSE if the timer is, in effect, a one shot timer. */
- void *pvTimerID; /*<< An ID to identify the timer. This allows the timer to be identified when the same callback is used for multiple timers. */
- tmrTIMER_CALLBACK pxCallbackFunction; /*<< The function that will be called when the timer expires. */
-} xTIMER;
-
-/* The definition of messages that can be sent and received on the timer
-queue. */
-typedef struct tmrTimerQueueMessage
-{
- portBASE_TYPE xMessageID; /*<< The command being sent to the timer service task. */
- portTickType xMessageValue; /*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
- xTIMER * pxTimer; /*<< The timer to which the command will be applied. */
-} xTIMER_MESSAGE;
-
-
-/* The list in which active timers are stored. Timers are referenced in expire
-time order, with the nearest expiry time at the front of the list. Only the
-timer service task is allowed to access xActiveTimerList. */
-PRIVILEGED_DATA static xList xActiveTimerList1;
-PRIVILEGED_DATA static xList xActiveTimerList2;
-PRIVILEGED_DATA static xList *pxCurrentTimerList;
-PRIVILEGED_DATA static xList *pxOverflowTimerList;
-
-/* A queue that is used to send commands to the timer service task. */
-PRIVILEGED_DATA static xQueueHandle xTimerQueue = NULL;
-
-#if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )
-
- PRIVILEGED_DATA static xTaskHandle xTimerTaskHandle = NULL;
-
-#endif
-
-/*-----------------------------------------------------------*/
-
-/*
- * Initialise the infrastructure used by the timer service task if it has not
- * been initialised already.
- */
-static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
-
-/*
- * The timer service task (daemon). Timer functionality is controlled by this
- * task. Other tasks communicate with the timer service task using the
- * xTimerQueue queue.
- */
-static void prvTimerTask( void *pvParameters ) PRIVILEGED_FUNCTION;
-
-/*
- * Called by the timer service task to interpret and process a command it
- * received on the timer queue.
- */
-static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
-
-/*
- * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
- * depending on if the expire time causes a timer counter overflow.
- */
-static portBASE_TYPE prvInsertTimerInActiveList( xTIMER *pxTimer, portTickType xNextExpiryTime, portTickType xTimeNow, portTickType xCommandTime ) PRIVILEGED_FUNCTION;
-
-/*
- * An active timer has reached its expire time. Reload the timer if it is an
- * auto reload timer, then call its callback.
- */
-static void prvProcessExpiredTimer( portTickType xNextExpireTime, portTickType xTimeNow ) PRIVILEGED_FUNCTION;
-
-/*
- * The tick count has overflowed. Switch the timer lists after ensuring the
- * current timer list does not still reference some timers.
- */
-static void prvSwitchTimerLists( portTickType xLastTime ) PRIVILEGED_FUNCTION;
-
-/*
- * Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE
- * if a tick count overflow occurred since prvSampleTimeNow() was last called.
- */
-static portTickType prvSampleTimeNow( portBASE_TYPE *pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
-
-/*
- * If the timer list contains any active timers then return the expire time of
- * the timer that will expire first and set *pxListWasEmpty to false. If the
- * timer list does not contain any timers then return 0 and set *pxListWasEmpty
- * to pdTRUE.
- */
-static portTickType prvGetNextExpireTime( portBASE_TYPE *pxListWasEmpty ) PRIVILEGED_FUNCTION;
-
-/*
- * If a timer has expired, process it. Otherwise, block the timer service task
- * until either a timer does expire or a command is received.
- */
-static void prvProcessTimerOrBlockTask( portTickType xNextExpireTime, portBASE_TYPE xListWasEmpty ) PRIVILEGED_FUNCTION;
-
-/*-----------------------------------------------------------*/
-
-portBASE_TYPE xTimerCreateTimerTask( void )
-{
-portBASE_TYPE xReturn = pdFAIL;
-
- /* This function is called when the scheduler is started if
- configUSE_TIMERS is set to 1. Check that the infrastructure used by the
- timer service task has been created/initialised. If timers have already
- been created then the initialisation will already have been performed. */
- prvCheckForValidListAndQueue();
-
- if( xTimerQueue != NULL )
- {
- #if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )
- {
- /* Create the timer task, storing its handle in xTimerTaskHandle so
- it can be returned by the xTimerGetTimerDaemonTaskHandle() function. */
- xReturn = xTaskCreate( prvTimerTask, ( const signed char * ) "Tmr Svc", ( unsigned short ) configTIMER_TASK_STACK_DEPTH, NULL, ( unsigned portBASE_TYPE ) configTIMER_TASK_PRIORITY, &xTimerTaskHandle );
- }
- #else
- {
- /* Create the timer task without storing its handle. */
- xReturn = xTaskCreate( prvTimerTask, ( const signed char * ) "Tmr Svc", ( unsigned short ) configTIMER_TASK_STACK_DEPTH, NULL, ( unsigned portBASE_TYPE ) configTIMER_TASK_PRIORITY, NULL);
- }
- #endif
- }
-
- configASSERT( xReturn );
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-xTimerHandle xTimerCreate( const signed char *pcTimerName, portTickType xTimerPeriodInTicks, unsigned portBASE_TYPE uxAutoReload, void *pvTimerID, tmrTIMER_CALLBACK pxCallbackFunction )
-{
-xTIMER *pxNewTimer;
-
- /* Allocate the timer structure. */
- if( xTimerPeriodInTicks == ( portTickType ) 0U )
- {
- pxNewTimer = NULL;
- configASSERT( ( xTimerPeriodInTicks > 0 ) );
- }
- else
- {
- pxNewTimer = ( xTIMER * ) pvPortMalloc( sizeof( xTIMER ) );
- if( pxNewTimer != NULL )
- {
- /* Ensure the infrastructure used by the timer service task has been
- created/initialised. */
- prvCheckForValidListAndQueue();
-
- /* Initialise the timer structure members using the function parameters. */
- pxNewTimer->pcTimerName = pcTimerName;
- pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
- pxNewTimer->uxAutoReload = uxAutoReload;
- pxNewTimer->pvTimerID = pvTimerID;
- pxNewTimer->pxCallbackFunction = pxCallbackFunction;
- vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
-
- traceTIMER_CREATE( pxNewTimer );
- }
- else
- {
- traceTIMER_CREATE_FAILED();
- }
- }
-
- return ( xTimerHandle ) pxNewTimer;
-}
-/*-----------------------------------------------------------*/
-
-portBASE_TYPE xTimerGenericCommand( xTimerHandle xTimer, portBASE_TYPE xCommandID, portTickType xOptionalValue, portBASE_TYPE *pxHigherPriorityTaskWoken, portTickType xBlockTime )
-{
-portBASE_TYPE xReturn = pdFAIL;
-xTIMER_MESSAGE xMessage;
-
- /* Send a message to the timer service task to perform a particular action
- on a particular timer definition. */
- if( xTimerQueue != NULL )
- {
- /* Send a command to the timer service task to start the xTimer timer. */
- xMessage.xMessageID = xCommandID;
- xMessage.xMessageValue = xOptionalValue;
- xMessage.pxTimer = ( xTIMER * ) xTimer;
-
- if( pxHigherPriorityTaskWoken == NULL )
- {
- if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
- {
- xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xBlockTime );
- }
- else
- {
- xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
- }
- }
- else
- {
- xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
- }
-
- traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
- }
-
- return xReturn;
-}
-/*-----------------------------------------------------------*/
-
-#if ( INCLUDE_xTimerGetTimerDaemonTaskHandle == 1 )
-
- xTaskHandle xTimerGetTimerDaemonTaskHandle( void )
- {
- /* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
- started, then xTimerTaskHandle will be NULL. */
- configASSERT( ( xTimerTaskHandle != NULL ) );
- return xTimerTaskHandle;
- }
-
-#endif
-/*-----------------------------------------------------------*/
-
-static void prvProcessExpiredTimer( portTickType xNextExpireTime, portTickType xTimeNow )
-{
-xTIMER *pxTimer;
-portBASE_TYPE xResult;
-
- /* Remove the timer from the list of active timers. A check has already
- been performed to ensure the list is not empty. */
- pxTimer = ( xTIMER * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
- vListRemove( &( pxTimer->xTimerListItem ) );
- traceTIMER_EXPIRED( pxTimer );
-
- /* If the timer is an auto reload timer then calculate the next
- expiry time and re-insert the timer in the list of active timers. */
- if( pxTimer->uxAutoReload == ( unsigned portBASE_TYPE ) pdTRUE )
- {
- /* This is the only time a timer is inserted into a list using
- a time relative to anything other than the current time. It
- will therefore be inserted into the correct list relative to
- the time this task thinks it is now, even if a command to
- switch lists due to a tick count overflow is already waiting in
- the timer queue. */
- if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) == pdTRUE )
- {
- /* The timer expired before it was added to the active timer
- list. Reload it now. */
- xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START, xNextExpireTime, NULL, tmrNO_DELAY );
- configASSERT( xResult );
- ( void ) xResult;
- }
- }
-
- /* Call the timer callback. */
- pxTimer->pxCallbackFunction( ( xTimerHandle ) pxTimer );
-}
-/*-----------------------------------------------------------*/
-
-static void prvTimerTask( void *pvParameters )
-{
-portTickType xNextExpireTime;
-portBASE_TYPE xListWasEmpty;
-
- /* Just to avoid compiler warnings. */
- ( void ) pvParameters;
-
- for( ;; )
- {
- /* Query the timers list to see if it contains any timers, and if so,
- obtain the time at which the next timer will expire. */
- xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
-
- /* If a timer has expired, process it. Otherwise, block this task
- until either a timer does expire, or a command is received. */
- prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
-
- /* Empty the command queue. */
- prvProcessReceivedCommands();
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvProcessTimerOrBlockTask( portTickType xNextExpireTime, portBASE_TYPE xListWasEmpty )
-{
-portTickType xTimeNow;
-portBASE_TYPE xTimerListsWereSwitched;
-
- vTaskSuspendAll();
- {
- /* Obtain the time now to make an assessment as to whether the timer
- has expired or not. If obtaining the time causes the lists to switch
- then don't process this timer as any timers that remained in the list
- when the lists were switched will have been processed within the
- prvSampelTimeNow() function. */
- xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
- if( xTimerListsWereSwitched == pdFALSE )
- {
- /* The tick count has not overflowed, has the timer expired? */
- if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
- {
- xTaskResumeAll();
- prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
- }
- else
- {
- /* The tick count has not overflowed, and the next expire
- time has not been reached yet. This task should therefore
- block to wait for the next expire time or a command to be
- received - whichever comes first. The following line cannot
- be reached unless xNextExpireTime > xTimeNow, except in the
- case when the current timer list is empty. */
- vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ) );
-
- if( xTaskResumeAll() == pdFALSE )
- {
- /* Yield to wait for either a command to arrive, or the block time
- to expire. If a command arrived between the critical section being
- exited and this yield then the yield will not cause the task
- to block. */
- portYIELD_WITHIN_API();
- }
- }
- }
- else
- {
- xTaskResumeAll();
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-static portTickType prvGetNextExpireTime( portBASE_TYPE *pxListWasEmpty )
-{
-portTickType xNextExpireTime;
-
- /* Timers are listed in expiry time order, with the head of the list
- referencing the task that will expire first. Obtain the time at which
- the timer with the nearest expiry time will expire. If there are no
- active timers then just set the next expire time to 0. That will cause
- this task to unblock when the tick count overflows, at which point the
- timer lists will be switched and the next expiry time can be
- re-assessed. */
- *pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
- if( *pxListWasEmpty == pdFALSE )
- {
- xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
- }
- else
- {
- /* Ensure the task unblocks when the tick count rolls over. */
- xNextExpireTime = ( portTickType ) 0U;
- }
-
- return xNextExpireTime;
-}
-/*-----------------------------------------------------------*/
-
-static portTickType prvSampleTimeNow( portBASE_TYPE *pxTimerListsWereSwitched )
-{
-portTickType xTimeNow;
-static portTickType xLastTime = ( portTickType ) 0U;
-
- xTimeNow = xTaskGetTickCount();
-
- if( xTimeNow < xLastTime )
- {
- prvSwitchTimerLists( xLastTime );
- *pxTimerListsWereSwitched = pdTRUE;
- }
- else
- {
- *pxTimerListsWereSwitched = pdFALSE;
- }
-
- xLastTime = xTimeNow;
-
- return xTimeNow;
-}
-/*-----------------------------------------------------------*/
-
-static portBASE_TYPE prvInsertTimerInActiveList( xTIMER *pxTimer, portTickType xNextExpiryTime, portTickType xTimeNow, portTickType xCommandTime )
-{
-portBASE_TYPE xProcessTimerNow = pdFALSE;
-
- listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
- listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
-
- if( xNextExpiryTime <= xTimeNow )
- {
- /* Has the expiry time elapsed between the command to start/reset a
- timer was issued, and the time the command was processed? */
- if( ( ( portTickType ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks )
- {
- /* The time between a command being issued and the command being
- processed actually exceeds the timers period. */
- xProcessTimerNow = pdTRUE;
- }
- else
- {
- vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
- }
- }
- else
- {
- if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
- {
- /* If, since the command was issued, the tick count has overflowed
- but the expiry time has not, then the timer must have already passed
- its expiry time and should be processed immediately. */
- xProcessTimerNow = pdTRUE;
- }
- else
- {
- vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
- }
- }
-
- return xProcessTimerNow;
-}
-/*-----------------------------------------------------------*/
-
-static void prvProcessReceivedCommands( void )
-{
-xTIMER_MESSAGE xMessage;
-xTIMER *pxTimer;
-portBASE_TYPE xTimerListsWereSwitched, xResult;
-portTickType xTimeNow;
-
- /* In this case the xTimerListsWereSwitched parameter is not used, but it
- must be present in the function call. */
- xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
-
- while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL )
- {
- pxTimer = xMessage.pxTimer;
-
- /* Is the timer already in a list of active timers? When the command
- is trmCOMMAND_PROCESS_TIMER_OVERFLOW, the timer will be NULL as the
- command is to the task rather than to an individual timer. */
- if( pxTimer != NULL )
- {
- if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE )
- {
- /* The timer is in a list, remove it. */
- vListRemove( &( pxTimer->xTimerListItem ) );
- }
- }
-
- traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.xMessageValue );
-
- switch( xMessage.xMessageID )
- {
- case tmrCOMMAND_START :
- /* Start or restart a timer. */
- if( prvInsertTimerInActiveList( pxTimer, xMessage.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.xMessageValue ) == pdTRUE )
- {
- /* The timer expired before it was added to the active timer
- list. Process it now. */
- pxTimer->pxCallbackFunction( ( xTimerHandle ) pxTimer );
-
- if( pxTimer->uxAutoReload == ( unsigned portBASE_TYPE ) pdTRUE )
- {
- xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START, xMessage.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
- configASSERT( xResult );
- ( void ) xResult;
- }
- }
- break;
-
- case tmrCOMMAND_STOP :
- /* The timer has already been removed from the active list.
- There is nothing to do here. */
- break;
-
- case tmrCOMMAND_CHANGE_PERIOD :
- pxTimer->xTimerPeriodInTicks = xMessage.xMessageValue;
- configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
- prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
- break;
-
- case tmrCOMMAND_DELETE :
- /* The timer has already been removed from the active list,
- just free up the memory. */
- vPortFree( pxTimer );
- break;
-
- default :
- /* Don't expect to get here. */
- break;
- }
- }
-}
-/*-----------------------------------------------------------*/
-
-static void prvSwitchTimerLists( portTickType xLastTime )
-{
-portTickType xNextExpireTime, xReloadTime;
-xList *pxTemp;
-xTIMER *pxTimer;
-portBASE_TYPE xResult;
-
- /* Remove compiler warnings if configASSERT() is not defined. */
- ( void ) xLastTime;
-
- /* The tick count has overflowed. The timer lists must be switched.
- If there are any timers still referenced from the current timer list
- then they must have expired and should be processed before the lists
- are switched. */
- while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
- {
- xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
-
- /* Remove the timer from the list. */
- pxTimer = ( xTIMER * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList );
- vListRemove( &( pxTimer->xTimerListItem ) );
-
- /* Execute its callback, then send a command to restart the timer if
- it is an auto-reload timer. It cannot be restarted here as the lists
- have not yet been switched. */
- pxTimer->pxCallbackFunction( ( xTimerHandle ) pxTimer );
-
- if( pxTimer->uxAutoReload == ( unsigned portBASE_TYPE ) pdTRUE )
- {
- /* Calculate the reload value, and if the reload value results in
- the timer going into the same timer list then it has already expired
- and the timer should be re-inserted into the current list so it is
- processed again within this loop. Otherwise a command should be sent
- to restart the timer to ensure it is only inserted into a list after
- the lists have been swapped. */
- xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
- if( xReloadTime > xNextExpireTime )
- {
- listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
- listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
- vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
- }
- else
- {
- xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START, xNextExpireTime, NULL, tmrNO_DELAY );
- configASSERT( xResult );
- ( void ) xResult;
- }
- }
- }
-
- pxTemp = pxCurrentTimerList;
- pxCurrentTimerList = pxOverflowTimerList;
- pxOverflowTimerList = pxTemp;
-}
-/*-----------------------------------------------------------*/
-
-static void prvCheckForValidListAndQueue( void )
-{
- /* Check that the list from which active timers are referenced, and the
- queue used to communicate with the timer service, have been
- initialised. */
- taskENTER_CRITICAL();
- {
- if( xTimerQueue == NULL )
- {
- vListInitialise( &xActiveTimerList1 );
- vListInitialise( &xActiveTimerList2 );
- pxCurrentTimerList = &xActiveTimerList1;
- pxOverflowTimerList = &xActiveTimerList2;
- xTimerQueue = xQueueCreate( ( unsigned portBASE_TYPE ) configTIMER_QUEUE_LENGTH, sizeof( xTIMER_MESSAGE ) );
- }
- }
- taskEXIT_CRITICAL();
-}
-/*-----------------------------------------------------------*/
-
-portBASE_TYPE xTimerIsTimerActive( xTimerHandle xTimer )
-{
-portBASE_TYPE xTimerIsInActiveList;
-xTIMER *pxTimer = ( xTIMER * ) xTimer;
-
- /* Is the timer in the list of active timers? */
- taskENTER_CRITICAL();
- {
- /* Checking to see if it is in the NULL list in effect checks to see if
- it is referenced from either the current or the overflow timer lists in
- one go, but the logic has to be reversed, hence the '!'. */
- xTimerIsInActiveList = !( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) );
- }
- taskEXIT_CRITICAL();
-
- return xTimerIsInActiveList;
-}
-/*-----------------------------------------------------------*/
-
-void *pvTimerGetTimerID( xTimerHandle xTimer )
-{
-xTIMER *pxTimer = ( xTIMER * ) xTimer;
-
- return pxTimer->pvTimerID;
-}
-/*-----------------------------------------------------------*/
-
-/* This entire source file will be skipped if the application is not configured
-to include software timer functionality. If you want to include software timer
-functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
-#endif /* configUSE_TIMERS == 1 */
-
+++ /dev/null
-/*----------------------------------------------------------------------------*/
-/* TMS570LS313xFlashLnk.cmd */
-/* <ccsroot>/ccs_base/arm/include/TMS570LS313xFlashLnk.cmd */
-/* */
-/* (c) Texas Instruments 2011, All rights reserved. */
-/* */
-
-/*
- * Alternative memory map found in generated HalCoGen file:
- *
- * STACKS (RW) : origin=0x08000000 length=0x00001500
- * RAM (RW) : origin=0x08001500 length=0x00026B00
- */
-
-
-/*----------------------------------------------------------------------------*/
-/* Linker Settings */
---retain="*(.intvecs)"
-
-/*----------------------------------------------------------------------------*/
-/* Memory Map */
-MEMORY{
- VECTORS (X) : origin=0x00000000 length=0x00000020
- FLASH0 (RX) : origin=0x00000020 length=0x0017FFE0
- FLASH1 (RX) : origin=0x00180000 length=0x00180000
- STACKS (RW) : origin=0x08000000 length=0x00001300
- RAM (RW) : origin=0x08001300 length=0x0003ED00
-}
-
-/*----------------------------------------------------------------------------*/
-/* Section Configuration */
-SECTIONS{
- .intvecs : {} > VECTORS
- .text : {} > FLASH0 | FLASH1
- .const : {} > FLASH0 | FLASH1
- .cinit : {} > FLASH0 | FLASH1
- .pinit : {} > FLASH0 | FLASH1
- .bss : {} > RAM
- .data : {} > RAM
- .stack : {} > STACKS
-}
-/*----------------------------------------------------------------------------*/
+++ /dev/null
-/**
- * Base common includes to all RPP library.
- *
- * @file base.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __BASE_H
-#define __BASE_H
-
-// Base includes
-#include "types.h"
-#include "binary.h"
-#include "os/os.h"
-
-// General IO directives
-/**
- * Maximum length of system buffers.
- */
-#define MAX_BUFFER_LEN 128
-
-
-// Debug directives
-/**
- * Macro to mark unused variables.
- */
-#define UNUSED(x) (void)(x)
-
-/**
- * General debug directive.
- */
-#define DEBUG
-
-#ifdef DEBUG
-/**
- * Macro to mark debug statements.
- */
-# define D(x) x
-#else
-# define D(x)
-#endif
-
-#endif /* __BASE_H */
+++ /dev/null
-/**
- * RPP binary handling header file.
- * This file contains helpful macros for binary and bit manipulation.
- *
- * @file binary.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __RPP_BINARY_H
-#define __RPP_BINARY_H
-
-// Discussion about binary macros here:
-// http://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&t=60729
-
-/**
- * Create a bit mask for given bit number.
- * For example:
- * - _BV(7) -> B[1000 0000]
- * - _BV(1) -> B[0000 0010]
- * - _BV(0) -> B[0000 0001]
- *
- * The function name stands for Bit Value, in reference that the mask is created
- * only with the given bit number set.
- *
- * @param[in] bit Bit number to create the mask, starting at 0 for the
- * least-significant (rightmost) bit.
- *
- * @return A mask with all bits clear except the given bit number.
- */
-#define _BV(bit) (1UL << (bit))
-
-/**
- * Reads a bit of a number.
- *
- * @param[out] value The number from which to read.
- * @param[in] bit Which bit number to read, starting at 0 for the
- * least-significant (rightmost) bit.
- *
- * @return The value of the bit (0 or 1).
- */
-#define bit_read(value, bit) (((value) >> (bit)) & 0x01)
-
-
-/**
- * Sets (writes a 1 to) a bit of a numeric variable.
- *
- * @param[out] value The numeric variable whose bit to set.
- * @param[in] bit Which bit number to set, starting at 0 for the
- * least-significant (rightmost) bit
- *
- * @return None.
- */
-#define bit_set(value, bit) ((value) |= (1UL << (bit)))
-
-
-/**
- * Clears (writes a 0 to) a bit of a numeric variable.
- *
- * @param[out] value The numeric variable whose bit to clear.
- * @param[in] bit Which bit number to clear, starting at 0 for the
- * least-significant (rightmost) bit.
- *
- * @return None.
- */
-#define bit_clear(value, bit) ((value) &= ~(1UL << (bit)))
-
-
-/**
- * Writes a bit of a numeric variable.
- *
- * @param[out] value The numeric variable to which to write.
- * @param[in] bit Which bit number to write, starting at 0 for the
- * least-significant (rightmost) bit.
- * @param[in] bit_value The value to write to the bit (0 or 1).
- *
- * @return None.
- */
-#define bit_write(value, bit, bit_value) (bit_value ? bit_set(value, bit) : bit_clear(value, bit))
-
-
-/**
- * Check if given numeric value has it's given bit number set.
- *
- * @param[in] value The numeric variable to which bit check.
- * @param[in] bit Which bit number to check, starting at 0 for the
- * least-significant (rightmost) bit.
- *
- * @return TRUE if bit is set, FALSE if not.
- */
-#define is_bit_set(value, bit) (bit_read(value, bit) == 1)
-
-
-/**
- * Check if given numeric value has it's given bit number clear.
- *
- * @param[in] value The numeric variable to which bit check.
- * @param[in] bit Which bit number to check, starting at 0 for the
- * least-significant (rightmost) bit.
- *
- * @return TRUE if bit is clear, FALSE if not.
- */
-#define is_bit_clear(value, bit) (bit_read(value, bit) == 0)
-
-
-/**
- * FIXME: Document.
- */
-#define __val2mfld(mask,val) (((mask)&~((mask)<<1))*(val)&(mask))
-
-
-/**
- * FIXME: Document.
- */
-#define __mfld2val(mask,val) (((val)&(mask))/((mask)&~((mask)<<1)))
-
-
-#endif /* __RPP_BINARY_H */
+++ /dev/null
-/**
- * RPP driver implementation for ADC header file.
- *
- * @file adc.h
- *
- * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * @author Michal Horn
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __DRV_ADC_H
-#define __DRV_ADC_H
-
-#include "sys/ti_drv_adc.h"
-
-void drv_adc_init();
-uint32_t drv_adc_read_ain(adcData_t* data);
-uint32_t drv_adc_read_houtifbk(adcData_t* data);
-
-uint32_t adc_get_port_val(uint32_t* config, uint32_t num_channels,
- uint32_t* values);
-
-#endif /* __DRV_ADC_H */
+++ /dev/null
-/**
- * RPP driver implementation for ADC header file.
- *
- * @file adc.h
- *
- * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * @author Michal Horn
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __DRV_DAC_H
-#define __DRV_DAC_H
-
-#include "hal/hal.h"
-
-
-/**
- * Send SPI command to DAC.
- *
- * This function translates parameters into a command and sends it through SPI.
- *
- * @param[in] pin The DAC pin number [0-3].
- *
- * @return SPI response if successful.
- * -1 if pin out of range.
- * -2 if value out of range.
- */
-int drv_dac_spi_transfer(uint8_t pin, boolean_t enabled, uint16_t value);
-
-
-#endif /* __DRV_DAC_H */
+++ /dev/null
-/*
- * din_spi.h
- *
- * Created on: 17.12.2012
- * Author: Michal Horn
- */
-
-#ifndef DIN_SPI_H_
-#define DIN_SPI_H_
-
-#include "drv/drv.h"
-
-#define DIN_SPICMD_INIT_VAL 0x007F0000
-
-int8_t drv_din_ref(uint16_t ref_a, uint16_t ref_b);
-
-int8_t drv_din_get_varthr(uint8_t pin);
-void din_set_pr(uint8_t word);
-void din_set_stat(uint16_t sp_state, uint16_t sg_state);
-void din_set_int(uint16_t sp_int_enable, uint16_t sg_int_enable);
-uint16_t din_get_val_word();
-int din_spi_transfer();
-void din_reset();
-void din_switch_st();
-int din_spi_response();
-int din_spi_get_cmd();
-
-#endif /* DIN_SPI_H_ */
+++ /dev/null
-/**
- * Drivers library interface file.
- *
- * @file drv.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __DRV_H
-#define __DRV_H
-
-#include "hal/hal.h"
-
-#include "drv/adc.h"
-#include "drv/dac.h"
-#include "drv/din.h"
-#include "drv/fray.h"
-#include "drv/hbridge.h"
-#include "drv/hout.h"
-#include "drv/lout.h"
-#include "drv/mout.h"
-#include "drv/sci.h"
-
-
-#endif /* __DRV_H */
+++ /dev/null
-/*
- * fray_spi.h
- *
- * Created on: 12.2.2013
- * Author: Michal Horn
- */
-
-#ifndef FRAY_SPI_H_
-#define FRAY_SPI_H_
-
-//#include "hal_port_def.h"
-//#include "ti_drv_fray.h"
-#include "drv/drv.h"
-
-#define FRAY_SPICMD_INIT_VAL 0xFFFF
-#define FRAY_NUM_PORTS 2
-
-#define FRAY_BUF_MBI_EN 0x01
-#define FRAY_BUF_MBI_DIS 0x00
-#define FRAY_BUF_TX_MODE_CONTINUOUS 0x02
-#define FRAY_BUF_TX_MODE_SINGLE 0x00
-#define FRAY_BUF_NM_EN 0x04
-#define FRAY_BUF_NM_DIS 0x00
-#define FRAY_BUF_TX 0x08
-#define FRAY_BUF_RX 0x00
-#define FRAY_BUF_CHB_EN 0x10
-#define FRAY_BUF_CHB_DIS 0x00
-#define FRAY_BUF_CHA_EN 0x20
-#define FRAY_BUF_CHA_DIS 0x00
-#define FRAY_BUF_SFI_EN 0x40
-#define FRAY_BUF_SFI_DIS 0x00
-#define FRAY_BUF_SYNC_EN 0x80
-#define FRAY_BUF_SYNC_DIS 0x00
-
-#define FRAY_ERR_CSINH_DIS -1
-#define FRAY_ERR_SW_CFG_READY -2
-#define FRAY_ERR_SW_STUP_AS_NCOLD -3
-#define FRAY_ERR_SW_STUP_FOLLOW -4
-#define FRAY_ERR_SW_STUP_READY -5
-
-
-int fray_spi_transfer(uint8_t port);
-int fray_spi_response(uint8_t port);
-int fray_spi_get_cmd(uint8_t port);
-int fray_clear_msg_ram();
-void fray_wait_for_POC_ready();
-void fray_config_buffer(uint32_t buf_num, uint8_t mode, uint32_t cyc_filter, uint32_t frame_id, uint32_t payload, uint32_t data_pointer);
-void fray_prepare_LPdu(const wrhs *Fr_LPduPtr);
-void fray_transmit_tx_LPdu(const bc *Fr_LSduPtr);
-void fray_receive_rx_LPdu(const bc *Fr_LSduPtr);
-int fray_controler_init();
-void fray_init_irq();
-void fray_buffer_set_data(uint32_t buf_num, const uint32_t* data, uint32_t len);
-void fray_buffer_get_data(uint32_t buf_num, uint32_t* data, uint32_t len);
-void fray_wait_for_new_cycle();
-int fray_buffer_message_received(uint32_t buf_num);
-int fr_startup_procedure();
-int fray_go_to_ready_state_from_config_state(void);
-int fray_go_to_ready_state_from_startup_state(void);
-int fray_go_to_startup_state(void);
-void fray_delay();
-int fray_halt(void);
-int fray_header_crc_calc(const wrhs *Fr_LPduPtr);
-void fray_init(const cfg *Fr_ConfigPtr);
-int fray_startup_procedure(int is_coldstart);
-int fray_allow_coldstart(void);
-
-#endif /* FRAY_SPI_H_ */
+++ /dev/null
-/**
- * RPP driver implementation for H-Bridge header file.
- *
- * @file hbridge.h
- *
- * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * @author Michal Horn
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __DRV_HBR_H
-#define __DRV_HBR_H
-
-#include "drv/drv.h"
-
-// Watchdog related
-int8_t drv_hbr_wdg_start();
-int8_t drv_hbr_wdg_stop();
-
-// Basic H-Bridge API
-void drv_hbr_set_en(int value);
-void drv_hbr_set_dir(int direction);
-int8_t drv_hbr_pwm_set_signal(double period, uint32_t duty);
-void drv_hbr_pwm_set_duty(uint8_t percent);
-int8_t drv_hbr_pwm_start();
-void drv_hbr_pwm_stop();
-
-// Extended H-Bridge API
-uint32_t drv_hbr_pwm_get_duty();
-double drv_hbr_pwm_get_period();
-int drv_hbr_get_dir();
-int drv_hbr_get_en();
-
-
-#endif /* __DRV_HBR_H */
+++ /dev/null
-/*
- * hout.h
- *
- * Created on: 22.2.2013
- * Author: Michal Horn
- */
-
-#ifndef HOUT_H_
-#define HOUT_H_
-
-//#include "ti_drv_het.h"
-//#include "hal_port_def.h"
-//#include "FreeRTOS.h"
-//#include "os_task.h"
-//#include "hal_gpio_tms570.h"
-#include "drv/drv.h"
-
-#define HOUT_FAILED 1
-#define HOUT_NOT_ON 2
-#define HOUT_OK 0
-
-void hout_pwm_set_signal(uint8_t hout_id, double period, uint32_t duty);
-int hout_pwm_start(uint8_t hout_id);
-void hout_pwm_stop(uint8_t hout_id);
-uint32_t hout_pwm_get_duty(uint8_t hout_id);
-double hout_pwm_get_period(uint8_t hout_id);
-int hout_fail(uint8_t hout_id);
-
-
-#endif /* HOUT_H_ */
+++ /dev/null
-/*
- * lout_spi.h
- *
- * Created on: 7.12.2012
- * Author: Michal Horn
- */
-
-#ifndef LOUT_SPI_H_
-#define LOUT_SPI_H_
-
-//#include "sys_common.h"
-//#include "hal_port_def.h"
-#include "drv/drv.h"
-
-// 0b01010101111111110101010111111111
-#define LOUT_SPICMD_INIT_VAL 0x55FF55FF
-
-enum LOUT_CODES {LOUT_CODE0 = 1, LOUT_CODE1};
-
-void lout_init();
-int lout_set_pin(uint32_t pin, int val);
-int lout_get_pin(uint32_t pin);
-void lout_set_word(uint8_t word);
-uint8_t lout_get_word();
-int lout_spi_transfer();
-uint32_t lout_spi_get_cmd();
-uint32_t lout_spi_get_response();
-
-#endif /* LOUT_SPI_H_ */
+++ /dev/null
-/**
- * RPP driver implementation for MOUT header file.
- *
- * @file mout.h
- *
- * @copyright Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __DRV_MOUT_H
-#define __DRV_MOUT_H
-
-#include "hal/hal.h"
-
-// FIXME Document.
-int8_t drv_mout_set(uint8_t pin, uint8_t val);
-int8_t drv_mout_diag(uint8_t pin);
-
-#endif /* __DRV_MOUT_H */
+++ /dev/null
-/**
- * Drivers library interface file.
- *
- * @file drv.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __DRV_SCI_H
-#define __DRV_SCI_H
-
-#include "drv/drv.h"
-
-void drv_sci_init();
-void drv_sci_set_baudrate(uint32_t baud);
-uint16_t drv_sci_available();
-int8_t drv_sci_receive(uint32_t amount, uint8_t* buffer, portTickType wait);
-int8_t drv_sci_send(uint32_t length, uint8_t* data, portTickType wait);
-int8_t drv_sci_flush(boolean_t buf);
-
-#endif /* __DRV_SCI_H */
+++ /dev/null
-/*
- * hal_gpio_tms570.h
- *
- * Created on: 12.11.2012
- * Author: Michal Horn
- *
- * This file contains gpio pin inline functions.
- * - Get pin descriptor from name function
- * - Get port base (pointer to registers) from port number
- * - Get port number from pin descriptor
- * - Get port base (pointer to registers) from pin descriptor
- * - Get/Set pin value
- * - Get/Set pin direction
- * - Set pin configuration (can be used for initial configuration after MCU reset
- *
- * Each pin is defined by its descriptor defined in hal_gpio_tms570_def. The descriptor can be obtained
- * by hal_gpio_get_pin_dsc by giving a pin name as an argument.
- */
-#ifndef _HAL_GPIO_TMS570_H_
-#define _HAL_GPIO_TMS570_H_
-
-//#include "hal_gpio_tms570_def.h"
-#include "hal/hal.h"
-
-extern gioPORT_t* port_id_map[MAX_PORT_CNT];
-extern pin_map_element_t pin_map[MAX_PIN_CNT];
-
-/**
- * Get pin descriptor assigned to pin name.
- * @param[in] pin_name Pointer to string - the name of the pin.
- * @param[in] len Length of the name, if terminated by '/0', then len=-1
- * @return Pin descriptor or NULL if not found
- */
-static inline uint32_t* hal_gpio_pin_get_dsc(const char* pin_name, int len) {
- uint32_t i;
- const char* pin_name_ptr;
- char pin_name_term[32];
- if (len != -1) { // pin name not terminated by '\0'
- strncpy(pin_name_term, pin_name, len);
- pin_name_term[len] = '\0';
- pin_name_ptr = pin_name_term;
- }
- else pin_name_ptr = pin_name;
-
- for (i = 0; i < MAX_PIN_CNT; i++) {
- if (strcmp(pin_name_ptr, pin_map[i].pin_name) == 0) {
- return &pin_map[i].pin_desc;
- }
- }
- return NULL;
-}
-
-/**
- * Get port base assigned to port number
- * @param[in] port_num Port number <0;4>
- * @return Pointer to port registers
- */
-static inline gioPORT_t* hal_gpio_get_port_base(uint32_t port_num) {
- return port_id_map[port_num];
-}
-
-/**
- * Get port number assigned to pin in its descriptor
- * @param[in] pin descriptor
- * @return Index of port
- */
-static inline uint32_t hal_gpio_pin_get_port_num(uint32_t pin_dsc) {
-
- return (pin_dsc & ~PORT_CONF_MASK) >> PORT_SHIFT;
-}
-
-/**
- * Get port base from pin descriptor
- * Combines two upper defined functions
- * @param[in] pin_dcs Pin descriptor
- * @return Pointer to port registers
- */
-static inline gioPORT_t* hal_gpio_pin_get_port_base(uint32_t pin_dsc) {
- return hal_gpio_get_port_base(hal_gpio_pin_get_port_num(pin_dsc));
-}
-
-/**
- * Get value from GPIO pin
- * @param[in] pin_dsc pin descriptor
- * @return value read from specified gpio pin
- */
-static inline uint32_t hal_gpio_pin_get_value(uint32_t pin_dsc) {
- return ((hal_gpio_pin_get_port_base(pin_dsc)->DIN) >> (pin_dsc & 0x1f)) & 1;
-}
-
-/**
- * Set value to gpio pin
- * @param[in] pin_dsc pin descriptor
- * @param[in] value value to be assigned to the pin
- */
-static inline void hal_gpio_pin_set_value(uint32_t pin_dsc, uint32_t value) {
- if(value)
- hal_gpio_pin_get_port_base(pin_dsc)->DSET = 1 << (pin_dsc & 0x1f);
- else
- hal_gpio_pin_get_port_base(pin_dsc)->DCLR = 1 << (pin_dsc & 0x1f);
-}
-
-/**
- * Set pin direction to input
- * @param[in] pin_dsc pin descriptor
- * @return always 0
- */
-static inline int hal_gpio_pin_direction_input(uint32_t pin_dsc) {
- hal_gpio_pin_get_port_base(pin_dsc)->DIR &= ~(1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-/**
- * Set pin direction to output
- * @param[in] pin_dsc pin descriptor
- * @return always 0
- */
-static inline int hal_gpio_pin_direction_output(uint32_t pin_dsc, uint32_t value) {
- hal_gpio_pin_set_value(pin_dsc, value);
- hal_gpio_pin_get_port_base(pin_dsc)->DIR |= (1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-/**
- * Get pin direction
- * @param[in] pin_dsc pin descriptor
- * @return 1 - output, 0 - input
- */
-static inline int hal_gpio_pin_get_direction(uint32_t pin_dsc) {
- return (hal_gpio_pin_get_port_base(pin_dsc)->DIR >> (pin_dsc & 0x1f)) & 1;
-}
-
-
-uint32_t hal_gpio_pin_conf_mode(uint32_t pin_dsc, uint32_t mode);
-
-uint32_t hal_gpio_pin_conf_od(uint32_t pin_dsc, uint32_t od);
-
-uint32_t hal_gpio_pin_conf_set(uint32_t pin_dsc, uint32_t conf);
-
-/**
- * Do the initial pin configuration according values in pin descriptor
- * @param[in] pin_dsc pin descriptor
- * @return always 0;
- */
-static inline uint32_t hal_gpio_pin_conf(uint32_t pin_dsc) {
- return hal_gpio_pin_conf_set(pin_dsc, pin_dsc);
-}
-
-
-#endif //_HAL_GPIO_TMS570_H_
+++ /dev/null
-/*
- * hal_gpio_tms570_def.h
- *
- * Created on: 12.11.2012
- * Author: Michal Horn
- */
-
-#ifndef HAL_GPIO_TMS570_DEF_H_
-#define HAL_GPIO_TMS570_DEF_H_
-
-//#include "ti_drv_dmm.h"
-//#include "ti_drv_gio.h"
-//#include "ti_drv_het.h"
-//#include "hal_port_spi.h"
-#include "hal/hal.h"
-
-
-#ifndef PORT_SHIFT
-#define PORT_SHIFT 5
-#endif
-#ifndef PORT_PIN
-#define PORT_PIN(p,n,conf) (((p)<<PORT_SHIFT) | (n) | (conf))
-#define PORT_CONF_MASK 0xff000000
-#endif
-
-#define PORT_CONF_DIR_MASK 0x01000000
-#define PORT_CONF_DIR_IN (0x00000000 | PORT_CONF_SET_DIR)
-#define PORT_CONF_DIR_OUT (0x01000000 | PORT_CONF_SET_DIR)
-
-#define PORT_CONF_INIT_MASK 0x02000000
-#define PORT_CONF_INIT_LOW 0x00000000
-#define PORT_CONF_INIT_HIGH 0x02000000
-
-#define PORT_CONF_OD_MASK 0x04000000
-#define PORT_CONF_OD_OFF 0x00000000
-#define PORT_CONF_OD_ON 0x04000000
-
-#define PORT_CONF_SET_DIR 0x08000000
-
-#define PORT_CONF_MODE_MASK 0x30000000
-#define PORT_CONF_MODE_PTYPE_MASK 0x10000000
-#define PORT_CONF_MODE_PEN_MASK 0x20000000
-#define PORT_CONF_MODE_PU 0x00000000 // Pull-up
-#define PORT_CONF_MODE_PD 0x10000000 // Pull-down
-#define PORT_CONF_MODE_PEN 0x20000000 // Pull resistor enable
-#define PORT_CONF_MODE_PDIS 0x00000000 // Pull resistor disable
-
-#define PORT_CONF_FNC_MASK 0xc0000000
-#define PORT_CONF_FNC_GPIO 0x00000000
-#define PORT_CONF_FNC_0 0x00000000
-#define PORT_CONF_FNC_1 0x40000000
-#define PORT_CONF_FNC_2 0x80000000
-#define PORT_CONF_FNC_3 0xc0000000
-
-#define PORT_CONF_GPIO_OUT_HI_PD_PEN_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_HIGH|PORT_CONF_DIR_OUT|PORT_CONF_MODE_PD|PORT_CONF_MODE_PEN|PORT_CONF_OD_OFF
-#define PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_OUT|PORT_CONF_MODE_PD|PORT_CONF_MODE_PEN|PORT_CONF_OD_OFF
-#define PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_OUT|PORT_CONF_MODE_PD|PORT_CONF_MODE_PEN|PORT_CONF_OD_ON
-#define PORT_CONF_GPIO_OUT_LO_PD_PDIS_ODON PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_OUT|PORT_CONF_MODE_PD|PORT_CONF_MODE_PDIS|PORT_CONF_OD_ON
-#define PORT_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_OUT|PORT_CONF_MODE_PD|PORT_CONF_MODE_PDIS|PORT_CONF_OD_OFF
-#define PORT_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_OUT|PORT_CONF_MODE_PU|PORT_CONF_MODE_PDIS|PORT_CONF_OD_OFF
-#define PORT_CONF_GPIO_IN_HI_PU_PEN_ODON PORT_CONF_FNC_GPIO|PORT_CONF_INIT_HIGH|PORT_CONF_DIR_IN|PORT_CONF_MODE_PU|PORT_CONF_MODE_PEN|PORT_CONF_OD_ON
-#define PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON PORT_CONF_FNC_GPIO|PORT_CONF_INIT_HIGH|PORT_CONF_DIR_IN|PORT_CONF_MODE_PU|PORT_CONF_MODE_PDIS|PORT_CONF_OD_ON
-#define PORT_CONF_GPIO_IN_LO_PD_PDIS_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_IN|PORT_CONF_MODE_PD|PORT_CONF_MODE_PDIS|PORT_CONF_OD_OFF
-#define PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_IN|PORT_CONF_MODE_PD|PORT_CONF_MODE_PEN|PORT_CONF_OD_OFF
-#define PORT_CONF_GPIO_IN_LO_PU_PDIS_ODOFF PORT_CONF_FNC_GPIO|PORT_CONF_INIT_LOW|PORT_CONF_DIR_IN|PORT_CONF_MODE_PD|PORT_CONF_MODE_PDIS|PORT_CONF_OD_OFF
-
-typedef struct pin_map_element {
- const char* pin_name; // Pin name
- uint32_t pin_desc; // Pin descriptor assigned to the pin name
-} pin_map_element_t;
-
-#define MAX_PIN_CNT 103
-#define MAX_PORT_CNT 5
-/* Begin and end indexes of each port group to pin map */
-#define PIN_MAP_DMM_BEGIN 0
-#define PIN_MAP_DMM_END 18
-#define PIN_MAP_GIOA_BEGIN 19
-#define PIN_MAP_GIOA_END 27
-#define PIN_MAP_GIOB_BEGIN 28
-#define PIN_MAP_GIOB_END 36
-#define PIN_MAP_HET1_BEGIN 37
-#define PIN_MAP_HET1_END 69
-#define PIN_MAP_HET2_BEGIN 70
-#define PIN_MAP_HET2_END 102
-/* Port indexes to portmap */
-#define PORT_ID_DMM 0x0
-#define PORT_ID_GIOA 0x1
-#define PORT_ID_GIOB 0x2
-#define PORT_ID_HET1 0x3
-#define PORT_ID_HET2 0x4
-/* Pin names */
-#define PIN_NAME_DIN8 "DIN8"
-#define PIN_NAME_DIN9 "DIN9"
-#define PIN_NAME_DIN10 "DIN10"
-#define PIN_NAME_DIN11 "DIN11"
-#define PIN_NAME_DIN12 "DIN12"
-#define PIN_NAME_DIN13 "DIN13"
-#define PIN_NAME_DIN14 "DIN14"
-#define PIN_NAME_DIN15 "DIN15"
-#define PIN_NAME_DININT "DININT"
-#define PIN_NAME_HOUT1IN "HOUT1IN"
-#define PIN_NAME_HOUT2IN "HOUT2IN"
-#define PIN_NAME_HOUT3IN "HOUT3IN"
-#define PIN_NAME_HOUT4IN "HOUT4IN"
-#define PIN_NAME_HOUT5IN "HOUT5IN"
-#define PIN_NAME_HOUT6IN "HOUT6IN"
-#define PIN_NAME_HOUT1DIAG "HOUT1DIAG"
-#define PIN_NAME_HOUT2DIAG "HOUT2DIAG"
-#define PIN_NAME_HOUT3DIAG "HOUT3DIAG"
-#define PIN_NAME_HOUT4DIAG "HOUT4DIAG"
-#define PIN_NAME_HOUT5DIAG "HOUT5DIAG"
-#define PIN_NAME_HOUT6DIAG "HOUT6DIAG"
-#define PIN_NAME_MOUT1IN "MOUT1IN"
-#define PIN_NAME_MOUT2IN "MOUT2IN"
-#define PIN_NAME_MOUT3IN "MOUT3IN"
-#define PIN_NAME_MOUT4IN "MOUT4IN"
-#define PIN_NAME_MOUT5IN "MOUT5IN"
-#define PIN_NAME_MOUT6IN "MOUT6IN"
-#define PIN_NAME_MOUT1EN "MOUT1EN"
-#define PIN_NAME_MOUT2EN "MOUT2EN"
-#define PIN_NAME_MOUT3EN "MOUT3EN"
-#define PIN_NAME_MOUT4EN "MOUT4EN"
-#define PIN_NAME_MOUT5EN "MOUT5EN"
-#define PIN_NAME_MOUT6EN "MOUT6EN"
-#define PIN_NAME_VBAT1EN "VBAT1EN"
-#define PIN_NAME_VBAT2EN "VBAT2EN"
-#define PIN_NAME_VBAT3EN "VBAT3EN"
-#define PIN_NAME_VBATEN "VBATEN"
-#define PIN_NAME_FANCTRL "FANCTRL"
-#define PIN_NAME_ETHRST "ETHRST"
-#define PIN_NAME_SPICSA "SPICSA"
-#define PIN_NAME_SPICSB "SPICSB"
-#define PIN_NAME_CANNSTB "CANNSTB"
-#define PIN_NAME_CANEN "CANEN"
-#define PIN_NAME_LIN2NSLP "LIN2NSLP"
-#define PIN_NAME_LIN1NSLP "LIN1NSLP"
-#define PIN_NAME_HBREN "HBREN"
-#define PIN_NAME_HBRDIR "HBRDIR"
-#define PIN_NAME_HBRPWM "HBRPWM"
-#define PIN_NAME_UNUSED NULL
-/* Pins descriptors */
-#define PIN_DSC_FANCTRL PORT_PIN(PORT_ID_DMM, 0, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_ETHRST PORT_PIN(PORT_ID_DMM, 1, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_VBAT1EN PORT_PIN(PORT_ID_DMM, 2, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_VBAT2EN PORT_PIN(PORT_ID_DMM, 3, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_VBAT3EN PORT_PIN(PORT_ID_DMM, 4, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_VBATEN PORT_PIN(PORT_ID_DMM, 5, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_SPICSA PORT_PIN(PORT_ID_DMM, 7, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_SPICSB PORT_PIN(PORT_ID_DMM, 8, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_MOUT1EN PORT_PIN(PORT_ID_DMM, 11, PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON)
-#define PIN_DSC_MOUT2EN PORT_PIN(PORT_ID_DMM, 12, PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON)
-#define PIN_DSC_CANNSTB PORT_PIN(PORT_ID_DMM, 13, PORT_CONF_GPIO_OUT_HI_PD_PEN_ODOFF)
-#define PIN_DSC_CANEN PORT_PIN(PORT_ID_DMM, 15, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_LIN2NSLP PORT_PIN(PORT_ID_DMM, 16, PORT_CONF_GPIO_OUT_HI_PD_PEN_ODOFF)
-#define PIN_DSC_LIN1NSLP PORT_PIN(PORT_ID_DMM, 17, PORT_CONF_GPIO_OUT_HI_PD_PEN_ODOFF)
-#define PIN_DSC_DININT PORT_PIN(PORT_ID_DMM, 18, PORT_CONF_GPIO_IN_LO_PD_PDIS_ODOFF)
-#define PIN_DSC_DIN8 PORT_PIN(PORT_ID_GIOA, 0, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN9 PORT_PIN(PORT_ID_GIOA, 1, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN10 PORT_PIN(PORT_ID_GIOA, 2, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN11 PORT_PIN(PORT_ID_GIOA, 3, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN12 PORT_PIN(PORT_ID_GIOA, 4, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN13 PORT_PIN(PORT_ID_GIOA, 5, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN14 PORT_PIN(PORT_ID_GIOA, 6, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_DIN15 PORT_PIN(PORT_ID_GIOA, 7, PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF)
-#define PIN_DSC_MOUT6EN PORT_PIN(PORT_ID_GIOB, 0, PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON)
-#define PIN_DSC_MOUT5EN PORT_PIN(PORT_ID_GIOB, 1, PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON)
-#define PIN_DSC_MOUT6IN PORT_PIN(PORT_ID_GIOB, 2, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_MOUT5IN PORT_PIN(PORT_ID_GIOB, 3, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_MOUT4EN PORT_PIN(PORT_ID_GIOB, 4, PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON)
-#define PIN_DSC_MOUT3EN PORT_PIN(PORT_ID_GIOB, 5, PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON)
-#define PIN_DSC_MOUT4IN PORT_PIN(PORT_ID_GIOB, 6, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_MOUT3IN PORT_PIN(PORT_ID_GIOB, 7, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_HBREN PORT_PIN(PORT_ID_HET1, 1, PORT_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF)
-#define PIN_DSC_HBRDIR PORT_PIN(PORT_ID_HET1, 4, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HBRPWM PORT_PIN(PORT_ID_HET1, 7, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_MOUT1IN PORT_PIN(PORT_ID_HET1, 9, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_MOUT2IN PORT_PIN(PORT_ID_HET1, 14, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_HOUT1IN PORT_PIN(PORT_ID_HET1, 16, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT1DIAG PORT_PIN(PORT_ID_HET1, 17, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT2IN PORT_PIN(PORT_ID_HET1, 18, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT2DIAG PORT_PIN(PORT_ID_HET1, 19, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT3IN PORT_PIN(PORT_ID_HET1, 20, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT3DIAG PORT_PIN(PORT_ID_HET1, 21, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT4IN PORT_PIN(PORT_ID_HET1, 22, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT4DIAG PORT_PIN(PORT_ID_HET1, 23, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT5IN PORT_PIN(PORT_ID_HET1, 25, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT5DIAG PORT_PIN(PORT_ID_HET1, 27, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT6IN PORT_PIN(PORT_ID_HET1, 29, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_HOUT6DIAG PORT_PIN(PORT_ID_HET1, 31, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
-#define PIN_DSC_DMM_UNUSED(b) PORT_PIN(PORT_ID_HET2, b, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_GIOA_UNUSED(b) PORT_PIN(PORT_ID_HET2, b, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_GIOB_UNUSED(b) PORT_PIN(PORT_ID_HET2, b, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_HET1_UNUSED(b) PORT_PIN(PORT_ID_HET2, b, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-#define PIN_DSC_HET2_UNUSED(b) PORT_PIN(PORT_ID_HET2, b, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
-
-#endif /* HAL_GPIO_TMS570_DEF_H_ */
+++ /dev/null
-/**
- * Hardware Abstraction Layer library interface file.
- *
- * @file hal.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __HAL_H
-#define __HAL_H
-
-#include "sys/sys.h"
-
-#include "hal/gpio_tms570_def.h"
-#include "hal/gpio_tms570.h"
-#include "hal/port_def.h"
-#include "hal/port_gpio.h"
-#include "hal/spi_resp_transl.h"
-#include "hal/spi_tms570.h"
-#include "hal/spi.h"
-#include "hal/port_spi.h"
-
-
-#endif /* __HAL_H */
+++ /dev/null
-/*
- * port_def.h
- *
- * Created on: 26.11.2012
- * Author: Michal Horn
- */
-
-#ifndef PORT_DEF_H_
-#define PORT_DEF_H_
-
-//#include "hal_gpio_tms570_def.h"
-#include "hal/hal.h"
-
-typedef struct port_desc_st {
- uint32_t* config;
- uint32_t numValues;
- uint32_t(*port_getfnc_ptr)(uint32_t* config, uint32_t num_val, uint32_t* values);
- uint32_t(*port_setfnc_ptr)(uint32_t* config, uint32_t num_val, const uint32_t* values);
-} port_desc_t;
-
-typedef struct port_def_st {
- char* name;
- port_desc_t* desc;
-} port_def_t;
-
-#define PORT_CNT 15
-
-#define PORT_NAME_DINMCU "DINMCU"
-#define PORT_CFG_DINMCU { PIN_DSC_DIN8, PIN_DSC_DIN9, PIN_DSC_DIN10, PIN_DSC_DIN11, PIN_DSC_DIN12, PIN_DSC_DIN13, PIN_DSC_DIN14, PIN_DSC_DIN15 }
-#define PORT_NV_DINMCU 8
-#define PORT_GFC_DINMCU &hal_gio_port_get_val
-#define PORT_SFC_DINMCU NULL
-
-#define PORT_NAME_DINSPI "DINSPI"
-#define PORT_CFG_DINSPI { 1, 0 }
-#define PORT_NV_DINSPI 3
-#define PORT_GFC_DINSPI NULL
-#define PORT_SFC_DINSPI &hal_spi_port_transfer_command
-
-#define PORT_NAME_HOUTDIAG "HOUTDIAG"
-#define PORT_CFG_HOUTDIAG { PIN_DSC_HOUT1DIAG, PIN_DSC_HOUT2DIAG, PIN_DSC_HOUT3DIAG, PIN_DSC_HOUT4DIAG, PIN_DSC_HOUT5DIAG, PIN_DSC_HOUT6DIAG }
-#define PORT_NV_HOUTDIAG 6
-#define PORT_GFC_HOUTDIAG &hal_gio_port_get_val
-#define PORT_SFC_HOUTDIAG NULL
-
-#define PORT_NAME_HOUTIN "HOUTIN"
-#define PORT_CFG_HOUTIN { PIN_DSC_HOUT1IN, PIN_DSC_HOUT2IN, PIN_DSC_HOUT3IN, PIN_DSC_HOUT4IN, PIN_DSC_HOUT5IN, PIN_DSC_HOUT6IN }
-#define PORT_NV_HOUTIN 6
-#define PORT_GFC_HOUTIN &hal_gio_port_get_val
-#define PORT_SFC_HOUTIN &hal_gio_port_set_val
-
-// FIXME Upper layer dependency/coupling
-// Declared in drv/adc.h
-extern uint32_t adc_get_port_val(uint32_t* config, uint32_t num_channels, uint32_t* values);
-
-#define PORT_HOUTIFBK_CHANNEL_NUM 6
-#define PORT_NAME_HOUTIFBK "HOUTIFBK"
-#define PORT_CFG_HOUTIFBK { (uint32_t) adcREG2, adcGROUP1 }
-#define PORT_NV_HOUTIFBK PORT_HOUTIFBK_CHANNEL_NUM
-#define PORT_GFC_HOUTIFBK &adc_get_port_val
-#define PORT_SFC_HOUTIFBK NULL
-
-#define PORT_ADC_CHANNEL_NUM 12
-#define PORT_NAME_ADC "ADC"
-#define PORT_CFG_ADC { (uint32_t) adcREG1, adcGROUP1 }
-#define PORT_NV_ADC PORT_ADC_CHANNEL_NUM
-#define PORT_GFC_ADC &adc_get_port_val
-#define PORT_SFC_ADC NULL
-
-#define PORT_NAME_LOUT "LOUT"
-#define PORT_CFG_LOUT { 1, 1 }
-#define PORT_NV_LOUT 4
-#define PORT_GFC_LOUT NULL
-#define PORT_SFC_LOUT &hal_spi_port_transfer_command
-
-#define PORT_NAME_DAC1_2 "DAC12"
-#define PORT_CFG_DAC1_2 { 3, 0 }
-#define PORT_NV_DAC1_2 2
-#define PORT_GFC_DAC1_2 NULL
-#define PORT_SFC_DAC1_2 &hal_spi_port_transfer_command
-
-#define PORT_NAME_DAC3_4 "DAC34"
-#define PORT_CFG_DAC3_4 { 3, 1 }
-#define PORT_NV_DAC3_4 2
-#define PORT_GFC_DAC3_4 NULL
-#define PORT_SFC_DAC3_4 &hal_spi_port_transfer_command
-
-#define PORT_NAME_DACDREF "DACDREF"
-#define PORT_CFG_DACDREF { 3, 2 }
-#define PORT_NV_DACDREF 2
-#define PORT_GFC_DACDREF NULL
-#define PORT_SFC_DACDREF &hal_spi_port_transfer_command
-
-#define PORT_NAME_HBR "HBR"
-#define PORT_CFG_HBR { 4, 0 }
-#define PORT_NV_HBR 2
-#define PORT_GFC_HBR NULL
-#define PORT_SFC_HBR &hal_spi_port_transfer_command
-
-#define PORT_NAME_FRAY1 "FRAY1"
-#define PORT_CFG_FRAY1 { 4, 1 }
-#define PORT_NV_FRAY1 2
-#define PORT_GFC_FRAY1 NULL
-#define PORT_SFC_FRAY1 &hal_spi_port_transfer_command
-
-#define PORT_NAME_FRAY2 "FRAY2"
-#define PORT_CFG_FRAY2 { 4, 2 }
-#define PORT_NV_FRAY2 2
-#define PORT_GFC_FRAY2 NULL
-#define PORT_SFC_FRAY2 &hal_spi_port_transfer_command
-
-#define PORT_NAME_MOUTEN "MOUTEN"
-#define PORT_CFG_MOUTEN { PIN_DSC_MOUT1EN, PIN_DSC_MOUT2EN, PIN_DSC_MOUT3EN, PIN_DSC_MOUT4EN, PIN_DSC_MOUT5EN, PIN_DSC_MOUT6EN }
-#define PORT_NV_MOUTEN 6
-#define PORT_GFC_MOUTEN &hal_gio_port_get_val
-#define PORT_SFC_MOUTEN &hal_gio_port_set_val
-
-port_desc_t* hal_port_get_dsc(const char* port_name, int len);
-const port_def_t* hal_port_get_definitions();
-
-
-#endif /* PORT_DEF_H_ */
+++ /dev/null
-/*
- * port_gpio.h
- *
- * Created on: 26.11.2012
- * Author: michal
- */
-
-#ifndef PORT_GPIO_H_
-#define PORT_GPIO_H_
-
-//#include "sys_common.h"
-#include "hal/hal.h"
-
-uint32_t hal_gio_port_get_val(uint32_t* config, uint32_t num_val, uint32_t* values);
-uint32_t hal_gio_port_set_val(uint32_t* config, uint32_t num_val, const uint32_t* values);
-
-#endif /* PORT_GPIO_H_ */
+++ /dev/null
-/*
- * port_spi.h
- *
- * Created on: 26.11.2012
- * Author: Michal Horn
- */
-
-#ifndef PORT_SPI_H_
-#define PORT_SPI_H_
-
-//#include "sys_common.h"
-#include "hal/hal.h"
-
-uint32_t hal_spi_port_transfer_command(uint32_t* config, uint32_t num_bytes, const uint32_t* commands);
-
-
-#endif /* PORT_SPI_H_ */
+++ /dev/null
-#ifndef _SPI_DRV_H_
-#define _SPI_DRV_H_
-
-//#include "sys_common.h"
-//#include "string.h"
-//#include "cpu_def.h"
-#include "hal/hal.h"
-
-
-UL_LIST_CUST_DEC(spi_rq_queue, spi_drv_t, spi_msg_head_t, rq_queue, node)
-
-/* ------------------------------------------------------------------------- */
-
-//typedef unsigned long spi_isr_lock_level_t;
-//#define spi_isr_lock save_and_cli
-//#define spi_isr_unlock restore_flags
-
-/* ------------------------------------------------------------------------- */
-int spi_transfer(spi_drv_t *ifc, int addr, int rq_len, const void *tx_buf, void *rx_buf);
-//spi_drv_t *spi_find_drv(char *name, int number);
-int spi_msg_rq_ins(spi_drv_t *ifc, spi_msg_head_t *msg);
-
-#endif /* _SPI_DRV_H_ */
+++ /dev/null
-/*
- * spi_resp_transl.h
- *
- * Created on: 30.11.2012
- * Author: Michal Horn
- */
-
-#ifndef SPI_RESP_TRANSL_H_
-#define SPI_RESP_TRANSL_H_
-
-//#include "hal_port_def.h"
-//#include "cmdproc_utils.h"
-#include "hal/hal.h"
-
-#define NUM_SPI_DEVICES 7
-#define DIN_NUM_GLOB_FD 24
-#define LOUT_NUM_GLOB_FD 28
-#define DAC_NUM_GLOB_FD 1
-#define FRAY_NUM_GLOB_FD 12
-#define HBR_NUM_STATREG_FD 14
-#define HBR_NUM_APPLREG1_FD 15
-#define HBR_NUM_APPLREG2_FD 13
-#define HBR_NUM_APPLREG3_FD 16
-#define HBR_NUM_DIADDR0_FD 10
-#define HBR_NUM_DIADDR1_FD 9
-#define HBR_NUM_DIADDR2_FD 9
-#define HBR_NUM_DIADDR3_FD 16
-
-#define DIN_NUM_CMD_D 1
-#define LOUT_NUM_CMD_D 1
-#define DAC_NUM_CMD_D 1
-#define FRAY_NUM_CMD_D 1
-#define HBR_NUM_CMD_D 12
-
-#define MAX_NUM_ROWS 32
-
-/*masked fields macros*/
-//#define __val2mfld(mask,val) (((mask)&~((mask)<<1))*(val)&(mask))
-//#define __mfld2val(mask,val) (((val)&(mask))/((mask)&~((mask)<<1)))
-
-
-typedef struct spitr_field_desc_st {
- const char* field_name;
- uint32_t mask;
-} spitr_field_desc_t;
-
-typedef struct spitr_cmd_map_st {
- uint32_t cmd_msk;
- uint32_t command;
- const spitr_field_desc_t* field_desc;
- uint32_t num_fields;
-} spitr_cmd_map_t;
-
-typedef struct spitr_name_map_st {
- const char* spi_name;
- const spitr_cmd_map_t* cmd_map;
- uint32_t num_cmd;
-} spitr_name_map_t;
-
-typedef struct spitr_reg_translate_table_row_st {
- const char* field_name;
- uint32_t value;
-} spitr_reg_translate_table_row_t;
-
-typedef struct spitr_reg_translate_table_st {
- spitr_reg_translate_table_row_t row[MAX_NUM_ROWS];
- uint32_t num_rows;
-} spitr_reg_translate_table_t;
-
-
-const spitr_cmd_map_t* get_spi_cmd_map(const char* spi_port_name, int len, uint32_t* num_cmdDesc);
-const spitr_field_desc_t* get_spi_field_desc(const spitr_cmd_map_t* cmd_map, uint32_t num_cmd, uint32_t cmd, uint32_t* num_fdDesc);
-int spitr_fill_tr_table(const spitr_field_desc_t* fd, uint32_t num_fields, uint32_t value, spitr_reg_translate_table_t* table);
-
-#endif /* SPI_RESP_TRANSL_H_ */
+++ /dev/null
-#ifndef _MYSPI_H_
-#define _MYSPI_H_
-
-//#include "sys_common.h"
-//#include "drv_spi.h"
-#include "ul/ul_list.h"
-#include "hal/hal.h"
-
-#define SPI_IFC_ON 1
-#define SPI_CTRL_WAKE_RQ 1
-
-/* ------------------------------------------------------------------------- */
-
-#define SPI_MSG_FINISHED 0x040
-#define SPI_MSG_ABORT 0x020
-#define SPI_MSG_FAIL 0x010
-
-struct spi_drv;
-
-typedef int (spi_ctrl_fnc_t) (struct spi_drv * ifc, int ctrl, void *p);
-
-typedef struct spi_msg_head {
- uint16_t flags; // message flags
- uint16_t addr; // message destination address -- used as index into the "address translation table"*/
-
- //uint16_t size_mode; // message frame len and mode
- uint16_t rq_len; // requested transfer length
- const uint8_t *tx_buf; // pointer to TX data
- uint8_t *rx_buf; // pointer to RX data
-
- ul_list_node_t node;
- //struct spi_drv *ifc;
- int (*callback) (struct spi_drv * ifc, int code, struct spi_msg_head * msg); // Called when whole transfer is finished
- long private; // If set -- msg is processed by HW
-} spi_msg_head_t;
-
-typedef struct spi_drv {
- uint16_t flags; // Flags
- //uint16_t self_addr;
- ul_list_head_t rq_queue; // Queue containing MSG requests to process
- spi_msg_head_t *msg_act; // MSG being actually processed
- spi_ctrl_fnc_t *ctrl_fnc; // Device dependent function responsible for sending data
- //long private;
-} spi_drv_t;
-
-/* ------------------------------------------------------------------------- */
-
-typedef unsigned long spi_isr_lock_level_t;
-#define spi_isr_lock save_and_cli
-#define spi_isr_unlock restore_flags
-
-/* ------------------------------------------------------------------------- */
-
-#define spi_compat_REG2 ((spiBASE_compat_t *)0xFFF7F600U)
-#define spi_compat_REG4 ((spiBASE_compat_t *)0xFFF7FA00U)
-#define mibspi_compat_REG1 ((spiBASE_compat_t *)0xFFF7F400U)
-#define mibspi_compat_REG3 ((spiBASE_compat_t *)0xFFF7F800U)
-#define mibspi_compat_REG5 ((spiBASE_compat_t *)0xFFF7FC00U) /* NOT USED ON RPP BOARD */
-
-
-#define SPI_FLG_TXINT_m (1 << 9)
-#define SPI_FLG_RXINT_m (1 << 8)
-
-#define SPI_INT0_TXINTENA_m (1 << 9)
-#define SPI_INT0_RXINTENA_m (1 << 8)
-
-#define SPI_DAT1_CSHOLD_m (1 << 28)
-
-/* Used as CSNR in DATA1 reg */
-enum spiChipSelect {
- SPI_CS_NONE = 0x00FF,
- SPI_CS_0 = 0x00FE,
- SPI_CS_1 = 0x00FD,
- SPI_CS_2 = 0x00FB,
- SPI_CS_3 = 0x00F7,
- SPI_CS_4 = 0x00EF,
- SPI_CS_5 = 0x00DF,
- SPI_CS_6 = 0x00BF,
- SPI_CS_7 = 0x007F,
- SPI_CS_DMM0 = 0x0100,
- SPI_CS_DMM1 = 0x0200,
- SPI_CS_DMM2 = 0x0400
-};
-
-
-
-typedef volatile struct spiBase {
- uint32_t GCR0; /**< 0x0000: Global Control 0 */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t GCR1:8U; /**< 0x0007: Global Control 1 */
- uint32_t PD:1U; /**< 0x0006: Power down bit */
- uint32_t:7U;
- uint32_t LB:1U; /**< 0x0005: Loop back bit */
- uint32_t:7U;
- uint32_t ENA:1U; /**< 0x0004: SPI Enable bit */
- uint32_t:7U;
- uint32_t INT0:16U; /**< 0x000A: Interrupt Enable bits */
- uint32_t DMAREQEN:1U; /**< 0x0009: DMA Request enable */
- uint32_t:7U;
- uint32_t ENAHIGHZ:1U; /**< 0x0008: Enable HIGHZ outputs */
- uint32_t:7U;
-#else
- uint32_t:7U;
- uint32_t ENA:1U; /**< 0x0004: SPI Enable bit */
- uint32_t:7U;
- uint32_t LB:1U; /**< 0x0005: Loop back bit */
- uint32_t:7U;
- uint32_t PD:1U; /**< 0x0006: Power down bit */
- uint32_t GCR1:8U; /**< 0x0007: Global Control 1 */
- uint32_t:7U;
- uint32_t ENAHIGHZ:1U; /**< 0x0008: Enable HIGHZ outputs */
- uint32_t:7U;
- uint32_t DMAREQEN:1U; /**< 0x0009: DMA Request enable */
- uint32_t INT0:16U; /**< 0x000A: Interrupt Enable bits */
-#endif
- uint32_t LVL; /**< 0x000C: Interrupt Level */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t FLG:16U; /**< 0x0012: Interrupt flags */
- uint32_t:8U;
- uint32_t BUFINIT:1U; /**< 0x0010: Buffer initialization active flag */
- uint32_t:7U;
-#else
- uint32_t:7U;
- uint32_t BUFINIT:1U; /**< 0x0010: Buffer initialization active flag */
- uint32_t:8U;
- uint32_t FLG:16U; /**< 0x0012: Interrupt flags */
-#endif
- uint32_t PCFUN; /**< 0x0014: Function Pin Enable */
- uint32_t PCDIR; /**< 0x0018: Pin Direction */
- uint32_t PCDIN; /**< 0x001C: Pin Input Latch */
- uint32_t PCDOUT; /**< 0x0020: Pin Output Latch */
- uint32_t PCSET; /**< 0x0024: Output Pin Set */
- uint32_t PCCLR; /**< 0x0028: Output Pin Clr */
- uint32_t PCPDR; /**< 0x002C: Open Drain Output Enable */
- uint32_t PCDIS; /**< 0x0030: Pullup/Pulldown Disable */
- uint32_t PCPSL; /**< 0x0034: Pullup/Pulldown Selection */
- uint32_t DAT0; /**< 0x0038: Transmit Data */
- uint32_t DAT1; /**< 0x003C: Transmit Data with Format and Chip Select */
- uint32_t BUF; /**< 0x0040: Receive Buffer */
- uint32_t EMU; /**< 0x0044: Emulation Receive Buffer */
- uint32_t DELAY; /**< 0x0048: Delays */
- uint32_t CSDEF; /**< 0x004C: Default Chip Select */
- uint32_t FMT0; /**< 0x0050: Data Format 0 */
- uint32_t FMT1; /**< 0x0054: Data Format 1 */
- uint32_t FMT2; /**< 0x0058: Data Format 2 */
- uint32_t FMT3; /**< 0x005C: Data Format 3 */
- uint32_t INTVECT0; /**< 0x0060: Interrupt Vector 0 */
- uint32_t INTVECT1; /**< 0x0064: Interrupt Vector 1 */
- uint32_t SRSEL; /**< 0x0068: Slew Rate Select */
-
- uint32_t PMCTRL; /**< 0x006C: Parallel Mode Control */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t MIBSPIE:16U; /**< 0x0072: MibSPI Enable */
- uint32_t RAMACCESS:16U; /**< 0x0070: RX Ram Write Access Enable */
-#else
- uint32_t RAMACCESS:16U; /**< 0x0070: RX Ram Write Access Enable */
- uint32_t MIBSPIE:16U; /**< 0x0072: MibSPI Enable */
-#endif
-
- uint32_t RESERVED[48U]; /**< 0x006C to 0x0130: Reserved */
- uint32_t IOLPKTSTCR; /**< 0x0134: IO loopback */
-} spiBASE_compat_t;
-
-
-/* SPI devices connected to SPI interface */
-typedef struct spi_dev {
- unsigned int cs; /* Combination of CS (+GPIO CS) necessary to enable the device */
- unsigned char dfsel; /* Data word format */
- unsigned char wdel; /* Enable the delay counter at the end of the current transaction */
- unsigned char cshold; /* Chip select hold mode */
- unsigned int dlen; /* Data len needed for one complete transfer */
-} spi_dev_t;
-
-/* SPI interface */
-typedef struct spi_tms570_drv {
- spi_drv_t spi_drv;
- spiBASE_compat_t *spi; /* Base Reg. for SPI device register array */
- unsigned txcnt; /* No. of transfered bytes for msg_act */
- unsigned rxcnt; /* No. of received bytes for msg_act */
- spi_dev_t *spi_devs; /* Pointer to table holding information about SPI devices bound to the interface */
- uint32_t transfer_ctrl; /* Transfer configuration -- upper 16 bits of SPIDAT1 register */
-} spi_tms570_drv_t;
-
-//extern spi_tms570_drv_t spi_tms570_ifcs[4];
-//extern spi_dev_t spi_devs[];
-int spi_tms570_init(void);
-
-spi_drv_t *spi_find_drv(char *name, int number);
-
-
-#endif /* _MYSPI_H_ */
-
-
+++ /dev/null
-/**
- * RPP API configuration file.
- *
- * @file RppConfig.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-/*
- * Modules include RPP configuration options
- */
-#define rppCONFIG_INCLUDE_DIN 1
-#define rppCONFIG_INCLUDE_LOUT 1
-#define rppCONFIG_INCLUDE_AIN 1
-#define rppCONFIG_INCLUDE_AOUT 1
-#define rppCONFIG_INCLUDE_HBR 1
-#define rppCONFIG_INCLUDE_MOUT 1
-#define rppCONFIG_INCLUDE_HOUT 1
-#define rppCONFIG_INCLUDE_CAN 1
-#define rppCONFIG_INCLUDE_LIN 1
-#define rppCONFIG_INCLUDE_FR 1
-#define rppCONFIG_INCLUDE_SCI 1
-#define rppCONFIG_INCLUDE_ETH 1
-#define rppCONFIG_INCLUDE_SDC 1
-#define rppCONFIG_INCLUDE_SDR 1
-
-/**
- * Compile against the DRV library.
- * Set to 0 to compile a dummy library without backend.
- * Setting to 0 is useful to test RPP library compile errors.
- */
-#define rppCONFIG_DRV 1
-
-
+++ /dev/null
-/**
- * Analog Input RPP API header file.
- *
- * @file ain.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_AIN_H
-#define __RPP_AIN_H
-
-/**
- * AIN module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_ain_init();
-
-
-/**
- * Get the current analog value on the given pin.
- *
- * @param[in] pin The pin number to read [1-12].
- *
- * @return [0-4095] Value representing the analog value on given pin
- * (ADC is 12bit resolution).\n
- * -1 if pin number is out of range.
- */
-int16_t rpp_ain_get(uint8_t pin);
-
-
-/**
- * Read and update analog cached values.
- *
- * @return SUCCESS when transaction was successful.\n
- * FAILURE if transaction could not be confirmed.
- */
-int8_t rpp_ain_update();
-
-
-#endif /* __RPP_AIN_H */
+++ /dev/null
-/**
- * Analog Output RPP API header file.
- *
- * @file aout.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_AOUT_H
-#define __RPP_AOUT_H
-
-/**
- * DAC output operational amplifier multiplication constant.
- */
-#define RPP_DAC_OA 5.6
-/**
- * DAC hardware reference voltage.
- */
-#define RPP_DAC_VREF 2.5
-
-/**
- * AOUT module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_aout_init();
-
-
-/**
- * Configure enabled/disabled state for given pin.
- *
- * Call rpp_aout_update() to commit setup changes to real hardware.
- *
- * @param[in] pin The pin number to setup [1-4].
- * @param[in] enabled TRUE to enable pin or FALSE to disable it.
- *
- * @return SUCCESS if successful.\n
- * -1 if pin number is out of range.
- */
-int8_t rpp_aout_setup(uint8_t pin, boolean_t enabled);
-
-
-/**
- * Set the output cache of given pin to given value.
- *
- * Call rpp_aout_update() to flush cached values to real hardware.
- *
- * @param[in] pin The pin number to set [1-4].
- * @param[in] val The value to be set [0-4095] (DAC is 12bit resolution).
- *
- * @return SUCCESS when success.\n
- * -1 if pin number is out of range.\n
- * -2 if value is out of range.
- *
- * @note Due to hardware characteristics (operational amplifiers and voltage
- * reference) the DAC outputs top 12V at arround 3510. To avoid confusion
- * to the user and to support future changes the value given is mapped
- * from [0-4095] to [0-3510] with the expected resolution loss.
- */
-int8_t rpp_aout_set(uint8_t pin, uint16_t val);
-
-
-/**
- * Set output to given voltage.
- *
- * Helper function that calculates DAC value given a voltage in millivolts.
- *
- * @param[in] pin The pin number to set [1-4].
- * @param[in] mv Voltage level in mV to be set on specified pin [0-12000].
- *
- * @return SUCCESS when success.\n
- * -1 if pin number is out of range.\n
- * -2 if voltage is out of range.
- */
-int8_t rpp_aout_set_voltage(uint8_t pin, uint16_t mv);
-
-
-/**
- * Flush cached output values and configuration changes.
- *
- * @bug This function should be called only after the FreeRTOS Scheduler has
- * started (which implies from a FreeRTOS Task). If called before starting the
- * scheduler, like for library initialization, or application DAC
- * initialization, the application will freeze. The cause of this is unknown at
- * the moment.
- *
- * @return SUCCESS when transaction was successful.\n
- * FAILURE if transaction could not be confirmed.
- */
-int8_t rpp_aout_update();
-
-
-#endif /* __RPP_AOUT_H */
-
+++ /dev/null
-/**
- * CAN Bus Communication RPP API header file.
- *
- * @file can.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_CAN_H
-#define __RPP_CAN_H
-
-/**
- * CAN module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_can_init();
-
-
-#endif /* __RPP_CAN_H */
-
+++ /dev/null
-/**
- * Digital Input RPP API header file.
- *
- * @file din.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_DIN_H
-#define __RPP_DIN_H
-
-/**
- * DIN module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_din_init();
-
-
-/**
- * Configure voltage reference levels for digital inputs using variable
- * reference threshold.
- *
- * @param[in] refA [0-4095] value to set (DAC is 12bits) the reference
- * voltage A (pins 13-16).
- * @param[in] refB [0-4095] value to set (DAC is 12bits) the reference
- * voltage B (pins 9-12).
- *
- * @return SUCCESS if successful.\n
- * -1 if pin millivolts is out of range.
- */
-int8_t rpp_din_ref(uint16_t refA, uint16_t refB);
-
-
-/**
- * Configure given pin.
- *
- * Call rpp_din_update() to commit configuration changes to the hardware.
- *
- * @param[in] pin The pin number to setup [1-16].
- * @param[in] pull_type TRUE to setup pin as pull-up (a switch-to-ground device
- * is connected) or FALSE to setup as pull-down
- * (switch-to-battery).
- * Note that pins [9-16] are pull-down only.
- * @param[in] active TRUE to setup pin as active or FALSE to set it as
- * tri-stated.
- * @param[in] can_wake TRUE is given pin can wake module from sleep state and
- * trigger an interrupt on MCU. FALSE otherwise.
- *
- * @return SUCCESS if successful.\n
- * -1 if pin number is out of range.\n
- * -2 if pull_type is requested for pins without this feature.
- */
-int8_t rpp_din_setup(uint8_t pin, boolean_t pull_type,
- boolean_t active, boolean_t can_wake);
-
-
-/**
- * Get the current cached value of the given pin.
- *
- * Call rpp_din_update() to update cached values.
- *
- * @param[in] pin The pin number to read [1-16].
- * @param[in] var_thr TRUE to read from variable threshold uncached high speed
- * channel. See rpp_din_ref().\n
- * Note that only inputs [9-16] can use this option.\n
- * Inputs [9-12] use variable threshold B and [13-16] use
- * variable threshold A.\n
- * FALSE to read from SPI cached value. All pins can use
- * this option.
- *
- * @return HIGH or LOW if successful.\n
- * -1 if pin number is out of range.\n
- * -2 if var_thr is requested for inputs without this feature.
- */
-int8_t rpp_din_get(uint8_t pin, boolean_t var_thr);
-
-
-/**
- * Get the diagnostic cached value for given pin.
- *
- * Call rpp_din_update() to update cached values.
- *
- * @param[in] pin The pin number to read [1-16].
- *
- * @return HIGH or LOW if successful.\n
- * -1 if pin number is out of range.
- */
-int8_t rpp_din_diag(uint8_t pin);
-
-
-/**
- * Read and update cached values and diagnostic values of all pins. Also commit
- * configuration changes.
- *
- * @return SUCCESS when transaction was successful.\n
- * FAILURE if transaction could not be confirmed.
- */
-int8_t rpp_din_update();
-
-
-#endif /* __RPP_DIN_H */
+++ /dev/null
-/**
- * Ethernet Communication RPP API header file.
- *
- * @file eth.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_ETH_H
-#define __RPP_ETH_H
-
-/**
- * ETH module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_eth_init();
-
-
-#endif /* __RPP_ETH_H */
-
+++ /dev/null
-/**
- * FlexRay Communication RPP API header file.
- *
- * @file fr.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_FR_H
-#define __RPP_FR_H
-
-/**
- * FR module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_fr_init();
-
-
-#endif /* __RPP_FR_H */
-
+++ /dev/null
-/**
- * H-Bridge Output RPP API header file.
- *
- * @file hbr.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_HBR_H
-#define __RPP_HBR_H
-
-/**
- * HBR module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_hbr_init();
-
-
-/**
- * Enable the H-Bridge for control.
- *
- * By default, the H-Bridge is initialized with the given period (which implies
- * frequency), 0 duty cycle, output disabled and direction HIGH. Once enabled
- * with this function, the H-Bridge can be controlled with rpp_hbr_control()
- * (see below).
- *
- * @param[in] period Period of the PWM in microseconds (us). If period is
- * less than 1 (the minimum, see note below) the default of
- * 55us (~18kHz, 18181.8181_ Hz to be precise) is used.
- *
- * @return SUCCESS if successful.\n
- * FAILURE if H-Bridge was already enabled or watchdog task could not
- * be created.
- *
- * @note Period considerations from Software perspective (hardware verification
- * required):
- * @par
- * - Minimum value is [1us]:
- * - 1us = 0.001 ms =>
- * - 1000000 Hz = 1 MHz
- * - A pulse of 1% of the duty cycle -> 100 MHz (X)
- * - System clock is 80MHz.
- * @par
- * - Maximum value is [2147483647us] (full 32bit signed integer):
- * - 2147483647us = 2147483.647 ms = 2147.483647 s =
- * ~35.791394 min => 0.000465661129 Hz -> 0.0... MHz
- */
-int8_t rpp_hbr_enable(int32_t period);
-
-
-/**
- * Control the H-Bridge direction, enabled/disabled and PWM.
- *
- * @param[in] cmd [-1.0, 1.0] A double between the previous range to
- * command the H-Bridge in the following manner:
- * - cmd == 0 : Disable H-Bridge (no PWM or direction).
- * - cmd > 0 : H-bridge output enabled, direction set
- * to HIGH and PWM duty cycle proportional
- * with 1% resolution.
- * - cmd < 0 : H-bridge output enabled, direction set
- * to LOW and PWM duty cycle proportional
- * with 1% resolution.
- *
- * Consider the following:
- *
- * @code
- * rpp_hbr_enable(-1); // Enable H-Bridge at 18kHz.
- * rpp_hbr_control( 1.0); // Set direction to HIGH and 100% PWM duty cycle.
- * (...)
- * rpp_hbr_control( 0.0); // No direction and 0% duty cycle.
- * (...)
- * rpp_hbr_control(-0.5); // Set direction to LOW and 50% PWM duty cycle.
- * rpp_hbr_disable(); // Disable H-Bridge.
- * @endcode
- *
- * @return SUCCESS if change was successful.\n
- * -1 if H-Bridge is not enabled. Call rpp_hbr_enable() first.\n
- * -2 if cmd is out of range.
- */
-int8_t rpp_hbr_control(double cmd);
-
-
-/**
- * Disable the H-Bridge.
- *
- * Completely disable H-Bridge. After this call the H-Bridge cannot be
- * controlled again until another call to rpp_hbr_enable() is made.
- *
- * @return SUCCESS if successful.\n
- * FAILURE if H-Bridge was disabled already.
- */
-int8_t rpp_hbr_disable();
-
-
-#endif /* __RPP_HBR_H */
-
+++ /dev/null
-/**
- * High-Power Output (12V, 10A, PWM) RPP API header file.
- *
- * @file hout.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_HOUT_H
-#define __RPP_HOUT_H
-
-/**
- * HOUT module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_hout_init();
-
-
-#endif /* __RPP_HOUT_H */
-
+++ /dev/null
-/**
- * LIN Communication RPP API header file.
- *
- * @file lin.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_LIN_H
-#define __RPP_LIN_H
-
-/**
- * LIN module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_lin_init();
-
-
-#endif /* __RPP_LIN_H */
-
+++ /dev/null
-/**
- * Logic Output RPP API header file.
- *
- * @file lout.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_LOUT_H
-#define __RPP_LOUT_H
-
-/**
- * LOUT module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_lout_init();
-
-
-/**
- * Set the output cache of given pin to given value.
- *
- * Call rpp_lout_update() to flush cached values to real hardware.
- *
- * @param[in] pin The pin number to set [1-8].
- * @param[in] val The value to be set [HIGH|LOW].
- *
- * @return SUCCESS when success.\n
- * -1 if pin number is out of range.
- */
-int8_t rpp_lout_set(uint8_t pin, uint8_t val);
-
-
-/**
- * Get the diagnostic cached value for given pin.
- *
- * Call rpp_lout_update() to update cached values.
- *
- * @param[in] pin The pin number to read [1-8].
- *
- * @return HIGH or LOW if successful.\n
- * -1 if pin number is out of range.
- */
-int8_t rpp_lout_diag(uint8_t pin);
-
-
-/**
- * Flush cached output values and read back diagnostic values of all pins.
- *
- * @return SUCCESS when transaction was successful.\n
- * FAILURE if transaction could not be confirmed.
- */
-int8_t rpp_lout_update();
-
-
-#endif /* __RPP_LOUT_H */
+++ /dev/null
-/**
- * Power Output (12V, 2A, Push/Pull) RPP API header file.
- *
- * @file mout.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_MOUT_H
-#define __RPP_MOUT_H
-
-/**
- * MOUT module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_mout_init();
-
-
-/**
- * Set the output of given pin to given value.
- *
- * This function will also verify if a faulty condition is detected. See return
- * documentation below for details.
- *
- * @param[in] pin The pin number to set [1-6].
- * @param[in] val The value to be set [HIGH|LOW].
- *
- * @return SUCCESS if pin could be set and verified.\n
- * -1 if pin number is out of range.\n
- * -2 if val is not HIGH or LOW.\n
- * -3 if pin could not be set. With current implementation this should
- * never happen.\n
- * -4 if pin is confirmed to be in trouble.
- * This normally indicates a hardware failure and that the driver
- * chip pulled the diagnostic pin.
- */
-int8_t rpp_mout_set(uint8_t pin, uint8_t val);
-
-
-/**
- * Get the cached value of the given pin set by rpp_mout_set().
- *
- * This will not read the value on the pin. To confirm if the output is
- * correctly set call rpp_mout_diag() and confirm SUCCESS.
- *
- * @param[in] pin The pin number to get cached value [1-6].
- *
- * @return HIGH or LOW cached from last rpp_mout_set() call for given pin.
- * -1 if pin number is out of range.
- */
-int8_t rpp_mout_get(uint8_t pin);
-
-
-/**
- * Reads the value on the given diagnostic pin.
- *
- * Note that rpp_mout_set() calls this routine already before returning.
- *
- * @param[in] pin The pin number to read [1-6].
- *
- * @return SUCCESS is output is operating normally.
- * FAILURE if a faulty condition was detected.
- */
-int8_t rpp_mout_diag(uint8_t pin);
-
-
-#endif /* __RPP_MOUT_H */
-
+++ /dev/null
-/**
- * RPP API library header file.
- *
- * @file rpp.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_RPP_H
-#define __RPP_RPP_H
-
-/* Base includes */
-#include "base.h"
-
-/* Include configuration */
-#include "rpp/RppConfig.h"
-
-/* Include modules */
-#if rppCONFIG_INCLUDE_DIN == 1
-#include "rpp/din.h"
-#endif
-
-#if rppCONFIG_INCLUDE_LOUT == 1
-#include "rpp/lout.h"
-#endif
-
-#if rppCONFIG_INCLUDE_AIN == 1
-#include "rpp/ain.h"
-#endif
-
-#if rppCONFIG_INCLUDE_AOUT == 1
-#include "rpp/aout.h"
-#endif
-
-#if rppCONFIG_INCLUDE_HBR == 1
-#include "rpp/hbr.h"
-#endif
-
-#if rppCONFIG_INCLUDE_MOUT == 1
-#include "rpp/mout.h"
-#endif
-
-#if rppCONFIG_INCLUDE_HOUT == 1
-#include "rpp/hout.h"
-#endif
-
-#if rppCONFIG_INCLUDE_CAN == 1
-#include "rpp/can.h"
-#endif
-
-#if rppCONFIG_INCLUDE_LIN == 1
-#include "rpp/lin.h"
-#endif
-
-#if rppCONFIG_INCLUDE_FR == 1
-#include "rpp/fr.h"
-#endif
-
-#if rppCONFIG_INCLUDE_SCI == 1
- #include "rpp/sci.h"
-
- #ifdef FREERTOS_POSIX
- #if rppCONFIG_DRV == 1
- #error "Your build system is broken. "\
- "You are trying to compile the RPP API against POSIX "\
- "FreeRTOS for Simulation with dependency on the ARM-only "\
- "DRV layer enabled."
- #endif
-
- #include "rpp/sci_posix.h"
- #endif
-#endif
-
-#if rppCONFIG_INCLUDE_ETH == 1
-#include "rpp/eth.h"
-#endif
-
-#if rppCONFIG_INCLUDE_SDC == 1
-#include "rpp/sdc.h"
-#endif
-
-#if rppCONFIG_INCLUDE_SDR == 1
-#include "rpp/sdr.h"
-#endif
-
-
-/* Library main functions */
-
-/**
- * Library initialization function.
- *
- * Call this method before using this library.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE is library was already initialized.
- */
-int8_t rpp_init();
-
-
-#endif /* __RPP_RPP_H */
+++ /dev/null
-/**
- * Serial Communication Interface RPP API header file.
- *
- * @file sci.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_SCI_H
-#define __RPP_SCI_H
-
-/**
- * SCI module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_sci_init();
-
-
-/**
- * SCI module setup.
- *
- * Configure the SCI module.
- *
- * @param[in] baud Baud rate for the SCI. Tested values are 9600 and 115200
- * Default is 9600. If 0 is provided default is used.
- *
- * @return TRUE if baud rate is a known value.\n
- * FALSE otherwise.
- */
-boolean_t rpp_sci_setup(uint32_t baud);
-
-
-// Generic API
-/**
- * Number of bytes available on input buffer.
- *
- * Get the number of bytes (characters) available for reading from the serial
- * port. This is data that's already arrived and stored in the SCI input buffer.
- *
- * @return [0-MAX_BUFFER_LEN] The number of bytes available to read.
- */
-uint16_t rpp_sci_available();
-
-
-/**
- * Read n number of bytes from input buffer.
- *
- * Transfer given amount of bytes from SCI input buffer into given buffer.
- * Buffer should be at least as large as the amount of data requested.
- *
- * This is a blocking call.
- *
- * Will block until requested amount of data is available.
- *
- * @param[in] amount Amount/number of bytes to read.
- * @param[out] buffer Pointer to buffer where to store data.
- *
- * @return SUCCESS when all data was transfered.
- */
-int8_t rpp_sci_read(uint32_t amount, uint8_t* buffer);
-
-
-/**
- * Read n number of bytes from input buffer if possible.
- *
- * Transfer given amount of bytes from SCI input buffer into given buffer.
- * Buffer should be at least as large as the amount of data requested.
- *
- * This is a non-blocking call.
- *
- * This function will only succeed if requested amount of data is present
- * already in the input buffer.
- *
- * @param[in] amount Amount/number of bytes to read.
- * @param[out] buffer Pointer to buffer where to store data.
- *
- * @return SUCCESS if the requested amount of data could be transfered.\n
- * FAILURE if requested amount of data is unavailable.
- */
-int8_t rpp_sci_read_nb(uint32_t amount, uint8_t* buffer);
-
-
-/**
- * Write n number of bytes to the output buffer.
- *
- * Transfer given amount of bytes from given buffer to the SCI output buffer.
- * Data buffer should be at least as large as the amount of data requested to be
- * sent.
- *
- * This is a blocking call.
- *
- * This will block if SCI output buffer is full waiting until some space is
- * freed.
- *
- * @param[in] amount Amount/number of bytes to send.
- * @param[in] data Pointer to buffer from where to read data.
- *
- * @return SUCCESS when all data was transfered.
- */
-int8_t rpp_sci_write(uint32_t amount, uint8_t* data);
-
-
-/**
- * Write n number of bytes to the output buffer if possible.
- *
- * Transfer given amount of bytes from given buffer to the SCI output buffer.
- * Data buffer should be at least as large as the amount of data requested to be
- * sent.
- *
- * This is a non-blocking call.
- *
- * This is a best effort call, that means that this will try to put the maximum
- * amount of data into the output buffer until it's full or all the requested
- * amount of data could be transfered. If output buffer is blocked by another
- * process this function will not wait to acquire the lock for the buffer.
- *
- * @param[in] amount Amount/number of bytes to send.
- * @param[in] data Pointer to buffer from where to read data.
- *
- * @return SUCCESS if the requested amount of data could be transfered to the
- * output buffer.\n
- * FAILURE if the SCI output buffer was locked by another process or
- * not all the bytes requested to send could be transfered.
- */
-int8_t rpp_sci_write_nb(uint32_t amount, uint8_t* data);
-
-
-/**
- * Flush incomming or outgoing buffers.
- *
- * This is a blocking call.
- *
- * This will block if another process is writing to or reading data from the
- * selected buffer to flush until this process releases the lock on the buffer.
- *
- * @param[in] buff TRUE to flush incomming buffer.
- * FALSE to flush outgoing buffer.
- *
- * @return SUCCESS if flushed buffer had some data.\n
- * FAILURE if flushed buffer had no data left.
- */
-int8_t rpp_sci_flush(boolean_t buff);
-
-
-// C style API
-/**
- * C style printf using RPP SCI module.
- *
- * This is a blocking call.
- *
- * This function will wait until all the bytes are sent to the SCI output
- * buffer. Implementation uses vsnprintf() from stdio.h using a fixed
- * MAX_BUFFER_LEN bytes buffer.
- *
- * @param[in] format C string that contains a format string that follows the
- * same specifications as format in printf (see stdio.h's
- * printf for details).
- * @param[in] ... (additional arguments) Depending on the format string,
- * the function may expect a sequence of additional
- * arguments, each containing a value to be used to replace
- * a format specifier in the format string (or a pointer to
- * a storage location).
- * There should be at least as many of these arguments as
- * the number of values specified in the format specifiers.
- * Additional arguments are ignored by the function.
- *
- * @return The number of characters that would have been written if the buffer
- * had been sufficiently large, not counting the terminating null
- * character. If an encoding error occurs, a negative number is
- * returned. Please note that only when this returned value is
- * non-negative and less than the buffer size, the string has been
- * completely written.
- */
-int32_t rpp_sci_printf(const char* format, ...);
-
-
-/**
- * C style putc (put character) using RPP SCI module.
- *
- * This is a blocking call.
- *
- * This function will wait until the given byte is put into SCI output buffer if
- * it is full.
- *
- * @param[in] byte Byte to put into SCI output buffer.
- *
- * @return SUCCESS when the given byte could be transfered.
- */
-int8_t rpp_sci_putc(uint8_t byte);
-
-
-/**
- * C style getc (get character) using RPP SCI module.
- *
- * This is a blocking call.
- *
- * This function will wait until a byte is available in the SCI input buffer if
- * it is empty.
- *
- * @note The byte is promoted to an int16_t in order to accommodate for
- * FAILURE/EOF/-1 if an error occurs. This is in order to conform with C getc,
- * but should never happen in current implementation because this is a blocking
- * call and will always wait for one byte to be available in the input buffer.
- * Nevertheless, if user compiles it's programs against POSIX FreeRTOS for
- * Simulation then the compatibility layers makes it possible to return EOF so
- * user expecting to run in Simulation should always check for FAILURE.
- *
- * @return [0-255] The byte read from the SCI input buffer.\n
- * FAILURE If and error occurred.
- */
-int16_t rpp_sci_getc();
-
-
-
-#endif /* __RPP_SCI_H */
-
+++ /dev/null
-/**
- * SD Card logging RPP API header file.
- *
- * @file sdc.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_SDC_H
-#define __RPP_SDC_H
-
-/**
- * SDC module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_sdc_init();
-
-
-#endif /* __RPP_SDC_H */
-
+++ /dev/null
-/**
- * SD-RAN logging RPP API header file.
- *
- * @file sdr.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-
-#ifndef __RPP_SDR_H
-#define __RPP_SDR_H
-
-/**
- * SDRAM start address on RPP board.
- *
- * @note See RPP_SDR_ADDR_END for memory size.
- */
-#define RPP_SDR_ADDR_START 0x80000000U
-
-/**
- * SDRAM end address on RPP board.
- *
- * @note 0x83FFFFFF − 0x80000000 + 1 = 67108864 addresses.\n
- * One address per byte.\n
- * 67108864 bytes = 65536 Kbytes = 64 Mbytes.
- */
-#define RPP_SDR_ADDR_END 0x83FFFFFFU
-
-
-/**
- * SDR module initialization.
- *
- * Call this method before using this module.
- *
- * @return SUCCESS if initialization successful.\n
- * FAILURE if module already initialized.
- */
-int8_t rpp_sdr_init();
-
-
-/**
- * Configure SD-RAM logging.
- *
- * This function will enable or disable logging on application. Note that when
- * logging is enabled a command processor task which uses the SCI for user I/O
- * is spawned. This command processor might conflict with user application if it
- * also uses the SCI for user I/O.
- *
- * @param[in] enable Enable/Disable logging on application.
- *
- * @return SUCCESS if logging was successfully enabled or disabled.\n
- * FAILURE if trying to disable disabled (or enable enabled)
- * logging, SDR module have not being initialized or not
- * enough memory to allocate tasks.
- */
-int8_t rpp_sdr_setup(boolean_t enable);
-
-
-/**
- * Query for the amount of space free on the SD-RAM.
- *
- * This funtion will calculate the amount of free space left (not used by logs)
- * on the SD-RAM.
- *
- * @return Number of bytes free in the SD-RAM.\n
- * For 64MB SD-RAM value is between [0-67108864]
- */
-uint32_t rpp_sdr_available();
-
-
-/**
- * Store a formatted user string on the log, if logging is enabled.
- *
- * Implementation uses vsnprintf() from stdio.h using a fixed MAX_BUFFER_LEN
- * bytes buffer.
- *
- * @param[in] format C string that contains a format string that follows the
- * same specifications as format in printf (see stdio.h's
- * printf for details).
- * @param[in] ... (additional arguments) Depending on the format string,
- * the function may expect a sequence of additional
- * arguments, each containing a value to be used to replace
- * a format specifier in the format string (or a pointer to
- * a storage location).
- * There should be at least as many of these arguments as
- * the number of values specified in the format specifiers.
- * Additional arguments are ignored by the function.
- *
- * @return The number of characters that would have been written if the buffer
- * had been sufficiently large, not counting the terminating null
- * character.
- * If logging is disabled, an encoding error occurs or the log file is
- * full a negative number is returned.
- * Please note that only when this returned value is non-negative and
- * less than the buffer size, the string has been completely written.
- */
-int32_t rpp_sdr_printf(const char* format, ...);
-
-
-/**
- * Clear log.
- *
- * This funtion will clear all the data from the log. This will also stop the
- * show task if it's currently flushing the log.
- *
- * @return SUCCESS if log was cleared.\n
- * FAILURE if logging is disabled or log was already empty.
- */
-int8_t rpp_sdr_clear();
-
-
-/**
- * Start/Stop the task that sends the log to the SCI.
- *
- * This function will start the task that reads the log and prints it to the
- * SCI in a similar way the 'dmesg' command work on Linux.
- *
- * @param[in] start TRUE to request the log to be sent to the SCI.
- * FALSE to stop the log file from being send to the SCI.
- *
- * @return SUCCESS if log was cleared.\n
- * FAILURE if logging is disabled or trying to stop an stopped task
- * (or start an already started task).
- */
-int8_t rpp_sdr_show(boolean_t start);
-
-
-#endif /* __RPP_SDR_H */
-
+++ /dev/null
-#ifndef _CPU_DEF_H_
-#define _CPU_DEF_H_
-
-#if 1
-#define __memory_barrier() \
- asm("dmb")
-#else
-#define __memory_barrier() \
- do {;} while(0)
-#endif
-
-
-#define save_and_cli(saveif) do { (saveif) = _disable_IRQ(); } while (0)
-#define restore_flags(saveif) _restore_interrupts(saveif)
-
-
-#endif /* _CPU_DEF_H_ */
+++ /dev/null
-/*
- * hw_emac1.h
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-
-#ifndef _HW_EMAC_H_
-#define _HW_EMAC_H_
-
-#define EMAC_BASE (0xFCF78000U)
-#define EMAC_CTRL_BASE (0xFCF78800U)
-#define EMAC_CTRL_RAM_BASE (0xFC520000U)
-
-#define EMAC_TXREVID (0x0)
-#define EMAC_TXCONTROL (0x4)
-#define EMAC_TXTEARDOWN (0x8)
-#define EMAC_RXREVID (0x10)
-#define EMAC_RXCONTROL (0x14)
-#define EMAC_RXTEARDOWN (0x18)
-#define EMAC_TXINTSTATRAW (0x80)
-#define EMAC_TXINTSTATMASKED (0x84)
-#define EMAC_TXINTMASKSET (0x88)
-#define EMAC_TXINTMASKCLEAR (0x8C)
-#define EMAC_MACINVECTOR (0x90)
-#define EMAC_MACEOIVECTOR (0x94)
-#define EMAC_RXINTSTATRAW (0xA0)
-#define EMAC_RXINTSTATMASKED (0xA4)
-#define EMAC_RXINTMASKSET (0xA8)
-#define EMAC_RXINTMASKCLEAR (0xAC)
-#define EMAC_MACINTSTATRAW (0xB0)
-#define EMAC_MACINTSTATMASKED (0xB4)
-#define EMAC_MACINTMASKSET (0xB8)
-#define EMAC_MACINTMASKCLEAR (0xBC)
-#define EMAC_RXMBPENABLE (0x100)
-#define EMAC_RXUNICASTSET (0x104)
-#define EMAC_RXUNICASTCLEAR (0x108)
-#define EMAC_RXMAXLEN (0x10C)
-#define EMAC_RXBUFFEROFFSET (0x110)
-#define EMAC_RXFILTERLOWTHRESH (0x114)
-#define EMAC_RXFLOWTHRESH(n) (0x120 + (n * 4))
-#define EMAC_RXFREEBUFFER(n) (0x140 + (n * 4))
-#define EMAC_MACCONTROL (0x160)
-#define EMAC_MACSTATUS (0x164)
-#define EMAC_EMCONTROL (0x168)
-#define EMAC_FIFOCONTROL (0x16C)
-#define EMAC_MACCONFIG (0x170)
-#define EMAC_SOFTRESET (0x174)
-#define EMAC_MACSRCADDRLO (0x1D0)
-#define EMAC_MACSRCADDRHI (0x1D4)
-#define EMAC_MACHASH1 (0x1D8)
-#define EMAC_MACHASH2 (0x1DC)
-#define EMAC_BOFFTEST (0x1E0)
-#define EMAC_TPACETEST (0x1E4)
-#define EMAC_RXPAUSE (0x1E8)
-#define EMAC_TXPAUSE (0x1EC)
-#define EMAC_RXGOODFRAMES (0x200)
-#define EMAC_RXBCASTFRAMES (0x204)
-#define EMAC_RXMCASTFRAMES (0x208)
-#define EMAC_RXPAUSEFRAMES (0x20C)
-#define EMAC_RXCRCERRORS (0x210)
-#define EMAC_RXALIGNCODEERRORS (0x214)
-#define EMAC_RXOVERSIZED (0x218)
-#define EMAC_RXJABBER (0x21C)
-#define EMAC_RXUNDERSIZED (0x220)
-#define EMAC_RXFRAGMENTS (0x224)
-#define EMAC_RXFILTERED (0x228)
-#define EMAC_RXQOSFILTERED (0x22C)
-#define EMAC_RXOCTETS (0x230)
-#define EMAC_TXGOODFRAMES (0x234)
-#define EMAC_TXBCASTFRAMES (0x238)
-#define EMAC_TXMCASTFRAMES (0x23C)
-#define EMAC_TXPAUSEFRAMES (0x240)
-#define EMAC_TXDEFERRED (0x244)
-#define EMAC_TXCOLLISION (0x248)
-#define EMAC_TXSINGLECOLL (0x24C)
-#define EMAC_TXMULTICOLL (0x250)
-#define EMAC_TXEXCESSIVECOLL (0x254)
-#define EMAC_TXLATECOLL (0x258)
-#define EMAC_TXUNDERRUN (0x25C)
-#define EMAC_TXCARRIERSENSE (0x260)
-#define EMAC_TXOCTETS (0x264)
-#define EMAC_FRAME64 (0x268)
-#define EMAC_FRAME65T127 (0x26C)
-#define EMAC_FRAME128T255 (0x270)
-#define EMAC_FRAME256T511 (0x274)
-#define EMAC_FRAME512T1023 (0x278)
-#define EMAC_FRAME1024TUP (0x27C)
-#define EMAC_NETOCTETS (0x208)
-#define EMAC_RXSOFOVERRUNS (0x284)
-#define EMAC_RXMOFOVERRUNS (0x288)
-#define EMAC_RXDMAOVERRUNS (0x28C)
-#define EMAC_MACADDRLO (0x500)
-#define EMAC_MACADDRHI (0x504)
-#define EMAC_MACINDEX (0x508)
-#define EMAC_TXHDP(n) (0x600 + (n * 4))
-#define EMAC_RXHDP(n) (0x620 + (n * 4))
-#define EMAC_TXCP(n) (0x640 + (n * 4))
-#define EMAC_RXCP(n) (0x660 + (n * 4))
-
-/**************************************************************************\
-* Field Definition Macros
-\**************************************************************************/
-
-/* TXREVID */
-
-#define EMAC_TXREVID_TXREV (0xFFFFFFFFu)
-#define EMAC_TXREVID_TXREV_SHIFT (0x00000000u)
-
-
-/* TXCONTROL */
-
-
-#define EMAC_TXCONTROL_TXEN (0x00000001u)
-#define EMAC_TXCONTROL_TXEN_SHIFT (0x00000000u)
-
-
-/* TXTEARDOWN */
-
-#define EMAC_TXTEARDOWN_TXTDNCH (0x00000007u)
-#define EMAC_TXTEARDOWN_TXTDNCH_SHIFT (0x00000000u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA0 (0x00000000u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA1 (0x00000001u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA2 (0x00000002u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA3 (0x00000003u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA4 (0x00000004u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA5 (0x00000005u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA6 (0x00000006u)
-#define EMAC_TXTEARDOWN_TXTDNCH_CHA7 (0x00000007u)
-
-
-/* RXREVID */
-
-#define EMAC_RXREVID_RXREV (0xFFFFFFFFu)
-#define EMAC_RXREVID_RXREV_SHIFT (0x00000000u)
-
-
-/* RXCONTROL */
-
-
-#define EMAC_RXCONTROL_RXEN (0x00000001u)
-#define EMAC_RXCONTROL_RXEN_SHIFT (0x00000000u)
-
-/* RXTEARDOWN */
-
-
-
-#define EMAC_RXTEARDOWN_RXTDNCH (0x00000007u)
-#define EMAC_RXTEARDOWN_RXTDNCH_SHIFT (0x00000000u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA0 (0x00000000u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA1 (0x00000001u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA2 (0x00000002u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA3 (0x00000003u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA4 (0x00000004u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA5 (0x00000005u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA6 (0x00000006u)
-#define EMAC_RXTEARDOWN_RXTDNCH_CHA7 (0x00000007u)
-
-
-/* TXINTSTATRAW */
-
-
-#define EMAC_TXINTSTATRAW_TX7PEND (0x00000080u)
-#define EMAC_TXINTSTATRAW_TX7PEND_SHIFT (0x00000007u)
-
-#define EMAC_TXINTSTATRAW_TX6PEND (0x00000040u)
-#define EMAC_TXINTSTATRAW_TX6PEND_SHIFT (0x00000006u)
-
-#define EMAC_TXINTSTATRAW_TX5PEND (0x00000020u)
-#define EMAC_TXINTSTATRAW_TX5PEND_SHIFT (0x00000005u)
-
-#define EMAC_TXINTSTATRAW_TX4PEND (0x00000010u)
-#define EMAC_TXINTSTATRAW_TX4PEND_SHIFT (0x00000004u)
-
-#define EMAC_TXINTSTATRAW_TX3PEND (0x00000008u)
-#define EMAC_TXINTSTATRAW_TX3PEND_SHIFT (0x00000003u)
-
-#define EMAC_TXINTSTATRAW_TX2PEND (0x00000004u)
-#define EMAC_TXINTSTATRAW_TX2PEND_SHIFT (0x00000002u)
-
-#define EMAC_TXINTSTATRAW_TX1PEND (0x00000002u)
-#define EMAC_TXINTSTATRAW_TX1PEND_SHIFT (0x00000001u)
-
-#define EMAC_TXINTSTATRAW_TX0PEND (0x00000001u)
-#define EMAC_TXINTSTATRAW_TX0PEND_SHIFT (0x00000000u)
-
-
-/* TXINTSTATMASKED */
-
-
-#define EMAC_TXINTSTATMASKED_TX7PEND (0x00000080u)
-#define EMAC_TXINTSTATMASKED_TX7PEND_SHIFT (0x00000007u)
-
-#define EMAC_TXINTSTATMASKED_TX6PEND (0x00000040u)
-#define EMAC_TXINTSTATMASKED_TX6PEND_SHIFT (0x00000006u)
-
-#define EMAC_TXINTSTATMASKED_TX5PEND (0x00000020u)
-#define EMAC_TXINTSTATMASKED_TX5PEND_SHIFT (0x00000005u)
-
-#define EMAC_TXINTSTATMASKED_TX4PEND (0x00000010u)
-#define EMAC_TXINTSTATMASKED_TX4PEND_SHIFT (0x00000004u)
-
-#define EMAC_TXINTSTATMASKED_TX3PEND (0x00000008u)
-#define EMAC_TXINTSTATMASKED_TX3PEND_SHIFT (0x00000003u)
-
-#define EMAC_TXINTSTATMASKED_TX2PEND (0x00000004u)
-#define EMAC_TXINTSTATMASKED_TX2PEND_SHIFT (0x00000002u)
-
-#define EMAC_TXINTSTATMASKED_TX1PEND (0x00000002u)
-#define EMAC_TXINTSTATMASKED_TX1PEND_SHIFT (0x00000001u)
-
-#define EMAC_TXINTSTATMASKED_TX0PEND (0x00000001u)
-#define EMAC_TXINTSTATMASKED_TX0PEND_SHIFT (0x00000000u)
-
-
-/* TXINTMASKSET */
-
-
-#define EMAC_TXINTMASKSET_TX7MASK (0x00000080u)
-#define EMAC_TXINTMASKSET_TX7MASK_SHIFT (0x00000007u)
-
-#define EMAC_TXINTMASKSET_TX6MASK (0x00000040u)
-#define EMAC_TXINTMASKSET_TX6MASK_SHIFT (0x00000006u)
-
-#define EMAC_TXINTMASKSET_TX5MASK (0x00000020u)
-#define EMAC_TXINTMASKSET_TX5MASK_SHIFT (0x00000005u)
-
-#define EMAC_TXINTMASKSET_TX4MASK (0x00000010u)
-#define EMAC_TXINTMASKSET_TX4MASK_SHIFT (0x00000004u)
-
-#define EMAC_TXINTMASKSET_TX3MASK (0x00000008u)
-#define EMAC_TXINTMASKSET_TX3MASK_SHIFT (0x00000003u)
-
-#define EMAC_TXINTMASKSET_TX2MASK (0x00000004u)
-#define EMAC_TXINTMASKSET_TX2MASK_SHIFT (0x00000002u)
-
-#define EMAC_TXINTMASKSET_TX1MASK (0x00000002u)
-#define EMAC_TXINTMASKSET_TX1MASK_SHIFT (0x00000001u)
-
-#define EMAC_TXINTMASKSET_TX0MASK (0x00000001u)
-#define EMAC_TXINTMASKSET_TX0MASK_SHIFT (0x00000000u)
-
-
-/* TXINTMASKCLEAR */
-
-
-#define EMAC_TXINTMASKCLEAR_TX7MASK (0x00000080u)
-#define EMAC_TXINTMASKCLEAR_TX7MASK_SHIFT (0x00000007u)
-
-#define EMAC_TXINTMASKCLEAR_TX6MASK (0x00000040u)
-#define EMAC_TXINTMASKCLEAR_TX6MASK_SHIFT (0x00000006u)
-
-#define EMAC_TXINTMASKCLEAR_TX5MASK (0x00000020u)
-#define EMAC_TXINTMASKCLEAR_TX5MASK_SHIFT (0x00000005u)
-
-#define EMAC_TXINTMASKCLEAR_TX4MASK (0x00000010u)
-#define EMAC_TXINTMASKCLEAR_TX4MASK_SHIFT (0x00000004u)
-
-#define EMAC_TXINTMASKCLEAR_TX3MASK (0x00000008u)
-#define EMAC_TXINTMASKCLEAR_TX3MASK_SHIFT (0x00000003u)
-
-#define EMAC_TXINTMASKCLEAR_TX2MASK (0x00000004u)
-#define EMAC_TXINTMASKCLEAR_TX2MASK_SHIFT (0x00000002u)
-
-#define EMAC_TXINTMASKCLEAR_TX1MASK (0x00000002u)
-#define EMAC_TXINTMASKCLEAR_TX1MASK_SHIFT (0x00000001u)
-
-#define EMAC_TXINTMASKCLEAR_TX0MASK (0x00000001u)
-#define EMAC_TXINTMASKCLEAR_TX0MASK_SHIFT (0x00000000u)
-
-
-/* MACINVECTOR */
-
-
-#define EMAC_MACINVECTOR_STATPEND (0x08000000u)
-#define EMAC_MACINVECTOR_STATPEND_SHIFT (0x0000001Bu)
-
-#define EMAC_MACINVECTOR_HOSTPEND (0x04000000u)
-#define EMAC_MACINVECTOR_HOSTPEND_SHIFT (0x0000001Au)
-
-#define EMAC_MACINVECTOR_LINKINT0 (0x02000000u)
-#define EMAC_MACINVECTOR_LINKINT0_SHIFT (0x00000019u)
-
-#define EMAC_MACINVECTOR_USERINT0 (0x01000000u)
-#define EMAC_MACINVECTOR_USERINT0_SHIFT (0x00000018u)
-
-#define EMAC_MACINVECTOR_TXPEND (0x00FF0000u)
-#define EMAC_MACINVECTOR_TXPEND_SHIFT (0x00000010u)
-
-#define EMAC_MACINVECTOR_RXTHRESHPEND (0x0000FF00u)
-#define EMAC_MACINVECTOR_RXTHRESHPEND_SHIFT (0x00000008u)
-
-#define EMAC_MACINVECTOR_RXPEND (0x000000FFu)
-#define EMAC_MACINVECTOR_RXPEND_SHIFT (0x00000000u)
-
-
-/* MACEOIVECTOR */
-
-
-#define EMAC_MACEOIVECTOR_INTVECT (0x0000001Fu)
-#define EMAC_MACEOIVECTOR_INTVECT_SHIFT (0x00000000u)
-/*----INTVECT Tokens----*/
-#define EMAC_MACEOIVECTOR_INTVECT_C0RXTHRESH (0x00000000u)
-#define EMAC_MACEOIVECTOR_INTVECT_C0RX (0x00000001u)
-#define EMAC_MACEOIVECTOR_INTVECT_C0TX (0x00000002u)
-#define EMAC_MACEOIVECTOR_INTVECT_C0MISC (0x00000003u)
-#define EMAC_MACEOIVECTOR_INTVECT_C1RXTHRESH (0x00000004u)
-#define EMAC_MACEOIVECTOR_INTVECT_C1RX (0x00000005u)
-#define EMAC_MACEOIVECTOR_INTVECT_C1TX (0x00000006u)
-#define EMAC_MACEOIVECTOR_INTVECT_C1MISC (0x00000007u)
-
-
-/* RXINTSTATRAW */
-
-
-#define EMAC_RXINTSTATRAW_RX7THRESHPEND (0x00008000u)
-#define EMAC_RXINTSTATRAW_RX7THRESHPEND_SHIFT (0x0000000Fu)
-
-#define EMAC_RXINTSTATRAW_RX6THRESHPEND (0x00004000u)
-#define EMAC_RXINTSTATRAW_RX6THRESHPEND_SHIFT (0x0000000Eu)
-
-#define EMAC_RXINTSTATRAW_RX5THRESHPEND (0x00002000u)
-#define EMAC_RXINTSTATRAW_RX5THRESHPEND_SHIFT (0x0000000Du)
-
-#define EMAC_RXINTSTATRAW_RX4THRESHPEND (0x00001000u)
-#define EMAC_RXINTSTATRAW_RX4THRESHPEND_SHIFT (0x0000000Cu)
-
-#define EMAC_RXINTSTATRAW_RX3THRESHPEND (0x00000800u)
-#define EMAC_RXINTSTATRAW_RX3THRESHPEND_SHIFT (0x0000000Bu)
-
-#define EMAC_RXINTSTATRAW_RX2THRESHPEND (0x00000400u)
-#define EMAC_RXINTSTATRAW_RX2THRESHPEND_SHIFT (0x0000000Au)
-
-#define EMAC_RXINTSTATRAW_RX1THRESHPEND (0x00000200u)
-#define EMAC_RXINTSTATRAW_RX1THRESHPEND_SHIFT (0x00000009u)
-
-#define EMAC_RXINTSTATRAW_RX0THRESHPEND (0x00000100u)
-#define EMAC_RXINTSTATRAW_RX0THRESHPEND_SHIFT (0x00000008u)
-
-#define EMAC_RXINTSTATRAW_RX7PEND (0x00000080u)
-#define EMAC_RXINTSTATRAW_RX7PEND_SHIFT (0x00000007u)
-
-#define EMAC_RXINTSTATRAW_RX6PEND (0x00000040u)
-#define EMAC_RXINTSTATRAW_RX6PEND_SHIFT (0x00000006u)
-
-#define EMAC_RXINTSTATRAW_RX5PEND (0x00000020u)
-#define EMAC_RXINTSTATRAW_RX5PEND_SHIFT (0x00000005u)
-
-#define EMAC_RXINTSTATRAW_RX4PEND (0x00000010u)
-#define EMAC_RXINTSTATRAW_RX4PEND_SHIFT (0x00000004u)
-
-#define EMAC_RXINTSTATRAW_RX3PEND (0x00000008u)
-#define EMAC_RXINTSTATRAW_RX3PEND_SHIFT (0x00000003u)
-
-#define EMAC_RXINTSTATRAW_RX2PEND (0x00000004u)
-#define EMAC_RXINTSTATRAW_RX2PEND_SHIFT (0x00000002u)
-
-#define EMAC_RXINTSTATRAW_RX1PEND (0x00000002u)
-#define EMAC_RXINTSTATRAW_RX1PEND_SHIFT (0x00000001u)
-
-#define EMAC_RXINTSTATRAW_RX0PEND (0x00000001u)
-#define EMAC_RXINTSTATRAW_RX0PEND_SHIFT (0x00000000u)
-
-
-/* RXINTSTATMASKED */
-
-
-#define EMAC_RXINTSTATMASKED_RX7THRESHPEND (0x00008000u)
-#define EMAC_RXINTSTATMASKED_RX7THRESHPEND_SHIFT (0x0000000Fu)
-
-#define EMAC_RXINTSTATMASKED_RX6THRESHPEND (0x00004000u)
-#define EMAC_RXINTSTATMASKED_RX6THRESHPEND_SHIFT (0x0000000Eu)
-
-#define EMAC_RXINTSTATMASKED_RX5THRESHPEND (0x00002000u)
-#define EMAC_RXINTSTATMASKED_RX5THRESHPEND_SHIFT (0x0000000Du)
-
-#define EMAC_RXINTSTATMASKED_RX4THRESHPEND (0x00001000u)
-#define EMAC_RXINTSTATMASKED_RX4THRESHPEND_SHIFT (0x0000000Cu)
-
-#define EMAC_RXINTSTATMASKED_RX3THRESHPEND (0x00000800u)
-#define EMAC_RXINTSTATMASKED_RX3THRESHPEND_SHIFT (0x0000000Bu)
-
-#define EMAC_RXINTSTATMASKED_RX2THRESHPEND (0x00000400u)
-#define EMAC_RXINTSTATMASKED_RX2THRESHPEND_SHIFT (0x0000000Au)
-
-#define EMAC_RXINTSTATMASKED_RX1THRESHPEND (0x00000200u)
-#define EMAC_RXINTSTATMASKED_RX1THRESHPEND_SHIFT (0x00000009u)
-
-#define EMAC_RXINTSTATMASKED_RX0THRESHPEND (0x00000100u)
-#define EMAC_RXINTSTATMASKED_RX0THRESHPEND_SHIFT (0x00000008u)
-
-#define EMAC_RXINTSTATMASKED_RX7PEND (0x00000080u)
-#define EMAC_RXINTSTATMASKED_RX7PEND_SHIFT (0x00000007u)
-
-#define EMAC_RXINTSTATMASKED_RX6PEND (0x00000040u)
-#define EMAC_RXINTSTATMASKED_RX6PEND_SHIFT (0x00000006u)
-
-#define EMAC_RXINTSTATMASKED_RX5PEND (0x00000020u)
-#define EMAC_RXINTSTATMASKED_RX5PEND_SHIFT (0x00000005u)
-
-#define EMAC_RXINTSTATMASKED_RX4PEND (0x00000010u)
-#define EMAC_RXINTSTATMASKED_RX4PEND_SHIFT (0x00000004u)
-
-#define EMAC_RXINTSTATMASKED_RX3PEND (0x00000008u)
-#define EMAC_RXINTSTATMASKED_RX3PEND_SHIFT (0x00000003u)
-
-#define EMAC_RXINTSTATMASKED_RX2PEND (0x00000004u)
-#define EMAC_RXINTSTATMASKED_RX2PEND_SHIFT (0x00000002u)
-
-#define EMAC_RXINTSTATMASKED_RX1PEND (0x00000002u)
-#define EMAC_RXINTSTATMASKED_RX1PEND_SHIFT (0x00000001u)
-
-#define EMAC_RXINTSTATMASKED_RX0PEND (0x00000001u)
-#define EMAC_RXINTSTATMASKED_RX0PEND_SHIFT (0x00000000u)
-
-
-/* RXINTMASKSET */
-
-
-#define EMAC_RXINTMASKSET_RX7THRESHMASK (0x00008000u)
-#define EMAC_RXINTMASKSET_RX7THRESHMASK_SHIFT (0x0000000Fu)
-
-#define EMAC_RXINTMASKSET_RX6THRESHMASK (0x00004000u)
-#define EMAC_RXINTMASKSET_RX6THRESHMASK_SHIFT (0x0000000Eu)
-
-#define EMAC_RXINTMASKSET_RX5THRESHMASK (0x00002000u)
-#define EMAC_RXINTMASKSET_RX5THRESHMASK_SHIFT (0x0000000Du)
-
-#define EMAC_RXINTMASKSET_RX4THRESHMASK (0x00001000u)
-#define EMAC_RXINTMASKSET_RX4THRESHMASK_SHIFT (0x0000000Cu)
-
-#define EMAC_RXINTMASKSET_RX3THRESHMASK (0x00000800u)
-#define EMAC_RXINTMASKSET_RX3THRESHMASK_SHIFT (0x0000000Bu)
-
-#define EMAC_RXINTMASKSET_RX2THRESHMASK (0x00000400u)
-#define EMAC_RXINTMASKSET_RX2THRESHMASK_SHIFT (0x0000000Au)
-
-#define EMAC_RXINTMASKSET_RX1THRESHMASK (0x00000200u)
-#define EMAC_RXINTMASKSET_RX1THRESHMASK_SHIFT (0x00000009u)
-
-#define EMAC_RXINTMASKSET_RX0THRESHMASK (0x00000100u)
-#define EMAC_RXINTMASKSET_RX0THRESHMASK_SHIFT (0x00000008u)
-
-#define EMAC_RXINTMASKSET_RX7MASK (0x00000080u)
-#define EMAC_RXINTMASKSET_RX7MASK_SHIFT (0x00000007u)
-
-#define EMAC_RXINTMASKSET_RX6MASK (0x00000040u)
-#define EMAC_RXINTMASKSET_RX6MASK_SHIFT (0x00000006u)
-
-#define EMAC_RXINTMASKSET_RX5MASK (0x00000020u)
-#define EMAC_RXINTMASKSET_RX5MASK_SHIFT (0x00000005u)
-
-#define EMAC_RXINTMASKSET_RX4MASK (0x00000010u)
-#define EMAC_RXINTMASKSET_RX4MASK_SHIFT (0x00000004u)
-
-#define EMAC_RXINTMASKSET_RX3MASK (0x00000008u)
-#define EMAC_RXINTMASKSET_RX3MASK_SHIFT (0x00000003u)
-
-#define EMAC_RXINTMASKSET_RX2MASK (0x00000004u)
-#define EMAC_RXINTMASKSET_RX2MASK_SHIFT (0x00000002u)
-
-#define EMAC_RXINTMASKSET_RX1MASK (0x00000002u)
-#define EMAC_RXINTMASKSET_RX1MASK_SHIFT (0x00000001u)
-
-#define EMAC_RXINTMASKSET_RX0MASK (0x00000001u)
-#define EMAC_RXINTMASKSET_RX0MASK_SHIFT (0x00000000u)
-
-
-/* RXINTMASKCLEAR */
-
-
-#define EMAC_RXINTMASKCLEAR_RX7THRESHMASK (0x00008000u)
-#define EMAC_RXINTMASKCLEAR_RX7THRESHMASK_SHIFT (0x0000000Fu)
-
-#define EMAC_RXINTMASKCLEAR_RX6THRESHMASK (0x00004000u)
-#define EMAC_RXINTMASKCLEAR_RX6THRESHMASK_SHIFT (0x0000000Eu)
-
-#define EMAC_RXINTMASKCLEAR_RX5THRESHMASK (0x00002000u)
-#define EMAC_RXINTMASKCLEAR_RX5THRESHMASK_SHIFT (0x0000000Du)
-
-#define EMAC_RXINTMASKCLEAR_RX4THRESHMASK (0x00001000u)
-#define EMAC_RXINTMASKCLEAR_RX4THRESHMASK_SHIFT (0x0000000Cu)
-
-#define EMAC_RXINTMASKCLEAR_RX3THRESHMASK (0x00000800u)
-#define EMAC_RXINTMASKCLEAR_RX3THRESHMASK_SHIFT (0x0000000Bu)
-
-#define EMAC_RXINTMASKCLEAR_RX2THRESHMASK (0x00000400u)
-#define EMAC_RXINTMASKCLEAR_RX2THRESHMASK_SHIFT (0x0000000Au)
-
-#define EMAC_RXINTMASKCLEAR_RX1THRESHMASK (0x00000200u)
-#define EMAC_RXINTMASKCLEAR_RX1THRESHMASK_SHIFT (0x00000009u)
-
-#define EMAC_RXINTMASKCLEAR_RX0THRESHMASK (0x00000100u)
-#define EMAC_RXINTMASKCLEAR_RX0THRESHMASK_SHIFT (0x00000008u)
-
-#define EMAC_RXINTMASKCLEAR_RX7MASK (0x00000080u)
-#define EMAC_RXINTMASKCLEAR_RX7MASK_SHIFT (0x00000007u)
-
-#define EMAC_RXINTMASKCLEAR_RX6MASK (0x00000040u)
-#define EMAC_RXINTMASKCLEAR_RX6MASK_SHIFT (0x00000006u)
-
-#define EMAC_RXINTMASKCLEAR_RX5MASK (0x00000020u)
-#define EMAC_RXINTMASKCLEAR_RX5MASK_SHIFT (0x00000005u)
-
-#define EMAC_RXINTMASKCLEAR_RX4MASK (0x00000010u)
-#define EMAC_RXINTMASKCLEAR_RX4MASK_SHIFT (0x00000004u)
-
-#define EMAC_RXINTMASKCLEAR_RX3MASK (0x00000008u)
-#define EMAC_RXINTMASKCLEAR_RX3MASK_SHIFT (0x00000003u)
-
-#define EMAC_RXINTMASKCLEAR_RX2MASK (0x00000004u)
-#define EMAC_RXINTMASKCLEAR_RX2MASK_SHIFT (0x00000002u)
-
-#define EMAC_RXINTMASKCLEAR_RX1MASK (0x00000002u)
-#define EMAC_RXINTMASKCLEAR_RX1MASK_SHIFT (0x00000001u)
-
-#define EMAC_RXINTMASKCLEAR_RX0MASK (0x00000001u)
-#define EMAC_RXINTMASKCLEAR_RX0MASK_SHIFT (0x00000000u)
-
-
-/* MACINTSTATRAW */
-
-
-#define EMAC_MACINTSTATRAW_HOSTPEND (0x00000002u)
-#define EMAC_MACINTSTATRAW_HOSTPEND_SHIFT (0x00000001u)
-
-#define EMAC_MACINTSTATRAW_STATPEND (0x00000001u)
-#define EMAC_MACINTSTATRAW_STATPEND_SHIFT (0x00000000u)
-
-
-/* MACINTSTATMASKED */
-
-
-#define EMAC_MACINTSTATMASKED_HOSTPEND (0x00000002u)
-#define EMAC_MACINTSTATMASKED_HOSTPEND_SHIFT (0x00000001u)
-
-#define EMAC_MACINTSTATMASKED_STATPEND (0x00000001u)
-#define EMAC_MACINTSTATMASKED_STATPEND_SHIFT (0x00000000u)
-
-
-/* MACINTMASKSET */
-
-
-#define EMAC_MACINTMASKSET_HOSTMASK (0x00000002u)
-#define EMAC_MACINTMASKSET_HOSTMASK_SHIFT (0x00000001u)
-
-#define EMAC_MACINTMASKSET_STATMASK (0x00000001u)
-#define EMAC_MACINTMASKSET_STATMASK_SHIFT (0x00000000u)
-
-
-/* MACINTMASKCLEAR */
-
-
-#define EMAC_MACINTMASKCLEAR_HOSTMASK (0x00000002u)
-#define EMAC_MACINTMASKCLEAR_HOSTMASK_SHIFT (0x00000001u)
-
-#define EMAC_MACINTMASKCLEAR_STATMASK (0x00000001u)
-#define EMAC_MACINTMASKCLEAR_STATMASK_SHIFT (0x00000000u)
-
-
-/* RXMBPENABLE */
-
-
-#define EMAC_RXMBPENABLE_RXPASSCRC (0x40000000u)
-#define EMAC_RXMBPENABLE_RXPASSCRC_SHIFT (0x0000001Eu)
-#define EMAC_RXMBPENABLE_RXQOSEN (0x20000000u)
-#define EMAC_RXMBPENABLE_RXQOSEN_SHIFT (0x0000001Du)
-#define EMAC_RXMBPENABLE_RXNOCHAIN (0x10000000u)
-#define EMAC_RXMBPENABLE_RXNOCHAIN_SHIFT (0x0000001Cu)
-#define EMAC_RXMBPENABLE_RXCMFEN (0x01000000u)
-#define EMAC_RXMBPENABLE_RXCMFEN_SHIFT (0x00000018u)
-#define EMAC_RXMBPENABLE_RXCSFEN (0x00800000u)
-#define EMAC_RXMBPENABLE_RXCSFEN_SHIFT (0x00000017u)
-#define EMAC_RXMBPENABLE_RXCEFEN (0x00400000u)
-#define EMAC_RXMBPENABLE_RXCEFEN_SHIFT (0x00000016u)
-#define EMAC_RXMBPENABLE_RXCAFEN (0x00200000u)
-#define EMAC_RXMBPENABLE_RXCAFEN_SHIFT (0x00000015u)
-/*----RXCAFEN Tokens----*/
-#define EMAC_RXMBPENABLE_RXPROMCH (0x00070000u)
-#define EMAC_RXMBPENABLE_RXPROMCH_SHIFT (0x00000010u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA0 (0x00000000u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA1 (0x00000001u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA2 (0x00000002u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA3 (0x00000003u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA4 (0x00000004u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA5 (0x00000005u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA6 (0x00000006u)
-#define EMAC_RXMBPENABLE_RXPROMCH_CHA7 (0x00000007u)
-
-
-#define EMAC_RXMBPENABLE_RXBROADEN (0x00002000u)
-#define EMAC_RXMBPENABLE_RXBROADEN_SHIFT (0x0000000Du)
-#define EMAC_RXMBPENABLE_RXBROADCH (0x00000700u)
-#define EMAC_RXMBPENABLE_RXBROADCH_SHIFT (0x00000008u)
-/*----RXBROADCH Tokens----*/
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA0 (0x00000000u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA1 (0x00000001u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA2 (0x00000002u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA3 (0x00000003u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA4 (0x00000004u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA5 (0x00000005u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA6 (0x00000006u)
-#define EMAC_RXMBPENABLE_RXBROADCH_CHA7 (0x00000007u)
-
-
-#define EMAC_RXMBPENABLE_RXMULTEN (0x00000020u)
-#define EMAC_RXMBPENABLE_RXMULTEN_SHIFT (0x00000005u)
-#define EMAC_RXMBPENABLE_RXMULTCH (0x00000007u)
-#define EMAC_RXMBPENABLE_RXMULTCH_SHIFT (0x00000000u)
-/*----RXMULTCH Tokens----*/
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA0 (0x00000000u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA1 (0x00000001u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA2 (0x00000002u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA3 (0x00000003u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA4 (0x00000004u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA5 (0x00000005u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA6 (0x00000006u)
-#define EMAC_RXMBPENABLE_RXMULTCH_CHA7 (0x00000007u)
-
-
-/* RXUNICASTSET */
-
-
-#define EMAC_RXUNICASTSET_RXCH7EN (0x00000080u)
-#define EMAC_RXUNICASTSET_RXCH7EN_SHIFT (0x00000007u)
-#define EMAC_RXUNICASTSET_RXCH6EN (0x00000040u)
-#define EMAC_RXUNICASTSET_RXCH6EN_SHIFT (0x00000006u)
-#define EMAC_RXUNICASTSET_RXCH5EN (0x00000020u)
-#define EMAC_RXUNICASTSET_RXCH5EN_SHIFT (0x00000005u)
-#define EMAC_RXUNICASTSET_RXCH4EN (0x00000010u)
-#define EMAC_RXUNICASTSET_RXCH4EN_SHIFT (0x00000004u)
-#define EMAC_RXUNICASTSET_RXCH3EN (0x00000008u)
-#define EMAC_RXUNICASTSET_RXCH3EN_SHIFT (0x00000003u)
-#define EMAC_RXUNICASTSET_RXCH2EN (0x00000004u)
-#define EMAC_RXUNICASTSET_RXCH2EN_SHIFT (0x00000002u)
-#define EMAC_RXUNICASTSET_RXCH1EN (0x00000002u)
-#define EMAC_RXUNICASTSET_RXCH1EN_SHIFT (0x00000001u)
-#define EMAC_RXUNICASTSET_RXCH0EN (0x00000001u)
-#define EMAC_RXUNICASTSET_RXCH0EN_SHIFT (0x00000000u)
-
-/* RXUNICASTCLEAR */
-
-
-#define EMAC_RXUNICASTCLEAR_RXCH7EN (0x00000080u)
-#define EMAC_RXUNICASTCLEAR_RXCH7EN_SHIFT (0x00000007u)
-#define EMAC_RXUNICASTCLEAR_RXCH6EN (0x00000040u)
-#define EMAC_RXUNICASTCLEAR_RXCH6EN_SHIFT (0x00000006u)
-#define EMAC_RXUNICASTCLEAR_RXCH5EN (0x00000020u)
-#define EMAC_RXUNICASTCLEAR_RXCH5EN_SHIFT (0x00000005u)
-#define EMAC_RXUNICASTCLEAR_RXCH4EN (0x00000010u)
-#define EMAC_RXUNICASTCLEAR_RXCH4EN_SHIFT (0x00000004u)
-#define EMAC_RXUNICASTCLEAR_RXCH3EN (0x00000008u)
-#define EMAC_RXUNICASTCLEAR_RXCH3EN_SHIFT (0x00000003u)
-#define EMAC_RXUNICASTCLEAR_RXCH2EN (0x00000004u)
-#define EMAC_RXUNICASTCLEAR_RXCH2EN_SHIFT (0x00000002u)
-#define EMAC_RXUNICASTCLEAR_RXCH1EN (0x00000002u)
-#define EMAC_RXUNICASTCLEAR_RXCH1EN_SHIFT (0x00000001u)
-#define EMAC_RXUNICASTCLEAR_RXCH0EN (0x00000001u)
-#define EMAC_RXUNICASTCLEAR_RXCH0EN_SHIFT (0x00000000u)
-
-/* RXMAXLEN */
-
-
-#define EMAC_RXMAXLEN_RXMAXLEN (0x0000FFFFu)
-#define EMAC_RXMAXLEN_RXMAXLEN_SHIFT (0x00000000u)
-
-
-/* RXBUFFEROFFSET */
-
-
-#define EMAC_RXBUFFEROFFSET_RXBUFFEROFFSET (0x0000FFFFu)
-#define EMAC_RXBUFFEROFFSET_RXBUFFEROFFSET_SHIFT (0x00000000u)
-
-
-/* RXFILTERLOWTHRESH */
-
-
-#define EMAC_RXFILTERLOWTHRESH_RXFILTERTHRESH (0x000000FFu)
-#define EMAC_RXFILTERLOWTHRESH_RXFILTERTHRESH_SHIFT (0x00000000u)
-
-
-/* RX0FLOWTHRESH */
-
-
-#define EMAC_RX0FLOWTHRESH_RX0FLOWTHRESH (0x000000FFu)
-#define EMAC_RX0FLOWTHRESH_RX0FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX1FLOWTHRESH */
-
-
-#define EMAC_RX1FLOWTHRESH_RX1FLOWTHRESH (0x000000FFu)
-#define EMAC_RX1FLOWTHRESH_RX1FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX2FLOWTHRESH */
-
-
-#define EMAC_RX2FLOWTHRESH_RX2FLOWTHRESH (0x000000FFu)
-#define EMAC_RX2FLOWTHRESH_RX2FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX3FLOWTHRESH */
-
-
-#define EMAC_RX3FLOWTHRESH_RX3FLOWTHRESH (0x000000FFu)
-#define EMAC_RX3FLOWTHRESH_RX3FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX4FLOWTHRESH */
-
-
-#define EMAC_RX4FLOWTHRESH_RX4FLOWTHRESH (0x000000FFu)
-#define EMAC_RX4FLOWTHRESH_RX4FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX5FLOWTHRESH */
-
-
-#define EMAC_RX5FLOWTHRESH_RX5FLOWTHRESH (0x000000FFu)
-#define EMAC_RX5FLOWTHRESH_RX5FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX6FLOWTHRESH */
-
-
-#define EMAC_RX6FLOWTHRESH_RX6FLOWTHRESH (0x000000FFu)
-#define EMAC_RX6FLOWTHRESH_RX6FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX7FLOWTHRESH */
-
-
-#define EMAC_RX7FLOWTHRESH_RX7FLOWTHRESH (0x000000FFu)
-#define EMAC_RX7FLOWTHRESH_RX7FLOWTHRESH_SHIFT (0x00000000u)
-
-
-/* RX0FREEBUFFER */
-
-
-#define EMAC_RX0FREEBUFFER_RX0FREEBUF (0x0000FFFFu)
-#define EMAC_RX0FREEBUFFER_RX0FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX1FREEBUFFER */
-
-
-#define EMAC_RX1FREEBUFFER_RX1FREEBUF (0x0000FFFFu)
-#define EMAC_RX1FREEBUFFER_RX1FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX2FREEBUFFER */
-
-
-#define EMAC_RX2FREEBUFFER_RX2FREEBUF (0x0000FFFFu)
-#define EMAC_RX2FREEBUFFER_RX2FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX3FREEBUFFER */
-
-
-#define EMAC_RX3FREEBUFFER_RX3FREEBUF (0x0000FFFFu)
-#define EMAC_RX3FREEBUFFER_RX3FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX4FREEBUFFER */
-
-
-#define EMAC_RX4FREEBUFFER_RX4FREEBUF (0x0000FFFFu)
-#define EMAC_RX4FREEBUFFER_RX4FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX5FREEBUFFER */
-
-
-#define EMAC_RX5FREEBUFFER_RX5FREEBUF (0x0000FFFFu)
-#define EMAC_RX5FREEBUFFER_RX5FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX6FREEBUFFER */
-
-
-#define EMAC_RX6FREEBUFFER_RX6FREEBUF (0x0000FFFFu)
-#define EMAC_RX6FREEBUFFER_RX6FREEBUF_SHIFT (0x00000000u)
-
-
-/* RX7FREEBUFFER */
-
-
-#define EMAC_RX7FREEBUFFER_RX7FREEBUF (0x0000FFFFu)
-#define EMAC_RX7FREEBUFFER_RX7FREEBUF_SHIFT (0x00000000u)
-
-
-/* MACCONTROL */
-
-
-
-
-
-#define EMAC_MACCONTROL_RMIISPEED (0x00008000u)
-#define EMAC_MACCONTROL_RMIISPEED_SHIFT (0x0000000Fu)
-#define EMAC_MACCONTROL_RXOFFLENBLOCK (0x00004000u)
-#define EMAC_MACCONTROL_RXOFFLENBLOCK_SHIFT (0x0000000Eu)
-#define EMAC_MACCONTROL_RXOWNERSHIP (0x00002000u)
-#define EMAC_MACCONTROL_RXOWNERSHIP_SHIFT (0x0000000Du)
-#define EMAC_MACCONTROL_CMDIDLE (0x00000800u)
-#define EMAC_MACCONTROL_CMDIDLE_SHIFT (0x0000000Bu)
-#define EMAC_MACCONTROL_TXSHORTGAPEN (0x00000400u)
-#define EMAC_MACCONTROL_TXSHORTGAPEN_SHIFT (0x0000000Au)
-#define EMAC_MACCONTROL_TXPTYPE (0x00000200u)
-#define EMAC_MACCONTROL_TXPTYPE_SHIFT (0x00000009u)
-#define EMAC_MACCONTROL_TXPACE (0x00000040u)
-#define EMAC_MACCONTROL_TXPACE_SHIFT (0x00000006u)
-#define EMAC_MACCONTROL_GMIIEN (0x00000020u)
-#define EMAC_MACCONTROL_GMIIEN_SHIFT (0x00000005u)
-#define EMAC_MACCONTROL_TXFLOWEN (0x00000010u)
-#define EMAC_MACCONTROL_TXFLOWEN_SHIFT (0x00000004u)
-#define EMAC_MACCONTROL_RXBUFFERFLOWEN (0x00000008u)
-#define EMAC_MACCONTROL_RXBUFFERFLOWEN_SHIFT (0x00000003u)
-#define EMAC_MACCONTROL_LOOPBACK (0x00000002u)
-#define EMAC_MACCONTROL_LOOPBACK_SHIFT (0x00000001u)
-#define EMAC_MACCONTROL_FULLDUPLEX (0x00000001u)
-#define EMAC_MACCONTROL_FULLDUPLEX_SHIFT (0x00000000u)
-
-
-/* MACSTATUS */
-
-#define EMAC_MACSTATUS_IDLE (0x80000000u)
-#define EMAC_MACSTATUS_IDLE_SHIFT (0x0000001Fu)
-#define EMAC_MACSTATUS_TXERRCODE (0x00F00000u)
-#define EMAC_MACSTATUS_TXERRCODE_SHIFT (0x00000014u)
-/*----TXERRCODE Tokens----*/
-#define EMAC_MACSTATUS_TXERRCODE_NOERROR (0x00000000u)
-#define EMAC_MACSTATUS_TXERRCODE_SOPERROR (0x00000001u)
-#define EMAC_MACSTATUS_TXERRCODE_OWNERSHIP (0x00000002u)
-#define EMAC_MACSTATUS_TXERRCODE_NOEOP (0x00000003u)
-#define EMAC_MACSTATUS_TXERRCODE_NULLPTR (0x00000004u)
-#define EMAC_MACSTATUS_TXERRCODE_NULLEN (0x00000005u)
-#define EMAC_MACSTATUS_TXERRCODE_LENERROR (0x00000006u)
-
-
-#define EMAC_MACSTATUS_TXERRCH (0x00070000u)
-#define EMAC_MACSTATUS_TXERRCH_SHIFT (0x00000010u)
-/*----TXERRCH Tokens----*/
-#define EMAC_MACSTATUS_TXERRCH_CHA0 (0x00000000u)
-#define EMAC_MACSTATUS_TXERRCH_CHA1 (0x00000001u)
-#define EMAC_MACSTATUS_TXERRCH_CHA2 (0x00000002u)
-#define EMAC_MACSTATUS_TXERRCH_CHA3 (0x00000003u)
-#define EMAC_MACSTATUS_TXERRCH_CHA4 (0x00000004u)
-#define EMAC_MACSTATUS_TXERRCH_CHA5 (0x00000005u)
-#define EMAC_MACSTATUS_TXERRCH_CHA6 (0x00000006u)
-#define EMAC_MACSTATUS_TXERRCH_CHA7 (0x00000007u)
-
-#define EMAC_MACSTATUS_RXERRCODE (0x0000F000u)
-#define EMAC_MACSTATUS_RXERRCODE_SHIFT (0x0000000Cu)
-/*----RXERRCODE Tokens----*/
-#define EMAC_MACSTATUS_RXERRCODE_NOERROR (0x00000000u)
-#define EMAC_MACSTATUS_RXERRCODE_OWNERSHIP (0x00000002u)
-#define EMAC_MACSTATUS_RXERRCODE_NULLPTR (0x00000004u)
-
-
-#define EMAC_MACSTATUS_RXERRCH (0x00000700u)
-#define EMAC_MACSTATUS_RXERRCH_SHIFT (0x00000008u)
-/*----RXERRCH Tokens----*/
-#define EMAC_MACSTATUS_RXERRCH_CHA0 (0x00000000u)
-#define EMAC_MACSTATUS_RXERRCH_CHA1 (0x00000001u)
-#define EMAC_MACSTATUS_RXERRCH_CHA2 (0x00000002u)
-#define EMAC_MACSTATUS_RXERRCH_CHA3 (0x00000003u)
-#define EMAC_MACSTATUS_RXERRCH_CHA4 (0x00000004u)
-#define EMAC_MACSTATUS_RXERRCH_CHA5 (0x00000005u)
-#define EMAC_MACSTATUS_RXERRCH_CHA6 (0x00000006u)
-#define EMAC_MACSTATUS_RXERRCH_CHA7 (0x00000007u)
-
-
-
-
-#define EMAC_MACSTATUS_RXQOSACT (0x00000004u)
-#define EMAC_MACSTATUS_RXQOSACT_SHIFT (0x00000002u)
-#define EMAC_MACSTATUS_RXFLOWACT (0x00000002u)
-#define EMAC_MACSTATUS_RXFLOWACT_SHIFT (0x00000001u)
-#define EMAC_MACSTATUS_TXFLOWACT (0x00000001u)
-#define EMAC_MACSTATUS_TXFLOWACT_SHIFT (0x00000000u)
-
-/* EMCONTROL */
-
-
-#define EMAC_EMCONTROL_SOFT (0x00000002u)
-#define EMAC_EMCONTROL_SOFT_SHIFT (0x00000001u)
-
-#define EMAC_EMCONTROL_FREE (0x00000001u)
-#define EMAC_EMCONTROL_FREE_SHIFT (0x00000000u)
-
-
-/* FIFOCONTROL */
-
-
-#define EMAC_FIFOCONTROL_TXCELLTHRESH (0x00000003u)
-#define EMAC_FIFOCONTROL_TXCELLTHRESH_SHIFT (0x00000000u)
-
-
-/* MACCONFIG */
-
-#define EMAC_MACCONFIG_TXCELLDEPTH (0xFF000000u)
-#define EMAC_MACCONFIG_TXCELLDEPTH_SHIFT (0x00000018u)
-
-#define EMAC_MACCONFIG_RXCELLDEPTH (0x00FF0000u)
-#define EMAC_MACCONFIG_RXCELLDEPTH_SHIFT (0x00000010u)
-
-#define EMAC_MACCONFIG_ADDRESSTYPE (0x0000FF00u)
-#define EMAC_MACCONFIG_ADDRESSTYPE_SHIFT (0x00000008u)
-
-#define EMAC_MACCONFIG_MACCFIG (0x000000FFu)
-#define EMAC_MACCONFIG_MACCFIG_SHIFT (0x00000000u)
-
-
-/* SOFTRESET */
-
-
-#define EMAC_SOFTRESET_SOFTRESET (0x00000001u)
-#define EMAC_SOFTRESET_SOFTRESET_SHIFT (0x00000000u)
-
-/* MACSRCADDRLO */
-
-
-#define EMAC_MACSRCADDRLO_MACSRCADDR0 (0x0000FF00u)
-#define EMAC_MACSRCADDRLO_MACSRCADDR0_SHIFT (0x00000008u)
-#define EMAC_MACSRCADDRLO_MACSRCADDR1 (0x000000FFu)
-#define EMAC_MACSRCADDRLO_MACSRCADDR1_SHIFT (0x00000000u)
-
-
-/* MACSRCADDRHI */
-
-#define EMAC_MACSRCADDRHI_MACSRCADDR2 (0xFF000000u)
-#define EMAC_MACSRCADDRHI_MACSRCADDR2_SHIFT (0x00000018u)
-
-#define EMAC_MACSRCADDRHI_MACSRCADDR3 (0x00FF0000u)
-#define EMAC_MACSRCADDRHI_MACSRCADDR3_SHIFT (0x00000010u)
-
-#define EMAC_MACSRCADDRHI_MACSRCADDR4 (0x0000FF00u)
-#define EMAC_MACSRCADDRHI_MACSRCADDR4_SHIFT (0x00000008u)
-
-#define EMAC_MACSRCADDRHI_MACSRCADDR5 (0x000000FFu)
-#define EMAC_MACSRCADDRHI_MACSRCADDR5_SHIFT (0x00000000u)
-
-
-/* MACHASH1 */
-
-#define EMAC_MACHASH1_MACHASH1 (0xFFFFFFFFu)
-#define EMAC_MACHASH1_MACHASH1_SHIFT (0x00000000u)
-
-
-/* MACHASH2 */
-
-#define EMAC_MACHASH2_MACHASH2 (0xFFFFFFFFu)
-#define EMAC_MACHASH2_MACHASH2_SHIFT (0x00000000u)
-
-
-/* BOFFTEST */
-
-
-#define EMAC_BOFFTEST_RNDNUM (0x03FF0000u)
-#define EMAC_BOFFTEST_RNDNUM_SHIFT (0x00000010u)
-
-#define EMAC_BOFFTEST_COLLCOUNT (0x0000F000u)
-#define EMAC_BOFFTEST_COLLCOUNT_SHIFT (0x0000000Cu)
-
-
-#define EMAC_BOFFTEST_TXBACKOFF (0x000003FFu)
-#define EMAC_BOFFTEST_TXBACKOFF_SHIFT (0x00000000u)
-
-
-/* TPACETEST */
-
-
-#define EMAC_TPACETEST_PACEVAL (0x0000001Fu)
-#define EMAC_TPACETEST_PACEVAL_SHIFT (0x00000000u)
-
-
-/* RXPAUSE */
-
-
-#define EMAC_RXPAUSE_PAUSETIMER (0x0000FFFFu)
-#define EMAC_RXPAUSE_PAUSETIMER_SHIFT (0x00000000u)
-
-
-/* TXPAUSE */
-
-
-#define EMAC_TXPAUSE_PAUSETIMER (0x0000FFFFu)
-#define EMAC_TXPAUSE_PAUSETIMER_SHIFT (0x00000000u)
-
-
-/* RXGOODFRAMES */
-
-#define EMAC_RXGOODFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_RXGOODFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* RXBCASTFRAMES */
-
-#define EMAC_RXBCASTFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_RXBCASTFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* RXMCASTFRAMES */
-
-#define EMAC_RXMCASTFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_RXMCASTFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* RXPAUSEFRAMES */
-
-#define EMAC_RXPAUSEFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_RXPAUSEFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* RXCRCERRORS */
-
-#define EMAC_RXCRCERRORS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXCRCERRORS_COUNT_SHIFT (0x00000000u)
-
-
-/* RXALIGNCODEERRORS */
-
-#define EMAC_RXALIGNCODEERRORS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXALIGNCODEERRORS_COUNT_SHIFT (0x00000000u)
-
-
-/* RXOVERSIZED */
-
-#define EMAC_RXOVERSIZED_COUNT (0xFFFFFFFFu)
-#define EMAC_RXOVERSIZED_COUNT_SHIFT (0x00000000u)
-
-
-/* RXJABBER */
-
-#define EMAC_RXJABBER_COUNT (0xFFFFFFFFu)
-#define EMAC_RXJABBER_COUNT_SHIFT (0x00000000u)
-
-
-/* RXUNDERSIZED */
-
-#define EMAC_RXUNDERSIZED_COUNT (0xFFFFFFFFu)
-#define EMAC_RXUNDERSIZED_COUNT_SHIFT (0x00000000u)
-
-
-/* RXFRAGMENTS */
-
-#define EMAC_RXFRAGMENTS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXFRAGMENTS_COUNT_SHIFT (0x00000000u)
-
-
-/* RXFILTERED */
-
-#define EMAC_RXFILTERED_COUNT (0xFFFFFFFFu)
-#define EMAC_RXFILTERED_COUNT_SHIFT (0x00000000u)
-
-
-/* RXQOSFILTERED */
-
-#define EMAC_RXQOSFILTERED_COUNT (0xFFFFFFFFu)
-#define EMAC_RXQOSFILTERED_COUNT_SHIFT (0x00000000u)
-
-
-/* RXOCTETS */
-
-#define EMAC_RXOCTETS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXOCTETS_COUNT_SHIFT (0x00000000u)
-
-
-/* TXGOODFRAMES */
-
-#define EMAC_TXGOODFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_TXGOODFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* TXBCASTFRAMES */
-
-#define EMAC_TXBCASTFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_TXBCASTFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* TXMCASTFRAMES */
-
-#define EMAC_TXMCASTFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_TXMCASTFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* TXPAUSEFRAMES */
-
-#define EMAC_TXPAUSEFRAMES_COUNT (0xFFFFFFFFu)
-#define EMAC_TXPAUSEFRAMES_COUNT_SHIFT (0x00000000u)
-
-
-/* TXDEFERRED */
-
-#define EMAC_TXDEFERRED_COUNT (0xFFFFFFFFu)
-#define EMAC_TXDEFERRED_COUNT_SHIFT (0x00000000u)
-
-
-/* TXCOLLISION */
-
-#define EMAC_TXCOLLISION_COUNT (0xFFFFFFFFu)
-#define EMAC_TXCOLLISION_COUNT_SHIFT (0x00000000u)
-
-
-/* TXSINGLECOLL */
-
-#define EMAC_TXSINGLECOLL_COUNT (0xFFFFFFFFu)
-#define EMAC_TXSINGLECOLL_COUNT_SHIFT (0x00000000u)
-
-
-/* TXMULTICOLL */
-
-#define EMAC_TXMULTICOLL_COUNT (0xFFFFFFFFu)
-#define EMAC_TXMULTICOLL_COUNT_SHIFT (0x00000000u)
-
-
-/* TXEXCESSIVECOLL */
-
-#define EMAC_TXEXCESSIVECOLL_COUNT (0xFFFFFFFFu)
-#define EMAC_TXEXCESSIVECOLL_COUNT_SHIFT (0x00000000u)
-
-
-/* TXLATECOLL */
-
-#define EMAC_TXLATECOLL_COUNT (0xFFFFFFFFu)
-#define EMAC_TXLATECOLL_COUNT_SHIFT (0x00000000u)
-
-
-/* TXUNDERRUN */
-
-#define EMAC_TXUNDERRUN_COUNT (0xFFFFFFFFu)
-#define EMAC_TXUNDERRUN_COUNT_SHIFT (0x00000000u)
-
-
-/* TXCARRIERSENSE */
-
-#define EMAC_TXCARRIERSENSE_COUNT (0xFFFFFFFFu)
-#define EMAC_TXCARRIERSENSE_COUNT_SHIFT (0x00000000u)
-
-
-/* TXOCTETS */
-
-#define EMAC_TXOCTETS_COUNT (0xFFFFFFFFu)
-#define EMAC_TXOCTETS_COUNT_SHIFT (0x00000000u)
-
-
-/* FRAME64 */
-
-#define EMAC_FRAME64_COUNT (0xFFFFFFFFu)
-#define EMAC_FRAME64_COUNT_SHIFT (0x00000000u)
-
-
-/* FRAME65T127 */
-
-#define EMAC_FRAME65T127_COUNT (0xFFFFFFFFu)
-#define EMAC_FRAME65T127_COUNT_SHIFT (0x00000000u)
-
-
-/* FRAME128T255 */
-
-#define EMAC_FRAME128T255_COUNT (0xFFFFFFFFu)
-#define EMAC_FRAME128T255_COUNT_SHIFT (0x00000000u)
-
-
-/* FRAME256T511 */
-
-#define EMAC_FRAME256T511_COUNT (0xFFFFFFFFu)
-#define EMAC_FRAME256T511_COUNT_SHIFT (0x00000000u)
-
-
-/* FRAME512T1023 */
-
-#define EMAC_FRAME512T1023_COUNT (0xFFFFFFFFu)
-#define EMAC_FRAME512T1023_COUNT_SHIFT (0x00000000u)
-
-
-/* FRAME1024TUP */
-
-#define EMAC_FRAME1024TUP_COUNT (0xFFFFFFFFu)
-#define EMAC_FRAME1024TUP_COUNT_SHIFT (0x00000000u)
-
-
-/* NETOCTETS */
-
-#define EMAC_NETOCTETS_COUNT (0xFFFFFFFFu)
-#define EMAC_NETOCTETS_COUNT_SHIFT (0x00000000u)
-
-
-/* RXSOFOVERRUNS */
-
-#define EMAC_RXSOFOVERRUNS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXSOFOVERRUNS_COUNT_SHIFT (0x00000000u)
-
-
-/* RXMOFOVERRUNS */
-
-#define EMAC_RXMOFOVERRUNS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXMOFOVERRUNS_COUNT_SHIFT (0x00000000u)
-
-
-/* RXDMAOVERRUNS */
-
-#define EMAC_RXDMAOVERRUNS_COUNT (0xFFFFFFFFu)
-#define EMAC_RXDMAOVERRUNS_COUNT_SHIFT (0x00000000u)
-
-
-/* MACADDRLO */
-
-
-#define EMAC_MACADDRLO_VALID (0x00100000u)
-#define EMAC_MACADDRLO_VALID_SHIFT (0x00000014u)
-#define EMAC_MACADDRLO_MATCHFILT (0x00080000u)
-#define EMAC_MACADDRLO_MATCHFILT_SHIFT (0x00000013u)
-#define EMAC_MACADDRLO_CHANNEL (0x00070000u)
-#define EMAC_MACADDRLO_CHANNEL_SHIFT (0x00000010u)
-#define EMAC_MACADDRLO_MACADDR0 (0x0000FF00u)
-#define EMAC_MACADDRLO_MACADDR0_SHIFT (0x00000008u)
-#define EMAC_MACADDRLO_MACADDR1 (0x000000FFu)
-#define EMAC_MACADDRLO_MACADDR1_SHIFT (0x00000000u)
-
-
-/* MACADDRHI */
-
-#define EMAC_MACADDRHI_MACADDR2 (0xFF000000u)
-#define EMAC_MACADDRHI_MACADDR2_SHIFT (0x00000018u)
-
-#define EMAC_MACADDRHI_MACADDR3 (0x00FF0000u)
-#define EMAC_MACADDRHI_MACADDR3_SHIFT (0x00000010u)
-
-#define EMAC_MACADDRHI_MACADDR4 (0x0000FF00u)
-#define EMAC_MACADDRHI_MACADDR4_SHIFT (0x00000008u)
-
-#define EMAC_MACADDRHI_MACADDR5 (0x000000FFu)
-#define EMAC_MACADDRHI_MACADDR5_SHIFT (0x00000000u)
-
-
-/* MACINDEX */
-
-
-#define EMAC_MACINDEX_MACINDEX (0x0000001Fu)
-#define EMAC_MACINDEX_MACINDEX_SHIFT (0x00000000u)
-
-
-/* TX0HDP */
-
-#define EMAC_TX0HDP_TX0HDP (0xFFFFFFFFu)
-#define EMAC_TX0HDP_TX0HDP_SHIFT (0x00000000u)
-
-
-/* TX1HDP */
-
-#define EMAC_TX1HDP_TX1HDP (0xFFFFFFFFu)
-#define EMAC_TX1HDP_TX1HDP_SHIFT (0x00000000u)
-
-
-/* TX2HDP */
-
-#define EMAC_TX2HDP_TX2HDP (0xFFFFFFFFu)
-#define EMAC_TX2HDP_TX2HDP_SHIFT (0x00000000u)
-
-
-/* TX3HDP */
-
-#define EMAC_TX3HDP_TX3HDP (0xFFFFFFFFu)
-#define EMAC_TX3HDP_TX3HDP_SHIFT (0x00000000u)
-
-
-/* TX4HDP */
-
-#define EMAC_TX4HDP_TX4HDP (0xFFFFFFFFu)
-#define EMAC_TX4HDP_TX4HDP_SHIFT (0x00000000u)
-
-
-/* TX5HDP */
-
-#define EMAC_TX5HDP_TX5HDP (0xFFFFFFFFu)
-#define EMAC_TX5HDP_TX5HDP_SHIFT (0x00000000u)
-
-
-/* TX6HDP */
-
-#define EMAC_TX6HDP_TX6HDP (0xFFFFFFFFu)
-#define EMAC_TX6HDP_TX6HDP_SHIFT (0x00000000u)
-
-
-/* TX7HDP */
-
-#define EMAC_TX7HDP_TX7HDP (0xFFFFFFFFu)
-#define EMAC_TX7HDP_TX7HDP_SHIFT (0x00000000u)
-
-
-/* RX0HDP */
-
-#define EMAC_RX0HDP_RX0HDP (0xFFFFFFFFu)
-#define EMAC_RX0HDP_RX0HDP_SHIFT (0x00000000u)
-
-
-/* RX1HDP */
-
-#define EMAC_RX1HDP_RX1HDP (0xFFFFFFFFu)
-#define EMAC_RX1HDP_RX1HDP_SHIFT (0x00000000u)
-
-
-/* RX2HDP */
-
-#define EMAC_RX2HDP_RX2HDP (0xFFFFFFFFu)
-#define EMAC_RX2HDP_RX2HDP_SHIFT (0x00000000u)
-
-
-/* RX3HDP */
-
-#define EMAC_RX3HDP_RX3HDP (0xFFFFFFFFu)
-#define EMAC_RX3HDP_RX3HDP_SHIFT (0x00000000u)
-
-
-/* RX4HDP */
-
-#define EMAC_RX4HDP_RX4HDP (0xFFFFFFFFu)
-#define EMAC_RX4HDP_RX4HDP_SHIFT (0x00000000u)
-
-
-/* RX5HDP */
-
-#define EMAC_RX5HDP_RX5HDP (0xFFFFFFFFu)
-#define EMAC_RX5HDP_RX5HDP_SHIFT (0x00000000u)
-
-
-/* RX6HDP */
-
-#define EMAC_RX6HDP_RX6HDP (0xFFFFFFFFu)
-#define EMAC_RX6HDP_RX6HDP_SHIFT (0x00000000u)
-
-
-/* RX7HDP */
-
-#define EMAC_RX7HDP_RX7HDP (0xFFFFFFFFu)
-#define EMAC_RX7HDP_RX7HDP_SHIFT (0x00000000u)
-
-
-/* TX0CP */
-
-#define EMAC_TX0CP_TX0CP (0xFFFFFFFFu)
-#define EMAC_TX0CP_TX0CP_SHIFT (0x00000000u)
-
-
-/* TX1CP */
-
-#define EMAC_TX1CP_TX1CP (0xFFFFFFFFu)
-#define EMAC_TX1CP_TX1CP_SHIFT (0x00000000u)
-
-
-/* TX2CP */
-
-#define EMAC_TX2CP_TX2CP (0xFFFFFFFFu)
-#define EMAC_TX2CP_TX2CP_SHIFT (0x00000000u)
-
-
-/* TX3CP */
-
-#define EMAC_TX3CP_TX3CP (0xFFFFFFFFu)
-#define EMAC_TX3CP_TX3CP_SHIFT (0x00000000u)
-
-
-/* TX4CP */
-
-#define EMAC_TX4CP_TX4CP (0xFFFFFFFFu)
-#define EMAC_TX4CP_TX4CP_SHIFT (0x00000000u)
-
-
-/* TX5CP */
-
-#define EMAC_TX5CP_TX5CP (0xFFFFFFFFu)
-#define EMAC_TX5CP_TX5CP_SHIFT (0x00000000u)
-
-
-/* TX6CP */
-
-#define EMAC_TX6CP_TX6CP (0xFFFFFFFFu)
-#define EMAC_TX6CP_TX6CP_SHIFT (0x00000000u)
-
-
-/* TX7CP */
-
-#define EMAC_TX7CP_TX7CP (0xFFFFFFFFu)
-#define EMAC_TX7CP_TX7CP_SHIFT (0x00000000u)
-
-
-/* RX0CP */
-
-#define EMAC_RX0CP_RX0CP (0xFFFFFFFFu)
-#define EMAC_RX0CP_RX0CP_SHIFT (0x00000000u)
-
-
-/* RX1CP */
-
-#define EMAC_RX1CP_RX1CP (0xFFFFFFFFu)
-#define EMAC_RX1CP_RX1CP_SHIFT (0x00000000u)
-
-
-/* RX2CP */
-
-#define EMAC_RX2CP_RX2CP (0xFFFFFFFFu)
-#define EMAC_RX2CP_RX2CP_SHIFT (0x00000000u)
-
-
-/* RX3CP */
-
-#define EMAC_RX3CP_RX3CP (0xFFFFFFFFu)
-#define EMAC_RX3CP_RX3CP_SHIFT (0x00000000u)
-
-
-/* RX4CP */
-
-#define EMAC_RX4CP_RX4CP (0xFFFFFFFFu)
-#define EMAC_RX4CP_RX4CP_SHIFT (0x00000000u)
-
-
-/* RX5CP */
-
-#define EMAC_RX5CP_RX5CP (0xFFFFFFFFu)
-#define EMAC_RX5CP_RX5CP_SHIFT (0x00000000u)
-
-
-/* RX6CP */
-
-#define EMAC_RX6CP_RX6CP (0xFFFFFFFFu)
-#define EMAC_RX6CP_RX6CP_SHIFT (0x00000000u)
-
-
-/* RX7CP */
-
-#define EMAC_RX7CP_RX7CP (0xFFFFFFFFu)
-#define EMAC_RX7CP_RX7CP_SHIFT (0x00000000u)
-
-
-#endif
+++ /dev/null
-/*
- * hw_emac1.h
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-
-#ifndef _HW_EMAC_CTRL_H_
-#define _HW_EMAC_CTRL_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define EMAC_CTRL_REVID (0x0u)
-#define EMAC_CTRL_SOFTRESET (0x4u)
-#define EMAC_CTRL_INTCONTROL (0xCu)
-#define EMAC_CTRL_C0RXTHRESHEN (0x10u)
-#define EMAC_CTRL_CnRXEN(n) (0x14u + (n << 4))
-#define EMAC_CTRL_CnTXEN(n) (0x18u + (n << 4))
-#define EMAC_CTRL_CnMISCEN(n) (0x1Cu + (n << 4))
-#define EMAC_CTRL_CnRXTHRESHEN(n) (0x20u + (n << 4))
-#define EMAC_CTRL_C0RXTHRESHSTAT (0x40u)
-#define EMAC_CTRL_C0RXSTAT (0x44u)
-#define EMAC_CTRL_C0TXSTAT (0x48u)
-#define EMAC_CTRL_C0MISCSTAT (0x4Cu)
-#define EMAC_CTRL_C1RXTHRESHSTAT (0x50u)
-#define EMAC_CTRL_C1RXSTAT (0x54u)
-#define EMAC_CTRL_C1TXSTAT (0x58u)
-#define EMAC_CTRL_C1MISCSTAT (0x5Cu)
-#define EMAC_CTRL_C2RXTHRESHSTAT (0x60u)
-#define EMAC_CTRL_C2RXSTAT (0x64u)
-#define EMAC_CTRL_C2TXSTAT (0x68u)
-#define EMAC_CTRL_C2MISCSTAT (0x6Cu)
-#define EMAC_CTRL_C0RXIMAX (0x70u)
-#define EMAC_CTRL_C0TXIMAX (0x74u)
-#define EMAC_CTRL_C1RXIMAX (0x78u)
-#define EMAC_CTRL_C1TXIMAX (0x7Cu)
-#define EMAC_CTRL_C2RXIMAX (0x80u)
-#define EMAC_CTRL_C2TXIMAX (0x84u)
-
-/**************************************************************************\
-* Field Definition Macros
-\**************************************************************************/
-
-#ifdef __cplusplus
-}
-#endif
-
-
-#endif
+++ /dev/null
-/*
- * hw_mdio.h
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-
-
-#ifndef _HW_MDIO_H_
-#define _HW_MDIO_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define MDIO_BASE (0xFCF78900U)
-
-#define MDIO_REVID (0x0)
-#define MDIO_CONTROL (0x4)
-#define MDIO_ALIVE (0x8)
-#define MDIO_LINK (0xC)
-#define MDIO_LINKINTRAW (0x10)
-#define MDIO_LINKINTMASKED (0x14)
-#define MDIO_USERINTRAW (0x20)
-#define MDIO_USERINTMASKED (0x24)
-#define MDIO_USERINTMASKSET (0x28)
-#define MDIO_USERINTMASKCLEAR (0x2C)
-#define MDIO_USERACCESS0 (0x80)
-#define MDIO_USERPHYSEL0 (0x84)
-#define MDIO_USERACCESS1 (0x88)
-#define MDIO_USERPHYSEL1 (0x8C)
-
-/**************************************************************************\
-* Field Definition Macros
-\**************************************************************************/
-
-/* REVID */
-
-#define MDIO_REVID_REV (0xFFFFFFFFu)
-#define MDIO_REVID_REV_SHIFT (0x00000000u)
-
-
-/* CONTROL */
-
-#define MDIO_CONTROL_IDLE (0x80000000u)
-#define MDIO_CONTROL_IDLE_SHIFT (0x0000001Fu)
-/*----IDLE Tokens----*/
-#define MDIO_CONTROL_IDLE_NO (0x00000000u)
-#define MDIO_CONTROL_IDLE_YES (0x00000001u)
-
-#define MDIO_CONTROL_ENABLE (0x40000000u)
-#define MDIO_CONTROL_ENABLE_SHIFT (0x0000001Eu)
-
-#define MDIO_CONTROL_HIGHEST_USER_CHANNEL (0x1F000000u)
-#define MDIO_CONTROL_HIGHEST_USER_CHANNEL_SHIFT (0x00000018u)
-
-
-#define MDIO_CONTROL_PREAMBLE (0x00100000u)
-#define MDIO_CONTROL_PREAMBLE_SHIFT (0x00000014u)
-/*----PREAMBLE Tokens----*/
-
-#define MDIO_CONTROL_FAULT (0x00080000u)
-#define MDIO_CONTROL_FAULT_SHIFT (0x00000013u)
-
-#define MDIO_CONTROL_FAULTENB (0x00040000u)
-#define MDIO_CONTROL_FAULTENB_SHIFT (0x00000012u)
-/*----FAULTENB Tokens----*/
-
-
-
-#define MDIO_CONTROL_CLKDIV (0x0000FFFFu)
-#define MDIO_CONTROL_CLKDIV_SHIFT (0x00000000u)
-/*----CLKDIV Tokens----*/
-
-
-/* ALIVE */
-
-#define MDIO_ALIVE_REGVAL (0xFFFFFFFFu)
-#define MDIO_ALIVE_REGVAL_SHIFT (0x00000000u)
-
-
-/* LINK */
-
-#define MDIO_LINK_REGVAL (0xFFFFFFFFu)
-#define MDIO_LINK_REGVAL_SHIFT (0x00000000u)
-
-
-/* LINKINTRAW */
-
-
-#define MDIO_LINKINTRAW_USERPHY1 (0x00000002u)
-#define MDIO_LINKINTRAW_USERPHY1_SHIFT (0x00000001u)
-
-#define MDIO_LINKINTRAW_USERPHY0 (0x00000001u)
-#define MDIO_LINKINTRAW_USERPHY0_SHIFT (0x00000000u)
-
-
-/* LINKINTMASKED */
-
-
-#define MDIO_LINKINTMASKED_USERPHY1 (0x00000002u)
-#define MDIO_LINKINTMASKED_USERPHY1_SHIFT (0x00000001u)
-
-#define MDIO_LINKINTMASKED_USERPHY0 (0x00000001u)
-#define MDIO_LINKINTMASKED_USERPHY0_SHIFT (0x00000000u)
-
-
-/* USERINTRAW */
-
-
-#define MDIO_USERINTRAW_USERACCESS1 (0x00000002u)
-#define MDIO_USERINTRAW_USERACCESS1_SHIFT (0x00000001u)
-
-#define MDIO_USERINTRAW_USERACCESS0 (0x00000001u)
-#define MDIO_USERINTRAW_USERACCESS0_SHIFT (0x00000000u)
-
-
-/* USERINTMASKED */
-
-
-#define MDIO_USERINTMASKED_USERACCESS1 (0x00000002u)
-#define MDIO_USERINTMASKED_USERACCESS1_SHIFT (0x00000001u)
-
-#define MDIO_USERINTMASKED_USERACCESS0 (0x00000001u)
-#define MDIO_USERINTMASKED_USERACCESS0_SHIFT (0x00000000u)
-
-
-/* USERINTMASKSET */
-
-
-#define MDIO_USERINTMASKSET_USERACCESS1 (0x00000002u)
-#define MDIO_USERINTMASKSET_USERACCESS1_SHIFT (0x00000001u)
-
-#define MDIO_USERINTMASKSET_USERACCESS0 (0x00000001u)
-#define MDIO_USERINTMASKSET_USERACCESS0_SHIFT (0x00000000u)
-
-
-/* USERINTMASKCLEAR */
-
-
-#define MDIO_USERINTMASKCLEAR_USERACCESS1 (0x00000002u)
-#define MDIO_USERINTMASKCLEAR_USERACCESS1_SHIFT (0x00000001u)
-
-#define MDIO_USERINTMASKCLEAR_USERACCESS0 (0x00000001u)
-#define MDIO_USERINTMASKCLEAR_USERACCESS0_SHIFT (0x00000000u)
-
-
-/* USERACCESS0 */
-
-#define MDIO_USERACCESS0_GO (0x80000000u)
-#define MDIO_USERACCESS0_GO_SHIFT (0x0000001Fu)
-
-#define MDIO_USERACCESS0_WRITE (0x40000000u)
-#define MDIO_USERACCESS0_READ (0x00000000u)
-#define MDIO_USERACCESS0_WRITE_SHIFT (0x0000001Eu)
-
-#define MDIO_USERACCESS0_ACK (0x20000000u)
-#define MDIO_USERACCESS0_ACK_SHIFT (0x0000001Du)
-
-
-#define MDIO_USERACCESS0_REGADR (0x03E00000u)
-#define MDIO_USERACCESS0_REGADR_SHIFT (0x00000015u)
-
-#define MDIO_USERACCESS0_PHYADR (0x001F0000u)
-#define MDIO_USERACCESS0_PHYADR_SHIFT (0x00000010u)
-
-#define MDIO_USERACCESS0_DATA (0x0000FFFFu)
-#define MDIO_USERACCESS0_DATA_SHIFT (0x00000000u)
-
-
-/* USERPHYSEL0 */
-
-
-#define MDIO_USERPHYSEL0_LINKSEL (0x00000080u)
-#define MDIO_USERPHYSEL0_LINKSEL_SHIFT (0x00000007u)
-
-#define MDIO_USERPHYSEL0_LINKINTENB (0x00000040u)
-#define MDIO_USERPHYSEL0_LINKINTENB_SHIFT (0x00000006u)
-
-
-#define MDIO_USERPHYSEL0_PHYADRMON (0x0000001Fu)
-#define MDIO_USERPHYSEL0_PHYADRMON_SHIFT (0x00000000u)
-
-
-/* USERACCESS1 */
-
-#define MDIO_USERACCESS1_GO (0x80000000u)
-#define MDIO_USERACCESS1_GO_SHIFT (0x0000001Fu)
-
-#define MDIO_USERACCESS1_WRITE (0x40000000u)
-#define MDIO_USERACCESS1_WRITE_SHIFT (0x0000001Eu)
-
-#define MDIO_USERACCESS1_ACK (0x20000000u)
-#define MDIO_USERACCESS1_ACK_SHIFT (0x0000001Du)
-
-
-#define MDIO_USERACCESS1_REGADR (0x03E00000u)
-#define MDIO_USERACCESS1_REGADR_SHIFT (0x00000015u)
-
-#define MDIO_USERACCESS1_PHYADR (0x001F0000u)
-#define MDIO_USERACCESS1_PHYADR_SHIFT (0x00000010u)
-
-#define MDIO_USERACCESS1_DATA (0x0000FFFFu)
-#define MDIO_USERACCESS1_DATA_SHIFT (0x00000000u)
-
-
-/* USERPHYSEL1 */
-
-
-#define MDIO_USERPHYSEL1_LINKSEL (0x00000080u)
-#define MDIO_USERPHYSEL1_LINKSEL_SHIFT (0x00000007u)
-
-#define MDIO_USERPHYSEL1_LINKINTENB (0x00000040u)
-#define MDIO_USERPHYSEL1_LINKINTENB_SHIFT (0x00000006u)
-
-
-#define MDIO_USERPHYSEL1_PHYADRMON (0x0000001Fu)
-#define MDIO_USERPHYSEL1_PHYADRMON_SHIFT (0x00000000u)
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
+++ /dev/null
-/*
- * hw_reg_access.h.h
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-
-#ifndef _HW_REG_ACCESS_H_
-#define _HW_REG_ACCESS_H_
-
-//*****************************************************************************
-//
-// Macros for hardware access, both direct and via the bit-band region.
-//
-//*****************************************************************************
-#define HWREG(x) \
- (*((volatile unsigned long *)(x)))
-#define HWREGH(x) \
- (*((volatile unsigned short *)(x)))
-#define HWREGB(x) \
- (*((volatile unsigned char *)(x)))
-#define HWREGBITW(x, b) \
- HWREG(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
- (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-#define HWREGBITH(x, b) \
- HWREGH(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
- (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-#define HWREGBITB(x, b) \
- HWREGB(((unsigned long)(x) & 0xF0000000) | 0x02000000 | \
- (((unsigned long)(x) & 0x000FFFFF) << 5) | ((b) << 2))
-
-
-
-#endif // __HW_TYPES_H__
+++ /dev/null
-#ifndef _PHY_H_
-#define _PHY_H_
-
-/* ************************************************* */
-/* PHY */
-/* ************************************************* */
-#define PHY_BMCR 0x0 /* Basic Mode Control Register */
-#define PHY_BMSR 0x01 /* Basic Mode Status Register */
-#define PHY_ANAR 0x4 /* Auto-Negotiation Advertisement Register */
-#define PHY_LEDCR 0x18 /* LED Direct Control Register */
-#define PHY_PHYCR 0x19 /* PHY Control Register */
-#define PHY_PHYCR2 0x1C /* PHY Control Register 2 */
-#define PHY_STS 0x10 /* PHY Status Register */
-#define PHY_ANLPAR 0x05 /* Auto-Negotiation Link Partner Ability Register */
-
-/* BMCR */
-#define PHY_RESET_m (1 << 15)
-#define PHY_SPEED_m (1 << 13)
-#define PHY_AUTONEG_EN_m (1 << 12) /* ! */
-#define PHY_POWERDOWN_m (1 << 11)
-#define PHY_DUPLEX_m (1 << 8)
-#define PHY_AUTONEG_REST (1 << 9)
-
-/* BMSR */
-#define PHY_A_NEG_COMPLETE_m (1 << 5)
-
-/* ANAR & ANLPAR */
-#define PHY_100BASET4_m (1 << 9)
-#define PHY_100BASETXDUPL_m (1 << 8)
-#define PHY_100BASETX_m (1 << 7)
-#define PHY_10BASETDUPL_m (1 << 6)
-#define PHY_10BASET_m (1 << 5)
-
-
-/* ************************************************* */
-void PHY_partner_ability_get(unsigned int mdioBaseAddr, unsigned int phyAddr, unsigned short *data);
-void PHY_configure(unsigned int mdioBaseAddr, unsigned int phyAddr);
-
-
-#endif /* _PHY_H_ */
+++ /dev/null
-/** @file std_nhet.h
-* @brief - NHET Instruction Definition File
-* @date 04.March.2010
-* @version 1.00.000
-*
-* (c) Texas Instruments 2009, All rights reserved.
-*/
-
-#ifndef __STD_NHET_H__
-#define __STD_NHET_H__
-
-#if defined(_TMS470_BIG) || defined(__big_endian__)
-
-#ifndef HET_v2
-# define HET_v2 0
-#endif
-
-#ifndef HETBYTE
-# define HETBYTE unsigned char
-#endif
-
-typedef struct memory_format
-{
- unsigned int program_word ;
- unsigned int control_word ;
- unsigned int data_word ;
- unsigned int reserved_word ;
-} HET_MEMORY ;
-
-
-/*---------------------------------------------*/
-/* ACMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct acmp_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 9 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int coutprv : 1 ;
- unsigned int : 2 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int ext_reg : 1 ;
- unsigned int : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} ACMP_FIELDS;
-
-typedef union
-{
- ACMP_FIELDS acmp ;
- HET_MEMORY memory ;
-} ACMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ECMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ecmp_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int hr_lr : 1 ;
- unsigned int angle_compare : 1 ;
- unsigned int : 7 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int sub_opcode : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} ECMP_FIELDS;
-
-typedef union
-{
- ECMP_FIELDS ecmp ;
- HET_MEMORY memory ;
-} ECMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* SCMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct scmp_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 2 ;
- unsigned int : 2 ;
- unsigned int : 5 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int coutprv : 1 ;
- unsigned int : 2 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int : 2 ;
- unsigned int restart_en : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} SCMP_FIELDS ;
-
-typedef union
-{
- SCMP_FIELDS scmp ;
- HET_MEMORY memory ;
-} SCMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* MCMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct mcmp_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int hr_lr : 1 ;
- unsigned int angle_compare : 1 ;
- unsigned int : 1 ;
- unsigned int save_subtract : 1 ;
- unsigned int : 5 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int sub_opcode : 1 ;
- unsigned int order : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} MCMP_FIELDS ;
-
-typedef union
-{
- MCMP_FIELDS mcmp ;
- HET_MEMORY memory ;
-} MCMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* MOV64 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct mov64_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} MOV64_FIELDS ;
-
-typedef union
-{
- MOV64_FIELDS mov64 ;
- HET_MEMORY memory ;
-} MOV64_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* DADM64 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct dadm64_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} DADM64_FIELDS ;
-
-typedef union
-{
- DADM64_FIELDS dadm64 ;
- HET_MEMORY memory ;
-} DADM64_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* RADM64 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct RADM64_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} RADM64_FIELDS ;
-
-
-typedef union
-{
- RADM64_FIELDS radm64 ;
- HET_MEMORY memory ;
-} RADM64_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* MOV32 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct MOV32_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int z_flag : 1 ;
- unsigned int : 15 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode : 1 ;
- unsigned int move_type : 2 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} MOV32_FIELDS ;
-
-
-typedef union
-{
- MOV32_FIELDS mov32 ;
- HET_MEMORY memory ;
-} MOV32_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ADM32 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ADM32_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 19 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode : 1 ;
- unsigned int move_type : 2 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} ADM32_FIELDS ;
-
-
-typedef union
-{
- ADM32_FIELDS adm32 ;
- HET_MEMORY memory ;
-} ADM32_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ADCNST INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ADCNST_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1 ; /* pk */
- unsigned int : 1 ;
- unsigned int constant : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} ADCNST_FIELDS ;
-
-
-typedef union
-{
- ADCNST_FIELDS adcnst ;
- HET_MEMORY memory ;
-} ADCNST_INSTRUCTION;
-
-
-/*----------------------------------------------*/
-/* ADD INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct ADD_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} ADD_FIELDS ;
-
-
-typedef union
-{
- ADD_FIELDS add ;
- HET_MEMORY memory ;
-} ADD_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* ADC INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct ADC_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} ADC_FIELDS ;
-
-
-typedef union
-{
- ADC_FIELDS adc ;
- HET_MEMORY memory ;
-} ADC_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* SUB INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct SUB_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} SUB_FIELDS ;
-
-
-typedef union
-{
- SUB_FIELDS sub ;
- HET_MEMORY memory ;
-} SUB_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* SBB INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct SBB_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} SBB_FIELDS ;
-
-
-typedef union
-{
- SBB_FIELDS sbb ;
- HET_MEMORY memory ;
-} SBB_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* AND INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct AND_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} AND_FIELDS ;
-
-
-typedef union
-{
- AND_FIELDS and ;
- HET_MEMORY memory ;
-} AND_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* OR INSTRUCTION */
-/*----------------------------------------------*/
-
-
-typedef struct OR_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} OR_FIELDS ;
-
-
-typedef union
-{
- OR_FIELDS or ;
- HET_MEMORY memory ;
-} OR_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* XOR INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct XOR_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int remote_address : 9 ;
-
- unsigned int : 5 ;
- unsigned int control : 1;
- unsigned int sub_opcode3 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int src_2 : 3 ;
- unsigned int shft_mode : 3 ;
- unsigned int shft_cnt : 5 ;
- unsigned int reg_ext : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int rem_dest : 2 ;
- unsigned int reg : 2 ;
- unsigned int : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} XOR_FIELDS ;
-
-
-typedef union
-{
- XOR_FIELDS xor ;
- HET_MEMORY memory ;
-} XOR_INSTRUCTION;
-
-
-
-/*---------------------------------------------*/
-/* CNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct CNT_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int angle_cnt : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int : 4 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 1 ;
- unsigned int max : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} CNT_FIELDS ;
-
-typedef union
-{
- CNT_FIELDS cnt ;
- HET_MEMORY memory ;
-} CNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* APCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct apcnt_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int interrupt_enable : 1 ;
- unsigned int edge_select : 2 ;
- unsigned int : 6 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int count : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} APCNT_FIELDS ;
-
-typedef union
-{
- APCNT_FIELDS apcnt ;
- HET_MEMORY memory ;
-} APCNT_INSTRUCTION;
-
-
-
-/*---------------------------------------------*/
-/* PCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct pcnt_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int interrupt_enable : 1 ;
- unsigned int period_pulse_select : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int count : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} PCNT_FIELDS ;
-
-typedef union
-{
- PCNT_FIELDS pcnt ;
- HET_MEMORY memory ;
-} PCNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* SCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct scnt_format
-{
- unsigned int : 9 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 1 ;
- unsigned int count_mode : 2 ;
- unsigned int step_width : 2 ;
- unsigned int : 4 ;
-
- unsigned int : 5 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 1 ;
- unsigned int gap_start : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} SCNT_FIELDS ;
-
-typedef union
-{
- SCNT_FIELDS scnt ;
- HET_MEMORY memory ;
-} SCNT_INSTRUCTION;
-
-
-\f
-/*---------------------------------------------*/
-/* ACNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct acnt_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int edge_select : 1 ;
- unsigned int : 7 ;
- unsigned int interrupt_enable : 1 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int gap_end : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} ACNT_FIELDS ;
-
-typedef union
-{
- ACNT_FIELDS acnt ;
- HET_MEMORY memory ;
-} ACNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ECNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ecnt_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 1 ;
- unsigned int count_mode : 2 ;
- unsigned int : 6 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int : 3 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int count_cond : 3 ;
- unsigned int : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} ECNT_FIELDS ;
-
-typedef union
-{
- ECNT_FIELDS ecnt ;
- HET_MEMORY memory ;
-} ECNT_INSTRUCTION;
-
-
-
-/*---------------------------------------------*/
-/* RCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct rcnt_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 1 ;
- unsigned int count_mode : 2 ;
- unsigned int : 5 ;
- unsigned int count_mode1 : 1 ;
-
- unsigned int : 3 ;
- unsigned int : 2 ;
- unsigned int control : 1 ;
- unsigned int : 1 ;
- unsigned int divisor : 25 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} RCNT_FIELDS ;
-
-typedef union
-{
- RCNT_FIELDS rcnt ;
- HET_MEMORY memory ;
-} RCNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* DJNZ INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct djnz_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 1 ;
- unsigned int sub_opcode : 2 ;
- unsigned int : 6 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 4 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 10 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} DJNZ_FIELDS ;
-
-typedef union
-{
- DJNZ_FIELDS djnz ;
- HET_MEMORY memory ;
-} DJNZ_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* DJZ INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct djz_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 1 ;
- unsigned int sub_opcode : 2 ;
- unsigned int : 6 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 4 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 10 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} DJZ_FIELDS ;
-
-typedef union
-{
- DJZ_FIELDS djz ;
- HET_MEMORY memory ;
-} DJZ_INSTRUCTION;
-
-/*---------------------------------------------*/
-/* PWCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct pwcnt_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int hr_lr : 1 ;
- unsigned int count_mode : 2 ;
- unsigned int : 6 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 3 ;
- unsigned int en_pin_action : 1 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 3 ;
- unsigned int pin_action : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} PWCNT_FIELDS ;
-
-typedef union
-{
- PWCNT_FIELDS pwcnt ;
- HET_MEMORY memory ;
-} PWCNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* WCAP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct wcap_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int hr_lr : 1 ;
- unsigned int : 8 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int : 3 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int capture_condition : 2 ;
- unsigned int : 2 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} WCAP_FIELDS ;
-
-typedef union
-{
- WCAP_FIELDS wcap ;
- HET_MEMORY memory ;
-} WCAP_INSTRUCTION;
-
-/*----------------------------------------------*/
-/* WCAPE INSTRUCTION */
-/*----------------------------------------------*/
-typedef struct wcape_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 9 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int : 3 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int capture_condition : 2 ;
- unsigned int : 2 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int ts_data : 25 ;
- unsigned int ec_data : 7 ;
-
-} WCAPE_FIELDS ;
-
-typedef union
-{
- WCAPE_FIELDS wcape ;
- HET_MEMORY memory ;
-} WCAPE_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* BR INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct br_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 9 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int : 3 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
-
-#if HET_v2
- unsigned int branch_condition : 5 ;
-#else
- unsigned int branch_condition : 3 ;
- unsigned int : 1 ;
- unsigned int : 1 ;
-#endif
-
- unsigned int : 2 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int hr_data : 7 ;
-
-} BR_FIELDS ;
-
-typedef union
-{
- BR_FIELDS br ;
- HET_MEMORY memory ;
-} BR_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* SHFT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct shft_format
-{
- unsigned int : 6 ;
- unsigned int reqnum : 3 ;
- unsigned int brk : 1 ;
- unsigned int next_program_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int : 5 ;
- unsigned int shift_mode : 4 ;
-
- unsigned int : 3 ;
- unsigned int request : 2 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int previous_bit : 1 ;
- unsigned int : 3 ;
- unsigned int cond_addr : 9 ;
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int shift_condition : 2 ;
- unsigned int : 2 ;
- unsigned int t_register_select : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int interrupt_enable : 1 ;
-
-
- unsigned int data : 25 ;
- unsigned int : 7 ;
-
-} SHFT_FIELDS ;
-
-typedef union
-{
- SHFT_FIELDS shft ;
- HET_MEMORY memory ;
-} SHFT_INSTRUCTION;
-
-/* ---------------------------------------------------------------------------------------------------- */
-
-#elif defined(_TMS470_LITTLE) || defined(__little_endian__)
-
-#ifndef HETBYTE
-# define HETBYTE unsigned char
-#endif
-
-typedef struct memory_format
-{
- unsigned int program_word ;
- unsigned int control_word ;
- unsigned int data_word ;
- unsigned int reserved_word ;
-} HET_MEMORY ;
-
-/*---------------------------------------------*/
-/* ACMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct acmp_format
-{
- unsigned int : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 2 ;
- unsigned int coutprv : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} ACMP_FIELDS;
-
-typedef union
-{
- ACMP_FIELDS acmp ;
- HET_MEMORY memory ;
-} ACMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ECMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ecmp_format
-{
- unsigned int : 7 ;
- unsigned int angle_compare : 1 ;
- unsigned int hr_lr : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int sub_opcode : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} ECMP_FIELDS;
-
-typedef union
-{
- ECMP_FIELDS ecmp ;
- HET_MEMORY memory ;
-} ECMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* SCMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct scmp_format
-{
- unsigned int : 5 ;
- unsigned int : 2 ;
- unsigned int : 2 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int restart_en : 1 ;
- unsigned int : 2 ;
- unsigned int pin_action : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 2 ;
- unsigned int coutprv : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} SCMP_FIELDS ;
-
-typedef union
-{
- SCMP_FIELDS scmp ;
- HET_MEMORY memory ;
-} SCMP_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* MCMP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct mcmp_format
-{
- unsigned int : 5 ;
- unsigned int save_subtract : 1 ;
- unsigned int : 1 ;
- unsigned int angle_compare : 1 ;
- unsigned int hr_lr : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int order : 1 ;
- unsigned int sub_opcode : 1 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} MCMP_FIELDS ;
-
-typedef union
-{
- MCMP_FIELDS mcmp ;
- HET_MEMORY memory ;
-} MCMP_INSTRUCTION;
-
-/*---------------------------------------------*/
-/* MOV64 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct mov64_format
-{
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} MOV64_FIELDS ;
-
-typedef union
-{
- MOV64_FIELDS mov64 ;
- HET_MEMORY memory ;
-} MOV64_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* DADM64 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct dadm64_format
-{
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} DADM64_FIELDS ;
-
-typedef union
-{
- DADM64_FIELDS dadm64 ;
- HET_MEMORY memory ;
-} DADM64_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* RADM64 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct RADM64_format
-{
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int compare_mode : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} RADM64_FIELDS ;
-
-
-typedef union
-{
- RADM64_FIELDS radm64 ;
- HET_MEMORY memory ;
-} RADM64_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* MOV32 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct MOV32_format
-{
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int move_type : 2 ;
- unsigned int sub_opcode : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int : 15 ;
- unsigned int z_flag : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} MOV32_FIELDS ;
-
-
-typedef union
-{
- MOV32_FIELDS mov32 ;
- HET_MEMORY memory ;
-} MOV32_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ADM32 INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ADM32_format
-{
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int move_type : 2 ;
- unsigned int sub_opcode : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int : 19 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} ADM32_FIELDS ;
-
-
-typedef union
-{
- ADM32_FIELDS adm32 ;
- HET_MEMORY memory ;
-} ADM32_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ADCNST INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ADCNST_format
-{
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int constant : 25 ;
- unsigned int : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} ADCNST_FIELDS ;
-
-
-typedef union
-{
- ADCNST_FIELDS adcnst ;
- HET_MEMORY memory ;
-} ADCNST_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* ADD INSTRUCTION */
-/*----------------------------------------------*/
-typedef struct ADD_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} ADD_FIELDS ;
-
-
-typedef union
-{
- ADD_FIELDS add ;
- HET_MEMORY memory ;
-} ADD_INSTRUCTION;
-
-
-
-
-/*----------------------------------------------*/
-/* ADC INSTRUCTION */
-/*----------------------------------------------*/
-
-
-typedef struct ADC_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} ADC_FIELDS ;
-
-
-typedef union
-{
- ADC_FIELDS adc ;
- HET_MEMORY memory ;
-} ADC_INSTRUCTION;
-
-
-
-
-/*----------------------------------------------*/
-/* SUB INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct SUB_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} SUB_FIELDS ;
-
-
-typedef union
-{
- SUB_FIELDS sub ;
- HET_MEMORY memory ;
-} SUB_INSTRUCTION;
-
-
-
-
-
-/*----------------------------------------------*/
-/* SBB INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct SBB_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} SBB_FIELDS ;
-
-
-typedef union
-{
- SBB_FIELDS sbb ;
- HET_MEMORY memory ;
-} SBB_INSTRUCTION;
-
-
-
-
-/*----------------------------------------------*/
-/* AND INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct AND_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} AND_FIELDS ;
-
-
-typedef union
-{
- AND_FIELDS and ;
- HET_MEMORY memory ;
-} AND_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* OR INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct OR_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} OR_FIELDS ;
-
-
-typedef union
-{
- OR_FIELDS or ;
- HET_MEMORY memory ;
-} OR_INSTRUCTION;
-
-
-
-/*----------------------------------------------*/
-/* XOR INSTRUCTION */
-/*----------------------------------------------*/
-
-typedef struct XOR_format
-{
-
- unsigned int remote_address : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int : 1 ;
- unsigned int reg : 2 ;
- unsigned int rem_dest : 2 ;
- unsigned int sub_opcode1 : 1 ;
- unsigned int init_flag : 1 ;
- unsigned int reg_ext : 1 ;
- unsigned int shft_cnt : 5 ;
- unsigned int shft_mode : 3 ;
- unsigned int src_2 : 3 ;
- unsigned int src_1 : 4 ;
- unsigned int sub_opcode3 : 3 ;
- unsigned int control : 1 ;
- unsigned int : 5 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-
-} XOR_FIELDS ;
-
-
-typedef union
-{
- XOR_FIELDS xor ;
- HET_MEMORY memory ;
-} XOR_INSTRUCTION;
-
-
-
-
-/*---------------------------------------------*/
-/* CNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct CNT_format
-{
- unsigned int interrupt_enable : 1 ;
- unsigned int : 4 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int angle_cnt : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int max : 25 ;
- unsigned int : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} CNT_FIELDS ;
-
-typedef union
-{
- CNT_FIELDS cnt ;
- HET_MEMORY memory ;
-} CNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* APCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct apcnt_format
-{
- unsigned int : 6 ;
- unsigned int edge_select : 2 ;
- unsigned int interrupt_enable : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int count : 25 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} APCNT_FIELDS ;
-
-typedef union
-{
- APCNT_FIELDS apcnt ;
- HET_MEMORY memory ;
-} APCNT_INSTRUCTION;
-
-
-
-/*---------------------------------------------*/
-/* PCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct pcnt_format
-{
- unsigned int pin_select : 5 ;
- unsigned int : 1 ;
- unsigned int period_pulse_select : 2 ;
- unsigned int interrupt_enable : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int count : 25 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} PCNT_FIELDS ;
-
-typedef union
-{
- PCNT_FIELDS pcnt ;
- HET_MEMORY memory ;
-} PCNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* SCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct scnt_format
-{
- unsigned int : 4 ;
- unsigned int step_width : 2 ;
- unsigned int count_mode : 2 ;
- unsigned int : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int : 9 ;
-
- unsigned int gap_start : 25 ;
- unsigned int : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int : 5 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} SCNT_FIELDS ;
-
-typedef union
-{
- SCNT_FIELDS scnt ;
- HET_MEMORY memory ;
-} SCNT_INSTRUCTION;
-
-/*---------------------------------------------*/
-/* ACNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct acnt_format
-{
- unsigned int interrupt_enable : 1 ;
- unsigned int : 7 ;
- unsigned int edge_select : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int gap_end : 25 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} ACNT_FIELDS ;
-
-typedef union
-{
- ACNT_FIELDS acnt ;
- HET_MEMORY memory ;
-} ACNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* ECNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct ecnt_format
-{
- unsigned int : 6 ;
- unsigned int count_mode : 2 ;
- unsigned int : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 1 ;
- unsigned int count_cond : 3 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 3 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-
-} ECNT_FIELDS ;
-
-typedef union
-{
- ECNT_FIELDS ecnt ;
- HET_MEMORY memory ;
-} ECNT_INSTRUCTION;
-
-/*---------------------------------------------*/
-/* RCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct rcnt_format
-{
-
- unsigned int count_mode1 : 1 ;
- unsigned int : 5 ;
- unsigned int count_mode : 2 ;
- unsigned int : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
-
- unsigned int divisor : 25 ;
- unsigned int : 1 ;
- unsigned int control : 1 ;
- unsigned int : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-
-} RCNT_FIELDS ;
-
-typedef union
-{
- RCNT_FIELDS rcnt ;
- HET_MEMORY memory ;
-} RCNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* DJNZ INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct djnz_format
-{
- unsigned int : 6 ;
- unsigned int sub_opcode : 2 ;
- unsigned int : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 10 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 4 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} DJNZ_FIELDS ;
-
-typedef union
-{
- DJNZ_FIELDS djnz ;
- HET_MEMORY memory ;
-} DJNZ_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* DJZ INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct djz_format
-{
- unsigned int : 6 ;
- unsigned int sub_opcode : 2 ;
- unsigned int : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 10 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 4 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} DJZ_FIELDS ;
-
-typedef union
-{
- DJZ_FIELDS djz ;
- HET_MEMORY memory ;
-} DJZ_INSTRUCTION;
-\f
-/*---------------------------------------------*/
-/* PWCNT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct pwcnt_format
-{
- unsigned int : 6 ;
- unsigned int count_mode : 2 ;
- unsigned int hr_lr : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int opposite_action : 1 ;
- unsigned int pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int en_pin_action : 1 ;
- unsigned int : 3 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} PWCNT_FIELDS ;
-
-typedef union
-{
- PWCNT_FIELDS pwcnt ;
- HET_MEMORY memory ;
-} PWCNT_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* WCAP INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct wcap_format
-{
- unsigned int : 8 ;
- unsigned int hr_lr : 1 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 2 ;
- unsigned int capture_condition : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 3 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} WCAP_FIELDS ;
-
-typedef union
-{
- WCAP_FIELDS wcap ;
- HET_MEMORY memory ;
-} WCAP_INSTRUCTION;
-
-/*----------------------------------------------*/
-/* WCAPE INSTRUCTION */
-/*----------------------------------------------*/
-typedef struct wcape_format
-{
- unsigned int : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 2 ;
- unsigned int capture_condition : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int ec_data : 7 ;
- unsigned int ts_data : 25 ;
-
-} WCAPE_FIELDS ;
-
-typedef union
-{
- WCAPE_FIELDS wcape ;
- HET_MEMORY memory ;
-} WCAPE_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* BR INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct br_format
-{
- unsigned int : 9 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int : 2 ;
- unsigned int : 1 ;
- unsigned int : 1 ;
- unsigned int branch_condition : 3 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 3 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int hr_data : 7 ;
- unsigned int data : 25 ;
-
-} BR_FIELDS ;
-
-typedef union
-{
- BR_FIELDS br ;
- HET_MEMORY memory ;
-} BR_INSTRUCTION;
-
-
-/*---------------------------------------------*/
-/* SHFT INSTRUCTION */
-/*---------------------------------------------*/
-typedef struct shft_format
-{
- unsigned int shift_mode : 4 ;
- unsigned int : 5 ;
- unsigned int op_code : 4 ;
- unsigned int next_program_address : 9 ;
- unsigned int brk : 1 ;
- unsigned int reqnum : 3 ;
- unsigned int : 6 ;
-
- unsigned int interrupt_enable : 1 ;
- unsigned int ab_register_select : 1 ;
- unsigned int t_register_select : 1 ;
- unsigned int : 2 ;
- unsigned int shift_condition : 2 ;
- unsigned int : 1 ;
- unsigned int pin_select : 5 ;
- unsigned int cond_addr : 9 ;
- unsigned int : 3 ;
- unsigned int previous_bit : 1 ;
- unsigned int auto_read_clear : 1 ;
- unsigned int request : 2 ;
- unsigned int : 3 ;
-
- unsigned int : 7 ;
- unsigned int data : 25 ;
-
-} SHFT_FIELDS ;
-
-typedef union
-{
- SHFT_FIELDS shft ;
- HET_MEMORY memory ;
-} SHFT_INSTRUCTION;
-
-#endif
-
-#endif
-/*--------------------------- End Of File ----------------------------------*/
+++ /dev/null
-/**
- * RPP system library interface file.
- *
- * @file sys.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __SYS_H
-#define __SYS_H
-
-#include "base.h"
-
-#include "sys/cpu_def.h"
-#include "sys/hw_emac_ctrl.h"
-#include "sys/hw_emac.h"
-#include "sys/hw_mdio.h"
-#include "sys/hw_reg_access.h"
-#include "sys/phy.h"
-#include "sys/std_nhet.h"
-#include "sys/sys_core.h"
-#include "sys/sys_mpu.h"
-#include "sys/sys_pinmux.h"
-#include "sys/sys_pmu.h"
-#include "sys/sys_selftest.h"
-#include "sys/system.h"
-#include "sys/sys_vim.h"
-#include "sys/ti_drv_adc.h"
-#include "sys/ti_drv_can.h"
-#include "sys/ti_drv_crc.h"
-#include "sys/ti_drv_dcc.h"
-#include "sys/ti_drv_dma.h"
-#include "sys/ti_drv_dmm.h"
-#include "sys/ti_drv_emac.h"
-#include "sys/ti_drv_emif.h"
-#include "sys/ti_drv_esm.h"
-#include "sys/ti_drv_fray.h"
-#include "sys/ti_drv_gio.h"
-#include "sys/ti_drv_het.h"
-#include "sys/ti_drv_htu.h"
-#include "sys/ti_drv_i2c.h"
-#include "sys/ti_drv_lin.h"
-#include "sys/ti_drv_mdio.h"
-#include "sys/ti_drv_mibspi.h"
-#include "sys/ti_drv_pom.h"
-#include "sys/ti_drv_rtp.h"
-#include "sys/ti_drv_sci.h"
-
-
-#endif /* __SYS_H */
+++ /dev/null
-/** @file sys_core.h
-* @brief System Core Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Core Interface Functions
-* .
-* which are relevant for the System driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef __SYS_CORE_H__
-#define __SYS_CORE_H__
-
-#include "types.h"
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* System Core Interface Functions */
-
-/** @fn void _coreInitRegisters_(void)
-* @brief Initialize Core register
-*/
-void _coreInitRegisters_(void);
-
-/** @fn void _coreInitStackPointer_(void)
-* @brief Initialize Core stack pointer
-*/
-void _coreInitStackPointer_(void);
-
-/** @fn void _coreEnableVfp_(void)
-* @brief Get CPSR Value
-*/
-uint32_t _getCPSRValue_(void);
-
-/** @fn void _gotoCPUIdle_(void)
-* @brief Take CPU to Idle state
-*/
-void _gotoCPUIdle_(void);
-
-/** @fn void _coreEnableIrqVicOffset_(void)
-* @brief Enable Irq offset propagation via Vic controller
-*/
-void _coreEnableIrqVicOffset_(void);
-
-/** @fn void _coreEnableVfp_(void)
-* @brief Enable vector floating point unit
-*/
-void _coreEnableVfp_(void);
-
-/** @fn void _coreEnableEventBusExport_(void)
-* @brief Enable event bus export for external monitoring modules
-* @note It is required to enable event bus export to process ecc issues.
-*
-* This function enables event bus exports to external monitoring modules
-* like tightly coupled RAM wrapper, Flash wrapper and error signaling module.
-*/
-void _coreEnableEventBusExport_(void);
-
-/** @fn void _coreDisableEventBusExport_(void)
-* @brief Disable event bus export for external monitoring modules
-*
-* This function disables event bus exports to external monitoring modules
-* like tightly coupled RAM wrapper, Flash wrapper and error signaling module.
-*/
-void _coreDisableEventBusExport_(void);
-
-/** @fn void _coreEnableRamEcc_(void)
-* @brief Enable external ecc error for RAM odd and even bank
-* @note It is required to enable event bus export to process ecc issues.
-*/
-void _coreEnableRamEcc_(void);
-
-/** @fn void _coreDisableRamEcc_(void)
-* @brief Disable external ecc error for RAM odd and even bank
-*/
-void _coreDisableRamEcc_(void);
-
-/** @fn void _coreEnableFlashEcc_(void)
-* @brief Enable external ecc error for the Flash
-* @note It is required to enable event bus export to process ecc issues.
-*/
-void _coreEnableFlashEcc_(void);
-
-/** @fn void _coreDisableFlashEcc_(void)
-* @brief Disable external ecc error for the Flash
-*/
-void _coreDisableFlashEcc_(void);
-
-/** @fn uint32_t _coreGetDataFault_(void)
-* @brief Get core data fault status register
-* @return The function will return the data fault status register value:
-* - bit [10,3..0]:
-* - 0b00001: Alignment -> address is valid
-* - 0b00000: Background -> address is valid
-* - 0b01101: Permission -> address is valid
-* - 0b01000: Precise External Abort -> address is valid
-* - 0b10110: Imprecise External Abort -> address is unpredictable
-* - 0b11001: Precise ECC Error -> address is valid
-* - 0b11000: Imprecise ECC Error -> address is unpredictable
-* - 0b00010: Debug -> address is unchanged
-* - bit [11]:
-* - 0: Read
-* - 1: Write
-* - bit [12]:
-* - 0: AXI Decode Error (DECERR)
-* - 1: AXI Slave Error (SLVERR)
-*/
-uint32_t _coreGetDataFault_(void);
-
-/** @fn void _coreClearDataFault_(void)
-* @brief Clear core data fault status register
-*/
-void _coreClearDataFault_(void);
-
-/** @fn uint32_t _coreGetInstructionFault_(void)
-* @brief Get core instruction fault status register
-* @return The function will return the instruction fault status register value:
-* - bit [10,3..0]:
-* - 0b00001: Alignment -> address is valid
-* - 0b00000: Background -> address is valid
-* - 0b01101: Permission -> address is valid
-* - 0b01000: Precise External Abort -> address is valid
-* - 0b10110: Imprecise External Abort -> address is unpredictable
-* - 0b11001: Precise ECC Error -> address is valid
-* - 0b11000: Imprecise ECC Error -> address is unpredictable
-* - 0b00010: Debug -> address is unchanged
-* - bit [12]:
-* - 0: AXI Decode Error (DECERR)
-* - 1: AXI Slave Error (SLVERR)
-*/
-uint32_t _coreGetInstructionFault_(void);
-
-/** @fn void _coreClearInstructionFault_(void)
-* @brief Clear core instruction fault status register
-*/
-void _coreClearInstructionFault_(void);
-
-/** @fn uint32_t _coreGetDataFaultAddress_(void)
-* @brief Get core data fault address register
-* @return The function will return the data fault address:
-*/
-uint32_t _coreGetDataFaultAddress_(void);
-
-/** @fn void _coreClearDataFaultAddress_(void)
-* @brief Clear core data fault address register
-*/
-void _coreClearDataFaultAddress_(void);
-
-/** @fn uint32_t _coreGetInstructionFaultAddress_(void)
-* @brief Get core instruction fault address register
-* @return The function will return the instruction fault address:
-*/
-uint32_t _coreGetInstructionFaultAddress_(void);
-
-/** @fn void _coreClearInstructionFaultAddress_(void)
-* @brief Clear core instruction fault address register
-*/
-void _coreClearInstructionFaultAddress_(void);
-
-/** @fn uint32_t _coreGetAuxiliaryDataFault_(void)
-* @brief Get core axiliary data fault status register
-* @return The function will return the axiliary data fault status register value:
-* - bit [13..5]:
-* - Index value for access giving error
-* - bit [21]:
-* - 0: Unrecoverable error
-* - 1: Recoverable error
-* - bit [23..22]:
-* - 0: Side cache
-* - 1: Side ATCM (Flash)
-* - 2: Side BTCM (RAM)
-* - 3: Reserved
-* - bit [27..24]:
-* - Cach way or way in which error occured
-*/
-uint32_t _coreGetAuxiliaryDataFault_(void);
-
-/** @fn void _coreClearAuxiliaryDataFault_(void)
-* @brief Clear core axiliary data fault status register
-*/
-void _coreClearAuxiliaryDataFault_(void);
-
-/** @fn uint32_t _coreGetAuxiliaryInstructionFault_(void)
-* @brief Get core axiliary instruction fault status register
-* @return The function will return the axiliary instruction fault status register value:
-* - bit [13..5]:
-* - Index value for access giving error
-* - bit [21]:
-* - 0: Unrecoverable error
-* - 1: Recoverable error
-* - bit [23..22]:
-* - 0: Side cache
-* - 1: Side ATCM (Flash)
-* - 2: Side BTCM (RAM)
-* - 3: Reserved
-* - bit [27..24]:
-* - Cach way or way in which error occured
-*/
-uint32_t _coreGetAuxiliaryInstructionFault_(void);
-
-/** @fn void _coreClearAuxiliaryInstructionFault_(void)
-* @brief Clear core axiliary instruction fault status register
-*/
-void _coreClearAuxiliaryInstructionFault_(void);
-
-/** @fn void _disable_interrupt_(void)
-* @brief Disable IRQ and FIQ Interrupt mode in CPSR register
-*
-* This function disables IRQ and FIQ Interrupt mode in CPSR register.
-*/
-void _disable_interrupt_(void);
-
-/** @fn void _disable_IRQ_interrupt_(void)
-* @brief Disable IRQ Interrupt mode in CPSR register
-*
-* This function disables IRQ Interrupt mode in CPSR register.
-*/
-void _disable_IRQ_interrupt_(void);
-
-/** @fn void _disable_FIQ_interrupt_(void)
-* @brief Disable FIQ Interrupt mode in CPSR register
-*
-* This function disables IRQ Interrupt mode in CPSR register.
-*/
-void _disable_FIQ_interrupt_(void);
-
-/** @fn void _enable_interrupt_(void)
-* @brief Enable IRQ and FIQ Interrupt mode in CPSR register
-*
-* This function Enables IRQ and FIQ Interrupt mode in CPSR register.
-* User must call this function to enable Interrupts in non-OS environments.
-*/
-void _enable_interrupt_(void);
-
-/** @fn void _esmCcmErrorsClear_(void)
-* @brief Clears ESM Error caused due to CCM Errata in RevA Silicon
-*
-* This function Clears ESM Error caused due to CCM Errata
-* in RevA Silicon immediately after powerup.
-*/
-void _esmCcmErrorsClear_(void);
-
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-#endif
+++ /dev/null
-/** @file sys_mpu.h
-* @brief System Mpu Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Mpu Interface Functions
-* .
-* which are relevant for the memory protection unit driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef __SYS_MPU_H__
-#define __SYS_MPU_H__
-
-#include "base.h"
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-/** @def mpuREGION1
-* @brief Mpu region 1
-*
-* Alias for Mpu region 1
-*/
-#define mpuREGION1 0U
-
-/** @def mpuREGION2
-* @brief Mpu region 2
-*
-* Alias for Mpu region 1
-*/
-#define mpuREGION2 1U
-
-/** @def mpuREGION3
-* @brief Mpu region 3
-*
-* Alias for Mpu region 3
-*/
-#define mpuREGION3 2U
-
-/** @def mpuREGION4
-* @brief Mpu region 4
-*
-* Alias for Mpu region 4
-*/
-#define mpuREGION4 3U
-
-/** @def mpuREGION5
-* @brief Mpu region 5
-*
-* Alias for Mpu region 5
-*/
-#define mpuREGION5 4U
-
-/** @def mpuREGION6
-* @brief Mpu region 6
-*
-* Alias for Mpu region 6
-*/
-#define mpuREGION6 5U
-
-/** @def mpuREGION7
-* @brief Mpu region 7
-*
-* Alias for Mpu region 7
-*/
-#define mpuREGION7 6U
-
-/** @def mpuREGION8
-* @brief Mpu region 8
-*
-* Alias for Mpu region 8
-*/
-#define mpuREGION8 7U
-
-/** @def mpuREGION9
-* @brief Mpu region 9
-*
-* Alias for Mpu region 9
-*/
-#define mpuREGION9 8U
-
-/** @def mpuREGION10
-* @brief Mpu region 10
-*
-* Alias for Mpu region 10
-*/
-#define mpuREGION10 9U
-
-/** @def mpuREGION11
-* @brief Mpu region 11
-*
-* Alias for Mpu region 11
-*/
-#define mpuREGION11 10U
-
-/** @def mpuREGION12
-* @brief Mpu region 12
-*
-* Alias for Mpu region 12
-*/
-#define mpuREGION12 11U
-
-
-
-
-/** @enum mpuRegionAccessPermission
-* @brief Alias names for mpu region access permissions
-*
-* This enumeration is used to provide alias names for the mpu region access permission:
-* - MPU_PRIV_NA_USER_NA_EXEC no access in priviledged mode, no access in user mode and execute
-* - MPU_PRIV_RW_USER_NA_EXEC read/write in priviledged mode, no access in user mode and execute
-* - MPU_PRIV_RW_USER_RO_EXEC read/write in priviledged mode, read only in user mode and execute
-* - MPU_PRIV_RW_USER_RW_EXEC read/write in priviledged mode, read/write in user mode and execute
-* - MPU_PRIV_RO_USER_NA_EXEC read only in priviledged mode, no access in user mode and execute
-* - MPU_PRIV_RO_USER_RO_EXEC read only in priviledged mode, read only in user mode and execute
-* - MPU_PRIV_NA_USER_NA_NOEXEC no access in priviledged mode, no access in user mode and no execution
-* - MPU_PRIV_RW_USER_NA_NOEXEC read/write in priviledged mode, no access in user mode and no execution
-* - MPU_PRIV_RW_USER_RO_NOEXEC read/write in priviledged mode, read only in user mode and no execution
-* - MPU_PRIV_RW_USER_RW_NOEXEC read/write in priviledged mode, read/write in user mode and no execution
-* - MPU_PRIV_RO_USER_NA_NOEXEC read only in priviledged mode, no access in user mode and no execution
-* - MPU_PRIV_RO_USER_RO_NOEXEC read only in priviledged mode, read only in user mode and no execution
-*
-*/
-enum mpuRegionAccessPermission
-{
- MPU_PRIV_NA_USER_NA_EXEC = 0x0000, /**< Alias no access in priviledged mode, no access in user mode and execute */
- MPU_PRIV_RW_USER_NA_EXEC = 0x0100, /**< Alias no read/write in priviledged mode, no access in user mode and execute */
- MPU_PRIV_RW_USER_RO_EXEC = 0x0200, /**< Alias no read/write in priviledged mode, read only in user mode and execute */
- MPU_PRIV_RW_USER_RW_EXEC = 0x0300, /**< Alias no read/write in priviledged mode, read/write in user mode and execute */
- MPU_PRIV_RO_USER_NA_EXEC = 0x0500, /**< Alias no read only in priviledged mode, no access in user mode and execute */
- MPU_PRIV_RO_USER_RO_EXEC = 0x0600, /**< Alias no read only in priviledged mode, read only in user mode and execute */
- MPU_PRIV_NA_USER_NA_NOEXEC = 0x1000, /**< Alias no access in priviledged mode, no access in user mode and no execution */
- MPU_PRIV_RW_USER_NA_NOEXEC = 0x1100, /**< Alias no read/write in priviledged mode, no access in user mode and no execution */
- MPU_PRIV_RW_USER_RO_NOEXEC = 0x1200, /**< Alias no read/write in priviledged mode, read only in user mode and no execution */
- MPU_PRIV_RW_USER_RW_NOEXEC = 0x1300, /**< Alias no read/write in priviledged mode, read/write in user mode and no execution */
- MPU_PRIV_RO_USER_NA_NOEXEC = 0x1500, /**< Alias no read only in priviledged mode, no access in user mode and no execution */
- MPU_PRIV_RO_USER_RO_NOEXEC = 0x1600 /**< Alias no read only in priviledged mode, read only in user mode and no execution */
-};
-
-/** @enum mpuRegionType
-* @brief Alias names for mpu region type
-*
-* This enumeration is used to provide alias names for the mpu region type:
-* - MPU_STRONGLYORDERED_SHAREABLE Memory type strongly ordered and shareable
-* - MPU_DEVICE_SHAREABLE Memory type device and shareable
-* - MPU_NORMAL_OIWTNOWA_NONSHARED Memory type normal outer and inner write-through, no write allocate and non shared
-* - MPU_NORMAL_OIWTNOWA_SHARED Memory type normal outer and inner write-through, no write allocate and shared
-* - MPU_NORMAL_OIWBNOWA_NONSHARED Memory type normal outer and inner write-back, no write allocate and non shared
-* - MPU_NORMAL_OIWBNOWA_SHARED Memory type normal outer and inner write-back, no write allocate and shared
-* - MPU_NORMAL_OINC_NONSHARED Memory type normal outer and inner non-cachable and non shared
-* - MPU_NORMAL_OINC_SHARED Memory type normal outer and inner non-cachable and shared
-* - MPU_NORMAL_OIWBWA_NONSHARED Memory type normal outer and inner write-back, write allocate and non shared
-* - MPU_NORMAL_OIWBWA_SHARED Memory type normal outer and inner write-back, write allocate and shared
-* - MPU_DEVICE_NONSHAREABLE Memory type device and non shareable
-*/
-enum mpuRegionType
-{
- MPU_STRONGLYORDERED_SHAREABLE = 0x0000, /**< Memory type strongly ordered and shareable */
- MPU_DEVICE_SHAREABLE = 0x0001, /**< Memory type device and shareable */
- MPU_NORMAL_OIWTNOWA_NONSHARED = 0x0002, /**< Memory type normal outer and inner write-through, no write allocate and non shared */
- MPU_NORMAL_OIWBNOWA_NONSHARED = 0x0003, /**< Memory type normal outer and inner write-back, no write allocate and non shared */
- MPU_NORMAL_OIWTNOWA_SHARED = 0x0006, /**< Memory type normal outer and inner write-through, no write allocate and shared */
- MPU_NORMAL_OIWBNOWA_SHARED = 0x0007, /**< Memory type normal outer and inner write-back, no write allocate and shared */
- MPU_NORMAL_OINC_NONSHARED = 0x0008, /**< Memory type normal outer and inner non-cachable and non shared */
- MPU_NORMAL_OIWBWA_NONSHARED = 0x000B, /**< Memory type normal outer and inner write-back, write allocate and non shared */
- MPU_NORMAL_OINC_SHARED = 0x000C, /**< Memory type normal outer and inner non-cachable and shared */
- MPU_NORMAL_OIWBWA_SHARED = 0x000F, /**< Memory type normal outer and inner write-back, write allocate and shared */
- MPU_DEVICE_NONSHAREABLE = 0x0010 /**< Memory type device and non shareable */
-};
-
-/** @enum mpuRegionSize
-* @brief Alias names for mpu region type
-*
-* This enumeration is used to provide alias names for the mpu region type:
-* - MPU_STRONGLYORDERED_SHAREABLE Memory type strongly ordered and shareable
-* - MPU_32_BYTES Memory size in bytes
-* - MPU_64_BYTES Memory size in bytes
-* - MPU_128_BYTES Memory size in bytes
-* - MPU_256_BYTES Memory size in bytes
-* - MPU_512_BYTES Memory size in bytes
-* - MPU_1_KB Memory size in kB
-* - MPU_2_KB Memory size in kB
-* - MPU_4_KB Memory size in kB
-* - MPU_8_KB Memory size in kB
-* - MPU_16_KB Memory size in kB
-* - MPU_32_KB Memory size in kB
-* - MPU_64_KB Memory size in kB
-* - MPU_128_KB Memory size in kB
-* - MPU_256_KB Memory size in kB
-* - MPU_512_KB Memory size in kB
-* - MPU_1_MB Memory size in MB
-* - MPU_2_MB Memory size in MB
-* - MPU_4_MB Memory size in MB
-* - MPU_8_MBv Memory size in MB
-* - MPU_16_MB Memory size in MB
-* - MPU_32_MB Memory size in MB
-* - MPU_64_MB Memory size in MB
-* - MPU_128_MB Memory size in MB
-* - MPU_256_MB Memory size in MB
-* - MPU_512_MB Memory size in MB
-* - MPU_1_GB Memory size in GB
-* - MPU_2_GB Memory size in GB
-* - MPU_4_GB Memory size in GB
-*/
-enum mpuRegionSize
-{
- MPU_32_BYTES = 0x04, /**< Memory size in bytes */
- MPU_64_BYTES = 0x05, /**< Memory size in bytes */
- MPU_128_BYTES = 0x06, /**< Memory size in bytes */
- MPU_256_BYTES = 0x07, /**< Memory size in bytes */
- MPU_512_BYTES = 0x08, /**< Memory size in bytes */
- MPU_1_KB = 0x09, /**< Memory size in kB */
- MPU_2_KB = 0x0A, /**< Memory size in kB */
- MPU_4_KB = 0x0B, /**< Memory size in kB */
- MPU_8_KB = 0x0C, /**< Memory size in kB */
- MPU_16_KB = 0x0D, /**< Memory size in kB */
- MPU_32_KB = 0x0E, /**< Memory size in kB */
- MPU_64_KB = 0x0F, /**< Memory size in kB */
- MPU_128_KB = 0x10, /**< Memory size in kB */
- MPU_256_KB = 0x11, /**< Memory size in kB */
- MPU_512_KB = 0x12, /**< Memory size in kB */
- MPU_1_MB = 0x13, /**< Memory size in MB */
- MPU_2_MB = 0x14, /**< Memory size in MB */
- MPU_4_MB = 0x15, /**< Memory size in MB */
- MPU_8_MB = 0x16, /**< Memory size in MB */
- MPU_16_MB = 0x17, /**< Memory size in MB */
- MPU_32_MB = 0x18, /**< Memory size in MB */
- MPU_64_MB = 0x19, /**< Memory size in MB */
- MPU_128_MB = 0x1A, /**< Memory size in MB */
- MPU_256_MB = 0x1B, /**< Memory size in MB */
- MPU_512_MB = 0x1C, /**< Memory size in MB */
- MPU_1_GB = 0x1D, /**< Memory size in GB */
- MPU_2_GB = 0x1E, /**< Memory size in GB */
- MPU_4_GB = 0x1F /**< Memory size in GB */
-};
-
-/** @fn void _mpuInit_(void)
-* @brief Initialize Mpu
-*
-* This function initalizes memory protection unit.
-*/
-void _mpuInit_(void);
-
-/** @fn void _mpuEnable_(void)
-* @brief Enable Mpu
-*
-* This function enables memory protection unit.
-*/
-void _mpuEnable_(void);
-
-/** @fn void _mpuDisable_(void)
-* @brief Disable Mpu
-*
-* This function disables memory protection unit.
-*/
-void _mpuDisable_(void);
-
-/** @fn void _mpuEnableBackgroundRegion_(void)
-* @brief Enable Mpu background region
-*
-* This function enables background region of the memory protection unit.
-*/
-void _mpuEnableBackgroundRegion_(void);
-
-/** @fn void _mpuDisableBackgroundRegion_(void)
-* @brief Disable Mpu background region
-*
-* This function disables background region of the memory protection unit.
-*/
-void _mpuDisableBackgroundRegion_(void);
-
-/** @fn uint32_t _mpuGetNumberOfRegions_(void)
-* @brief Returns number of implemented Mpu regions
-* @return Number of implemented mpu regions
-*
-* This function returns the number of implemented mpu regions.
-*/
-uint32_t _mpuGetNumberOfRegions_(void);
-
-/** @fn uint32_t _mpuAreRegionsSeparate_(void)
-* @brief Returns the type of the implemented mpu regions
-* @return Mpu type of regions
-*
-* This function returns 0 when mpu regions are of type unified atherwise regions are of type separate.
-*/
-uint32_t _mpuAreRegionsSeparate_(void);
-
-/** @fn void _mpuSetRegion_(uint32_t region)
-* @brief Set mpu region number
-*
-* This function selects one of the implemented mpu regions.
-*/
-void _mpuSetRegion_(uint32_t region);
-
-/** @fn uint32_t _mpuGetRegion_(void)
-* @brief Returns the currently selected mpu region
-* @return Mpu region number
-*
-* This function returns currently selected mpu region number.
-*/
-uint32_t _mpuGetRegion_(void);
-
-/** @fn void _mpuSetRegionBaseAddress_(uint32_t address)
-* @brief Set base address of currently selected mpu region
-* @note The base address must always aligned with region size
-*
-* This function sets the base address of currently selected mpu region.
-*/
-void _mpuSetRegionBaseAddress_(uint32_t address);
-
-/** @fn uint32_t _mpuGetRegionBaseAddress_(void)
-* @brief Returns base address of currently selected mpu region
-* @return Current base address of selected mpu region
-*
-* This function returns the base address of currently selected mpu region.
-*/
-uint32_t _mpuGetRegionBaseAddress_(void);
-
-/** @fn void _mpuSetRegionTypeAndPermission_(uint32_t type, uint32_t permission)
-* @brief Set type of currently selected mpu region
-*
-* This function sets the type of currently selected mpu region.
-*/
-void _mpuSetRegionTypeAndPermission_(uint32_t type, uint32_t permission);
-
-/** @fn uint32_t _mpuGetRegionType_(void)
-* @brief Returns the type of currently selected mpu region
-* @return Current type of selected mpu region
-*
-* This function returns the type of currently selected mpu region.
-*/
-uint32_t _mpuGetRegionType_(void);
-
-/** @fn uint32_t _mpuGetRegionPermission_(void)
-* @brief Returns permission of currently selected mpu region
-* @return Current type of selected mpu region
-*
-* This function returns permission of currently selected mpu region.
-*/
-uint32_t _mpuGetRegionPermission_(void);
-
-/** @fn void _mpuSetRegionSizeRegister_(uint32_t value)
-* @brief Set mpu region size register value
-*
-* This function sets mpu region size register value.
-*/
-void _mpuSetRegionSizeRegister_(uint32_t value);
-
-#endif
+++ /dev/null
-/** @file pinmux.h
-* @brief PINMUX Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#include "base.h"
-
-#ifndef __PINMUX_H__
-#define __PINMUX_H__
-
-#define PINMUX_BALL_A5_SHIFT 8
-#define PINMUX_BALL_A11_SHIFT 8
-#define PINMUX_BALL_A14_SHIFT 0
-#define PINMUX_BALL_B2_SHIFT 24
-#define PINMUX_BALL_B3_SHIFT 8
-#define PINMUX_BALL_B4_SHIFT 16
-#define PINMUX_BALL_B5_SHIFT 24
-#define PINMUX_BALL_B6_SHIFT 8
-#define PINMUX_BALL_B11_SHIFT 8
-#define PINMUX_BALL_C1_SHIFT 0
-#define PINMUX_BALL_C2_SHIFT 0
-#define PINMUX_BALL_C3_SHIFT 16
-#define PINMUX_BALL_C4_SHIFT 16
-#define PINMUX_BALL_C5_SHIFT 8
-#define PINMUX_BALL_C6_SHIFT 0
-#define PINMUX_BALL_C7_SHIFT 24
-#define PINMUX_BALL_C8_SHIFT 16
-#define PINMUX_BALL_C9_SHIFT 24
-#define PINMUX_BALL_C10_SHIFT 8
-#define PINMUX_BALL_C11_SHIFT 0
-#define PINMUX_BALL_C12_SHIFT 16
-#define PINMUX_BALL_C13_SHIFT 0
-#define PINMUX_BALL_C14_SHIFT 8
-#define PINMUX_BALL_C15_SHIFT 16
-#define PINMUX_BALL_C16_SHIFT 8
-#define PINMUX_BALL_C17_SHIFT 0
-#define PINMUX_BALL_D3_SHIFT 0
-#define PINMUX_BALL_D4_SHIFT 0
-#define PINMUX_BALL_D5_SHIFT 0
-#define PINMUX_BALL_D14_SHIFT 16
-#define PINMUX_BALL_D15_SHIFT 24
-#define PINMUX_BALL_D16_SHIFT 24
-#define PINMUX_BALL_D17_SHIFT 16
-#define PINMUX_BALL_D19_SHIFT 0
-#define PINMUX_BALL_E1_SHIFT 16
-#define PINMUX_BALL_E3_SHIFT 8
-#define PINMUX_BALL_E5_SHIFT 16
-#define PINMUX_BALL_E6_SHIFT 24
-#define PINMUX_BALL_E7_SHIFT 24
-#define PINMUX_BALL_E8_SHIFT 0
-#define PINMUX_BALL_E9_SHIFT 24
-#define PINMUX_BALL_E10_SHIFT 16
-#define PINMUX_BALL_E11_SHIFT 8
-#define PINMUX_BALL_E12_SHIFT 24
-#define PINMUX_BALL_E13_SHIFT 0
-#define PINMUX_BALL_E16_SHIFT 16
-#define PINMUX_BALL_E17_SHIFT 8
-#define PINMUX_BALL_E18_SHIFT 0
-#define PINMUX_BALL_E19_SHIFT 0
-#define PINMUX_BALL_F3_SHIFT 16
-#define PINMUX_BALL_F5_SHIFT 24
-#define PINMUX_BALL_G3_SHIFT 8
-#define PINMUX_BALL_G5_SHIFT 8
-#define PINMUX_BALL_G16_SHIFT 24
-#define PINMUX_BALL_G17_SHIFT 0
-#define PINMUX_BALL_G19_SHIFT 16
-#define PINMUX_BALL_H3_SHIFT 16
-#define PINMUX_BALL_H16_SHIFT 16
-#define PINMUX_BALL_H17_SHIFT 24
-#define PINMUX_BALL_H18_SHIFT 24
-#define PINMUX_BALL_H19_SHIFT 16
-#define PINMUX_BALL_J3_SHIFT 24
-#define PINMUX_BALL_J18_SHIFT 0
-#define PINMUX_BALL_J19_SHIFT 8
-#define PINMUX_BALL_K2_SHIFT 8
-#define PINMUX_BALL_K5_SHIFT 0
-#define PINMUX_BALL_K15_SHIFT 8
-#define PINMUX_BALL_K17_SHIFT 0
-#define PINMUX_BALL_K18_SHIFT 0
-#define PINMUX_BALL_K19_SHIFT 8
-#define PINMUX_BALL_L5_SHIFT 24
-#define PINMUX_BALL_L15_SHIFT 16
-#define PINMUX_BALL_M1_SHIFT 0
-#define PINMUX_BALL_M2_SHIFT 24
-#define PINMUX_BALL_M5_SHIFT 8
-#define PINMUX_BALL_M15_SHIFT 24
-#define PINMUX_BALL_M17_SHIFT 8
-#define PINMUX_BALL_N1_SHIFT 16
-#define PINMUX_BALL_N2_SHIFT 0
-#define PINMUX_BALL_N5_SHIFT 24
-#define PINMUX_BALL_N15_SHIFT 8
-#define PINMUX_BALL_N17_SHIFT 16
-#define PINMUX_BALL_N19_SHIFT 0
-#define PINMUX_BALL_P1_SHIFT 24
-#define PINMUX_BALL_P5_SHIFT 8
-#define PINMUX_BALL_R2_SHIFT 24
-#define PINMUX_BALL_R5_SHIFT 24
-#define PINMUX_BALL_R6_SHIFT 0
-#define PINMUX_BALL_R7_SHIFT 24
-#define PINMUX_BALL_R8_SHIFT 24
-#define PINMUX_BALL_R9_SHIFT 0
-#define PINMUX_BALL_T1_SHIFT 0
-#define PINMUX_BALL_T12_SHIFT 24
-#define PINMUX_BALL_U1_SHIFT 24
-#define PINMUX_BALL_V2_SHIFT 16
-#define PINMUX_BALL_V5_SHIFT 8
-#define PINMUX_BALL_V6_SHIFT 16
-#define PINMUX_BALL_V7_SHIFT 16
-#define PINMUX_BALL_V10_SHIFT 16
-#define PINMUX_BALL_W3_SHIFT 16
-#define PINMUX_BALL_W5_SHIFT 8
-#define PINMUX_BALL_W6_SHIFT 16
-#define PINMUX_BALL_W9_SHIFT 8
-#define PINMUX_BALL_W10_SHIFT 0
-
-#define PINMUX_GATE_EMIF_CLK_SHIFT 8
-#define PINMUX_GIOB_DISABLE_HET2_SHIFT 16
-#define PINMUX_ALT_ADC_TRIGGER_SHIFT 0
-#define PINMUX_ETHERNET_SHIFT 24
-
-#define PINMUX_BALL_A5_MASK (~(0xFF << PINMUX_BALL_A5_SHIFT))
-#define PINMUX_BALL_A11_MASK (~(0xFF << PINMUX_BALL_A11_SHIFT))
-#define PINMUX_BALL_A14_MASK (~(0xFF << PINMUX_BALL_A14_SHIFT))
-#define PINMUX_BALL_B2_MASK (~(0xFF << PINMUX_BALL_B2_SHIFT))
-#define PINMUX_BALL_B3_MASK (~(0xFF << PINMUX_BALL_B3_SHIFT))
-#define PINMUX_BALL_B4_MASK (~(0xFF << PINMUX_BALL_B4_SHIFT))
-#define PINMUX_BALL_B5_MASK (~(0xFF << PINMUX_BALL_B5_SHIFT))
-#define PINMUX_BALL_B6_MASK (~(0xFF << PINMUX_BALL_B6_SHIFT))
-#define PINMUX_BALL_B11_MASK (~(0xFF << PINMUX_BALL_B11_SHIFT))
-#define PINMUX_BALL_C1_MASK (~(0xFF << PINMUX_BALL_C1_SHIFT))
-#define PINMUX_BALL_C2_MASK (~(0xFF << PINMUX_BALL_C2_SHIFT))
-#define PINMUX_BALL_C3_MASK (~(0xFF << PINMUX_BALL_C3_SHIFT))
-#define PINMUX_BALL_C4_MASK (~(0xFF << PINMUX_BALL_C4_SHIFT))
-#define PINMUX_BALL_C5_MASK (~(0xFF << PINMUX_BALL_C5_SHIFT))
-#define PINMUX_BALL_C6_MASK (~(0xFF << PINMUX_BALL_C6_SHIFT))
-#define PINMUX_BALL_C7_MASK (~(0xFF << PINMUX_BALL_C7_SHIFT))
-#define PINMUX_BALL_C8_MASK (~(0xFF << PINMUX_BALL_C8_SHIFT))
-#define PINMUX_BALL_C9_MASK (~(0xFF << PINMUX_BALL_C9_SHIFT))
-#define PINMUX_BALL_C10_MASK (~(0xFF << PINMUX_BALL_C10_SHIFT))
-#define PINMUX_BALL_C11_MASK (~(0xFF << PINMUX_BALL_C11_SHIFT))
-#define PINMUX_BALL_C12_MASK (~(0xFF << PINMUX_BALL_C12_SHIFT))
-#define PINMUX_BALL_C13_MASK (~(0xFF << PINMUX_BALL_C13_SHIFT))
-#define PINMUX_BALL_C14_MASK (~(0xFF << PINMUX_BALL_C14_SHIFT))
-#define PINMUX_BALL_C15_MASK (~(0xFF << PINMUX_BALL_C15_SHIFT))
-#define PINMUX_BALL_C16_MASK (~(0xFF << PINMUX_BALL_C16_SHIFT))
-#define PINMUX_BALL_C17_MASK (~(0xFF << PINMUX_BALL_C17_SHIFT))
-#define PINMUX_BALL_D3_MASK (~(0xFF << PINMUX_BALL_D3_SHIFT))
-#define PINMUX_BALL_D4_MASK (~(0xFF << PINMUX_BALL_D4_SHIFT))
-#define PINMUX_BALL_D5_MASK (~(0xFF << PINMUX_BALL_D5_SHIFT))
-#define PINMUX_BALL_D14_MASK (~(0xFF << PINMUX_BALL_D14_SHIFT))
-#define PINMUX_BALL_D15_MASK (~(0xFF << PINMUX_BALL_D15_SHIFT))
-#define PINMUX_BALL_D16_MASK (~(0xFF << PINMUX_BALL_D16_SHIFT))
-#define PINMUX_BALL_D17_MASK (~(0xFF << PINMUX_BALL_D17_SHIFT))
-#define PINMUX_BALL_D19_MASK (~(0xFF << PINMUX_BALL_D19_SHIFT))
-#define PINMUX_BALL_E1_MASK (~(0xFF << PINMUX_BALL_E1_SHIFT))
-#define PINMUX_BALL_E3_MASK (~(0xFF << PINMUX_BALL_E3_SHIFT))
-#define PINMUX_BALL_E5_MASK (~(0xFF << PINMUX_BALL_E5_SHIFT))
-#define PINMUX_BALL_E6_MASK (~(0xFF << PINMUX_BALL_E6_SHIFT))
-#define PINMUX_BALL_E7_MASK (~(0xFF << PINMUX_BALL_E7_SHIFT))
-#define PINMUX_BALL_E8_MASK (~(0xFF << PINMUX_BALL_E8_SHIFT))
-#define PINMUX_BALL_E9_MASK (~(0xFF << PINMUX_BALL_E9_SHIFT))
-#define PINMUX_BALL_E10_MASK (~(0xFF << PINMUX_BALL_E10_SHIFT))
-#define PINMUX_BALL_E11_MASK (~(0xFF << PINMUX_BALL_E11_SHIFT))
-#define PINMUX_BALL_E12_MASK (~(0xFF << PINMUX_BALL_E12_SHIFT))
-#define PINMUX_BALL_E13_MASK (~(0xFF << PINMUX_BALL_E13_SHIFT))
-#define PINMUX_BALL_E16_MASK (~(0xFF << PINMUX_BALL_E16_SHIFT))
-#define PINMUX_BALL_E17_MASK (~(0xFF << PINMUX_BALL_E17_SHIFT))
-#define PINMUX_BALL_E18_MASK (~(0xFF << PINMUX_BALL_E18_SHIFT))
-#define PINMUX_BALL_E19_MASK (~(0xFF << PINMUX_BALL_E19_SHIFT))
-#define PINMUX_BALL_F3_MASK (~(0xFF << PINMUX_BALL_F3_SHIFT))
-#define PINMUX_BALL_F5_MASK (~(0xFF << PINMUX_BALL_F4_SHIFT))
-#define PINMUX_BALL_G3_MASK (~(0xFF << PINMUX_BALL_G3_SHIFT))
-#define PINMUX_BALL_G5_MASK (~(0xFF << PINMUX_BALL_G4_SHIFT))
-#define PINMUX_BALL_G16_MASK (~(0xFF << PINMUX_BALL_G16_SHIFT))
-#define PINMUX_BALL_G17_MASK (~(0xFF << PINMUX_BALL_G17_SHIFT))
-#define PINMUX_BALL_G19_MASK (~(0xFF << PINMUX_BALL_G19_SHIFT))
-#define PINMUX_BALL_H3_MASK (~(0xFF << PINMUX_BALL_H3_SHIFT))
-#define PINMUX_BALL_H16_MASK (~(0xFF << PINMUX_BALL_H16_SHIFT))
-#define PINMUX_BALL_H17_MASK (~(0xFF << PINMUX_BALL_H17_SHIFT))
-#define PINMUX_BALL_H18_MASK (~(0xFF << PINMUX_BALL_H18_SHIFT))
-#define PINMUX_BALL_H19_MASK (~(0xFF << PINMUX_BALL_H19_SHIFT))
-#define PINMUX_BALL_J3_MASK (~(0xFF << PINMUX_BALL_J3_SHIFT))
-#define PINMUX_BALL_J18_MASK (~(0xFF << PINMUX_BALL_J18_SHIFT))
-#define PINMUX_BALL_J19_MASK (~(0xFF << PINMUX_BALL_J19_SHIFT))
-#define PINMUX_BALL_K2_MASK (~(0xFF << PINMUX_BALL_K2_SHIFT))
-#define PINMUX_BALL_K5_MASK (~(0xFF << PINMUX_BALL_K4_SHIFT))
-#define PINMUX_BALL_K15_MASK (~(0xFF << PINMUX_BALL_K15_SHIFT))
-#define PINMUX_BALL_K17_MASK (~(0xFF << PINMUX_BALL_K17_SHIFT))
-#define PINMUX_BALL_K18_MASK (~(0xFF << PINMUX_BALL_K18_SHIFT))
-#define PINMUX_BALL_K19_MASK (~(0xFF << PINMUX_BALL_K19_SHIFT))
-#define PINMUX_BALL_L5_MASK (~(0xFF << PINMUX_BALL_L4_SHIFT))
-#define PINMUX_BALL_L15_MASK (~(0xFF << PINMUX_BALL_L15_SHIFT))
-#define PINMUX_BALL_M1_MASK (~(0xFF << PINMUX_BALL_M1_SHIFT))
-#define PINMUX_BALL_M2_MASK (~(0xFF << PINMUX_BALL_M2_SHIFT))
-#define PINMUX_BALL_M5_MASK (~(0xFF << PINMUX_BALL_M4_SHIFT))
-#define PINMUX_BALL_M15_MASK (~(0xFF << PINMUX_BALL_M15_SHIFT))
-#define PINMUX_BALL_M17_MASK (~(0xFF << PINMUX_BALL_M17_SHIFT))
-#define PINMUX_BALL_N1_MASK (~(0xFF << PINMUX_BALL_N1_SHIFT))
-#define PINMUX_BALL_N2_MASK (~(0xFF << PINMUX_BALL_N2_SHIFT))
-#define PINMUX_BALL_N5_MASK (~(0xFF << PINMUX_BALL_N4_SHIFT))
-#define PINMUX_BALL_N15_MASK (~(0xFF << PINMUX_BALL_N15_SHIFT))
-#define PINMUX_BALL_N17_MASK (~(0xFF << PINMUX_BALL_N17_SHIFT))
-#define PINMUX_BALL_N19_MASK (~(0xFF << PINMUX_BALL_N19_SHIFT))
-#define PINMUX_BALL_P1_MASK (~(0xFF << PINMUX_BALL_P1_SHIFT))
-#define PINMUX_BALL_P5_MASK (~(0xFF << PINMUX_BALL_P4_SHIFT))
-#define PINMUX_BALL_R2_MASK (~(0xFF << PINMUX_BALL_R2_SHIFT))
-#define PINMUX_BALL_R5_MASK (~(0xFF << PINMUX_BALL_R5_SHIFT))
-#define PINMUX_BALL_R6_MASK (~(0xFF << PINMUX_BALL_R6_SHIFT))
-#define PINMUX_BALL_R7_MASK (~(0xFF << PINMUX_BALL_R7_SHIFT))
-#define PINMUX_BALL_R8_MASK (~(0xFF << PINMUX_BALL_R8_SHIFT))
-#define PINMUX_BALL_R9_MASK (~(0xFF << PINMUX_BALL_R9_SHIFT))
-#define PINMUX_BALL_T1_MASK (~(0xFF << PINMUX_BALL_T1_SHIFT))
-#define PINMUX_BALL_T12_MASK (~(0xFF << PINMUX_BALL_T12_SHIFT))
-#define PINMUX_BALL_U1_MASK (~(0xFF << PINMUX_BALL_U1_SHIFT))
-#define PINMUX_BALL_V2_MASK (~(0xFF << PINMUX_BALL_V2_SHIFT))
-#define PINMUX_BALL_V5_MASK (~(0xFF << PINMUX_BALL_V5_SHIFT))
-#define PINMUX_BALL_V6_MASK (~(0xFF << PINMUX_BALL_V6_SHIFT))
-#define PINMUX_BALL_V7_MASK (~(0xFF << PINMUX_BALL_V7_SHIFT))
-#define PINMUX_BALL_V10_MASK (~(0xFF << PINMUX_BALL_V10_SHIFT))
-#define PINMUX_BALL_W3_MASK (~(0xFF << PINMUX_BALL_W3_SHIFT))
-#define PINMUX_BALL_W5_MASK (~(0xFF << PINMUX_BALL_W5_SHIFT))
-#define PINMUX_BALL_W6_MASK (~(0xFF << PINMUX_BALL_W6_SHIFT))
-#define PINMUX_BALL_W9_MASK (~(0xFF << PINMUX_BALL_W9_SHIFT))
-#define PINMUX_BALL_W10_MASK (~(0xFF << PINMUX_BALL_W10_SHIFT))
-
-#define PINMUX_GATE_EMIF_CLK_MASK (~(0xFF << PINMUX_GATE_EMIF_CLK_SHIFT))
-#define PINMUX_GIOB_DISABLE_HET2_MASK (~(0xFF << PINMUX_GIOB_DISABLE_HET2_SHIFT))
-#define PINMUX_ALT_ADC_TRIGGER_MASK (~(0xFF << PINMUX_ALT_ADC_TRIGGER_SHIFT))
-#define PINMUX_ETHERNET_MASK (~(0xFF << PINMUX_ETHERNET_SHIFT))
-
-
-
-#define PINMUX_BALL_A5_GIOA_0 (0x1 << PINMUX_BALL_A5_SHIFT)
-#define PINMUX_BALL_A5_OHCI_PRT_RcvDpls_1 (0x2 << PINMUX_BALL_A5_SHIFT)
-#define PINMUX_BALL_A5_W2FC_RXDPI (0x4 << PINMUX_BALL_A5_SHIFT)
-
-#define PINMUX_BALL_A11_HET1_14 (0x1 << PINMUX_BALL_A11_SHIFT)
-#define PINMUX_BALL_A11_OHCI_RCFG_txSe0_0 (0x2 << PINMUX_BALL_A11_SHIFT)
-
-#define PINMUX_BALL_A14_HET1_26 (0x1 << PINMUX_BALL_A14_SHIFT)
-#define PINMUX_BALL_A14_MII_RXD_1 (0x2 << PINMUX_BALL_A14_SHIFT)
-#define PINMUX_BALL_A14_RMII_RXD_1 (0x4 << PINMUX_BALL_A14_SHIFT)
-
-#define PINMUX_BALL_B2_MIBSPI3NCS_2 (0x1 << PINMUX_BALL_B2_SHIFT)
-#define PINMUX_BALL_B2_I2C_SDA (0x2 << PINMUX_BALL_B2_SHIFT)
-#define PINMUX_BALL_B2_HET1_27 (0x4 << PINMUX_BALL_B2_SHIFT)
-
-#define PINMUX_BALL_B3_HET1_22 (0x1 << PINMUX_BALL_B3_SHIFT)
-#define PINMUX_BALL_B3_OHCI_RCFG_txSe0_1 (0x2 << PINMUX_BALL_B3_SHIFT)
-#define PINMUX_BALL_B3_W2FC_SE0O (0x4 << PINMUX_BALL_B3_SHIFT)
-
-#define PINMUX_BALL_B4_HET1_12 (0x1 << PINMUX_BALL_B4_SHIFT)
-#define PINMUX_BALL_B4_MII_CRS (0x2 << PINMUX_BALL_B4_SHIFT)
-#define PINMUX_BALL_B4_RMII_CRS_DV (0x4 << PINMUX_BALL_B4_SHIFT)
-
-#define PINMUX_BALL_B5_GIOA_5 (0x1 << PINMUX_BALL_B5_SHIFT)
-#define PINMUX_BALL_B5_EXTCLKIN (0x2 << PINMUX_BALL_B5_SHIFT)
-
-#define PINMUX_BALL_B6_MIBSPI5NCS_1 (0x1 << PINMUX_BALL_B6_SHIFT)
-#define PINMUX_BALL_B6_DMM_DATA_6 (0x2 << PINMUX_BALL_B6_SHIFT)
-
-#define PINMUX_BALL_B11_HET1_30 (0x1 << PINMUX_BALL_B11_SHIFT)
-#define PINMUX_BALL_B11_MII_RX_DV (0x2 << PINMUX_BALL_B11_SHIFT)
-#define PINMUX_BALL_B11_OHCI_RCFG_speed_0 (0x4 << PINMUX_BALL_B11_SHIFT)
-
-#define PINMUX_BALL_C1_GIOA_2 (0x1 << PINMUX_BALL_C1_SHIFT)
-#define PINMUX_BALL_C1_OHCI_RCFG_txdPls_1 (0x2 << PINMUX_BALL_C1_SHIFT)
-#define PINMUX_BALL_C1_W2FC_TXDO (0x4 << PINMUX_BALL_C1_SHIFT)
-#define PINMUX_BALL_C1_HET2_0 (0x8 << PINMUX_BALL_C1_SHIFT)
-
-#define PINMUX_BALL_C2_GIOA_1 (0x1 << PINMUX_BALL_C2_SHIFT)
-#define PINMUX_BALL_C2_OHCI_PRT_RcvDmns_1 (0x2 << PINMUX_BALL_C2_SHIFT)
-#define PINMUX_BALL_C2_W2FC_RXDMI (0x4 << PINMUX_BALL_C2_SHIFT)
-
-#define PINMUX_BALL_C3_MIBSPI3NCS_3 (0x1 << PINMUX_BALL_C3_SHIFT)
-#define PINMUX_BALL_C3_I2C_SCL (0x2 << PINMUX_BALL_C3_SHIFT)
-#define PINMUX_BALL_C3_HET1_29 (0x4 << PINMUX_BALL_C3_SHIFT)
-
-#define PINMUX_BALL_C4_EMIF_ADDR_6 (0x1 << PINMUX_BALL_C4_SHIFT)
-#define PINMUX_BALL_C4_RTP_DATA_13 (0x2 << PINMUX_BALL_C4_SHIFT)
-#define PINMUX_BALL_C4_HET2_11 (0x4 << PINMUX_BALL_C4_SHIFT)
-
-#define PINMUX_BALL_C5_EMIF_ADDR_7 (0x1 << PINMUX_BALL_C5_SHIFT)
-#define PINMUX_BALL_C5_RTP_DATA_12 (0x2 << PINMUX_BALL_C5_SHIFT)
-#define PINMUX_BALL_C5_HET2_13 (0x4 << PINMUX_BALL_C5_SHIFT)
-
-#define PINMUX_BALL_C6_EMIF_ADDR_8 (0x1 << PINMUX_BALL_C6_SHIFT)
-#define PINMUX_BALL_C6_RTP_DATA_11 (0x2 << PINMUX_BALL_C6_SHIFT)
-#define PINMUX_BALL_C6_HET2_15 (0x4 << PINMUX_BALL_C6_SHIFT)
-
-#define PINMUX_BALL_C7_EMIF_ADDR_9 (0x1 << PINMUX_BALL_C7_SHIFT)
-#define PINMUX_BALL_C7_RTP_DATA_10 (0x2 << PINMUX_BALL_C7_SHIFT)
-
-#define PINMUX_BALL_C8_EMIF_ADDR_10 (0x1 << PINMUX_BALL_C8_SHIFT)
-#define PINMUX_BALL_C8_RTP_DATA_09 (0x2 << PINMUX_BALL_C8_SHIFT)
-
-#define PINMUX_BALL_C9_EMIF_ADDR_11 (0x1 << PINMUX_BALL_C9_SHIFT)
-#define PINMUX_BALL_C9_RTP_DATA_08 (0x2 << PINMUX_BALL_C9_SHIFT)
-
-#define PINMUX_BALL_C10_EMIF_ADDR_12 (0x1 << PINMUX_BALL_C10_SHIFT)
-#define PINMUX_BALL_C10_RTP_DATA_06 (0x2 << PINMUX_BALL_C10_SHIFT)
-
-#define PINMUX_BALL_C11_EMIF_ADDR_13 (0x1 << PINMUX_BALL_C11_SHIFT)
-#define PINMUX_BALL_C11_RTP_DATA_05 (0x2 << PINMUX_BALL_C11_SHIFT)
-
-#define PINMUX_BALL_C12_EMIF_ADDR_14 (0x1 << PINMUX_BALL_C12_SHIFT)
-#define PINMUX_BALL_C12_RTP_DATA_04 (0x2 << PINMUX_BALL_C12_SHIFT)
-
-#define PINMUX_BALL_C13_EMIF_ADDR_15 (0x1 << PINMUX_BALL_C13_SHIFT)
-#define PINMUX_BALL_C13_RTP_DATA_03 (0x2 << PINMUX_BALL_C13_SHIFT)
-
-#define PINMUX_BALL_C14_EMIF_ADDR_17 (0x1 << PINMUX_BALL_C14_SHIFT)
-#define PINMUX_BALL_C14_RTP_DATA_01 (0x2 << PINMUX_BALL_C14_SHIFT)
-
-#define PINMUX_BALL_C15_EMIF_ADDR_19 (0x1 << PINMUX_BALL_C15_SHIFT)
-#define PINMUX_BALL_C15_RTP_nENA (0x2 << PINMUX_BALL_C15_SHIFT)
-
-#define PINMUX_BALL_C16_EMIF_ADDR_20 (0x1 << PINMUX_BALL_C16_SHIFT)
-#define PINMUX_BALL_C16_RTP_nSYNC (0x2 << PINMUX_BALL_C16_SHIFT)
-
-#define PINMUX_BALL_C17_EMIF_ADDR_21 (0x1 << PINMUX_BALL_C17_SHIFT)
-#define PINMUX_BALL_C17_RTP_CLK (0x2 << PINMUX_BALL_C17_SHIFT)
-
-#define PINMUX_BALL_D3_SPI2NENA (0x1 << PINMUX_BALL_D3_SHIFT)
-#define PINMUX_BALL_D3_SPI2NCS_1 (0x2 << PINMUX_BALL_D3_SHIFT)
-
-#define PINMUX_BALL_D4_EMIF_ADDR_0 (0x1 << PINMUX_BALL_D4_SHIFT)
-#define PINMUX_BALL_D4_HET2_1 (0x2 << PINMUX_BALL_D4_SHIFT)
-
-#define PINMUX_BALL_D5_EMIF_ADDR_1 (0x1 << PINMUX_BALL_D5_SHIFT)
-#define PINMUX_BALL_D5_HET2_3 (0x2 << PINMUX_BALL_D5_SHIFT)
-
-#define PINMUX_BALL_D14_EMIF_ADDR_16 (0x1 << PINMUX_BALL_D14_SHIFT)
-#define PINMUX_BALL_D14_RTP_DATA_02 (0x2 << PINMUX_BALL_D14_SHIFT)
-
-#define PINMUX_BALL_D15_EMIF_ADDR_18 (0x1 << PINMUX_BALL_D15_SHIFT)
-#define PINMUX_BALL_D15_RTP_DATA_0 (0x2 << PINMUX_BALL_D15_SHIFT)
-
-#define PINMUX_BALL_D16_EMIF_BA_1 (0x1 << PINMUX_BALL_D16_SHIFT)
-#define PINMUX_BALL_D16_HET2_5 (0x2 << PINMUX_BALL_D16_SHIFT)
-
-#define PINMUX_BALL_D17_EMIF_nWE (0x1 << PINMUX_BALL_D17_SHIFT)
-#define PINMUX_BALL_D17_EMIF_RNW (0x2 << PINMUX_BALL_D17_SHIFT)
-
-#define PINMUX_BALL_D19_HET1_10 (0x1 << PINMUX_BALL_D19_SHIFT)
-#define PINMUX_BALL_D19_MII_TX_CLK (0x2 << PINMUX_BALL_D19_SHIFT)
-#define PINMUX_BALL_D19_OHCI_RCFG_txEnL_0 (0x4 << PINMUX_BALL_D19_SHIFT)
-#define PINMUX_BALL_D19_MII_TX_AVCLK4 (0x8 << PINMUX_BALL_D19_SHIFT)
-
-#define PINMUX_BALL_E1_GIOA_3 (0x1 << PINMUX_BALL_E1_SHIFT)
-#define PINMUX_BALL_E1_HET2_2 (0x2 << PINMUX_BALL_E1_SHIFT)
-
-#define PINMUX_BALL_E3_HET1_11 (0x1 << PINMUX_BALL_E3_SHIFT)
-#define PINMUX_BALL_E3_MIBSPI3NCS_4 (0x2 << PINMUX_BALL_E3_SHIFT)
-#define PINMUX_BALL_E3_HET2_18 (0x4 << PINMUX_BALL_E3_SHIFT)
-#define PINMUX_BALL_E3_OHCI_PRT_OvrCurrent_1 (0x8 << PINMUX_BALL_E3_SHIFT)
-#define PINMUX_BALL_E3_W2FC_VBUSI (0x10 << PINMUX_BALL_E3_SHIFT)
-
-#define PINMUX_BALL_E5_ETMDATA_20 (0x1 << PINMUX_BALL_E5_SHIFT)
-#define PINMUX_BALL_E5_EMIF_DATA_4 (0x2 << PINMUX_BALL_E5_SHIFT)
-
-#define PINMUX_BALL_E6_ETMDATA_11 (0x1 << PINMUX_BALL_E6_SHIFT)
-#define PINMUX_BALL_E6_EMIF_ADDR_2 (0x2 << PINMUX_BALL_E6_SHIFT)
-
-#define PINMUX_BALL_E7_ETMDATA_10 (0x1 << PINMUX_BALL_E7_SHIFT)
-#define PINMUX_BALL_E7_EMIF_ADDR_3 (0x2 << PINMUX_BALL_E7_SHIFT)
-
-#define PINMUX_BALL_E8_ETMDATA_09 (0x1 << PINMUX_BALL_E8_SHIFT)
-#define PINMUX_BALL_E8_EMIF_ADDR_4 (0x2 << PINMUX_BALL_E8_SHIFT)
-
-#define PINMUX_BALL_E9_ETMDATA_08 (0x1 << PINMUX_BALL_E9_SHIFT)
-#define PINMUX_BALL_E9_EMIF_ADDR_5 (0x2 << PINMUX_BALL_E9_SHIFT)
-
-#define PINMUX_BALL_E10_ETMDATA_15 (0x1 << PINMUX_BALL_E10_SHIFT)
-#define PINMUX_BALL_E10_EMIF_nDQM_0 (0x2 << PINMUX_BALL_E10_SHIFT)
-
-#define PINMUX_BALL_E11_ETMDATA_14 (0x1 << PINMUX_BALL_E11_SHIFT)
-#define PINMUX_BALL_E11_EMIF_nDQM_1 (0x2 << PINMUX_BALL_E11_SHIFT)
-
-#define PINMUX_BALL_E12_ETMDATA_13 (0x1 << PINMUX_BALL_E12_SHIFT)
-#define PINMUX_BALL_E12_EMIF_nOE (0x2 << PINMUX_BALL_E12_SHIFT)
-
-#define PINMUX_BALL_E13_ETMDATA_12 (0x1 << PINMUX_BALL_E13_SHIFT)
-#define PINMUX_BALL_E13_EMIF_BA_0 (0x2 << PINMUX_BALL_E13_SHIFT)
-
-#define PINMUX_BALL_E16_MIBSPI5SIMO_1 (0x1 << PINMUX_BALL_E16_SHIFT)
-#define PINMUX_BALL_E16_DMM_DATA_9 (0x2 << PINMUX_BALL_E16_SHIFT)
-
-#define PINMUX_BALL_E17_MIBSPI5SOMI_1 (0x1 << PINMUX_BALL_E17_SHIFT)
-#define PINMUX_BALL_E17_DMM_DATA_13 (0x2 << PINMUX_BALL_E17_SHIFT)
-
-#define PINMUX_BALL_E18_HET1_08 (0x1 << PINMUX_BALL_E18_SHIFT)
-#define PINMUX_BALL_E18_MIBSPI1SIMO_1 (0x2 << PINMUX_BALL_E18_SHIFT)
-#define PINMUX_BALL_E18_MII_TXD_3 (0x4 << PINMUX_BALL_E18_SHIFT)
-#define PINMUX_BALL_E18_OHCI_PRT_OvrCurrent_0 (0x8 << PINMUX_BALL_E18_SHIFT)
-
-#define PINMUX_BALL_E19_MIBSPI5NCS_0 (0x1 << PINMUX_BALL_E19_SHIFT)
-#define PINMUX_BALL_E19_DMM_DATA_5 (0x2 << PINMUX_BALL_E19_SHIFT)
-
-#define PINMUX_BALL_F3_MIBSPI1NCS_1 (0x1 << PINMUX_BALL_F3_SHIFT)
-#define PINMUX_BALL_F3_HET1_17 (0x2 << PINMUX_BALL_F3_SHIFT)
-#define PINMUX_BALL_F3_MII_COL (0x4 << PINMUX_BALL_F3_SHIFT)
-#define PINMUX_BALL_F3_OHCI_RCFG_suspend_0 (0x8 << PINMUX_BALL_F3_SHIFT)
-
-#define PINMUX_BALL_F5_ETMDATA_21 (0x1 << PINMUX_BALL_F5_SHIFT)
-#define PINMUX_BALL_F5_EMIF_DATA_5 (0x2 << PINMUX_BALL_F5_SHIFT)
-
-#define PINMUX_BALL_G3_MIBSPI1NCS_2 (0x1 << PINMUX_BALL_G3_SHIFT)
-#define PINMUX_BALL_G3_HET1_19 (0x2 << PINMUX_BALL_G3_SHIFT)
-#define PINMUX_BALL_G3_MDIO (0x4 << PINMUX_BALL_G3_SHIFT)
-
-#define PINMUX_BALL_G5_ETMDATA_22 (0x1 << PINMUX_BALL_G5_SHIFT)
-#define PINMUX_BALL_G5_EMIF_DATA_6 (0x2 << PINMUX_BALL_G5_SHIFT)
-
-#define PINMUX_BALL_G16_MIBSPI5SOMI_3 (0x1 << PINMUX_BALL_G16_SHIFT)
-#define PINMUX_BALL_G16_DMM_DATA_15 (0x2 << PINMUX_BALL_G16_SHIFT)
-
-#define PINMUX_BALL_G17_MIBSPI5SIMO_3 (0x1 << PINMUX_BALL_G17_SHIFT)
-#define PINMUX_BALL_G17_DMM_DATA_11 (0x2 << PINMUX_BALL_G17_SHIFT)
-
-#define PINMUX_BALL_G19_MIBSPI1NENA (0x1 << PINMUX_BALL_G19_SHIFT)
-#define PINMUX_BALL_G19_HET1_23 (0x2 << PINMUX_BALL_G19_SHIFT)
-#define PINMUX_BALL_G19_MII_RXD_2 (0x4 << PINMUX_BALL_G19_SHIFT)
-#define PINMUX_BALL_G19_OHCI_PRT_RcvDpls_0 (0x8 << PINMUX_BALL_G19_SHIFT)
-
-#define PINMUX_BALL_H3_GIOA_6 (0x1 << PINMUX_BALL_H3_SHIFT)
-#define PINMUX_BALL_H3_HET2_4 (0x2 << PINMUX_BALL_H3_SHIFT)
-
-#define PINMUX_BALL_H16_MIBSPI5SOMI_2 (0x1 << PINMUX_BALL_H16_SHIFT)
-#define PINMUX_BALL_H16_DMM_DATA_14 (0x2 << PINMUX_BALL_H16_SHIFT)
-
-#define PINMUX_BALL_H17_MIBSPI5SIMO_2 (0x1 << PINMUX_BALL_H17_SHIFT)
-#define PINMUX_BALL_H17_DMM_DATA_10 (0x2 << PINMUX_BALL_H17_SHIFT)
-
-#define PINMUX_BALL_H18_MIBSPI5NENA (0x1 << PINMUX_BALL_H18_SHIFT)
-#define PINMUX_BALL_H18_DMM_DATA_7 (0x2 << PINMUX_BALL_H18_SHIFT)
-#define PINMUX_BALL_H18_MII_RXD_3 (0x4 << PINMUX_BALL_H18_SHIFT)
-#define PINMUX_BALL_H18_OHCI_PRT_RcvDmns_0 (0x8 << PINMUX_BALL_H18_SHIFT)
-
-#define PINMUX_BALL_H19_MIBSPI5CLK (0x1 << PINMUX_BALL_H19_SHIFT)
-#define PINMUX_BALL_H19_DMM_DATA_4 (0x2 << PINMUX_BALL_H19_SHIFT)
-#define PINMUX_BALL_H19_MII_TXEN (0x4 << PINMUX_BALL_H19_SHIFT)
-#define PINMUX_BALL_H19_RMII_TXEN (0x8 << PINMUX_BALL_H19_SHIFT)
-
-#define PINMUX_BALL_J3_MIBSPI1NCS_3 (0x1 << PINMUX_BALL_J3_SHIFT)
-#define PINMUX_BALL_J3_HET1_21 (0x2 << PINMUX_BALL_J3_SHIFT)
-
-#define PINMUX_BALL_J18_MIBSPI5SOMI_0 (0x1 << PINMUX_BALL_J18_SHIFT)
-#define PINMUX_BALL_J18_DMM_DATA_12 (0x2 << PINMUX_BALL_J18_SHIFT)
-#define PINMUX_BALL_J18_MII_TXD_0 (0x4 << PINMUX_BALL_J18_SHIFT)
-#define PINMUX_BALL_J18_RMII_TXD_0 (0x8 << PINMUX_BALL_J18_SHIFT)
-
-#define PINMUX_BALL_J19_MIBSPI5SIMO_0 (0x1 << PINMUX_BALL_J19_SHIFT)
-#define PINMUX_BALL_J19_DMM_DATA_8 (0x2 << PINMUX_BALL_J19_SHIFT)
-#define PINMUX_BALL_J19_MII_TXD_1 (0x4 << PINMUX_BALL_J19_SHIFT)
-#define PINMUX_BALL_J19_RMII_TXD_1 (0x8 << PINMUX_BALL_J19_SHIFT)
-
-#define PINMUX_BALL_K2_GIOB_1 (0x1 << PINMUX_BALL_K2_SHIFT)
-#define PINMUX_BALL_K2_OHCI_RCFG_PrtPower_0 (0x2 << PINMUX_BALL_K2_SHIFT)
-
-#define PINMUX_BALL_K5_ETMDATA_23 (0x1 << PINMUX_BALL_K5_SHIFT)
-#define PINMUX_BALL_K5_EMIF_DATA_7 (0x2 << PINMUX_BALL_K5_SHIFT)
-
-#define PINMUX_BALL_K15_ETMDATA_16 (0x1 << PINMUX_BALL_K15_SHIFT)
-#define PINMUX_BALL_K15_EMIF_DATA_0 (0x2 << PINMUX_BALL_K15_SHIFT)
-
-#define PINMUX_BALL_K17_EMIF_nCS_3 (0x1 << PINMUX_BALL_K17_SHIFT)
-#define PINMUX_BALL_K17_RTP_DATA_14 (0x2 << PINMUX_BALL_K17_SHIFT)
-#define PINMUX_BALL_K17_HET2_9 (0x4 << PINMUX_BALL_K17_SHIFT)
-
-#define PINMUX_BALL_K18_HET1_0 (0x1 << PINMUX_BALL_K18_SHIFT)
-#define PINMUX_BALL_K18_SPI4CLK (0x2 << PINMUX_BALL_K18_SHIFT)
-
-#define PINMUX_BALL_K19_HET1_28 (0x1 << PINMUX_BALL_K19_SHIFT)
-#define PINMUX_BALL_K19_MII_RXCLK (0x2 << PINMUX_BALL_K19_SHIFT)
-#define PINMUX_BALL_K19_RMII_REFCLK (0x4 << PINMUX_BALL_K19_SHIFT)
-#define PINMUX_BALL_K19_MII_RX_AVCLK4 (0x8 << PINMUX_BALL_K19_SHIFT)
-
-#define PINMUX_BALL_L5_ETMDATA_24 (0x1 << PINMUX_BALL_L5_SHIFT)
-#define PINMUX_BALL_L5_EMIF_DATA_8 (0x2 << PINMUX_BALL_L5_SHIFT)
-
-#define PINMUX_BALL_L15_ETMDATA_17 (0x1 << PINMUX_BALL_L15_SHIFT)
-#define PINMUX_BALL_L15_EMIF_DATA_1 (0x2 << PINMUX_BALL_L15_SHIFT)
-
-#define PINMUX_BALL_M1_GIOA_7 (0x1 << PINMUX_BALL_M1_SHIFT)
-#define PINMUX_BALL_M1_HET2_6 (0x2 << PINMUX_BALL_M1_SHIFT)
-
-#define PINMUX_BALL_M2_GIOB_0 (0x1 << PINMUX_BALL_M2_SHIFT)
-#define PINMUX_BALL_M2_OHCI_RCFG_txDpls_0 (0x2 << PINMUX_BALL_M2_SHIFT)
-
-#define PINMUX_BALL_M5_ETMDATA_25 (0x1 << PINMUX_BALL_M5_SHIFT)
-#define PINMUX_BALL_M5_EMIF_DATA_9 (0x2 << PINMUX_BALL_M5_SHIFT)
-
-#define PINMUX_BALL_M15_ETMDATA_18 (0x1 << PINMUX_BALL_M15_SHIFT)
-#define PINMUX_BALL_M15_EMIF_DATA_2 (0x2 << PINMUX_BALL_M15_SHIFT)
-
-#define PINMUX_BALL_M17_EMIF_nCS_4 (0x1 << PINMUX_BALL_M17_SHIFT)
-#define PINMUX_BALL_M17_RTP_DATA_07 (0x2 << PINMUX_BALL_M17_SHIFT)
-
-#define PINMUX_BALL_N1_HET1_15 (0x1 << PINMUX_BALL_N1_SHIFT)
-#define PINMUX_BALL_N1_MIBSPI1NCS_4 (0x2 << PINMUX_BALL_N1_SHIFT)
-
-#define PINMUX_BALL_N2_HET1_13 (0x1 << PINMUX_BALL_N2_SHIFT)
-#define PINMUX_BALL_N2_SCITX (0x2 << PINMUX_BALL_N2_SHIFT)
-
-#define PINMUX_BALL_N5_ETMDATA_26 (0x1 << PINMUX_BALL_N5_SHIFT)
-#define PINMUX_BALL_N5_EMIF_DATA_10 (0x2 << PINMUX_BALL_N5_SHIFT)
-
-#define PINMUX_BALL_N15_ETMDATA_19 (0x1 << PINMUX_BALL_N15_SHIFT)
-#define PINMUX_BALL_N15_EMIF_DATA_3 (0x2 << PINMUX_BALL_N15_SHIFT)
-
-#define PINMUX_BALL_N17_EMIF_nCS_0 (0x1 << PINMUX_BALL_N17_SHIFT)
-#define PINMUX_BALL_N17_RTP_DATA_15 (0x2 << PINMUX_BALL_N17_SHIFT)
-#define PINMUX_BALL_N17_HET2_7 (0x4 << PINMUX_BALL_N17_SHIFT)
-
-#define PINMUX_BALL_N19_AD1EVT (0x1 << PINMUX_BALL_N19_SHIFT)
-#define PINMUX_BALL_N19_MII_RX_ER (0x2 << PINMUX_BALL_N19_SHIFT)
-#define PINMUX_BALL_N19_RMII_RX_ER (0x4 << PINMUX_BALL_N19_SHIFT)
-
-#define PINMUX_BALL_P1_HET1_24 (0x1 << PINMUX_BALL_P1_SHIFT)
-#define PINMUX_BALL_P1_MIBSPI1NCS_5 (0x2 << PINMUX_BALL_P1_SHIFT)
-#define PINMUX_BALL_P1_MII_RXD_0 (0x4 << PINMUX_BALL_P1_SHIFT)
-#define PINMUX_BALL_P1_RMII_RXD_0 (0x8 << PINMUX_BALL_P1_SHIFT)
-
-#define PINMUX_BALL_P5_ETMDATA_27 (0x1 << PINMUX_BALL_P5_SHIFT)
-#define PINMUX_BALL_P5_EMIF_DATA_11 (0x2 << PINMUX_BALL_P5_SHIFT)
-
-#define PINMUX_BALL_R2_MIBSPI1NCS_0 (0x1 << PINMUX_BALL_R2_SHIFT)
-#define PINMUX_BALL_R2_MIBSPI1SOMI_1 (0x2 << PINMUX_BALL_R2_SHIFT)
-#define PINMUX_BALL_R2_MII_TXD_2 (0x4 << PINMUX_BALL_R2_SHIFT)
-#define PINMUX_BALL_R2_OHCI_PRT_RcvData_0 (0x8 << PINMUX_BALL_R2_SHIFT)
-
-#define PINMUX_BALL_R5_ETMDATA_28 (0x1 << PINMUX_BALL_R5_SHIFT)
-#define PINMUX_BALL_R5_EMIF_DATA_12 (0x2 << PINMUX_BALL_R5_SHIFT)
-
-#define PINMUX_BALL_R6_ETMDATA_29 (0x1 << PINMUX_BALL_R6_SHIFT)
-#define PINMUX_BALL_R6_EMIF_DATA_13 (0x2 << PINMUX_BALL_R6_SHIFT)
-
-#define PINMUX_BALL_R7_ETMDATA_30 (0x1 << PINMUX_BALL_R7_SHIFT)
-#define PINMUX_BALL_R7_EMIF_DATA_14 (0x2 << PINMUX_BALL_R7_SHIFT)
-
-#define PINMUX_BALL_R8_ETMDATA_31 (0x1 << PINMUX_BALL_R8_SHIFT)
-#define PINMUX_BALL_R8_EMIF_DATA_15 (0x2 << PINMUX_BALL_R8_SHIFT)
-
-#define PINMUX_BALL_R9_ETMTRACECLKIN (0x1 << PINMUX_BALL_R9_SHIFT)
-#define PINMUX_BALL_R9_EXTCLKIN2 (0x2 << PINMUX_BALL_R9_SHIFT)
-
-#define PINMUX_BALL_T1_HET1_07 (0x1 << PINMUX_BALL_T1_SHIFT)
-#define PINMUX_BALL_T1_OHCI_RCFG_PrtPower_1 (0x2 << PINMUX_BALL_T1_SHIFT)
-#define PINMUX_BALL_T1_W2FC_GZO (0x4 << PINMUX_BALL_T1_SHIFT)
-#define PINMUX_BALL_T1_HET2_14 (0x8 << PINMUX_BALL_T1_SHIFT)
-
-#define PINMUX_BALL_T12_MIBSPI5NCS_3 (0x1 << PINMUX_BALL_T12_SHIFT)
-#define PINMUX_BALL_T12_DMM_DATA_3 (0x2 << PINMUX_BALL_T12_SHIFT)
-
-#define PINMUX_BALL_U1_HET1_03 (0x1 << PINMUX_BALL_U1_SHIFT)
-#define PINMUX_BALL_U1_SPI4NCS_0 (0x2 << PINMUX_BALL_U1_SHIFT)
-#define PINMUX_BALL_U1_OHCI_RCFG_speed_1 (0x4 << PINMUX_BALL_U1_SHIFT)
-#define PINMUX_BALL_U1_W2FC_PUENON (0x8 << PINMUX_BALL_U1_SHIFT)
-#define PINMUX_BALL_U1_HET2_10 (0x10 << PINMUX_BALL_U1_SHIFT)
-
-#define PINMUX_BALL_V2_HET1_01 (0x1 << PINMUX_BALL_V2_SHIFT)
-#define PINMUX_BALL_V2_SPI4NENA (0x2 << PINMUX_BALL_V2_SHIFT)
-#define PINMUX_BALL_V2_OHCI_RCFG_txEnL_1 (0x4 << PINMUX_BALL_V2_SHIFT)
-#define PINMUX_BALL_V2_W2FC_PUENO (0x8 << PINMUX_BALL_V2_SHIFT)
-#define PINMUX_BALL_V2_HET2_8 (0x10 << PINMUX_BALL_V2_SHIFT)
-
-#define PINMUX_BALL_V5_MIBSPI3NCS_1 (0x1 << PINMUX_BALL_V5_SHIFT)
-#define PINMUX_BALL_V5_HET1_25 (0x2 << PINMUX_BALL_V5_SHIFT)
-#define PINMUX_BALL_V5_MDCLK (0x4 << PINMUX_BALL_V5_SHIFT)
-
-#define PINMUX_BALL_V6_HET1_05 (0x1 << PINMUX_BALL_V6_SHIFT)
-#define PINMUX_BALL_V6_SPI4SOMI (0x2 << PINMUX_BALL_V6_SHIFT)
-#define PINMUX_BALL_V6_HET2_12 (0x4 << PINMUX_BALL_V6_SHIFT)
-
-#define PINMUX_BALL_V7_HET1_09 (0x1 << PINMUX_BALL_V7_SHIFT)
-#define PINMUX_BALL_V7_HET2_16 (0x2 << PINMUX_BALL_V7_SHIFT)
-#define PINMUX_BALL_V7_OHCI_RCFG_suspend_1 (0x4 << PINMUX_BALL_V7_SHIFT)
-#define PINMUX_BALL_V7_W2FC_SUSPENDO (0x8 << PINMUX_BALL_V7_SHIFT)
-
-#define PINMUX_BALL_V10_MIBSPI3NCS_0 (0x1 << PINMUX_BALL_V10_SHIFT)
-#define PINMUX_BALL_V10_AD2EVT (0x2 << PINMUX_BALL_V10_SHIFT)
-#define PINMUX_BALL_V10_GIOB_2 (0x4 << PINMUX_BALL_V10_SHIFT)
-
-#define PINMUX_BALL_W3_HET1_06 (0x1 << PINMUX_BALL_W3_SHIFT)
-#define PINMUX_BALL_W3_SCIRX (0x2 << PINMUX_BALL_W3_SHIFT)
-
-#define PINMUX_BALL_W5_HET1_02 (0x1 << PINMUX_BALL_W5_SHIFT)
-#define PINMUX_BALL_W5_SPI4SIMO (0x2 << PINMUX_BALL_W5_SHIFT)
-
-#define PINMUX_BALL_W6_MIBSPI5NCS_2 (0x1 << PINMUX_BALL_W6_SHIFT)
-#define PINMUX_BALL_W6_DMM_DATA_2 (0x2 << PINMUX_BALL_W6_SHIFT)
-
-#define PINMUX_BALL_W9_MIBSPI3NENA (0x1 << PINMUX_BALL_W9_SHIFT)
-#define PINMUX_BALL_W9_MIBSPI3NCS_5 (0x2 << PINMUX_BALL_W9_SHIFT)
-#define PINMUX_BALL_W9_HET1_31 (0x4 << PINMUX_BALL_W9_SHIFT)
-
-#define PINMUX_BALL_W10_GIOB_3 (0x1 << PINMUX_BALL_W10_SHIFT)
-#define PINMUX_BALL_W10_OHCI_PRT_RcvData_1 (0x2 << PINMUX_BALL_W10_SHIFT)
-#define PINMUX_BALL_W10_W2FC_RXDI (0x4 << PINMUX_BALL_W10_SHIFT)
-
-#define PINMUX_GATE_EMIF_CLK (0x0 << PINMUX_GATE_EMIF_CLK_SHIFT) /**/
-#define PINMUX_GIOB_DISABLE_HET2 (0x1 << PINMUX_GIOB_DISABLE_HET2_SHIFT)
-#define PINMUX_ALT_ADC_TRIGGER_1 (0x1 << PINMUX_ALT_ADC_TRIGGER_SHIFT)
-#define PINMUX_ALT_ADC_TRIGGER_2 (0x2 << PINMUX_ALT_ADC_TRIGGER_SHIFT)
-#define PINMUX_ETHERNET_MII (0x0 << PINMUX_ETHERNET_SHIFT)
-#define PINMUX_ETHERNET_RMII (0x1 << PINMUX_ETHERNET_SHIFT)
-
-/** @struct pinMuxKicker
-* @brief Pin Muxing Kicker Register Definition
-*
-* This structure is used to access the Pin Muxing Kicker registers.
-*/
-typedef volatile struct pinMuxKicker
-{
- uint32_t KICKER0; /* kicker 0 register */
- uint32_t KICKER1; /* kicker 1 register */
-} pinMuxKICKER_t;
-
-/** @struct pinMuxBase
-* @brief PINMUX Register Definition
-*
-* This structure is used to access the PINMUX module egisters.
-*/
-/** @typedef pinMuxBASE_t
-* @brief PINMUX Register Frame Type Definition
-*
-* This type is used to access the PINMUX Registers.
-*/
-typedef volatile struct pinMuxBase
-{
- uint32_t PINMUX0; /**< 0xEB10 Pin Mux 0 register*/
- uint32_t PINMUX1; /**< 0xEB14 Pin Mux 1 register*/
- uint32_t PINMUX2; /**< 0xEB18 Pin Mux 2 register*/
- uint32_t PINMUX3; /**< 0xEB1C Pin Mux 3 register*/
- uint32_t PINMUX4; /**< 0xEB20 Pin Mux 4 register*/
- uint32_t PINMUX5; /**< 0xEB24 Pin Mux 5 register*/
- uint32_t PINMUX6; /**< 0xEB28 Pin Mux 6 register*/
- uint32_t PINMUX7; /**< 0xEB2C Pin Mux 7 register*/
- uint32_t PINMUX8; /**< 0xEB30 Pin Mux 8 register*/
- uint32_t PINMUX9; /**< 0xEB34 Pin Mux 9 register*/
- uint32_t PINMUX10; /**< 0xEB38 Pin Mux 10 register*/
- uint32_t PINMUX11; /**< 0xEB3C Pin Mux 11 register*/
- uint32_t PINMUX12; /**< 0xEB40 Pin Mux 12 register*/
- uint32_t PINMUX13; /**< 0xEB44 Pin Mux 13 register*/
- uint32_t PINMUX14; /**< 0xEB48 Pin Mux 14 register*/
- uint32_t PINMUX15; /**< 0xEB4C Pin Mux 15 register*/
- uint32_t PINMUX16; /**< 0xEB50 Pin Mux 16 register*/
- uint32_t PINMUX17; /**< 0xEB54 Pin Mux 17 register*/
- uint32_t PINMUX18; /**< 0xEB58 Pin Mux 18 register*/
- uint32_t PINMUX19; /**< 0xEB5C Pin Mux 19 register*/
- uint32_t PINMUX20; /**< 0xEB60 Pin Mux 20 register*/
- uint32_t PINMUX21; /**< 0xEB64 Pin Mux 21 register*/
- uint32_t PINMUX22; /**< 0xEB68 Pin Mux 22 register*/
- uint32_t PINMUX23; /**< 0xEB6C Pin Mux 23 register*/
- uint32_t PINMUX24; /**< 0xEB70 Pin Mux 24 register*/
- uint32_t PINMUX25; /**< 0xEB74 Pin Mux 25 register*/
- uint32_t PINMUX26; /**< 0xEB78 Pin Mux 26 register*/
- uint32_t PINMUX27; /**< 0xEB7C Pin Mux 27 register*/
- uint32_t PINMUX28; /**< 0xEB80 Pin Mux 28 register*/
- uint32_t PINMUX29; /**< 0xEB84 Pin Mux 29 register*/
- uint32_t PINMUX30; /**< 0xEB88 Pin Mux 30 register*/
-}pinMuxBASE_t;
-
-
-/** @def kickerReg
-* @brief Pin Muxing Kicker Register Frame Pointer
-*
-* This pointer is used to enable and disable muxing accross the device.
-*/
-#define kickerReg ((pinMuxKICKER_t *) 0xFFFFEA38)
-
-/** @def pinMuxReg
-* @brief Pin Muxing Control Register Frame Pointer
-*
-* This pointer is used to set the muxing registers accross the device.
-*/
-#define pinMuxReg ((pinMuxBASE_t *) 0xFFFFEB10)
-
-/* PINMUX Interface Functions */
-void muxInit(void);
-
-#endif
+++ /dev/null
-/** @file sys_pmu.h
-* @brief System Pmu Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Pmu Interface Functions
-* .
-* which are relevant for the performance monitor unit driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef __SYS_PMU_H__
-#define __SYS_PMU_H__
-
-#include "base.h"
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-/** @def pmuCOUNTER0
-* @brief pmu event counter 0
-*
-* Alias for pmu event counter 0
-*/
-#define pmuCOUNTER0 0x00000001U
-
-/** @def pmuCOUNTER1
-* @brief pmu event counter 1
-*
-* Alias for pmu event counter 1
-*/
-#define pmuCOUNTER1 0x00000002U
-
-/** @def pmuCOUNTER2
-* @brief pmu event counter 2
-*
-* Alias for pmu event counter 2
-*/
-#define pmuCOUNTER2 0x00000004U
-
-/** @def pmuCYCLE_COUNTER
-* @brief pmu cycle counter
-*
-* Alias for pmu event counter
-*/
-#define pmuCYCLE_COUNTER 0x80000000U
-
-/** @enum pmuEvent
-* @brief pmu event
-*
-* Alias for pmu event counter increment source
-*/
-enum pmuEvent
-{
- PMU_INST_CACHE_MISS = 0x01,
- PMU_DATA_CACHE_MISS = 0x03,
- PMU_DATA_CACHE_ACCESS = 0x04,
- PMU_DATA_READ_ARCH_EXECUTED = 0x06,
- PMU_DATA_WRITE_ARCH_EXECUTED = 0x07,
- PMU_INST_ARCH_EXECUTED = 0x08,
- PMU_EXCEPTION_TAKEN = 0x09,
- PMU_EXCEPTION_RETURN_ARCH_EXECUTED = 0x0A,
- PMU_CHANGE_TO_CONTEXT_ID_EXECUTED = 0x0B,
- PMU_SW_CHANGE_OF_PC_ARCH_EXECUTED = 0x0C,
- PMU_BRANCH_IMM_INST_ARCH_EXECUTED = 0x0D,
- PMU_PROC_RETURN_ARCH_EXECUTED = 0x0E,
- PMU_UNALIGNED_ACCESS_ARCH_EXECUTED = 0x0F,
- PMU_BRANCH_MISSPREDICTED = 0x10,
- PMU_CYCLE_COUNT = 0x11,
- PMU_PREDICTABLE_BRANCHES = 0x12,
- PMU_INST_BUFFER_STALL = 0x40,
- PMU_DATA_DEPENDENCY_INST_STALL = 0x41,
- PMU_DATA_CACHE_WRITE_BACK = 0x42,
- PMU_EXT_MEMORY_REQUEST = 0x43,
- PMU_LSU_BUSY_STALL = 0x44,
- PMU_FORCED_DRAIN_OFSTORE_BUFFER = 0x45,
- PMU_FIQ_DISABLED_CYCLE_COUNT = 0x46,
- PMU_IRQ_DISABLED_CYCLE_COUNT = 0x47,
- PMU_ETMEXTOUT_0 = 0x48,
- PMU_ETMEXTOUT_1 = 0x49,
- PMU_INST_CACHE_TAG_ECC_ERROR = 0x4A,
- PMU_INST_CACHE_DATA_ECC_ERROR = 0x4B,
- PMU_DATA_CACHE_TAG_ECC_ERROR = 0x4C,
- PMU_DATA_CACHE_DATA_ECC_ERROR = 0x4D,
- PMU_TCM_FATAL_ECC_ERROR_PREFETCH = 0x4E,
- PMU_TCM_FATAL_ECC_ERROR_LOAD_STORE = 0x4F,
- PMU_STORE_BUFFER_MERGE = 0x50,
- PMU_LSU_STALL_STORE_BUFFER_FULL = 0x51,
- PMU_LSU_STALL_STORE_QUEUE_FULL = 0x52,
- PMU_INTEGER_DIV_EXECUTED = 0x53,
- PMU_STALL_INTEGER_DIV = 0x54,
- PMU_PLD_INST_LINE_FILL = 0x55,
- PMU_PLD_INST_NO_LINE_FILL = 0x56,
- PMU_NON_CACHEABLE_ACCESS_AXI_MASTER = 0x57,
- PMU_INST_CACHE_ACCESS = 0x58,
- PMU_DOUBLE_DATA_CACHE_ISSUE = 0x59,
- PMU_DUAL_ISSUE_CASE_A = 0x5A,
- PMU_DUAL_ISSUE_CASE_B1_B2_F2_F2D = 0x5B,
- PMU_DUAL_ISSUE_OTHER = 0x5C,
- PMU_DP_FLOAT_INST_EXCECUTED = 0x5D,
- PMU_DUAL_ISSUED_PAIR_INST_ARCH_EXECUTED = 0x5E,
- PMU_DATA_CACHE_DATA_FATAL_ECC_ERROR = 0x60,
- PMU_DATA_CACHE_TAG_FATAL_ECC_ERROR = 0x61,
- PMU_PROCESSOR_LIVE_LOCK = 0x62,
- PMU_ATCM_MULTI_BIT_ECC_ERROR = 0x64,
- PMU_B0TCM_MULTI_BIT_ECC_ERROR = 0x65,
- PMU_B1TCM_MULTI_BIT_ECC_ERROR = 0x66,
- PMU_ATCM_SINGLE_BIT_ECC_ERROR = 0x67,
- PMU_B0TCM_SINGLE_BIT_ECC_ERROR = 0x68,
- PMU_B1TCM_SINGLE_BIT_ECC_ERROR = 0x69,
- PMU_TCM_COR_ECC_ERROR_LOAD_STORE = 0x6A,
- PMU_TCM_COR_ECC_ERROR_PREFETCH = 0x6B,
- PMU_TCM_FATAL_ECC_ERROR_AXI_SLAVE = 0x6C,
- PMU_TCM_COR_ECC_ERROR_AXI_SLAVE = 0x6D
-};
-
-/** @fn void _pmuInit_(void)
-* @brief Initialize Perfprmance Monitor Unit
-*/
-void _pmuInit_(void);
-
-/** @fn void _pmuEnableCountersGlobal_(void)
-* @brief Enable and reset cycle counter and all 3 event counters
-*/
-void _pmuEnableCountersGlobal_(void);
-
-/** @fn void _pmuDisableCountersGlobal_(void)
-* @brief Disable cycle counter and all 3 event counters
-*/
-void _pmuDisableCountersGlobal_(void);
-
-/** @fn void _pmuResetCycleCounter_(void)
-* @brief Reset cycle counter
-*/
-void _pmuResetCycleCounter_(void);
-
-/** @fn void _pmuResetEventCounters_(void)
-* @brief Reset event counters 0-2
-*/
-void _pmuResetEventCounters_(void);
-
-/** @fn void _pmuResetCounters_(void)
-* @brief Reset cycle counter and event counters 0-2
-*/
-void _pmuResetCounters_(void);
-
-/** @fn void _pmuStartCounters_(uint32_t counters)
-* @brief Starts selected counters
-* @param[in] counters - Counter mask
-*/
-void _pmuStartCounters_(uint32_t counters);
-
-/** @fn void _pmuStopCounters_(uint32_t counters)
-* @brief Stops selected counters
-* @param[in] counters - Counter mask
-*/
-void _pmuStopCounters_(uint32_t counters);
-
-/** @fn void _pmuSetCountEvent_(uint32_t counter, uint32_t event)
-* @brief Set event counter count event
-* @param[in] counter - Counter select 0..2
-* @param[in] event - Count event
-*/
-void _pmuSetCountEvent_(uint32_t counter, uint32_t event);
-
-/** @fn uint32_t _pmuGetCycleCount_(void)
-* @brief Returns current cycle counter value
-*
-* @return cycle count.
-*/
-uint32_t _pmuGetCycleCount_(void);
-
-/** @fn uint32_t _pmuGetEventCount_(uint32_t counter)
-* @brief Returns current event counter value
-* @param[in] counter - Counter select 0..2
-*
-* @return event counter count.
-*/
-uint32_t _pmuGetEventCount_(uint32_t counter);
-
-/** @fn uint32_t _pmuGetOverflow_(void)
-* @brief Returns current overflow register and clear flags
-*
-* @return overflow flags.
-*/
-uint32_t _pmuGetOverflow_(void);
-
-
-#endif
+++ /dev/null
-/** @file sys_selftest.h
-* @brief System Memory Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Efuse Self Test Functions
-* .
-* which are relevant for the System driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef __SYS_SELFTEST_H__
-#define __SYS_SELFTEST_H__
-
-//#include "sys_common.h"
-//#include "sys_core.h"
-//#include "system.h"
-//#include "sys_vim.h"
-//#include "ti_drv_adc.h"
-//#include "ti_drv_can.h"
-//#include "ti_drv_mibspi.h"
-//#include "ti_drv_het.h"
-//#include "ti_drv_htu.h"
-//#include "ti_drv_esm.h"
-#include "sys/sys.h"
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#define flash1bitError (*(unsigned int *) 0xF00803F0)
-#define flash2bitError (*(unsigned int *) 0xF00803F8)
-
-#define tcramA1bitError (*(unsigned int *)(0x08400000))
-#define tcramA2bitError (*(unsigned int *)(0x08400010))
-
-#define tcramB1bitError (*(unsigned int *)(0x08400008))
-#define tcramB2bitError (*(unsigned int *)(0x08400018))
-
-#define tcramA1bit (*(unsigned int *)0x08000000)
-#define tcramA2bit (*(unsigned int *)0x08000010)
-
-#define tcramB1bit (*(unsigned int *)0x08000008)
-#define tcramB2bit (*(unsigned int *)0x08000018)
-
-#define flashBadECC (*(unsigned int *)0x20080000)
-
-#define CCMSR (*(unsigned int *)0xFFFFF600U)
-#define CCMKEYR (*(unsigned int *)0xFFFFF604U)
-
-#define DMA_PARCR (*(unsigned int *)0xFFFFF1A8U)
-#define DMA_PARADDR (*(unsigned int *)0xFFFFF1ACU)
-
-#define DMARAMLOC (*(unsigned int *)0xFFF80000U)
-#define DMARAMPARLOC (*(unsigned int *)0xFFF80A00U)
-
-#ifndef __PBIST_H__
-#define __PBIST_H__
-
-/** @enum pbistPort
-* @brief Alias names for pbist Port number
-*
-* This enumeration is used to provide alias names for the pbist Port number
-* - PBIST_PORT0
-* - PBIST_PORT1
-*/
-enum pbistPort
-{
- PBIST_PORT0 = 0, /**< Alias for PBIST Port 0 */
- PBIST_PORT1 = 1 /**< Alias for PBIST Port 1 */
-};
-/** @enum pbistAlgo
-* @brief Alias names for pbist Algorithm
-*
-* This enumeration is used to provide alias names for the pbist Algorithm
-* - PBIST_TripleReadSlow
-* - PBIST_TripleReadFast
-* - PBIST_March13N_DP
-* - PBIST_March13N_SP
-* - PBIST_DOWN1a_DP
-* - PBIST_DOWN1a_SP
-* - PBIST_MapColumn_DP
-* - PBIST_MapColumn_SP
-* - PBIST_Precharge_DP
-* - PBIST_Precharge_SP
-* - PBIST_DTXN2a_DP
-* - PBIST_DTXN2a_SP
-* - PBIST_PMOSOpen_DP
-* - PBIST_PMOSOpen_SP
-* - PBIST_PPMOSOpenSlice1_DP
-* - PBIST_PPMOSOpenSlice1_SP
-* - PBIST_PPMOSOpenSlice2_DP
-* - PBIST_PPMOSOpenSlice2_SP
-
-*/
-enum pbistAlgo
-{
- PBIST_TripleReadSlow = 0x00000001,
- PBIST_TripleReadFast = 0x00000002,
- PBIST_March13N_DP = 0x00000004,
- PBIST_March13N_SP = 0x00000008,
- PBIST_DOWN1a_DP = 0x00000010,
- PBIST_DOWN1a_SP = 0x00000020,
- PBIST_MapColumn_DP = 0x00000040,
- PBIST_MapColumn_SP = 0x00000080,
- PBIST_Precharge_DP = 0x00000100,
- PBIST_Precharge_SP = 0x00000200,
- PBIST_DTXN2a_DP = 0x00000400,
- PBIST_DTXN2a_SP = 0x00000800,
- PBIST_PMOSOpen_DP = 0x00001000,
- PBIST_PMOSOpen_SP = 0x00002000,
- PBIST_PPMOSOpenSlice1_DP = 0x00004000,
- PBIST_PPMOSOpenSlice1_SP = 0x00008000,
- PBIST_PPMOSOpenSlice2_DP = 0x00010000,
- PBIST_PPMOSOpenSlice2_SP = 0x00020000
-};
-
-/* PBIST General Definitions */
-
-/** @struct pbistBase
-* @brief PBIST Base Register Definition
-*
-* This structure is used to access the PBIST module egisters.
-*/
-/** @typedef pbistBASE_t
-* @brief PBIST Register Frame Type Definition
-*
-* This type is used to access the PBIST Registers.
-*/
-typedef volatile struct pbistBase
-{
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1)) /* 0x0160: RAM Configuration Register */
- uint32_t RLS : 2U; /* 0x0160: RAM Latency Select */
- uint32_t PLS : 4U; /* 0x0160: Pipeline Latency Select */
- uint32_t SMS : 2U; /* 0x0160: Sense Margin Select Register */
- uint32_t DWR : 8U; /* 0x0160: Data Width Register */
- uint32_t RDS : 8U; /* 0x0160: Return Data Select */
- uint32_t RGS : 8U; /* 0x0160: RAM Group Select */
-#else
- uint32_t RGS : 8U; /* 0x0160: RAM Group Select */
- uint32_t RDS : 8U; /* 0x0160: Return Data Select */
- uint32_t DWR : 8U; /* 0x0160: Data Width Register */
- uint32_t SMS : 2U; /* 0x0160: Sense Margin Select Register */
- uint32_t PLS : 4U; /* 0x0160: Pipeline Latency Select */
- uint32_t RLS : 2U; /* 0x0160: RAM Latency Select */
-#endif
-
- uint32_t DLR; /* 0x0164: Datalogger Register */
- uint32_t : 32U; /* 0x0168 */
- uint32_t : 32U; /* 0x016C */
- uint32_t : 32U; /* 0x0170 */
- uint32_t : 32U; /* 0x0174 */
- uint32_t : 32U; /* 0x0178 */
- uint32_t : 32U; /* 0x017C */
- uint32_t PACT; /* 0x0180: PBIST Activate Register */
- uint32_t PBISTID; /* 0x0184: PBIST ID Register */
- uint32_t OVER; /* 0x0188: Override Register */
- uint32_t : 32U; /* 0x018C */
- uint32_t FSRF0; /* 0x0190: Fail Status Fail Register 0 */
- uint32_t FSRF1; /* 0x0194: Fail Status Fail Register 1 */
- uint32_t FSRC0; /* 0x0198: Fail Status Count Register 0 */
- uint32_t FSRC1; /* 0x019C: Fail Status Count Register 1 */
- uint32_t FSRA0; /* 0x01A0: Fail Status Address 0 Register */
- uint32_t FSRA1; /* 0x01A4: Fail Status Address 1 Register */
- uint32_t FSRDL0; /* 0x01A8: Fail Status Data Register 0 */
- uint32_t : 32U; /* 0x01AC */
- uint32_t FSRDL1; /* 0x01B0: Fail Status Data Register 1 */
- uint32_t : 32U; /* 0x01B4 */
- uint32_t : 32U; /* 0x01B8 */
- uint32_t : 32U; /* 0x01BC */
- uint32_t ROM; /* 0x01C0: ROM Mask Register */
- uint32_t ALGO; /* 0x01C4: Algorithm Mask Register */
- uint32_t RINFOL; /* 0x01C8: RAM Info Mask Lower Register */
- uint32_t RINFOU; /* 0x01CC: RAM Info Mask Upper Register */
-} pbistBASE_t;
-
-#define pbistREG ((pbistBASE_t *)0xFFFFE560U)
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void memoryPort0TestFailNotification(uint32_t groupSelect, uint32_t dataSelect, uint32_t address, uint32_t data)
-* @brief Memory Port 0 test fail notification
-* @param[in] groupSelect Failing Ram group select:
-* @param[in] dataSelect Failing Ram data select:
-* @param[in] address Failing Ram offset:
-* @param[in] data Failing data at address:
-*
-* @note This function has to be provide by the user.
-*/
-void memoryPort0TestFailNotification(uint32_t groupSelect, uint32_t dataSelect, uint32_t address, uint32_t data);
-
-/** @fn void memoryPort1TestFailNotification(uint32_t groupSelect, uint32_t dataSelect, uint32_t address, uint32_t data)
-* @brief Memory Port 1 test fail notification
-* @param[in] groupSelect Failing Ram group select:
-* @param[in] dataSelect Failing Ram data select:
-* @param[in] address Failing Ram offset:
-* @param[in] data Failing data at address:
-*
-* @note This function has to be provide by the user.
-*/
-void memoryPort1TestFailNotification(uint32_t groupSelect, uint32_t dataSelect, uint32_t address, uint32_t data);
-
-#endif
-
-#ifndef __STC_H__
-#define __STC_H__
-
-/* STC General Definitions */
-
-/* STC Test Intervals supported in the Device */
-#define STC_INTERVAL 24
-#define STC_MAX_TIMEOUT 0xFFFFFFFF
-
-/** @struct stcBase
-* @brief STC Base Register Definition
-*
-* This structure is used to access the STC module egisters.
-*/
-/** @typedef stcBASE_t
-* @brief STC Register Frame Type Definition
-*
-* This type is used to access the STC Registers.
-*/
-typedef volatile struct stcBase
-{
- uint32_t STCGCR0; /**< 0x0000: STC Control Register 0 */
- uint32_t STCGCR1; /**< 0x0004: STC Control Register 1 */
- uint32_t STCTPR; /**< 0x0008: STC Self-Test Run Timeout Counter Preload Register */
- uint32_t STCCADDR; /**< 0x000C: STC Self-Test Current ROM Address Register */
- uint32_t STCCICR; /**< 0x0010: STC Self-Test Current Interval Count Register */
- uint32_t STCGSTAT; /**< 0x0014: STC Self-Test Global Status Register */
- uint32_t STCFSTAT; /**< 0x0018: STC Self-Test Fail Status Register */
- uint32_t CPU1_CURMISR3; /**< 0x001C: STC CPU1 Current MISR Register */
- uint32_t CPU1_CURMISR2; /**< 0x0020: STC CPU1 Current MISR Register */
- uint32_t CPU1_CURMISR1; /**< 0x0024: STC CPU1 Current MISR Register */
- uint32_t CPU1_CURMISR0; /**< 0x0028: STC CPU1 Current MISR Register */
- uint32_t CPU2_CURMISR3; /**< 0x002C: STC CPU1 Current MISR Register */
- uint32_t CPU2_CURMISR2; /**< 0x0030: STC CPU1 Current MISR Register */
- uint32_t CPU2_CURMISR1; /**< 0x0034: STC CPU1 Current MISR Register */
- uint32_t CPU2_CURMISR0; /**< 0x0038: STC CPU1 Current MISR Register */
- uint32_t STCSCSCR; /**< 0x003C: STC Signature Compare Self-Check Register */
-} stcBASE_t;
-
-#define stcREG ((stcBASE_t *)0xFFFFE600U)
-
-#endif
-
-#ifndef __EFC_H__
-#define __EFC_H__
-
-typedef volatile struct efcBase
-{
- unsigned int INSTRUCTION; /* 0x0 INSTRUCTION AN DUMPWORD REGISTER */
- unsigned int ADDRESS; /* 0x4 ADDRESS REGISTER */
- unsigned int DATA_UPPER; /* 0x8 DATA UPPER REGISTER */
- unsigned int DATA_LOWER; /* 0xc DATA LOWER REGISTER */
- unsigned int SYSTEM_CONFIG; /* 0x10 SYSTEM CONFIG REGISTER */
- unsigned int SYSTEM_STATUS; /* 0x14 SYSTEM STATUS REGISTER */
- unsigned int ACCUMULATOR; /* 0x18 ACCUMULATOR REGISTER */
- unsigned int BOUNDARY; /* 0x1C BOUNDARY REGISTER */
- unsigned int KEY_FLAG; /* 0x20 KEY FLAG REGISTER */
- unsigned int KEY; /* 0x24 KEY REGISTER */
- unsigned int : 32; /* 0x28 RESERVED */
- unsigned int PINS; /* 0x2C PINS REGISTER */
- unsigned int CRA; /* 0x30 CRA */
- unsigned int READ; /* 0x34 READ REGISTER */
- unsigned int PROGRAMME; /* 0x38 PROGRAMME REGISTER */
- unsigned int ERROR; /* 0x3C ERROR STATUS REGISTER */
- unsigned int SINGLE_BIT; /* 0x40 SINGLE BIT ERROR */
- unsigned int TWO_BIT_ERROR; /* 0x44 DOUBLE BIT ERROR */
- unsigned int SELF_TEST_CYCLES; /* 0x48 SELF TEST CYCLEX */
- unsigned int SELF_TEST_SIGN; /* 0x4C SELF TEST SIGNATURE */
-} efcBASE_t;
-
-#define efcREG ((efcBASE_t *)0xFFF8C000U)
-
-#define INPUT_ENABLE 0x0000000F
-#define INPUT_DISABLE 0x00000000
-
-#define SYS_WS_READ_STATES 0x00000000
-
-
-#define SYS_REPAIR_EN_0 0x00000000
-#define SYS_REPAIR_EN_3 0x00000100
-#define SYS_REPAIR_EN_5 0x00000200
-
-#define SYS_DEID_AUTOLOAD_EN 0x00000400
-#define SYS_DEID_AUTOLOAD_EN 0x00000400
-
-#define EFC_FDI_EN 0x00000800
-#define EFC_FDI_DIS 0x00000000
-
-#define SYS_ECC_OVERRIDE_EN 0x00001000
-#define SYS_ECC_OVERRIDE_DIS 0x00000000
-
-#define SYS_ECC_SELF_TEST_EN 0x00002000
-#define SYS_ECC_SELF_TEST_DIS 0x00000000
-
-#define OUTPUT_ENABLE 0x0003C000
-#define OUTPUT_DISABLE 0x00000000
-
-/*********** OUTPUT **************/
-
-#define EFC_AUTOLOAD_ERROR_EN 0x00040000
-#define EFC_INSTRUCTION_ERROR_EN 0x00080000
-#define EFC_INSTRUCTION_INFO_EN 0x00100000
-#define EFC_SELF_TEST_ERROR_EN 0x00200000
-
-
-#define EFC_AUTOLOAD_ERROR_DIS 0x00000000
-#define EFC_INSTRUCTION_ERROR_DIS 0x00000000
-#define EFC_INSTRUCTION_INFO_DIS 0x00000000
-#define EFC_SELF_TEST_ERROR_DIS 0x00000000
-
-#define DISABLE_READ_ROW0 0x00800000
-
-/********************************************************************/
-
-#define SYS_REPAIR_0 0x00000010
-#define SYS_REPAIR_3 0x00000010
-#define SYS_REPAIR_5 0x00000020
-
-#define SYS_DEID_AUTOLOAD 0x00000040
-#define SYS_FCLRZ 0x00000080
-#define EFC_READY 0x00000100
-#define SYS_ECC_OVERRIDE 0x00000200
-#define EFC_AUTOLOAD_ERROR 0x00000400
-#define EFC_INSTRUCTION_ERROR 0x00000800
-#define EFC_INSTRUCTION_INFO 0x00001000
-#define SYS_ECC_SELF_TEST 0x00002000
-#define EFC_SELF_TEST_ERROR 0x00004000
-#define EFC_SELF_TEST_DONE 0x00008000
-
-/************** 0x3C error status register ******************************************************/
-
-#define TIME_OUT 0x01
-#define AUTOLOAD_NO_FUSEROM_DATA 0x02
-#define AUTOLOAD_SIGN_FAIL 0x03
-#define AUTOLOAD_PROG_INTERRUPT 0x04
-#define AUTOLOAD_TWO_BIT_ERR 0x05
-#define PROGRAME_WR_P_SET 0x06
-#define PROGRAME_MNY_DATA_ITERTN 0x07
-#define PROGRAME_MNY_CNTR_ITERTN 0x08
-#define UN_PROGRAME_BIT_SET 0x09
-#define REDUNDANT_REPAIR_ROW 0x0A
-#define PROGRAME_MNY_CRA_ITERTN 0x0B
-#define PROGRAME_SAME_DATA 0x0C
-#define PROGRAME_CMP_SKIP 0x0D
-#define PROGRAME_ABORT 0x0E
-#define PROGRAME_INCORRECT_KEY 0x0F
-#define FUSEROM_LASTROW_STUCK 0x10
-#define AUTOLOAD_SINGLE_BIT_ERR 0x15
-#define DUMPWORD_TWO_BIT_ERR 0x16
-#define DUMPWORD_ONE_BIT_ERR 0x17
-#define SELF_TEST_ERROR 0x18
-
-#define INSTRUCTION_DONE 0x20
-
-/************** Efuse Instruction set ******************************************************/
-
-#define TEST_UNPROGRAME_ROM 0x01000000
-#define PROGRAME_CRA 0x02000000
-#define DUMP_WORD 0x04000000
-#define LOAD_FUSE_SCAN_CHAIN 0x05000000
-#define PROGRAME_DATA 0x07000000
-#define RUN_AUTOLOAD_8 0x08000000
-#define RUN_AUTOLOAD_A 0x0A000000
-
-#endif
-
-/* safety Init Interface Functions */
-void ccmSelfCheck(void);
-void ccmFail(unsigned int);
-
-void stcSelfCheck(void);
-void stcSelfCheckFail(void);
-void cpuSelfTest(unsigned int no_of_intervals, unsigned int max_timeout, boolean_t restart_test);
-void cpuSelfTestFail(void);
-
-void _memoryInit_(uint32_t);
-
-void pbistSelfCheck(void);
-void pbistRun(unsigned int, unsigned int);
-void pbistStop(void);
-void pbistSelfCheckFail(void);
-boolean_t pbistIsTestCompleted(void);
-boolean_t pbistIsTestPassed(void);
-boolean_t pbistPortTestStatus(uint32_t port);
-
-void efcCheck(void);
-void efcSelfTest(void);
-boolean_t efcStuckZeroTest(void);
-boolean_t checkefcSelfTest(void);
-void efcClass1Error(void);
-void efcClass2Error(void);
-
-void fmcBus2Check(void);
-void fmcECCcheck(void);
-void fmcClass1Error(void);
-void fmcClass2Error(void);
-
-void checkB0RAMECC(void);
-void checkB1RAMECC(void);
-void tcramClass1Error(void);
-void tcramClass2Error(void);
-
-void checkFlashECC(void);
-void flashClass1Error(void);
-void flashClass2Error(void);
-
-void vimParityCheck(void);
-void dmaParityCheck(void);
-void adc1ParityCheck(void);
-void adc2ParityCheck(void);
-void het1ParityCheck(void);
-void htu1ParityCheck(void);
-void het2ParityCheck(void);
-void htu2ParityCheck(void);
-void can1ParityCheck(void);
-void can2ParityCheck(void);
-void can3ParityCheck(void);
-void mibspi1ParityCheck(void);
-void mibspi3ParityCheck(void);
-void mibspi5ParityCheck(void);
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-#endif /* __SYS_SELFTEST_H__ */
+++ /dev/null
-/** @file sys_vim.h
-* @brief Vectored Interrupt Module Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - VIM Type Definitions
-* - VIM General Definitions
-* .
-* which are relevant for Vectored Interrupt Controller.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef __SYS_VIM_H__
-#define __SYS_VIM_H__
-
-#include "base.h"
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* VIM Type Definitions */
-
-/** @typedef t_isrFuncPTR
-* @brief ISR Function Pointer Type Definition
-*
-* This type is used to access the ISR handler.
-*/
-typedef void (*t_isrFuncPTR)();
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/* VIM General Configuration */
-
-#define VIM_CHANNELS 96U
-
-/* Interrupt Handlers */
-
-extern void phantomInterrupt(void);
-extern void esmHighInterrupt(void);
-extern void phantomInterrupt(void);
-//extern void vPortPreemptiveTick(void); // FreeRTOS 7.4.2
-extern void vPreemptiveTick(void); // FreeRTOS 7.0.2
-extern void linHighLevelInterrupt(void);
-extern void mibspi1HighLevelInterrupt(void);
-extern void adc1Group1Interrupt(void);
-extern void can1HighLevelInterrupt(void);
-extern void spi2HighLevelInterrupt(void);
-extern void mibspi1LowLevelInterrupt(void);
-extern void spi2LowLevelInterrupt(void);
-extern void can2HighLevelInterrupt(void);
-extern void mibspi3HighInterruptLevel(void);
-extern void mibspi3LowLevelInterrupt(void);
-extern void can3HighLevelInterrupt(void);
-extern void spi4HighLevelInterrupt(void);
-extern void adc2Group1Interrupt(void);
-extern void spi4LowLevelInterrupt(void);
-extern void sciHighLevelInterrupt(void);
-extern void i2cInterrupt(void);
-extern void EMACCore0RxIsr(void);
-extern void EMACCore0TxIsr(void);
-
-
-/* Vim Register Frame Definition */
-/** @struct vimBase
-* @brief Vim Register Frame Definition
-*
-* This type is used to access the Vim Registers.
-*/
-/** @typedef vimBASE_t
-* @brief VIM Register Frame Type Definition
-*
-* This type is used to access the VIM Registers.
-*/
-typedef volatile struct vimBase
-{
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t IRQIVEC : 8U; /* 0x0000 */
- uint32_t : 24U; /* 0x0000 */
- uint32_t FIQIVEC : 8U; /* 0x0004 */
- uint32_t : 24U; /* 0x0004 */
-#else
- uint32_t : 24U; /* 0x0000 */
- uint32_t IRQIVEC : 8U; /* 0x0000 */
- uint32_t : 24U; /* 0x0004 */
- uint32_t FIQIVEC : 8U; /* 0x0004 */
-#endif
- uint32_t : 32U; /* 0x0008 */
- uint32_t : 32U; /* 0x000C */
- uint32_t FIRQPR0; /* 0x0010 */
- uint32_t FIRQPR1; /* 0x0014 */
- uint32_t FIRQPR2; /* 0x0018 */
- uint32_t FIRQPR3; /* 0x001C */
- uint32_t INTREQ0; /* 0x0020 */
- uint32_t INTREQ1; /* 0x0024 */
- uint32_t INTREQ2; /* 0x0028 */
- uint32_t INTREQ3; /* 0x002C */
- uint32_t REQMASKSET0; /* 0x0030 */
- uint32_t REQMASKSET1; /* 0x0034 */
- uint32_t REQMASKSET2; /* 0x0038 */
- uint32_t REQMASKSET3; /* 0x003C */
- uint32_t REQMASKCLR0; /* 0x0040 */
- uint32_t REQMASKCLR1; /* 0x0044 */
- uint32_t REQMASKCLR2; /* 0x0048 */
- uint32_t REQMASKCLR3; /* 0x004C */
- uint32_t WAKEMASKSET0; /* 0x0050 */
- uint32_t WAKEMASKSET1; /* 0x0054 */
- uint32_t WAKEMASKSET2; /* 0x0058 */
- uint32_t WAKEMASKSET3; /* 0x005C */
- uint32_t WAKEMASKCLR0; /* 0x0060 */
- uint32_t WAKEMASKCLR1; /* 0x0064 */
- uint32_t WAKEMASKCLR2; /* 0x0068 */
- uint32_t WAKEMASKCLR3; /* 0x006C */
- uint32_t IRQVECREG; /* 0x0070 */
- uint32_t FIQVECREQ; /* 0x0074 */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t CAPEVTSRC0 : 7U; /* 0x0078 */
- uint32_t : 9U; /* 0x0078 */
- uint32_t CAPEVTSRC1 : 7U; /* 0x0078 */
- uint32_t : 9U; /* 0x0078 */
-#else
- uint32_t : 9U; /* 0x0078 */
- uint32_t CAPEVTSRC1 : 7U; /* 0x0078 */
- uint32_t : 9U; /* 0x0078 */
- uint32_t CAPEVTSRC0 : 7U; /* 0x0078 */
-#endif
- uint32_t : 32U; /* 0x007C */
- uint8_t CHANMAP[64U]; /* 0x0080-0x017C */
-} vimBASE_t;
-
-#define vimREG ((vimBASE_t *)0xFFFFFE00U)
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-#define VIM_PARFLG (*(unsigned int *)0xFFFFFDECU)
-#define VIM_PARCTL (*(unsigned int *)0xFFFFFDF0U)
-#define VIM_ADDERR (*(unsigned int *)0xFFFFFDF4U)
-#define VIM_FBPARERR (*(unsigned int *)0xFFFFFDF8U)
-
-#define VIMRAMPARLOC (*(unsigned int *)0xFFF82400U)
-#define VIMRAMLOC (*(unsigned int *)0xFFF82000U)
-
-#endif
+++ /dev/null
-/** @file system.h
-* @brief System Driver Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Definitions
-* - Types
-* .
-* which are relevant for the System driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef __SYS_SYSTEM_H__
-#define __SYS_SYSTEM_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* System General Definitions */
-
-/** @enum systemInterrupt
-* @brief Alias names for clock sources
-*
-* This enumeration is used to provide alias names for the clock sources:
-* - IRQ
-* - FIQ
-*/
-enum systemInterrupt
-{
- SYS_IRQ, /**< Alias for IRQ interrupt */
- SYS_FIQ /**< Alias for FIQ interrupt */
-};
-
-/** @enum systemClockSource
-* @brief Alias names for clock sources
-*
-* This enumeration is used to provide alias names for the clock sources:
-* - Oscillator
-* - Pll1
-* - External1
-* - Low Power Oscillator Low
-* - Low Power Oscillator High
-* - PLL2
-* - External2
-* - Synchronous VCLK1
-*/
-enum systemClockSource
-{
- SYS_OSC = 0, /**< Alias for oscillator clock Source */
- SYS_PLL1 = 1, /**< Alias for Pll1 clock Source */
- SYS_EXTERNAL1 = 3, /**< Alias for external clock Source */
- SYS_LPO_LOW = 4, /**< Alias for low power oscillator low clock Source */
- SYS_LPO_HIGH = 5, /**< Alias for low power oscillator high clock Source */
- SYS_PLL2 = 6, /**< Alias for Pll2 clock Source */
- SYS_EXTERNAL2 = 7, /**< Alias for external 2 clock Source */
- SYS_VCLK = 9 /**< Alias for synchronous VCLK1 clock Source */
-};
-
-#define SYS_DOZE_MODE 0x000F3F02U
-#define SYS_SNOOZE_MODE 0x000F3F03U
-#define SYS_SLEEP_MODE 0x000FFFFFU
-#define LPO_TRIM_VALUE (((*(uint32_t *)0xF00801B4U) & 0xFFFF0000)>>16)
-#define SYS_EXCEPTION (*(uint32_t *)0xFFFFFFE4U)
-
-#define POWERON_RESET 0x8000
-#define OSC_FAILURE_RESET 0x4000
-#define WATCHDOG_RESET 0x2000
-#define ICEPICK_RESET 0x2000
-#define CPU_RESET 0x0020
-#define SW_RESET 0x0010
-
-#define WATCHDOG_STATUS (*(uint32_t *)0xFFFFFC98U)
-#define DEVICE_ID_REV (*(uint32_t *)0xFFFFFFF0U)
-
-/** @def OSC_FREQ
-* @brief Oscillator clock source exported from HALCoGen GUI
-*
-* Oscillator clock source exported from HALCoGen GUI
-*/
-#define OSC_FREQ 16.0
-
-/** @def PLL1_FREQ
-* @brief PLL 1 clock source exported from HALCoGen GUI
-*
-* PLL 1 clock source exported from HALCoGen GUI
-*/
-#define PLL1_FREQ 160.00
-
-/** @def LPO_LF_FREQ
-* @brief LPO Low Freq Oscillator source exported from HALCoGen GUI
-*
-* LPO Low Freq Oscillator source exported from HALCoGen GUI
-*/
-#define LPO_LF_FREQ 0.080
-
-/** @def LPO_HF_FREQ
-* @brief LPO High Freq Oscillator source exported from HALCoGen GUI
-*
-* LPO High Freq Oscillator source exported from HALCoGen GUI
-*/
-#define LPO_HF_FREQ 10.000
-
-/** @def PLL1_FREQ
-* @brief PLL 2 clock source exported from HALCoGen GUI
-*
-* PLL 2 clock source exported from HALCoGen GUI
-*/
-#define PLL2_FREQ 160.00
-
-/** @def GCLK_FREQ
-* @brief GCLK domain frequency exported from HALCoGen GUI
-*
-* GCLK domain frequency exported from HALCoGen GUI
-*/
-#define GCLK_FREQ 160.000
-
-/** @def HCLK_FREQ
-* @brief HCLK domain frequency exported from HALCoGen GUI
-*
-* HCLK domain frequency exported from HALCoGen GUI
-*/
-#define HCLK_FREQ 160.000
-
-/** @def RTI_FREQ
-* @brief RTI Clock frequency exported from HALCoGen GUI
-*
-* RTI Clock frequency exported from HALCoGen GUI
-*/
-#define RTI_FREQ 80.000
-
-/** @def AVCLK1_FREQ
-* @brief AVCLK1 Domain frequency exported from HALCoGen GUI
-*
-* AVCLK Domain frequency exported from HALCoGen GUI
-*/
-#define AVCLK1_FREQ 80.000
-
-/** @def AVCLK2_FREQ
-* @brief AVCLK2 Domain frequency exported from HALCoGen GUI
-*
-* AVCLK2 Domain frequency exported from HALCoGen GUI
-*/
-#define AVCLK2_FREQ 80.000
-
-/** @def AVCLK3_FREQ
-* @brief AVCLK3 Domain frequency exported from HALCoGen GUI
-*
-* AVCLK3 Domain frequency exported from HALCoGen GUI
-*/
-#define AVCLK3_FREQ 80.000
-
-/** @def VCLK1_FREQ
-* @brief VCLK1 Domain frequency exported from HALCoGen GUI
-*
-* VCLK1 Domain frequency exported from HALCoGen GUI
-*/
-#define VCLK1_FREQ 80.000
-
-/** @def VCLK2_FREQ
-* @brief VCLK2 Domain frequency exported from HALCoGen GUI
-*
-* VCLK2 Domain frequency exported from HALCoGen GUI
-*/
-#define VCLK2_FREQ 80.000
-
-
-/** @def SYS_PRE1
-* @brief Alias name for RTI1CLK PRE clock source
-*
-* This is an alias name for the RTI1CLK pre clock source.
-* This can be either:
-* - Oscillator
-* - Pll
-* - 32 kHz Oscillator
-* - External
-* - Low Power Oscillator Low
-* - Low Power Oscillator High
-* - Flexray Pll
-*/
-#define SYS_PRE1 SYS_PLL1
-
-/** @def SYS_PRE2
-* @brief Alias name for RTI2CLK pre clock source
-*
-* This is an alias name for the RTI2CLK pre clock source.
-* This can be either:
-* - Oscillator
-* - Pll
-* - 32 kHz Oscillator
-* - External
-* - Low Power Oscillator Low
-* - Low Power Oscillator High
-* - Flexray Pll
-*/
-#define SYS_PRE2 SYS_PLL1
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/* System Register Frame 1 Definition */
-/** @struct systemBase1
-* @brief System Register Frame 1 Definition
-*
-* This type is used to access the System 1 Registers.
-*/
-/** @typedef systemBASE1_t
-* @brief System Register Frame 1 Type Definition
-*
-* This type is used to access the System 1 Registers.
-*/
-typedef volatile struct systemBase1
-{
- uint32_t SYSPC1; /* 0x0000 */
- uint32_t SYSPC2; /* 0x0004 */
- uint32_t SYSPC3; /* 0x0008 */
- uint32_t SYSPC4; /* 0x000C */
- uint32_t SYSPC5; /* 0x0010 */
- uint32_t SYSPC6; /* 0x0014 */
- uint32_t SYSPC7; /* 0x0018 */
- uint32_t SYSPC8; /* 0x001C */
- uint32_t SYSPC9; /* 0x0020 */
- uint32_t SSWPLL1; /* 0x0024 */
- uint32_t SSWPLL2; /* 0x0028 */
- uint32_t SSWPLL3; /* 0x002C */
- uint32_t CSDIS; /* 0x0030 */
- uint32_t CSDISSET; /* 0x0034 */
- uint32_t CSDISCLR; /* 0x0038 */
- uint32_t CDDIS; /* 0x003C */
- uint32_t CDDISSET; /* 0x0040 */
- uint32_t CDDISCLR; /* 0x0044 */
- uint32_t GHVSRC; /* 0x0048 */
- uint32_t VCLKASRC; /* 0x004C */
- uint32_t RCLKSRC; /* 0x0050 */
- uint32_t CSVSTAT; /* 0x0054 */
- uint32_t MSTGCR; /* 0x0058 */
- uint32_t MINITGCR; /* 0x005C */
- uint32_t MSINENA; /* 0x0060 */
- uint32_t MSTFAIL; /* 0x0064 */
- uint32_t MSTCGSTAT; /* 0x0068 */
- uint32_t MINISTAT; /* 0x006C */
- uint32_t PLLCTL1; /* 0x0070 */
- uint32_t PLLCTL2; /* 0x0074 */
- uint32_t UERFLAG; /* 0x0078 */
- uint32_t DIEIDL; /* 0x007C */
- uint32_t DIEIDH; /* 0x0080 */
- uint32_t VRCTL; /* 0x0084 */
- uint32_t LPOMONCTL; /* 0x0088 */
- uint32_t CLKTEST; /* 0x008C */
- uint32_t DFTCTRLREG1; /* 0x0090 */
- uint32_t DFTCTRLREG2; /* 0x0094 */
- uint32_t : 32U; /* 0x0098 */
- uint32_t : 32U; /* 0x009C */
- uint32_t GPREG1; /* 0x00A0 */
- uint32_t BTRMSEL; /* 0x00A4 */
- uint32_t IMPFASTS; /* 0x00A8 */
- uint32_t IMPFTADD; /* 0x00AC */
- uint32_t SSISR1; /* 0x00B0 */
- uint32_t SSISR2; /* 0x00B4 */
- uint32_t SSISR3; /* 0x00B8 */
- uint32_t SSISR4; /* 0x00BC */
- uint32_t RAMGCR; /* 0x00C0 */
- uint32_t BMMCR1; /* 0x00C4 */
- uint32_t BMMCR2; /* 0x00C8 */
- uint32_t MMUGCR; /* 0x00CC */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t : 8U; /* 0x00D0 */
- uint32_t PENA : 1U; /* 0x00D0 */
- uint32_t : 7U; /* 0x00D0 */
- uint32_t VCLKR : 4U; /* 0x00D0 */
- uint32_t : 4U; /* 0x00D0 */
- uint32_t VCLK2R : 4U; /* 0x00D0 */
- uint32_t : 4U; /* 0x00D0 */
-#else
- uint32_t : 4U; /* 0x00D0 */
- uint32_t VCLK2R : 4U; /* 0x00D0 */
- uint32_t : 4U; /* 0x00D0 */
- uint32_t VCLKR : 4U; /* 0x00D0 */
- uint32_t : 7U; /* 0x00D0 */
- uint32_t PENA : 1U; /* 0x00D0 */
- uint32_t : 8U; /* 0x00D0 */
-#endif
- uint32_t ECPCNTL; /* 0x00D4 */
- uint32_t DSPGCR; /* 0x00D8 */
- uint32_t DEVCR1; /* 0x00DC */
- uint32_t SYSECR; /* 0x00E0 */
- uint32_t SYSESR; /* 0x00E4 */
- uint32_t SYSTASR; /* 0x00E8 */
- uint32_t GBLSTAT; /* 0x00EC */
- uint32_t DEV; /* 0x00F0 */
- uint32_t SSIVEC; /* 0x00F4 */
- uint32_t SSIF; /* 0x00F8 */
- uint32_t SSIR1; /* 0x00FC */
-} systemBASE1_t;
-
-
-/** @def systemREG1
-* @brief System Register Frame 1 Pointer
-*
-* This pointer is used by the system driver to access the system frame 1 registers.
-*/
-#define systemREG1 ((systemBASE1_t *)0xFFFFFF00U)
-
-/** @def systemPORT
-* @brief ECLK GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of System/Eclk
-* (use the GIO drivers to access the port pins).
-*/
-#define systemPORT ((gioPORT_t *)0xFFFFFF04U)
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-
-/* System Register Frame 2 Definition */
-/** @struct systemBase2
-* @brief System Register Frame 2 Definition
-*
-* This type is used to access the System 2 Registers.
-*/
-/** @typedef systemBASE2_t
-* @brief System Register Frame 2 Type Definition
-*
-* This type is used to access the System 2 Registers.
-*/
-typedef volatile struct systemBase2
-{
- uint32_t PLLCTL3; /* 0x0000 */
- uint32_t : 32U; /* 0x0004 */
- uint32_t STCCLKDIV; /* 0x0008 */
- uint32_t : 32U; /* 0x000C */
- uint32_t : 32U; /* 0x0010 */
- uint32_t : 32U; /* 0x0014 */
- uint32_t : 32U; /* 0x0018 */
- uint32_t : 32U; /* 0x001C */
- uint32_t : 32U; /* 0x0020 */
- uint32_t ECPCNTRL0; /* 0x0024 */
- uint32_t : 32U; /* 0x0028 */
- uint32_t : 32U; /* 0x002C */
- uint32_t : 32U; /* 0x0030 */
- uint32_t : 32U; /* 0x0034 */
- uint32_t : 32U; /* 0x0038 */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t VCLK3R : 4U; /* 0x003C */
- uint32_t : 4U; /* 0x003C */
- uint32_t VCLK4R : 4U; /* 0x003C */
- uint32_t : 20U; /* 0x003C */
-#else
- uint32_t : 20U; /* 0x003C */
- uint32_t VCLK4R : 4U; /* 0x003C */
- uint32_t : 4U; /* 0x003C */
- uint32_t VCLK3R : 4U; /* 0x003C */
-#endif
- uint32_t VCLKACON1; /* 0x0040 */
- uint32_t : 32U; /* 0x0044 */
- uint32_t : 32U; /* 0x0048*/
- uint32_t : 32U; /* 0x004C */
- uint32_t : 32U; /* 0x0050 */
- uint32_t : 32U; /* 0x0054 */
- uint32_t : 32U; /* 0x0058 */
- uint32_t : 32U; /* 0x005C */
- uint32_t : 32U; /* 0x0060 */
- uint32_t : 32U; /* 0x0064 */
- uint32_t : 32U; /* 0x0068 */
- uint32_t : 32U; /* 0x006C */
- uint32_t CLKSLIP; /* 0x0070 */
- uint32_t : 32U; /* 0x0074 */
- uint32_t : 32U; /* 0x0078*/
- uint32_t : 32U; /* 0x007C */
- uint32_t : 32U; /* 0x0080 */
- uint32_t : 32U; /* 0x0084 */
- uint32_t : 32U; /* 0x0088 */
- uint32_t : 32U; /* 0x008C */
- uint32_t : 32U; /* 0x0090 */
- uint32_t : 32U; /* 0x0094 */
- uint32_t : 32U; /* 0x0098 */
- uint32_t : 32U; /* 0x009C */
- uint32_t : 32U; /* 0x00A0 */
- uint32_t : 32U; /* 0x00A4 */
- uint32_t : 32U; /* 0x00A8 */
- uint32_t : 32U; /* 0x00AC */
- uint32_t : 32U; /* 0x00B0 */
- uint32_t : 32U; /* 0x00B4 */
- uint32_t : 32U; /* 0x00B8 */
- uint32_t : 32U; /* 0x00BC */
- uint32_t : 32U; /* 0x00C0 */
- uint32_t : 32U; /* 0x00C4 */
- uint32_t : 32U; /* 0x00C8 */
- uint32_t : 32U; /* 0x00CC */
- uint32_t : 32U; /* 0x00D0 */
- uint32_t : 32U; /* 0x00D4 */
- uint32_t : 32U; /* 0x00D8 */
- uint32_t : 32U; /* 0x00DC */
- uint32_t : 32U; /* 0x00E0 */
- uint32_t : 32U; /* 0x00E4 */
- uint32_t : 32U; /* 0x00E8 */
- uint32_t EFC_CTLEN; /* 0x00EC */
- uint32_t DIEIDL_REG0; /* 0x00F0 */
- uint32_t DIEIDH_REG1; /* 0x00F4 */
- uint32_t DIEIDL_REG2; /* 0x00F8 */
- uint32_t DIEIDH_REG3; /* 0x00FC */
-} systemBASE2_t;
-
-
-/** @def systemREG2
-* @brief System Register Frame 2 Pointer
-*
-* This pointer is used by the system driver to access the system frame 2 registers.
-*/
-#define systemREG2 ((systemBASE2_t *)0xFFFFE100U)
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-
-/** @struct pcrBase
-* @brief Pcr Register Frame Definition
-*
-* This type is used to access the Pcr Registers.
-*/
-/** @typedef pcrBASE_t
-* @brief PCR Register Frame Type Definition
-*
-* This type is used to access the PCR Registers.
-*/
-typedef volatile struct pcrBase
-{
- uint32_t PMPROTSET0; /* 0x0000 */
- uint32_t PMPROTSET1; /* 0x0004 */
- uint32_t : 32U; /* 0x0008 */
- uint32_t : 32U; /* 0x000C */
- uint32_t PMPROTCLR0; /* 0x0010 */
- uint32_t PMPROTCLR1; /* 0x0014 */
- uint32_t : 32U; /* 0x0018 */
- uint32_t : 32U; /* 0x001C */
- uint32_t PPROTSET0; /* 0x0020 */
- uint32_t PPROTSET1; /* 0x0024 */
- uint32_t PPROTSET2; /* 0x0028 */
- uint32_t PPROTSET3; /* 0x002C */
- uint32_t : 32U; /* 0x0030 */
- uint32_t : 32U; /* 0x0034 */
- uint32_t : 32U; /* 0x0038 */
- uint32_t : 32U; /* 0x003C */
- uint32_t PPROTCLR0; /* 0x0040 */
- uint32_t PPROTCLR1; /* 0x0044 */
- uint32_t PPROTCLR2; /* 0x0048 */
- uint32_t PPROTCLR3; /* 0x004C */
- uint32_t : 32U; /* 0x0050 */
- uint32_t : 32U; /* 0x0054 */
- uint32_t : 32U; /* 0x0058 */
- uint32_t : 32U; /* 0x005C */
- uint32_t PCSPWRDWNSET0; /* 0x0060 */
- uint32_t PCSPWRDWNSET1; /* 0x0064 */
- uint32_t : 32U; /* 0x0068 */
- uint32_t : 32U; /* 0x006C */
- uint32_t PCSPWRDWNCLR0; /* 0x0070 */
- uint32_t PCSPWRDWNCLR1; /* 0x0074 */
- uint32_t : 32U; /* 0x0078 */
- uint32_t : 32U; /* 0x007C */
- uint32_t PSPWRDWNSET0; /* 0x0080 */
- uint32_t PSPWRDWNSET1; /* 0x0084 */
- uint32_t PSPWRDWNSET2; /* 0x0088 */
- uint32_t PSPWRDWNSET3; /* 0x008C */
- uint32_t : 32U; /* 0x0090 */
- uint32_t : 32U; /* 0x0094 */
- uint32_t : 32U; /* 0x0098 */
- uint32_t : 32U; /* 0x009C */
- uint32_t PSPWRDWNCLR0; /* 0x00A0 */
- uint32_t PSPWRDWNCLR1; /* 0x00A4 */
- uint32_t PSPWRDWNCLR2; /* 0x00A8 */
- uint32_t PSPWRDWNCLR3; /* 0x00AC */
-} pcrBASE_t;
-
-/** @def pcrREG
-* @brief Pcr Register Frame Pointer
-*
-* This pointer is used by the system driver to access the Pcr registers.
-*/
-#define pcrREG ((pcrBASE_t *)0xFFFFE000U)
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
-
-/* FlashW General Definitions */
-
-
-/** @enum flashWPowerModes
-* @brief Alias names for flash bank power modes
-*
-* This enumeration is used to provide alias names for the flash bank power modes:
-* - sleep
-* - standby
-* - active
-*/
-enum flashWPowerModes
-{
- SYS_SLEEP = 0U, /**< Alias for flash bank power mode sleep */
- SYS_STANDBY = 1U, /**< Alias for flash bank power mode standby */
- SYS_ACTIVE = 3U /**< Alias for flash bank power mode active */
-};
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-
-
-/** @struct flashWBase
-* @brief Flash Wrapper Register Frame Definition
-*
-* This type is used to access the Flash Wrapper Registers.
-*/
-/** @typedef flashWBASE_t
-* @brief Flash Wrapper Register Frame Type Definition
-*
-* This type is used to access the Flash Wrapper Registers.
-*/
-typedef volatile struct flashWBase
-{
- uint32_t FRDCNTL; /* 0x0000 */
- uint32_t FSPRD; /* 0x0004 */
- uint32_t FEDACCTRL1; /* 0x0008 */
- uint32_t FEDACCTRL2; /* 0x000C */
- uint32_t FCORERRCNT; /* 0x0010 */
- uint32_t FCORERRADD; /* 0x0014 */
- uint32_t FCORERRPOS; /* 0x0018 */
- uint32_t FEDACSTATUS; /* 0x001C */
- uint32_t FUNCERRADD; /* 0x0020 */
- uint32_t FEDACSDIS; /* 0x0024 */
- uint32_t FPRIMADDTAG; /* 0x0028 */
- uint32_t FREDUADDTAG; /* 0x002C */
- uint32_t FBPROT; /* 0x0030 */
- uint32_t FBSE; /* 0x0034 */
- uint32_t FBBUSY; /* 0x0038 */
- uint32_t FBAC; /* 0x003C */
- uint32_t FBFALLBACK; /* 0x0040 */
- uint32_t FBPRDY; /* 0x0044 */
- uint32_t FPAC1; /* 0x0048 */
- uint32_t FPAC2; /* 0x004C */
- uint32_t FMAC; /* 0x0050 */
- uint32_t FMSTAT; /* 0x0054 */
- uint32_t FEMUDMSW; /* 0x0058 */
- uint32_t FEMUDLSW; /* 0x005C */
- uint32_t FEMUECC; /* 0x0060 */
- uint32_t FLOCK; /* 0x0064 */
- uint32_t FEMUADDR; /* 0x0068 */
- uint32_t FDIAGCTRL; /* 0x006C */
- uint32_t FRAWDATAH; /* 0x0070 */
- uint32_t FRAWDATAL; /* 0x0074 */
- uint32_t FRAWECC; /* 0x0078 */
- uint32_t FPAROVR; /* 0x007C */
- uint32_t FVREADCT; /* 0x0080 */
- uint32_t FVHVCT1; /* 0x0084 */
- uint32_t FVHVCT2; /* 0x0088 */
- uint32_t FVNVCT; /* 0x008C */
- uint32_t FVPPCT; /* 0x0090 */
- uint32_t FVWLCT; /* 0x0094 */
- uint32_t FEFUSE; /* 0x0098 */
- uint32_t : 32U; /* 0x009C */
- uint32_t : 32U; /* 0x00A0 */
- uint32_t : 32U; /* 0x00A4 */
- uint32_t : 32U; /* 0x00A8 */
- uint32_t : 32U; /* 0x00AC */
- uint32_t : 32U; /* 0x00B0 */
- uint32_t : 32U; /* 0x00B4 */
- uint32_t : 32U; /* 0x00B8 */
- uint32_t : 32U; /* 0x00BC */
- uint32_t FEDACSDIS2; /* 0x00C0 */
- uint32_t : 32U; /* 0x00C4 */
- uint32_t : 32U; /* 0x00C8 */
- uint32_t : 32U; /* 0x00CC */
- uint32_t : 32U; /* 0x00D0 */
- uint32_t : 32U; /* 0x00D4 */
- uint32_t : 32U; /* 0x00D8 */
- uint32_t : 32U; /* 0x00DC */
- uint32_t : 32U; /* 0x00E0 */
- uint32_t : 32U; /* 0x00E4 */
- uint32_t : 32U; /* 0x00E8 */
- uint32_t : 32U; /* 0x00EC */
- uint32_t : 32U; /* 0x00F0 */
- uint32_t : 32U; /* 0x00F4 */
- uint32_t : 32U; /* 0x00F8 */
- uint32_t : 32U; /* 0x00FC */
- uint32_t FBSTROBES; /* 0x0100 */
- uint32_t FPSTROBES; /* 0x0104 */
- uint32_t FBMODE; /* 0x0108 */
- uint32_t FTCR; /* 0x010C */
- uint32_t FADDR; /* 0x0110 */
- uint32_t FWRITE; /* 0x0114 */
- uint32_t FCBITSEL; /* 0x0118 */
- uint32_t FTCTRL; /* 0x011C */
- uint32_t FWPWRITE0; /* 0x0120 */
- uint32_t FWPWRITE1; /* 0x0124 */
- uint32_t FWPWRITE2; /* 0x0128 */
- uint32_t FWPWRITE3; /* 0x012C */
- uint32_t FWPWRITE4; /* 0x0130 */
-} flashWBASE_t;
-
-/** @def flashWREG
-* @brief Flash Wrapper Register Frame Pointer
-*
-* This pointer is used by the system driver to access the flash wrapper registers.
-*/
-#define flashWREG ((flashWBASE_t *)(0xFFF87000U))
-
-#define FSM_WR_ENA (*(unsigned int *)0xFFF87288U)
-#define EEPROM_CONFIG (*(unsigned int *)0xFFF872B8U)
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
-
-/* System Interface Functions */
-void systemInit(void);
-void systemPowerDown(uint32_t mode);
-
-
-/** @struct tcramBase
-* @brief TCRAM Wrapper Register Frame Definition
-*
-* This type is used to access the TCRAM Wrapper Registers.
-*/
-/** @typedef tcramBASE_t
-* @brief TCRAM Wrapper Register Frame Type Definition
-*
-* This type is used to access the TCRAM Wrapper Registers.
-*/
-
-typedef volatile struct tcramBase
-{
- uint32_t RAMCTRL; /* 0x0000 */
- uint32_t RAMTHRESHOLD; /* 0x0004 */
- uint32_t RAMOCCUR; /* 0x0008 */
- uint32_t RAMINTCTRL; /* 0x000C */
- uint32_t RAMERRSTATUS; /* 0x0010 */
- uint32_t RAMSERRADDR; /* 0x0014 */
- uint32_t : 32U; /* 0x0018 */
- uint32_t RAMUERRADDR; /* 0x001C */
- uint32_t : 32U; /* 0x0020 */
- uint32_t : 32U; /* 0x0024 */
- uint32_t : 32U; /* 0x0028 */
- uint32_t : 32U; /* 0x002C */
- uint32_t RAMTEST; /* 0x0030 */
- uint32_t : 32U; /* 0x0034 */
- uint32_t RAMADDRDECVECT; /* 0x0038 */
- uint32_t RAMPERADDR; /* 0x003C */
-} tcramBASE_t;
-
-#define tcram1REG ((tcramBASE_t *)(0xFFFFF800))
-#define tcram2REG ((tcramBASE_t *)(0xFFFFF900))
-
-
-#endif
+++ /dev/null
-/** @file adc.h
-* @brief ADC Driver Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Definitions
-* - Types
-* - Interface Prototypes
-* .
-* which are relevant for the ADC driver.
-*/
-
-#include "base.h"
-
-#ifndef __ADC_H__
-#define __ADC_H__
-
-/* ADC General Definitions */
-
-/** @def adcGROUP0
-* @brief Alias name for ADC event group
-*
-* @note This value should be used for API argument @a group
-*/
-#define adcGROUP0 0U
-
-/** @def adcGROUP1
-* @brief Alias name for ADC group 1
-*
-* @note This value should be used for API argument @a group
-*/
-#define adcGROUP1 1U
-
-/** @def adcGROUP2
-* @brief Alias name for ADC group 2
-*
-* @note This value should be used for API argument @a group
-*/
-#define adcGROUP2 2U
-
-/** @enum adcResolution
-* @brief Alias names for data resolution
-* This enumeration is used to provide alias names for the data resolution:
-* - 12 bit resolution
-* - 10 bit resolution
-* - 8 bit resolution
-*/
-
-enum adcResolution
-{
- ADC_12_BIT = 0x00000000, /**< Alias for 12 bit data resolution */
- ADC_10_BIT = 0x00000100, /**< Alias for 10 bit data resolution */
- ADC_8_BIT = 0x00000200 /**< Alias for 8 bit data resolution */
-};
-
-/** @enum adcFiFoStatus
-* @brief Alias names for FiFo status
-* This enumeration is used to provide alias names for the current FiFo states:
-* - FiFo is not full
-* - FiFo is full
-* - FiFo overflow occured
-*/
-
-enum adcFiFoStatus
-{
- ADC_FIFO_IS_NOT_FULL = 0, /**< Alias for FiFo is not full */
- ADC_FIFO_IS_FULL = 1, /**< Alias for FiFo is full */
- ADC_FIFO_OVERFLOW = 3 /**< Alias for FiFo overflow occured */
-};
-
-/** @enum adcConversionStatus
-* @brief Alias names for conversion status
-* This enumeration is used to provide alias names for the current conversion states:
-* - Conversion is not finished
-* - Conversion is finished
-*/
-
-enum adcConversionStatus
-{
- ADC_CONVERSION_IS_NOT_FINISHED = 0, /**< Alias for current conversion is not finished */
- ADC_CONVERSION_IS_FINISHED = 8 /**< Alias for current conversion is finished */
-};
-
-/** @enum adc1HwTriggerSource
-* @brief Alias names for hardware trigger source
-* This enumeration is used to provide alias names for the hardware trigger sources:
-*/
-
-enum adc1HwTriggerSource
-{
- ADC1_EVENT = 0, /**< Alias for event pin */
- ADC1_HET1_8 = 1, /**< Alias for HET1 pin 8 */
- ADC1_HET1_10 = 2, /**< Alias for HET1 pin 10 */
- ADC1_RTI_COMP0 = 3, /**< Alias for RTI compare 0 match */
- ADC1_HET1_12 = 4, /**< Alias for HET1 pin 12 */
- ADC1_HET1_14 = 5, /**< Alias for HET1 pin 14 */
- ADC1_GIOB0 = 6, /**< Alias for GIO port b pin 0 */
- ADC1_GIOB1 = 7, /**< Alias for GIO port b pin 1 */
-
- ADC1_HET2_5 = 1, /**< Alias for HET2 pin 5 */
- ADC1_HET1_27 = 2, /**< Alias for HET1 pin 27 */
- ADC1_HET1_17 = 4, /**< Alias for HET1 pin 17 */
- ADC1_HET1_19 = 5, /**< Alias for HET1 pin 19 */
- ADC1_HET1_11 = 6, /**< Alias for HET1 pin 11 */
- ADC1_HET2_13 = 7, /**< Alias for HET2 pin 13 */
-
- ADC1_EPWM_B = 1, /**< Alias for B Signal EPWM */
- ADC1_EPWM_A1 = 3, /**< Alias for A1 Signal EPWM */
- ADC1_HET2_1 = 5, /**< Alias for HET2 pin 1 */
- ADC1_EPWM_A2 = 6, /**< Alias for A2 Signal EPWM */
- ADC1_EPWM_AB = 7 /**< Alias for AB Signal EPWM */
-
-};
-
-/** @enum adc2HwTriggerSource
-* @brief Alias names for hardware trigger source
-* This enumeration is used to provide alias names for the hardware trigger sources:
-*/
-
-enum adc2HwTriggerSource
-{
- ADC2_EVENT = 0, /**< Alias for event pin */
- ADC2_HET1_8 = 1, /**< Alias for HET1 pin 8 */
- ADC2_HET1_10 = 2, /**< Alias for HET1 pin 10 */
- ADC2_RTI_COMP0 = 3, /**< Alias for RTI compare 0 match */
- ADC2_HET1_12 = 4, /**< Alias for HET1 pin 12 */
- ADC2_HET1_14 = 5, /**< Alias for HET1 pin 14 */
- ADC2_GIOB0 = 6, /**< Alias for GIO port b pin 0 */
- ADC2_GIOB1 = 7, /**< Alias for GIO port b pin 1 */
- ADC2_HET2_5 = 1, /**< Alias for HET2 pin 5 */
- ADC2_HET1_27 = 2, /**< Alias for HET1 pin 27 */
- ADC2_HET1_17 = 4, /**< Alias for HET1 pin 17 */
- ADC2_HET1_19 = 5, /**< Alias for HET1 pin 19 */
- ADC2_HET1_11 = 6, /**< Alias for HET1 pin 11 */
- ADC2_HET2_13 = 7, /**< Alias for HET2 pin 13 */
-
- ADC2_EPWM_B = 1, /**< Alias for B Signal EPWM */
- ADC2_EPWM_A1 = 3, /**< Alias for A1 Signal EPWM */
- ADC2_HET2_1 = 5, /**< Alias for HET2 pin 1 */
- ADC2_EPWM_A2 = 6, /**< Alias for A2 Signal EPWM */
- ADC2_EPWM_AB = 7 /**< Alias for AB Signal EPWM */
-
-};
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @struct adcData
-* @brief ADC Conversion data structure
-*
-* This type is used to pass adc conversion data.
-*/
-/** @typedef adcData_t
-* @brief ADC Data Type Definition
-*/
-typedef struct adcData
-{
- uint32_t id; /**< Channel/Pin Id */
- uint16_t value; /**< Conversion data value */
-} adcData_t;
-
-/** @struct adcBase
-* @brief ADC Register Frame Definition
-*
-* This type is used to access the ADC Registers.
-*/
-/** @typedef adcBASE_t
-* @brief ADC Register Frame Type Definition
-*
-* This type is used to access the ADC Registers.
-*/
-typedef volatile struct adcBase
-{
- uint32_t RSTCR; /**< 0x0000: Reset control register */
- uint32_t OPMODECR; /**< 0x0004: Operating mode control register */
- uint32_t CLOCKCR; /**< 0x0008: Clock control register */
- uint32_t CALCR; /**< 0x000C: Calibration control register */
- uint32_t GxMODECR[3U]; /**< 0x0010,0x0014,0x0018: Group 0-2 mode control register */
- uint32_t G0SRC; /**< 0x001C: Group 0 trigger source control register */
- uint32_t G1SRC; /**< 0x0020: Group 1 trigger source control register */
- uint32_t G2SRC; /**< 0x0024: Group 2 trigger source control register */
- uint32_t GxINTENA[3U]; /**< 0x0028,0x002C,0x0030: Group 0-2 interrupt enable register */
- uint32_t GxINTFLG[3U]; /**< 0x0034,0x0038,0x003C: Group 0-2 interrupt flag register */
- uint32_t GxINTCR[3U]; /**< 0x0040-0x0048: Group 0-2 interrupt threshold register */
- uint32_t G0DMACR; /**< 0x004C: Group 0 DMA control register */
- uint32_t G1DMACR; /**< 0x0050: Group 1 DMA control register */
- uint32_t G2DMACR; /**< 0x0054: Group 2 DMA control register */
- uint32_t BNDCR; /**< 0x0058: Buffer boundary control register */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t BNDEND : 16U; /**< 0x005C: Buffer boundary end register */
- uint32_t BUFINIT : 16U; /**< 0x005C: Buffer initialization register */
-#else
- uint32_t BUFINIT : 16U; /**< 0x005C: Buffer initialization register */
- uint32_t BNDEND : 16U; /**< 0x005C: Buffer boundary end register */
-#endif
- uint32_t G0SAMP; /**< 0x0060: Group 0 sample window register */
- uint32_t G1SAMP; /**< 0x0064: Group 1 sample window register */
- uint32_t G2SAMP; /**< 0x0068: Group 2 sample window register */
- uint32_t G0SR; /**< 0x006C: Group 0 status register */
- uint32_t G1SR; /**< 0x0070: Group 1 status register */
- uint32_t G2SR; /**< 0x0074: Group 2 status register */
- uint32_t GxSEL[3U]; /**< 0x0078-0x007C: Group 0-2 channel select register */
- uint32_t CALR; /**< 0x0084: Calibration register */
- uint32_t SMSTATE; /**< 0x0088: State machine state register */
- uint32_t LASTCONV; /**< 0x008C: Last conversion register */
- struct
- {
- uint32_t BUF0; /**< 0x0090,0x00B0,0x00D0: Group 0-2 result buffer 1 register */
- uint32_t BUF1; /**< 0x0094,0x00B4,0x00D4: Group 0-2 result buffer 1 register */
- uint32_t BUF2; /**< 0x0098,0x00B8,0x00D8: Group 0-2 result buffer 2 register */
- uint32_t BUF3; /**< 0x009C,0x00BC,0x00DC: Group 0-2 result buffer 3 register */
- uint32_t BUF4; /**< 0x00A0,0x00C0,0x00E0: Group 0-2 result buffer 4 register */
- uint32_t BUF5; /**< 0x00A4,0x00C4,0x00E4: Group 0-2 result buffer 5 register */
- uint32_t BUF6; /**< 0x00A8,0x00C8,0x00E8: Group 0-2 result buffer 6 register */
- uint32_t BUF7; /**< 0x00AC,0x00CC,0x00EC: Group 0-2 result buffer 7 register */
- } GxBUF[3U];
- uint32_t G0EMUBUFFER; /**< 0x00F0: Group 0 emulation result buffer */
- uint32_t G1EMUBUFFER; /**< 0x00F4: Group 1 emulation result buffer */
- uint32_t G2EMUBUFFER; /**< 0x00F8: Group 2 emulation result buffer */
- uint32_t EVTDIR; /**< 0x00FC: Event pin direction register */
- uint32_t EVTOUT; /**< 0x0100: Event pin digital output register */
- uint32_t EVTIN; /**< 0x0104: Event pin digital input register */
- uint32_t EVTSET; /**< 0x0108: Event pin set register */
- uint32_t EVTCLR; /**< 0x010C: Event pin clear register */
- uint32_t EVTPDR; /**< 0x0110: Event pin open drain register */
- uint32_t EVTDIS; /**< 0x0114: Event pin pull disable register */
- uint32_t EVTPSEL; /**< 0x0118: Event pin pull select register */
- uint32_t G0SAMPDISEN; /**< 0x011C: Group 0 sample discharge register */
- uint32_t G1SAMPDISEN; /**< 0x0120: Group 1 sample discharge register */
- uint32_t G2SAMPDISEN; /**< 0x0124: Group 2 sample discharge register */
- uint32_t MAGINTCR1; /**< 0x0128: Magnitude interrupt control register 1 */
- uint32_t MAGINT1MASK; /**< 0x012C: Magnitude interrupt mask register 1 */
- uint32_t MAGINTCR2; /**< 0x0130: Magnitude interrupt control register 2 */
- uint32_t MAGINT2MASK; /**< 0x0134: Magnitude interrupt mask register 2 */
- uint32_t MAGINTCR3; /**< 0x0138: Magnitude interrupt control register 3 */
- uint32_t MAGINT3MASK; /**< 0x013C: Magnitude interrupt mask register 3 */
- uint32_t MAGINTCR4; /**< 0x0140: Magnitude interrupt control register 4 */
- uint32_t MAGINT4MASK; /**< 0x0144: Magnitude interrupt mask register 4 */
- uint32_t MAGINTCR5; /**< 0x0148: Magnitude interrupt control register 5 */
- uint32_t MAGINT5MASK; /**< 0x014C: Magnitude interrupt mask register 5 */
- uint32_t MAGINTCR6; /**< 0x0150: Magnitude interrupt control register 6 */
- uint32_t MAGINT6MASK; /**< 0x0154: Magnitude interrupt mask register 6 */
- uint32_t MAGTHRINTENASET; /**< 0x0158: Magnitude interrupt set register */
- uint32_t MAGTHRINTENACLR; /**< 0x015C: Magnitude interrupt clear register */
- uint32_t MAGTHRINTFLG; /**< 0x0160: Magnitude interrupt flag register */
- uint32_t MAGTHRINTOFFSET; /**< 0x0164: Magnitude interrupt offset register */
- uint32_t GxFIFORESETCR[3U]; /**< 0x0168,0x016C,0x0170: Group 0-2 fifo reset register */
- uint32_t G0RAMADDR; /**< 0x0174: Group 0 RAM pointer register */
- uint32_t G1RAMADDR; /**< 0x0178: Group 1 RAM pointer register */
- uint32_t G2RAMADDR; /**< 0x017C: Group 2 RAM pointer register */
- uint32_t PARCR; /**< 0x0180: Parity control register */
- uint32_t PARADDR; /**< 0x0184: Parity error address register */
- uint32_t PWRUPDLYCTRL; /**< 0x0188: Power-Up delay control register */
-} adcBASE_t;
-
-
-/** @def adcREG1
-* @brief ADC1 Register Frame Pointer
-*
-* This pointer is used by the ADC driver to access the ADC1 registers.
-*/
-#define adcREG1 ((adcBASE_t *)0xFFF7C000U)
-
-/** @def adcREG2
-* @brief ADC2 Register Frame Pointer
-*
-* This pointer is used by the ADC driver to access the ADC2 registers.
-*/
-#define adcREG2 ((adcBASE_t *)0xFFF7C200U)
-
-/** @def adcRAM1
-* @brief ADC1 RAM Pointer
-*
-* This pointer is used by the ADC driver to access the ADC1 RAM.
-*/
-#define adcRAM1 (*(unsigned int *)0xFF3E0000U)
-
-/** @def adcRAM2
-* @brief ADC2 RAM Pointer
-*
-* This pointer is used by the ADC driver to access the ADC2 RAM.
-*/
-#define adcRAM2 (*(unsigned int *)0xFF3A0000U)
-
-/** @def adcPARRAM1
-* @brief ADC1 Parity RAM Pointer
-*
-* This pointer is used by the ADC driver to access the ADC1 Parity RAM.
-*/
-#define adcPARRAM1 (*(unsigned int *)(0xFF3E0000U + 0x1000))
-
-/** @def adcPARRAM2
-* @brief ADC2 Parity RAM Pointer
-*
-* This pointer is used by the ADC driver to access the ADC2 Parity RAM.
-*/
-#define adcPARRAM2 (*(unsigned int *)(0xFF3A0000U + 0x1000))
-
-/* USER CODE BEGIN (2) */
-
-
-
-/* USER CODE END */
-
-
-/* ADC Interface Functions */
-
-void adcInit(void);
-void adcStartConversion(adcBASE_t *adc, uint32_t group);
-void adcStopConversion(adcBASE_t *adc, uint32_t group);
-void adcResetFiFo(adcBASE_t *adc, uint32_t group);
-uint32_t adcGetData(adcBASE_t *adc, uint32_t group, adcData_t *data);
-uint32_t adcIsFifoFull(adcBASE_t *adc, uint32_t group);
-uint32_t adcIsConversionComplete(adcBASE_t *adc, uint32_t group);
-void adcEnableNotification(adcBASE_t *adc, uint32_t group);
-void adcDisableNotification(adcBASE_t *adc, uint32_t group);
-void adcCalibration(adcBASE_t *adc);
-uint32_t adcMidPointCalibration(adcBASE_t *adc);
-
-/** @fn void adcNotification(adcBASE_t *adc, uint32_t group)
-* @brief Group notification
-* @param[in] adc Pointer to ADC node:
-* - adcREG1: ADC1 module pointer
-* - adcREG2: ADC2 module pointer
-* @param[in] group number of ADC node:
-* - adcGROUP0: ADC event group
-* - adcGROUP1: ADC group 1
-* - adcGROUP2: ADC group 2
-*
-* @note This function has to be provide by the user.
-*/
-void adcNotification(adcBASE_t *adc, uint32_t group);
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-
-#endif
+++ /dev/null
-/** @file can.h
-* @brief CAN Driver Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Definitions
-* - Types
-* - Interface Prototypes
-* .
-* which are relevant for the CAN driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#include "base.h"
-
-#ifndef __CAN_H__
-#define __CAN_H__
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* CAN General Definitions */
-
-/** @def canLEVEL_ACTIVE
-* @brief Alias name for CAN error operation level active (Error couter 0-95)
-*/
-#define canLEVEL_ACTIVE 0x00U
-
-/** @def canLEVEL_WARNING
-* @brief Alias name for CAN error operation level warning (Error couter 96-127)
-*/
-#define canLEVEL_WARNING 0x40U
-
-/** @def canLEVEL_PASSIVE
-* @brief Alias name for CAN error operation level passive (Error couter 128-255)
-*/
-#define canLEVEL_PASSIVE 0x20U
-
-/** @def canLEVEL_BUS_OFF
-* @brief Alias name for CAN error operation level bus off (Error couter 256)
-*/
-#define canLEVEL_BUS_OFF 0x80U
-
-/** @def canERROR_NO
-* @brief Alias name for no CAN error occured
-*/
-#define canERROR_OK 0U
-
-/** @def canERROR_STUFF
-* @brief Alias name for CAN stuff error an RX message
-*/
-#define canERROR_STUFF 1U
-
-/** @def canERROR_FORMAT
-* @brief Alias name for CAN form/format error an RX message
-*/
-#define canERROR_FORMAT 2U
-
-/** @def canERROR_ACKNOWLEDGE
-* @brief Alias name for CAN TX message wasn't acknowledged
-*/
-#define canERROR_ACKNOWLEDGE 3U
-
-/** @def canERROR_BIT1
-* @brief Alias name for CAN TX message sendig recessive level but monitoring dominant
-*/
-#define canERROR_BIT1 4U
-
-/** @def canERROR_BIT0
-* @brief Alias name for CAN TX message sendig dominant level but monitoring recessive
-*/
-#define canERROR_BIT0 5U
-
-/** @def canERROR_CRC
-* @brief Alias name for CAN RX message received wrong CRC
-*/
-#define canERROR_CRC 6U
-
-/** @def canERROR_NO
-* @brief Alias name for CAN no message has send or received sinced last call of CANGetLastError
-*/
-#define canERROR_NO 7U
-
-/** @def canMESSAGE_BOX1
-* @brief Alias name for CAN message box 1
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX1 1U
-
-/** @def canMESSAGE_BOX2
-* @brief Alias name for CAN message box 2
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX2 2U
-
-/** @def canMESSAGE_BOX3
-* @brief Alias name for CAN message box 3
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX3 3U
-
-/** @def canMESSAGE_BOX4
-* @brief Alias name for CAN message box 4
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX4 4U
-
-/** @def canMESSAGE_BOX5
-* @brief Alias name for CAN message box 5
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX5 5U
-
-/** @def canMESSAGE_BOX6
-* @brief Alias name for CAN message box 6
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX6 6U
-
-/** @def canMESSAGE_BOX7
-* @brief Alias name for CAN message box 7
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX7 7U
-
-/** @def canMESSAGE_BOX8
-* @brief Alias name for CAN message box 8
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX8 8U
-
-/** @def canMESSAGE_BOX9
-* @brief Alias name for CAN message box 9
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX9 9U
-
-/** @def canMESSAGE_BOX10
-* @brief Alias name for CAN message box 10
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX10 10U
-
-/** @def canMESSAGE_BOX11
-* @brief Alias name for CAN message box 11
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX11 11U
-
-/** @def canMESSAGE_BOX12
-* @brief Alias name for CAN message box 12
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX12 12U
-
-/** @def canMESSAGE_BOX13
-* @brief Alias name for CAN message box 13
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX13 13U
-
-/** @def canMESSAGE_BOX14
-* @brief Alias name for CAN message box 14
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX14 14U
-
-/** @def canMESSAGE_BOX15
-* @brief Alias name for CAN message box 15
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX15 15U
-
-/** @def canMESSAGE_BOX16
-* @brief Alias name for CAN message box 16
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX16 16U
-
-/** @def canMESSAGE_BOX17
-* @brief Alias name for CAN message box 17
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX17 17U
-
-/** @def canMESSAGE_BOX18
-* @brief Alias name for CAN message box 18
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX18 18U
-
-/** @def canMESSAGE_BOX19
-* @brief Alias name for CAN message box 19
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX19 19U
-
-/** @def canMESSAGE_BOX20
-* @brief Alias name for CAN message box 20
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX20 20U
-
-/** @def canMESSAGE_BOX21
-* @brief Alias name for CAN message box 21
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX21 21U
-
-/** @def canMESSAGE_BOX22
-* @brief Alias name for CAN message box 22
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX22 22U
-
-/** @def canMESSAGE_BOX23
-* @brief Alias name for CAN message box 23
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX23 23U
-
-/** @def canMESSAGE_BOX24
-* @brief Alias name for CAN message box 24
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX24 24U
-
-/** @def canMESSAGE_BOX25
-* @brief Alias name for CAN message box 25
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX25 25U
-
-/** @def canMESSAGE_BOX26
-* @brief Alias name for CAN message box 26
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX26 26U
-
-/** @def canMESSAGE_BOX27
-* @brief Alias name for CAN message box 27
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX27 27U
-
-/** @def canMESSAGE_BOX28
-* @brief Alias name for CAN message box 28
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX28 28U
-
-/** @def canMESSAGE_BOX29
-* @brief Alias name for CAN message box 29
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX29 29U
-
-/** @def canMESSAGE_BOX30
-* @brief Alias name for CAN message box 30
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX30 30U
-
-/** @def canMESSAGE_BOX31
-* @brief Alias name for CAN message box 31
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX31 31U
-
-/** @def canMESSAGE_BOX32
-* @brief Alias name for CAN message box 32
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX32 32U
-
-/** @def canMESSAGE_BOX33
-* @brief Alias name for CAN message box 33
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX33 33U
-
-/** @def canMESSAGE_BOX34
-* @brief Alias name for CAN message box 34
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX34 34U
-
-/** @def canMESSAGE_BOX35
-* @brief Alias name for CAN message box 35
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX35 35U
-
-/** @def canMESSAGE_BOX36
-* @brief Alias name for CAN message box 36
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX36 36U
-
-/** @def canMESSAGE_BOX37
-* @brief Alias name for CAN message box 37
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX37 37U
-
-/** @def canMESSAGE_BOX38
-* @brief Alias name for CAN message box 38
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX38 38U
-
-/** @def canMESSAGE_BOX39
-* @brief Alias name for CAN message box 39
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX39 39U
-
-/** @def canMESSAGE_BOX40
-* @brief Alias name for CAN message box 40
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX40 40U
-
-/** @def canMESSAGE_BOX41
-* @brief Alias name for CAN message box 41
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX41 41U
-
-/** @def canMESSAGE_BOX42
-* @brief Alias name for CAN message box 42
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX42 42U
-
-/** @def canMESSAGE_BOX43
-* @brief Alias name for CAN message box 43
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX43 43U
-
-/** @def canMESSAGE_BOX44
-* @brief Alias name for CAN message box 44
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX44 44U
-
-/** @def canMESSAGE_BOX45
-* @brief Alias name for CAN message box 45
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX45 45U
-
-/** @def canMESSAGE_BOX46
-* @brief Alias name for CAN message box 46
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX46 46U
-
-/** @def canMESSAGE_BOX47
-* @brief Alias name for CAN message box 47
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX47 47U
-
-/** @def canMESSAGE_BOX48
-* @brief Alias name for CAN message box 48
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX48 48U
-
-/** @def canMESSAGE_BOX49
-* @brief Alias name for CAN message box 49
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX49 49U
-
-/** @def canMESSAGE_BOX50
-* @brief Alias name for CAN message box 50
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX50 50U
-
-/** @def canMESSAGE_BOX51
-* @brief Alias name for CAN message box 51
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX51 51U
-
-/** @def canMESSAGE_BOX52
-* @brief Alias name for CAN message box 52
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX52 52U
-
-/** @def canMESSAGE_BOX53
-* @brief Alias name for CAN message box 53
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX53 53U
-
-/** @def canMESSAGE_BOX54
-* @brief Alias name for CAN message box 54
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX54 54U
-
-/** @def canMESSAGE_BOX55
-* @brief Alias name for CAN message box 55
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX55 55U
-
-/** @def canMESSAGE_BOX56
-* @brief Alias name for CAN message box 56
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX56 56U
-
-/** @def canMESSAGE_BOX57
-* @brief Alias name for CAN message box 57
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX57 57U
-
-/** @def canMESSAGE_BOX58
-* @brief Alias name for CAN message box 58
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX58 58U
-
-/** @def canMESSAGE_BOX59
-* @brief Alias name for CAN message box 59
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX59 59U
-
-/** @def canMESSAGE_BOX60
-* @brief Alias name for CAN message box 60
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX60 60U
-
-/** @def canMESSAGE_BOX61
-* @brief Alias name for CAN message box 61
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX61 61U
-
-/** @def canMESSAGE_BOX62
-* @brief Alias name for CAN message box 62
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX62 62U
-
-/** @def canMESSAGE_BOX63
-* @brief Alias name for CAN message box 63
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX63 63U
-
-/** @def canMESSAGE_BOX64
-* @brief Alias name for CAN message box 64
-*
-* @note This value should be used for API argument @a messageBox
-*/
-#define canMESSAGE_BOX64 64U
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/** @struct CANBase
-* @brief CAN Register Frame Definition
-*
-* This type is used to access the CAN Registers.
-*/
-/** @typedef canBASE_t
-* @brief CAN Register Frame Type Definition
-*
-* This type is used to access the CAN Registers.
-*/
-typedef volatile struct CANBase
-{
- uint32_t CTL; /**< 0x0000: Control Register */
- uint32_t ES; /**< 0x0004: Error and Status Register */
- uint32_t EERC; /**< 0x0008: Error Counter Register */
- uint32_t BTR; /**< 0x000C: Bit Timing Register */
- uint32_t INT; /**< 0x0010: Interrupt Register */
- uint32_t TEST; /**< 0x0014: Test Register */
- uint32_t : 32U; /**< 0x0018: Reserved */
- uint32_t PERR; /**< 0x001C: Parity/SECDED Error Code Register */
- uint32_t REL; /**< 0x0020: Core Release Register */
- uint32_t ECCDIAG; /**< 0x0024: ECC Diagnostic Register */
- uint32_t ECCDIADSTAT; /**< 0x0028: ECC Diagnostic Status Register */
- uint32_t : 32U; /**< 0x002C: Reserved */
- uint32_t : 32U; /**< 0x0030: Reserved */
- uint32_t : 32U; /**< 0x0034: Reserved */
- uint32_t : 32U; /**< 0x0038: Reserved */
- uint32_t : 32U; /**< 0x003C: Reserved */
- uint32_t : 32U; /**< 0x0040: Reserved */
- uint32_t : 32U; /**< 0x0044: Reserved */
- uint32_t : 32U; /**< 0x0048: Reserved */
- uint32_t : 32U; /**< 0x004C: Reserved */
- uint32_t : 32U; /**< 0x0050: Reserved */
- uint32_t : 32U; /**< 0x0054: Reserved */
- uint32_t : 32U; /**< 0x0058: Reserved */
- uint32_t : 32U; /**< 0x005C: Reserved */
- uint32_t : 32U; /**< 0x0060: Reserved */
- uint32_t : 32U; /**< 0x0064: Reserved */
- uint32_t : 32U; /**< 0x0068: Reserved */
- uint32_t : 32U; /**< 0x006C: Reserved */
- uint32_t : 32U; /**< 0x0070: Reserved */
- uint32_t : 32U; /**< 0x0074: Reserved */
- uint32_t : 32U; /**< 0x0078: Reserved */
- uint32_t : 32U; /**< 0x007C: Reserved */
- uint32_t ABOTR; /**< 0x0080: Auto Bus On Time Register */
- uint32_t TXRQX; /**< 0x0084: Transmission Request X Register */
- uint32_t TXRQx[4U]; /**< 0x0088-0x0094: Transmission Request Registers */
- uint32_t NWDATX; /**< 0x0098: New Data X Register */
- uint32_t NWDATx[4U]; /**< 0x009C-0x00A8: New Data Registers */
- uint32_t INTPNDX; /**< 0x00AC: Interrupt Pending X Register */
- uint32_t INTPNDx[4U]; /**< 0x00B0-0x00BC: Interrupt Pending Registers */
- uint32_t MSGVALX; /**< 0x00C0: Message Valid X Register */
- uint32_t MSGVALx[4U]; /**< 0x00C4-0x00D0: Message Valid Registers */
- uint32_t : 32U; /**< 0x00D4: Reserved */
- uint32_t INTMUXx[4U]; /**< 0x00D8-0x00E4: Interrupt Multiplexer Registers */
- uint32_t : 32U; /**< 0x00E8: Reserved */
- uint32_t : 32U; /**< 0x00EC: Reserved */
- uint32_t : 32U; /**< 0x00F0: Reserved */
- uint32_t : 32U; /**< 0x00F4: Reserved */
- uint32_t : 32U; /**< 0x00F8: Reserved */
- uint32_t : 32U; /**< 0x00FC: Reserved */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint8_t IF1NO; /**< 0x0100: IF1 Command Register, Msg Number */
- uint8_t IF1STAT; /**< 0x0100: IF1 Command Register, Status */
- uint8_t IF1CMD; /**< 0x0100: IF1 Command Register, Command */
- uint32_t : 8U; /**< 0x0100: IF1 Command Register, Reserved */
-#else
- uint32_t : 8U; /**< 0x0100: IF1 Command Register, Reserved */
- uint8_t IF1CMD; /**< 0x0100: IF1 Command Register, Command */
- uint8_t IF1STAT; /**< 0x0100: IF1 Command Register, Status */
- uint8_t IF1NO; /**< 0x0100: IF1 Command Register, Msg Number */
-#endif
- uint32_t IF1MSK; /**< 0x0104: IF1 Mask Register */
- uint32_t IF1ARB; /**< 0x0108: IF1 Arbitration Register */
- uint32_t IF1MCTL; /**< 0x010C: IF1 Message Control Register */
- uint8_t IF1DATx[8U]; /**< 0x0110-0x0114: IF1 Data A and B Registers */
- uint32_t : 32U; /**< 0x0118: Reserved */
- uint32_t : 32U; /**< 0x011C: Reserved */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint8_t IF2NO; /**< 0x0120: IF2 Command Register, Msg No */
- uint8_t IF2STAT; /**< 0x0120: IF2 Command Register, Status */
- uint8_t IF2CMD; /**< 0x0120: IF2 Command Register, Command */
- uint32_t : 8U; /**< 0x0120: IF2 Command Register, Reserved */
-#else
- uint32_t : 8U; /**< 0x0120: IF2 Command Register, Reserved */
- uint8_t IF2CMD; /**< 0x0120: IF2 Command Register, Command */
- uint8_t IF2STAT; /**< 0x0120: IF2 Command Register, Status */
- uint8_t IF2NO; /**< 0x0120: IF2 Command Register, Msg Number */
-#endif
- uint32_t IF2MSK; /**< 0x0124: IF2 Mask Register */
- uint32_t IF2ARB; /**< 0x0128: IF2 Arbitration Register */
- uint32_t IF2MCTL; /**< 0x012C: IF2 Message Control Register */
- uint8_t IF2DATx[8U]; /**< 0x0130-0x0134: IF2 Data A and B Registers */
- uint32_t : 32U; /**< 0x0138: Reserved */
- uint32_t : 32U; /**< 0x013C: Reserved */
- uint32_t IF3OBS; /**< 0x0140: IF3 Observation Register */
- uint32_t IF3MSK; /**< 0x0144: IF3 Mask Register */
- uint32_t IF3ARB; /**< 0x0148: IF3 Arbitration Register */
- uint32_t IF3MCTL; /**< 0x014C: IF3 Message Control Register */
- uint8_t IF3DATx[8U]; /**< 0x0150-0x0154: IF3 Data A and B Registers */
- uint32_t : 32U; /**< 0x0158: Reserved */
- uint32_t : 32U; /**< 0x015C: Reserved */
- uint32_t IF3UEy[4U]; /**< 0x0160-0x016C: IF3 Update Enable Registers */
- uint32_t : 32U; /**< 0x0170: Reserved */
- uint32_t : 32U; /**< 0x0174: Reserved */
- uint32_t : 32U; /**< 0x0178: Reserved */
- uint32_t : 32U; /**< 0x017C: Reserved */
- uint32_t : 32U; /**< 0x0180: Reserved */
- uint32_t : 32U; /**< 0x0184: Reserved */
- uint32_t : 32U; /**< 0x0188: Reserved */
- uint32_t : 32U; /**< 0x018C: Reserved */
- uint32_t : 32U; /**< 0x0190: Reserved */
- uint32_t : 32U; /**< 0x0194: Reserved */
- uint32_t : 32U; /**< 0x0198: Reserved */
- uint32_t : 32U; /**< 0x019C: Reserved */
- uint32_t : 32U; /**< 0x01A0: Reserved */
- uint32_t : 32U; /**< 0x01A4: Reserved */
- uint32_t : 32U; /**< 0x01A8: Reserved */
- uint32_t : 32U; /**< 0x01AC: Reserved */
- uint32_t : 32U; /**< 0x01B0: Reserved */
- uint32_t : 32U; /**< 0x01B4: Reserved */
- uint32_t : 32U; /**< 0x01B8: Reserved */
- uint32_t : 32U; /**< 0x01BC: Reserved */
- uint32_t : 32U; /**< 0x01C0: Reserved */
- uint32_t : 32U; /**< 0x01C4: Reserved */
- uint32_t : 32U; /**< 0x01C8: Reserved */
- uint32_t : 32U; /**< 0x01CC: Reserved */
- uint32_t : 32U; /**< 0x01D0: Reserved */
- uint32_t : 32U; /**< 0x01D4: Reserved */
- uint32_t : 32U; /**< 0x01D8: Reserved */
- uint32_t : 32U; /**< 0x01DC: Reserved */
- uint32_t TIOC; /**< 0x01E0: TX IO Control Register */
- uint32_t RIOC; /**< 0x01E4: RX IO Control Register */
-} canBASE_t;
-
-
-/** @def canREG1
-* @brief CAN1 Register Frame Pointer
-*
-* This pointer is used by the CAN driver to access the CAN1 registers.
-*/
-#define canREG1 ((canBASE_t *)0xFFF7DC00U)
-
-/** @def canREG2
-* @brief CAN2 Register Frame Pointer
-*
-* This pointer is used by the CAN driver to access the CAN2 registers.
-*/
-#define canREG2 ((canBASE_t *)0xFFF7DE00U)
-
-/** @def canREG3
-* @brief CAN3 Register Frame Pointer
-*
-* This pointer is used by the CAN driver to access the CAN3 registers.
-*/
-#define canREG3 ((canBASE_t *)0xFFF7E000U)
-
-/** @def canRAM1
-* @brief CAN1 Mailbox RAM Pointer
-*
-* This pointer is used by the CAN driver to access the CAN1 RAM.
-*/
-#define canRAM1 (*(unsigned int *)0xFF1E0000U)
-
-/** @def canRAM2
-* @brief CAN2 Mailbox RAM Pointer
-*
-* This pointer is used by the CAN driver to access the CAN2 RAM.
-*/
-#define canRAM2 (*(unsigned int *)0xFF1C0000U)
-
-/** @def canRAM3
-* @brief CAN3 Mailbox RAM Pointer
-*
-* This pointer is used by the CAN driver to access the CAN3 RAM.
-*/
-#define canRAM3 (*(unsigned int *)0xFF1A0000U)
-
-/** @def canPARRAM1
-* @brief CAN1 Mailbox Parity RAM Pointer
-*
-* This pointer is used by the CAN driver to access the CAN1 Parity RAM
-* for testing RAM parity error detect logic.
-*/
-#define canPARRAM1 (*(unsigned int *)(0xFF1E0000U + 0x10))
-
-/** @def canPARRAM2
-* @brief CAN2 Mailbox Pairyt RAM Pointer
-*
-* This pointer is used by the CAN driver to access the CAN2 Parity RAM
-* for testing RAM parity error detect logic.
-*/
-#define canPARRAM2 (*(unsigned int *)(0xFF1C0000U + 0x10))
-
-/** @def canPARRAM3
-* @brief CAN3 Mailbox Parity RAM Pointer
-*
-* This pointer is used by the CAN driver to access the CAN3 Parity RAM
-* for testing RAM parity error detect logic.
-*/
-#define canPARRAM3 (*(unsigned int *)(0xFF1A0000U + 0x10))
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-
-/* CAN Interface Functions */
-
-void canInit(void);
-uint32_t canTransmit(canBASE_t *node, uint32_t messageBox, const uint8_t *data);
-uint32_t canGetData(canBASE_t *node, uint32_t messageBox, uint8_t * const data);
-uint32_t canIsTxMessagePending(canBASE_t *node, uint32_t messageBox);
-uint32_t canIsRxMessageArrived(canBASE_t *node, uint32_t messageBox);
-uint32_t canIsMessageBoxValid(canBASE_t *node, uint32_t messageBox);
-uint32_t canGetLastError(canBASE_t *node);
-uint32_t canGetErrorLevel(canBASE_t *node);
-void canEnableErrorNotification(canBASE_t *node);
-void canDisableErrorNotification(canBASE_t *node);
-void canIoSetDirection(canBASE_t *node,uint32_t TxDir,uint32_t RxDir);
-void canIoSetPort(canBASE_t *node, uint32_t TxValue, uint32_t RxValue);
-uint32_t canIoTxGetBit(canBASE_t *node);
-uint32_t canIoRxGetBit(canBASE_t *node);
-
-/** @fn void canErrorNotification(canBASE_t *node, uint32_t notification)
-* @brief Error notification
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] notification Error notification code:
-* - canLEVEL_WARNING (0x40): When RX- or TX error counter are between 96 and 127
-* - canLEVEL_BUS_OFF (0x80): When RX- or TX error counter are above 255
-*
-* @note This function has to be provide by the user.
-*/
-void canErrorNotification(canBASE_t *node, uint32_t notification);
-
-/** @fn void canMessageNotification(canBASE_t *node, uint32_t messageBox)
-* @brief Message notification
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] messageBox Message box number of CAN node:
-* - canMESSAGE_BOX1: CAN message box 1
-* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
-* - canMESSAGE_BOX64: CAN message box 64
-*
-* @note This function has to be provide by the user.
-*/
-void canMessageNotification(canBASE_t *node, uint32_t messageBox);
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-
-#endif
+++ /dev/null
-/** @file CRC.h
-* @brief CRC Driver Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Definitions
-* - Types
-* - Interface Prototypes
-* .
-* which are relevant for the CRC driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#include "base.h"
-
-#ifndef __CRC_H__
-#define __CRC_H__
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* CRC General Definitions */
-
-/** @def CRCLEVEL_ACTIVE
-* @brief Alias name for CRC error operation level active (Error couter 0-95)
-*/
-#define CRCLEVEL_ACTIVE 0x00U
-
-
-/** @def CRC_AUTO
-* @brief Alias name for CRC auto mode
-*/
-#define CRC_AUTO 0x00000001
-
-
-/** @def CRC_SEMI_CPU
-* @brief Alias name for semi cpu mode setting
-*/
-#define CRC_SEMI_CPU 0x00000002
-
-
-/** @def CRC_FULL_CPU
-* @brief Alias name for CRC cpu full mode
-*/
-#define CRC_FULL_CPU 0x00000003
-
-
-/** @def CRC_CH4_TO
-* @brief Alias name for channel1 time out interrupt flag
-*/
-#define CRC_CH4_TO 0x10000000
-
-/** @def CRC_CH4_UR
-* @brief Alias name for channel1 underrun interrupt flag
-*/
-#define CRC_CH4_UR 0x08000000
-
-/** @def CRC_CH4_OR
-* @brief Alias name for channel1 overrun interrupt flag
-*/
-#define CRC_CH4_OR 0x04000000
-
-/** @def CRC_CH4_FAIL
-* @brief Alias name for channel1 crc fail interrupt flag
-*/
-#define CRC_CH4_FAIL 0x02000000
-
-/** @def CRC_CH4_CC
-* @brief Alias name for channel1 compression complete interrupt flag
-*/
-#define CRC_CH4_CC 0x01000000
-
-/** @def CRC_CH3_TO
-* @brief Alias name for channel2 time out interrupt flag
-*/
-#define CRC_CH3_TO 0x00100000
-
-/** @def CRC_CH3_UR
-* @brief Alias name for channel2 underrun interrupt flag
-*/
-#define CRC_CH3_UR 0x00080000
-
-/** @def CRC_CH3_OR
-* @brief Alias name for channel2 overrun interrupt flag
-*/
-#define CRC_CH3_OR 0x00040000
-
-/** @def CRC_CH3_FAIL
-* @brief Alias name for channel2 crc fail interrupt flag
-*/
-#define CRC_CH3_FAIL 0x00020000
-
-/** @def CRC_CH3_CC
-* @brief Alias name for channel2 compression complete interrupt flag
-*/
-#define CRC_CH3_CC 0x00010000
-
-/** @def CRC_CH2_TO
-* @brief Alias name for channel3 time out interrupt flag
-*/
-#define CRC_CH2_TO 0x00001000
-
-/** @def CRC_CH2_UR
-* @brief Alias name for channel3 underrun interrupt flag
-*/
-#define CRC_CH2_UR 0x00000800
-
-/** @def CRC_CH2_OR
-* @brief Alias name for channel3 overrun interrupt flag
-*/
-#define CRC_CH2_OR 0x00000400
-
-/** @def CRC_CH2_FAIL
-* @brief Alias name for channel3 crc fail interrupt flag
-*/
-#define CRC_CH2_FAIL 0x00000200
-
-/** @def CRC_CH2_CC
-* @brief Alias name for channel3 compression complete interrupt flag
-*/
-#define CRC_CH2_CC 0x00000100
-
-/** @def CRC_CH1_TO
-* @brief Alias name for channel4 time out interrupt flag
-*/
-#define CRC_CH1_TO 0x00000010
-
-/** @def CRC_CH1_UR
-* @brief Alias name for channel4 underrun interrupt flag
-*/
-#define CRC_CH1_UR 0x00000008
-
-
-/** @def CRC_CH1_OR
-* @brief Alias name for channel4 overrun interrupt flag
-*/
-#define CRC_CH1_OR 0x00000004
-
-/** @def CRC_CH1_FAIL
-* @brief Alias name for channel4 crc fail interrupt flag
-*/
-#define CRC_CH1_FAIL 0x00000002
-
-/** @def CRC_CH1_CC
-* @brief Alias name for channel4 compression complete interrupt flag
-*/
-#define CRC_CH1_CC 0x00000001
-
-
-
-/** @struct crcModConfig
-* @brief CRC configuration for different modes
-*
-* This type is used to pass crc mode configuration details
-*/
-/** @typedef crcModConfig_t
-* @brief CRC Data Type Definition
-*/
-typedef struct crcModConfig
-{
- uint32_t mode; /**< Mode of operation */
- uint32_t crc_channel; /**< CRC channel-0,1 */
- uint32_t * src_data_pat; /**< Pattern data */
- uint32_t data_length; /**< Pattern data length.Number of 64 bit size word*/
-} crcModConfig_t;
-
-/** @struct crcConfig
-* @brief CRC configuration for different modes
-*
-* This type is used to pass crc configuration
-*/
-/** @typedef crcConfig_t
-* @brief CRC Data Type Definition
-*/
-typedef struct crcConfig
-{
- uint32_t crc_channel; /**< CRC channel-0,1 */
- uint32_t mode; /**< Mode of operation */
- uint32_t pcount; /**< Pattern count*/
- uint32_t scount; /**< Sector count */
- uint32_t wdg_preload; /**< Watchdog period */
- uint32_t block_preload; /**< Block period*/
-
-} crcConfig_t;
-
-
-/** @struct crcBase
-* @brief CRC Register Frame Definition
-*
-* This type is used to access the CRC Registers.
-*/
-/** @typedef crcBASE_t
-* @brief CRC Register Frame Type Definition
-*
-* This type is used to access the CRC Registers.
-*/
-typedef volatile struct crcBase
-{
- uint32_t CTRL0; /**< 0x0000: Global Control Register 0 >**/
- uint32_t : 32U; /**< 0x0004: reserved >**/
- uint32_t CTRL1; /**< 0x0008: Global Control Register 1 >**/
- uint32_t : 32U; /**< 0x000C: reserved >**/
- uint32_t CTRL2; /**< 0x0010: Global Control Register 2 >**/
- uint32_t : 32U; /**< 0x0014: reserved >**/
- uint32_t INTS; /**< 0x0018: Interrupt Enable Set Register >**/
- uint32_t : 32U; /**< 0x001C: reserved >**/
- uint32_t INTR; /**< 0x0020: Interrupt Enable Reset Register >**/
- uint32_t : 32U; /**< 0x0024: reserved >**/
- uint32_t STATUS; /**< 0x0028: Interrupt Status Register >**/
- uint32_t : 32U; /**< 0x002C: reserved >**/
- uint32_t INT_OFFSET_REG; /**< 0x0030: Interrupt Offset >**/
- uint32_t : 32U; /**< 0x0034: reserved >**/
- uint32_t BUSY; /**< 0x0038: CRC Busy Register >**/
- uint32_t : 32U; /**< 0x003C: reserved >**/
- uint32_t PCOUNT_REG1; /**< 0x0040: Pattern Counter Preload Register1 >**/
- uint32_t SCOUNT_REG1; /**< 0x0044: Sector Counter Preload Register1 >**/
- uint32_t CURSEC_REG1; /**< 0x0048: Current Sector Register 1 >**/
- uint32_t WDTOPLD1; /**< 0x004C: Channel 1 Watchdog Timeout Preload Register A >**/
- uint32_t BCTOPLD1; /**< 0x0050: Channel 1 Block Complete Timeout Preload Register B >**/
- uint32_t : 32U; /**< 0x0054: reserved >**/
- uint32_t : 32U; /**< 0x0058: reserved >**/
- uint32_t : 32U; /**< 0x005C: reserved >**/
- uint32_t PSA_SIGREGL1; /**< 0x0060: Channel 1 PSA signature low register >**/
- uint32_t PSA_SIGREGH1; /**< 0x0064: Channel 1 PSA signature high register >**/
- uint32_t REGL1; /**< 0x0068: Channel 1 CRC value low register >**/
- uint32_t REGH1; /**< 0x006C: Channel 1 CRC value high register >**/
- uint32_t PSA_SECSIGREGL1; /**< 0x0070: Channel 1 PSA sector signature low register >**/
- uint32_t PSA_SECSIGREGH1; /**< 0x0074: Channel 1 PSA sector signature high register >**/
- uint32_t RAW_DATAREGL1; /**< 0x0078: Channel 1 Raw Data Low Register >**/
- uint32_t RAW_DATAREGH1; /**< 0x007C: Channel 1 Raw Data High Register >**/
- uint32_t PCOUNT_REG2; /**< 0x0080: CRC Pattern Counter Preload Register2 >**/
- uint32_t SCOUNT_REG2; /**< 0x0084: Sector Counter Preload Register2 >**/
- uint32_t CURSEC_REG2; /**< 0x0088: Current Sector Register 2>**/
- uint32_t WDTOPLD2; /**< 0x008C: Channel 2 Watchdog Timeout Preload Register A >**/
- uint32_t BCTOPLD2; /**< 0x0090: Channel 2 Block Complete Timeout Preload Register B >**/
- uint32_t : 32U; /**< 0x0094: reserved >**/
- uint32_t : 32U; /**< 0x0098: reserved >**/
- uint32_t : 32U; /**< 0x009C: reserved >**/
- uint32_t PSA_SIGREGL2; /**< 0x00A0: Channel 2 PSA signature low register >**/
- uint32_t PSA_SIGREGH2; /**< 0x00A8: Channel 2 PSA signature high register >**/
- uint32_t REGL2; /**< 0x00AC: Channel 2 CRC value low register >**/
- uint32_t REGH2; /**< 0x00AC: Channel 2 CRC value high register >**/
- uint32_t PSA_SECSIGREGL2; /**< 0x00B0: Channel 2 PSA sector signature low register >**/
- uint32_t PSA_SECSIGREGH2; /**< 0x00B4: Channel 2 PSA sector signature high register >**/
- uint32_t RAW_DATAREGL2; /**< 0x00B8: Channel 2 Raw Data Low Register >**/
- uint32_t RAW_DATAREGH2; /**< 0x00BC: Channel 2 Raw Data High Register >**/
-}crcBASE_t;
-
-/** @def crcREG
-* @brief CRC Register Frame Pointer
-*
-* This pointer is used by the CRC driver to access the CRC registers.
-*/
-#define crcREG ((crcBASE_t *)0xFE000000U)
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/* CRC Interface Functions */
-void crcInit(void);
-void crcSendPowerDown(crcBASE_t *crc);
-void crcSignGen(crcBASE_t *crc,crcModConfig_t *param);
-void crcSetConfig(crcBASE_t *crc,crcConfig_t *param);
-uint64_t crcGetSectorSig(crcBASE_t *crc,uint32_t channel);
-uint32_t crcGetFailedSector(crcBASE_t *crc,uint32_t channel);
-uint32_t crcGetIntrPend(crcBASE_t *crc,uint32_t channel);
-void crcChannelReset(crcBASE_t *crc,uint32_t channel);
-void crcEnableNotification(crcBASE_t *crc, uint32_t flags);
-void crcDisableNotification(crcBASE_t *crc, uint32_t flags);
-
-/** @fn void crcNotification(crcBASE_t *crc, uint32_t flags)
-* @brief Interrupt callback
-* @param[in] crc - crc module base address
-* @param[in] flags - copy of error interrupt flags
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is a copy of the
-* interrupt flag register.
-*/
-void crcNotification(crcBASE_t *crc, uint32_t flags);
-
-
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-#endif
+++ /dev/null
-/** @file dcc.h
-* @brief DCC Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __DCC_H__
-#define __DCC_H__
-
-#include "base.h"
-
-/* DCC General Definitions */
-
-/** @def dcc1CNT0_CLKSRC_HFLPO
-* @brief Alias name for DCC1 Counter 0 Clock Source HFLPO
-*
-* This is an alias name for the Clock Source HFLPO for DCC1 Counter 0.
-*
-* @note This value should be used for API argument @a cnt0_Clock_Source
-*/
-#define dcc1CNT0_CLKSRC_HFLPO 0x00000005U
-
-/** @def dcc1CNT0_CLKSRC_TCK
-* @brief Alias name for DCC1 Counter 0 Clock Source TCK
-*
-* This is an alias name for the Clock Source TCK for DCC1 Counter 0.
-*
-* @note This value should be used for API argument @a cnt0_Clock_Source
-*/
-#define dcc1CNT0_CLKSRC_TCK 0x0000000AU
-
-/** @def dcc1CNT0_CLKSRC_OSCIN
-* @brief Alias name for DCC1 Counter 0 Clock Source OSCIN
-*
-* This is an alias name for the Clock Source OSCIN for DCC1 Counter 0.
-*
-* @note This value should be used for API argument @a cnt0_Clock_Source
-*/
-#define dcc1CNT0_CLKSRC_OSCIN 0x0000000FU
-
-/** @def dcc1CNT1_CLKSRC_PLL1
-* @brief Alias name for DCC1 Counter 1 Clock Source PLL1
-*
-* This is an alias name for the Clock Source PLL for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_PLL1 0x0000A0000U
-
-/** @def dcc1CNT1_CLKSRC_PLL2
-* @brief Alias name for DCC1 Counter 1 Clock Source PLL2
-*
-* This is an alias name for the Clock Source OSCIN for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_PLL2 0x0000A0001U
-
-/** @def dcc1CNT1_CLKSRC_LFLPO
-* @brief Alias name for DCC1 Counter 1 Clock Source LFLPO
-*
-* This is an alias name for the Clock Source LFLPO for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_LFLPO 0x0000A0002U
-
-/** @def dcc1CNT1_CLKSRC_HFLPO
-* @brief Alias name for DCC1 Counter 1 Clock Source HFLPO
-*
-* This is an alias name for the Clock Source HFLPO for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_HFLPO 0x0000A0003U
-
-/** @def dcc1CNT1_CLKSRC_EXTCLKIN1
-* @brief Alias name for DCC1 Counter 1 Clock Source EXTCLKIN1
-*
-* This is an alias name for the Clock Source EXTCLKIN1 for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_EXTCLKIN1 0x0000A0005U
-
-/** @def dcc1CNT1_CLKSRC_EXTCLKIN2
-* @brief Alias name for DCC1 Counter 1 Clock Source EXTCLKIN2
-*
-* This is an alias name for the Clock Source EXTCLKIN2 for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_EXTCLKIN2 0x0000A0006U
-
-/** @def dcc1CNT1_CLKSRC_VCLK
-* @brief Alias name for DCC1 Counter 1 Clock Source VCLK
-*
-* This is an alias name for the Clock Source VCLK for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_VCLK 0x0000A0008U
-
-/** @def dcc1CNT1_CLKSRC_N2HET1_31
-* @brief Alias name for DCC1 Counter 1 Clock Source N2HET1_31
-*
-* This is an alias name for the Clock Source N2HET1_31 for DCC1 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc1CNT1_CLKSRC_N2HET1_31 0x00005000FU
-
-/** @def dcc2CNT0_CLKSRC_TCK
-* @brief Alias name for DCC2 Counter 0 Clock Source TCK
-*
-* This is an alias name for the Clock Source TCK for DCC2 Counter 0.
-*
-* @note This value should be used for API argument @a cnt0_Clock_Source
-*/
-#define dcc2CNT0_CLKSRC_TCK 0x0000000AU
-
-/** @def dcc1CNT0_CLKSRC_OSCIN
-* @brief Alias name for DCC1 Counter 0 Clock Source OSCIN
-*
-* This is an alias name for the Clock Source OSCIN for DCC2 Counter 0.
-*
-* @note This value should be used for API argument @a cnt0_Clock_Source
-*/
-#define dcc2CNT0_CLKSRC_OSCIN 0x0000000FU
-
-/** @def dcc2CNT1_CLKSRC_VCLK
-* @brief Alias name for DCC2 Counter 1 Clock Source VCLK
-*
-* This is an alias name for the Clock Source VCLK for DCC2 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc2CNT1_CLKSRC_VCLK 0x0000A0008U
-
-/** @def dcc2CNT1_CLKSRC_N2HET1_0
-* @brief Alias name for DCC2 Counter 1 Clock Source N2HET2_0
-*
-* This is an alias name for the Clock Source N2HET2_0 for DCC2 Counter 1.
-*
-* @note This value should be used for API argument @a cnt1_Clock_Source
-*/
-#define dcc2CNT1_CLKSRC_N2HET1_0 0x00005000FU
-
-/** @def dccNOTIFICATION_DONE
-* @brief Alias name for DCC Done notification
-*
-* This is an alias name for the DCC Done notification.
-*
-* @note This value should be used for API argument @a notification
-*/
-#define dccNOTIFICATION_DONE 0x0000A000U
-
-/** @def dccNOTIFICATION_ERROR
-* @brief Alias name for DCC Error notification
-*
-* This is an alias name for the DCC Error notification.
-*
-* @note This value should be used for API argument @a notification
-*/
-#define dccNOTIFICATION_ERROR 0x000000A0U
-
-
-/** @enum dcc1clocksource
-* @brief Alias names for dcc clock sources
-*
-* This enumeration is used to provide alias names for the clock sources:
-*/
-enum dcc1clocksource
-{
- DCC1_CNT0_HF_LPO = 0x5, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/
- DCC1_CNT0_TCK = 0xA, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 1*/
- DCC1_CNT0_OSCIN = 0xF, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/
-
- DCC1_CNT1_PLL1 = 0x0, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 0*/
- DCC1_CNT1_PLL2 = 0x1, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 1*/
- DCC1_CNT1_LF_LPO = 0x2, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 2*/
- DCC1_CNT1_HF_LPO = 0x3, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 3*/
- DCC1_CNT1_EXTCLKIN1 = 0x5, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 4*/
- DCC1_CNT1_EXTCLKIN2 = 0x6, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 6*/
- DCC1_CNT1_VCLK = 0x8, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 8*/
- DCC1_CNT1_N2HET1_31 = 0xA /**< Alias for DCC1 CNT 1 CLOCK SOURCE 9*/
-};
-
-/** @enum dcc2clocksource
-* @brief Alias names for dcc clock sources
-*
-* This enumeration is used to provide alias names for the clock sources:
-*/
-enum dcc2clocksource
-{
- DCC2_CNT0_OSCIN = 0xF, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 0*/
- DCC2_CNT0_TCK = 0xA, /**< Alias for DCC1 CNT 0 CLOCK SOURCE 2*/
-
- DCC2_CNT1_VCLK = 0x8, /**< Alias for DCC1 CNT 1 CLOCK SOURCE 8*/
- DCC2_CNT1_N2HET2_0 = 0xA /**< Alias for DCC1 CNT 1 CLOCK SOURCE 9*/
-};
-
-/** @struct dccBase
-* @brief DCC Base Register Definition
-*
-* This structure is used to access the DCC module egisters.
-*/
-/** @typedef dccBASE_t
-* @brief DCC Register Frame Type Definition
-*
-* This type is used to access the DCC Registers.
-*/
-typedef volatile struct dccBase
-{
- uint32_t GCTRL; /**< 0x0000: DCC Control Register */
- uint32_t REV; /**< 0x0004: DCC Revision Id Register */
- uint32_t CNT0SEED; /**< 0x0008: DCC Counter0 Seed Register */
- uint32_t VALID0SEED; /**< 0x000C: DCC Valid0 Seed Register */
- uint32_t CNT1SEED; /**< 0x0010: DCC Counter1 Seed Register */
- uint32_t STAT; /**< 0x0014: DCC Status Register */
- uint32_t CNT0; /**< 0x0018: DCC Counter0 Value Register */
- uint32_t VALID0; /**< 0x001C: DCC Valid0 Value Register */
- uint32_t CNT1; /**< 0x0020: DCC Counter1 Value Register */
- uint32_t CLKSRC1; /**< 0x0024: DCC Counter1 Clock Source Selection Register */
- uint32_t CLKSRC0; /**< 0x0028: DCC Counter0 Clock Source Selection Register */
-} dccBASE_t;
-
-
-/** @def dccREG1
-* @brief DCC1 Register Frame Pointer
-*
-* This pointer is used by the DCC driver to access the dcc2 module registers.
-*/
-#define dccREG1 ((dccBASE_t *)0xFFFFEC00U)
-
-
-/** @def dccREG2
-* @brief DCC2 Register Frame Pointer
-*
-* This pointer is used by the DCC driver to access the dcc2 module registers.
-*/
-#define dccREG2 ((dccBASE_t *)0xFFFFF400U)
-
-
-/* DCC Interface Functions */
-void dccInit(void);
-void dccSetCounter0Seed(dccBASE_t *dcc, uint32_t cnt0seed);
-void dccSetTolerance(dccBASE_t *dcc, uint32_t valid0seed);
-void dccSetCounter1Seed(dccBASE_t *dcc, uint32_t cnt1seed);
-void dccSetSeed(dccBASE_t *dcc, uint32_t cnt0seed, uint32_t valid0seed, uint32_t cn1seed);
-void dccSelectClockSource(dccBASE_t *dcc, uint32_t cnt0_Clock_Source, uint32_t cnt1_Clock_Source);
-void dccEnable(dccBASE_t *dcc);
-void dccDisable(dccBASE_t *dcc);
-uint32_t dccGetErrStatus(dccBASE_t *dcc);
-
-void dccEnableNotification(dccBASE_t *dcc, uint32_t notification);
-void dccDisableNotification(dccBASE_t *dcc, uint32_t notification);
-
-/** @fn void dccNotification(dccBASE_t *dcc,uint32_t flags)
-* @brief Interrupt callback
-* @param[in] dcc - dcc module base address
-* @param[in] flags - status flags
-*
-* This is a callback function provided by the application. It is call when
-* a dcc is complete or detected error.
-*/
-void dccNotification(dccBASE_t *dcc,uint32_t flags);
-
-#endif
+++ /dev/null
-/** @file dma.h
-* @brief DMA Driver Definition File
-* @date 22.Aug.2011
-* @version 1.01.000
-*
-*/
-
-/* (c) Texas Instruments 2009-2010, All rights reserved. */
-
-#ifndef __DMA_H__
-#define __DMA_H__
-
-
-#include "base.h"
-
-/* dma configuration definitions */
-
-#define BLOCK_TRANSFER 1
-#define FRAME_TRANSFER 0
-
-#define AUTOINIT_ON 1
-#define AUTOINIT_OFF 0
-
-#define ADDR_FIXED 0
-#define ADDR_INC1 1
-#define ADDR_RESERVED 2
-#define ADDR_OFFSET 3
-
-/** @enum dmaREQTYPE
-* @brief DMA TRANSFER Type definitions
-*
-* Used to define DMA transfer type
-*/
-enum dmaREQTYPE
-{
- DMA_HW = 0x0,
- DMA_SW = 0x1
-};
-
-
-/** @enum dmaCHANNEL
-* @brief DMA CHANNEL definitions
-*
-* Used to define DMA Channel Number
-*/
-enum dmaCHANNEL
-{
- DMA_CH0 = 0x00,
- DMA_CH1 = 0x01,
- DMA_CH2 = 0x02,
- DMA_CH3 = 0x03,
- DMA_CH4 = 0x04,
- DMA_CH5 = 0x05,
- DMA_CH6 = 0x06,
- DMA_CH7 = 0x07,
- DMA_CH8 = 0x08,
- DMA_CH9 = 0x09,
- DMA_CH10 = 0x0A,
- DMA_CH11 = 0x0B,
- DMA_CH12 = 0x0C,
- DMA_CH13 = 0x0D,
- DMA_CH14 = 0x0E,
- DMA_CH15 = 0x0F,
- DMA_CH16 = 0x10,
- DMA_CH17 = 0x11,
- DMA_CH18 = 0x12,
- DMA_CH19 = 0x13,
- DMA_CH20 = 0x14,
- DMA_CH21 = 0x15,
- DMA_CH22 = 0x16,
- DMA_CH23 = 0x17,
- DMA_CH24 = 0x18,
- DMA_CH25 = 0x19,
- DMA_CH26 = 0x1A,
- DMA_CH27 = 0x1B,
- DMA_CH28 = 0x1C,
- DMA_CH29 = 0x1D,
- DMA_CH30 = 0x1E,
- DMA_CH31 = 0x1F,
- DMA_CH32 = 0x20
-};
-
-/** @enum dmaACCESS
-* @brief DMA ACESS WIDTH definitions
-*
-* Used to define DMA access width
-*/
-
-enum dmaACCESS
-{
- ACCESS_8_BIT = 0,
- ACCESS_16_BIT = 1,
- ACCESS_32_BIT = 2,
- ACCESS_64_BIT = 3
-};
-
-
-/** @struct g_dmaCTRL
-* @brief Interrupt mode globals
-*
-*/
-typedef struct dmaCTRLPKT
-{
- uint32_t SADD; /* initial source address */
- uint32_t DADD; /* initial destination address */
- uint32_t CHCTRL; /* channel count */
- uint32_t FRCNT; /* frame count */
- uint32_t ELCNT; /* element count */
- uint32_t ELDOFFSET; /* element destination offset */
- uint32_t ELSOFFSET; /* element source offset */
- uint32_t FRDOFFSET; /* frame detination offset */
- uint32_t FRSOFFSET; /* frame source offset */
- uint32_t PORTASGN; /* dma port */
- uint32_t RDSIZE; /* read element size */
- uint32_t WRSIZE; /* write element size */
- uint32_t TTYPE; /* trigger type - frame/block */
- uint32_t ADDMODERD; /* addresssing mode for source */
- uint32_t ADDMODEWR; /* addresssing mode for destination */
- uint32_t AUTOINIT; /* auto-init mode */
- uint32_t COMBO; /* next ctrl packet trigger */
-} g_dmaCTRL;
-
-
-
-/** @struct dmaBASE_t
-* @brief DMA Register Definition
-*
-* This structure is used to access the DMA module egisters.
-*/
-typedef volatile struct DMABase
-{
-
- uint32_t GCTRL; /**< 0x0000 global control register */
- uint32_t PEND; /**< 0x0004 channel pending register */
- uint32_t FBREG; /**< 0x0008 fall back register */
- uint32_t DMASTAT; /**< 0x000C status register */
- uint32_t : 32U; /**< 0x0010 reserved */
- uint32_t HWCHENAS; /**< 0x0014 hw channel enable set */
- uint32_t : 32U; /**< 0x0018 reserved */
- uint32_t HWCHENAR; /**< 0x001C hw channel enable reset */
- uint32_t : 32U; /**< 0x0020 reserved */
- uint32_t SWCHENAS; /**< 0x0024 sw channel enable set */
- uint32_t : 32U; /**< 0x0028 reserved */
- uint32_t SWCHENAR; /**< 0x002C sw channel enable reset */
- uint32_t : 32U; /**< 0x0030 reserved */
- uint32_t CHPRIOS; /**< 0x0034 channel priority set */
- uint32_t : 32U; /**< 0x0038 reserved */
- uint32_t CHPRIOR; /**< 0x003C channel priority reset */
- uint32_t : 32U; /**< 0x0040 reserved */
- uint32_t GCHIENAS; /**< 0x0044 global channel interrupt enable set */
- uint32_t : 32U; /**< 0x0048 */
- uint32_t GCHIENAR; /**< 0x004C global channel interrupt enable set */
- uint32_t : 32U; /**< 0x0050 */
- uint32_t DREQASI[8U];/**< 0x0054 - 0x70 */
- uint32_t : 32U; /**< 0x0074 reserved */
- uint32_t : 32U; /**< 0x0078 reserved */
- uint32_t : 32U; /**< 0x007C reserved */
- uint32_t : 32U; /**< 0x0080 reserved */
- uint32_t : 32U; /**< 0x0084 reserved */
- uint32_t : 32U; /**< 0x0088 reserved */
- uint32_t : 32U; /**< 0x008C reserved */
- uint32_t : 32U; /**< 0x0090 reserved */
- uint32_t PAR[4U]; /**< 0x0094 - 0xA0 */
- uint32_t : 32U; /**< 0x00A4 */
- uint32_t : 32U; /**< 0x00A8 */
- uint32_t : 32U; /**< 0x00AC */
- uint32_t : 32U; /**< 0x00B0 */
- uint32_t FTCMAP; /**< 0x00B4 */
- uint32_t : 32U; /**< 0x00B8 reserved */
- uint32_t LFSMAP; /**< 0x00BC */
- uint32_t : 32U; /**< 0x00C0 reserved */
- uint32_t HBCMAP; /**< 0x00C4 */
- uint32_t : 32U; /**< 0x00C8 reserved */
- uint32_t BTCMAP; /**< 0x00CC */
- uint32_t : 32U; /**< 0x00D0 reserved */
- uint32_t BERMAP; /**< 0x00D4 */
- uint32_t : 32U; /**< 0x00D8 reserved */
- uint32_t FTCINTENAS; /**< 0x00DC */
- uint32_t : 32U; /**< 0x00E0 reserved */
- uint32_t FTCINTENAR; /**< 0x00E4 */
- uint32_t : 32U; /**< 0x00E8 reserved */
- uint32_t LFSINTENAS; /**< 0x00EC */
- uint32_t : 32U; /**< 0x00F0 reserved */
- uint32_t LFSINTENAR; /**< 0x00F4 */
- uint32_t : 32U; /**< 0x00F8 reserved */
- uint32_t HBCINTENAS; /**< 0x00FC */
- uint32_t : 32U; /**< 0x0100 reserved */
- uint32_t HBCINTENAR; /**< 0x0104 */
- uint32_t : 32U; /**< 0x0108 reserved */
- uint32_t BTCINTENAS; /**< 0x010C */
- uint32_t : 32U; /**< 0x0110 reserved */
- uint32_t BTCINTENAR; /**< 0x0114 */
- uint32_t : 32U; /**< 0x0118 reserved */
- uint32_t GINTFLAG; /**< 0x011C */
- uint32_t : 32U; /**< 0x0120 reserved */
- uint32_t FTCFLAG; /**< 0x0124 */
- uint32_t : 32U; /**< 0x0128 reserved */
- uint32_t LFSFLAG; /**< 0x012C */
- uint32_t : 32U; /**< 0x0130 reserved */
- uint32_t HBCFLAG; /**< 0x0134 */
- uint32_t : 32U; /**< 0x0138 reserved */
- uint32_t BTCFLAG; /**< 0x013C */
- uint32_t : 32U; /**< 0x0140 reserved */
- uint32_t BERFLAG; /**< 0x0144 */
- uint32_t : 32U; /**< 0x0148 reserved */
- uint32_t FTCAOFFSET; /**< 0x014C */
- uint32_t LFSAOFFSET; /**< 0x0150 */
- uint32_t HBCAOFFSET; /**< 0x0154 */
- uint32_t BTCAOFFSET; /**< 0x0158 */
- uint32_t BERAOFFSET; /**< 0x015C */
- uint32_t FTCBOFFSET; /**< 0x0160 */
- uint32_t LFSBOFFSET; /**< 0x0164 */
- uint32_t HBCBOFFSET; /**< 0x0168 */
- uint32_t BTCBOFFSET; /**< 0x016C */
- uint32_t BERBOFFSET; /**< 0x0170 */
- uint32_t TERBOFFSET; /**< 0x0174 */
- uint32_t PTCRL; /**< 0x0178 */
- uint32_t RTCTRL; /**< 0x017C */
- uint32_t DCTRL; /**< 0x0180 */
- uint32_t WPR; /**< 0x0184 */
- uint32_t WMR; /**< 0x0188 */
- uint32_t PAACSADDR; /**< 0x018C */
- uint32_t PAACDADDR; /**< 0x0190 */
- uint32_t PAACTC; /**< 0x0194 */
- uint32_t PBACSADDR; /**< 0x0198 */
- uint32_t PBACDADDR; /**< 0x019C */
- uint32_t PBACTC; /**< 0x01A0 */
- uint32_t : 32U; /**< 0x01A4 reserved */
- uint32_t DMAPCR; /**< 0x01A8 */
- uint32_t DMAPAR; /**< 0x01AC */
- uint32_t DMAMPCTRL; /**< 0x01B0 */
- uint32_t DMAMPST; /**< 0x01B4 */
- uint32_t DMAMPR0S; /**< 0x01B8 */
- uint32_t DMAMPR0E; /**< 0x01BC */
- uint32_t DMAMPR1S; /**< 0x01C0 */
- uint32_t DMAMPR1E; /**< 0x01C4 */
- uint32_t DMAMPR2S; /**< 0x01C8 */
- uint32_t DMAMPR2E; /**< 0x01CC */
- uint32_t DMAMPR3S; /**< 0x01D0 */
- uint32_t DMAMPR3E; /**< 0x01D4 */
-} dmaBASE_t;
-
-
-/** @def dmaREG
-* @brief DMA1 Register Frame Pointer
-*
-* This pointer is used by the DMA driver to access the DMA module registers.
-*/
-#define dmaREG ((dmaBASE_t *)0xFFFFF000U)
-
-
-
-typedef volatile struct
-{
-
- struct /* 0x000-0x400 */
- {
- uint32_t ISADDR;
- uint32_t IDADDR;
- uint32_t ITCOUNT;
- uint32_t : 32;
- uint32_t CHCTRL;
- uint32_t EIOFF;
- uint32_t FIOFF;
- uint32_t : 32;
- }PCP[32U];
-
- struct /* 0x400-0x800 */
- {
- uint32_t res[256];
- } RESERVED;
-
- struct /* 0x800-0xA00 */
- {
- uint32_t CSADDR;
- uint32_t CDADDR;
- uint32_t CTCOUNT;
- uint32_t : 32;
- }WCP[32U];
-
-} dmaRAMBASE_t;
-
-#define dmaRAMREG ((dmaRAMBASE_t *)0xFFF80000U)
-
-/* DMA Interface Functions */
-void dmaEnable(void);
-void dmaSetCtrlPacket(uint32_t channel);
-void dmaSetChEnable(uint32_t channel,uint32_t type);
-void dmaReqAssign(uint32_t channel,uint32_t reqline);
-void dmaEnableNotification(uint32_t flags);
-void dmaDisableNotification(uint32_t flags);
-
-
-/** @fn void dmaNotification(dmaBASE_t *DMA, uint32_t flags)
-* @brief Interrupt callback
-* @param[in] DMA - DMA module base address
-* @param[in] flags - copy of error interrupt flags
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is a copy of the
-* interrupt flag register.
-*/
-void dmaNotification(dmaBASE_t *DMA, uint32_t flags);
-
-#endif
+++ /dev/null
-/** @file dmm.h
-* @brief DMM Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __DMM_H__
-#define __DMM_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-#define DMM_SYNC 0
-#define DMM_CLK 1
-#define DMM_DATA0 2
-#define DMM_DATA1 3
-#define DMM_DATA2 4
-#define DMM_DATA3 5
-#define DMM_DATA4 6
-#define DMM_DATA5 7
-#define DMM_DATA6 8
-#define DMM_DATA7 9
-#define DMM_DATA8 10
-#define DMM_DATA9 11
-#define DMM_DATA10 12
-#define DMM_DATA11 13
-#define DMM_DATA12 14
-#define DMM_DATA13 15
-#define DMM_DATA14 16
-#define DMM_DATA15 17
-#define DMM_ENA 18
-
-/** @struct dmmBase
-* @brief DMM Base Register Definition
-*
-* This structure is used to access the DMM module egisters.
-*/
-/** @typedef dmmBASE_t
-* @brief DMM Register Frame Type Definition
-*
-* This type is used to access the DMM Registers.
-*/
-
-typedef volatile struct dmmBase
-{
- uint32_t GLBCTRL; /**< 0x0000: Global control register 0 */
- uint32_t INTSET; /**< 0x0004: DMM Interrupt Set Register */
- uint32_t INTCLR; /**< 0x0008: DMM Interrupt Clear Register */
- uint32_t INTLVL; /**< 0x000C: DMM Interrupt Level Register */
- uint32_t INTFLG; /**< 0x0010: DMM Interrupt Flag Register */
- uint32_t OFF1; /**< 0x0014: DMM Interrupt Offset 1 Register */
- uint32_t OFF2; /**< 0x0018: DMM Interrupt Offset 2 Register */
- uint32_t DDMDEST; /**< 0x001C: DMM Direct Data Mode Destination Register */
- uint32_t DDMBL; /**< 0x0020: DMM Direct Data Mode Blocksize Register */
- uint32_t DDMPT; /**< 0x0024: DMM Direct Data Mode Pointer Register */
- uint32_t INTPT; /**< 0x0028: DMM Direct Data Mode Interrupt Pointer Register */
- uint32_t DEST0REG1; /**< 0x002C: DMM Destination 0 Region 1 */
- uint32_t DEST0BL1; /**< 0x0030: DMM Destination 0 Blocksize 1 */
- uint32_t DEST0REG2; /**< 0x0034: DMM Destination 0 Region 2 */
- uint32_t DEST0BL2; /**< 0x0038: DMM Destination 0 Blocksize 2 */
- uint32_t DEST1REG1; /**< 0x003C: DMM Destination 1 Region 1 */
- uint32_t DEST1BL1; /**< 0x0040: DMM Destination 1 Blocksize 1 */
- uint32_t DEST1REG2; /**< 0x0044: DMM Destination 1 Region 2 */
- uint32_t DEST1BL2; /**< 0x0048: DMM Destination 1 Blocksize 2 */
- uint32_t DEST2REG1; /**< 0x004C: DMM Destination 2 Region 1 */
- uint32_t DEST2BL1; /**< 0x0050: DMM Destination 2 Blocksize 1 */
- uint32_t DEST2REG2; /**< 0x0054: DMM Destination 2 Region 2 */
- uint32_t DEST2BL2; /**< 0x0058: DMM Destination 2 Blocksize 2 */
- uint32_t DEST3REG1; /**< 0x005C: DMM Destination 3 Region 1 */
- uint32_t DEST3BL1; /**< 0x0060: DMM Destination 3 Blocksize 1 */
- uint32_t DEST3REG2; /**< 0x0064: DMM Destination 3 Region 2 */
- uint32_t DEST3BL2; /**< 0x0068: DMM Destination 3 Blocksize 2 */
- uint32_t PC0; /**< 0x006C: DMM Pin Control 0 */
- uint32_t PC1; /**< 0x0070: DMM Pin Control 1 */
- uint32_t PC2; /**< 0x0074: DMM Pin Control 2 */
- uint32_t PC3; /**< 0x0078: DMM Pin Control 3 */
- uint32_t PC4; /**< 0x007C: DMM Pin Control 4 */
- uint32_t PC5; /**< 0x0080: DMM Pin Control 5 */
- uint32_t PC6; /**< 0x0084: DMM Pin Control 6 */
- uint32_t PC7; /**< 0x0088: DMM Pin Control 7 */
- uint32_t PC8; /**< 0x008C: DMM Pin Control 8 */
-} dmmBASE_t;
-
-
-/** @def dmmREG
-* @brief DMM Register Frame Pointer
-*
-* This pointer is used by the DMM driver to access the DMM module registers.
-*/
-#define dmmREG ((dmmBASE_t *)0xFFFFF700U)
-
-/** @def dmmPORT
-* @brief DMM Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of DMM
-* (use the GIO drivers to access the port pins).
-*/
-#define dmmPORT ((gioPORT_t *)0xFFFFF770U)
-
-
-/* DMM Interface Functions */
-
-void dmmInit(void);
-
-#endif
+++ /dev/null
-/**
- * \file emac.h
- *
- * \brief EMAC APIs and macros.
- *
- * This file contains the driver API prototypes and macro definitions.
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-#ifndef __EMAC_H__
-#define __EMAC_H__
-
-#include "sys/hw_emac.h"
-#include "types.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/*****************************************************************************/
-/*
-** Macros which can be used as speed parameter to the API EMACRMIISpeedSet
-*/
-#define EMAC_RMIISPEED_10MBPS (0x00000000u)
-#define EMAC_RMIISPEED_100MBPS (0x00008000u)
-
-/*
-** Macros which can be used as duplexMode parameter to the API
-** EMACDuplexSet
-*/
-#define EMAC_DUPLEX_FULL (0x00000001u)
-#define EMAC_DUPLEX_HALF (0x00000000u)
-
-/*
-** Macros which can be used as matchFilt parameters to the API
-** EMACMACAddrSet
-*/
-/* Address not used to match/filter incoming packets */
-#define EMAC_MACADDR_NO_MATCH_NO_FILTER (0x00000000u)
-
-/* Address will be used to filter incoming packets */
-#define EMAC_MACADDR_FILTER (0x00100000u)
-
-/* Address will be used to match incoming packets */
-#define EMAC_MACADDR_MATCH (0x00180000u)
-
-/*
-** Macros which can be passed as eoiFlag to EMACRxIntAckToClear API
-*/
-#define EMAC_INT_CORE0_RX (0x1u)
-#define EMAC_INT_CORE1_RX (0x5u)
-#define EMAC_INT_CORE2_RX (0x9u)
-
-/*
-** Macros which can be passed as eoiFlag to EMACTxIntAckToClear API
-*/
-#define EMAC_INT_CORE0_TX (0x2u)
-#define EMAC_INT_CORE1_TX (0x6u)
-#define EMAC_INT_CORE2_TX (0xAu)
-
-/*****************************************************************************/
-/*
-** Prototypes for the APIs
-*/
-extern void EMACTxIntPulseEnable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel);
-extern void EMACTxIntPulseDisable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel);
-extern void EMACRxIntPulseEnable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel);
-extern void EMACRxIntPulseDisable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel);
-extern void EMACRMIISpeedSet(unsigned int emacBase, unsigned int speed);
-extern void EMACDuplexSet(unsigned int emacBase, unsigned int duplexMode);
-extern void EMACTxEnable(unsigned int emacBase);
-extern void EMACRxEnable(unsigned int emacBase);
-extern void EMACTxHdrDescPtrWrite(unsigned int emacBase, unsigned int descHdr,
- unsigned int channel);
-extern void EMACRxHdrDescPtrWrite(unsigned int emacBase, unsigned int descHdr,
- unsigned int channel);
-extern void EMACInit(unsigned int emacCtrlBase, unsigned int emacBase);
-extern void EMACMACSrcAddrSet(unsigned int emacBase, unsigned char *macAddr);
-extern void EMACMACAddrSet(unsigned int emacBase, unsigned int channel,
- unsigned char *macAddr, unsigned int matchFilt);
-extern void EMACMIIEnable(unsigned int emacBase);
-extern void EMACRxUnicastSet(unsigned int emacBase, unsigned int channel);
-extern void EMACCoreIntAck(unsigned int emacBase, unsigned int eoiFlag);
-extern void EMACTxCPWrite(unsigned int emacBase, unsigned int channel,
- unsigned int comPtr);
-extern uint32_t EMACTxCPRead(unsigned int emacBase, unsigned int channel);
-
-extern void EMACRxCPWrite(unsigned int emacBase, unsigned int channel,
- unsigned int comPtr);
-extern void EMACRxBroadCastEnable(unsigned int emacBase, unsigned int channel);
-extern void EMACRxPromiscEnable(unsigned int emacBase, unsigned int channel);
-extern void EMACNumFreeBufSet(unsigned int emacBase, unsigned int channel,
- unsigned int nBuf);
-extern unsigned int EMACIntVectorGet(unsigned int emacBase);
-unsigned int EMACIntVectorRawGet(unsigned int emacBase);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __EMAC_H__ */
+++ /dev/null
-/** @file emif.h
-* @brief emif Driver Definition File
-* @date 15.Feb.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#ifndef _EMIF_H_
-#define _EMIF_H_
-
-#include "base.h"
-
-/** @enum emif_pins
-* @brief Alias for emif pins
-*
-*/
-enum emif_pins
-{
- emif_wait_pin0 = 0,
- emif_wait_pin1 = 1
-};
-
-
-/** @enum emif_size
-* @brief Alias for emif page size
-*
-*/
-enum emif_size
-{
- elements_256 = 0,
- elements_512 = 1,
- elements_1024 = 2,
- elements_2048 = 3
-};
-
-/** @enum emif_port
-* @brief Alias for emif port
-*
-*/
-enum emif_port
-{
- emif_8_bit_port = 0,
- emif_16_bit_port = 1
-};
-
-
-/** @enum emif_pagesize
-* @brief Alias for emif pagesize
-*
-*/
-enum emif_pagesize
-{
- emif_4_words = 0,
- emif_8_words = 1
-};
-
-/** @enum emif_wait_polarity
-* @brief Alias for emif wait polarity
-*
-*/
-enum emif_wait_polarity
-{
- emif_pin_low = 0,
- emif_pin_high = 1
-};
-
-
-#define PTR (uint32_t *)(0x80000000)
-
-/** @struct emifBASE_t
-* @brief emifBASE Register Definition
-*
-* This structure is used to access the EMIF module egisters.
-*/
-typedef volatile struct emifBase
-{
- uint32_t MIDR; /**< 0x0000 Module ID Register */
- uint32_t AWCC; /**< 0x0004 Asynchronous wait cycle register*/
- uint32_t SDCR; /**< 0x0008 SDRAM configuratiopn register */
- uint32_t SDRCR ; /**< 0x000C Set Interrupt Enable Register */
- uint32_t CE2CFG; /**< 0x0010 Asynchronous 1 Configuration Register */
- uint32_t CE3CFG; /**< 0x0014 Asynchronous 2 Configuration Register */
- uint32_t CE4CFG; /**< 0x0018 Asynchronous 3 Configuration Register */
- uint32_t CE5CFG; /**< 0x001C Asynchronous 4 Configuration Register */
- uint32_t SDTIMR; /**< 0x0020 SDRAM Timing Register */
- uint32_t dummy1[6]; /** reserved **/
- uint32_t SDSRETR; /**< 0x003c SDRAM Self Refresh Exit Timing Register */
- uint32_t INTRAW; /**< 0x0040 0x0020 Interrupt Vector Offset*/
- uint32_t INTMSK; /**< 0x0044 EMIF Interrupt Mask Register */
- uint32_t INTMSKSET; /**< 48 EMIF Interrupt Mask Set Register */
- uint32_t INTMSKCLR; /**< 0x004c EMIF Interrupt Mask Register */
- uint32_t dummy2[6]; /** reserved **/
- uint32_t PMCR; /**< 0x0068 Page Mode Control Register*/
-
-} emifBASE_t;
-
-#define emifREG ((emifBASE_t *)0xFCFFE800U)
-
-/* EMIF Interface Functions */
-
-void emif_SDRAMInit(void);
-void emif_ASYNC1Init(void);
-void emif_ASYNC2Init(void);
-void emif_ASYNC3Init(void);
-
-
-#endif /*EMIF_H_*/
+++ /dev/null
-/** @file esm.h
-* @brief Error Signaling Module Driver Header File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Definitions
-* - Types
-* .
-* which are relevant for the Esm driver.
-*/
-
-/* (c) Texas Instruments 2010, All rights reserved. */
-
-#ifndef __ESM_H__
-#define __ESM_H__
-
-#include "base.h"
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* ESM General Definitions */
-
-/** @def esmGROUP1
-* @brief Alias name for ESM group 1
-*
-* This is an alias name for the ESM group 1.
-*
-* @note This value should be used for API argument @a group
-*/
-#define esmGROUP1 0U
-
-/** @def esmGROUP2
-* @brief Alias name for ESM group 2
-*
-* This is an alias name for the ESM group 2.
-*
-* @note This value should be used for API argument @a group
-*/
-#define esmGROUP2 1U
-
-/** @def esmGROUP3
-* @brief Alias name for ESM group 3
-*
-* This is an alias name for the ESM group 3.
-*
-* @note This value should be used for API argument @a group
-*/
-#define esmGROUP3 2U
-
-/** @def esmCHANNEL0
-* @brief Alias name for ESM group x channel 0
-*
-* This is an alias name for the ESM group x channel 0.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL0 0x0000000000000001ULL
-
-/** @def esmCHANNEL1
-* @brief Alias name for ESM group x channel 1
-*
-* This is an alias name for the ESM group x channel 1.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL1 0x0000000000000002ULL
-
-/** @def esmCHANNEL2
-* @brief Alias name for ESM group x channel 2
-*
-* This is an alias name for the ESM group x channel 2.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL2 0x0000000000000004ULL
-
-/** @def esmCHANNEL3
-* @brief Alias name for ESM group x channel 3
-*
-* This is an alias name for the ESM group x channel 3.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL3 0x0000000000000008ULL
-
-/** @def esmCHANNEL4
-* @brief Alias name for ESM group x channel 4
-*
-* This is an alias name for the ESM group x channel 4.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL4 0x0000000000000010ULL
-
-/** @def esmCHANNEL5
-* @brief Alias name for ESM group x channel 5
-*
-* This is an alias name for the ESM group x channel 5.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL5 0x0000000000000020ULL
-
-/** @def esmCHANNEL6
-* @brief Alias name for ESM group x channel 6
-*
-* This is an alias name for the ESM group x channel 6.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL6 0x0000000000000040ULL
-
-/** @def esmCHANNEL7
-* @brief Alias name for ESM group x channel 7
-*
-* This is an alias name for the ESM group x channel 7.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL7 0x0000000000000080ULL
-
-/** @def esmCHANNEL8
-* @brief Alias name for ESM group x channel 8
-*
-* This is an alias name for the ESM group x channel 8.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL8 0x0000000000000100ULL
-
-/** @def esmCHANNEL9
-* @brief Alias name for ESM group x channel 9
-*
-* This is an alias name for the ESM group x channel 9.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL9 0x0000000000000200ULL
-
-/** @def esmCHANNEL10
-* @brief Alias name for ESM group x channel 10
-*
-* This is an alias name for the ESM group x channel 10.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL10 0x0000000000000400ULL
-
-/** @def esmCHANNEL11
-* @brief Alias name for ESM group x channel 11
-*
-* This is an alias name for the ESM group x channel 11.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL11 0x0000000000000800ULL
-
-/** @def esmCHANNEL12
-* @brief Alias name for ESM group x channel 12
-*
-* This is an alias name for the ESM group x channel 12.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL12 0x0000000000001000ULL
-
-/** @def esmCHANNEL13
-* @brief Alias name for ESM group x channel 13
-*
-* This is an alias name for the ESM group x channel 13.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL13 0x0000000000002000ULL
-
-/** @def esmCHANNEL14
-* @brief Alias name for ESM group x channel 14
-*
-* This is an alias name for the ESM group x channel 14.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL14 0x0000000000004000ULL
-
-/** @def esmCHANNEL15
-* @brief Alias name for ESM group x channel 15
-*
-* This is an alias name for the ESM group x channel 15.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL15 0x0000000000008000ULL
-
-/** @def esmCHANNEL16
-* @brief Alias name for ESM group x channel 16
-*
-* This is an alias name for the ESM group x channel 16.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL16 0x0000000000010000ULL
-
-/** @def esmCHANNEL17
-* @brief Alias name for ESM group x channel 17
-*
-* This is an alias name for the ESM group x channel 17.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL17 0x0000000000020000ULL
-
-/** @def esmCHANNEL18
-* @brief Alias name for ESM group x channel 18
-*
-* This is an alias name for the ESM group x channel 18.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL18 0x0000000000040000ULL
-
-/** @def esmCHANNEL19
-* @brief Alias name for ESM group x channel 19
-*
-* This is an alias name for the ESM group x channel 19.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL19 0x0000000000080000ULL
-
-/** @def esmCHANNEL20
-* @brief Alias name for ESM group x channel 20
-*
-* This is an alias name for the ESM group x channel 20.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL20 0x0000000000100000ULL
-
-/** @def esmCHANNEL21
-* @brief Alias name for ESM group x channel 21
-*
-* This is an alias name for the ESM group x channel 21.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL21 0x0000000000200000ULL
-
-/** @def esmCHANNEL22
-* @brief Alias name for ESM group x channel 22
-*
-* This is an alias name for the ESM group x channel 22.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL22 0x0000000000400000ULL
-
-/** @def esmCHANNEL23
-* @brief Alias name for ESM group x channel 23
-*
-* This is an alias name for the ESM group x channel 23.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL23 0x0000000000800000ULL
-
-/** @def esmCHANNEL24
-* @brief Alias name for ESM group x channel 24
-*
-* This is an alias name for the ESM group x channel 24.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL24 0x0000000001000000ULL
-
-/** @def esmCHANNEL25
-* @brief Alias name for ESM group x channel 25
-*
-* This is an alias name for the ESM group x channel 25.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL25 0x0000000002000000ULL
-
-/** @def esmCHANNEL26
-* @brief Alias name for ESM group x channel 26
-*
-* This is an alias name for the ESM group x channel 26.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL26 0x0000000004000000ULL
-
-/** @def esmCHANNEL27
-* @brief Alias name for ESM group x channel 27
-*
-* This is an alias name for the ESM group x channel 27.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL27 0x0000000008000000ULL
-
-/** @def esmCHANNEL28
-* @brief Alias name for ESM group x channel 28
-*
-* This is an alias name for the ESM group x channel 28.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL28 0x0000000010000000ULL
-
-/** @def esmCHANNEL29
-* @brief Alias name for ESM group x channel 29
-*
-* This is an alias name for the ESM group x channel 29.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL29 0x0000000020000000ULL
-
-/** @def esmCHANNEL30
-* @brief Alias name for ESM group x channel 30
-*
-* This is an alias name for the ESM group x channel 30.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL30 0x0000000040000000ULL
-
-/** @def esmCHANNEL31
-* @brief Alias name for ESM group x channel 31
-*
-* This is an alias name for the ESM group x channel 31.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL31 0x0000000080000000ULL
-
-/** @def esmCHANNEL32
-* @brief Alias name for ESM group x channel 32
-*
-* This is an alias name for the ESM group x channel 32.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL32 0x0000000100000000ULL
-
-/** @def esmCHANNEL33
-* @brief Alias name for ESM group x channel 33
-*
-* This is an alias name for the ESM group x channel 33.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL33 0x0000000200000000ULL
-
-/** @def esmCHANNEL34
-* @brief Alias name for ESM group x channel 34
-*
-* This is an alias name for the ESM group x channel 34.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL34 0x0000000400000000ULL
-
-/** @def esmCHANNEL35
-* @brief Alias name for ESM group x channel 35
-*
-* This is an alias name for the ESM group x channel 35.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL35 0x0000000800000000ULL
-
-/** @def esmCHANNEL36
-* @brief Alias name for ESM group x channel 36
-*
-* This is an alias name for the ESM group x channel 36.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL36 0x0000001000000000ULL
-
-/** @def esmCHANNEL37
-* @brief Alias name for ESM group x channel 37
-*
-* This is an alias name for the ESM group x channel 37.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL37 0x0000002000000000ULL
-
-/** @def esmCHANNEL38
-* @brief Alias name for ESM group x channel 38
-*
-* This is an alias name for the ESM group x channel 38.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL38 0x0000004000000000ULL
-
-/** @def esmCHANNEL39
-* @brief Alias name for ESM group x channel 39
-*
-* This is an alias name for the ESM group x channel 39.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL39 0x0000008000000000ULL
-
-/** @def esmCHANNEL40
-* @brief Alias name for ESM group x channel 40
-*
-* This is an alias name for the ESM group x channel 40.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL40 0x0000010000000000ULL
-
-/** @def esmCHANNEL41
-* @brief Alias name for ESM group x channel 41
-*
-* This is an alias name for the ESM group x channel 41.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL41 0x0000020000000000ULL
-
-/** @def esmCHANNEL42
-* @brief Alias name for ESM group x channel 42
-*
-* This is an alias name for the ESM group x channel 42.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL42 0x0000040000000000ULL
-
-/** @def esmCHANNEL43
-* @brief Alias name for ESM group x channel 43
-*
-* This is an alias name for the ESM group x channel 43.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL43 0x0000080000000000ULL
-
-/** @def esmCHANNEL44
-* @brief Alias name for ESM group x channel 44
-*
-* This is an alias name for the ESM group x channel 44.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL44 0x0000100000000000ULL
-
-/** @def esmCHANNEL45
-* @brief Alias name for ESM group x channel 45
-*
-* This is an alias name for the ESM group x channel 45.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL45 0x0000200000000000ULL
-
-/** @def esmCHANNEL46
-* @brief Alias name for ESM group x channel 46
-*
-* This is an alias name for the ESM group x channel 46.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL46 0x0000400000000000ULL
-
-/** @def esmCHANNEL47
-* @brief Alias name for ESM group x channel 47
-*
-* This is an alias name for the ESM group x channel 47.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL47 0x0000800000000000ULL
-
-/** @def esmCHANNEL48
-* @brief Alias name for ESM group x channel 48
-*
-* This is an alias name for the ESM group x channel 48.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL48 0x0001000000000000ULL
-
-/** @def esmCHANNEL49
-* @brief Alias name for ESM group x channel 49
-*
-* This is an alias name for the ESM group x channel 49.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL49 0x0002000000000000ULL
-
-/** @def esmCHANNEL50
-* @brief Alias name for ESM group x channel 50
-*
-* This is an alias name for the ESM group x channel 50.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL50 0x0004000000000000ULL
-
-/** @def esmCHANNEL51
-* @brief Alias name for ESM group x channel 51
-*
-* This is an alias name for the ESM group x channel 51.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL51 0x0008000000000000ULL
-
-/** @def esmCHANNEL52
-* @brief Alias name for ESM group x channel 52
-*
-* This is an alias name for the ESM group x channel 52.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL52 0x0010000000000000ULL
-
-/** @def esmCHANNEL53
-* @brief Alias name for ESM group x channel 53
-*
-* This is an alias name for the ESM group x channel 53.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL53 0x0020000000000000ULL
-
-/** @def esmCHANNEL54
-* @brief Alias name for ESM group x channel 54
-*
-* This is an alias name for the ESM group x channel 54.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL54 0x0040000000000000ULL
-
-/** @def esmCHANNEL55
-* @brief Alias name for ESM group x channel 55
-*
-* This is an alias name for the ESM group x channel 55.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL55 0x0080000000000000ULL
-
-/** @def esmCHANNEL56
-* @brief Alias name for ESM group x channel 56
-*
-* This is an alias name for the ESM group x channel 56.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL56 0x0100000000000000ULL
-
-/** @def esmCHANNEL57
-* @brief Alias name for ESM group x channel 57
-*
-* This is an alias name for the ESM group x channel 57.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL57 0x0200000000000000ULL
-
-/** @def esmCHANNEL58
-* @brief Alias name for ESM group x channel 58
-*
-* This is an alias name for the ESM group x channel 58.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL58 0x0400000000000000ULL
-
-/** @def esmCHANNEL59
-* @brief Alias name for ESM group x channel 59
-*
-* This is an alias name for the ESM group x channel 59.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL59 0x0800000000000000ULL
-
-/** @def esmCHANNEL60
-* @brief Alias name for ESM group x channel 60
-*
-* This is an alias name for the ESM group x channel 60.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL60 0x1000000000000000ULL
-
-/** @def esmCHANNEL61
-* @brief Alias name for ESM group x channel 61
-*
-* This is an alias name for the ESM group x channel 61.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL61 0x2000000000000000ULL
-
-/** @def esmCHANNEL62
-* @brief Alias name for ESM group x channel 62
-*
-* This is an alias name for the ESM group x channel 62.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL62 0x4000000000000000ULL
-
-/** @def esmCHANNEL63
-* @brief Alias name for ESM group x channel 63
-*
-* This is an alias name for the ESM group x channel 63.
-*
-* @note This value should be used for API argument @a channel
-*/
-#define esmCHANNEL63 0x8000000000000000ULL
-
-
-
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/* Esm Register Frame Definition */
-/** @struct esmBase
-* @brief Esm Register Frame Definition
-*
-* This type is used to access the Esm Registers.
-*/
-/** @typedef esmBASE_t
-* @brief Esm Register Frame Type Definition
-*
-* This type is used to access the Esm Registers.
-*/
-typedef volatile struct esmBase
-{
- uint32_t EPENASET1; /* 0x0000 */
- uint32_t EPENACLR1; /* 0x0004 */
- uint32_t INTENASET1; /* 0x0008 */
- uint32_t INTENACLR1; /* 0x000C */
- uint32_t INTLVLSET1; /* 0x0010 */
- uint32_t INTLVLCLR1; /* 0x0014 */
- uint32_t ESTATUS1[3U]; /* 0x0018, 0x001C, 0x0020 */
- uint32_t EPSTATUS; /* 0x0024 */
- uint32_t INTOFFH; /* 0x0028 */
- uint32_t INTOFFL; /* 0x002C */
- uint32_t LTC; /* 0x0030 */
- uint32_t LTCPRELOAD; /* 0x0034 */
- uint32_t KEY; /* 0x0038 */
- uint32_t ESTATUS2EMU; /* 0x003C */
- uint32_t EPENASET4; /* 0x0040 */
- uint32_t EPENACLR4; /* 0x0044 */
- uint32_t INTENASET4; /* 0x0048 */
- uint32_t INTENACLR4; /* 0x004C */
- uint32_t INTLVLSET4; /* 0x0050 */
- uint32_t INTLVLCLR4; /* 0x0054 */
- uint32_t ESTATUS4[3U]; /* 0x0058, 0x005C, 0x0060 */
- uint32_t ESTATUS5EMU; /* 0x0064 */
-} esmBASE_t;
-
-/** @def esmREG
-* @brief Esm Register Frame Pointer
-*
-* This pointer is used by the Esm driver to access the Esm registers.
-*/
-#define esmREG ((esmBASE_t *)0xFFFFF500U)
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-
-/* Esm Interface Functions */
-void esmInit(void);
-uint32_t esmError(void);
-void esmEnableError(uint64_t channels);
-void esmDisableError(uint64_t channels);
-void esmTriggerErrorPinReset(void);
-void esmActivateNormalOperation(void);
-void esmEnableInterrupt(uint64_t channels);
-void esmDisableInterrupt(uint64_t channels);
-void esmSetInterruptLevel(uint64_t channels, uint64_t flags);
-void esmClearStatus(uint32_t group, uint64_t channels);
-void esmClearStatusBuffer(uint64_t channels);
-void esmSetCounterPreloadValue(uint32_t value);
-
-uint64_t esmGetStatus(uint32_t group, uint64_t channels);
-uint64_t esmGetStatusBuffer(uint64_t channels);
-
-
-/** @fn void esmGroup1Notification(uint32_t channel)
-* @brief Interrupt callback
-* @param[in] channel - Group 1 channel
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is group 1 channel caused the interrupt.
-*/
-void esmGroup1Notification(uint32_t channel);
-
-
-/** @fn void esmGroup2Notification(uint32_t channel)
-* @brief Interrupt callback
-* @param[in] channel - Group 2 channel
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is group 2 channel caused the interrupt.
-*/
-void esmGroup2Notification(uint32_t channel);
-
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-
-#endif
+++ /dev/null
-/*
- * ti_drv_fray.h
- *
- * Created on: 12.4.2013
- * Author: Michal Horn
- */
-
-#ifndef TI_DRV_FRAY_H_
-#define TI_DRV_FRAY_H_
-
-// Conflicts with types.h SUCCESS and FAILURE definitions
-// And seems they aren't used anyway.
-//#define SUCCESS 0
-//#define FAILURE 1
-
-// CMD constants (SUCC1)
-//
-#define CMD_command_not_accepted 0x0
-#define CMD_CONFIG 0x1
-#define CMD_READY 0x2
-#define CMD_WAKEUP 0x3
-#define CMD_RUN 0x4
-#define CMD_ALL_SLOTS 0x5
-#define CMD_HALT 0x6
-#define CMD_FREEZE 0x7
-#define CMD_SEND_MTS 0x8
-#define CMD_ALLOW_COLDSTART 0x9
-#define CMD_RESET_STATUS_INDICATORS 0xA
-#define CMD_MONITOR_MODE 0xB
-#define CMD_CLEAR_RAMS 0xC
-#define CMD_ASYNCHRONOUS_TRANSFER_MODE 0xE
-
-
-typedef volatile struct fray_registers
-{
-/* ------------------------------------------------------------------------- */
-/* FRAY_ST */
-/* Definition of the FLEXRAY register map */
-
-unsigned : 32; /* Customer CPU Interface */
-unsigned : 32; /* Customer CPU Interface */
-unsigned : 32; /* Customer CPU Interface */
-unsigned : 32; /* Customer CPU Interface */
-
-
-/* Special Registers */
-/* Test Register 1 */
-/* 0x10 */
-union test1
-{
- unsigned long TEST1_UL;
- struct
- {
- unsigned : 5;
- unsigned mt_B1 : 1; /* Control of Bus Guardian Macrotick Pin */
- unsigned bgt_B1 : 1; /* Control of Bus Guardian Tick Pin */
- unsigned arm_B1 : 1; /* Control of Bus Guardian ARM Pin */
- unsigned bgeb_B1 : 1; /* Monitor Channel B Bus Guardian Enable Pin */
- unsigned bgea_B1 : 1; /* Monitor Channel A Bus Guardian Enable Pin */
- unsigned txenb_B1 : 1; /* Control of Channel B Transmit Enable Pin */
- unsigned txena_B1 : 1; /* Control of Channel A Transmit Enable Pin */
- unsigned txb_B1 : 1; /* Control of Channel B Transmit Pin */
- unsigned txa_B1 : 1; /* Control of Channel A Transmit Pin */
- unsigned rxb_B1 : 1; /* Monitor Channel B Receive Pin */
- unsigned rxa_B1 : 1; /* Monitor Channel A Receive Pin */
- unsigned : 10;
- unsigned tmc_B2 : 2; /* Test Mode Control */
- unsigned : 3;
- unsigned wrten_B1 : 1; /* Write Test Register Enable */
- } TEST1_ST;
-} TEST1_UN;
-
-
-/* Test Register 2 */
-/* 0x14 */
-union test2
-{
- unsigned long TEST2_UL;
- struct
- {
- unsigned : 16;
- unsigned rdpb_B1 : 1;
- unsigned wrpb_B1 : 1;
- unsigned : 7;
- unsigned ssel_B3 : 3;
- unsigned : 1;
- unsigned rs_B3 : 3;
- } TEST2_ST;
-} TEST2_UN;
-
-
-unsigned : 32;
-
-
-/* Lock Register */
-/* 0x1C */
-union lck
-{
- unsigned long LCK_UL;
- struct
- {
- unsigned : 16;
- unsigned tmk_B8 : 8;
- unsigned clk_B8 : 8;
- } LCK_ST;
-} LCK_UN;
-
-
-/* Interrupt Registers */
-/* Error Input Register */
-/* 0x20 */
-union eir
-{
- unsigned long EIR_UL;
- struct
- {
- unsigned : 5;
- unsigned smeb_B1 : 1;
- unsigned ltvb_B1 : 1;
- unsigned edb_B1 : 1;
- unsigned : 5;
- unsigned smea_B1 : 1;
- unsigned ltva_B1 : 1;
- unsigned eda_B1 : 1;
- unsigned : 8;
- unsigned rfo_B1 : 1;
- unsigned perr_B1 : 1;
- unsigned : 1;
- unsigned ccf_B1 : 1;
- unsigned sfo_B1 : 1;
- unsigned sfbm_B1 : 1;
- unsigned cna_B1 : 1;
- unsigned pemc_B1 : 1;
- } EIR_ST;
-} EIR_UN;
-
-
-/* Status Interrupt Register */
-/* 0x24 */
-union sir
-{
- unsigned long SIR_UL;
- struct
- {
- unsigned : 6;
- unsigned mtsb_B1 : 1;
- unsigned wupb_B1 : 1;
- unsigned : 6;
- unsigned mtsa_B1 : 1;
- unsigned wupa_B1 : 1;
- unsigned : 2;
- unsigned sucs_B1 : 1;
- unsigned swe_B1 : 1;
- unsigned tobc_B1 : 1;
- unsigned tibc_B1 : 1;
- unsigned ti1_B1 : 1;
- unsigned ti0_B1 : 1;
- unsigned nmvc_B1 : 1;
- unsigned rff_B1 : 1;
- unsigned rfne_B1 : 1;
- unsigned rxi_B1 : 1;
- unsigned txi_B1 : 1;
- unsigned cycs_B1 : 1;
- unsigned cas_B1 : 1;
- unsigned wst_B1 : 1;
- } SIR_ST;
-} SIR_UN;
-
-
-/* Error Interrupt Line Select */
-/* 0x28 */
-union eils
-{
- unsigned long EILS_UL;
- struct
- {
- unsigned : 5;
- unsigned smebl_B1 : 1;
- unsigned ltvbl_B1 : 1;
- unsigned edbl_B1 : 1;
- unsigned : 5;
- unsigned smeal_B1 : 1;
- unsigned ltval_B1 : 1;
- unsigned edal_B1 : 1;
- unsigned : 8;
- unsigned rfol_B1 : 1;
- unsigned perrl_B1 : 1;
- unsigned : 1;
- unsigned ccfl_B1 : 1;
- unsigned sfol_B1 : 1;
- unsigned sfbml_B1 : 1;
- unsigned cnal_B1 : 1;
- unsigned pemcl_B1 : 1;
- } EILS_ST;
-} EILS_UN;
-
-
-/* Status Interrupt Line Select */
-/* 0x2C */
-union sils
-{
- unsigned long SILS_UL;
- struct
- {
- unsigned : 6;
- unsigned mtsbl_B1 : 1;
- unsigned wupbl_B1 : 1;
- unsigned : 6;
- unsigned mtsal_B1 : 1;
- unsigned wupal_B1 : 1;
- unsigned : 2;
- unsigned sucsl_B1 : 1;
- unsigned swel_B1 : 1;
- unsigned tobcl_B1 : 1;
- unsigned tibcl_B1 : 1;
- unsigned ti1l_B1 : 1;
- unsigned ti0l_B1 : 1;
- unsigned nmvcl_B1 : 1;
- unsigned rffl_B1 : 1;
- unsigned rfnel_B1 : 1;
- unsigned rxil_B1 : 1;
- unsigned txil_B1 : 1;
- unsigned cycsl_B1 : 1;
- unsigned casl_B1 : 1;
- unsigned wstl_B1 : 1;
- } SILS_ST;
-} SILS_UN;
-
-
-/* Error Interrupt Enable Set */
-/* 0x30 */
-union eies
-{
- unsigned long EIES_UL;
- struct
- {
- unsigned : 5;
- unsigned smebe_B1 : 1;
- unsigned ltvbe_B1 : 1;
- unsigned edbe_B1 : 1;
- unsigned : 5;
- unsigned smeae_B1 : 1;
- unsigned ltvae_B1 : 1;
- unsigned edae_B1 : 1;
- unsigned : 8;
- unsigned rfoe_B1 : 1;
- unsigned perre_B1 : 1;
- unsigned : 1;
- unsigned ccfe_B1 : 1;
- unsigned sfoe_B1 : 1;
- unsigned sfbme_B1 : 1;
- unsigned cnae_B1 : 1;
- unsigned pemce_B1 : 1;
- } EIES_ST;
-} EIES_UN;
-
-
-/* Error Interrupt Enable Reset */
-/* 0x34 */
-union eier
-{
- unsigned long EIER_UL;
- struct
- {
- unsigned : 5;
- unsigned smebe_B1 : 1;
- unsigned ltvbe_B1 : 1;
- unsigned edbe_B1 : 1;
- unsigned : 5;
- unsigned smeae_B1 : 1;
- unsigned ltvae_B1 : 1;
- unsigned edae_B1 : 1;
- unsigned : 8;
- unsigned rfoe_B1 : 1;
- unsigned perre_B1 : 1;
- unsigned : 1;
- unsigned ccfe_B1 : 1;
- unsigned sfoe_B1 : 1;
- unsigned sfbme_B1 : 1;
- unsigned cnae_B1 : 1;
- unsigned pemce_B1 : 1;
- } EIER_ST;
-} EIER_UN;
-
-
-/* Status Interrupt Enable Set */
-/* 0x38 */
-union sies
-{
- unsigned long SIES_UL;
- struct
- {
- unsigned : 6;
- unsigned mtsbe_B1 : 1;
- unsigned wupbe_B1 : 1;
- unsigned : 6;
- unsigned mtsae_B1 : 1;
- unsigned wupae_B1 : 1;
- unsigned : 2;
- unsigned sucse_B1 : 1;
- unsigned swee_B1 : 1;
- unsigned tobce_B1 : 1;
- unsigned tibce_B1 : 1;
- unsigned ti1e_B1 : 1;
- unsigned ti0e_B1 : 1;
- unsigned nmvce_B1 : 1;
- unsigned rffe_B1 : 1;
- unsigned rfnee_B1 : 1;
- unsigned rxie_B1 : 1;
- unsigned txie_B1 : 1;
- unsigned cycse_B1 : 1;
- unsigned case_B1 : 1;
- unsigned wste_B1 : 1;
- } SIES_ST;
-} SIES_UN;
-
-
-/* Status Interrupt Enable Reset */
-/* 0x3C */
-union sier
-{
- unsigned long SIER_UL;
- struct
- {
- unsigned : 6;
- unsigned mtsbe_B1 : 1;
- unsigned wupbe_B1 : 1;
- unsigned : 6;
- unsigned mtsae_B1 : 1;
- unsigned wupae_B1 : 1;
- unsigned : 2;
- unsigned sucse_B1 : 1;
- unsigned swee_B1 : 1;
- unsigned tobce_B1 : 1;
- unsigned tibce_B1 : 1;
- unsigned ti1e_B1 : 1;
- unsigned ti0e_B1 : 1;
- unsigned nmvce_B1 : 1;
- unsigned rffe_B1 : 1;
- unsigned rfnee_B1 : 1;
- unsigned rxie_B1 : 1;
- unsigned txie_B1 : 1;
- unsigned cycse_B1 : 1;
- unsigned case_B1 : 1;
- unsigned wste_B1 : 1;
- } SIER_ST;
-} SIER_UN;
-
-
-/* Interrupt Line Enable */
-/* 0x40 */
-union ile
-{
- unsigned long ILE_UL;
- struct
- {
- unsigned : 30;
- unsigned eint1_B1 : 1;
- unsigned eint0_B1 : 1;
- } ILE_ST;
-} ILE_UN;
-
-
-/* Timer 0 Configuration */
-/* 0x44 */
-union t0c
-{
- unsigned long T0C_UL;
- struct
- {
- unsigned : 2;
- unsigned t0mo_B14 : 14;
- unsigned : 1;
- unsigned t0cc_B7 : 7;
- unsigned : 6;
- unsigned t0ms_B1 : 1;
- unsigned t0rc_B1 : 1;
- } T0C_ST;
-} T0C_UN;
-
-
-/* Timer 1 Configuration */
-/* 0x48 */
-union t1c
-{
- unsigned long T1C_UL;
- struct
- {
- unsigned : 2;
- unsigned t1mc_B14 : 14;
- unsigned : 14;
- unsigned t1ms_B1 : 1;
- unsigned t1rc_B1 : 1;
- } T1C_ST;
-} T1C_UN;
-
-
-/* Stop Watch Register */
-/* 0x4C */
-union stpw
-{
- unsigned long STPW_UL;
- struct
- {
- unsigned : 2;
- unsigned smtv_B14 : 14;
- unsigned : 2;
- unsigned sccv_B6 : 6;
- unsigned : 4;
- unsigned sswt_B1 : 1;
- unsigned edge_B1 : 1;
- unsigned swms_B1 : 1;
- unsigned eswt_B1 : 1;
- } STPW_ST;
-} STPW_UN;
-
-
-unsigned long RES1[12]; /* Reserved */
-
-
-/* CC Control Registers */
-/* SUC Configuration Register 1 */
-/* 0x80 */
-union succ1
-{
- unsigned long SUCC1_UL;
- struct
- {
- unsigned : 4;
- unsigned cchb_B1 : 1;
- unsigned ccha_B1 : 1;
- unsigned mtsb_B1 : 1;
- unsigned mtsa_B1 : 1;
- unsigned hcse_B1 : 1;
- unsigned tsm_B1 : 1;
- unsigned wucs_B1 : 1;
- unsigned pta_B5 : 5;
- unsigned csa_B5 : 5;
- unsigned : 1;
- unsigned txsy_B1 : 1;
- unsigned txst_B1 : 1;
- unsigned pbsy_B1 : 1;
- unsigned : 3;
- unsigned cmd_B4 : 4;
- } SUCC1_ST;
-} SUCC1_UN;
-
-
-/* SUC Configuration Register 2 */
-/* 0x84 */
-union succ2
-{
- unsigned long SUCC2_UL;
- struct
- {
- unsigned : 4;
- unsigned ltn_B4 : 4;
- unsigned : 3;
- unsigned lt_B21 : 21;
- } SUCC2_ST;
-} SUCC2_UN;
-
-
-/* SUC Configuration Register 3 */
-/* 0x88 */
-union succ3
-{
- unsigned long SUCC3_UL;
- struct
- {
- unsigned : 24;
- unsigned wcf_B4 : 4;
- unsigned wcp_B4 : 4;
- } SUCC3_ST;
-} SUCC3_UN;
-
-
-/* NEM Configuration Register */
-/* 0x8C */
-union nemc
-{
- unsigned long NEMC_UL;
- struct
- {
- unsigned : 28;
- unsigned nml_B4 : 4;
- } NEMC_ST;
-} NEMC_UN;
-
-
-/* PRT Configuration Register 1 */
-/* 0x90 */
-union prtc1
-{
- unsigned long PRTC1_UL;
- struct
- {
- unsigned rwp_B6 : 6;
- unsigned : 1;
- unsigned rxw_B9 : 9;
- unsigned brp_B2 : 2;
- unsigned : 10;
- unsigned tsst_B4 : 4;
- } PRTC1_ST;
-} PRTC1_UN;
-
-
-/* PRT Configuration Register 2 */
-/* 0x94 */
-union prtc2
-{
- unsigned long PRTC2_UL;
- struct
- {
- unsigned : 2;
- unsigned txl_B6 : 6;
- unsigned txi_B8 : 8;
- unsigned : 2;
- unsigned rxl_B6 : 6;
- unsigned : 2;
- unsigned rxi_B6 : 6;
- } PRTC2_ST;
-} PRTC2_UN;
-
-
-/* MHD Configuration Register */
-/* 0x98 */
-union mhdc
-{
- unsigned long MHDC_UL;
- struct
- {
- unsigned : 3;
- unsigned slt_B13 : 13;
- unsigned : 9;
- unsigned sfdl_B7 : 7;
- } MHDC_ST;
-} MHDC_UN;
-
-
-unsigned : 32;
-
-
-/* GTU Configuration Register 1 */
-/* 0xA0 */
-union gtuc1
-{
- unsigned long GTUC1_UL;
- struct
- {
- unsigned : 12;
- unsigned ut_B20 : 20;
- } GTUC1_ST;
-} GTUC1_UN;
-
-
-/* GTU Configuration Register 2 */
-/* 0xA4 */
-union gtuc2
-{
- unsigned long GTUC2_UL;
- struct
- {
- unsigned : 12;
- unsigned snm_B4 : 4;
- unsigned : 2;
- unsigned mpc_B14 : 14;
- } GTUC2_ST;
-} GTUC2_UN;
-
-
-/* GTU Configuration Register 3 */
-/* 0xA8 */
-union gtuc3
-{
- unsigned long GTUC3_UL;
- struct
- {
- unsigned : 10;
- unsigned mtio_B6 : 6;
- unsigned uiob_B8 : 8;
- unsigned uioa_B8 : 8;
- } GTUC3_ST;
-} GTUC3_UN;
-
-
-/* GTU Configuration Register 4 */
-/* 0xAC */
-union gtuc4
-{
- unsigned long GTUC4_UL;
- struct
- {
- unsigned : 2;
- unsigned ocs_B14 : 14;
- unsigned : 2;
- unsigned nit_B14 : 14;
- } GTUC4_ST;
-} GTUC4_UN;
-
-
-/* GTU Configuration Register 5 */
-/* 0xB0 */
-union gtuc5
-{
- unsigned long GTUC5_UL;
- struct
- {
- unsigned : 1;
- unsigned dcc_B7 : 7;
- unsigned : 3;
- unsigned cdd_B5 : 5;
- unsigned dcb_B8 : 8;
- unsigned dca_B8 : 8;
- } GTUC5_ST;
-} GTUC5_UN;
-
-
-/* GTU Configuration Register 6 */
-/* 0xB4 */
-union gtuc6
-{
- unsigned long GTUC6_UL;
- struct
- {
- unsigned : 5;
- unsigned mod_B11 : 11;
- unsigned : 5;
- unsigned asr_B11 : 11;
- } GTUC6_ST;
-} GTUC6_UN;
-
-
-/* GTU Configuration Register 7 */
-/* 0xB8 */
-union gtuc7
-{
- unsigned long GTUC7_UL;
- struct
- {
- unsigned : 6;
- unsigned nss_B10 : 10;
- unsigned : 5;
- unsigned ssl_B11 : 11;
- } GTUC7_ST;
-} GTUC7_UN;
-
-
-/* GTU Configuration Register 8 */
-/* 0xBC */
-union gtuc8
-{
- unsigned long GTUC8_UL;
- struct
- {
- unsigned : 3;
- unsigned nms_B13 : 13;
- unsigned : 10;
- unsigned msl_B6 : 6;
- } GTUC8_ST;
-} GTUC8_UN;
-
-
-/* GTU Configuration Register 9 */
-/* 0xC0 */
-union gtuc9
-{
- unsigned long GTUC9_UL;
- struct
- {
- unsigned : 14;
- unsigned dsi_B2 : 2;
- unsigned : 3;
- unsigned mapo_B5 : 5;
- unsigned : 3;
- unsigned apo_B5 : 5;
- } GTUC9_ST;
-} GTUC9_UN;
-
-
-/* GTU Configuration Register 10 */
-/* 0xC4 */
-union gtuc10
-{
- unsigned long GTUC10_UL;
- struct
- {
- unsigned : 5;
- unsigned mrc_B11 : 11;
- unsigned : 3;
- unsigned moc_B13 : 13;
- } GTUC10_ST;
-} GTUC10_UN;
-
-
-/* GTU Configuration Register 11 */
-/* 0xC8 */
-union gtuc11
-{
- unsigned long GTUC11_UL;
- struct
- {
- unsigned : 5;
- unsigned erc_B3 : 3;
- unsigned : 5;
- unsigned eoc_B3 : 3;
- unsigned : 14;
- unsigned ecc_B2 : 2;
- } GTUC11_ST;
-} GTUC11_UN;
-
-
-/* BGS Configuration Register */
-/* 0xCC */
-union bgs
-{
- unsigned long BGS_UL;
- struct
- {
- unsigned : 22;
- unsigned dse_B1 : 1;
- unsigned bgd_B1 : 1;
- unsigned : 2;
- unsigned bgt_B6 : 6;
- } BGS_ST;
-} BGS_UN;
-
-
-unsigned long RES2[12]; /* Reserved */
-
-
-/* CC Status Registers */
-/* CC Status Vector */
-/* 0x100 */
-union ccsv
-{
- unsigned long CCSV_UL;
- struct
- {
- unsigned : 8;
- unsigned rca_B5 : 5;
- unsigned wsv_B3 : 3;
- unsigned dcreq_B1 : 1;
- unsigned csi_B1 : 1;
- unsigned csai_B1 : 1;
- unsigned csni_B1 : 1;
- unsigned : 2;
- unsigned slm_B2 : 2;
- unsigned hrq_B1 : 1;
- unsigned fsi_B1 : 1;
- unsigned pocs_B6 : 6;
- } CCSV_ST;
-} CCSV_UN;
-
-
-/* CC Error Vector */
-/* 0x104 */
-union ccev
-{
- unsigned long CCEV_UL;
- struct
- {
- unsigned : 19;
- unsigned ptac_B5 : 5;
- unsigned errm_B2 : 2;
- unsigned : 2;
- unsigned ccfc_B4 : 4;
- } CCEV_ST;
-} CCEV_UN;
-
-
-unsigned : 32;
-unsigned : 32;
-
-
-/* Slot Counter Value */
-/* 0x110 */
-union scv
-{
- unsigned long SCV_UL;
- struct
- {
- unsigned : 5;
- unsigned sccb_B11 : 11;
- unsigned : 5;
- unsigned scca_B11 : 11;
- } SCV_ST;
-} SCV_UN;
-
-
-/* Macrotick and Cycle Counter Value */
-/* 0x114 */
-union mtccv
-{
- unsigned long MTCCV_UL;
- struct
- {
- unsigned : 10;
- unsigned ccv_B6 : 6;
- unsigned : 2;
- unsigned mtv_B14 : 14;
- } MTCCV_ST;
-} MTCCV_UN;
-
-
-/* Rate Correction Value */
-/* 0x118 */
-union rcv
-{
- unsigned long RCV_UL;
- struct
- {
- unsigned : 20;
- unsigned rcv_B12 : 12;
- } RCV_ST;
-} RCV_UN;
-
-
-/* Offset Correction Value */
-/* 0x11C */
-union ocv
-{
- unsigned long OCV_UL;
- struct
- {
- unsigned : 12;
- unsigned ocv_B14 : 20;
- } OCV_ST;
-} OCV_UN;
-
-
-/* Sync Frame Status */
-/* 0x120 */
-union sfs
-{
- unsigned long SFS_UL;
- struct
- {
- unsigned : 12;
- unsigned rclr_B1 : 1;
- unsigned mrcs_B1 : 1;
- unsigned olcr_B1 : 1;
- unsigned mocs_B1 : 1;
- unsigned vsbo_B4 : 4;
- unsigned vsbe_B4 : 4;
- unsigned vsao_B4 : 4;
- unsigned vsae_B4 : 4;
- } SFS_ST;
-} SFS_UN;
-
-
-/* Symbol Windows and NIT Status */
-/* 0x124 */
-union swnit
-{
- unsigned long SWNIT_UL;
- struct
- {
- unsigned : 20;
- unsigned sbnb_B1 : 1;
- unsigned senb_B1 : 1;
- unsigned sbna_B1 : 1;
- unsigned sena_B1 : 1;
- unsigned : 2;
- unsigned tcsb_B1 : 1;
- unsigned sbsb_B1 : 1;
- unsigned sesb_B1 : 1;
- unsigned tcsa_B1 : 1;
- unsigned sbsa_B1 : 1;
- unsigned sesa_B1 : 1;
- } SWNIT_ST;
-} SWNIT_UN;
-
-
-/* Aggregated Channel Status */
-/* 0x128 */
-union acs
-{
- unsigned long ACS_UL;
- struct
- {
- unsigned : 19;
- unsigned sbvb_B1 : 1;
- unsigned cib_B1 : 1;
- unsigned cedb_B1 : 1;
- unsigned sedb_B1 : 1;
- unsigned vfrb_B1 : 1;
- unsigned : 3;
- unsigned sbva_B1 : 1;
- unsigned cia_B1 : 1;
- unsigned ceda_B1 : 1;
- unsigned seda_B1 : 1;
- unsigned vfra_B1 : 1;
- } ACS_ST;
-} ACS_UN;
-
-
-unsigned : 32;
-
-
-/* Even Sync ID [1..15] */
-/* 0x130 .. 0x168 */
-unsigned long ESID_UL[15];
-
-
-unsigned : 32;
-
-
-/* Odd Sync ID [1..15] */
-/* 0x170 .. 0x1A8 */
-unsigned long OSID_UL[15];
-
-
-unsigned : 32;
-
-
-/* Network Management Vector 1 */
-/* 0x230 */
-union nmv1
-{
- unsigned long NMV1_UL;
-} NMV1_UN;
-
-
-/* Network Management Vector 2 */
-/* 0x234 */
-union nmv2
-{
-unsigned long NMV2_UL;
-} NMV2_UN;
-
-
-/* Network Management Vector 3 */
-/* 0x238 */
-unsigned long NMV3_UL;
-
-
-unsigned long RES3[81]; /* Reserved */
-
-
-/* Message Buffer Control Registers */
-/* Message RAM Configuration */
-/* 0x300 */
-union mrc
-{
- unsigned long MRC_UL;
- struct
- {
- unsigned : 9;
- unsigned lcb_B7 : 7;
- unsigned : 1;
- unsigned ffb_B7 : 7;
- unsigned : 1;
- unsigned fdb_B7 : 7;
- } MRC_ST;
-} MRC_UN;
-
-
-/* FIFO Rejection Filter */
-/* 0x304 */
-union frf
-{
- unsigned long FRF_UL;
- struct
- {
- unsigned : 7;
- unsigned rnf : 1;
- unsigned rss : 1;
- unsigned cyf_B7 : 7;
- unsigned : 3;
- unsigned fid_B11 : 11;
- unsigned ch_B2 : 2;
- } FRF_ST;
-} FRF_UN;
-
-/* FIFO Rejection Filter Mask */
-/* 0x308 */
-union frfm
-{
- unsigned long FRFM_UL;
- struct
- {
- unsigned : 19;
- unsigned mfid_B11 : 11;
- unsigned : 2;
- } FRFM_ST;
-} FRFM_UN;
-
-
-unsigned : 32;
-
-/* Message Buffer Status Registers */
-
-/* Message Handler Status */
-/* 0x310 */
-union mhds
-{
- unsigned long MHDS_UL;
- struct
- {
- unsigned : 2;
- unsigned mbu_B6 : 6;
- unsigned : 2;
- unsigned mbt_B6 : 6;
- unsigned : 2;
- unsigned fmb_B6 : 6;
- unsigned cram_B1 : 1;
- unsigned mfmb_B1 : 1;
- unsigned fmbd_B1 : 1;
- unsigned ptbf2_B1 : 1;
- unsigned ptbf1_B1 : 1;
- unsigned pmr_B1 : 1;
- unsigned pobf_B1 : 1;
- unsigned pibf_B1 : 1;
- } MHDS_ST;
-} MHDS_UN;
-
-
-unsigned : 32;
-unsigned : 32;
-unsigned : 32;
-
-
-/* Transmission Request Register 1 */
-/* 0x320 */
-union txrq1
-{
- unsigned long TXRQ1_UL;
-} TXRQ1_UN;
-
-
-/* Transmission Request Register 2 */
-/* 0x324 */
-union txrq2
-{
- unsigned long TXRQ2_UL;
-} TXRQ2_UN;
-
-
-unsigned : 32;
-unsigned : 32;
-
-
-/* New Data Register 1 */
-/* 0x330 */
-union ndat1
-{
- unsigned long NDAT1_UL;
-} NDAT1_UN;
-
-
-/* New Data Register 2 */
-/* 0x334 */
-union ndat2
-{
- unsigned long NDAT2_UL;
-} NDAT2_UN;
-
-/* New Data Register 3 */
-/* 0x338 */
-union ndat3
-{
- unsigned long NDAT3_UL;
-} NDAT3_UN;
-
-/* New Data Register 4 */
-/* 0x33C */
-union ndat4
-{
- unsigned long NDAT4_UL;
-} NDAT4_UN;
-
-
-/* Message Buffer Status Changed 1 */
-/* 0x340 */
-union mbsc1
-{
- unsigned long MBSC1_UL;
-} MBSC1_UN;
-
-
-/* Message Buffer Status Changed 2 */
-/* 0x344 */
-union mbsc2
-{
- unsigned long MBSC2_UL;
-} MBSC2_UN;
-
-
-unsigned long RES4[46]; /* Reserved */
-
-
-/* Input Buffer */
-/* Write Data Section [1..64] */
-/* 0x400 .. 0x4FC */
-unsigned long WRDS[64];
-
-
-/* Write Header Section 1 */
-/* 0x500 */
-union wrhs1
-{
- unsigned long WRHS1_UL;
- struct
- {
- unsigned : 2;
- unsigned mbi_B1 : 1;
- unsigned txm_B1 : 1;
- unsigned ppit_B1 : 1;
- unsigned cfg_B1 : 1;
- unsigned chb_B1 : 1;
- unsigned cha_B1 : 1;
- unsigned : 1;
- unsigned cyc_B7 : 7;
- unsigned : 5;
- unsigned fid_B11 : 11;
- } WRHS1_ST;
-} WRHS1_UN;
-
-
-/* Write Header Section 2 */
-/* 0x504 */
-union wrhs2
-{
- unsigned long WRHS2_UL;
- struct
- {
- unsigned : 9;
- unsigned pl_B7 : 7;
- unsigned : 5;
- unsigned crc_B11 : 11;
- } WRHS2_ST;
-} WRHS2_UN;
-
-
-/* Write Header Section 3 */
-/* 0x508 */
-union wrhs3
-{
- unsigned long WRHS3_UL;
- struct
- {
- unsigned : 21;
- unsigned dp_B11 : 11;
- } WRHS3_ST;
-} WRHS3_UN;
-
-
-unsigned : 32;
-
-
-/* Input Buffer Command Mask */
-/* 0x510 */
-union ibcm
-{
- unsigned long IBCM_UL;
- struct
- {
- unsigned : 13;
- unsigned stxrs_B1 : 1;
- unsigned ldss_B1 : 1;
- unsigned lhss_B1 : 1;
- unsigned : 13;
- unsigned stxrh_B1 : 1;
- unsigned ldsh_B1 : 1;
- unsigned lhsh_B1 : 1;
- } IBCM_ST;
-} IBCM_UN;
-
-
-/* Input Buffer Command Request */
-/* 0x514 */
-union ibcr
-{
- unsigned long IBCR_UL;
- struct
- {
- unsigned ibsys_B1 : 1;
- unsigned : 9;
- unsigned ibrs_B6 : 6;
- unsigned ibsyh_B1 : 1;
- unsigned : 9;
- unsigned ibrh_B6 : 6;
- } IBCR_ST;
-} IBCR_UN;
-
-
-unsigned long RES5[58]; /* Reserved */
-
-
-/* Output Buffer */
-/* Read Data Section [1..64] */
-/* 0x600 .. 0x6FC */
-unsigned long RDDS[64];
-
-
-/* Read Header Section 1 */
-/* 0x700 */
-union rdhs1
-{
- unsigned long RDHS1_UL;
- struct
- {
- unsigned : 2;
- unsigned mbi_B1 : 1;
- unsigned txm_B1 : 1;
- unsigned ppit_B1 : 1;
- unsigned cfg_B1 : 1;
- unsigned chb_B1 : 1;
- unsigned cha_B1 : 1;
- unsigned : 1;
- unsigned cyc_B7 : 7;
- unsigned : 5;
- unsigned fid_B11 : 11;
- } RDHS1_ST;
-} RDHS1_UN;
-
-
-/* Read Header Section 2 */
-/* 0x704 */
-union rdhs2
-{
- unsigned long RDHS2_UL;
- struct
- {
- unsigned : 1;
- unsigned plr_B7 : 7;
- unsigned : 1;
- unsigned plc_B7 : 7;
- unsigned : 5;
- unsigned crc_B11 : 11;
- } RDHS2_ST;
-} RDHS2_UN;
-
-
-/* Read Header Section 3 */
-/* 0x708 */
-union rdhs3
-{
- unsigned long RDHS3_UL;
- struct
- {
- unsigned : 2;
- unsigned res_B1 : 1;
- unsigned ppi_B1 : 1;
- unsigned nfi_B1 : 1;
- unsigned syn_B1 : 1;
- unsigned sfi_B1 : 1;
- unsigned rci_B1 : 1;
- unsigned : 2;
- unsigned rcc_B6 : 6;
- unsigned : 5;
- unsigned dp_B11 : 11;
- } RDHS3_ST;
-} RDHS3_UN;
-
-
-/* Message Buffer Status */
-/* 0x70C */
-union mbs
-{
- unsigned long MBS_UL;
- struct
- {
- unsigned : 19;
- unsigned mlst_B1 : 1;
- unsigned esb_B1 : 1;
- unsigned esa_B1 : 1;
- unsigned tcib_B1 : 1;
- unsigned tcia_B1 : 1;
- unsigned svob_B1 : 1;
- unsigned svoa_B1 : 1;
- unsigned ceob_B1 : 1;
- unsigned ceoa_B1 : 1;
- unsigned seob_B1 : 1;
- unsigned seoa_B1 : 1;
- unsigned vfrb_B1 : 1;
- unsigned vfra_B1 : 1;
- } MBS_ST;
-} MBS_UN;
-
-
-/* Output Buffer Command Mask */
-/* 0x710 */
-union obcm
-{
- unsigned long OBCM_UL;
- struct
- {
- unsigned : 14;
- unsigned rdsh_B1 : 1;
- unsigned rhsh_B1 : 1;
- unsigned : 14;
- unsigned rdss_B1 : 1;
- unsigned rhss_B1 : 1;
- } OBCM_ST;
-} OBCM_UN;
-
-
-/* Output Buffer Command Request */
-/* 0x714 */
-union obcr
-{
- unsigned long OBCR_UL;
- struct
- {
- unsigned : 10;
- unsigned obrh_B6 : 6;
- unsigned obsys_B1 : 1;
- unsigned : 5;
- unsigned req_B1 : 1;
- unsigned view_B1 : 1;
- unsigned : 2;
- unsigned obrs_B6 : 6;
- } OBCR_ST;
-} OBCR_UN;
-
-}FRAY_ST;
-
-#define FRAY1 ((FRAY_ST *)0xFFF7C800U)
-#define frayREG ((FRAY_ST *)0xFFF7C800U)
-
-//**********************************************************
-// Structure for initializing CC - Fr_Init - Fr_ConfigPtr
-typedef volatile struct cfg
-{
- int mrc;
- int prtc1;
- int prtc2;
- int mhdc;
- int gtu1;
- int gtu2;
- int gtu3;
- int gtu4;
- int gtu5;
- int gtu6;
- int gtu7;
- int gtu8;
- int gtu9;
- int gtu10;
- int gtu11;
- int succ2;
- int succ3;
-} cfg;
-
-// Structure for configuring buffers - Fr_PrepareLPdu - Fr_LPduPtr
-typedef volatile struct wrhs
-{
- int mbi;
- int txm;
- int ppit;
- int cfg;
- int chb;
- int cha;
- int cyc;
- int fid;
- int pl;
- int crc;
- int dp;
- int sync;
- int sfi;
-} wrhs;
-
-// Structure for initializing buffer - Fr_TransmitTxLPdu, Fr_ReceiveRxLPdu - Fr_LSduPtr
-typedef volatile struct bc
-{
- int ibrh;
- int stxrh;
- int ldsh;
- int lhsh;
- int ibsyh;
- int ibsys;
- int obrs;
- int rdss;
- int rhss;
-} bc;
-
-#endif /* TI_DRV_FRAY_H_ */
+++ /dev/null
-/** @file gio.h
-* @brief GIO Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#include "base.h"
-
-#ifndef __GIO_H__
-#define __GIO_H__
-
-/** @enum Loopbacktype
-* @brief Loopback type definition
-*/
-/** @typedef Loopbacktype_t
-* @brief Loopback type Type Definition
-*
-* This type is used to select the module Loopback type Digital or Analog loopback.
-*/
-typedef enum Loopbacktype {
-
- Digital = 0,
- Analog = 1
-
-} Loopbacktype_t;
-
-/** @struct gioBase
-* @brief GIO Base Register Definition
-*
-* This structure is used to access the GIO module egisters.
-*/
-/** @typedef gioBASE_t
-* @brief GIO Register Frame Type Definition
-*
-* This type is used to access the GIO Registers.
-*/
-typedef volatile struct gioBase
-{
- uint32_t GCR0; /**< 0x0000: Global Control Register */
- uint32_t PWDN; /**< 0x0004: Power Down Register */
- uint32_t INTDET; /**< 0x0008: Interrupt Detect Regsiter*/
- uint32_t POL; /**< 0x000C: Interrupt Polarity Register */
- uint32_t INTENASET; /**< 0x0010: Interrupt Enable Set Register */
- uint32_t INTENACLR; /**< 0x0014: Interrupt Enable Clear Register */
- uint32_t LVLSET; /**< 0x0018: Interrupt Priority Set Register */
- uint32_t LVLCLR; /**< 0x001C: Interrupt Priority Clear Register */
- uint32_t FLG; /**< 0x0020: Interrupt Flag Register */
- uint32_t OFFSET0; /**< 0x0024: Interrupt Offset A Register */
- uint32_t OFFSET1; /**< 0x0028: Interrupt Offset B Register */
-} gioBASE_t;
-
-
-/** @struct gioPort
-* @brief GIO Port Register Definition
-*/
-/** @typedef gioPORT_t
-* @brief GIO Port Register Type Definition
-*
-* This type is used to access the GIO Port Registers.
-*/
-typedef volatile struct gioPort
-{
- uint32_t DIR; /**< 0x0000: Data Direction Register */
- uint32_t DIN; /**< 0x0004: Data Input Register */
- uint32_t DOUT; /**< 0x0008: Data Output Register */
- uint32_t DSET; /**< 0x000C: Data Output Set Register */
- uint32_t DCLR; /**< 0x0010: Data Output Clear Register */
- uint32_t PDR; /**< 0x0014: Open Drain Regsiter */
- uint32_t PULDIS; /**< 0x0018: Pullup Disable Register */
- uint32_t PSL; /**< 0x001C: Pull Up/Down Selection Register */
-} gioPORT_t;
-
-
-/** @def gioREG
-* @brief GIO Register Frame Pointer
-*
-* This pointer is used by the GIO driver to access the gio module registers.
-*/
-#define gioREG ((gioBASE_t *)0xFFF7BC00U)
-
-/** @def gioPORTA
-* @brief GIO Port (A) Register Pointer
-*
-* Pointer used by the GIO driver to access PORTA
-*/
-#define gioPORTA ((gioPORT_t *)0xFFF7BC34U)
-
-/** @def gioPORTB
-* @brief GIO Port (B) Register Pointer
-*
-* Pointer used by the GIO driver to access PORTB
-*/
-#define gioPORTB ((gioPORT_t *)0xFFF7BC54U)
-
-
-/* GIO Interface Functions */
-void gioInit(void);
-void gioSetDirection(gioPORT_t *port, uint32_t dir);
-void gioSetBit(gioPORT_t *port, uint32_t bit, uint32_t value);
-void gioSetPort(gioPORT_t *port, uint32_t value);
-uint32_t gioGetBit(gioPORT_t *port, uint32_t bit);
-uint32_t gioGetPort(gioPORT_t *port);
-void gioToggleBit(gioPORT_t *port, uint32_t bit);
-void gioEnableNotification(uint32_t bit);
-void gioDisableNotification(uint32_t bit);
-void gioNotification(int bit);
-
-#endif
+++ /dev/null
-/** @file het.h
-* @brief HET Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __HET_H__
-#define __HET_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-#include <string.h>
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-/** @def pwm0
-* @brief Pwm signal 0
-*
-* Alias for pwm signal 0
-*/
-#define pwm0 0U
-
-/** @def pwm1
-* @brief Pwm signal 1
-*
-* Alias for pwm signal 1
-*/
-#define pwm1 1U
-
-/** @def pwm2
-* @brief Pwm signal 2
-*
-* Alias for pwm signal 2
-*/
-#define pwm2 2U
-
-/** @def pwm3
-* @brief Pwm signal 3
-*
-* Alias for pwm signal 3
-*/
-#define pwm3 3U
-
-/** @def pwm4
-* @brief Pwm signal 4
-*
-* Alias for pwm signal 4
-*/
-#define pwm4 4U
-
-/** @def pwm5
-* @brief Pwm signal 5
-*
-* Alias for pwm signal 5
-*/
-#define pwm5 5U
-
-/** @def pwm6
-* @brief Pwm signal 6
-*
-* Alias for pwm signal 6
-*/
-#define pwm6 6U
-
-/** @def pwm7
-* @brief Pwm signal 7
-*
-* Alias for pwm signal 7
-*/
-#define pwm7 7U
-
-
-/** @def edge0
-* @brief Edge signal 0
-*
-* Alias for edge signal 0
-*/
-#define edge0 0U
-
-/** @def edge1
-* @brief Edge signal 1
-*
-* Alias for edge signal 1
-*/
-#define edge1 1U
-
-/** @def edge2
-* @brief Edge signal 2
-*
-* Alias for edge signal 2
-*/
-#define edge2 2U
-
-/** @def edge3
-* @brief Edge signal 3
-*
-* Alias for edge signal 3
-*/
-#define edge3 3U
-
-/** @def edge4
-* @brief Edge signal 4
-*
-* Alias for edge signal 4
-*/
-#define edge4 4U
-
-/** @def edge5
-* @brief Edge signal 5
-*
-* Alias for edge signal 5
-*/
-#define edge5 5U
-
-/** @def edge6
-* @brief Edge signal 6
-*
-* Alias for edge signal 6
-*/
-#define edge6 6U
-
-/** @def edge7
-* @brief Edge signal 7
-*
-* Alias for edge signal 7
-*/
-#define edge7 7U
-
-
-/** @def cap0
-* @brief Capture signal 0
-*
-* Alias for capture signal 0
-*/
-#define cap0 0U
-
-/** @def cap1
-* @brief Capture signal 1
-*
-* Alias for capture signal 1
-*/
-#define cap1 1U
-
-/** @def cap2
-* @brief Capture signal 2
-*
-* Alias for capture signal 2
-*/
-#define cap2 2U
-
-/** @def cap3
-* @brief Capture signal 3
-*
-* Alias for capture signal 3
-*/
-#define cap3 3U
-
-/** @def cap4
-* @brief Capture signal 4
-*
-* Alias for capture signal 4
-*/
-#define cap4 4U
-
-/** @def cap5
-* @brief Capture signal 5
-*
-* Alias for capture signal 5
-*/
-#define cap5 5U
-
-/** @def cap6
-* @brief Capture signal 6
-*
-* Alias for capture signal 6
-*/
-#define cap6 6U
-
-/** @def cap7
-* @brief Capture signal 7
-*
-* Alias for capture signal 7
-*/
-#define cap7 7U
-
-/** @def pwmEND_OF_DUTY
-* @brief Pwm end of duty
-*
-* Alias for pwm end of duty notification
-*/
-#define pwmEND_OF_DUTY 2U
-
-/** @def pwmEND_OF_PERIOD
-* @brief Pwm end of period
-*
-* Alias for pwm end of period notification
-*/
-#define pwmEND_OF_PERIOD 4U
-
-/** @def pwmEND_OF_BOTH
-* @brief Pwm end of duty and period
-*
-* Alias for pwm end of duty and period notification
-*/
-#define pwmEND_OF_BOTH 6U
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @struct hetBase
-* @brief HET Register Definition
-*
-* This structure is used to access the HET module egisters.
-*/
-/** @typedef hetBASE_t
-* @brief HET Register Frame Type Definition
-*
-* This type is used to access the HET Registers.
-*/
-
-enum hetPinSelect
-{
- PIN_HET_0 = 0,
- PIN_HET_1 = 1,
- PIN_HET_2 = 2,
- PIN_HET_3 = 3,
- PIN_HET_4 = 4,
- PIN_HET_5 = 5,
- PIN_HET_6 = 6,
- PIN_HET_7 = 7,
- PIN_HET_8 = 8,
- PIN_HET_9 = 9,
- PIN_HET_10 = 10,
- PIN_HET_11 = 11,
- PIN_HET_12 = 12,
- PIN_HET_13 = 13,
- PIN_HET_14 = 14,
- PIN_HET_15 = 15,
- PIN_HET_16 = 16,
- PIN_HET_17 = 17,
- PIN_HET_18 = 18,
- PIN_HET_19 = 19,
- PIN_HET_20 = 20,
- PIN_HET_21 = 21,
- PIN_HET_22 = 22,
- PIN_HET_23 = 23,
- PIN_HET_24 = 24,
- PIN_HET_25 = 25,
- PIN_HET_26 = 26,
- PIN_HET_27 = 27,
- PIN_HET_28 = 28,
- PIN_HET_29 = 29,
- PIN_HET_30 = 30,
- PIN_HET_31 = 31
-};
-
-/** @struct hetBase
-* @brief HET Base Register Definition
-*
-* This structure is used to access the HET module egisters.
-*/
-/** @typedef hetBASE_t
-* @brief HET Register Frame Type Definition
-*
-* This type is used to access the HET Registers.
-*/
-
-typedef volatile struct hetBase
-{
- uint32_t GCR; /**< 0x0000: Global control register */
- uint32_t PFR; /**< 0x0004: Prescale factor register */
- uint32_t ADDR; /**< 0x0008: Current address register */
- uint32_t OFF1; /**< 0x000C: Interrupt offset register 1 */
- uint32_t OFF2; /**< 0x0010: Interrupt offset register 2 */
- uint32_t INTENAS; /**< 0x0014: Interrupt enable set register */
- uint32_t INTENAC; /**< 0x0018: Interrupt enable clear register */
- uint32_t EXC1; /**< 0x001C: Exeption control register 1 */
- uint32_t EXC2; /**< 0x0020: Exeption control register 2 */
- uint32_t PRY; /**< 0x0024: Interrupt priority register */
- uint32_t FLG; /**< 0x0028: Interrupt flag register */
- uint32_t AND; /**< 0x002C: AND share control register */
- uint32_t : 32U; /**< 0x0030: Reserved */
- uint32_t HRSH; /**< 0x0034: High resoltion share register */
- uint32_t XOR; /**< 0x0038: XOR share register */
- uint32_t REQENS; /**< 0x003C: Request enable set register */
- uint32_t REQENC; /**< 0x0040: Request enable clear register */
- uint32_t REQDS; /**< 0x0044: Request destination select register */
- uint32_t : 32U; /**< 0x0048: Reserved */
- uint32_t DIR; /**< 0x004C: Direction register */
- uint32_t DIN; /**< 0x0050: Data input register */
- uint32_t DOUT; /**< 0x0054: Data output register */
- uint32_t DSET; /**< 0x0058: Data output set register */
- uint32_t DCLR; /**< 0x005C: Data output clear register */
- uint32_t PDR; /**< 0x0060: Open drain register */
- uint32_t PULDIS; /**< 0x0064: Pull disable register */
- uint32_t PSL; /**< 0x0068: Pull select register */
- uint32_t : 32U; /**< 0x006C: Reserved */
- uint32_t : 32U; /**< 0x0070: Reserved */
- uint32_t PCREG; /**< 0x0074: Parity control register */
- uint32_t PAR; /**< 0x0078: Parity address register */
- uint32_t PPR; /**< 0x007C: Parity pin select register */
- uint32_t SFPRLD; /**< 0x0080: Suppression filter preload register */
- uint32_t SFENA; /**< 0x0084: Suppression filter enable register */
- uint32_t : 32U; /**< 0x0088: Reserved */
- uint32_t LBPSEL; /**< 0x008C: Loop back pair select register */
- uint32_t LBPDIR; /**< 0x0090: Loop back pair direction register */
- uint32_t PINDIS; /**< 0x0094: Pin disable register */
- uint32_t : 32U; /**< 0x0098: Reserved */
- uint32_t HWAPINSEL;/**< 0x009C: HWAG Pin select register */
- uint32_t HWAGCR0; /**< 0x00A0: HWAG Global control register 0 */
- uint32_t HWAGCR1; /**< 0x00A4: HWAG Global control register 1 */
- uint32_t HWAGCR2; /**< 0x00A8: HWAG Global control register 2 */
- uint32_t HWAENASET;/**< 0x00AC: HWAG Interrupt enable set register */
- uint32_t HWAENACLR;/**< 0x00B0: HWAG Interrupt enable clear register*/
- uint32_t HWALVLSET;/**< 0x00B4: HWAG Interrupt level set register */
- uint32_t HWALVLCLR;/**< 0x00B8: HWAG Interrupt level clear register */
- uint32_t HWAFLG; /**< 0x00BC: HWAG Interrupt flag register */
- uint32_t HWAOFF1; /**< 0x00C0: HWAG Interrupt offset 1 register */
- uint32_t HWAOFF2; /**< 0x00C4: HWAG Interrupt offset 2 register */
- uint32_t HWAACNT; /**< 0x00C8: HWAG Angle value register */
- uint32_t HWAPCNT1; /**< 0x00CC: HWAG Period value register 1 */
- uint32_t HWAPCNT; /**< 0x00D0: HWAG Period value register */
- uint32_t HWASTWD; /**< 0x00D4: HWAG Step width register */
- uint32_t HWATHNB; /**< 0x00D8: HWAG Teeth number register */
- uint32_t HWATHVL; /**< 0x00DC: HWAG Teeth Value register */
- uint32_t HWAFIL; /**< 0x00E0: HWAG Filter register */
- uint32_t : 32U; /**< 0x00E4: Reserved */
- uint32_t HWAFIL2; /**< 0x00E8: HWAG Second filter register */
- uint32_t : 32U; /**< 0x00EC: Reserved */
- uint32_t HWAANGI; /**< 0x00F0: HWAG Angle increment register */
-} hetBASE_t;
-
-
-/** @def hetREG1
-* @brief HET Register Frame Pointer
-*
-* This pointer is used by the HET driver to access the het module registers.
-*/
-#define hetREG1 ((hetBASE_t *)0xFFF7B800U)
-
-
-/** @def hetPORT1
-* @brief HET GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of HET1
-* (use the GIO drivers to access the port pins).
-*/
-#define hetPORT1 ((gioPORT_t *)0xFFF7B84CU)
-
-
-/** @def hetREG2
-* @brief HET2 Register Frame Pointer
-*
-* This pointer is used by the HET driver to access the het module registers.
-*/
-#define hetREG2 ((hetBASE_t *)0xFFF7B900U)
-
-
-/** @def hetPORT2
-* @brief HET2 GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of HET2
-* (use the GIO drivers to access the port pins).
-*/
-#define hetPORT2 ((gioPORT_t *)0xFFF7B94CU)
-
-
-
-/** @struct hetInstructionBase
-* @brief HET Instruction Definition
-*
-* This structure is used to access the HET RAM.
-*/
-/** @typedef hetINSTRUCTION_t
-* @brief HET Instruction Type Definition
-*
-* This type is used to access a HET Instruction.
-*/
-typedef volatile struct hetInstructionBase
-{
- uint32_t Program;
- uint32_t Control;
- uint32_t Data;
- uint32_t rsvd1;
-} hetINSTRUCTION_t;
-
-
-/** @struct hetRamBase
-* @brief HET RAM Definition
-*
-* This structure is used to access the HET RAM.
-*/
-/** @typedef hetRAMBASE_t
-* @brief HET RAM Type Definition
-*
-* This type is used to access the HET RAM.
-*/
-typedef volatile struct het1RamBase
-{
- hetINSTRUCTION_t Instruction[160U];
-} hetRAMBASE_t;
-
-
-#define hetRAM1 ((hetRAMBASE_t *)0xFF460000U)
-
-#define hetRAM2 ((hetRAMBASE_t *)0xFF440000U)
-
-#define NHET1RAMPARLOC (*(unsigned int *)0xFF462000U)
-#define NHET1RAMLOC (*(unsigned int *)0xFF460000U)
-
-#define NHET2RAMPARLOC (*(unsigned int *)0xFF442000U)
-#define NHET2RAMLOC (*(unsigned int *)0xFF440000U)
-
-/** @struct hetSignal
-* @brief HET Signal Definition
-*
-* This structure is used to define a pwm signal.
-*/
-/** @typedef hetSIGNAL_t
-* @brief HET Signal Type Definition
-*
-* This type is used to access HET Signal Information.
-*/
-typedef struct hetSignal
-{
- uint32_t duty; /**< Duty cycle in % of the period */
- double period; /**< Period in us */
-} hetSIGNAL_t;
-
-
-/* HET Interface Functions */
-void hetInit(void);
-
-/* PWM Interface Functions */
-void pwmStart(hetRAMBASE_t * hetRAM,uint32_t pwm);
-void pwmStop(hetRAMBASE_t * hetRAM,uint32_t pwm);
-void pwmSetDuty(hetRAMBASE_t * hetRAM,uint32_t pwm, uint32_t duty);
-void pwmSetSignal(hetRAMBASE_t * hetRAM,uint32_t pwm, hetSIGNAL_t signal);
-hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM,uint32_t pwm);
-void pwmEnableNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification);
-void pwmDisableNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification);
-void pwmNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification);
-
-/* Edge Interface Functions */
-void edgeResetCounter(hetRAMBASE_t * hetRAM,uint32_t edge);
-uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM,uint32_t edge);
-void edgeEnableNotification(hetBASE_t * hetREG,uint32_t edge);
-void edgeDisableNotification(hetBASE_t * hetREG,uint32_t edge);
-void edgeNotification(hetBASE_t * hetREG,uint32_t edge);
-
-/* Captured Signal Interface Functions */
-hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM,uint32_t cap);
-
-/* Timestamp Interface Functions */
-void hetResetTimestamp(hetRAMBASE_t * hetRAM);
-uint32_t hetGetTimestamp(hetRAMBASE_t * hetRAM);
-
-/** @fn void hetNotification(hetBASE_t *het, uint32_t offset)
-* @brief het interrupt callback
-* @param[in] het - Het module base address
-* - hetREG1: HET1 module base address pointer
-* - hetREG2: HET2 module base address pointer
-* @param[in] offset - het interrupt offset / Source number
-*
-* @note This function has to be provide by the user.
-*
-* This is a interrupt callback that is provided by the application and is call upon
-* an het interrupt. The paramer passed to the callback is a copy of the interrupt
-* offset register which is used to decode the interrupt source.
-*/
-void hetNotification(hetBASE_t *het, uint32_t offset);
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-#endif
+++ /dev/null
-/** @file htu.h
-* @brief HTU Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __HTU_H__
-#define __HTU_H__
-
-/* HTU General Definitions */
-
-/** @struct htuBase
-* @brief HTU Base Register Definition
-*
-* This structure is used to access the HTU module egisters.
-*/
-/** @typedef stcBASE_t
-* @brief HTU Register Frame Type Definition
-*
-* This type is used to access the HTU Registers.
-*/
-typedef volatile struct htuBase
-{
- uint32_t GC; // 0x00
- uint32_t CPENA; // 0x04
- uint32_t BUSY0; // 0x08
- uint32_t BUSY1; // 0x0C
- uint32_t BUSY2; // 0x10
- uint32_t BUSY3; // 0x14
- uint32_t ACPE; // 0x18
- uint32_t : 32; // 0x1C
- uint32_t RLBECTRL; // 0x20
- uint32_t BFINTS; // 0x24
- uint32_t BFINTC; // 0x28
- uint32_t INTMAP; // 0x2C
- uint32_t : 32; // 0x30
- uint32_t INTOFF0; // 0x34
- uint32_t INTOFF1; // 0x38
- uint32_t BIM; // 0x3C
- uint32_t RLOSTFL; // 0x40
- uint32_t BFINTFL; // 0x44
- uint32_t BERINTFL; // 0x48
- uint32_t MP1S; // 0x4C
- uint32_t MP1E; // 0x50
- uint32_t DCTRL; // 0x54
- uint32_t WPR; // 0x58
- uint32_t WMR; // 0x5C
- uint32_t ID; // 0x60
- uint32_t PCR; // 0x64
- uint32_t PAR; // 0x68
- uint32_t : 32; // 0x6C
- uint32_t MPCS; // 0x70
- uint32_t MP0S; // 0x74
- uint32_t MP0E; // 0x78
-} htuBASE_t;
-
-typedef volatile struct htudcp
-{
- uint32_t IFADDRA; // 0x00
- uint32_t IFADDRB; // 0x04
- uint32_t IHADDRCT; // 0x08
- uint32_t ITCOUNT; // 0x0C
-} htudcp_t;
-
-typedef volatile struct htucdcp
-{
- uint32_t CFADDRA; // 0x100
- uint32_t CFADDRB; // 0x104
- uint32_t CFCOUNT; // 0x108
-} htucdcp_t;
-
-#define htuREG1 ((htuBASE_t *)0xFFF7A400U)
-#define htuREG2 ((htuBASE_t *)0xFFF7A500U)
-
-#define htuDCP1 ((htudcp_t *)0xFF4E0000U)
-#define htuDCP2 ((htudcp_t *)0xFF4C0000U)
-
-#define htuCDCP1 ((htucdcp_t *)0xFF4E0100U)
-#define htuCDCP2 ((htucdcp_t *)0xFF4C0100U)
-
-#define HTU1PARLOC (*(unsigned int *)0xFF4E0200U)
-#define HTU2PARLOC (*(unsigned int *)0xFF4C0200U)
-
-#define HTU1RAMLOC (*(unsigned int *)0xFF4E0000U)
-#define HTU2RAMLOC (*(unsigned int *)0xFF4C0000U)
-
-#endif
+++ /dev/null
-/** @file i2c.h
-* @brief I2C Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __I2C_H__
-#define __I2C_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-
-/** @enum i2cMode
-* @brief Alias names for i2c modes
-* This enumeration is used to provide alias names for I2C modes:
-*/
-
-enum i2cMode
-{
- I2C_FD_FORMAT = 0x0008, /* Free Data Format */
- I2C_START_BYTE = 0x0010,
- I2C_RESET_OUT = 0x0020, I2C_RESET_IN = 0x0000,
- I2C_DLOOPBACK = 0x0040,
- I2C_REPEATMODE = 0x0080, /* In Master Mode only */
- I2C_10BIT_AMODE = 0x0100, I2C_7BIT_AMODE = 0x0000,
- I2C_TRANSMITTER = 0x0200, I2C_RECEIVER = 0x0000,
- I2C_MASTER = 0x0400, I2C_SLAVE = 0x0000,
- I2C_STOP_COND = 0x0800, /* In Master Mode only */
- I2C_START_COND = 0x2000, /* In Master Mode only */
- I2C_FREE_RUN = 0x4000,
- I2C_NACK_MODE = 0x8000
-};
-
-
-/** @enum i2cBitCount
-* @brief Alias names for i2c bit count
-* This enumeration is used to provide alias names for I2C bit count:
-*/
-
-enum i2cBitCount
-{
- I2C_2_BIT = 0x2,
- I2C_3_BIT = 0x3,
- I2C_4_BIT = 0x4,
- I2C_5_BIT = 0x5,
- I2C_6_BIT = 0x6,
- I2C_7_BIT = 0x7,
- I2C_8_BIT = 0x0
-};
-
-
-
-/** @enum i2cIntFlags
-* @brief Interrupt Flag Definitions
-*
-* Used with I2CEnableNotification, I2CDisableNotification
-*/
-enum i2cIntFlags
-{
- I2C_AL_INT = 0x0001, /* arbitration lost */
- I2C_NACK_INT = 0x0002, /* no acknowledgement */
- I2C_ARDY_INT = 0x0004, /* access ready */
- I2C_RX_INT = 0x0008, /* receive data ready */
- I2C_TX_INT = 0x0010, /* transmit data ready */
- I2C_SCD_INT = 0x0020, /* stop condition detect */
- I2C_AAS_INT = 0x0040 /* address as slave */
-};
-
-
-/** @enum i2cStatFlags
-* @brief Interrupt Status Definitions
-*
-*/
-enum i2cStatFlags
-{
- I2C_BUSBUSY = 0x1000, /* bus busy */
- I2C_RXFULL = 0x0800 /* receive full */
-};
-
-
-/** @enum i2cDMA
-* @brief I2C DMA definitions
-*
-* Used before i2c transfer
-*/
-enum i2cDMA
-{
- I2C_TXDMA = 0x20,
- I2C_RXDMA = 0x10
-};
-
-/** @struct i2cBase
-* @brief I2C Base Register Definition
-*
-* This structure is used to access the I2C module egisters.
-*/
-/** @typedef i2cBASE_t
-* @brief I2C Register Frame Type Definition
-*
-* This type is used to access the I2C Registers.
-*/
-typedef volatile struct i2cBase
-{
-
- uint32_t OAR; /**< 0x0000 I2C Own Address register */
- uint32_t IMR; /**< 0x0004 I2C Interrupt Mask/Status register */
- uint32_t STR; /**< 0x0008 I2C Interrupt Status register */
- uint32_t CLKL; /**< 0x000C I2C Clock Divider Low register */
- uint32_t CLKH; /**< 0x0010 I2C Clock Divider High register */
- uint32_t CNT; /**< 0x0014 I2C Data Count register */
- uint32_t DRR; /**< 0x0018 I2C Data Receive register */
- uint32_t SAR; /**< 0x001C I2C Slave Address register */
- uint32_t DXR; /**< 0x0020 I2C Data Transmit register */
- uint32_t MDR; /**< 0x0024 I2C Mode register */
- uint32_t IVR; /**< 0x0028 I2C Interrupt Vector register */
- uint32_t EMDR; /**< 0x002C I2C Extended Mode register */
- uint32_t PSC; /**< 0x0030 I2C Prescaler register */
- uint32_t PID11; /**< 0x0034 I2C Peripheral ID register 1 */
- uint32_t PID12; /**< 0x0038 I2C Peripheral ID register 2 */
- uint32_t DMAC; /**< 0x003C I2C DMA Control Register */
- uint32_t : 32U; /**< 0x0040 Reserved */
- uint32_t : 32U; /**< 0x0044 Reserved */
- uint32_t FUN; /**< 0x0048 Pin Function Register */
- uint32_t DIR; /**< 0x004C Pin Direction Register */
- uint32_t DIN; /**< 0x0050 Pin Data In Register */
- uint32_t DOUT; /**< 0x0054 Pin Data Out Register */
- uint32_t SET; /**< 0x0058 Pin Data Set Register */
- uint32_t CLR; /**< 0x005C Pin Data Clr Register */
- uint32_t ODR; /**< 0x0060 Pin Open Drain Output Enable Register */
- uint32_t PD; /**< 0x0064 Pin Pullup/Pulldown Disable Register */
- uint32_t PSL; /**< 0x0068 Pin Pullup/Pulldown Selection Register */
-} i2cBASE_t;
-
-
-/** @def i2cREG1
-* @brief I2C Register Frame Pointer
-*
-* This pointer is used by the I2C driver to access the I2C module registers.
-*/
-#define i2cREG1 ((i2cBASE_t *)0xFFF7D400U)
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/** @def i2cPORT1
-* @brief I2C GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of I2C
-* (use the GIO drivers to access the port pins).
-*/
-#define i2cPORT1 ((gioPORT_t *)0xFFF7D44CU)
-
-/* I2C Interface Functions */
-void i2cInit(void);
-void i2cSetOwnAdd(i2cBASE_t *i2c, uint32_t oadd);
-void i2cSetSlaveAdd(i2cBASE_t *i2c, uint32_t sadd);
-void i2cSetBaudrate(i2cBASE_t *i2c, uint32_t baud);
-uint32_t i2cIsTxReady(i2cBASE_t *i2c);
-void i2cSendByte(i2cBASE_t *i2c, uint8_t byte);
-void i2cSend(i2cBASE_t *i2c, uint32_t length, uint8_t *data);
-uint32_t i2cIsRxReady(i2cBASE_t *i2c);
-void i2cClearSCD(i2cBASE_t *i2c);
-uint32_t i2cRxError(i2cBASE_t *i2c);
-uint32_t i2cReceiveByte(i2cBASE_t *i2c);
-void i2cReceive(i2cBASE_t *i2c, uint32_t length, uint8_t *data);
-void i2cEnableNotification(i2cBASE_t *i2c, uint32_t flags);
-void i2cDisableNotification(i2cBASE_t *i2c, uint32_t flags);
-void i2cSetStart(i2cBASE_t *i2c);
-void i2cSetStop(i2cBASE_t *i2c);
-void i2cSetCount(i2cBASE_t *i2c ,uint32_t cnt);
-void i2cEnableLoopback(i2cBASE_t *i2c);
-void i2cDisableLoopback(i2cBASE_t *i2c);
-
-/** @fn void i2cNotification(i2cBASE_t *i2c, uint32_t flags)
-* @brief Interrupt callback
-* @param[in] i2c - I2C module base address
-* @param[in] flags - copy of error interrupt flags
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is a copy of the
-* interrupt flag register.
-*/
-void i2cNotification(i2cBASE_t *i2c, uint32_t flags);
-
-#endif
+++ /dev/null
-/** @file lin.h
-* @brief LIN Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __LIN_H__
-#define __LIN_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-
-/** @def LIN_BREAK_INT
-* @brief Alias for break detect interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_BREAK_INT 0x00000001U
-
-
-/** @def LIN_WAKEUP_INT
-* @brief Alias for wakeup interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_WAKEUP_INT 0x00000002U
-
-
-/** @def LIN_TO_INT
-* @brief Alias for time out interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_TO_INT 0x00000010U
-
-
-/** @def LIN_TOAWUS_INT
-* @brief Alias for time out after wakeup signal interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_TOAWUS_INT 0x00000040U
-
-
-/** @def LIN_TOA3WUS_INT
-* @brief Alias for time out after 3 wakeup signals interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_TOA3WUS_INT 0x00000080U
-
-
-/** @def LIN_TX_READY
-* @brief Alias for transmit buffer ready flag
-*
-* Used with linIsTxReady.
-*/
-#define LIN_TX_READY 0x00000100U
-
-
-/** @def LIN_RX_INT
-* @brief Alias for receive buffer ready interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_RX_INT 0x00000200U
-
-
-/** @def LIN_ID_INT
-* @brief Alias for received matching identifier interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_ID_INT 0x00002000U
-
-
-/** @def LIN_PE_INT
-* @brief Alias for parity error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_PE_INT 0x01000000U
-
-
-/** @def LIN_OE_INT
-* @brief Alias for overrun error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_OE_INT 0x02000000U
-
-
-/** @def LIN_FE_INT
-* @brief Alias for framming error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_FE_INT 0x04000000U
-
-
-/** @def LIN_NRE_INT
-* @brief Alias for no response error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_NRE_INT 0x08000000U
-
-
-/** @def LIN_ISFE_INT
-* @brief Alias for inconsistent sync field error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_ISFE_INT 0x10000000U
-
-
-/** @def LIN_CE_INT
-* @brief Alias for checksum error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_CE_INT 0x20000000U
-
-
-/** @def LIN_PBE_INT
-* @brief Alias for physical bus error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_PBE_INT 0x40000000U
-
-
-/** @def LIN_BE_INT
-* @brief Alias for bit error interrupt flag
-*
-* Used with linEnableNotification, linDisableNotification.
-*/
-#define LIN_BE_INT 0x80000000U
-
-
-/** @struct linBase
-* @brief LIN Register Definition
-*
-* This structure is used to access the LIN module egisters.
-*/
-/** @typedef linBASE_t
-* @brief LIN Register Frame Type Definition
-*
-* This type is used to access the LIN Registers.
-*/
-
-enum linPinSelect
-{
- PIN_LIN_TX = 0,
- PIN_LIN_RX = 1
-};
-
-/** @struct linBase
-* @brief LIN Base Register Definition
-*
-* This structure is used to access the LIN module egisters.
-*/
-/** @typedef linBASE_t
-* @brief LIN Register Frame Type Definition
-*
-* This type is used to access the LIN Registers.
-*/
-
-typedef volatile struct linBase
-{
- uint32_t GCR0; /**< 0x0000: Global control register 0 */
- uint32_t GCR1; /**< 0x0004: Global control register 1 */
- uint32_t GCR2; /**< 0x0008: Global control register 2 */
- uint32_t SETINT; /**< 0x000C: Set interrupt enable register */
- uint32_t CLRINT; /**< 0x0010: Clear interrupt enable register */
- uint32_t SETINTLVL; /**< 0x0014: Set interrupt level register */
- uint32_t CLRINTLVL; /**< 0x0018: Set interrupt level register */
- uint32_t FLR; /**< 0x001C: interrupt flag register */
- uint32_t INTVECT0; /**< 0x0020: interrupt vector Offset 0 */
- uint32_t INTVECT1; /**< 0x0024: interrupt vector Offset 1 */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t CHAR : 3U; /**< 0x0028: Character length control register */
- uint32_t : 13U; /**< 0x0028: Reserved */
- uint32_t LENGTH : 3U; /**< 0x0028: Length control register */
- uint32_t : 13U; /**< 0x0028: Reserved */
-#else
- uint32_t : 13U; /**< 0x0028: Reserved */
- uint32_t LENGTH : 3U; /**< 0x0028: Length control register */
- uint32_t : 13U; /**< 0x0028: Reserved */
- uint32_t CHAR : 3U; /**< 0x0028: Character length control register */
-#endif
- uint32_t BRSR; /**< 0x002C: Baud rate selection register */
- uint32_t ED; /**< 0x0030: Emulation register */
- uint32_t RD; /**< 0x0034: Receive data register */
- uint32_t TD; /**< 0x0038: Transmit data register */
- uint32_t FUN; /**< 0x003C: Pin function register */
- uint32_t DIR; /**< 0x0040: Pin direction register */
- uint32_t DIN; /**< 0x0044: Pin data in register */
- uint32_t DOUT; /**< 0x0048: Pin data out register */
- uint32_t SET; /**< 0x004C: Pin data set register */
- uint32_t CLR; /**< 0x0050: Pin data clr register */
- uint32_t ODR; /**< 0x0054: Pin open drain output enable register */
- uint32_t PD; /**< 0x0058: Pin pullup/pulldown disable register */
- uint32_t PSL; /**< 0x005C: Pin pullup/pulldown selection register */
- uint32_t COMP; /**< 0x0060: Compare register */
- uint8_t RDx[8U]; /**< 0x0064-0x0068: RX buffer register */
- uint32_t MASK; /**< 0x006C: Mask register */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint8_t IDBYTE; /**< 0x0070: Identifier byte register */
- uint8_t IDSTB; /**< 0x0070: Identifier slave task byte register */
- uint8_t RXID; /**< 0x0070: Received identifier register */
- uint32_t : 8U; /**< 0x0070: Reserved */
-#else
- uint32_t : 8U; /**< 0x0070: Reserved */
- uint8_t RXID; /**< 0x0070: Received identifier register */
- uint8_t IDSTB; /**< 0x0070: Identifier Slave task byte register */
- uint8_t IDBYTE; /**< 0x0070: Identifier byte register */
-#endif
- uint8_t TDx[8U]; /**< 0x0074-0x0078: TX buffer register */
- uint32_t MBRSR; /**< 0x007C: Maximum baud rate selection register */
- uint32_t SL; /**< 0x0080: Pin slew rate register */
- uint32_t : 32U; /**< 0x0084: Reserved */
- uint32_t : 32U; /**< 0x0088: Reserved */
- uint32_t : 32U; /**< 0x008C: Reserved */
- uint32_t IODFTCTRL; /**< 0x0090: IODFT loopback register */
-} linBASE_t;
-
-
-/** @def linREG
-* @brief LIN Register Frame Pointer
-*
-* This pointer is used by the LIN driver to access the lin module registers.
-*/
-#define linREG ((linBASE_t *)0xFFF7E400U)
-
-
-/** @def linPORT
-* @brief LIN GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of LIN
-* (use the GIO drivers to access the port pins).
-*/
-#define linPORT ((gioPORT_t *)0xFFF7E440U)
-
-/* LIN Interface Functions */
-void linInit(void);
-void linSetFunctional(linBASE_t *lin, uint32_t port);
-void linSendHeader(linBASE_t *lin, uint8_t identifier);
-void linSendWakupSignal(linBASE_t *lin);
-void linEnterSleep(linBASE_t *lin);
-void linSoftwareReset(linBASE_t *lin);
-uint32_t linIsTxReady(linBASE_t *lin);
-void linSetLength(linBASE_t *lin, uint32_t length);
-void linSend(linBASE_t *lin, const uint8_t *data);
-uint32_t linIsRxReady(linBASE_t *lin);
-uint32_t linTxRxError(linBASE_t *lin);
-uint32_t linGetIdentifier(linBASE_t *lin);
-void linGetData(linBASE_t *lin, uint8_t * const data);
-void linEnableNotification(linBASE_t *lin, uint32_t flags);
-void linDisableNotification(linBASE_t *lin, uint32_t flags);
-void linEnableLoopback(linBASE_t *lin, Loopbacktype_t Loopbacktype);
-void linDisableLoopback(linBASE_t *lin);
-
-/** @fn void linNotification(linBASE_t *lin, uint32_t flags)
-* @brief Interrupt callback
-* @param[in] lin - lin module base address
-* @param[in] flags - copy of error interrupt flags
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is a copy of the
-* interrupt flag register.
-*/
-void linNotification(linBASE_t *lin, uint32_t flags);
-#endif
+++ /dev/null
-/**
- * \file mdio.h
- *
- * \brief MDIO APIs and macros.
- *
- * This file contains the driver API prototypes and macro definitions.
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-#ifndef __MDIO_H__
-#define __MDIO_H__
-
-#include "sys/hw_mdio.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-/*****************************************************************************/
-/*
-** Prototypes for the APIs
-*/
-extern unsigned int MDIOPhyAliveStatusGet(unsigned int baseAddr);
-extern unsigned int MDIOPhyLinkStatusGet(unsigned int baseAddr);
-extern void MDIOInit(unsigned int baseAddr, unsigned int mdioInputFreq,
- unsigned int mdioOutputFreq);
-extern unsigned int MDIOPhyRegRead(unsigned int baseAddr, unsigned int phyAddr,
- unsigned int regNum, volatile unsigned short *dataPtr);
-extern void MDIOPhyRegWrite(unsigned int baseAddr, unsigned int phyAddr,
- unsigned int regNum, unsigned short RegVal);
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* __MDIO_H__ */
+++ /dev/null
-/** @file mibspi.h
-* @brief MIBSPI Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __MIBSPI_H__
-#define __MIBSPI_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-
-/** @enum triggerEvent
-* @brief Transfer Group Trigger Event
-*/
-enum triggerEvent
-{
- TRG_NEVER = 0,
- TRG_RISING = 1,
- TRG_FALLING = 2,
- TRG_BOTH = 3,
- TRG_HIGH = 5,
- TRG_LOW = 6,
- TRG_ALWAYS = 7
-};
-
-/** @enum triggerSource
-* @brief Transfer Group Trigger Source
-*/
-enum triggerSource
-{
- TRG_DISABLED,
- TRG_GIOA0,
- TRG_GIOA1,
- TRG_GIOA2,
- TRG_GIOA3,
- TRG_GIOA4,
- TRG_GIOA5,
- TRG_GIOA6,
- TRG_GIOA7,
- TRG_HET8,
- TRG_HET10,
- TRG_HET12,
- TRG_HET14,
- TRG_HET16,
- TRG_HET18,
- TRG_TICK
-};
-
-
-/** @enum mibspiPinSelect
-* @brief mibspi Pin Select
-*/
-enum mibspiPinSelect
-{
- PIN_CS0 = 0,
- PIN_CS1 = 1,
- PIN_CS2 = 2,
- PIN_CS3 = 3,
- PIN_CS4 = 4,
- PIN_CS5 = 5,
- PIN_CS6 = 6,
- PIN_CS7 = 7,
- PIN_ENA = 8,
- PIN_CLK = 9,
- PIN_SIMO = 10,
- PIN_SOMI = 11,
- PIN_SIMO_1 = 17,
- PIN_SIMO_2 = 18,
- PIN_SIMO_3 = 19,
- PIN_SIMO_4 = 20,
- PIN_SIMO_5 = 21,
- PIN_SIMO_6 = 22,
- PIN_SIMO_7 = 23,
- PIN_SOMI_1 = 25,
- PIN_SOMI_2 = 26,
- PIN_SOMI_3 = 27,
- PIN_SOMI_4 = 28,
- PIN_SOMI_5 = 29,
- PIN_SOMI_6 = 30,
- PIN_SOMI_7 = 31
-};
-
-
-/** @enum chipSelect
-* @brief Transfer Group Chip Select
-*/
-enum chipSelect
-{
- CS_NONE = 0xFF,
- CS_0 = 0xFE,
- CS_1 = 0xFD,
- CS_2 = 0xFB,
- CS_3 = 0xF7,
- CS_4 = 0xEF,
- CS_5 = 0xDF,
- CS_6 = 0xBF,
- CS_7 = 0x7F
-};
-
-
-
-/** @struct mibspiBase
-* @brief MIBSPI Register Definition
-*
-* This structure is used to access the MIBSPI module egisters.
-*/
-/** @typedef mibspiBASE_t
-* @brief MIBSPI Register Frame Type Definition
-*
-* This type is used to access the MIBSPI Registers.
-*/
-typedef volatile struct mibspiBase
-{
- uint32_t GCR0; /**< 0x0000: Global Control 0 */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t GCR1 : 8U; /**< 0x0007: Global Control 1 */
- uint32_t PD : 1U; /**< 0x0006: Power down bit */
- uint32_t : 7U;
- uint32_t LB : 1U; /**< 0x0005: Loop back bit */
- uint32_t : 7U;
- uint32_t ENA : 1U; /**< 0x0004: MIBSPI Enable bit */
- uint32_t : 7U;
- uint32_t INT0 : 16U; /**< 0x000A: Interrupt Enable bits */
- uint32_t DMAREQEN : 1U; /**< 0x0009: DMA Request enable */
- uint32_t : 7U;
- uint32_t ENAHIGHZ : 1U; /**< 0x0008: Enable HIGHZ outputs */
- uint32_t : 7U;
-#else
- uint32_t : 7U;
- uint32_t ENA : 1U; /**< 0x0004: MIBSPI Enable bit */
- uint32_t : 7U;
- uint32_t LB : 1U; /**< 0x0005: Loop back bit */
- uint32_t : 7U;
- uint32_t PD : 1U; /**< 0x0006: Power down bit */
- uint32_t GCR1 : 8U; /**< 0x0007: Global Control 1 */
- uint32_t : 7U;
- uint32_t ENAHIGHZ : 1U; /**< 0x0008: Enable HIGHZ outputs */
- uint32_t : 7U;
- uint32_t DMAREQEN : 1U; /**< 0x0009: DMA Request enable */
- uint32_t INT0 : 16U; /**< 0x000A: Interrupt Enable bits */
-#endif
- uint32_t LVL; /**< 0x000C: Interrupt Level */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t FLG : 16U; /**< 0x0012: Interrupt flags */
- uint32_t : 8U;
- uint32_t BUFINIT : 1U; /**< 0x0010: Buffer inialisation active flag */
- uint32_t : 7U;
-#else
- uint32_t : 7U;
- uint32_t BUFINIT : 1U; /**< 0x0010: Buffer inialisation active flag */
- uint32_t : 8U;
- uint32_t FLG : 16U; /**< 0x0012: Interrupt flags */
-#endif
- uint32_t PCFUN; /**< 0x0014: Function Pin Enable */
- uint32_t PCDIR; /**< 0x0018: Pin Direction */
- uint32_t PCDIN; /**< 0x001C: Pin Input Latch */
- uint32_t PCDOUT; /**< 0x0020: Pin Output Latch */
- uint32_t PCSET; /**< 0x0024: Output Pin Set */
- uint32_t PCCLR; /**< 0x0028: Output Pin Clr */
- uint32_t PCPDR; /**< 0x002C: Open Drain Output Enable */
- uint32_t PCDIS; /**< 0x0030: Pullup/Pulldown Disable */
- uint32_t PCPSL; /**< 0x0034: Pullup/Pulldown Selection */
- uint32_t DAT0; /**< 0x0038: Transmit Data */
- uint32_t DAT1; /**< 0x003C: Transmit Data with Format and Chip Select */
- uint32_t BUF; /**< 0x0040: Receive Buffer */
- uint32_t EMU; /**< 0x0044: Emulation Receive Buffer */
- uint32_t DELAY; /**< 0x0048: Delays */
- uint32_t CSDEF; /**< 0x004C: Default Chip Select */
- uint32_t FMT0; /**< 0x0050: Data Format 0 */
- uint32_t FMT1; /**< 0x0054: Data Format 1 */
- uint32_t FMT2; /**< 0x0058: Data Format 2 */
- uint32_t FMT3; /**< 0x005C: Data Format 3 */
- uint32_t INTVECT0; /**< 0x0060: Interrupt Vector 0 */
- uint32_t INTVECT1; /**< 0x0064: Interrupt Vector 1 */
- uint32_t SRSEL; /**< 0x0068: Slew Rate Select */
- uint32_t PMCTRL; /**< 0x006C: Parrallel Mode Control */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t MIBSPIE : 16U; /**< 0x0072: MibSPI Enable */
- uint32_t RAMACCESS : 16U; /**< 0x0070: RX Ram Write Access Enable */
- uint32_t SETINTENASUS : 16U;
- uint32_t SETINTENARDY : 16U; /**< 0x0074: Transfer Group Interrupt Enable Set Register */
- uint32_t CLRINTENASUS : 16U;
- uint32_t CLRINTENARDY : 16U; /**< 0x0078: Transfer Group Interrupt Enable Clear Register */
- uint32_t SETINTLVLSUS : 16U;
- uint32_t SETINTLVLRDY : 16U; /**< 0x007C: Transfer Group Interrupt Level Set Register */
- uint32_t CLRINTLVLSUS : 16U;
- uint32_t CLRINTLVLRDY : 16U; /**< 0x0080: Transfer Group Interrupt Level Clear Register */
- uint32_t INTFLGSUS : 16U;
- uint32_t INTFLGRDY : 16U; /**< 0x0084: Transfer Group Interrupt Flags */
-#else
- uint32_t RAMACCESS : 16U; /**< 0x0070: RX Ram Write Access Enable */
- uint32_t MIBSPIE : 16U; /**< 0x0072: MibSPI Enable */
- uint32_t SETINTENARDY : 16U; /**< 0x0074: Transfer Group Interrupt Enable Set Register */
- uint32_t SETINTENASUS : 16U;
- uint32_t CLRINTENARDY : 16U; /**< 0x0078: Transfer Group Interrupt Enable Clear Register */
- uint32_t CLRINTENASUS : 16U;
- uint32_t SETINTLVLRDY : 16U; /**< 0x007C: Transfer Group Interrupt Level Set Register */
- uint32_t SETINTLVLSUS : 16U;
- uint32_t CLRINTLVLRDY : 16U; /**< 0x0080: Transfer Group Interrupt Level Clear Register */
- uint32_t CLRINTLVLSUS : 16U;
- uint32_t INTFLGRDY : 16U; /**< 0x0084: Transfer Group Interrupt Flags */
- uint32_t INTFLGSUS : 16U;
-#endif
- uint32_t : 32U;
- uint32_t : 32U;
- uint32_t TICKCNT; /**< 0x0090: Tick Counter */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t : 8U;
- uint32_t LTGPEND : 7U; /**< 0x0096: Transfer Group End Pointer */
- uint32_t : 9U;
- uint32_t TGINSERVICE : 5U;
- uint32_t : 3U;
-#else
- uint32_t : 3U;
- uint32_t TGINSERVICE : 5U;
- uint32_t : 9U;
- uint32_t LTGPEND : 7U; /**< 0x0096: Transfer Group End Pointer */
- uint32_t : 8U;
-#endif
- uint32_t TGCTRL[16U]; /**< 0x0098 - 0x00D4: Transfer Group Control */
- uint32_t DMACTRL[8U]; /**< 0x00D8 - 0x00F4: DMA Control */
- uint32_t DMACOUNT[8U]; /**< 0x00F8 - 0x0114: DMA Count */
- uint32_t DMACNTLEN; /**< 0x0118 - 0x0114: DMA Control length */
- uint32_t : 32U;
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint32_t EDEN : 4U;
- uint32_t : 4U;
- uint32_t PTESTEN : 1U;
- uint32_t : 23U;
-#else
- uint32_t : 23U;
- uint32_t PTESTEN : 1U;
- uint32_t : 4U;
- uint32_t EDEN : 4U;
-#endif
- uint32_t UERRSTAT;
- uint32_t UERRADDRRX;
- uint32_t UERRADDRTX;
- uint32_t RXOVRN_BUF_ADDR; /**< 0x0130: */
- uint32_t IOLPKTSTCR; /**< 0x0134: IO loopback */
- uint32_t EXT_PRESCALE1; /**< 0x0138: */
- uint32_t EXT_PRESCALE2; /**< 0x013C: */
-} mibspiBASE_t;
-
-
-/** @def mibspiREG1
-* @brief MIBSPI1 Register Frame Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi module registers.
-*/
-#define mibspiREG1 ((mibspiBASE_t *)0xFFF7F400U)
-
-
-/** @def mibspiPORT1
-* @brief MIBSPI1 GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of MIBSPI1
-* (use the GIO drivers to access the port pins).
-*/
-#define mibspiPORT1 ((gioPORT_t *)0xFFF7F418U)
-
-/** @def mibspiREG3
-* @brief MIBSPI3 Register Frame Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi module registers.
-*/
-#define mibspiREG3 ((mibspiBASE_t *)0xFFF7F800U)
-
-
-/** @def mibspiPORT3
-* @brief MIBSPI3 GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of MIBSPI3
-* (use the GIO drivers to access the port pins).
-*/
-#define mibspiPORT3 ((gioPORT_t *)0xFFF7F818U)
-
-/** @def mibspiREG5
-* @brief MIBSPI5 Register Frame Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi module registers.
-*/
-#define mibspiREG5 ((mibspiBASE_t *)0xFFF7FC00U)
-
-
-/** @def mibspiPORT5
-* @brief MIBSPI5 GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of MIBSPI5
-* (use the GIO drivers to access the port pins).
-*/
-#define mibspiPORT5 ((gioPORT_t *)0xFFF7FC18U)
-
-
-/** @struct mibspiRamBase
-* @brief MIBSPI Buffer RAM Definition
-*
-* This structure is used to access the MIBSPI buffer memory.
-*/
-/** @typedef mibspiRAM_t
-* @brief MIBSPI RAM Type Definition
-*
-* This type is used to access the MIBSPI RAM.
-*/
-typedef volatile struct mibspiRamBase
-{
- struct
- {
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint16_t data; /**< tx buffer data */
- uint16_t control; /**< tx buffer control */
-#else
- uint16_t control; /**< tx buffer control */
- uint16_t data; /**< tx buffer data */
-#endif
- } tx[128];
- struct
- {
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint16_t data; /**< rx buffer data */
- uint16_t flags; /**< rx buffer flags */
-#else
- uint16_t flags; /**< rx buffer flags */
- uint16_t data; /**< rx buffer data */
-#endif
- } rx[128];
-} mibspiRAM_t;
-
-
-/** @def mibspiRAM1
-* @brief MIBSPI1 Buffer RAM Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi buffer memory.
-*/
-#define mibspiRAM1 ((mibspiRAM_t *)0xFF0E0000U)
-
-/** @def mibspiRAM3
-* @brief MIBSPI3 Buffer RAM Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi buffer memory.
-*/
-#define mibspiRAM3 ((mibspiRAM_t *)0xFF0C0000U)
-
-/** @def mibspiRAM5
-* @brief MIBSPI5 Buffer RAM Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi buffer memory.
-*/
-#define mibspiRAM5 ((mibspiRAM_t *)0xFF0A0000U)
-
-/** @def mibspiPARRAM1
-* @brief MIBSPI1 Buffer RAM PARITY Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi buffer memory.
-*/
-#define mibspiPARRAM1 (*(unsigned int *)(0xFF0E0000U + 0x00000400U))
-
-/** @def mibspiPARRAM3
-* @brief MIBSPI3 Buffer RAM PARITY Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi buffer memory.
-*/
-#define mibspiPARRAM3 (*(unsigned int *)(0xFF0C0000U + 0x00000400U))
-
-
-/** @def mibspiPARRAM5
-* @brief MIBSPI5 Buffer RAM PARITY Pointer
-*
-* This pointer is used by the MIBSPI driver to access the mibspi buffer memory.
-*/
-#define mibspiPARRAM5 (*(unsigned int *)(0xFF0A0000U + 0x00000400U))
-
-
-/* MIBSPI Interface Functions */
-void mibspiInit(void);
-void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32_t port);
-void mibspiSetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[]);
-uint32_t mibspiGetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[]);
-void mibspiTransfer(mibspiBASE_t *mibspi, uint32_t group);
-int mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32_t group);
-void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32_t group, uint32_t level);
-void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32_t group);
-void mibspiEnableLoopback(mibspiBASE_t *mibspi, Loopbacktype_t Loopbacktype);
-void mibspiDisableLoopback(mibspiBASE_t *mibspi);
-
-
-/** @fn void mibspiNotification(mibspiBASE_t *mibspi, uint32_t flags)
-* @brief Error interrupt callback
-* @param[in] mibspi - mibSpi module base address
-* @param[in] flags - Copy of error interrupt flags
-*
-* This is a error callback that is provided by the application and is call apon
-* an error interrupt. The paramer passed to the callback is a copy of the error
-* interrupt flag register.
-*/
-void mibspiNotification(mibspiBASE_t *mibspi, uint32_t flags);
-
-
-/** @fn void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32_t group)
-* @brief Transfer complete notification callback
-* @param[in] mibspi - mibSpi module base address
-* @param[in] group - Transfer group
-*
-* This is a callback function provided by the application. It is call when
-* a transfer is complete. The paramter is the transfer group that triggered
-* the interrupt.
-*/
-void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32_t group);
-
-#endif
+++ /dev/null
-/** @file pom.h
-* @brief POM Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#include "base.h"
-
-
-#ifndef __POM_H__
-#define __POM_H__
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/** @enum pom_region_size
-* @brief Alias names for pom region size
-* This enumeration is used to provide alias names for POM region size:
-*/
-enum pom_region_size
-{
- SIZE_32BYTES = 0,
- SIZE_64BYTES = 1,
- SIZE_128BYTES = 2,
- SIZE_256BYTES = 3,
- SIZE_512BYTES = 4,
- SIZE_1KB = 5,
- SIZE_2KB = 6,
- SIZE_4KB = 7,
- SIZE_8KB = 8,
- SIZE_16KB = 9,
- SIZE_32KB = 10,
- SIZE_64KB = 11,
- SIZE_128KB = 12,
- SIZE_256KB = 13
-};
-
-/** @def INTERNAL_RAM
-* @brief Alias name for Internal RAM
-*/
-#define INTERNAL_RAM 0x08000000U
-
-/** @def SDRAM
-* @brief Alias name for SD RAM
-*/
-#define SDRAM 0x80000000U
-
-/** @def ASYNC_MEMORY
-* @brief Alias name for Async RAM
-*/
-#define ASYNC_MEMORY 0x60000000
-
-
-typedef uint32_t REGION;
-
-/** @struct REGION_CONFIG_ST
-* @brief POM region configuration
-*/
-typedef struct
-{
- uint32_t Prog_Reg_Sta_Addr;
- uint32_t Ovly_Reg_Sta_Addr;
- uint32_t Reg_Size;
-}REGION_CONFIG_ST;
-
-/** @struct POMBase
-* @brief POM Register Frame Definition
-*
-* This structure is used to access the POM module registers(POM Register Map).
-*/
-typedef struct
-{
- uint32_t POMGLBCTRL_UL; /* 0x00 */
- uint32_t POMREV_UL; /* 0x04 */
- uint32_t POMCLKCTRL_UL; /* 0x08 */
- uint32_t POMFLG_UL; /* 0x0C */
- struct
- {
- uint32_t Reserved_Reg_B32: 32;
- }RESERVED_REG[124];
- struct /* 0x200 ... */
- {
- uint32_t POMPROGSTART_UL;
- uint32_t POMOVLSTART_UL;
- uint32_t POMREGSIZE_UL;
- uint32_t : 32;
- }POMRGNCONF_ST[32];
-}pomBASE_t;
-
-
-/** @struct POM_CORESIGHT_ST
-* @brief POM_CORESIGHT_ST Register Definition
-*
-* This structure is used to access the POM module registers(POM CoreSight Registers ).
-*/
-typedef struct
-{
- uint32_t POMITCTRL_UL; /* 0xF00 */
- struct /* 0xF04 to 0xF9C */
- {
- uint32_t Reserved_Reg_UL;
- }Reserved1_ST[39];
- uint32_t POMCLAIMSET_UL; /* 0xFA0 */
- uint32_t POMCLAIMCLR_UL; /* 0xFA4 */
- uint32_t : 32; /* 0xFA8 */
- uint32_t : 32; /* 0xFAC */
- uint32_t POMLOCKACCESS_UL; /* 0xFB0 */
- uint32_t POMLOCKSTATUS_UL; /* 0xFB4 */
- uint32_t POMAUTHSTATUS_UL; /* 0xFB8 */
- uint32_t : 32; /* 0xFBC */
- uint32_t : 32; /* 0xFC0 */
- uint32_t : 32; /* 0xFC4 */
- uint32_t POMDEVID_UL; /* 0xFC8 */
- uint32_t POMDEVTYPE_UL; /* 0xFCC */
- uint32_t POMPERIPHERALID4_UL; /* 0xFD0 */
- uint32_t POMPERIPHERALID5_UL; /* 0xFD4 */
- uint32_t POMPERIPHERALID6_UL; /* 0xFD8 */
- uint32_t POMPERIPHERALID7_UL; /* 0xFDC */
- uint32_t POMPERIPHERALID0_UL; /* 0xFE0 */
- uint32_t POMPERIPHERALID1_UL; /* 0xFE4 */
- uint32_t POMPERIPHERALID2_UL; /* 0xFE8 */
- uint32_t POMPERIPHERALID3_UL; /* 0xFEC */
- uint32_t POMCOMPONENTID0_UL; /* 0xFF0 */
- uint32_t POMCOMPONENTID1_UL; /* 0xFF4 */
- uint32_t POMCOMPONENTID2_UL; /* 0xFF8 */
- uint32_t POMCOMPONENTID3_UL; /* 0xFFC */
-}POM_CORESIGHT_ST;
-
-
-#define pomREG ((pomBASE_t *)0xFFA04000U)
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/* POM Interface Functions */
-void POM_Init(void);
-void POM_Disable(void);
-void POM_Reset(void);
-
-#endif /* __POM_H_*/
+++ /dev/null
-/** @file rtp.h
-* @brief RTP Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __RTP_H__
-#define __RTP_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-
-/** @struct rtpBase
-* @brief RTP Base Register Definition
-*
-* This structure is used to access the RTP module egisters.
-*/
-/** @typedef rtpBASE_t
-* @brief RTP Register Frame Type Definition
-*
-* This type is used to access the RTP Registers.
-*/
-typedef volatile struct rtpBase
-{
- uint32_t GLBCTRL; /**< 0x0000: RTP Global Control Register */
- uint32_t TRENA; /**< 0x0004: RTP Trace Enable Register */
- uint32_t GSR; /**< 0x0008: RTP Global Status Register */
- uint32_t RAM1REG1; /**< 0x000C: RTP RAM 1 Trace Region 1 Register */
- uint32_t RAM1REG2; /**< 0x0010: RTP RAM 1 Trace Region 2 Register */
- uint32_t RAM2REG1; /**< 0x0014: RTP RAM 2 Trace Region 1 Register */
- uint32_t RAM2REG2; /**< 0x0018: RTP RAM 2 Trace Region 2 Register */
- uint32_t : 32; /**< 0x001C: Reserved */
- uint32_t : 32; /**< 0x0020: Reserved */
- uint32_t ERREG1; /**< 0x0024: RTP Peripheral Trace Region 1 Register */
- uint32_t ERREG2; /**< 0x0028: RTP Peripheral Trace Region 2 Register */
- uint32_t DDMW; /**< 0x002C: RTP Direct Data Mode Write Register */
- uint32_t : 32; /**< 0x0030: Reserved */
- uint32_t PC0; /**< 0x0034: RTP Pin Control 0 Register */
- uint32_t PC1; /**< 0x0038: RTP Pin Control 1 Register */
- uint32_t PC2; /**< 0x003C: RTP Pin Control 2 Register */
- uint32_t PC3; /**< 0x0040: RTP Pin Control 3 Register */
- uint32_t PC4; /**< 0x0044: RTP Pin Control 4 Register */
- uint32_t PC5; /**< 0x0048: RTP Pin Control 5 Register */
- uint32_t PC6; /**< 0x004C: RTP Pin Control 6 Register */
- uint32_t PC7; /**< 0x0050: RTP Pin Control 7 Register */
- uint32_t PC8; /**< 0x0054: RTP Pin Control 8 Register */
-} rtpBASE_t;
-
-
-/** @def rtpREG
-* @brief RTP Register Frame Pointer
-*
-* This pointer is used by the RTP driver to access the RTP module registers.
-*/
-#define rtpREG ((rtpBASE_t *)0xFFFFFA00U)
-
-/** @def rtpPORT
-* @brief RTP Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of RTP
-* (use the GIO drivers to access the port pins).
-*/
-#define rtpPORT ((gioPORT_t *)0xFFFFFA38U)
-
-
-/* RTP Interface Functions */
-void rtpInit(void);
-#endif
+++ /dev/null
-/** @file sci.h
-* @brief SCI Driver Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#ifndef __SCI_H__
-#define __SCI_H__
-
-#include "base.h"
-#include "sys/ti_drv_gio.h"
-
-
-/** @enum sciIntFlags
-* @brief Interrupt Flag Definitions
-*
-* Used with sciEnableNotification, sciDisableNotification
-*/
-enum sciIntFlags
-{
- SCI_FE_INT = 0x04000000, /* framming error */
- SCI_OE_INT = 0x02000000, /* overrun error */
- SCI_PE_INT = 0x01000000, /* parity error */
- SCI_RX_INT = 0x00000200, /* receive buffer ready */
- SCI_TX_INT = 0x00000100, /* transmit buffer ready */
- SCI_WAKE_INT = 0x00000002, /* wakeup */
- SCI_BREAK_INT = 0x00000001 /* break detect */
-};
-
-
-/** @struct sciBase
-* @brief SCI Register Definition
-*
-* This structure is used to access the SCI module egisters.
-*/
-/** @typedef sciBASE_t
-* @brief SCI Register Frame Type Definition
-*
-* This type is used to access the SCI Registers.
-*/
-
-enum sciPinSelect
-{
- PIN_SCI_TX = 0,
- PIN_SCI_RX = 1
-};
-
-/** @struct sciBase
-* @brief SCI Base Register Definition
-*
-* This structure is used to access the SCI module egisters.
-*/
-/** @typedef sciBASE_t
-* @brief SCI Register Frame Type Definition
-*
-* This type is used to access the SCI Registers.
-*/
-typedef volatile struct sciBase
-{
- uint32_t GCR0; /**< 0x0000 Global Control Register 0 */
- uint32_t GCR1; /**< 0x0004 Global Control Register 1 */
- uint32_t GCR2; /**< 0x0008 Global Control Register 2 */
- uint32_t SETINT; /**< 0x000C Set Interrupt Enable Register */
- uint32_t CLRINT; /**< 0x0010 Clear Interrupt Enable Register */
- uint32_t SETINTLVL; /**< 0x0014 Set Interrupt Level Register */
- uint32_t CLRINTLVL; /**< 0x0018 Set Interrupt Level Register */
- uint32_t FLR; /**< 0x001C Interrupt Flag Register */
- uint32_t INTVECT0; /**< 0x0020 Interrupt Vector Offset 0 */
- uint32_t INTVECT1; /**< 0x0024 Interrupt Vector Offset 1 */
- uint32_t LENGTH; /**< 0x0028 Format Control Register */
- uint32_t BAUD; /**< 0x002C Baud Rate Selection Register */
-#if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
- uint8_t ED; /**< 0x0033 Emulation Register */
- uint32_t : 24U;
- uint8_t RD; /**< 0x0037 Receive Data Buffer */
- uint32_t : 24U;
- uint8_t TD; /**< 0x003B Transmit Data Buffer */
- uint32_t : 24U;
-#else
- uint32_t : 24U;
- uint8_t ED; /**< 0x0033 Emulation Register */
- uint32_t : 24U;
- uint8_t RD; /**< 0x0037 Receive Data Buffer */
- uint32_t : 24U;
- uint8_t TD; /**< 0x003B Transmit Data Buffer */
-#endif
- uint32_t FUN; /**< 0x003C Pin Function Register */
- uint32_t DIR; /**< 0x0040 Pin Direction Register */
- uint32_t DIN; /**< 0x0044 Pin Data In Register */
- uint32_t DOUT; /**< 0x0048 Pin Data Out Register */
- uint32_t SET; /**< 0x004C Pin Data Set Register */
- uint32_t CLR; /**< 0x0050 Pin Data Clr Register */
- uint32_t ODR; /**< 0x0054: Pin Open Drain Output Enable Register */
- uint32_t PD; /**< 0x0058: Pin Pullup/Pulldown Disable Register */
- uint32_t PSL; /**< 0x005C: Pin Pullup/Pulldown Selection Register */
- uint32_t : 32U; /**< 0x060: Reserved */
- uint32_t : 32U; /**< 0x064: Reserved */
- uint32_t : 32U; /**< 0x068: Reserved */
- uint32_t : 32U; /**< 0x06C: Reserved */
- uint32_t : 32U; /**< 0x070: Reserved */
- uint32_t : 32U; /**< 0x074: Reserved */
- uint32_t : 32U; /**< 0x078: Reserved */
- uint32_t : 32U; /**< 0x07C: Reserved */
- uint32_t : 32U; /**< 0x080: Reserved */
- uint32_t : 32U; /**< 0x084: Reserved */
- uint32_t : 32U; /**< 0x088: Reserved */
- uint32_t : 32U; /**< 0x08C: Reserved */
- uint32_t IODFTCTRL; /**< 0x0090: I/O Error Enable Register */
-} sciBASE_t;
-
-
-/** @def sciREG
-* @brief Register Frame Pointer
-*
-* This pointer is used by the SCI driver to access the sci module registers.
-*/
-#define sciREG ((sciBASE_t *)0xFFF7E500U)
-
-
-/** @def sciPORT
-* @brief SCI GIO Port Register Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of SCI
-* (use the GIO drivers to access the port pins).
-*/
-#define sciPORT ((gioPORT_t *)0xFFF7E540U)
-
-
-/** @def scilinREG
-* @brief SCILIN (LIN - Compatibility Mode) Register Frame Pointer
-*
-* This pointer is used by the SCI driver to access the sci module registers.
-*/
-#define scilinREG ((sciBASE_t *)0xFFF7E400U)
-
-
-/** @def scilinPORT
-* @brief SCILIN (LIN - Compatibility Mode) Register Frame Pointer
-*
-* Pointer used by the GIO driver to access I/O PORT of LIN
-* (use the GIO drivers to access the port pins).
-*/
-#define scilinPORT ((gioPORT_t *)0xFFF7E440U)
-
-
-/* SCI Interface Functions */
-void sciInit(void);
-void sciSetFunctional(sciBASE_t *sci, uint32_t port);
-void sciSetBaudrate(sciBASE_t *sci, uint32_t baud);
-int sciIsTxReady(sciBASE_t *sci);
-//void sciSendByte(sciBASE_t *sci, uint8_t byte);
-//void sciSend(sciBASE_t *sci, uint32_t length, uint8_t *data);
-int sciIsRxReady(sciBASE_t *sci);
-int sciRxError(sciBASE_t *sci);
-int sciReceiveByte(sciBASE_t *sci);
-void sciReceive(sciBASE_t *sci, uint32_t length, uint8_t *data);
-void sciEnableNotification(sciBASE_t *sci, uint32_t flags);
-void sciDisableNotification(sciBASE_t *sci, uint32_t flags);
-void sciEnableLoopback(sciBASE_t *sci, Loopbacktype_t Loopbacktype);
-void sciDisableLoopback(sciBASE_t *sci);
-
-/** @fn void sciNotification(sciBASE_t *sci, uint32_t flags)
-* @brief Interrupt callback
-* @param[in] sci - sci module base address
-* @param[in] flags - copy of error interrupt flags
-*
-* This is a callback that is provided by the application and is called apon
-* an interrupt. The parameter passed to the callback is a copy of the
-* interrupt flag register.
-*/
-void sciNotification(sciBASE_t *sci, uint32_t flags);
-
-
-/** Flag for transfer in progress */
-#define BUF_TRANSFER_IN_PROGRESS 1
-
-/** Struct to represent IO buffer for SCI */
-typedef struct {
- xQueueHandle buf; /* Ring buffer (FreeRTOS queue) */
- xSemaphoreHandle mutex; /* Mutex to allow speaking only one device at time */
- uint8_t flags; /* Flags */
-} tBuffer;
-
-
-#endif
+++ /dev/null
-/**
- * RPP API types definition header file.
- *
- * @file types.h
- *
- * @copyright Copyright (C) 2013 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __RPP_TYPES_H
-#define __RPP_TYPES_H
-
-
-#ifndef NULL
-/**
- * NULL definition
- */
-#define NULL ((void *) 0U)
-#endif
-
-
-#ifndef TRUE
-/**
- * Boolean definition for TRUE
- */
-#define TRUE 1
-#endif
-
-
-#ifndef FALSE
-/**
- * Boolean definition for FALSE
- */
-#define FALSE 0
-#endif
-
-
-/**
- * Logic definition for logic HIGH
- */
-#define HIGH TRUE
-
-
-/**
- * Logic definition for logic LOW
- */
-#define LOW FALSE
-
-
-/**
- * Definition for SUCCESS
- */
-#define SUCCESS 0
-
-
-/**
- * Definition for FAILURE
- */
-#define FAILURE -1
-
-
-// Note: Sadly <stdint.h> is not available with CCS tools.
-#ifdef __GNUC__
-
-#include <stdint.h>
-#include <stdbool.h>
-typedef bool boolean_t;
-
-#else
-
-/**
- * Unsigned 64 bits integer datatype definition.
- */
-typedef unsigned long long uint64_t;
-
-
-/**
- * Unsigned 32 bits integer datatype definition.
- */
-typedef unsigned int uint32_t;
-
-
-/**
- * Unsigned 16 bits integer datatype definition.
- */
-typedef unsigned short uint16_t;
-
-
-/**
- * Unsigned 8 bits integer datatype definition.
- */
-typedef unsigned char uint8_t;
-
-
-/**
- * Signed 64 bits integer datatype definition.
- */
-typedef signed long long int64_t;
-
-
-/**
- * Signed 32 bits integer datatype definition.
- */
-typedef signed int int32_t;
-
-
-/**
- * Signed 16 bits integer datatype definition.
- */
-typedef signed short int16_t;
-
-
-/**
- * Signed 8 bits integer datatype definition.
- */
-typedef signed char int8_t;
-
-
-/**
- * Boolean datatype definition.
- */
-typedef unsigned char boolean_t;
-
-#endif /* __GNUC__ */
-
-#endif /* __RPP_TYPES_H */
+++ /dev/null
-#ifndef _UL_ITBASE_H
-#define _UL_ITBASE_H
-
-#include "ul_utdefs.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define UL_ITBASE_UL_DEC(cust_prefix, cust_container_t, cust_item_t) \
-typedef struct { cust_container_t *container; cust_item_t *item;}\
- cust_prefix##_it_t;\
-static inline cust_item_t * \
-cust_prefix##_it2item(const cust_prefix##_it_t *it)\
-{\
- return it->item;\
-}\
-static inline void \
-cust_prefix##_first_it(cust_container_t *container, cust_prefix##_it_t *it)\
-{\
- it->container=container;\
- it->item=cust_prefix##_first(container);\
-}\
-static inline void \
-cust_prefix##_last_it(cust_container_t *container, cust_prefix##_it_t *it)\
-{\
- it->container=container;\
- it->item=cust_prefix##_last(container);\
-}\
-static inline void \
-cust_prefix##_next_it(cust_prefix##_it_t *it)\
-{\
- if(it->item) it->item=cust_prefix##_next(it->container,it->item);\
- else it->item=cust_prefix##_first(it->container);\
-}\
-static inline void \
-cust_prefix##_prev_it(cust_prefix##_it_t *it)\
-{\
- if(it->item) it->item=cust_prefix##_prev(it->container,it->item);\
- else it->item=cust_prefix##_last(it->container);\
-}\
-static inline int \
-cust_prefix##_is_end_it(cust_prefix##_it_t *it)\
-{\
- return !it->item;\
-}\
-static inline void \
-cust_prefix##_delete_it(cust_prefix##_it_t *it)\
-{\
- cust_item_t *p;\
- if(!(p=it->item)) return;\
- it->item=cust_prefix##_next(it->container,it->item);\
- cust_prefix##_delete(it->container,p);\
-}
-
-#define UL_ITBASE_SORT_DEC(cust_prefix, cust_container_t, cust_item_t, cust_key_t) \
-UL_ITBASE_UL_DEC(cust_prefix, cust_container_t, cust_item_t) \
-static inline int \
-cust_prefix##_find_it(cust_container_t *container, cust_key_t *key, cust_prefix##_it_t *it)\
-{\
- it->container=container;\
- return (it->item=cust_prefix##_find(container, key))!=0;\
-}\
-static inline int \
-cust_prefix##_find_first_it(cust_container_t *container, cust_key_t *key, cust_prefix##_it_t *it)\
-{\
- it->container=container;\
- return (it->item=cust_prefix##_find_first(container, key))!=0;\
-}\
-static inline int \
-cust_prefix##_find_after_it(cust_container_t *container, cust_key_t *key, cust_prefix##_it_t *it)\
-{\
- it->container=container;\
- return (it->item=cust_prefix##_find_after(container, key))!=0;\
-}
-
-#define ul_for_each_it(cust_prefix, root, it) \
- for(cust_prefix##_first_it(root,&it);\
- !cust_prefix##_is_end_it(&it);cust_prefix##_next_it(&it))
-
-#define ul_for_each_rev_it(cust_prefix, root, it) \
- for(cust_prefix##_last_it(root,&it);\
- !cust_prefix##_is_end_it(&it);cust_prefix##_prev_it(&it))
-
-#define ul_for_each_from_it(cust_prefix, root, key, it) \
- for(cust_prefix##_find_first_it(root, key, &it);\
- !cust_prefix##_is_end_it(&it);cust_prefix##_next_it(&it))
-
-#define ul_for_each_after_it(cust_prefix, root, key, it) \
- for(cust_prefix##_find_after_it(root, key, &it);\
- !cust_prefix##_is_end_it(&it);cust_prefix##_next_it(&it))
-
-#ifdef __cplusplus
-} /* extern "C"*/
-#endif
-
-#endif /* _UL_ITBASE_H */
+++ /dev/null
-#ifndef _UL_LISTS_H
-#define _UL_LISTS_H
-
-#include "ul_utdefs.h"
-#include "ul_listbase.h"
-#include "ul_itbase.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-typedef struct list_head ul_list_node_t;
-typedef struct list_head ul_list_head_t;
-
-#define UL_LIST_CUST_DEC(cust_prefix, cust_head_t, cust_item_t,\
- cust_head_field, cust_node_field) \
-\
-static inline cust_item_t * \
-cust_prefix##_node2item(const cust_head_t *head, const ul_list_node_t *node) \
- {return UL_CONTAINEROF(node, cust_item_t, cust_node_field);}\
-\
-static inline void \
-cust_prefix##_init_head(cust_head_t *head)\
-{\
- INIT_LIST_HEAD(&head->cust_head_field);\
-}\
-static inline void \
-cust_prefix##_init_detached(cust_item_t *item) { \
- INIT_LIST_HEAD(&item->cust_node_field); \
-} \
-static inline cust_item_t *\
-cust_prefix##_first(const cust_head_t *head)\
-{\
- ul_list_node_t *n=head->cust_head_field.next;\
- return (n!=&head->cust_head_field)?cust_prefix##_node2item(head,n):NULL;\
-}\
-static inline cust_item_t *\
-cust_prefix##_last(const cust_head_t *head)\
-{\
- ul_list_node_t *n=head->cust_head_field.prev;\
- return (n!=&head->cust_head_field)?cust_prefix##_node2item(head,n):NULL;\
-}\
-static inline cust_item_t *\
-cust_prefix##_next(const cust_head_t *head, const cust_item_t *item)\
-{\
- ul_list_node_t *n=item->cust_node_field.next;\
- return (n!=&head->cust_head_field)?cust_prefix##_node2item(head,n):NULL;\
-}\
-static inline cust_item_t *\
-cust_prefix##_prev(const cust_head_t *head, const cust_item_t *item)\
-{\
- ul_list_node_t *n=item->cust_node_field.prev;\
- return (n!=&head->cust_head_field)?cust_prefix##_node2item(head,n):NULL;\
-}\
-static inline int \
-cust_prefix##_is_empty(const cust_head_t *head)\
-{\
- return head->cust_head_field.next==&head->cust_head_field;\
-}\
-static inline void \
-cust_prefix##_ins_head(cust_head_t *head, cust_item_t *item)\
-{\
- list_add(&item->cust_node_field, &head->cust_head_field);\
-}\
-static inline void \
-cust_prefix##_ins_tail(cust_head_t *head, cust_item_t *item)\
-{\
- list_add_tail(&item->cust_node_field, &head->cust_head_field);\
-}\
-static inline void \
-cust_prefix##_insert(cust_head_t *head, cust_item_t *item)\
-{\
- cust_prefix##_ins_tail(head, item);\
-}\
-static inline void \
-cust_prefix##_delete(cust_head_t *head, cust_item_t *item)\
-{\
- list_del_init(&item->cust_node_field);\
-}\
-static inline void \
-cust_prefix##_del_item(cust_item_t *item)\
-{\
- list_del_init(&item->cust_node_field);\
-}\
-static inline cust_item_t *\
-cust_prefix##_cut_first(cust_head_t *head)\
-{\
- ul_list_node_t *n=head->cust_head_field.next;\
- if(n==&head->cust_head_field) return NULL;\
- list_del_init(n);\
- return cust_prefix##_node2item(head,n);\
-}\
-/*** Iterators ***/\
-UL_ITBASE_UL_DEC(cust_prefix, cust_head_t, cust_item_t)
-
-
-#define ul_list_for_each(cust_prefix, head, ptr) \
- for(ptr=cust_prefix##_first(head);ptr;ptr=cust_prefix##_next((head),ptr))
-
-#define ul_list_for_each_rev(cust_prefix, head, ptr) \
- for(ptr=cust_prefix##_last(head);ptr;ptr=cust_prefix##_prev((head),ptr))
-
-#define ul_list_for_each_cut(cust_prefix, head, ptr) \
- for(;(ptr=cust_prefix##_cut_first(head));)
-
-#ifdef __cplusplus
-} /* extern "C"*/
-#endif
-
-#endif /* _UL_LISTS_H */
+++ /dev/null
-#ifndef _UL_LISTBASE_H
-#define _UL_LISTBASE_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifndef __KERNEL__
-
-#define LIST_POISON1 ((struct list_head *) 0)
-#define LIST_POISON2 ((struct list_head *) 0)
-
-/*
- * Simple doubly linked list implementation.
- *
- * Some of the internal functions ("__xxx") are useful when
- * manipulating whole lists rather than single entries, as
- * sometimes we already know the next/prev entries and we can
- * generate better code by using them directly rather than
- * using the generic single-entry routines.
- */
-
-struct list_head {
- struct list_head *next, *prev;
-};
-
-#define LIST_HEAD_INIT(name) { &(name), &(name) }
-
-#define LIST_HEAD(name) \
- struct list_head name = LIST_HEAD_INIT(name)
-
-#define INIT_LIST_HEAD(ptr) do { \
- (ptr)->next = (ptr); (ptr)->prev = (ptr); \
-} while (0)
-
-/*
- * Insert a new entry between two known consecutive entries.
- *
- * This is only for internal list manipulation where we know
- * the prev/next entries already!
- */
-static inline void __list_add(struct list_head *newe,
- struct list_head *prev,
- struct list_head *next)
-{
- next->prev = newe;
- newe->next = next;
- newe->prev = prev;
- prev->next = newe;
-}
-
-/**
- * list_add - add a new entry
- * @new: new entry to be added
- * @head: list head to add it after
- *
- * Insert a new entry after the specified head.
- * This is good for implementing stacks.
- */
-static inline void list_add(struct list_head *newe, struct list_head *head)
-{
- __list_add(newe, head, head->next);
-}
-
-/**
- * list_add_tail - add a new entry
- * @newe: new entry to be added
- * @head: list head to add it before
- *
- * Insert a new entry before the specified head.
- * This is useful for implementing queues.
- */
-static inline void list_add_tail(struct list_head *newe, struct list_head *head)
-{
- __list_add(newe, head->prev, head);
-}
-
-/*
- * Delete a list entry by making the prev/next entries
- * point to each other.
- *
- * This is only for internal list manipulation where we know
- * the prev/next entries already!
- */
-static inline void __list_del(struct list_head * prev, struct list_head * next)
-{
- next->prev = prev;
- prev->next = next;
-}
-
-/**
- * list_del - deletes entry from list.
- * @entry: the element to delete from the list.
- * Note: list_empty on entry does not return true after this, the entry is
- * in an undefined state.
- */
-static inline void list_del(struct list_head *entry)
-{
- __list_del(entry->prev, entry->next);
- entry->next = LIST_POISON1;
- entry->prev = LIST_POISON2;
-}
-
-/**
- * list_del_init - deletes entry from list and reinitialize it.
- * @entry: the element to delete from the list.
- */
-static inline void list_del_init(struct list_head *entry)
-{
- __list_del(entry->prev, entry->next);
- INIT_LIST_HEAD(entry);
-}
-
-/**
- * list_move - delete from one list and add as another's head
- * @list: the entry to move
- * @head: the head that will precede our entry
- */
-static inline void list_move(struct list_head *list, struct list_head *head)
-{
- __list_del(list->prev, list->next);
- list_add(list, head);
-}
-
-/**
- * list_move_tail - delete from one list and add as another's tail
- * @list: the entry to move
- * @head: the head that will follow our entry
- */
-static inline void list_move_tail(struct list_head *list,
- struct list_head *head)
-{
- __list_del(list->prev, list->next);
- list_add_tail(list, head);
-}
-
-/**
- * list_empty - tests whether a list is empty
- * @head: the list to test.
- */
-static inline int list_empty(struct list_head *head)
-{
- return head->next == head;
-}
-
-static inline void __list_splice(struct list_head *list,
- struct list_head *head)
-{
- struct list_head *first = list->next;
- struct list_head *last = list->prev;
- struct list_head *where = head->next;
-
- first->prev = head;
- head->next = first;
-
- last->next = where;
- where->prev = last;
-}
-
-/**
- * list_splice - join two lists
- * @list: the new list to add.
- * @head: the place to add it in the first list.
- */
-static inline void list_splice(struct list_head *list, struct list_head *head)
-{
- if (!list_empty(list))
- __list_splice(list, head);
-}
-
-/**
- * list_splice_init - join two lists and reinitialise the emptied list.
- * @list: the new list to add.
- * @head: the place to add it in the first list.
- *
- * The list at @list is reinitialised
- */
-static inline void list_splice_init(struct list_head *list,
- struct list_head *head)
-{
- if (!list_empty(list)) {
- __list_splice(list, head);
- INIT_LIST_HEAD(list);
- }
-}
-
-/**
- * list_entry - get the struct for this entry
- * @ptr: the &struct list_head pointer.
- * @type: the type of the struct this is embedded in.
- * @member: the name of the list_struct within the struct.
- */
-#define list_entry(ptr, type, member) \
- container_of(ptr, type, member)
-
-/**
- * list_for_each - iterate over a list
- * @pos: the &struct list_head to use as a loop counter.
- * @head: the head for your list.
- */
-#define list_for_each(pos, head) \
- for (pos = (head)->next, prefetch(pos->next); pos != (head); \
- pos = pos->next, prefetch(pos->next))
-
-/**
- * __list_for_each - iterate over a list
- * @pos: the &struct list_head to use as a loop counter.
- * @head: the head for your list.
- *
- * This variant differs from list_for_each() in that it's the
- * simplest possible list iteration code, no prefetching is done.
- * Use this for code that knows the list to be very short (empty
- * or 1 entry) most of the time.
- */
-#define __list_for_each(pos, head) \
- for (pos = (head)->next; pos != (head); pos = pos->next)
-
-/**
- * list_for_each_prev - iterate over a list backwards
- * @pos: the &struct list_head to use as a loop counter.
- * @head: the head for your list.
- */
-#define list_for_each_prev(pos, head) \
- for (pos = (head)->prev, prefetch(pos->prev); pos != (head); \
- pos = pos->prev, prefetch(pos->prev))
-
-/**
- * list_for_each_safe - iterate over a list safe against removal of list entry
- * @pos: the &struct list_head to use as a loop counter.
- * @n: another &struct list_head to use as temporary storage
- * @head: the head for your list.
- */
-#define list_for_each_safe(pos, n, head) \
- for (pos = (head)->next, n = pos->next; pos != (head); \
- pos = n, n = pos->next)
-
-/**
- * list_for_each_entry - iterate over list of given type
- * @pos: the type * to use as a loop counter.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- */
-#define list_for_each_entry(pos, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member), \
- prefetch(pos->member.next); \
- &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member), \
- prefetch(pos->member.next))
-
-/**
- * list_for_each_entry_reverse - iterate backwards over list of given type.
- * @pos: the type * to use as a loop counter.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- */
-#define list_for_each_entry_reverse(pos, head, member) \
- for (pos = list_entry((head)->prev, typeof(*pos), member), \
- prefetch(pos->member.prev); \
- &pos->member != (head); \
- pos = list_entry(pos->member.prev, typeof(*pos), member), \
- prefetch(pos->member.prev))
-
-
-/**
- * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry
- * @pos: the type * to use as a loop counter.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- */
-#define list_for_each_entry_safe(pos, n, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member), \
- n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
-
-#else /*__KERNEL__*/
-
-#include <linux/list.h>
-
-#endif /*__KERNEL__*/
-
-#ifdef __cplusplus
-} /* extern "C"*/
-#endif
-
-#endif /* _UL_LISTBASE_H */
+++ /dev/null
-/*******************************************************************
- uLan Utilities Library - C library of basic reusable constructions
-
- ul_utdefs.h - common defines used in uLan utilities library
-
- *******************************************************************/
-
-
-#ifndef _UL_UTDEFS_H
-#define _UL_UTDEFS_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#if defined(_WIN32)&&defined(_MSC_VER)&&!defined(inline)
-#define inline _inline
-#endif
-
-#ifndef UL_OFFSETOF
-/* offset of structure field */
-#define UL_OFFSETOF(_type,_member) \
- ((size_t)&(((_type*)0)->_member))
-#endif /*UL_OFFSET*/
-
-#ifndef UL_CONTAINEROF
-#ifdef __GNUC__
-#define UL_CONTAINEROF(_ptr, _type, _member) ({ \
- const typeof( ((_type *)0)->_member ) *__mptr = (_ptr); \
- (_type *)( (char *)__mptr - UL_OFFSETOF(_type,_member) );})
-#else /*!__GNUC__*/
-#define UL_CONTAINEROF(_ptr, _type, _member) \
- ((_type *)( (char *)_ptr - UL_OFFSETOF(_type,_member)))
-#endif /*__GNUC__*/
-#endif /*UL_CONTAINEROF*/
-
-#ifndef UL_NOPSTATEMENT
-#define UL_NOPSTATEMENT do { } while(0)
-#endif
-
-#ifndef ul_cyclic_gt
-#define ul_cyclic_gt(x,y) \
- ((sizeof(x)>=sizeof(long long))&&(sizeof(y)>=sizeof(long long))? \
- (long long)((unsigned long long)(x)-(unsigned long long)(y))>0: \
- (sizeof(x)>=sizeof(long))&&(sizeof(y)>=sizeof(long))? \
- (long)((unsigned long)(x)-(unsigned long)(y))>0: \
- (sizeof(x)>=sizeof(int))&&(sizeof(y)>=sizeof(int))? \
- (int)((unsigned int)(x)-(unsigned int)(y))>0: \
- (sizeof(x)>=sizeof(short))&&(sizeof(y)>=sizeof(short))? \
- (short)((unsigned short)(x)-(unsigned short)(y))>0: \
- (signed char)((unsigned char)(x)-(unsigned char)(y))>0 \
- )
-#endif /*ul_cyclic_gt*/
-
-#ifndef ul_cyclic_ge
-#define ul_cyclic_ge(x,y) \
- ((sizeof(x)>=sizeof(long long))&&(sizeof(y)>=sizeof(long long))? \
- (long long)((unsigned long long)(x)-(unsigned long long)(y))>=0: \
- (sizeof(x)>=sizeof(long))&&(sizeof(y)>=sizeof(long))? \
- (long)((unsigned long)(x)-(unsigned long)(y))>=0: \
- (sizeof(x)>=sizeof(int))&&(sizeof(y)>=sizeof(int))? \
- (int)((unsigned int)(x)-(unsigned int)(y))>=0: \
- (sizeof(x)>=sizeof(short))&&(sizeof(y)>=sizeof(short))? \
- (short)((unsigned short)(x)-(unsigned short)(y))>=0: \
- (signed char)((unsigned char)(x)-(unsigned char)(y))>=0 \
- )
-#endif /*ul_cyclic_ge*/
-
-/* GNUC neat features */
-
-#ifdef __GNUC__
-#ifndef UL_ATTR_UNUSED
-#define UL_ATTR_PRINTF( format_idx, arg_idx ) \
- __attribute__((format (printf, format_idx, arg_idx)))
-#define UL_ATTR_SCANF( format_idx, arg_idx ) \
- __attribute__((format (scanf, format_idx, arg_idx)))
-#define UL_ATTR_FORMAT( arg_idx ) \
- __attribute__((format_arg (arg_idx)))
-#define UL_ATTR_NORETURN \
- __attribute__((noreturn))
-#define UL_ATTR_CONST \
- __attribute__((const))
-#define UL_ATTR_UNUSED \
- __attribute__((unused))
-#define UL_ATTR_CONSTRUCTOR \
- __attribute__((constructor))
-#define UL_ATTR_DESCRUCTOR \
- __attribute__((destructor))
-#define UL_ATTR_ALWAYS_INLINE \
- __attribute__((always_inline))
-#define UL_ATTR_WEAK \
- __attribute__((weak))
-#endif /*UL_ATTR_UNUSED*/
-#else /* !__GNUC__ */
-#ifndef UL_ATTR_UNUSED
-#define UL_ATTR_PRINTF( format_idx, arg_idx )
-#define UL_ATTR_SCANF( format_idx, arg_idx )
-#define UL_ATTR_FORMAT( arg_idx )
-#define UL_ATTR_NORETURN
-#define UL_ATTR_CONST
-#define UL_ATTR_UNUSED
-#define UL_ATTR_CONSTRUCTOR
-#define UL_ATTR_DESCRUCTOR
-#define UL_ATTR_ALWAYS_INLINE
-#define UL_ATTR_WEAK
-#endif /*UL_ATTR_UNUSED*/
-#endif /* !__GNUC__ */
-
-#ifndef UL_ATTR_REENTRANT
-#if (!defined(SDCC) && !defined(__SDCC)) || defined(SDCC_z80) || defined(__SDCC_z80)
- #define UL_ATTR_REENTRANT
-#else
- #define UL_ATTR_REENTRANT __reentrant
-#endif
-#endif /*UL_ATTR_REENTRANT*/
-
-#ifdef __cplusplus
-} /* extern "C"*/
-#endif
-
-#endif /* _UL_UTDEFS_H */
+++ /dev/null
-/* Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * Authors:
- * - Michal Horn
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : adc.c
- * Abstract:
- * RPP driver implementation for ADC.
- *
- * References:
- * ti_drv_adc.c
- */
-
-
-#include "drv/adc.h"
-
-// Binary semaphore for ADC1 GRP1 conversion (AIN)
-xSemaphoreHandle adcSemaphore_ADC1GRP1;
-// Binary semaphore for ADC2 GRP1 conversion (HOUT-IFBK)
-xSemaphoreHandle adcSemaphore_ADC2GRP1;
-
-// Mutex for AIN read control
-xSemaphoreHandle adcMutex_AIN;
-// Mutex for HOUTIFBK control
-xSemaphoreHandle adcMutex_HOUTIFBK;
-
-void drv_adc_init()
-{
- // Create semaphores
- vSemaphoreCreateBinary(adcSemaphore_ADC1GRP1);
- xSemaphoreTake(adcSemaphore_ADC1GRP1, 0);
- vSemaphoreCreateBinary(adcSemaphore_ADC2GRP1);
- xSemaphoreTake(adcSemaphore_ADC2GRP1, 0);
-
- adcMutex_AIN = xSemaphoreCreateMutex();
- adcMutex_HOUTIFBK = xSemaphoreCreateMutex();
-
- // Low level init
- adcInit();
-}
-
-
-/**
- * ADC notification called by ADC conversion finished ISR.
- *
- * This procedure will just give semaphore.
- *
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- */
-void adcNotification(adcBASE_t *adc, uint32_t group)
-{
- if(adcIsConversionComplete(adc, group) == ADC_CONVERSION_IS_FINISHED) {
-
- // ADC1
- if(adc == adcREG1) {
- switch(group) {
- case adcGROUP0:
- // Group0 is unused on RPP
- break;
- case adcGROUP1:
- // According to FreeRTOS documentation second parameter is
- // optional (and can be set to NULL) from FreeRTOS
- // V7.3.0. We are using 7.0.2. I confirmed this in the
- // source code: src/os/queue.c line 821. - Carlos
- {
- signed portBASE_TYPE dummy;
- xSemaphoreGiveFromISR(adcSemaphore_ADC1GRP1, &dummy);
- }
- break;
- default:
- // Group2 is unused on RPP
- break;
- }
- // ADC2
- } else {
- switch(group) {
- case adcGROUP0:
- // Group0 is unused on RPP
- break;
- case adcGROUP1:
- {
- signed portBASE_TYPE dummy;
- xSemaphoreGiveFromISR(adcSemaphore_ADC2GRP1, &dummy);
- }
- break;
- default:
- // Group2 is unused on RPP
- break;
- }
- }
- }
-}
-
-
-uint32_t drv_adc_generic_read(adcBASE_t *adc, uint32_t group,
- xSemaphoreHandle adcSemaphore, adcData_t* data)
-{
- // Calibrate
- adcCalibration(adc);
- adcMidPointCalibration(adc);
-
- // Start conversion
- adcEnableNotification(adc, group);
- adcStartConversion(adc, group);
-
- // Wait for conversion to complete
- xSemaphoreTake(adcSemaphore, portMAX_DELAY);
- adcDisableNotification(adc, group);
-
- // Get data
- uint32_t channels = adcGetData(adc, group, data);
-
- // Check if memory overrun
- if(adcIsFifoFull(adc, group) == ADC_FIFO_OVERFLOW) {
- // FIXME Should report somehow.
- adcResetFiFo(adc, group);
- }
-
- return channels;
-}
-
-
-uint32_t drv_adc_read_ain(adcData_t* data)
-{
- xSemaphoreTake(adcMutex_AIN, portMAX_DELAY);
- uint32_t result = drv_adc_generic_read(
- adcREG1,
- adcGROUP1,
- adcSemaphore_ADC1GRP1,
- data
- );
- xSemaphoreGive(adcMutex_AIN);
- return result;
-}
-
-uint32_t drv_adc_read_houtifbk(adcData_t* data)
-{
- xSemaphoreTake(adcMutex_HOUTIFBK, portMAX_DELAY);
- uint32_t result = drv_adc_generic_read(
- adcREG2,
- adcGROUP1,
- adcSemaphore_ADC2GRP1,
- data
- );
- xSemaphoreGive(adcMutex_HOUTIFBK);
- return result;
-}
-
-// FIXME make it work again
-uint32_t adc_get_port_val(uint32_t* config, uint32_t num_channels,
- uint32_t* values) {
- /*
- uint32_t i;
- adcBASE_t* adcReg = (adcBASE_t *)config[0];
- uint32_t adcGroup = config[1];
-
- adcData.adc_data = adc_data_origin;
- adcData.ch_count = num_channels;
- if (read_adc(adcReg, adcGroup) == 1)
- return 1;
-
- for (i = 0; i < num_channels; i++) {
- values[i] = adcData.adc_data[i].value;
- values[i+num_channels] = adcData.adc_data[i].id;
- }
- adcData.adc_data = NULL;
- */
- return 0;
-}
-
+++ /dev/null
-/* Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * Authors:
- * - Michal Horn
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : dac.c
- * Abstract:
- * RPP driver implementation for DAC.
- *
- * References:
- * None
- */
-
-
-#include "drv/dac.h"
-
-#define DAC_PIN_NUM 4
-
-// See mcp4922.pdf p. 24
-// Options:
-// Bit 13: Output Gain Selection bit set = 1x (VOUT = VREF * D/4096)
-// Bit 15: DACA (0) or DACB (1) Selection bit.
-#define DAC1_INIT_VAL (_BV(13) )
-#define DAC2_INIT_VAL (_BV(13) | _BV(15))
-#define DAC3_INIT_VAL (_BV(13) )
-#define DAC4_INIT_VAL (_BV(13) | _BV(15))
-
-/**
- * Pin status for each DAC pin, the structure of each field is defined
- * as spi command structure.
- */
-uint16_t dac_pin_stat[DAC_PIN_NUM] = {
- DAC1_INIT_VAL,
- DAC2_INIT_VAL,
- DAC3_INIT_VAL,
- DAC4_INIT_VAL
-};
-
-/**
- * Port names for each DAC port, to be easily accessible by indexing
- */
-const char* dac_port_names[DAC_PIN_NUM] = {
- PORT_NAME_DAC1_2,
- PORT_NAME_DAC1_2,
- PORT_NAME_DAC3_4,
- PORT_NAME_DAC3_4
-};
-
-/**
- * Command for SPI
- */
-static uint32_t dac_spi_cmd;
-/**
- * Shadow variable of SPI command
- */
-static uint32_t dac_spi_cmd_sh;
-
-int drv_dac_spi_transfer(uint8_t pin, boolean_t enabled, uint16_t value)
-{
- // Check pin range
- if(pin >= DAC_PIN_NUM) {
- return -1;
- }
-
- // Check value range
- if(value > 4095) {
- return -2;
- }
-
- // Prepare command
- if(enabled) {
- bit_set(dac_pin_stat[pin], 12);
- } else {
- bit_clear(dac_pin_stat[pin], 12);
- }
-
- dac_pin_stat[pin] = dac_pin_stat[pin] & 0xF000;
- dac_pin_stat[pin] |= (value & 0xFFF);
-
- uint32_t commands[2];
-
- // Warning!!! Can be "optimized" by compiler
- dac_spi_cmd = dac_pin_stat[pin];
- dac_spi_cmd_sh = dac_spi_cmd;
- //--
- port_desc_t* desc;
- desc = hal_port_get_dsc(dac_port_names[pin], -1);
- commands[0] = (dac_spi_cmd_sh & 0xFF00) >> 8;
- commands[1] = (dac_spi_cmd_sh & 0xFF);
-
- return desc->port_setfnc_ptr(desc->config, desc->numValues, commands);
-}
-
+++ /dev/null
-/*
- * din.c
- *
- * Created on: 17.12.2012
- * Author: Michal Horn
- *
- * This file contains functions to control DIN
- * Voltage on each pin can be set
- * switch to ground or to battery on programable pins can be set
- * interrupts on each pins can be disabled and enabled
- */
-
-
-#include "drv/drv.h"
-
-/** Prepared command */
-uint32_t din_spi_cmd = DIN_SPICMD_INIT_VAL;
-/** Shadow variable used during sending */
-uint32_t din_spi_cmd_sh = DIN_SPICMD_INIT_VAL;
-/** Stored response from SPI */
-uint32_t din_spi_resp = 0;
-/** Prepared command for change status on SP pins */
-uint32_t pin_st_p_cmd;
-/** Prepared command for change status on SG pins */
-uint32_t pin_st_g_cmd;
-/** Prepared command for disabling interrupt on SP pins */
-uint32_t pin_int_p_cmd;
-/** Prepared command for disabling interrupt on SG pins */
-uint32_t pin_int_g_cmd;
-
-/** Signal for state cmd transfer */
-uint8_t transfer_state_cmd = 0;
-/** Signal for interrupt cmd trasfer */
-uint8_t transfer_interrupt_cmd = 0;
-
-/** Indexes of bits in status commands assigned to pins */
-static const uint32_t din_set_pin_st_i[] = {0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7};
-/** Indexes of bits in switch-to commands assigned to pins */
-static const uint32_t din_set_pin_pr_i[] = {0, 1, 2, 3, 4, 5, 6, 7};
-
-const static uint32_t dsc_pin_map[8U] = {
- PIN_DSC_DIN8,
- PIN_DSC_DIN9,
- PIN_DSC_DIN10,
- PIN_DSC_DIN11,
- PIN_DSC_DIN12,
- PIN_DSC_DIN13,
- PIN_DSC_DIN14,
- PIN_DSC_DIN15
-};
-
-
-// See mcp4922.pdf p. 24
-// Options:
-// Bit 13: Output Gain Selection bit set = 1x (VOUT = VREF * D/4096)
-// Bit 15: DACA (0) or DACB (1) Selection bit.
-#define DACA_INIT_VAL (_BV(13) | _BV(12) )
-#define DACB_INIT_VAL (_BV(13) | _BV(12) | _BV(15))
-
-int8_t drv_din_ref(uint16_t ref_a, uint16_t ref_b)
-{
- uint16_t cmd;
-
- // Get descriptor
- uint32_t commands[2];
- port_desc_t* desc = hal_port_get_dsc(PORT_NAME_DACDREF, -1);
-
- // Send command for DAC A
- cmd = DACA_INIT_VAL | (ref_a & 0x0FFF);
-
- commands[0] = (cmd & 0xFF00) >> 8;
- commands[1] = (cmd & 0xFF);
- desc->port_setfnc_ptr(desc->config, desc->numValues, commands);
-
- // Send command for DAC B
- cmd = DACB_INIT_VAL | (ref_b & 0x0FFF);
-
- commands[0] = (cmd & 0xFF00) >> 8;
- commands[1] = (cmd & 0xFF);
- desc->port_setfnc_ptr(desc->config, desc->numValues, commands);
-
- // Fixme: check SPI return value.
- return SUCCESS;
-}
-
-
-int8_t drv_din_get_varthr(uint8_t pin) {
-
- // Check range
- if((pin < 8) || (pin > 15)) {
- return FAILURE;
- }
-
- return hal_gpio_pin_get_value(dsc_pin_map[pin - 8]);
-}
-
-/**
- * Set programmable pin DIN_SP according bits in argument as switch-to-battery (1) or switch-to-ground(0)
- * @param word 8-bit array representing switch-to state
- */
-void din_set_pr(uint8_t word) {
- int i;
- uint8_t val;
- din_spi_cmd = 1 << 16; // Set command
-
- for (i = 0; i < 8; i++, word >>= 1) {
- val = word&0x1;
- if (val == 1) {
- din_spi_cmd |= 1 << din_set_pin_pr_i[i];
- }
- else if (val == 0) {
- din_spi_cmd &= ~(1 << din_set_pin_pr_i[i]);
- }
- }
-}
-
-/**
- * Set DIN pins to be tri-state (1) or Active (0)
- * @param sp_state 16-bit variable representing state of SP pins. (0 - active, 1 - tri-state).
- * @param sg_state 16-bit variable representing state of SG pins. (0 - active, 1 - tri-state).
- */
-void din_set_stat(uint16_t sp_state, uint16_t sg_state) {
- int i;
- uint16_t val;
- uint32_t state = (sp_state&0xFF)|((sg_state&0xFF)<<8);
- uint32_t* pin_cmd_ptr = NULL;
- pin_st_p_cmd = 0x9 << 16; // Set command for SP pins
- pin_st_g_cmd = 0xA << 16; // Set command for SG pins
- for (i = 0; i < 16; i++,state >>= 1) {
- val = state&0x1;
- if (i < 8) { // First 8 pins SP0 - SP7
- pin_cmd_ptr = &pin_st_p_cmd;
- }
- else { // Another 8 pins SG0 - SG7
- pin_cmd_ptr = &pin_st_g_cmd;
- }
-
- if (val) {
- *pin_cmd_ptr |= 1 << din_set_pin_st_i[i];
- }
- else {
- *pin_cmd_ptr &= ~(1 << din_set_pin_st_i[i]);
- }
- }
- transfer_state_cmd = 1; // Enable transfer of two commands at once
-}
-
-/**
- * Enable/disable interrupts for DIN pins as well as acting pins as wake-up
- * @param sp_int_enable 16-bit variable representing interrupt enablers for SP pins (0 - disable wake-up and interrupt, 1 - enable interrupt).
- * @param sg_int_enable 16-bit variable representing interrupt enablers for SG pins (0 - disable wake-up and interrupt, 1 - enable interrupt).
- */
-void din_set_int(uint16_t sp_int_enable, uint16_t sg_int_enable) {
- int i;
- uint16_t val;
- uint32_t int_enable = (sp_int_enable&0xFF)|((sg_int_enable&0xFF)<<8); // LSB
- uint32_t* pin_cmd_ptr = NULL;
- pin_int_p_cmd = 0x2 << 16; // Set command for SP pins
- pin_int_g_cmd = 0x3 << 16; // Set command for SG pins
- for (i = 0; i < 16; i++,int_enable >>= 1) {
- val = int_enable&0x1;
- if (i < 8) { // First 8 pins SP0 - SP7
- pin_cmd_ptr = &pin_int_p_cmd;
- }
- else { // Another 8 pins SG0 - SG7
- pin_cmd_ptr = &pin_int_g_cmd;
- }
-
- if (val) {
- *pin_cmd_ptr |= 1 << din_set_pin_st_i[i];
- }
- else {
- *pin_cmd_ptr &= ~(1 << din_set_pin_st_i[i]);
- }
- }
- transfer_interrupt_cmd = 1; // Enable transfer of two commands at once
-}
-
-/**
- * Prepare reset command to be sent through spi
- */
-void din_reset() {
- din_spi_cmd = 0x7F0000;
-}
-
-/**
- * Prepare switch status command to be sent through spi
- */
-void din_switch_st() {
- din_spi_cmd = 0x0;
-}
-
-/**
- * Get values of all DIN pins in form of 16-bit word DIN15,...,DIN0
- * @return values of all pins.
- */
-uint16_t din_get_val_word()
-{
- // How it should be.
- //uint16_t sp = ((din_spi_resp >> 14) & 0x00FF);
- //uint16_t sg = ((din_spi_resp << 8 ) & 0xFF00);
-
- // How it actually is.
- // Ignore datasheet, this is the actual response from the SPI driver:
- // [xxxx xxxx][SG7-SG0][SP1 SP0 yy yyyy][zz SP7-SP2]
- // x: Unknown.
- // y: Maybe SG13-SG8, but untested.
- // z: Maybe therm flag and int flag.
- // For SP: First get SP7-SP2 right, then add SP1 and SP0
- uint16_t sp = ((din_spi_resp << 2) & 0x00FF) | ((din_spi_resp >> 14) & 0x3);
- uint16_t sg = ((din_spi_resp >> 8) & 0xFF00);
- uint16_t word = sg | sp;
- return word;
-}
-
-/**
- * Switch copy command, prepared by other functions, to shadow variable,
- * convert command to MSB,
- * transfer command to DIN
- * store spi response
- * return spi response
- */
-int din_spi_transfer_mst() {
- port_desc_t* desc;
- din_spi_cmd_sh = din_spi_cmd;
- desc = hal_port_get_dsc(PORT_NAME_DINSPI, -1);
- uint32_t commands[3];
- commands[0] = (din_spi_cmd_sh & 0xFF0000) >> 16;
- commands[1] = (din_spi_cmd_sh & 0xFF00) >> 8;
- commands[2] = (din_spi_cmd_sh & 0xFF);
-
- din_spi_resp = desc->port_setfnc_ptr(desc->config, desc->numValues, commands);
- return din_spi_resp;
-}
-
-/**
- * Transfer prepared commands through spi
- * With highest priority send state modification commands
- * With secondary priority send interrupt commands
- * In the end send other commands
- *
- * Store response from spi
- * Returns spi response
- */
-int din_spi_transfer() {
- if (transfer_state_cmd) {
- din_spi_cmd = pin_st_p_cmd;
- din_spi_transfer_mst();
- din_spi_cmd = pin_st_g_cmd;
- transfer_state_cmd = 0;
- }
- else if (transfer_interrupt_cmd) {
- din_spi_cmd = pin_int_p_cmd;
- din_spi_transfer_mst();
- din_spi_cmd = pin_int_g_cmd;
- transfer_interrupt_cmd = 0;
- }
- return din_spi_transfer_mst();
-}
-
-/**
- * Get latest response from SPI. Function does not send anything.
- * @return latest spi response
- */
-int din_spi_response() {
- return din_spi_resp;
-}
-
-/**
- * Get last command sent on SPI
- * @return latest sent command
- */
-int din_spi_get_cmd() {
- return din_spi_cmd;
-}
+++ /dev/null
-/*
- * fray.c
- *
- * Created on: 12.2.2013
- * Author: Michal Horn
- * Martin Zeman
- *
- * This file contains function for getting fray status as spi respons
- * and functions for FlexRay initialization and usage.
- * FlexRay chips on SPI are read only.
- */
-
-//#include "drv_fray.h"
-#include "drv/drv.h"
-
-/** Prepared spi command */
-uint32_t fray_spi_cmd = FRAY_SPICMD_INIT_VAL;
-/** Shadow variable used during command sending */
-uint32_t fray_spi_cmd_sh;
-/** Array of responses for each fray driver */
-uint32_t fray_spi_resp[FRAY_NUM_PORTS];
-/** Array of port names to be easily accessible by indexing */
-const char* fray_port_names[FRAY_NUM_PORTS] = { PORT_NAME_FRAY1, PORT_NAME_FRAY2 };
-
-/**
- * @brief Function sends prepared command on SPI and stores response
- *
- * @param[in] port Index of flexray 0 or 1
- * @return 0 when success, -1 when bad parameter
- */
-int fray_spi_transfer(uint8_t port) {
- uint32_t commands[2];
- port_desc_t* desc;
-
- if (port > FRAY_NUM_PORTS) return -1;
- desc = hal_port_get_dsc(fray_port_names[port], -1);
- fray_spi_cmd_sh = fray_spi_cmd;
- commands[0] = (fray_spi_cmd_sh & 0xFF00) >> 8;
- commands[1] = (fray_spi_cmd_sh & 0xFF);
-
- fray_spi_resp[port] = desc->port_setfnc_ptr(desc->config, desc->numValues, commands);
- return 0;
-}
-
-/**
- * @brief Returns last spi response of selected fray port
- *
- * @param[in] port Index of flexray 0 or 1
- * @return spi response or -1 when bad parameter
- */
-int fray_spi_response(uint8_t port) {
- if (port > FRAY_NUM_PORTS) return -1;
- return fray_spi_resp[port];
-}
-
-/**
- * @brief Returns last spi command of selected fray port
- *
- * @param[in] port Index of flexray 0 or 1
- * @return spi command or -1 when bad parameter
- */
-int fray_spi_get_cmd(uint8_t port) {
- if (port > FRAY_NUM_PORTS) return -1;
- return fray_spi_cmd;
-}
-
-/** @fn clear_msg_ram(void)
-* @brief Clears FRAY message RAMs
-*
-* Send command to POC to set all bits of message RAM to 0.
-* @return SUCCESS or FAILURE when command was not accepted
-*/
-int fray_clear_msg_ram() {
- fray_wait_for_POC_ready();
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_CLEAR_RAMS;
- if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted) {
- return FAILURE;
- }
- fray_wait_for_POC_ready();
- return SUCCESS;
-}
-
-/** @fn wait_for_POC_ready(void)
-* @brief Wait until POC is not busy
-*/
-void fray_wait_for_POC_ready() {
- // Wait for PBSY bit to clear - POC not busy.
- // 1: Signals that the POC is busy and cannot accept a command from the host. CMD(3-0) is locked against write accesses.
- while(((frayREG->SUCC1_UN.SUCC1_UL) & 0x00000080) != 0);
-}
-
-/** @fn fray_init(cfg *Fr_ConfigPtr)
-* @brief Set global configuration
-*
-* Copy configuration filled in structure into config registers
-* @param Fr_ConfigPtr Pointer to structure with configuration
-*/
-void fray_init(const cfg *Fr_ConfigPtr)
-{
- frayREG->SUCC1_UN.SUCC1_UL = 0x0C401000; // Keep default value
- frayREG->MRC_UN.MRC_UL = Fr_ConfigPtr->mrc;
- frayREG->PRTC1_UN.PRTC1_UL = Fr_ConfigPtr->prtc1;
- frayREG->PRTC2_UN.PRTC2_UL = Fr_ConfigPtr->prtc2;
- frayREG->MHDC_UN.MHDC_UL = Fr_ConfigPtr->mhdc;
- frayREG->GTUC1_UN.GTUC1_UL = Fr_ConfigPtr->gtu1;
- frayREG->GTUC2_UN.GTUC2_UL = Fr_ConfigPtr->gtu2;
- frayREG->GTUC3_UN.GTUC3_UL = Fr_ConfigPtr->gtu3;
- frayREG->GTUC4_UN.GTUC4_UL = Fr_ConfigPtr->gtu4;
- frayREG->GTUC5_UN.GTUC5_UL = Fr_ConfigPtr->gtu5;
- frayREG->GTUC6_UN.GTUC6_UL = Fr_ConfigPtr->gtu6;
- frayREG->GTUC7_UN.GTUC7_UL = Fr_ConfigPtr->gtu7;
- frayREG->GTUC8_UN.GTUC8_UL = Fr_ConfigPtr->gtu8;
- frayREG->GTUC9_UN.GTUC9_UL = Fr_ConfigPtr->gtu9;
- frayREG->GTUC10_UN.GTUC10_UL = Fr_ConfigPtr->gtu10;
- frayREG->GTUC11_UN.GTUC11_UL = Fr_ConfigPtr->gtu11;
- frayREG->SUCC2_UN.SUCC2_UL = Fr_ConfigPtr->succ2;
- frayREG->SUCC3_UN.SUCC3_UL = Fr_ConfigPtr->succ3;
- frayREG->SUCC1_UN.SUCC1_ST.txst_B1 = 1;
- frayREG->SUCC1_UN.SUCC1_ST.txsy_B1 = 1;
-}
-
-/**
- * Fill buffer configuration data structure with given data and transfer it to the message RAM header.
- * @param[in] buf_num number of buffer to be configured (0-128)
- * @param[in] mode Flag array for buffer configuration. Flags are defined in header file with prefix FRAY_BUF_
- * @param[in] cyc_filter Setting for cycle filter. 0 - disabled
- * @param[in] frame_id Id of the frame to be associated with the buffer
- * @param[in] payload Maximum data size in half-word
- * @param[in] data_pointer Address of the first word of data in buffer
- */
-void fray_config_buffer(uint32_t buf_num, uint8_t mode, uint32_t cyc_filter, uint32_t frame_id, uint32_t payload, uint32_t data_pointer) {
- wrhs Fr_LPdu;
- bc Fr_LSdu;
- Fr_LPdu.mbi = (mode&FRAY_BUF_MBI_EN) ? 1 : 0; // message buffer interrupt
- Fr_LPdu.txm = (mode&FRAY_BUF_TX_MODE_CONTINUOUS) ? 1 : 0; // transmission mode(0=continuous mode, 1=single mode)
- Fr_LPdu.ppit = (mode&FRAY_BUF_NM_EN) ? 1 : 0; // network management Enable
- Fr_LPdu.cfg = (mode&FRAY_BUF_TX) ? 1 : 0; // message buffer configuration bit (0=RX, 1 = TX)
- Fr_LPdu.chb = (mode&FRAY_BUF_CHB_EN) ? 1 : 0; // Ch B
- Fr_LPdu.cha = (mode&FRAY_BUF_CHA_EN) ? 1 : 0; // Ch A
- Fr_LPdu.cyc = cyc_filter; // Cycle Filtering Code (no cycle filtering)
- Fr_LPdu.fid = frame_id; // Frame ID
-
- // Write Header Section 2 (WRHS2)
- Fr_LPdu.pl = payload; // Payload Length
-
- // Write Header Section 3 (WRHS3)
- Fr_LPdu.dp = data_pointer; // Pointer to start of data in message RAM
-
- Fr_LPdu.sfi = (mode&FRAY_BUF_SFI_EN) ? 1 : 0; // startup frame indicator
- Fr_LPdu.sync = (mode&FRAY_BUF_SYNC_EN) ? 1 : 0; // sync frame indicator
-
- // Write Header Section 2 (WRHS2)
- Fr_LPdu.crc = (mode&FRAY_BUF_TX) ? fray_header_crc_calc(&Fr_LPdu) : 0;
-
- // Input buffer configuration
- Fr_LSdu.ibrh = buf_num; // input buffer number
- Fr_LSdu.ibsyh = 1; // check for input buffer busy host
- Fr_LSdu.ibsys = 1; // check for input buffer busy shadow
-
- Fr_LSdu.stxrh= 0; // set transmission request
- Fr_LSdu.ldsh = 0; // load data section
- Fr_LSdu.lhsh = 1; // load header section
- Fr_LSdu.obrs = 0; // output buffer number
- Fr_LSdu.rdss = 0; // read data section
- Fr_LSdu.rhss = 0; // read header section
-
- fray_prepare_LPdu(&Fr_LPdu);
- fray_transmit_tx_LPdu(&Fr_LSdu);
-}
-
-/**
- * Initialize POC. At first go to CONFIG state, then run the unlock sequence
- * and at the end go to READY state
- * @return SUCCESS or FAILURE
- */
-int fray_controler_init() {
- int result = SUCCESS;
- // write SUCC1 configuration
- frayREG->SUCC1_UN.SUCC1_UL = 0x0F1FFB00 | CMD_CONFIG;
- // Check if POC has accepted last command
- if ((frayREG->SUCC1_UN.SUCC1_UL & 0xF) == 0x0) return 1;
- // Wait for PBSY bit to clear - POC not busy
- fray_wait_for_POC_ready();
-
- // unlock CONFIG and enter READY state
- frayREG->LCK_UN.LCK_ST.clk_B8=0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8=0x31;
- // write SUCC1 configuration
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4=(0xFB00 | CMD_READY);
- // Check if POC has accepted last command
- if ((frayREG->SUCC1_UN.SUCC1_UL & 0xF) == 0x0) {
- result = FAILURE;
- }
- // Wait for PBSY bit to clear - POC not busy
- fray_wait_for_POC_ready();
- return result;
-}
-
-/**
- * Enable IRQ on int1
- * Enable CYCSE interrupt
- * Clear Errors and statuses
- */
-void fray_init_irq() {
- frayREG->EIR_UN.EIR_UL = 0xFFFFFFFF; // Clear Error Int.
- frayREG->SIR_UN.SIR_UL = 0xFFFFFFFF; // Clear Status Int.
- frayREG->SILS_UN.SILS_UL = 0x00000000; // all Status Int. to eray_int0
- frayREG->SIER_UN.SIER_UL = 0xFFFFFFFF; // Disable all Status Int.
- frayREG->SIES_UN.SIES_UL = 0x00000004; // Enable CYCSE Int.
- frayREG->ILE_UN.ILE_UL = 0x00000002; // enable eray_int1
-}
-
-/**
- * Load data to message buffer.
- * @param[in] buf_num Number of buffer
- * @param[in] data Pointer to data array
- * @param[in] len Number of words to be loaded from data to buffer
- */
-void fray_buffer_set_data(uint32_t buf_num, const uint32_t* data, uint32_t len) {
- bc write_buffer;
- uint32_t i;
-
- write_buffer.ibrh = buf_num; // input buffer number
- write_buffer.stxrh= 1; // set transmission request
- write_buffer.ldsh = 1; // load data section
- write_buffer.lhsh = 0; // load header section
- write_buffer.ibsys = 0; // check for input buffer busy shadow
- write_buffer.ibsyh = 1; // check for input buffer busy host
- for (i = 0; i < len; i++) {
- frayREG->WRDS[i] = data[i];
- }
- fray_transmit_tx_LPdu(&write_buffer);
-}
-
-/**
- * Retrieve data from message buffer.
- * @param[in] buf_num Number of buffer
- * @param[out] data Pointer to array, where retrieved data will be stored.
- * @param[in] len Number of words to be loaded from data to buffer
- */
-void fray_buffer_get_data(uint32_t buf_num, uint32_t* data, uint32_t len) {
- bc read_buffer;
- uint32_t i;
-
- read_buffer.obrs=buf_num; // output buffer number
- read_buffer.rdss=1; // read data section
- read_buffer.rhss=0; // read header section
- fray_receive_rx_LPdu(&read_buffer);
- for (i = 0; i < len; i++) {
- data[i] = frayREG->RDDS[i];
- }
-}
-
-
-/**
- * Wait for interrupt flag, that new communication cycle started
- * Clears status flags
- */
-void fray_wait_for_new_cycle() {
- frayREG->SIR_UN.SIR_UL = 0xFFFFFFFF; // clear all status int. flags
- while ((frayREG->SIR_UN.SIR_UL & 0x4) == 0x0); // wait for CYCS interrupt flag
- frayREG->SIR_UN.SIR_UL = 0xFFFFFFFF; // clear all status int. flags
-}
-
-/**
- * Check if some new message was received to the message buffer.
- * @param[in] buf_num Number of the buffer to be checked
- * @return 1 when new message is available, otherwise 0
- */
-int fray_buffer_message_received(uint32_t buf_num) {
- uint32_t ndat;
- uint32_t offset = 0;
- if (buf_num < 32) {
- ndat = frayREG->NDAT1_UN.NDAT1_UL;
- offset = buf_num;
- }
- else if (buf_num < 64) {
- ndat = frayREG->NDAT2_UN.NDAT2_UL;
- offset = buf_num - 32;
- }
- else if (buf_num < 96) {
- ndat = frayREG->NDAT3_UN.NDAT3_UL;
- offset = buf_num - 64;
- }
- else if (buf_num < 128) {
- ndat = frayREG->NDAT4_UN.NDAT4_UL;
- offset = buf_num - 96;
- }
- else {
- return -1;
- }
-
- return (ndat&(1<<offset));
-}
-
-/**
- * Process the FlexRay startup procedure according diagrams in FlexRay protocol specification.
- * @param[in] is_coldstar Specifies if node is coldstart or if it can be just integrated to existing network
- * @return SUCCESS or error code
- */
-int fray_startup_procedure(int is_coldstart) {
- uint32_t counter;
- uint32_t state_value;
- uint32_t csa;
- int ok = SUCCESS;
-
- ok = fray_go_to_ready_state_from_config_state();
- if(ok == FAILURE) {
- return FRAY_ERR_SW_CFG_READY; // Switching to ready state error
- }
- else {
- // Cold start branch
- if (is_coldstart){
- // Start up loop
- while(1) {
- counter = 0;
- // try as following cold starter
- ok = fray_go_to_startup_state();
- if(ok == FAILURE){
- return FRAY_ERR_SW_STUP_FOLLOW; // Switch to run error
- }
- // Wait until NORMAL_ACTIVE state or timeout
- do {
- state_value = frayREG->CCSV_UN.CCSV_ST.pocs_B6;
- counter++;
- } while ((state_value != 0x02) && (counter < 10000000U));
-
- // No success in integration
- if (frayREG->CCSV_UN.CCSV_ST.pocs_B6 == 0x27){
- csa = frayREG->CCSV_UN.CCSV_ST.rca_B5;
- // Some cold starts attempts remains
- if (csa != 0){
- // Try allow cold start
- ok = fray_allow_coldstart();
- if(ok == FAILURE){
- return FRAY_ERR_CSINH_DIS; // Cold start inhibit disabled error
- }
- }
- }
-
- // Wait until NORMAL_ACTIVE or INTEGRATION_LISTEN state
- do {
- state_value = frayREG->CCSV_UN.CCSV_ST.pocs_B6;
- } while ( (state_value != 0x02) && (state_value != 0x27));
-
- // Success, break the start up loop
- if (frayREG->CCSV_UN.CCSV_ST.pocs_B6 == 0x02)
- break;
-
- // No success. Switch back to READY state
- fray_delay();
- ok = fray_go_to_ready_state_from_startup_state();
- if (ok == FAILURE) {
- return FRAY_ERR_SW_STUP_READY; // Switch to READY failed
- }
- }
- }
- // Non-cold start branch
- else {
- ok = fray_go_to_startup_state();
- if(ok == FAILURE) {
- return FRAY_ERR_SW_STUP_AS_NCOLD; // Switching to startup state as non-cold start node
- }
- else {
- // Wait until NORMAL_ACTIVE
- do {
- state_value = frayREG->CCSV_UN.CCSV_ST.pocs_B6;
- } while (state_value != 0x02);
- }
- }
- }
- if (ok != SUCCESS)
- return FAILURE;
- return SUCCESS;
-}
-
-/** @fn go_to_ready_state_from_config_state(void)
-* @brief Set POC command
-*
-* Send command to POC to switch into READY state.
-* @return SUCCESS or FAILURE
-*/
-int fray_go_to_ready_state_from_config_state(void) {
- fray_wait_for_POC_ready();
-
- if (frayREG->SUCC1_UN.SUCC1_ST.ccha_B1 && frayREG->SUCC1_UN.SUCC1_ST.cchb_B1){
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.mtsa_B1 = 1U;
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.mtsb_B1 = 1U;
- }
- else if(frayREG->SUCC1_UN.SUCC1_ST.ccha_B1){
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.mtsa_B1 = 1U;
- }
- else if (frayREG->SUCC1_UN.SUCC1_ST.cchb_B1){
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
- //odemykaci sekvence
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
- frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
- frayREG->SUCC1_UN.SUCC1_ST.mtsb_B1 = 1U;
- }
- else frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
-
- if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted)
- return (FAILURE);
- while ((frayREG->CCSV_UN.CCSV_UL & 0x0000003F) != 0x01)
- ; //cekam dokud POC neni v ready stavu
- return (SUCCESS);
-}
-
-/** @fn go_to_ready_state_from_startup_state(void)
-* @brief Set POC command
-*
-* Send command to POC to switch into READY state.
-* @return SUCCESS or FAILURE
-*/
-int fray_go_to_ready_state_from_startup_state(void){
- fray_wait_for_POC_ready();
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
- if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted) return (FAILURE);
- while ((frayREG->CCSV_UN.CCSV_UL & 0x0000003F) != 0x01); //cekam dokud POC neni v ready stavu
- return (SUCCESS);
-}
-
-/** @fn go_to_startup_state(void)
-* @brief Set POC command
-*
-* Send command to POC to switch into RUN state.
-* @return SUCCESS or FAILURE
-*/
-int fray_go_to_startup_state(void) {
- fray_wait_for_POC_ready();
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_RUN;
- if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted)
- return (FAILURE);
- return (SUCCESS);
-}
-
-/** @fn allow_coldstart(void)
-* @brief Allows cold start
-*
-* Send command to erase coldstart inhibit flag.
-* This allows the node to start as coldstart node.
-* @return SUCCESS or FAILURE
-*/
-int fray_allow_coldstart(void) {
- fray_wait_for_POC_ready();
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_ALLOW_COLDSTART;
- if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted)
- return (FAILURE);
- return (SUCCESS);
-}
-
-/**
- * FlexRay delay used while network initiation.
- *
- * !This is busy waiting!
- */
-void fray_delay(void) {
- volatile uint32_t delayval;
-
- delayval = 375000; // 100000 are about 10ms
- while(delayval-- > 0 )
- ;
-}
-
-/** @fn send_halt_command
-* @brief Send HALT command
-*
-* Send command to the node to stop its activity after the end of
-* actual cycle.
-* @return SUCCESS or FAILURE
-*/
-int fray_halt(void) {
- fray_wait_for_POC_ready();
- frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = 6U;
- if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted)
- return (FAILURE);
- return (SUCCESS);
-}
-
-/**
- * Compute CRC for message RAM header data
- * @param[in] Fr_LPduPtr Pointer to header data
- * @return CRC code
- */
-int fray_header_crc_calc(const wrhs *Fr_LPduPtr) {
- unsigned int header;
-
- int CrcInit = 0x1A;
- int length = 20;
- int CrcNext;
- unsigned long CrcPoly = 0x385;
- unsigned long CrcReg_X = CrcInit;
- unsigned long header_temp, reg_temp;
-
- header = ((Fr_LPduPtr->sync & 0x1) << 19) | ((Fr_LPduPtr->sfi & 0x1) << 18);
- header |= ((Fr_LPduPtr->fid & 0x7FF) << 7) | (Fr_LPduPtr->pl & 0x7F);
-
- header <<= 11;
- CrcReg_X <<= 21;
- CrcPoly <<= 21;
-
- while(length--) {
- header <<= 1;
- header_temp = header & 0x80000000;
- reg_temp = CrcReg_X & 0x80000000;
-
- if(header_temp ^ reg_temp){ // Step 1
- CrcNext = 1;
- } else {
- CrcNext = 0;
- }
-
- CrcReg_X <<= 1; // Step 2
-
- if(CrcNext) {
- CrcReg_X ^= CrcPoly; // Step 3
- }
- }
-
- CrcReg_X >>= 21;
-
- return CrcReg_X;
-}
-
-/**
- * Prepare data to be transmitted to message RAM by input buffer,
- * @param[in] Fr_LPduPtr Pointer to data structure to be send
- */
-void fray_prepare_LPdu(const wrhs *Fr_LPduPtr) {
- int wrhs1;
- int wrhs2;
- wrhs1 = ((Fr_LPduPtr->mbi) & 0x1) <<29;
- wrhs1 |= (Fr_LPduPtr->txm & 0x1) << 28;
- wrhs1 |= (Fr_LPduPtr->ppit & 0x1) << 27;
- wrhs1 |= (Fr_LPduPtr->cfg & 0x1) << 26;
- wrhs1 |= (Fr_LPduPtr->chb & 0x1) << 25;
- wrhs1 |= (Fr_LPduPtr->cha & 0x1) << 24;
- wrhs1 |= (Fr_LPduPtr->cyc & 0x7F) << 16;
- wrhs1 |= (Fr_LPduPtr->fid & 0x7FF);
- frayREG->WRHS1_UN.WRHS1_UL = wrhs1;
-
- wrhs2 = ((Fr_LPduPtr->pl & 0x7F) << 16) | (Fr_LPduPtr->crc & 0x7FF);
- frayREG->WRHS2_UN.WRHS2_UL = wrhs2;
-
- frayREG->WRHS3_UN.WRHS3_UL = (Fr_LPduPtr->dp & 0x7FF);
-}
-
-/**
- * Transfer data from input buffer to message RAM
- * @param[in] Fr_LSduPtr Pointer to data structure with input buffer settings
- */
-void fray_transmit_tx_LPdu(const bc *Fr_LSduPtr) {
- // ensure nothing is pending
- while ((frayREG->IBCR_UN.IBCR_UL & 0x0008000) != 0);
- frayREG->IBCM_UN.IBCM_UL=((Fr_LSduPtr->stxrh & 0x1) << 2) | ((Fr_LSduPtr->ldsh & 0x1) << 1) | (Fr_LSduPtr->lhsh & 0x1);
- frayREG->IBCR_UN.IBCR_UL=(Fr_LSduPtr->ibrh & 0x3F);
- // optimization possible for future by not gating like below
- // wait for completion on host registers
- while ((Fr_LSduPtr->ibsyh != 0) && ((frayREG->IBCR_UN.IBCR_UL & 0x00008000) != 0));
- // wait for completion on shadow registers
- while ((Fr_LSduPtr->ibsys != 0) && ((frayREG->IBCR_UN.IBCR_UL & 0x80000000) != 0));
-}
-
-/**
- * Receive data from message buffer into output buffer.
- * @param[in] Fr_LSduPtr Pointer to data structure with output buffer settings
- */
-void fray_receive_rx_LPdu(const bc *Fr_LSduPtr) {
- // ensure no transfer in progress on shadow registers
- while (((frayREG->OBCR_UN.OBCR_UL) & 0x00008000) != 0);
- frayREG->OBCM_UN.OBCM_UL=(((Fr_LSduPtr->rdss & 0x1) << 1) | (Fr_LSduPtr->rhss & 0x1));
- frayREG->OBCR_UN.OBCR_UL=((1 << 9) | (Fr_LSduPtr->obrs & 0x3F)); //req=1, view=0
- // wait for completion on shadow registers
- while (((frayREG->OBCR_UN.OBCR_UL) & 0x00008000) != 0);
-
- frayREG->OBCM_UN.OBCM_UL=(((Fr_LSduPtr->rdss & 0x1) << 1) | (Fr_LSduPtr->rhss & 0x1));
- frayREG->OBCR_UN.OBCR_UL=((1 << 8) | (Fr_LSduPtr->obrs & 0x3F)); //req=0, view=1
-}
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Michal Horn
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : ain.c
- * Abstract:
- * RPP driver implementation for HBR.
- *
- * References:
- * hbridge.h
- */
-
-// This file contains functions to control H-bridge.
-// A keep-alive watchdog is implemented.
-// PWM is available for HBR control.
-
-
-#include "drv/drv.h"
-
-//Flag variable if pwm was initialized and is ready to start.
-static boolean_t pwm_initialized = FALSE;
-
-
-/// Watchdog Task --------------------------------------------------------------
-static boolean_t wdg_running = FALSE;
-
-
-// Prepared command to be send on SPI.
-// Default value is watchdog reset command.
-uint16_t hbr_spi_wdg_tx = 0x03DB;
-
-// Shadow variable of hbr_spi_wdg_tx
-uint16_t hbr_spi_wdg_tx_shd = 0x03DB;
-
-// Response from SPI.
-uint16_t hbr_spi_wdg_rx = 0;
-
-// Shadow variable of hbr_spi_wdg_shd
-uint16_t hbr_spi_wdg_rx_shd = 0;
-
-/**
- * @brief SPI callback function
- *
- * This function is called each time SPI transfer finishes.
- * Gets response and prepare command for next sending.
- * Copy response from shadow variable,
- * Copy prepared command to shadow variable
- *
- * @param[in] ifc Pointer to SPI driver structure
- * @param[in] code SPI transfer status code
- * @param[in] msg Pointer to message definition structure
- *
- * @return always zero
- */
-int drv_hbr_spi_wdg_callback(struct spi_drv* ifc, int code,
- struct spi_msg_head* msg)
-{
- if (code == SPI_MSG_FINISHED) {
- hbr_spi_wdg_rx = hbr_spi_wdg_rx_shd;
- hbr_spi_wdg_tx_shd = hbr_spi_wdg_tx;
- }
- return 0;
-}
-
-
-// SPI message format definition for watchdog reset command
-spi_msg_head_t hbr_spi_wdg = {
- .flags = 0,
- .addr = 0,
- .rq_len = 2,
- .tx_buf = (uint8_t*) &hbr_spi_wdg_tx_shd,
- .rx_buf = (uint8_t*) &hbr_spi_wdg_rx_shd,
- .callback = drv_hbr_spi_wdg_callback,
- .private = 1
-};
-
-/**
- * Watchdog FreeRTOS Task function.
- *
- * Select appropriate spi address
- * Initialize task timer
- * Send watchdog keep-alive command each 10ms.
- *
- * @param[in] p Pointer to parameter, unused.
- */
-void drv_hbr_wdg_task(void *p)
-{
- spi_drv_t* ifc;
- ifc = spi_find_drv(NULL, 4);
-
- if(ifc == NULL) {
- wdg_running = FALSE;
- vTaskDelete(NULL);
- }
-
- portTickType xLastWakeTime;
- xLastWakeTime = xTaskGetTickCount();
-
- while(TRUE) {
- if(wdg_running) {
- spi_msg_rq_ins(ifc, &hbr_spi_wdg);
- }
- vTaskDelayUntil(&xLastWakeTime, (10 / portTICK_RATE_MS));
- }
-}
-
-
-/// Watchdog API ---------------------------------------------------------------
-static xTaskHandle wdg_handle = NULL;
-
-/**
- * Start the watchdog task to send keep-alive commands periodically to H-Bridge.
- *
- * @return SUCCESS if watchdog could be started.\n
- * FAILURE if H-Bridge not setup (call drv_hbr_set_signal() first), the
- * watchdog is running already or the task could not be created.
- */
-int8_t drv_hbr_wdg_start()
-{
- if(!pwm_initialized) {
- return FAILURE;
- }
-
- if(wdg_running) {
- return FAILURE;
- }
-
- // Task already created
- if(wdg_handle != NULL) {
- wdg_running = TRUE;
-
- // Task never started
- } else {
- wdg_running = TRUE;
- if(xTaskCreate(drv_hbr_wdg_task,
- (const signed char *)"hbr_wdg_task",
- 256, NULL, 1, &wdg_handle) != pdPASS) {
- wdg_running = FALSE;
- return FAILURE;
- }
- }
-
- return SUCCESS;
-}
-
-
-/**
- * Stop the watchdog task.
- *
- * @return SUCCESS if watchdog could be stopped.\n
- * FAILURE if watchdog wasn't running.
- */
-int8_t drv_hbr_wdg_stop()
-{
- if(!pwm_initialized) {
- return FAILURE;
- }
-
- if(!wdg_running) {
- return FAILURE;
- }
-
- wdg_running = FALSE;
- return SUCCESS;
-}
-
-
-/// H-Bridge API ---------------------------------------------------------------
-/**
- * @brief Set PWM period and duty cycle to HBR_PWM pin
- *
- * Set period and dutycycle to HBR_PWM pin.
- * Period is expected to be in us, duty cycle in percent of the period,
- *
- * If period is lower than 1 or duty greater than 100, function returns without having effect.
- *
- * @param[in] period Period of PWM in us
- * @param[in] duty Width of duty in %
- */
-int8_t drv_hbr_pwm_set_signal(double period, uint32_t duty)
-{
- hetSIGNAL_t tmp_signal;
-
- if(duty > 100) {
- return FAILURE;
- }
-
- if(period < 1) {
- return FAILURE;
- }
-
- tmp_signal.duty = duty;
- tmp_signal.period = period;
- pwmSetSignal(hetRAM1, pwm0, tmp_signal);
-
- pwm_initialized = TRUE;
-
- return SUCCESS;
-}
-
-
-/**
- * Start PWM on HBR_PWM pin
- *
- * If PWM was set previously by hbr_pwm_set_signal function, this procedure starts it.
- * Otherwise function returns and PWM is not started.
- *
- * @return 0 if success, -1 when PWM was not yes set.
- */
-int8_t drv_hbr_pwm_start()
-{
- if (pwm_initialized) {
-
- pwmStart(hetRAM1, pwm0);
- return SUCCESS;
-
- } else {
-
- return FAILURE;
- }
-}
-
-/**
- * @brief Stop PWM on HBR_PWM pin
- */
-void drv_hbr_pwm_stop() {
- pwmStop(hetRAM1, pwm0);
-}
-
-void drv_hbr_pwm_set_duty(uint8_t percent)
-{
- // Don't mind doing range check, pwmSetDuty handles this in error free
- // manner.
- pwmSetDuty(hetRAM1, pwm0, percent);
-}
-
-/**
- * @brief Get duty width of PWM on HBR_PWM pin
- *
- * @return Duty width of PWM in %
- */
-uint32_t drv_hbr_pwm_get_duty() {
- hetSIGNAL_t tmp_signal;
- tmp_signal = pwmGetSignal(hetRAM1, pwm0);
- return tmp_signal.duty;
-}
-
-/**
- * @brief Get period of PWM on HBR_PWM pin
- *
- * @return Period of PWM in us
- */
-double drv_hbr_pwm_get_period() {
- hetSIGNAL_t tmp_signal;
- tmp_signal = pwmGetSignal(hetRAM1, pwm0);
- return tmp_signal.period;
-
-}
-
-/**
- * @brief Set value to HBR_DIR pin.
- *
- * @param[in] direction If O, set hbr_dir to 0, otherwise to 1
- */
-void drv_hbr_set_dir(int direction) {
- hal_gpio_pin_set_value(PIN_DSC_HBRDIR, direction);
-}
-
-/**
- * @brief Get value of hbr_dir
- *
- * @return return 0 or 1 - the value of hbr_dir
- */
-int drv_hbr_get_dir() {
- return hal_gpio_pin_get_value(PIN_DSC_HBRDIR);
-}
-
-/**
- * @brief Set value to HBR_EN pin.
- *
- * @param[in] direction If O, set hbr_en to 0, otherwise to 1
- */
-void drv_hbr_set_en(int value) {
- hal_gpio_pin_set_value(PIN_DSC_HBREN, value);
-}
-
-/**
- * @brief Get value of HBR_EN
- *
- * @return return 0 or 1 - the value of hbr_en
- */
-int drv_hbr_get_en() {
- return hal_gpio_pin_get_value(PIN_DSC_HBREN);
-}
+++ /dev/null
-/*
- * hout.c
- *
- * Created on: 22.2.2013
- * Author: Michal Horn
- *
- * This file provides functions and procedures to manipulate HOUT port.
- *
- * Functions for setting, starting and stopping PWM on selected HOUT pin.
- */
-//#include "drv_hout.h"
-#include "drv/drv.h"
-
-#define HOUT_PWM_INITIALIZED 0x1
-#define HOUT_PWM_RUNNING 0x100
-
-/** Map of hout_in pin descriptors to their index **/
-static uint32_t hout_pin_in_descs[PORT_NV_HOUTIN] = {PIN_DSC_HOUT1IN, PIN_DSC_HOUT2IN, PIN_DSC_HOUT3IN, PIN_DSC_HOUT4IN, PIN_DSC_HOUT5IN, PIN_DSC_HOUT6IN};
-/** Map of hout_diag pin descriptors to their index **/
-static uint32_t hout_pin_diag_descs[PORT_NV_HOUTDIAG] = {PIN_DSC_HOUT1DIAG, PIN_DSC_HOUT2DIAG, PIN_DSC_HOUT3DIAG, PIN_DSC_HOUT4DIAG, PIN_DSC_HOUT5DIAG, PIN_DSC_HOUT6DIAG};
-/** PWM modules from N2HET mapped to HOUT pin ID 0-5 **/
-static uint8_t hout_pwm_map[PORT_NV_HOUTIN] = {pwm1, pwm2, pwm3, pwm4, pwm5, pwm6};
-/** Flag variable
- * 1st byte - if pwm for each HOUT pin was set a period and duty, so it can be started.
- * 2nd byte - if pwm is currently running
- **/
-uint16_t hout_pwm_state = 0;
-
-/**
- * @brief Set PWM period and duty cycle to HOUT pin
- *
- * Set period and dutycycle to HOUT pin.
- * Period is expected to be in us, duty cycle in percent of the period,
- * hout_id is indexing HOUT pin 0-5.
- *
- * If period is lower than 1, duty greater than 100 or hout_id out of range <0;5>,
- * function returns without having effect.
- *
- * @param[in] hout_id ID of HOUT pin from range 0-5
- * @param[in] period Period of PWM in us
- * @param[in] duty Width of duty in %
- */
-void hout_pwm_set_signal(uint8_t hout_id, double period, uint32_t duty) {
- hetSIGNAL_t tmp_signal;
- if (duty > 100) return;
- if (period < 1) return;
- tmp_signal.duty = duty;
- tmp_signal.period = period;
- pwmSetSignal(hetRAM1, hout_pwm_map[hout_id], tmp_signal);
- hout_pwm_state |= (HOUT_PWM_INITIALIZED << hout_id);
-}
-
-/**
- * @brief Start PWM on HOUT pin
- *
- * If PWM was set previously by hout_pwm_set_signal function, this procedure starts it.
- * Otherwise function returns and PWM is not started.
- *
- * @param[in] hout_id ID of HOUT pin from range 0-5
- * @return 0 if success, -1 when PWM was not yes set.
- */
-int hout_pwm_start(uint8_t hout_id) {
- if (hout_pwm_state & (HOUT_PWM_INITIALIZED << hout_id)) {
- pwmStart(hetRAM1, hout_pwm_map[hout_id]);
- hout_pwm_state |= HOUT_PWM_RUNNING << hout_id;
- return 0;
- }
- else {
- return -1;
- }
-}
-
-/**
- * @brief Stop PWM on HOUT pin
- *
- * @param[in] hout_id ID of HOUT pin from range 0-5
- */
-void hout_pwm_stop(uint8_t hout_id) {
- pwmStop(hetRAM1, hout_pwm_map[hout_id]);
- hout_pwm_state &= ~(HOUT_PWM_RUNNING << hout_id);
-}
-
-/**
- * @brief Get duty width of PWM on HOUT pin
- *
- * @param[in] hout_id ID of HOUT pin from range 0-5
- * @return Duty width of PWM in %
- */
-uint32_t hout_pwm_get_duty(uint8_t hout_id) {
- hetSIGNAL_t tmp_signal;
- tmp_signal = pwmGetSignal(hetRAM1, hout_pwm_map[hout_id]);
- return tmp_signal.duty;
-}
-
-/**
- * @brief Get period of PWM on HOUT pin
- *
- * @param[in] hout_id ID of HOUT pin from range 0-5
- * @return Period of PWM in us
- */
-double hout_pwm_get_period(uint8_t hout_id) {
- hetSIGNAL_t tmp_signal;
- tmp_signal = pwmGetSignal(hetRAM1, hout_pwm_map[hout_id]);
- return tmp_signal.period;
-
-}
-
-/**
- * @brief Runs test of selected HOUT pin.
- *
- * Function runs a test to check if HOUT pin is in good or fault condition.
- * When HOUT is OK, HOUT_DIAG pin has the same value as HOUT_IN pin.
- * When HOUT is in fault state, HOUT_DIAG periodically follows HOUT_PIN for 2ms and shorts to ground for 2ms.
- *
- * @param[in] hout_id ID of HOUT pin from range 0-5
- * @return 0 (HOUT_OK) - hout is in good state and is workiing
- * 1(HOUT_FAILED) - hout id in fault state and generates an error code
- * 2(HOUT_NOT_ON) - HOUT has not been activated
- * -1 when error
- */
-int hout_fail(uint8_t hout_id) {
-
- // FIXME This function is more test application centered and should be
- // removed from library. If user calls this function (which is blocking
- // by the intensive use of vTaskDelay) from the main working a overrun
- // is guaranteed, which, offcourse, is not desired at all.
- uint32_t i;
- uint16_t pwm_running;
- int err_cnt = 0;
- if (hout_id >= PORT_NV_HOUTIN) return -1; // Bad parameter
- pwm_running = hout_pwm_state & (HOUT_PWM_RUNNING << hout_id);
-
- if (!pwm_running && hal_gpio_pin_get_value(hout_pin_in_descs[hout_id]) == 0) {
- return HOUT_NOT_ON; // HOUT is not powered on
- }
-
- if (pwm_running) hout_pwm_stop(hout_id);
- vTaskDelay(1/portTICK_RATE_MS);
- hal_gpio_pin_set_value(hout_pin_in_descs[hout_id], 1);
- for (i = 0; i < 4; i++) {
- if (hal_gpio_pin_get_value(hout_pin_diag_descs[hout_id]) != 1) {
- err_cnt++; // Input value and output value are not equal
- }
- vTaskDelay(1/portTICK_RATE_MS);
- }
- hal_gpio_pin_set_value(hout_pin_in_descs[hout_id], 0);
- if (pwm_running) hout_pwm_start(hout_id);
- return (err_cnt == 0) ? HOUT_OK : HOUT_FAILED;
-}
+++ /dev/null
-/*
- * lout.c
- *
- * Created on: 7.12.2012
- * Author: Michal Horn
- *
- * This file contains functions to control LOUT port over SPI
- */
-
-//#include "drv/lout.h"
-#include "drv/drv.h"
-
-/** Prepared spi command */
-uint32_t lout_spi_cmd = LOUT_SPICMD_INIT_VAL;
-/** Shadow variable used during spi sending */
-uint32_t lout_spi_cmd_sh = LOUT_SPICMD_INIT_VAL;
-/** Spi response */
-uint32_t lout_spi_resp = 0;
-/** Pin mask definitions, those masks are used by val2mfld and mfld2val macros to set and get values into commands */
-static const uint32_t lout_pin_msk[] = {
- 0xC000 , // B [0000 0000] [0000 0000] [1100 0000] [0000 0000]
- 0x3000 , // B [0000 0000] [0000 0000] [0011 0000] [0000 0000]
- 0xC00 , // B [0000 0000] [0000 0000] [0000 1100] [0000 0000]
- 0x300 , // B [0000 0000] [0000 0000] [0000 0011] [0000 0000]
- 0xC0000000, // B [1100 0000] [0000 0000] [0000 0000] [0000 0000]
- 0x30000000, // B [0011 0000] [0000 0000] [0000 0000] [0000 0000]
- 0xC000000 , // B [0000 1100] [0000 0000] [0000 0000] [0000 0000]
- 0x3000000 // B [0000 0011] [0000 0000] [0000 0000] [0000 0000]
-};
-
-void lout_init() {
- // FIXME: Not sure if all those are required. Also not safe for multiple calls.
- dmmInit();
- gioInit();
- hetInit();
- //spi_tms570_init();
-}
-
-/**
- * @brief Set value 0 or 1 to Lout pin
- * This function prepares command for spi, that sets value on 1 lout pin
- *
- * @param[in] pin number of the pin
- * @param[in] val value to be set
- * @return 0 when success, -1 when bad parameter
- */
-int lout_set_pin(uint32_t pin, int val) {
-
- int new_val;
-
- if(val == 0) {
- new_val = LOUT_CODE0;
- } else if(val == 1) {
- new_val = LOUT_CODE1;
- } else {
- return -1;
- }
-
- uint32_t msk = lout_pin_msk[pin - 1];
- uint32_t old_val = __mfld2val(msk, lout_spi_cmd);
- lout_spi_cmd ^= __val2mfld(msk, old_val); // Delete old unknown value
- lout_spi_cmd |= __val2mfld(msk, new_val); // Insert new value
- return 0;
-}
-
-/**
- * @brief Get value from lout pin
- * This function gets value of 1 lout pin. The value is read from the last spi command.
- * @param[in] pin number of the pin
- * @return 0 or 1 when succes, -1 when bad parameter
- */
-int lout_get_pin(uint32_t pin) {
-
- unsigned int msk = lout_pin_msk[pin - 1];
- unsigned int val = __mfld2val(msk, lout_spi_cmd);
-
- if (val == LOUT_CODE0) {
- return 0;
- }
- if (val == LOUT_CODE1) {
- return 1;
- }
-
- return -1;
-}
-
-/**
- * @brief Set values on all pins of LOUT port
- * This function prepares command for spi, that sets value on all lout pins.
- *
- * @param[in] word bits of the word are assigned to LOUT pins. 1st bit -> LOUT1, 2nd bit -> LOUT2 ...
- */
-void lout_set_word(uint8_t word) {
- int i;
- for (i = 0; i < 8; i++,word >>= 1) {
- lout_set_pin(i+1, word&0x1);
- }
-}
-
-/**
- * @brief Get values from all pins of LOUT port
- * This function gets value from all lout pins. It reads the values from last spi command.
- *
- * @return bits of the returned word are assigned to LOUT pins. 1st bit -> LOUT1, 2nd bit -> LOUT2 ...
- */
-uint8_t lout_get_word() {
- uint8_t word = 0;
- int i;
- for (i = 0; i < 8; i++) {
- word |= lout_get_pin(i+1) << i;
- }
- return word;
-}
-
-/**
- * Send prepared command to the spi, store response.
- *
- * @return spi response
- */
-int lout_spi_transfer() {
-
- port_desc_t* desc;
- desc = hal_port_get_dsc(PORT_NAME_LOUT, -1);
-
- lout_spi_cmd_sh = lout_spi_cmd;
- uint32_t commands[4];
- commands[0] = (lout_spi_cmd_sh & 0xFF000000) >> 24;
- commands[1] = (lout_spi_cmd_sh & 0xFF0000) >> 16;
- commands[2] = (lout_spi_cmd_sh & 0xFF00) >> 8;
- commands[3] = (lout_spi_cmd_sh & 0xFF);
-
- lout_spi_resp = desc->port_setfnc_ptr(desc->config, desc->numValues, commands);
- return lout_spi_resp;
-}
-
-/**
- * Returns actual spi command
- * @return actual spi command
- */
-uint32_t lout_spi_get_cmd() {
- return lout_spi_cmd;
-}
-
-/**
- * Returns last spi response
- * @return last spi response
- */
-uint32_t lout_spi_get_response() {
- return lout_spi_resp;
-}
+++ /dev/null
-/* Copyright (C) 2012-2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : mout.c
- * Abstract:
- * RPP driver implementation for MOUT.
- *
- * References:
- * hal/gpio_tms570.h
- * hal/gpio_tms570_def.h
- */
-
-
-#include "drv/mout.h"
-
-const static uint32_t dsc_pin_map[6U][2U] = {
- {PIN_DSC_MOUT1IN, PIN_DSC_MOUT1EN},
- {PIN_DSC_MOUT2IN, PIN_DSC_MOUT2EN},
- {PIN_DSC_MOUT3IN, PIN_DSC_MOUT3EN},
- {PIN_DSC_MOUT4IN, PIN_DSC_MOUT4EN},
- {PIN_DSC_MOUT5IN, PIN_DSC_MOUT5EN},
- {PIN_DSC_MOUT6IN, PIN_DSC_MOUT6EN}
-};
-
-
-int8_t drv_mout_set(uint8_t pin, uint8_t val)
-{
- // Check range
- if(pin > 5) {
- return -1;
- }
-
- hal_gpio_pin_set_value(dsc_pin_map[pin][0], val);
- return SUCCESS;
-}
-
-
-int8_t drv_mout_diag(uint8_t pin)
-{
- // Check range
- if(pin > 5) {
- return -1;
- }
-
- if(hal_gpio_pin_get_value(dsc_pin_map[pin][1]) == 1) {
- return HIGH;
- }
- return LOW;
-}
-
+++ /dev/null
-#include "drv/drv.h"
-
-void drv_sci_init()
-{
- // Low level init
- sciInit();
-}
-
-void drv_sci_set_baudrate(uint32_t baud)
-{
- // Set baudrate
- sciSetBaudrate(sciREG, baud);
-}
-
-/** Declared in ti_drv_sci.c */
-extern tBuffer sciOutBuffer;
-extern tBuffer sciInBuffer;
-
-uint16_t drv_sci_available()
-{
- return (uint16_t)uxQueueMessagesWaiting(sciInBuffer.buf);
-}
-
-
-int8_t drv_sci_receive(uint32_t amount, uint8_t* buffer, portTickType wait)
-{
- if(sciInBuffer.buf == NULL) {
- return FAILURE;
- }
-
- if(xSemaphoreTake(sciInBuffer.mutex, wait) != pdTRUE) {
- return FAILURE;
- }
-
- // If non block mode, return if not enough data is available
- if(wait == 0) {
- if(drv_sci_available() < amount) {
- xSemaphoreGive(sciInBuffer.mutex);
- return FAILURE;
- }
- }
-
- int i = 0;
- unsigned portBASE_TYPE status;
- while(i < amount) {
- status = xQueueReceive(sciInBuffer.buf, &buffer[i], wait);
- if(status != pdTRUE) {
- xSemaphoreGive(sciInBuffer.mutex);
- return FAILURE;
- }
- i++;
- }
-
- xSemaphoreGive(sciInBuffer.mutex);
- return SUCCESS;
-}
-
-static int crlf_conv(uint8_t ch_in, uint8_t *ch_out)
-{
- static bool was_cr = false;
- if (ch_in == '\n' && !was_cr) {
- *ch_out = '\r';
- was_cr = true;
- return 0; // Retry the same char next time
- }
- *ch_out = ch_in;
- was_cr = (ch_in == '\r');
- return 1; // Move to the next character
-}
-
-
-int8_t drv_sci_send(uint32_t length, uint8_t* data, portTickType wait)
-{
- uint8_t ch;
- if(sciOutBuffer.buf == NULL) {
- return FAILURE;
- }
-
- if(xSemaphoreTake(sciOutBuffer.mutex, wait) != pdTRUE) {
- return FAILURE;
- }
-
- portBASE_TYPE ret = pdTRUE;
- while(length > 0) {
- int ofs = crlf_conv(*data, &ch);
- length -= ofs;
- data += ofs;
-
- if(!sciOutBuffer.flags & BUF_TRANSFER_IN_PROGRESS) {
- taskENTER_CRITICAL();
- if (!sciOutBuffer.flags & BUF_TRANSFER_IN_PROGRESS) {
- sciOutBuffer.flags |= BUF_TRANSFER_IN_PROGRESS;
- sciREG->SETINT = SCI_TX_INT; // Start new transfer by sending first byte
- sciREG->TD = ch;
- taskEXIT_CRITICAL();
- continue;
- }
- taskEXIT_CRITICAL();
- }
-
- ret = xQueueSend(sciOutBuffer.buf, (void*)&ch, wait);
- if(ret != pdTRUE) {
- xSemaphoreGive(sciOutBuffer.mutex);
- return FAILURE;
- }
- }
-
- xSemaphoreGive(sciOutBuffer.mutex);
- return SUCCESS;
-}
-
-
-int8_t drv_sci_flush_buffer(tBuffer* buffer)
-{
- if(uxQueueMessagesWaiting(buffer->buf) == 0) {
- return FAILURE;
- }
- xSemaphoreTake(buffer->mutex, portMAX_DELAY);
- // FIXME: FreeRTOS 7.0.2 doesn't have xQueueReset
- //xQueueReset(buffer->buf);
- // FIXME Workaround
- uint8_t dummy = 0;
- while(uxQueueMessagesWaiting(buffer->buf) > 0) {
- xQueueReceive(buffer->buf, &dummy, 0);
- }
- ////////////////////
- xSemaphoreGive(buffer->mutex);
- return SUCCESS;
-}
-
-int8_t drv_sci_flush(boolean_t buf)
-{
- if(buf) {
- return drv_sci_flush_buffer(&sciInBuffer);
- }
- return drv_sci_flush_buffer(&sciOutBuffer);
-}
+++ /dev/null
-/*
- * hal_gpio_tms570.c
- *
- * Created on: 12.11.2012
- * Author: Michal Horn
- *
- * This file contains gpio pin configuration functions.
- * Some additional function for setting and getting pin values, getting
- * descriptors etc. are defined in header file as inline functions.
- *
- * Each pin is defined by its descriptor defined in hal_gpio_tms570_def. The descriptor can be obtained
- * by hal_gpio_get_pin_dsc by giving a pin name as an argument.
- */
-
-//#include "hal/gpio_tms570.h"
-#include "hal/hal.h"
-
-/**
- * Set pin as pull down or pull up and pull resistor enabled or disabled.
- * @param[in] pin_dsc Descriptor of the pin
- * @param[in] Mode on which pin will be configured to.
- * PORT_CONF_MODE_PU - pull up
- * PORT_CONF_MODE_PD - pull down
- * must be | with
- * PORT_CONF_MODE_PEN - pull resistor enable
- * PORT_CONF_MODE_PDIS - pull resistor disable
- * @return always 0
- */
-uint32_t hal_gpio_pin_conf_mode(uint32_t pin_dsc, uint32_t mode) {
- gioPORT_t* gioPort = hal_gpio_pin_get_port_base(pin_dsc);
- if (mode & PORT_CONF_MODE_PTYPE_MASK)
- gioPort->PSL |= (1 << (pin_dsc & 0x1f));
- else
- gioPort->PSL &= ~(1 << (pin_dsc & 0x1f));
- if (mode & PORT_CONF_MODE_PEN_MASK)
- gioPort->PULDIS |= (1 << (pin_dsc & 0x1f));
- else
- gioPort->PULDIS &= ~(1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-/**
- * Configure pin to be open drain or not
- * @param[in] pin_dsc Descriptor of the pin
- * @param[in] Mode on which pin will be configured to.
- * PORT_CONF_OD_OFF - open-drain disabled
- * PORT_CONF_OD_ON - open drain enabled
- *
- * @return always 0
- */
-uint32_t hal_gpio_pin_conf_od(uint32_t pin_dsc, uint32_t od) {
- gioPORT_t* gioPort = hal_gpio_pin_get_port_base(pin_dsc);
- if (od & PORT_CONF_OD_ON)
- gioPort->PDR |= (1 << (pin_dsc & 0x1f));
- else
- gioPort->PDR &= ~(1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-/**
- * Configure pin
- * @param[in] pin_dsc Descriptor of the pin
- * @param[in] Mode on which pin will be configured to.
- * PORT_CONF_OD_OFF - open-drain disabled
- * PORT_CONF_OD_ON - open drain enabled
- *
- * PORT_CONF_MODE_PU - pull up
- * PORT_CONF_MODE_PD - pull down
- *
- * PORT_CONF_MODE_PEN - pull resistor enable
- * PORT_CONF_MODE_PDIS - pull resistor disable
- *
- * PORT_CONF_DIR_IN - direction input
- * PORT_CONF_DIR_OUT - direction output
- *
- * PORT_CONF_INIT_LOW - init value 0
- * PORT_CONF_INIT_HIGH - init value 1
- *
- * PORT_CONF_FNC_GPIO - port function GPIO
- * PORT_CONF_FNC_FNCX - port alternate function X
- *
- * @return always 0
- */
-uint32_t hal_gpio_pin_conf_set(uint32_t pin_dsc, uint32_t conf) {
- pin_dsc &= ~PORT_CONF_MASK;
- hal_gpio_pin_conf_mode(pin_dsc, conf & PORT_CONF_MODE_MASK);
- hal_gpio_pin_conf_od(pin_dsc, conf & PORT_CONF_OD_MASK);
- if(conf & PORT_CONF_SET_DIR) {
- if((conf & PORT_CONF_DIR_MASK) == (PORT_CONF_DIR_IN & PORT_CONF_DIR_MASK))
- hal_gpio_pin_direction_input(pin_dsc);
- else
- hal_gpio_pin_direction_output(pin_dsc, conf & PORT_CONF_INIT_HIGH);
- }
-
- return 0;
-}
+++ /dev/null
-/*
- * hal_gpio_tms570_def.c
- *
- * Created on: 12.11.2012
- * Author: Michal Horn
- *
- * This file contains gpio pins definitions
- * On TMS570 MCU pins can operates as GIO on ports DMM, GIOA, GIOB, HET1 and HET2. Those pins, that are defined in this
- * file, can be accessed directly as GPIO by hal_gpio_set_value and hal_gpio_get_value. Pin configuration can be modified
- * by functions defined in hal_gpio_tms570 source and header files.
- *
- */
-
-//#include "hal/gpio_tms570_def.h"
-#include "hal/hal.h"
-
-/** Array of ports used as GPIO. Thanks to that array, we can determine port just by index in pin_desc at 5th bit */
-gioPORT_t* port_id_map[MAX_PORT_CNT] = {
- (gioPORT_t*) dmmPORT,
- (gioPORT_t*) gioPORTA,
- (gioPORT_t*) gioPORTB,
- (gioPORT_t*) hetPORT1,
- (gioPORT_t*) hetPORT2
-};
-
-/** Map of pin names to pin descriptors. Each pin can be then easily found just by its name given as a string to hal_gpio_get_pin_dsc function*/
-pin_map_element_t pin_map[MAX_PIN_CNT] = {
- /* DMM pins */
- { .pin_name = PIN_NAME_FANCTRL, .pin_desc = PIN_DSC_FANCTRL },
- { .pin_name = PIN_NAME_ETHRST, .pin_desc = PIN_DSC_ETHRST },
- { .pin_name = PIN_NAME_VBAT1EN, .pin_desc = PIN_DSC_VBAT1EN },
- { .pin_name = PIN_NAME_VBAT2EN, .pin_desc = PIN_DSC_VBAT2EN },
- { .pin_name = PIN_NAME_VBAT3EN, .pin_desc = PIN_DSC_VBAT3EN },
- { .pin_name = PIN_NAME_VBATEN, .pin_desc = PIN_DSC_VBATEN },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_DMM_UNUSED(6) },
- { .pin_name = PIN_NAME_SPICSA, .pin_desc = PIN_DSC_SPICSA },
- { .pin_name = PIN_NAME_SPICSB, .pin_desc = PIN_DSC_SPICSB },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_DMM_UNUSED(9)},
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_DMM_UNUSED(10) },
- { .pin_name = PIN_NAME_MOUT1EN, .pin_desc = PIN_DSC_MOUT1EN },
- { .pin_name = PIN_NAME_MOUT2EN, .pin_desc = PIN_DSC_MOUT2EN },
- { .pin_name = PIN_NAME_CANNSTB, .pin_desc = PIN_DSC_CANNSTB },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_DMM_UNUSED(14) },
- { .pin_name = PIN_NAME_CANEN, .pin_desc = PIN_DSC_CANEN },
- { .pin_name = PIN_NAME_LIN2NSLP,.pin_desc = PIN_DSC_LIN2NSLP },
- { .pin_name = PIN_NAME_LIN1NSLP,.pin_desc = PIN_DSC_LIN1NSLP },
- { .pin_name = PIN_NAME_DININT, .pin_desc = PIN_DSC_DININT },
- /* GIOA pins */
- { .pin_name = PIN_NAME_DIN8, .pin_desc = PIN_DSC_DIN8 },
- { .pin_name = PIN_NAME_DIN9, .pin_desc = PIN_DSC_DIN9 },
- { .pin_name = PIN_NAME_DIN10, .pin_desc = PIN_DSC_DIN10 },
- { .pin_name = PIN_NAME_DIN11, .pin_desc = PIN_DSC_DIN11 },
- { .pin_name = PIN_NAME_DIN12, .pin_desc = PIN_DSC_DIN12 },
- { .pin_name = PIN_NAME_DIN13, .pin_desc = PIN_DSC_DIN13 },
- { .pin_name = PIN_NAME_DIN14, .pin_desc = PIN_DSC_DIN14 },
- { .pin_name = PIN_NAME_DIN15, .pin_desc = PIN_DSC_DIN15 },
- /* GIOB pins */
- { .pin_name = PIN_NAME_MOUT6EN, .pin_desc = PIN_DSC_MOUT6EN },
- { .pin_name = PIN_NAME_MOUT5EN, .pin_desc = PIN_DSC_MOUT5EN },
- { .pin_name = PIN_NAME_MOUT6IN, .pin_desc = PIN_DSC_MOUT6IN },
- { .pin_name = PIN_NAME_MOUT5IN, .pin_desc = PIN_DSC_MOUT5IN },
- { .pin_name = PIN_NAME_MOUT4EN, .pin_desc = PIN_DSC_MOUT4EN },
- { .pin_name = PIN_NAME_MOUT3EN, .pin_desc = PIN_DSC_MOUT3EN },
- { .pin_name = PIN_NAME_MOUT4IN, .pin_desc = PIN_DSC_MOUT4IN },
- { .pin_name = PIN_NAME_MOUT3IN, .pin_desc = PIN_DSC_MOUT3IN },
- /* HET1 pins */
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(0) },
- { .pin_name = PIN_NAME_HBREN, .pin_desc = PIN_DSC_HBREN },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(2) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(3) },
- { .pin_name = PIN_NAME_HBRDIR, .pin_desc = PIN_DSC_HBRDIR },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(5) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(6) },
- { .pin_name = PIN_NAME_HBRPWM, .pin_desc = PIN_DSC_HBRPWM },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(8) },
- { .pin_name = PIN_NAME_MOUT1IN, .pin_desc = PIN_DSC_MOUT1IN },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(10) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(11) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(12) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(13) },
- { .pin_name = PIN_NAME_MOUT2IN, .pin_desc = PIN_DSC_MOUT2IN },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(15) },
- { .pin_name = PIN_NAME_HOUT1IN, .pin_desc = PIN_DSC_HOUT1IN },
- { .pin_name = PIN_NAME_HOUT1DIAG,.pin_desc = PIN_DSC_HOUT1DIAG },
- { .pin_name = PIN_NAME_HOUT2IN, .pin_desc = PIN_DSC_HOUT2IN },
- { .pin_name = PIN_NAME_HOUT2DIAG,.pin_desc = PIN_DSC_HOUT2DIAG },
- { .pin_name = PIN_NAME_HOUT3IN, .pin_desc = PIN_DSC_HOUT3IN },
- { .pin_name = PIN_NAME_HOUT3DIAG,.pin_desc = PIN_DSC_HOUT3DIAG },
- { .pin_name = PIN_NAME_HOUT4IN, .pin_desc = PIN_DSC_HOUT4IN },
- { .pin_name = PIN_NAME_HOUT4DIAG,.pin_desc = PIN_DSC_HOUT4DIAG },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(22) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(23) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(24) },
- { .pin_name = PIN_NAME_HOUT5IN, .pin_desc = PIN_DSC_HOUT5IN },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(26) },
- { .pin_name = PIN_NAME_HOUT5DIAG,.pin_desc = PIN_DSC_HOUT5DIAG },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(28) },
- { .pin_name = PIN_NAME_HOUT6IN, .pin_desc = PIN_DSC_HOUT6IN },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET1_UNUSED(30) },
- { .pin_name = PIN_NAME_HOUT6DIAG,.pin_desc = PIN_DSC_HOUT6DIAG },
- /* HET2 pins */
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(0) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(1) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(2) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(3) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(4) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(5) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(6) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(7) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(8) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(9) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(10) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(11) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(12) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(13) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(14) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(15) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(16) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(17) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(18) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(19) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(20) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(21) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(22) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(23) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(24) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(25) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(26) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(27) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(28) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(29) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(30) },
- { .pin_name = PIN_NAME_UNUSED, .pin_desc = PIN_DSC_HET2_UNUSED(31) }
-};
-
-
+++ /dev/null
-/*
- * port_def.c
- *
- * Created on: 26.11.2012
- * Author: Michal Horn
- *
- * This file contains general ports definitions. Ports are defined according to their names on the RPP board.
- * Each port is define by port descriptor, which consists of:
- * - list of its pin (pin descriptors),
- * - number of pins,
- * - get value function pointer,
- * - set value function pointer.
- * Finally each port descriptor is mapped to the port name string.
- *
- * Get and set value function are defined for each port style (ADC, SPI, GPIO) in separated files.
- */
-
-//#include "hal/port_def.h"
-// Cannot include upper layer
-//#include "drv_adc.h"
-//#include "hal/port_spi.h"
-//#include "hal/port_gpio.h"
-#include "hal/hal.h"
-
-// Lists of pins assigned to the ports
-static uint32_t port_cfg_dinmcu[] = PORT_CFG_DINMCU;
-static uint32_t port_cfg_dinspi[] = PORT_CFG_DINSPI;
-static uint32_t port_cfg_houtdiag[] = PORT_CFG_HOUTDIAG;
-static uint32_t port_cfg_houtin[] = PORT_CFG_HOUTIN;
-static uint32_t port_cfg_houtifbk[] = PORT_CFG_HOUTIFBK;
-static uint32_t port_cfg_adc[] = PORT_CFG_ADC;
-static uint32_t port_cfg_lout[] = PORT_CFG_LOUT;
-static uint32_t port_cfg_dac1_2[] = PORT_CFG_DAC1_2;
-static uint32_t port_cfg_dac3_4[] = PORT_CFG_DAC3_4;
-static uint32_t port_cfg_dacdref[] = PORT_CFG_DACDREF;
-static uint32_t port_cfg_hbr[] = PORT_CFG_HBR;
-static uint32_t port_cfg_fray1[] = PORT_CFG_FRAY1;
-static uint32_t port_cfg_fray2[] = PORT_CFG_FRAY2;
-static uint32_t port_cfg_mouten[] = PORT_CFG_MOUTEN;
-
-// Port descriptors
-static port_desc_t port_desc_dinmcu = {
- .config = port_cfg_dinmcu,
- .numValues = PORT_NV_DINMCU,
- .port_getfnc_ptr = PORT_GFC_DINMCU,
- .port_setfnc_ptr = PORT_SFC_DINMCU,
-};
-
-static port_desc_t port_desc_dinspi = {
- .config = port_cfg_dinspi,
- .numValues = PORT_NV_DINSPI,
- .port_getfnc_ptr = PORT_GFC_DINSPI,
- .port_setfnc_ptr = PORT_SFC_DINSPI,
-};
-
-static port_desc_t port_desc_houtdiag = {
- .config = port_cfg_houtdiag,
- .numValues = PORT_NV_HOUTDIAG,
- .port_getfnc_ptr = PORT_GFC_HOUTDIAG,
- .port_setfnc_ptr = PORT_SFC_HOUTDIAG,
-};
-
-static port_desc_t port_desc_houtin = {
- .config = port_cfg_houtin,
- .numValues = PORT_NV_HOUTIN,
- .port_getfnc_ptr = PORT_GFC_HOUTIN,
- .port_setfnc_ptr = PORT_SFC_HOUTIN,
-};
-
-static port_desc_t port_desc_houtifbk = {
- .config = port_cfg_houtifbk,
- .numValues = PORT_NV_HOUTIFBK,
- .port_getfnc_ptr = PORT_GFC_HOUTIFBK,
- .port_setfnc_ptr = PORT_SFC_HOUTIFBK,
-};
-
-static port_desc_t port_desc_adc = {
- .config = port_cfg_adc,
- .numValues = PORT_NV_ADC,
- .port_getfnc_ptr = PORT_GFC_ADC,
- .port_setfnc_ptr = PORT_SFC_ADC,
-};
-
-static port_desc_t port_desc_lout = {
- .config = port_cfg_lout,
- .numValues = PORT_NV_LOUT,
- .port_getfnc_ptr = PORT_GFC_LOUT,
- .port_setfnc_ptr = PORT_SFC_LOUT,
-};
-
-static port_desc_t port_desc_dac1_2 = {
- .config = port_cfg_dac1_2,
- .numValues = PORT_NV_DAC1_2,
- .port_getfnc_ptr = PORT_GFC_DAC1_2,
- .port_setfnc_ptr = PORT_SFC_DAC1_2,
-};
-
-static port_desc_t port_desc_dac3_4 = {
- .config = port_cfg_dac3_4,
- .numValues = PORT_NV_DAC3_4,
- .port_getfnc_ptr = PORT_GFC_DAC3_4,
- .port_setfnc_ptr = PORT_SFC_DAC3_4,
-};
-
-static port_desc_t port_desc_dacdref = {
- .config = port_cfg_dacdref,
- .numValues = PORT_NV_DACDREF,
- .port_getfnc_ptr = PORT_GFC_DACDREF,
- .port_setfnc_ptr = PORT_SFC_DACDREF,
-};
-
-static port_desc_t port_desc_hbr = {
- .config = port_cfg_hbr,
- .numValues = PORT_NV_HBR,
- .port_getfnc_ptr = PORT_GFC_HBR,
- .port_setfnc_ptr = PORT_SFC_HBR,
-};
-
-static port_desc_t port_desc_fray1 = {
- .config = port_cfg_fray1,
- .numValues = PORT_NV_FRAY1,
- .port_getfnc_ptr = PORT_GFC_FRAY1,
- .port_setfnc_ptr = PORT_SFC_FRAY1,
-};
-
-static port_desc_t port_desc_fray2 = {
- .config = port_cfg_fray2,
- .numValues = PORT_NV_FRAY2,
- .port_getfnc_ptr = PORT_GFC_FRAY2,
- .port_setfnc_ptr = PORT_SFC_FRAY2,
-};
-
-static port_desc_t port_desc_mouten = {
- .config = port_cfg_mouten,
- .numValues = PORT_NV_MOUTEN,
- .port_getfnc_ptr = PORT_GFC_MOUTEN,
- .port_setfnc_ptr = PORT_SFC_MOUTEN,
-};
-
-// Maps of port names to port descriptors
-static port_def_t port_definition[PORT_CNT] = {
- {.name = PORT_NAME_DINMCU, .desc = &port_desc_dinmcu},
- {.name = PORT_NAME_DINSPI, .desc = &port_desc_dinspi},
- {.name = PORT_NAME_HOUTDIAG, .desc = &port_desc_houtdiag},
- {.name = PORT_NAME_HOUTIN, .desc = &port_desc_houtin},
- {.name = PORT_NAME_HOUTIFBK, .desc = &port_desc_houtifbk},
- {.name = PORT_NAME_ADC, .desc = &port_desc_adc},
- {.name = PORT_NAME_LOUT, .desc = &port_desc_lout},
- {.name = PORT_NAME_DAC1_2, .desc = &port_desc_dac1_2},
- {.name = PORT_NAME_DAC3_4, .desc = &port_desc_dac3_4},
- {.name = PORT_NAME_DACDREF, .desc = &port_desc_dacdref},
- {.name = PORT_NAME_HBR, .desc = &port_desc_hbr},
- {.name = PORT_NAME_DAC1_2, .desc = &port_desc_dac1_2},
- {.name = PORT_NAME_FRAY1, .desc = &port_desc_fray1},
- {.name = PORT_NAME_FRAY2, .desc = &port_desc_fray2},
- {.name = PORT_NAME_MOUTEN, .desc = &port_desc_mouten}
-};
-
-/**
- * Get port descriptor assigned to port name.
- * @param[in] port_name Pointer to string - the name of the port.
- * @param[in] len Length of the name, if terminated by '/0', then len=-1
- * @return Port descriptor or NULL if not found
- */
-port_desc_t* hal_port_get_dsc(const char* port_name, int len) {
- uint32_t i;
- const char* port_name_ptr;
- char port_name_term[32];
- if (len != -1) { // port name not terminated by '\0'
- strncpy(port_name_term, port_name, len);
- port_name_term[len] = '\0';
- port_name_ptr = port_name_term;
- }
- else port_name_ptr = port_name;
-
- for (i = 0; i < PORT_CNT; i++) {
- if (strcmp(port_name_ptr, port_definition[i].name) == 0) {
- return port_definition[i].desc;
- }
- }
- return NULL;
-}
-
-/**
- * Get port descriptor assigned to port name.
- * @param[in] port_name Pointer to string - the name of the port.
- * @param[in] len Length of the name, if terminated by '/0', then len=-1
- * @return Port descriptor or NULL if not found
- */
-const port_def_t* hal_port_get_definitions() {
- return (const port_def_t*)port_definition;
-}
-
+++ /dev/null
-/*
- * port_gpio.c
- *
- * Created on: 26.11.2012
- * Author: Michal Horn
- *
- * This file contains getter and setter functions for GPIO port type.
- */
-
-//#include "hal/port_gpio.h"
-//#include "hal/gpio_tms570.h"
-#include "hal/hal.h"
-
-/**
- * Get values of all pins of given port.
- * @param[in] config Pointer to array of pin descriptors
- * @param[in] num_val Number of pins assigned to the port
- * @param[out] values Stored values of all pins of the port. 1st bit -> pin0, 2nd bit -> pin1...
- * @return always 0
- */
-uint32_t hal_gio_port_get_val(uint32_t* config, uint32_t num_val, uint32_t* values) {
- uint32_t i;
- for (i = 0; i < num_val; i++) {
- values[i] = hal_gpio_pin_get_value(config[i]);
- }
- return 0;
-}
-
-/**
- * Set values to all pins of given port.
- * @param[in] config Pointer to array of pin descriptors
- * @param[in] num_val Number of pins assigned to the port
- * @param[in] values Stored values of all pins of the port. 1st bit -> pin0, 2nd bit -> pin1...
- * @return always 0
- */
-uint32_t hal_gio_port_set_val(uint32_t* config, uint32_t num_val, const uint32_t* values) {
- uint32_t i;
- for (i = 0; i < num_val; i++) {
- hal_gpio_pin_set_value(config[i], values[i]);
- }
- return 0;
-}
-
+++ /dev/null
-/*
- * port_spi.c
- *
- * Created on: 26.11.2012
- * Author: Michal Horn
- *
- * This file contains getter and setter functions for SPI port type.
- */
-
-//#include "hal_port_spi.h"
-// Cannot include upper layer
-//#include "drv_spi.h"
-//#include "cmdproc.h"
-#include "hal/hal.h"
-
-#define PORT_BUF 4
-/** Buffer for spi command to be sent */
-uint8_t spi_port_buf_tx[PORT_BUF];
-/** Buffer for spi response */
-uint8_t spi_port_buf_rx[PORT_BUF];
-
-
-/**
- * Transfer command through the spi
- * @param[in] config Address of the SPI
- * @param[in] num_bytes Number of bytes to be trasfered
- * @param[in] commands SPI command to be sent
- * @return spi response
- */
-uint32_t hal_spi_port_transfer_command(uint32_t* config, uint32_t num_bytes, const uint32_t* commands) {
- spi_drv_t *ifc;
- int i;
- uint32_t ret;
-
- for (i = 0; i < num_bytes; i++)
- spi_port_buf_tx[i] = commands[i];
-
- ifc = spi_find_drv(NULL, config[0]);
- if (ifc == NULL)
- return 0;
-
- if (!(ifc->flags & SPI_IFC_ON)) {
- return 0;
- }
-
- spi_transfer(ifc, config[1], num_bytes, spi_port_buf_tx, spi_port_buf_rx);
- ret = 0;
- for (i = 0; i < num_bytes; i++)
- ret |= spi_port_buf_rx[i] << i*8;
- return ret;
-}
-
-
+++ /dev/null
-
-//#include "ul/ul_list.h"
-//#include "drv/spi.h"
-//#include "cpu_def.h"
-//#include "ul/ul_list.h"
-#include "hal/hal.h"
-
-int spi_msg_rq_ins(spi_drv_t *ifc, spi_msg_head_t *msg)
-{
- spi_isr_lock_level_t saveif;
-
- if (!ifc)
- return -1;
-
- if (!(ifc->flags & SPI_IFC_ON))
- return -1;
-
- spi_isr_lock(saveif);
- spi_rq_queue_insert(ifc, msg);
- spi_isr_unlock(saveif);
- ifc->ctrl_fnc(ifc, SPI_CTRL_WAKE_RQ, NULL);
- return 0;
-}
-
-int spi_transfer_callback(struct spi_drv *ifc, int code, struct spi_msg_head *msg)
-{
- if (msg->private) {
- msg->private = 0;
- }
- return 0;
-}
-
-int spi_transfer(spi_drv_t *ifc, int addr, int rq_len, const void *tx_buf, void *rx_buf)
-{
- spi_msg_head_t msg;
-
- msg.flags = 0;
- //msg.ifc = NULL;
- spi_rq_queue_init_detached(&msg);
- msg.addr = addr;
- msg.rq_len = rq_len;
- msg.tx_buf = tx_buf;
- msg.rx_buf = rx_buf;
- msg.callback = spi_transfer_callback;
- msg.private = 1;
-
- if (spi_msg_rq_ins(ifc, &msg) < 0)
- return -1;
-
- /* Wait for the request completion */
- while (msg.private) {
- __memory_barrier();
- }
-
-
- if (msg.flags & (SPI_MSG_FAIL | SPI_MSG_ABORT))
- return -1;
-
- return msg.rq_len;
-}
-
+++ /dev/null
-/*
- * spi_resp_transl.c
- *
- * Created on: 30.11.2012
- * Author: Michal Horn
- *
- * This module provides the capability to translate pure SPI response into human readable form.
- *
- * Some SPI peripherals provides simple responses, but some others provide responses depending on previous command,
- * they have obtained.
- * So we have a structure, that maps SPI peripheral names (spi port names) to arrays of another structure, that maps spi commands to responses field descriptors.
- * Command to response field map consists of a command mask, command, pointer to field descriptor and number of fields in field descriptor.
- * Each fields descriptor maps field name to field mask, that specifies the meaning of each bit or group of bits in the response.
- */
-
-
-//#include "spi_resp_transl.h"
-//#include "cmdproc_io_tisci.h"
-#include "hal/hal.h"
-
-// Field descriptors
-static const spitr_field_desc_t din_glob_field_descs[DIN_NUM_GLOB_FD] = {
- { .field_name = "Thermal flag\t", .mask = (1 << 23) },
- { .field_name = "INT flag\t", .mask = (1 << 22) },
- { .field_name = "SP0 - DIN0\t", .mask = (1 << 14) },
- { .field_name = "SP1 - DIN1\t", .mask = (1 << 15) },
- { .field_name = "SP2 - DIN2\t", .mask = (1 << 16) },
- { .field_name = "SP3 - DIN3\t", .mask = (1 << 17) },
- { .field_name = "SP4 - DIN4\t", .mask = (1 << 18) },
- { .field_name = "SP5 - DIN5\t", .mask = (1 << 19) },
- { .field_name = "SP6 - DIN6\t", .mask = (1 << 20) },
- { .field_name = "SP7 - DIN7\t", .mask = (1 << 21) },
- { .field_name = "SG0 - DIN8\t", .mask = (1 << 0) },
- { .field_name = "SG1 - DIN9\t", .mask = (1 << 1) },
- { .field_name = "SG2 - DIN10\t", .mask = (1 << 2) },
- { .field_name = "SG3 - DIN11\t", .mask = (1 << 3) },
- { .field_name = "SG4 - DIN12\t", .mask = (1 << 4) },
- { .field_name = "SG5 - DIN13\t", .mask = (1 << 5) },
- { .field_name = "SG6 - DIN14\t", .mask = (1 << 6) },
- { .field_name = "SG7 - DIN15\t", .mask = (1 << 7) },
- { .field_name = "SG8 - NA\t", .mask = (1 << 8) },
- { .field_name = "SG9 - NA\t", .mask = (1 << 9) },
- { .field_name = "SG10 - NA\t", .mask = (1 << 10) },
- { .field_name = "SG11 - NA\t", .mask = (1 << 11) },
- { .field_name = "SG12 - NA\t", .mask = (1 << 12) },
- { .field_name = "SG13 - NA\t", .mask = (1 << 13) }
-};
-
-static const spitr_field_desc_t lout_glob_field_descs[LOUT_NUM_GLOB_FD] = {
- { .field_name = "U401 VS PS M", .mask = (1 << 24) },
- { .field_name = "U401 IN8 state", .mask = (1 << 27) },
- { .field_name = "U401 IN7 state", .mask = (1 << 28) },
- { .field_name = "U401 IN6 state", .mask = (1 << 29) },
- { .field_name = "U401 IN5 state", .mask = (1 << 30) },
- { .field_name = "U401 Driver 8 status", .mask = (uint32_t)(1 << 31) },
- { .field_name = "U401 Driver 7 status", .mask = (1 << 16) },
- { .field_name = "U401 Driver 6 status", .mask = (1 << 17) },
- { .field_name = "U401 Driver 5 status", .mask = (1 << 18) },
- { .field_name = "U401 Driver 4 status", .mask = (1 << 19) },
- { .field_name = "U401 Driver 3 status", .mask = (1 << 20) },
- { .field_name = "U401 Driver 2 status", .mask = (1 << 21) },
- { .field_name = "U401 Driver 1 status", .mask = (1 << 22) },
- { .field_name = "U401 Thermal warning", .mask = (1 << 23) },
- { .field_name = "U404 VS PS M", .mask = (1 << 8) },
- { .field_name = "U404 IN8 state", .mask = (1 << 11) },
- { .field_name = "U404 IN7 state", .mask = (1 << 12) },
- { .field_name = "U404 IN6 state", .mask = (1 << 13) },
- { .field_name = "U404 IN5 state", .mask = (1 << 14) },
- { .field_name = "U404 Driver 8 status", .mask = (1 << 15) },
- { .field_name = "U404 Driver 7 status", .mask = (1 << 0) },
- { .field_name = "U404 Driver 6 status", .mask = (1 << 1) },
- { .field_name = "U404 Driver 5 status", .mask = (1 << 2) },
- { .field_name = "U404 Driver 4 status", .mask = (1 << 3) },
- { .field_name = "U404 Driver 3 status", .mask = (1 << 4) },
- { .field_name = "U404 Driver 2 status", .mask = (1 << 5) },
- { .field_name = "U404 Driver 1 status", .mask = (1 << 6) },
- { .field_name = "U404 Thermal warning", .mask = (1 << 7) }
-};
-
-static const spitr_field_desc_t dac_glob_field_descs[DAC_NUM_GLOB_FD] = {
- { .field_name = "Provides no informations", .mask = 0 }
-};
-
-static const spitr_field_desc_t fray_glob_field_descs[FRAY_NUM_GLOB_FD] = {
- { .field_name = "Parity bit", .mask = (1 << 0) },
- { .field_name = "SPI error", .mask = (1 << 5) },
- { .field_name = "UVVIO", .mask = (1 << 6) },
- { .field_name = "UVVCC", .mask = (1 << 7) },
- { .field_name = "TXEN clamped", .mask = (1 << 8) },
- { .field_name = "Temp high", .mask = (1 << 9) },
- { .field_name = "Bus error", .mask = (1 << 10) },
- { .field_name = "Pwon", .mask = (1 << 11) },
- { .field_name = "BGE clamped", .mask = (1 << 12) },
- { .field_name = "Transmiter enabled", .mask = (1 << 13) },
- { .field_name = "Normal mode", .mask = (1 << 14) },
- { .field_name = "Bus wake", .mask = (1 << 15) }
-};
-
-static const spitr_field_desc_t hbr_statreg0_field_descs[HBR_NUM_STATREG_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "DS_MON_3", .mask = (1 << 7) },
- { .field_name = "DS_MON_2", .mask = (1 << 6) },
- { .field_name = "DS_MON_1", .mask = (1 << 5) },
- { .field_name = "DS_MON_0", .mask = (1 << 4) },
- { .field_name = "OT_EXT", .mask = (1 << 1) },
- { .field_name = "CP_LOW", .mask = (1 << 0) }
-};
-
-static const spitr_field_desc_t hbr_applreg1_field_descs[HBR_NUM_APPLREG1_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "RWD", .mask = (1 << 7) },
- { .field_name = "FW_PAS", .mask = (1 << 6) },
- { .field_name = "OFF_CAL", .mask = (1 << 5) },
- { .field_name = "CLK_SPCTR", .mask = (1 << 4) },
- { .field_name = "OVT", .mask = (1 << 3) },
- { .field_name = "OV_UV_RD", .mask = (1 << 2) },
- { .field_name = "DIAG", .mask = (3 << 0) }
-};
-
-static const spitr_field_desc_t hbr_applreg2_field_descs[HBR_NUM_APPLREG2_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "RWD", .mask = (1 << 7) },
- { .field_name = "COPT", .mask = (7 << 4) },
- { .field_name = "FW", .mask = (1 << 3) },
- { .field_name = "MCSA", .mask = (1 << 2) },
- { .field_name = "GCSA", .mask = (3 << 0) }
-};
-
-static const spitr_field_desc_t hbr_applreg3_field_descs[HBR_NUM_APPLREG3_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "RWD", .mask = (1 << 7) },
- { .field_name = "EXT_TS", .mask = (1 << 6) },
- { .field_name = "EXT_TH_5", .mask = (1 << 5) },
- { .field_name = "EXT_TH_4", .mask = (1 << 4) },
- { .field_name = "EXT_TH_3", .mask = (1 << 3) },
- { .field_name = "EXT_TH_2", .mask = (1 << 2) },
- { .field_name = "EXT_TH_1", .mask = (1 << 1) },
- { .field_name = "EXT_TH_0", .mask = (1 << 0) }
-};
-
-static const spitr_field_desc_t hbr_diaddr0_field_descs[HBR_NUM_DIADDR0_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "FAM", .mask = (3 << 6) },
- { .field_name = "NR_PI", .mask = (0x3F << 0) }
-};
-
-static const spitr_field_desc_t hbr_diaddr1_field_descs[HBR_NUM_DIADDR1_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "PRD_ID", .mask = (0xFF << 0) }
-};
-
-static const spitr_field_desc_t hbr_diaddr2_field_descs[HBR_NUM_DIADDR2_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "PRD_ID", .mask = (0xFF << 0) }
-};
-
-static const spitr_field_desc_t hbr_diaddr3_field_descs[HBR_NUM_DIADDR3_FD] = {
- { .field_name = "GL_ER", .mask = (1 << 15) },
- { .field_name = "Frame Error", .mask = (1 << 14) },
- { .field_name = "STK_RESET_Q", .mask = (1 << 13) },
- { .field_name = "TSD", .mask = (1 << 12) },
- { .field_name = "TW", .mask = (1 << 11) },
- { .field_name = "UV", .mask = (1 << 10) },
- { .field_name = "OV", .mask = (1 << 9) },
- { .field_name = "WDTO", .mask = (1 << 8) },
- { .field_name = "BR", .mask = (1 << 7) },
- { .field_name = "AR5", .mask = (1 << 6) },
- { .field_name = "AR4", .mask = (1 << 5) },
- { .field_name = "AR3", .mask = (1 << 4) },
- { .field_name = "32-bits", .mask = (1 << 3) },
- { .field_name = "24-bits", .mask = (1 << 2) },
- { .field_name = "16-bits", .mask = (1 << 1) },
- { .field_name = "8-bits", .mask = (1 << 0) }
-};
-
-/* Map register descriptors to spi commands */
-static const spitr_cmd_map_t din_cmd_map[DIN_NUM_CMD_D] = {
- { .cmd_msk = 0, .command = 0, .field_desc = din_glob_field_descs, .num_fields = DIN_NUM_GLOB_FD}
-};
-
-static const spitr_cmd_map_t lout_cmd_map[LOUT_NUM_CMD_D] = {
- { .cmd_msk = 0, .command = 0, .field_desc = lout_glob_field_descs, .num_fields = LOUT_NUM_GLOB_FD }
-};
-
-static const spitr_cmd_map_t dac_cmd_map[DAC_NUM_CMD_D] = {
- { .cmd_msk = 0, .command = 0, .field_desc = dac_glob_field_descs, .num_fields = DAC_NUM_GLOB_FD }
-};
-
-static const spitr_cmd_map_t fray_cmd_map[FRAY_NUM_CMD_D] = {
- { .cmd_msk = 0, .command = 0, .field_desc = fray_glob_field_descs, .num_fields = FRAY_NUM_GLOB_FD }
-};
-
-static const spitr_cmd_map_t hbr_cmd_map[HBR_NUM_CMD_D] = {
- { .cmd_msk = 0x0000FF00, .command = 0xC000, .field_desc = hbr_diaddr0_field_descs, .num_fields = HBR_NUM_DIADDR0_FD },
- { .cmd_msk = 0x0000FF00, .command = 0xC100, .field_desc = hbr_diaddr1_field_descs, .num_fields = HBR_NUM_DIADDR1_FD },
- { .cmd_msk = 0x0000FF00, .command = 0xC200, .field_desc = hbr_diaddr2_field_descs, .num_fields = HBR_NUM_DIADDR2_FD },
- { .cmd_msk = 0x0000FF00, .command = 0xC300, .field_desc = hbr_diaddr3_field_descs, .num_fields = HBR_NUM_DIADDR3_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x8000, .field_desc = hbr_statreg0_field_descs, .num_fields = HBR_NUM_STATREG_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x4000, .field_desc = hbr_statreg0_field_descs, .num_fields = HBR_NUM_STATREG_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x4100, .field_desc = hbr_applreg1_field_descs, .num_fields = HBR_NUM_APPLREG1_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x4200, .field_desc = hbr_applreg2_field_descs, .num_fields = HBR_NUM_APPLREG2_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x4300, .field_desc = hbr_applreg3_field_descs, .num_fields = HBR_NUM_APPLREG3_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x0100, .field_desc = hbr_applreg1_field_descs, .num_fields = HBR_NUM_APPLREG1_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x0200, .field_desc = hbr_applreg2_field_descs, .num_fields = HBR_NUM_APPLREG2_FD },
- { .cmd_msk = 0x0000FF00, .command = 0x0300, .field_desc = hbr_applreg3_field_descs, .num_fields = HBR_NUM_APPLREG3_FD },
-};
-
-/* Map command maps to SPI peripheral name */
-static const spitr_name_map_t spitr_map[NUM_SPI_DEVICES] = {
- { .spi_name = PORT_NAME_DINSPI, .cmd_map = din_cmd_map, .num_cmd = DIN_NUM_CMD_D},
- { .spi_name = PORT_NAME_LOUT, .cmd_map = lout_cmd_map, .num_cmd = LOUT_NUM_CMD_D },
- { .spi_name = PORT_NAME_DAC1_2, .cmd_map = dac_cmd_map, .num_cmd = DAC_NUM_CMD_D },
- { .spi_name = PORT_NAME_DAC3_4, .cmd_map = dac_cmd_map, .num_cmd = DAC_NUM_CMD_D },
- { .spi_name = PORT_NAME_HBR, .cmd_map = hbr_cmd_map, .num_cmd = HBR_NUM_CMD_D },
- { .spi_name = PORT_NAME_FRAY1, .cmd_map = fray_cmd_map, .num_cmd = FRAY_NUM_CMD_D },
- { .spi_name = PORT_NAME_FRAY2, .cmd_map = fray_cmd_map, .num_cmd = FRAY_NUM_CMD_D }
-};
-
-
-
-/**
- * Get the map spi command to spi response.
- * @param[in] spi_port_name String of the port name
- * @param[in] len Length of the port name string, if terminated by '/0', then len = -1
- * @param[out] num_cmdDesc returns number of command->fieldDesc fields assigned to the map
- * @return command to field_desc map or NULL if not found
- */
-const spitr_cmd_map_t* get_spi_cmd_map(const char* spi_port_name, int len, uint32_t* num_cmdDesc) {
- uint32_t i;
- const char* spi_port_name_ptr;
- char port_name_term[32];
- if (len != -1) { // port name not terminated by '\0'
- strncpy(port_name_term, spi_port_name, len);
- port_name_term[len] = '\0';
- spi_port_name_ptr = port_name_term;
- }
- else spi_port_name_ptr = spi_port_name;
-
- for (i = 0; i < NUM_SPI_DEVICES; i++) {
- if (strcmp(spi_port_name_ptr, spitr_map[i].spi_name) == 0) {
- *num_cmdDesc = spitr_map[i].num_cmd;
- return spitr_map[i].cmd_map;
- }
- }
- *num_cmdDesc = 0;
- return NULL;
-}
-
-/**
- * Get fields descriptor according to the field descriptor map and command.
- * @param[in] cmd_map pointer to structure, that maps commands to their field descriptors
- * @param[in] num_cmd Number of fields in the cmd_map
- * @param[in] cmd Command used as a key value in the cmd_map. We are searching for the field descriptors assigned to this command
- * @param[out] num_fdDesc Number of fields in field descriptors structure, that was found
- * @return pointer to the structure that maps field names to field masks or NULL, when not found
- */
-const spitr_field_desc_t* get_spi_field_desc(const spitr_cmd_map_t* cmd_map, uint32_t num_cmd, uint32_t cmd, uint32_t* num_fdDesc) {
- if (cmd_map == NULL) {
- *num_fdDesc = 0;
- return NULL;
- }
-
- uint32_t i;
- for (i = 0; i < num_cmd; i++) {
- uint32_t mskcmd = cmd & cmd_map[i].cmd_msk;
- uint32_t tmpCmd = cmd_map[i].command;
- if (mskcmd == tmpCmd) {
- *num_fdDesc = cmd_map[i].num_fields;
- return cmd_map[i].field_desc;
- }
- }
- *num_fdDesc = cmd_map[i].num_fields;
- return NULL;
-}
-
-/**
- * Translate spi response into human readable form
- * @param[in] fd Pointer to structure that maps Field names to field value masks
- * @param[in] num_fields Number of fields in fd
- * @param[in] value spi response to be traslated
- * @param[out] table The result is stored in this table, where each row consists of the value name and the value
- * @return number of rows in the translated table
- */
-int spitr_fill_tr_table(const spitr_field_desc_t* fd, uint32_t num_fields, uint32_t value, spitr_reg_translate_table_t* table) {
- uint32_t i;
- for (i = 0; i < num_fields; i++) {
- table->row[i].field_name = fd[i].field_name;
- table->row[i].value = __mfld2val(fd[i].mask, value);
- }
- table->num_rows = num_fields;
- return i;
-}
-
+++ /dev/null
-/* Code based on Halcogen generated source code */
-
-//#include "spi_tms570.h"
-//#include "drv_spi.h"
-//#include "sys_common.h"
-//#include "ti_drv_dmm.h"
-#include "hal/hal.h"
-
-static int spi_tms570_ctrl_fnc(spi_drv_t *ifc, int ctrl, void *p);
-
-
-/* Each SPI interface has its own static spi_tms570_drv_t struct
- Index to this array is "SPI Interface ID -1" */
-spi_tms570_drv_t spi_tms570_ifcs[4];
-
-/* Addresses of SPI devices (=chips) bound to particular interfaces */
-enum spi_ifc1_devices { SPIDEV_MC33972 = 0, SPIDEV_NCV7608_2x };
-enum spi_ifc2_devices { SPIDEV_SDCARD = 0};
-enum spi_ifc3_devices { SPIDEV_MCP4922_1 = 0, SPIDEV_MCP4922_2, SPIDEV_MCP4922_3 };
-enum spi_ifc4_devices { SPIDEV_L99H01 = 0, SPIDEV_TJA1082_1, SPIDEV_TJA1082_2 };
-
-spi_dev_t spi_ifc1_devs[] = {
- [SPIDEV_MC33972] = {
- .cs = SPI_CS_3,
- .dfsel = 0,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0},
- [SPIDEV_NCV7608_2x] = {
- .cs = SPI_CS_4,
- .dfsel = 0,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0}
-};
-
-spi_dev_t spi_ifc2_devs[] = {
- [SPIDEV_SDCARD] = {
- .cs = SPI_CS_0,
- .dfsel = 0,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0}
-};
-
-spi_dev_t spi_ifc3_devs[] = {
- [SPIDEV_MCP4922_1] = {
- .cs = SPI_CS_0,
- .dfsel = 1,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0},
- [SPIDEV_MCP4922_2] = {
- .cs = SPI_CS_4,
- .dfsel = 1,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0},
- [SPIDEV_MCP4922_3] = {
- .cs = SPI_CS_5,
- .dfsel = 1,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0}
-};
-
-spi_dev_t spi_ifc4_devs[] = {
- [SPIDEV_L99H01] = {
- .cs = SPI_CS_0 | SPI_CS_DMM0,
- .dfsel = 1,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0},
- [SPIDEV_TJA1082_1] = {
- .cs = SPI_CS_0 | SPI_CS_DMM1,
- .dfsel = 0,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0},
- [SPIDEV_TJA1082_2] = {
- .cs = SPI_CS_0 | SPI_CS_DMM2,
- .dfsel = 0,
- .wdel = 0,
- .cshold = 1,
- .dlen = 0}
-};
-
-/*
- Universal piece of code initializing SPI or MibSPI
- devices in "compatibility" mode.
- 8 CS pins are initialized on each device -- even if
- it does not have so much of them.
- ENA register is set even on SPI devices which do not have it --
- this should not be an issue
-*/
-void spiInit(spiBASE_compat_t *spiREG)
-{
- /** bring SPI out of reset */
- spiREG->GCR0 = 1U;
-
- /** SPI master mode and clock configuration */
- spiREG->GCR1 = (1 << 1) /* CLOKMOD */
- |1; /* MASTER */
-
- /** SPI enable pin configuration */
- spiREG->ENAHIGHZ = 0; /* ENABLE HIGHZ */
-
- /** - Delays */
- spiREG->DELAY = (0 << 24) /* C2TDELAY */
- | (0 << 16) /* T2CDELAY */
- | (0 << 8) /* T2EDELAY */
- | 0; /* C2EDELAY */
-
- /** - Data Format 0 */
- spiREG->FMT0 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 8; /* data word length */
-
- /** - Data Format 1 */
- spiREG->FMT1 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (1 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 8; /* data word length */
-
- /** - Data Format 2 */
- spiREG->FMT2 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 8; /* data word length */
-
- /** - Data Format 3 */
- spiREG->FMT3 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 8; /* data word length */
-
- /** - set interrupt levels */
- spiREG->LVL = (0 << 9) /* TXINT */
- | (0 << 8) /* RXINT */
- | (0 << 6) /* OVRNINT */
- | (0 << 4) /* BITERR */
- | (0 << 3) /* DESYNC */
- | (0 << 2) /* PARERR */
- | (0 << 1) /* TIMEOUT */
- | (0); /* DLENERR */
-
- /** - clear any pending interrupts */
- spiREG->FLG = 0xFFFFU;
-
- /** - enable interrupts */
- spiREG->INT0 = (0 << 9) /* TXINT */
- | (0 << 8) /* RXINT */
- | (0 << 6) /* OVRNINT */
- | (0 << 4) /* BITERR */
- | (0 << 3) /* DESYNC */
- | (0 << 2) /* PARERR */
- | (0 << 1) /* TIMEOUT */
- | (0); /* DLENERR */
-
- /** initialize SPI Port */
-
- /** - SPI Port output values */
- spiREG->PCDOUT = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (1 << 4) /* SCS[4] */
- | (1 << 5) /* SCS[5] */
- | (1 << 6) /* SCS[6] */
- | (1 << 7) /* SCS[7] */
- | (0 << 8) /* ENA */
- | (0 << 9) /* CLK */
- | (0 << 10) /* SIMO */
- | (0 << 11); /* SOMI */
-
- /** - SPI Port direction */
- spiREG->PCDIR = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (1 << 4) /* SCS[4] */
- | (1 << 5) /* SCS[5] */
- | (1 << 6) /* SCS[6] */
- | (1 << 7) /* SCS[7] */
- | (0 << 8) /* ENA */
- | (1 << 9) /* CLK */
- | (1 << 10) /* SIMO */
- | (0 << 11); /* SOMI */
-
- /** - SPI Port open drain enable */
- spiREG->PCPDR = 0 /* SCS[0] */
- | (0 << 1) /* SCS[1] */
- | (0 << 2) /* SCS[2] */
- | (0 << 3) /* SCS[3] */
- | (0 << 4) /* SCS[4] */
- | (0 << 5) /* SCS[5] */
- | (0 << 6) /* SCS[6] */
- | (0 << 7) /* SCS[7] */
- | (0 << 8) /* ENA */
- | (0 << 9) /* CLK */
- | (0 << 10) /* SIMO */
- | (0 << 11); /* SOMI */
-
- /** - SPI Port pullup / pulldown selection */
- spiREG->PCPSL = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (1 << 4) /* SCS[4] */
- | (1 << 5) /* SCS[5] */
- | (1 << 6) /* SCS[6] */
- | (1 << 7) /* SCS[7] */
- | (1 << 8) /* ENA */
- | (1 << 9) /* CLK */
- | (1 << 10) /* SIMO */
- | (1 << 11); /* SOMI */
-
- /** - SPI Port pullup / pulldown enable*/
- spiREG->PCDIS = 0 /* SCS[0] */
- | (0 << 1) /* SCS[1] */
- | (0 << 2) /* SCS[2] */
- | (0 << 3) /* SCS[3] */
- | (0 << 4) /* SCS[4] */
- | (0 << 5) /* SCS[5] */
- | (0 << 6) /* SCS[6] */
- | (0 << 7) /* SCS[7] */
- | (0 << 8) /* ENA */
- | (0 << 9) /* CLK */
- | (0 << 10) /* SIMO */
- | (0 << 11); /* SOMI */
-
- /* SPI set all pins to functional */
- spiREG->PCFUN = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (1 << 4) /* SCS[4] */
- | (1 << 5) /* SCS[5] */
- | (1 << 6) /* SCS[6] */
- | (1 << 7) /* SCS[7] */
- | (1 << 8) /* ENA */
- | (1 << 9) /* CLK */
- | (1 << 10) /* SIMO */
- | (1 << 11); /* SOMI */
-
- /* Default CS logic levels */
- spiREG->CSDEF = 0xFF;
-
- /** Set MibSPI devices into compatibility mode --
- "SPI" devices will hopefully ignore this */
- spiREG->MIBSPIE = 0U;
-
- /** - Finally start SPI */
- spiREG->ENA = 1U;
-}
-
-
-int spi_tms570_init(void)
-{
- int i;
-
- spi_tms570_ifcs[0].spi = mibspi_compat_REG1;
- spi_tms570_ifcs[1].spi = spi_compat_REG2;
- spi_tms570_ifcs[2].spi = mibspi_compat_REG3;
- spi_tms570_ifcs[3].spi = spi_compat_REG4;
-
- spi_tms570_ifcs[0].spi_devs = spi_ifc1_devs;
- spi_tms570_ifcs[1].spi_devs = spi_ifc2_devs;
- spi_tms570_ifcs[2].spi_devs = spi_ifc3_devs;
- spi_tms570_ifcs[3].spi_devs = spi_ifc4_devs;
-
-
- for (i = 0; i <= 3; i++)
- {
- spiInit(spi_tms570_ifcs[i].spi);
- spi_tms570_ifcs[i].spi_drv.ctrl_fnc = spi_tms570_ctrl_fnc;
- spi_rq_queue_init_head(&(spi_tms570_ifcs[i].spi_drv));
- spi_tms570_ifcs[i].spi_drv.msg_act = NULL;
- spi_tms570_ifcs[i].spi_drv.flags = SPI_IFC_ON;
- }
-
- //dmmREG->PC5 = (1 << DMM_DATA5); /* Set to L */
- //dmmREG->PC5 = (1 << DMM_DATA6); /* Set to L */
-
- return 0;
-}
-
-
-static int spi_tms570_ctrl_fnc(spi_drv_t *ifc, int ctrl, void *p)
-{
- spi_tms570_drv_t *tms570_drv =
- UL_CONTAINEROF(ifc, spi_tms570_drv_t, spi_drv);
-
- switch (ctrl) {
- case SPI_CTRL_WAKE_RQ:
- if (!(ifc->flags & SPI_IFC_ON))
- return -1;
- if (spi_rq_queue_is_empty(ifc))
- return 0;
-
- tms570_drv->spi->INT0 = SPI_INT0_TXINTENA_m;
- // Enable TXINT (Causes an interrupt
- // to be generated every time data is written to the shift
- // register, so that the next word can be written to TXBUF.
- // (=transmitter empty interrupt)
- // Setting this bit will generate an interrupt if the
- // TXINTFLG bit (SPI Flag Register (SPIFLG)[9]) is set to 1.;
- // An interrupt request will be generated as soon as this
- // bit is set to 1.
- return 0;
-
- default:
- return -1;
- }
-}
-
-
-
-/* -------------------------------------------------------------------------- */
-
-
-
-void spi_tms570_isr(int spi_ifc, uint32_t flags)
-{
- spi_msg_head_t *msg;
- spi_tms570_drv_t *spi_tms570_drv;
- spi_tms570_drv = &spi_tms570_ifcs[spi_ifc];
- spi_isr_lock_level_t saveif;
- uint8_t val_to_wr;
- uint32_t cs;
- unsigned int rxcnt;
- unsigned int txcnt;
- unsigned int rq_len;
- unsigned int rx_data;
- int stop_fl;
-
- if (flags & SPI_FLG_TXINT_m) {
- do {
- msg = spi_tms570_drv->spi_drv.msg_act;
- if (!msg) { /* Is there any MSG being processed? */
- /* If not, get one from a queue */
- spi_isr_lock(saveif);
- msg = spi_tms570_drv->spi_drv.msg_act =
- spi_rq_queue_first(&spi_tms570_drv->spi_drv);
- spi_isr_unlock(saveif);
-
- if (!msg) { /* Nothing to process */
- volatile unsigned int dummy_read;
- /* Disable TXEMPTY IRQ */
- spi_tms570_drv->spi->INT0 = 0x00;
- spi_tms570_drv->spi->FLG = 0x00;
- dummy_read = spi_tms570_drv->spi->BUF;
- // FIXME "INT |= " with disabled IRQ ??
- return;
- }
-
- spi_tms570_drv->txcnt = 0;
- spi_tms570_drv->rxcnt = 0;
- cs = spi_tms570_drv->spi_devs[msg->addr].cs;
- spi_tms570_drv->transfer_ctrl =
- (cs & 0xff) << 16
- | (spi_tms570_drv->spi_devs[msg->addr].wdel & 0x1) << 26
- | (spi_tms570_drv->spi_devs[msg->addr].cshold & 0x1) << 28
- | (spi_tms570_drv->spi_devs[msg->addr].dfsel & 0x3) << 24;
-
- /* GPIO CS -- setting the multiplexer */
- if (cs > 0xff) {
- switch (cs & 0xFF00) {
- case SPI_CS_DMM0:
- dmmREG->PC5 = (1 << DMM_DATA5); /* Set to L */
- dmmREG->PC5 = (1 << DMM_DATA6); /* Set to L */
- break;
- case SPI_CS_DMM1:
- dmmREG->PC4 = (1 << DMM_DATA5); /* Set to H */
- dmmREG->PC5 = (1 << DMM_DATA6); /* Set to L */
- break;
- case SPI_CS_DMM2:
- dmmREG->PC5 = (1 << DMM_DATA5); /* Set to L */
- dmmREG->PC4 = (1 << DMM_DATA6); /* Set to H */
- break;
- }
- }
- }
-
- rq_len = msg->rq_len;
- rxcnt = spi_tms570_drv->rxcnt;
- txcnt = spi_tms570_drv->txcnt;
- /* RX/TX transfers */
- do {
- /* Receive all the incoming data */
- while (spi_tms570_drv->spi->FLG & SPI_FLG_RXINT_m) {
- rx_data = spi_tms570_drv->spi->BUF;
-
- if (msg->rx_buf && (rxcnt < rq_len)) {
- msg->rx_buf[rxcnt++] = rx_data & 0xFF;
- //FIXME how to make sure we got only 8 bits
- } else {
- rxcnt++;
- }
- }
-
- /* Send some data */
- while (1) {
- /* Tx buffer full or nothing to send */
- stop_fl = ((txcnt >= rq_len) ||
- (!(spi_tms570_drv->spi->FLG & SPI_FLG_TXINT_m)));
-
- if (stop_fl)
- break;
- /* Make it possible to write "empty data"
- for "read transfers" */
- if (msg->tx_buf) {
- val_to_wr = msg->tx_buf[txcnt++];
- } else {
- val_to_wr = 0x00;
- txcnt++;
- }
-
- if (txcnt == rq_len) /* Disable CS for the last byte of the transfer */
- spi_tms570_drv->transfer_ctrl &= ~SPI_DAT1_CSHOLD_m;
-
- spi_tms570_drv->spi->DAT1 =
- (uint32_t) (spi_tms570_drv->transfer_ctrl | val_to_wr);
-
- /* We just received something */
- if (spi_tms570_drv->spi->FLG & SPI_FLG_RXINT_m)
- break;
- }
- } while (!stop_fl);
- spi_tms570_drv->rxcnt = rxcnt;
- spi_tms570_drv->txcnt = txcnt;
-
- if ((rxcnt >= rq_len) ||
- (!msg->rx_buf && (txcnt >= rq_len) &&
- !(spi_tms570_drv->spi->FLG & SPI_FLG_RXINT_m))) { // FIXME
-
- /* Sending of the message successfully finished */
- spi_isr_lock(saveif);
- spi_rq_queue_del_item(msg);
- msg->flags |= SPI_MSG_FINISHED;
- spi_tms570_drv->spi_drv.msg_act = NULL;
- spi_isr_unlock(saveif);
- if (msg->callback)
- msg->callback(&spi_tms570_drv->spi_drv,
- SPI_MSG_FINISHED, msg);
-
- continue;
- }
- if (txcnt < rq_len) {
- spi_tms570_drv->spi->INT0 = SPI_INT0_TXINTENA_m;
- } else {
- spi_tms570_drv->spi->INT0 = SPI_INT0_RXINTENA_m;
- }
-
- } while (1);
- }
-}
-
-spi_drv_t *spi_find_drv(char *name, int number)
-{
- if (number < 1 || number > (sizeof(spi_tms570_ifcs)/sizeof(spi_tms570_ifcs[0])))
- return NULL;
-
- return &spi_tms570_ifcs[number - 1].spi_drv;
-}
-
-#pragma INTERRUPT(spi2LowLevelInterrupt, IRQ)
-void spi2LowLevelInterrupt(void)
-{
- uint32_t flags = spi_compat_REG2->FLG;// & (~spiREG2->LVL & 0x035F);
- spi_tms570_isr(2 - 1, flags);
-}
-
-#pragma INTERRUPT(spi2HighLevelInterrupt, IRQ)
-void spi2HighLevelInterrupt(void)
-{
- uint32_t flags = spi_compat_REG2->FLG;// & (~spiREG2->LVL & 0x035F);
- spi_tms570_isr(2 - 1, flags);
-}
-
-#pragma INTERRUPT(spi4LowLevelInterrupt, IRQ)
-void spi4LowLevelInterrupt(void)
-{
- uint32_t flags = spi_compat_REG4->FLG;// & (~spiREG4->LVL & 0x035F);
- spi_tms570_isr(4 - 1, flags);
-}
-
-#pragma INTERRUPT(spi4HighLevelInterrupt, IRQ)
-void spi4HighLevelInterrupt(void)
-{
- uint32_t flags = spi_compat_REG4->FLG;// & (~spiREG4->LVL & 0x035F);
- spi_tms570_isr(4 - 1, flags);
-}
-
-#pragma INTERRUPT(mibspi1HighLevelInterrupt, IRQ)
-void mibspi1HighLevelInterrupt(void)
-{
- uint32_t flags = mibspi_compat_REG1->FLG;// & (~mibspiREG1->LVL & 0x035F);
- spi_tms570_isr(1 - 1, flags);
-}
-
-#pragma INTERRUPT(mibspi1LowLevelInterrupt, IRQ)
-void mibspi1LowLevelInterrupt(void)
-{
- uint32_t flags = mibspi_compat_REG1->FLG;// & (~mibspiREG1->LVL & 0x035F);
- spi_tms570_isr(1 - 1, flags);
-}
-
-#pragma INTERRUPT(mibspi3HighInterruptLevel, IRQ)
-void mibspi3HighInterruptLevel(void)
-{
- uint32_t flags = mibspi_compat_REG3->FLG;// & (~mibspiREG3->LVL & 0x035F);
- spi_tms570_isr(3 - 1, flags);
-}
-
-#pragma INTERRUPT(mibspi3LowLevelInterrupt, IRQ)
-void mibspi3LowLevelInterrupt(void)
-{
- uint32_t flags = mibspi_compat_REG3->FLG;// & (~mibspiREG3->LVL & 0x035F);
- spi_tms570_isr(3 - 1, flags);
-}
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : ain.c
- * Abstract:
- * Analog Input RPP API implementation file.
- *
- * References:
- * ain.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_AIN == 1
-
-#if rppCONFIG_DRV == 1
-#include "drv/drv.h"
-
-// RPP has 12 ADC channels
-// See s_adcSelect and s_adcFiFoSize in ti_drv_adc.c for hardware configuration.
-#define ADC_CHANNELS 12
-static adcData_t in_cache[ADC_CHANNELS];
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_ain_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- #if rppCONFIG_DRV == 1
- drv_adc_init();
- #endif
-
- return SUCCESS;
-}
-
-
-int16_t rpp_ain_get(uint8_t pin)
-{
- if((pin < 1) || (pin > 12)) {
- return -1;
- }
-
- int16_t result = 0;
-
- #if rppCONFIG_DRV == 1
- // This conversion uint16_t -> int16_t is safe because we know values
- // are 12bits. Here we are masking those 12bits just in case.
- result = (int16_t) (in_cache[pin - 1].value & 0xFFF);
- #endif
-
- return result;
-}
-
-
-int8_t rpp_ain_update()
-{
- #if rppCONFIG_DRV == 1
- // in_cache is thread safe because it's only write operation is mutexed
- drv_adc_read_ain((adcData_t*)&in_cache);
- #endif
-
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_AIN */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : aout.c
- * Abstract:
- * Analog Output RPP API implementation file.
- *
- * References:
- * aout.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_AOUT == 1
-
-#if rppCONFIG_DRV == 1
-#include "drv/dac.h"
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_aout_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // Configure board
- // FIXME find out why board has default output of ~3.8V
- //rpp_aout_setup(1, FALSE);
- //rpp_aout_setup(2, FALSE);
- //rpp_aout_setup(3, FALSE);
- //rpp_aout_setup(4, FALSE);
-
- return SUCCESS;
-}
-
-
-static boolean_t changed_st[4] = {
- FALSE, FALSE, FALSE, FALSE
- };
-static boolean_t enabled_cache[4] = {
- FALSE, FALSE, FALSE, FALSE
- };
-static uint16_t out_cache[4] = {
- 0, 0, 0, 0
- };
-
-int8_t rpp_aout_setup(uint8_t pin, boolean_t enabled)
-{
- // Check range
- if((pin < 1) || (pin > 4)) {
- return -1;
- }
-
- uint8_t index = pin - 1;
-
- // Mark state
- enabled_cache[index] = enabled;
-
- // Mark as changed
- changed_st[index] = TRUE;
-
- return SUCCESS;
-}
-
-
-// Value that tops the DAC output
-const static uint16_t dac_top =
- (uint16_t)(4095.0 * (12000.0 / 1000.0) / (RPP_DAC_OA * RPP_DAC_VREF));
-
-// Simple mapping function
-static int32_t map(int32_t x,
- int32_t in_min, int32_t in_max,
- int32_t out_min, int32_t out_max)
-{
- return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
-}
-
-int8_t rpp_aout_set(uint8_t pin, uint16_t val)
-{
- // Check pin range
- if((pin < 1) || (pin > 4)) {
- return -1;
- }
-
- // Map value
- val = map(val, 0, 4095, 0, dac_top);
-
- // Check value range
- if(val > 4095) {
- return -2;
- }
-
- uint8_t index = pin - 1;
-
- // Set value to output cache
- out_cache[index] = val;
-
- // Mark as changed
- changed_st[index] = TRUE;
-
- return SUCCESS;
-}
-
-
-int8_t rpp_aout_set_voltage(uint8_t pin, uint16_t mv)
-{
- // Check pin range
- if((pin < 1) || (pin > 4)) {
- return -1;
- }
-
- // Check millivolts range
- if(mv > 12000) {
- return -2;
- }
-
- // Calculate millivolts -> value
- int val = (int)(4095.0 * ((float)mv / 1000.0) / (RPP_DAC_OA*RPP_DAC_VREF));
- if(val > 4095) {
- val = 4095;
- }
-
- uint8_t index = pin - 1;
-
- // Set value to output cache
- out_cache[index] = val;
-
- // Mark as changed
- changed_st[index] = TRUE;
-
- return SUCCESS;
-}
-
-
-int8_t rpp_aout_update()
-{
- int i = 0;
- for(i = 0; i < 4; i++) {
-
- // If changed commit changes to hardware
- if(changed_st[i]) {
-
- #if rppCONFIG_DRV == 1
- // TODO: Confirm via returned SPI code that transfer was successfull
- drv_dac_spi_transfer(i, enabled_cache[i], out_cache[i]);
- #else
- UNUSED(enabled_cache);
- UNUSED(out_cache);
- #endif
-
- changed_st[i] = FALSE;
- }
- }
-
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_AOUT */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : can.c
- * Abstract:
- * CAN Bus Communication RPP API implementation file.
- *
- * References:
- * can.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_CAN == 1
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_can_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_CAN */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : din.c
- * Abstract:
- * Digital Input RPP API implementation file.
- *
- * References:
- * din.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_DIN == 1
-
-#if rppCONFIG_DRV == 1
-#include "drv/din.h"
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_din_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- return SUCCESS;
-}
-
-int8_t rpp_din_ref(uint16_t ref_a, uint16_t ref_b)
-{
- if((ref_a > 4095) || (ref_b > 4095)) {
- return -1;
- }
-
- #if rppCONFIG_DRV == 1
- drv_din_ref(ref_a, ref_b);
- #endif
- return SUCCESS;
-}
-
-
-// Check for configuration changes to avoid SPI overhead
-static boolean_t config_changed = FALSE;
-
-// All cached values are 16 bits in the form [SG7,...,SG0][SP7,...,SP0]
-static uint16_t pull_cache = 0x0;
-static uint16_t active_cache = 0x0;
-static uint16_t can_wake_cache = 0x0;
-
-int8_t rpp_din_setup(uint8_t pin, boolean_t pull_type,
- boolean_t active, boolean_t can_wake)
-{
- // Check range
- if(pin > 15) {
- return -1;
- }
-
- // Check programmable feature
- if(pull_type && (pin > 7)) {
- return -2;
- }
-
- // Set bits
- uint8_t index = pin;
- if(pull_type) {
- bit_set(pull_cache, index);
- } else {
- bit_clear(pull_cache, index);
- }
-
- if(active) {
- bit_set(active_cache, index);
- } else {
- bit_clear(active_cache, index);
- }
-
- if(can_wake) {
- bit_set(can_wake_cache, index);
- } else {
- bit_clear(can_wake_cache, index);
- }
-
- config_changed = TRUE;
- return SUCCESS;
-}
-
-
-static uint16_t in_cache = 0x0;
-
-int8_t rpp_din_get(uint8_t pin, boolean_t var_thr)
-{
- // Check range
- if(pin > 15) {
- return -1;
- }
-
- // Check feature
- if(var_thr && (pin < 8)) {
- return -2;
- }
-
- // Use of variable threshold was requested
- if(var_thr) {
- #if rppCONFIG_DRV == 1
- if(drv_din_get_varthr(pin) == 1) {
- return HIGH;
- }
- #endif
- return LOW;
- }
-
- if(is_bit_set(in_cache, pin)) {
- return HIGH;
- }
- return LOW;
-}
-
-
-static uint16_t diag_cache = 0x0;
-
-int8_t rpp_din_diag(uint8_t pin)
-{
- // Check range
- if(pin > 15) {
- return -1;
- }
-
- if(is_bit_set(diag_cache, pin)) {
- return HIGH;
- }
- return LOW;
-}
-
-
-int8_t rpp_din_update()
-{
- #if rppCONFIG_DRV == 1
- /// Setup pins
- if(config_changed) {
- uint16_t sp = 0x0;
- uint16_t sg = 0x0;
-
- // Reset chip
- din_reset();
- din_spi_transfer();
- //rpp_sci_printf("din_reset()\r\n");
-
- // Set pull-type.
- // In DRV logic is inverted:
- // DRV: 1 - set pin as switch-to-battery. RPP: 0 - pull-down.
- // DRV: 0 - set pin as switch-to-ground. RPP: 1 - pull-up.
- sp = (~pull_cache) & 0xFF;
- din_set_pr((uint8_t)sp);
- din_spi_transfer();
- //rpp_sci_printf("din_set_pr(%X)\r\n", sp);
-
- // Set state type, active or tri-stated.
- // In DRV logic is inverted:
- // DRV: 1 - tri-state. RPP: 0 - tri-state.
- // DRV: 0 - active. RPP: 1 - active.
- sp = ((~active_cache) ) & 0xFF;
- sg = ((~active_cache) >> 8) & 0xFF;
- din_set_stat(sp, sg);
- din_spi_transfer();
- //rpp_sci_printf("din_set_stat(%X, %X)\r\n", sp, sg);
-
- // Set wake / interrupt.
- // IN DRV logic is not inverted.
- // DRV: 1 - can wake. RPP: 1 - can wake.
- // DRV: 0 - interrupt disabled. RPP: 0 - interrupt disabled.
- sp = (can_wake_cache ) & 0xFF;
- sg = (can_wake_cache >> 8) & 0xFF;
- din_set_int(sp, sg);
- din_spi_transfer();
- //rpp_sci_printf("din_set_int(%X, %X)\r\n", sp, sg);
-
- // Mark configuration as commited
- config_changed = FALSE;
- }
-
- // Update cached values
- din_switch_st();
- din_spi_transfer();
- in_cache = din_get_val_word();
-
- // FIXME: Implement. Dummy assign for now.
- diag_cache = in_cache;
-
- if(diag_cache != in_cache) {
- return FAILURE;
- }
- #else
- UNUSED(config_changed);
- #endif
-
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_DIN */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : eth.c
- * Abstract:
- * Ethernet Communication RPP API implementation file.
- *
- * References:
- * eth.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_ETH == 1
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_eth_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_ETH */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : fr.c
- * Abstract:
- * FlexRay Communication RPP API implementation file.
- *
- * References:
- * fr.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_FR == 1
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_fr_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_FR */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : hbr.c
- * Abstract:
- * H-Bridge Output RPP API implementation file.
- *
- * References:
- * hbr.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_HBR == 1
-
-#if rppCONFIG_DRV == 1
-#include "drv/hbridge.h"
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_hbr_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- return SUCCESS;
-}
-
-
-// Private function to set the H-Bridge to default OFF settings
-static void rpp_hdr_reset()
-{
- #if rppCONFIG_DRV == 1
- drv_hbr_set_en(LOW);
- drv_hbr_pwm_set_duty(0);
- drv_hbr_pwm_stop();
- drv_hbr_set_dir(LOW);
- #endif
-}
-
-
-static boolean_t enabled = FALSE;
-
-int8_t rpp_hbr_enable(int32_t period)
-{
- if(enabled) {
- return FAILURE;
- }
-
- if(period < 1) {
- period = 55; // ~18kHz (18181.818181818 Hz to be precise)
- }
-
- #if rppCONFIG_DRV == 1
- // Configure H-Bridge
- drv_hbr_pwm_set_signal(period, 0);
- rpp_hdr_reset();
- // Start watchdog
- if(drv_hbr_wdg_start() != SUCCESS) {
- return FAILURE;
- }
- #endif
-
- enabled = TRUE;
-
- return SUCCESS;
-}
-
-
-int8_t rpp_hbr_control(double cmd)
-{
- if(!enabled) {
- return -1;
- }
-
- // Check range of the command
- if((cmd < -1.0) || (cmd > 1.0)) {
- return -2;
- }
-
- #if rppCONFIG_DRV == 1
- // Great, now scale and return to sanity world of ints :D
- int32_t scaled = (int32_t)(cmd * 100.0);
-
- // Shutdown if required
- if(scaled == 0) {
- rpp_hdr_reset();
- return SUCCESS;
- }
-
- /// Enabled, configure
- // Set direction
- drv_hbr_set_dir(scaled > 0);
-
- // Set PWM duty cycle
- drv_hbr_pwm_set_duty(abs(scaled));
- drv_hbr_pwm_start();
-
- // Enable H-Bridge
- drv_hbr_set_en(HIGH);
- #endif
-
- return SUCCESS;
-}
-
-
-int8_t rpp_hbr_disable()
-{
- if(!enabled) {
- return FAILURE;
- }
-
- #if rppCONFIG_DRV == 1
- // We ignore is watchdog could not be stopped, because is harmless.
- // It would be worse if we just could not stop the H-Bridge just because
- // the watchdog could not be stopped.
- drv_hbr_wdg_stop();
- #endif
-
- rpp_hdr_reset();
- enabled = FALSE;
-
- return SUCCESS;
-}
-
-
-
-#endif /* rppCONFIG_INCLUDE_HBR */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : hout.c
- * Abstract:
- * High-Power Output (12V, 10A, PWM) RPP API implementation file.
- *
- * References:
- * hout.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_HOUT == 1
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_hout_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_HOUT */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : lin.c
- * Abstract:
- * LIN Communication RPP API implementation file.
- *
- * References:
- * lin.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_LIN == 1
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_lin_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_LIN */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : lout.c
- * Abstract:
- * Logic Output RPP API implementation file.
- *
- * References:
- * lout.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_LOUT == 1
-
-#if rppCONFIG_DRV == 1
-#include "drv/lout.h"
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_lout_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-static uint8_t out_cache = 0x0;
-
-int8_t rpp_lout_set(uint8_t pin, uint8_t val)
-{
- if((pin < 1) || (pin > 8)) {
- return -1;
- }
-
- uint8_t index = pin - 1;
- if(val) {
- bit_set(out_cache, index);
- } else {
- bit_clear(out_cache, index);
- }
- return SUCCESS;
-}
-
-
-static uint8_t diag_cache = 0x0;
-
-int8_t rpp_lout_diag(uint8_t pin)
-{
- if((pin < 1) || (pin > 8)) {
- return -1;
- }
-
- if(is_bit_set(diag_cache, pin - 1)) {
- return HIGH;
- }
- return LOW;
-}
-
-
-int8_t rpp_lout_update()
-{
- #if rppCONFIG_DRV == 1
- // Update output values
- lout_set_word(out_cache);
- // FIXME: Check which SPI transfer statuses could be considered errors
- lout_spi_transfer();
-
- // Read back diagnostic values
- // FIXME: Implement. Dummy assign for now.
- diag_cache = out_cache;
-
- if(diag_cache != out_cache) {
- return FAILURE;
- }
- #endif
-
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_LOUT */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : mout.c
- * Abstract:
- * Power Output (12V, 2A, Push/Pull) RPP API implementation file.
- *
- * References:
- * mout.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_MOUT == 1
-
-#if rppCONFIG_DRV == 1
-#include "drv/mout.h"
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_mout_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- return SUCCESS;
-}
-
-
-static uint8_t cache[] = {
- LOW, LOW, LOW, LOW, LOW, LOW
-};
-
-int8_t rpp_mout_set(uint8_t pin, uint8_t val)
-{
- // Check range
- if((pin < 1) || (pin > 6)) {
- return -1;
- }
-
- // Check val
- if((val != HIGH) && (val != LOW)) {
- return -2;
- }
-
- uint8_t idx = pin - 1;
-
- #if rppCONFIG_DRV == 1
- // Set and store value
- if(drv_mout_set(idx, val) != SUCCESS) {
- return -3;
- }
- cache[idx] = val;
-
- // FIXME Wait some time for synchronization
- // Don't use vTaskDelay() here because the minimum time to wait is one tick,
- // and depending of the configuration of the user model one tick can overrun
- // the program.
- int wait;
- for(wait = 0; wait < 10; wait++) {
- asm(" nop");
- }
-
- // Get value back and compare
- if(drv_mout_diag(idx) == FAILURE) {
- return -4;
- }
- #else
- cache[idx] = val;
- #endif
-
- return SUCCESS;
-}
-
-
-int8_t rpp_mout_get(uint8_t pin)
-{
- // Check range
- if((pin < 1) || (pin > 6)) {
- return -1;
- }
-
- return cache[pin - 1];
-}
-
-
-int8_t rpp_mout_diag(uint8_t pin)
-{
- // Check range
- if((pin < 1) || (pin > 6)) {
- return -1;
- }
-
- #if rppCONFIG_DRV == 1
- if(drv_mout_diag(pin - 1) == 0) {
- return FAILURE;
- }
- #endif
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_MOUT */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : rpp.c
- * Abstract:
- * RPP API library implementation file.
- *
- * References:
- * rpp.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_DRV == 1
-#include "drv/drv.h"
-#endif
-
-boolean_t initialized = FALSE;
-
-int8_t rpp_init() {
-
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME This is horrible
- #if rppCONFIG_DRV == 1
- dmmInit();
- gioInit();
- hetInit();
- canInit();
- linInit();
- spi_tms570_init();
- #endif
-
- #if rppCONFIG_INCLUDE_DIN == 1
- rpp_din_init();
- #endif
-
- #if rppCONFIG_INCLUDE_LOUT == 1
- rpp_lout_init();
- #endif
-
- #if rppCONFIG_INCLUDE_AIN == 1
- rpp_ain_init();
- #endif
-
- #if rppCONFIG_INCLUDE_AOUT == 1
- rpp_aout_init();
- #endif
-
- #if rppCONFIG_INCLUDE_HBR == 1
- rpp_hbr_init();
- #endif
-
- #if rppCONFIG_INCLUDE_MOUT == 1
- rpp_mout_init();
- #endif
-
- #if rppCONFIG_INCLUDE_HOUT == 1
- rpp_hout_init();
- #endif
-
- #if rppCONFIG_INCLUDE_CAN == 1
- rpp_can_init();
- #endif
-
- #if rppCONFIG_INCLUDE_LIN == 1
- rpp_lin_init();
- #endif
-
- #if rppCONFIG_INCLUDE_FR == 1
- rpp_fr_init();
- #endif
-
- #if rppCONFIG_INCLUDE_SCI == 1
- rpp_sci_init();
- #endif
-
- #if rppCONFIG_INCLUDE_ETH == 1
- rpp_eth_init();
- #endif
-
- #if rppCONFIG_INCLUDE_SDC == 1
- rpp_sdc_init();
- #endif
-
- #if rppCONFIG_INCLUDE_SDR == 1
- rpp_sdr_init();
- #endif
-
- #if rppCONFIG_DRV == 1
- _enable_IRQ();
- #endif
-
- return SUCCESS;
-}
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : sci.c
- * Abstract:
- * Serial Communication Interface RPP API implementation file.
- *
- * References:
- * sci.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_SCI == 1
-#include <stdio.h> // vsnprintf()
-#include <stdarg.h> // va_start, va_end
-
-#if rppCONFIG_DRV == 1
-#include "drv/drv.h"
-#endif
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_sci_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- #if rppCONFIG_DRV == 1
- drv_sci_init();
- #elif defined(FREERTOS_POSIX)
- rpp_sci_posix_init();
- #endif
-
- return SUCCESS;
-}
-
-
-boolean_t rpp_sci_setup(uint32_t baud)
-{
- boolean_t known = FALSE;
-
- if(baud == 0) {
- baud = 9600;
- }
-
- // FIXME This is a standard list of baud rates. This should include only
- // tested baud rates.
- switch(baud) {
- case 110:
- known = TRUE;
- break;
- case 300:
- known = TRUE;
- break;
- case 600:
- known = TRUE;
- break;
- case 1200:
- known = TRUE;
- break;
- case 2400:
- known = TRUE;
- break;
- case 4800:
- known = TRUE;
- break;
- case 9600:
- known = TRUE;
- break;
- case 14400:
- known = TRUE;
- break;
- case 19200:
- known = TRUE;
- break;
- case 28800:
- known = TRUE;
- break;
- case 38400:
- known = TRUE;
- break;
- case 56000:
- known = TRUE;
- break;
- case 57600:
- known = TRUE;
- break;
- case 115200:
- known = TRUE;
- break;
- }
-
- #if rppCONFIG_DRV == 1
- drv_sci_set_baudrate(baud);
- #endif
-
- return known;
-}
-
-
-#ifndef FREERTOS_POSIX
-uint16_t rpp_sci_available()
-{
- uint16_t available = 0;
-
- #if rppCONFIG_DRV == 1
- available = drv_sci_available();
- #endif
-
- return available;
-}
-
-
-int8_t rpp_sci_read(uint32_t amount, uint8_t* buffer)
-{
- #if rppCONFIG_DRV == 1
- drv_sci_receive(amount, buffer, portMAX_DELAY);
- #endif
-
- return SUCCESS;
-}
-
-
-int8_t rpp_sci_read_nb(uint32_t amount, uint8_t* buffer)
-{
- #if rppCONFIG_DRV == 1
- if(drv_sci_receive(amount, buffer, 0) != SUCCESS) {
- return FAILURE;
- }
- #endif
-
- return SUCCESS;
-}
-
-
-int8_t rpp_sci_write(uint32_t amount, uint8_t* data)
-{
- #if rppCONFIG_DRV == 1
- drv_sci_send(amount, data, portMAX_DELAY);
- #endif
-
- return SUCCESS;
-}
-
-
-int8_t rpp_sci_write_nb(uint32_t amount, uint8_t* data)
-{
- #if rppCONFIG_DRV == 1
- if(drv_sci_send(amount, data, 0) != SUCCESS) {
- return FAILURE;
- }
- #endif
-
- return SUCCESS;
-}
-
-
-int8_t rpp_sci_flush(boolean_t buff)
-{
- #if rppCONFIG_DRV == 1
- return drv_sci_flush(buff);
- #else
- return SUCCESS;
- #endif
-}
-
-
-int32_t rpp_sci_printf(const char* format, ...)
-{
- char str[MAX_BUFFER_LEN];
- int length = -1;
-
- va_list argList;
- va_start(argList, format);
-
- length = vsnprintf(str, sizeof(str), format, argList);
-
- va_end(argList);
-
- if(length > 0) {
- #if rppCONFIG_DRV == 1
- // According to the C stdlib about vsnprintf:
- // If the resulting string would be longer than n-1 characters, the
- // remaining characters are discarded and not stored, but counted
- // for the value returned by the function.
- // In consequence we need to trim the value if larger than buffer.
- if(length > sizeof(str)) {
- length = sizeof(str);
- }
- if(drv_sci_send(
- (uint32_t)length,
- (uint8_t*)str,
- portMAX_DELAY) != SUCCESS) {
- return -1;
- }
- #endif
- }
-
- return length;
-}
-
-
-int8_t rpp_sci_putc(uint8_t byte)
-{
- #if rppCONFIG_DRV == 1
- drv_sci_send(1, &byte, portMAX_DELAY);
- #endif
-
- return SUCCESS;
-}
-
-
-int16_t rpp_sci_getc()
-{
- uint8_t result = 0;
-
- #if rppCONFIG_DRV == 1
- if(drv_sci_receive(1, &result, portMAX_DELAY) == FAILURE) {
- return FAILURE;
- }
- #endif
-
- return (int16_t)result;
-}
-#endif /* !FREERTOS_POSIX */
-
-#endif /* rppCONFIG_INCLUDE_SCI */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : sdc.c
- * Abstract:
- * SD Card logging RPP API implementation file.
- *
- * References:
- * sdc.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_SDC == 1
-
-static boolean_t initialized = FALSE;
-
-int8_t rpp_sdc_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // FIXME: Implement.
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_SDC */
-
+++ /dev/null
-/* Copyright (C) 2013 Czech Technical University in Prague
- *
- * Authors:
- * - Carlos Jenkins <carlos@jenkins.co.cr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- *
- * File : sdr.c
- * Abstract:
- * SD-RAN logging RPP API implementation file.
- *
- * References:
- * sdr.h
- * RPP API documentation.
- */
-
-
-#include "rpp/rpp.h"
-
-#if rppCONFIG_INCLUDE_SDR == 1
-#include <stdio.h> // vsnprintf()
-#include <ctype.h> // isprint()
-#include <string.h> // strncmp()
-#include <stdarg.h> // va_start, va_end
-
-#if rppCONFIG_DRV == 1
-#include "drv/drv.h"
-#endif
-
-#ifndef FREERTOS_POSIX
-#define echo(x) rpp_sci_putc(x)
-#else
-#define echo(x) (void)(x)
-#endif
-
-static const char* prompt = "--> ";
-static const char* newline = "\r\n";
-
-// extern this semaphore to wait for cmdproc to exit
-xSemaphoreHandle rpp_sdr_cmdproc_semaphore;
-
-
-/// Memory management variables ------------------------------------------------
-static xSemaphoreHandle memory_mutex;
-static uint32_t memory_size = 0;
-static uint8_t* memory_start = NULL;
-static uint8_t* memory_end = NULL;
-static uint8_t* memory_current = NULL;
-
-
-
-/// Tasks control --------------------------------------------------------------
-// Task handle for command processor task
-static xTaskHandle cmdproc_handle;
-
-// Task handle for log show task
-static xTaskHandle show_handle;
-
-// Flag the request the tasks to stop
-static boolean_t stop_tasks = FALSE;
-
-// Number of tasks running
-static uint8_t tasks_running = 0;
-
-// Force context change to other tasks until all
-// the tasks created by this module are deleted.
-static void wait_tasks_to_finish()
-{
- stop_tasks = TRUE;
- while(tasks_running > 0) {
- taskYIELD();
- }
- stop_tasks = FALSE;
-}
-
-
-
-/// Show log task --------------------------------------------------------------
-// Semaphore to order the show task to start flushing the log
-static xSemaphoreHandle show_semaphore;
-
-// Flag to check if log show task is flushing the log
-static boolean_t show_flushing = FALSE;
-
-// Show log task
-void rpp_sdr_showtask(void *p)
-{
- uint8_t* current;
- uint8_t byte;
-
- while(!stop_tasks) {
-
- // Wait semaphore to start
- if(xSemaphoreTake(show_semaphore, 1) != pdTRUE) {
- // This will wake up each tick to check if
- // deletion of this task was requested.
- continue;
- }
- current = memory_start;
-
- // Iterate until the end of the log
- while(show_flushing &&
- (current != memory_current) &&
- (current < memory_end)) { // Just in case
-
- // Print characters in this memory location.
- // Ignores non-printable characters except \r and \n
- byte = *current;
- if((byte == '\r') || (byte == '\n') || isprint(byte)) {
- rpp_sci_putc(byte);
- }
- current++;
- }
-
- // If user waited to finish
- if(show_flushing) {
- rpp_sci_printf((const char*)"%s", newline);
- rpp_sci_printf((const char*)"%s", prompt);
- show_flushing = FALSE;
- }
- }
-
- // Delete myself
- tasks_running--;
- vTaskDelete(NULL);
-}
-
-
-
-/// Command processor task -----------------------------------------------------
-#define BUF_SIZE 80
-
-// Buffer to store incomming command
-static char in_buffer[BUF_SIZE];
-
-// SCI log command processor task
-void rpp_sdr_cmdproc(void *p)
-{
- rpp_sci_printf((const char*)
- "Log control: %dkB available.\r\n",
- (rpp_sdr_available() / 1024)
- );
- rpp_sci_printf((const char*)
- "===========================================================\r\n"
- );
- rpp_sci_printf((const char*)"%s", prompt);
-
- uint8_t input = 0;
- uint8_t buff_index = 0;
- boolean_t flush = FALSE;
- while(!stop_tasks) {
-
- // Get one character from the user
- if(rpp_sci_read_nb(1, &input) != SUCCESS) {
- if(!stop_tasks) {
- vTaskDelay(50 / portTICK_RATE_MS);
- }
- continue;
- }
-
- // Stop flushing if one character is received
- if(show_flushing) {
- rpp_sdr_show(FALSE);
- vTaskDelay(100 / portTICK_RATE_MS);
- rpp_sci_printf("%s", newline);
- rpp_sci_printf("%s", prompt);
- continue;
- }
-
- // Backspace and Delete
- if(input == 8 || input == 127) {
- if(buff_index > 0) {
- buff_index--;
- echo('\b');
- echo(' ' );
- echo('\b');
- }
-
- // Line feed or Carriage return
- } else if(input == 10 || input == 13) {
- flush = TRUE;
- echo('\r');
- echo('\n');
-
- // If is any printable character
- } else if(isprint(input)) {
-
- // Store character and increment buffer index
- in_buffer[buff_index] = input;
- buff_index++;
- echo(input);
-
- // Check if buffer is full and force flush
- if(buff_index == BUF_SIZE - 1) {
- flush = TRUE;
- }
- }
- // All other character are ignored
-
- // Flush buffer
- if(flush) {
-
- // Terminate string
- in_buffer[buff_index] = '\0';
-
-
- // Re-prompt
- if(buff_index == 0) {
- rpp_sci_printf((const char*)"%s", newline);
- rpp_sci_printf((const char*)"%s", prompt);
-
- // Help command
- } else if(strncmp(in_buffer, "help", BUF_SIZE) == 0) {
-
- rpp_sci_printf((const char*)
- "Available commands:\r\n"
- );
- rpp_sci_printf((const char*)
- "\tlog - Show the log.\r\n"
- );
- rpp_sci_printf((const char*)
- "\tclear - Clear the log.\r\n"
- );
- rpp_sci_printf((const char*)
- "\tavailable - Display amount of memory left.\r\n"
- );
- rpp_sci_printf((const char*)
- "\texit - Exit this command processor.\r\n"
- );
-
- rpp_sci_printf((const char*)"%s", newline);
- rpp_sci_printf((const char*)"%s", prompt);
-
- // Log command
- } else if(strncmp(in_buffer, "log", BUF_SIZE) == 0) {
- rpp_sdr_show(TRUE);
-
- // Clear command
- } else if(strncmp(in_buffer, "clear", BUF_SIZE) == 0) {
- rpp_sdr_clear();
- rpp_sci_printf((const char*)"Done.\r\n");
- rpp_sci_printf((const char*)"%s", newline);
- rpp_sci_printf((const char*)"%s", prompt);
-
- // Available command
- } else if(strncmp(in_buffer, "available", BUF_SIZE) == 0) {
- rpp_sci_printf(
- (const char*)"%d kB of %d kB available.\r\n",
- rpp_sdr_available() / 1024,
- memory_size / 1024
- );
- rpp_sci_printf((const char*)"%s", newline);
- rpp_sci_printf((const char*)"%s", prompt);
-
- // Exit command
- } else if(strncmp(in_buffer, "exit", BUF_SIZE) == 0) {
- xSemaphoreGive(rpp_sdr_cmdproc_semaphore);
- tasks_running--;
- vTaskDelete(NULL);
-
- // Unknown command, print buffer back
- } else {
- rpp_sci_printf(
- (const char*)"ERROR: Unknown command \"%s\"\r\n",
- (char*)&in_buffer);
- rpp_sci_printf((const char*)"%s", prompt);
- }
-
- // Reset variables
- rpp_sci_flush(TRUE);
- buff_index = 0;
- flush = FALSE;
- }
- }
-
- // Delete myself
- tasks_running--;
- vTaskDelete(NULL);
-}
-
-
-
-/// Public API -----------------------------------------------------------------
-// Flag to check if SDR module is initialized
-static boolean_t initialized = FALSE;
-
-// Memory for Simulation only
-#if (rppCONFIG_DRV == 0) && defined(FREERTOS_POSIX)
-static uint8_t memory_simulation[1024*1024]; // Allocate 1MB for test
-#endif
-
-// Initialize SDR module
-int8_t rpp_sdr_init()
-{
- if(initialized) {
- return FAILURE;
- }
- initialized = TRUE;
-
- // Create memory write mutex
- memory_mutex = xSemaphoreCreateMutex();
-
- // Create log show semaphore
- vSemaphoreCreateBinary(show_semaphore);
- xSemaphoreTake(show_semaphore, 0);
-
- // Create semaphore for outer applications to wait cmdproc to exit.
- // Non static! The symbol should be exported, so use the full prefix.
- vSemaphoreCreateBinary(rpp_sdr_cmdproc_semaphore);
- xSemaphoreTake(rpp_sdr_cmdproc_semaphore, 0);
-
- // Define memory bounds
- #if rppCONFIG_DRV == 1
- memory_size = RPP_SDR_ADDR_END - RPP_SDR_ADDR_START + 1;
- memory_start = (uint8_t*)RPP_SDR_ADDR_START;
- memory_end = (uint8_t*)RPP_SDR_ADDR_END;
- #elif defined(FREERTOS_POSIX)
- memory_size = sizeof(memory_simulation);
- memory_start = (uint8_t*)&memory_simulation;
- memory_end = (uint8_t*)(memory_start + memory_size - 1);
- #endif
- memory_current = memory_start;
-
- // Low level init
- #if rppCONFIG_DRV == 1
- emif_SDRAMInit();
- #endif
-
- return SUCCESS;
-}
-
-
-// General flag to check if logging is enabled
-static boolean_t log_enabled = FALSE;
-
-// Enable/Disable logging
-int8_t rpp_sdr_setup(boolean_t enable)
-{
- // Just in case user ignore everything
- if(!initialized) {
- return FAILURE;
- }
-
- // No change, ignore
- if(log_enabled == enable) {
- return FAILURE;
- }
-
- // Shut down is requested
- if(log_enabled && !enable) {
- // Stop show task if running
- rpp_sdr_show(FALSE);
- // Delete tasks
- wait_tasks_to_finish();
- // Disable logging
- log_enabled = FALSE;
-
- // Startup is requested
- } else {
- if(xTaskCreate(rpp_sdr_showtask,
- (const signed char*)"rpp_sdr_showtask",
- 256, NULL, 2, &show_handle) != pdPASS) {
- return FAILURE;
- }
- tasks_running++;
-
- if(xTaskCreate(rpp_sdr_cmdproc ,
- (const signed char*)"rpp_sdr_cmdproc" ,
- 512, NULL, 2, &cmdproc_handle) != pdPASS) {
- wait_tasks_to_finish();
- return FAILURE;
- }
- tasks_running++;
-
- log_enabled = TRUE;
- }
-
- return SUCCESS;
-}
-
-
-// Memory available
-uint32_t rpp_sdr_available()
-{
- return (uint32_t)(memory_end - memory_current + 1);
-}
-
-
-// Store something to the log, if logging is enabled
-int32_t rpp_sdr_printf(const char* format, ...)
-{
- if(!log_enabled) {
- return FAILURE;
- }
-
- // Don't even try if memory is full
- if(memory_current == memory_end) {
- return FAILURE;
- }
-
- /// Format user string
- char str[MAX_BUFFER_LEN];
- int length = -1;
-
- va_list argList;
- va_start(argList, format);
-
- length = vsnprintf(str, sizeof(str), format, argList);
-
- va_end(argList);
-
- if(length < 1) {
- return length;
- }
-
-
- /// Format header
- // uint32_t max value is 4294967295 (10 digits) + [] + ' ' + '\0' = 14
- char hdr[14];
- int hdr_length = -1;
- hdr_length = sprintf(hdr, (const char*)"[%10d] ", xTaskGetTickCount());
-
- if(hdr_length < 1) {
- return hdr_length;
- }
-
-
- /// Write header
- uint32_t cnt = 0;
- int i = 0;
- xSemaphoreTake(memory_mutex, portMAX_DELAY);
- while((memory_current != memory_end) && (i < hdr_length)) {
-
- *memory_current = hdr[i];
-
- memory_current++;
- cnt++;
- i++;
- }
-
-
- /// Write user string
- i = 0;
- if(length > sizeof(str)) {
- length = sizeof(str);
- }
- while((memory_current != memory_end) && (i < length)) {
-
- *memory_current = str[i];
-
- memory_current++;
- cnt++;
- i++;
- }
-
- /// Write trailer
- static const char trl[2] = {'\r', '\n'};
- i = 0;
- while((memory_current != memory_end) && (i < sizeof(trl))) {
-
- *memory_current = trl[i];
-
- memory_current++;
- cnt++;
- i++;
- }
-
- xSemaphoreGive(memory_mutex);
- return cnt;
-}
-
-
-// Clears log. Will also stop the show task
-int8_t rpp_sdr_clear()
-{
- if(!log_enabled) {
- return FAILURE;
- }
-
- // Stop log show flushing if running
- if(show_flushing) {
- rpp_sdr_show(FALSE);
- }
-
- // Check if log is already empty
- if(memory_current == memory_start) {
- return FAILURE;
- }
-
- // Reset memory pointer
- memory_current = memory_start;
-
- return SUCCESS;
-}
-
-
-// Starts/Stops the task that sends the log to the SCI
-int8_t rpp_sdr_show(boolean_t start)
-{
- if(!log_enabled) {
- return FAILURE;
- }
-
- // No change, ignore
- if(start == show_flushing) {
- return FAILURE;
- }
-
- // Log flush stop requested
- if(show_flushing && !start) {
- show_flushing = FALSE;
-
- // Log flush start requested
- } else {
- show_flushing = TRUE;
- xSemaphoreGive(show_semaphore);
- }
-
- return SUCCESS;
-}
-
-
-#endif /* rppCONFIG_INCLUDE_SDR */
-
+++ /dev/null
-;-------------------------------------------------------------------------------
-; dabort.asm
-;
-; (c) Texas Instruments 2009-2010, All rights reserved.
-;
-
- .text
- .arm
-
-
-;-------------------------------------------------------------------------------
-; Run Memory Test
-
- .ref custom_dabort
- .def _dabort
- .asmfunc
-
-_dabort
- stmfd r13!, {r0 - r12, lr}; push registers and link register on to stack
-
- ldr r12, esmsr3 ; ESM Group3 status register
- ldr r0, [r12]
- tst r0, #0x8 ; check if bit 3 is set, this indicates uncorrectable ECC error on B0TCM
- bne ramErrorFound
- tst r0, #0x20 ; check if bit 5 is set, this indicates uncorrectable ECC error on B1TCM
- bne ramErrorFound
-
-noRAMerror
- tst r0, #0x80 ; check if bit 7 is set, this indicates uncorrectable ECC error on ATCM
- bne flashErrorFound
-
- bl custom_dabort ; custom data abort handler required
- ; If this custom handler is written in assembly, all registers used in the routine
- ; and the link register must be saved on to the stack upon entry, and restored before
- ; return from the routine.
-
- ldmfd r13!, {r0 - r12, lr}; pop registers and link register from stack
- subs pc, lr, #8 ; restore state of CPU when abort occurred, and branch back to instruction that was aborted
-
-ramErrorFound
- ldr r1, ramctrl ; RAM control register for B0TCM TCRAMW
- ldr r2, [r1]
- tst r2, #0x100 ; check if bit 8 is set in RAMCTRL, this indicates ECC memory write is enabled
- beq ramErrorReal
- mov r2, #0x20
- str r2, [r1, #0x10] ; clear RAM error status register
- ldr r1, ram2ctrl
- str r2, [r1, #0x10] ; clear RAM error status register
-
- mov r2, #0x28
- str r2, [r12] ; clear ESM group3 flags for uncorrectable RAM ECC errors
- mov r2, #5
- str r2, [r12, #0x18] ; The nERROR pin will become inactive once the LTC counter expires
-
- ldmfd r13!, {r0 - r12, lr}
- subs pc, lr, #4 ; branch to instruction after the one that caused the abort
- ; this is the case because the data abort was caused intentionally
- ; and we do not want to cause the same data abort again.
-
-ramErrorReal
- b ramErrorReal ; branch here forever as continuing operation is not recommended
-
-flashErrorFound
- ldr r1, flashbase
- ldr r2, [r1, #0x6C] ; read FDIAGCTRL register
-
- mov r2, r2, lsr #16
- tst r2, #5 ; check if bits 19:16 are 5, this indicates diagnostic mode is enabled
- beq flashErrorReal
- mov r2, #1
- mov r2, r2, lsl #8
-
- str r2, [r1, #0x1C] ; clear FEDACSTATUS error flag
-
- mov r2, #0x80
- str r2, [r12] ; clear ESM group3 flag for uncorrectable flash ECC error
- mov r2, #5
- str r2, [r12, #0x18] ; The nERROR pin will become inactive once the LTC counter expires
-
- ldmfd r13!, {r0 - r12, lr}
- subs pc, lr, #4 ; branch to instruction after the one that caused the abort
- ; this is the case because the data abort was caused intentionally
- ; and we do not want to cause the same data abort again.
-
-
-flashErrorReal
- b flashErrorReal ; branch here forever as continuing operation is not recommended
-
-esmsr3 .word 0xFFFFF520
-ramctrl .word 0xFFFFF800
-ram2ctrl .word 0xFFFFF900
-ram1errstat .word 0xFFFFF810
-ram2errstat .word 0xFFFFF910
-flashbase .word 0xFFF87000
-
- .endasmfunc
-
-
+++ /dev/null
-;-------------------------------------------------------------------------------
-; sys_core.asm
-;
-; (c) Texas Instruments 2009-2012, All rights reserved.
-;
-
- .text
- .arm
-
-;-------------------------------------------------------------------------------
-; Initialize CPU Registers
-
- .def _coreInitRegisters_
- .asmfunc
-
-
-_coreInitRegisters_
-
-
- ; After reset, the CPU is in the Supervisor mode (M = 10011)
- mov r0, lr
- mov r1, #0x0000
- mov r2, #0x0000
- mov r3, #0x0000
- mov r4, #0x0000
- mov r5, #0x0000
- mov r6, #0x0000
- mov r7, #0x0000
- mov r8, #0x0000
- mov r9, #0x0000
- mov r10, #0x0000
- mov r11, #0x0000
- mov r12, #0x0000
- mov r13, #0x0000
- mrs r1, cpsr
- msr spsr_cxsf, r1
- ; Switch to FIQ mode (M = 10001)
- cps #17
- mov lr, r0
- mov r8, #0x0000
- mov r9, #0x0000
- mov r10, #0x0000
- mov r11, #0x0000
- mov r12, #0x0000
- mrs r1, cpsr
- msr spsr_cxsf, r1
- ; Switch to IRQ mode (M = 10010)
- cps #18
- mov lr, r0
- mrs r1,cpsr
- msr spsr_cxsf, r1
- ; Switch to Abort mode (M = 10111)
- cps #23
- mov lr, r0
- mrs r1,cpsr
- msr spsr_cxsf, r1
- ; Switch to Undefined Instruction Mode (M = 11011)
- cps #27
- mov lr, r0
- mrs r1,cpsr
- msr spsr_cxsf, r1
- ; Switch back to Supervisor Mode (M = 10011)
- cps #19
-
-
- mrc p15, #0x00, r2, c1, c0, #0x02
- orr r2, r2, #0xF00000
- mcr p15, #0x00, r2, c1, c0, #0x02
- mov r2, #0x40000000
- fmxr fpexc, r2
-
- fmdrr d0, r1, r1
- fmdrr d1, r1, r1
- fmdrr d2, r1, r1
- fmdrr d3, r1, r1
- fmdrr d4, r1, r1
- fmdrr d5, r1, r1
- fmdrr d6, r1, r1
- fmdrr d7, r1, r1
- fmdrr d8, r1, r1
- fmdrr d9, r1, r1
- fmdrr d10, r1, r1
- fmdrr d11, r1, r1
- fmdrr d12, r1, r1
- fmdrr d13, r1, r1
- fmdrr d14, r1, r1
- fmdrr d15, r1, r1
- bl next1
-next1
- bl next2
-next2
- bl next3
-next3
- bl next4
-next4
- bx r0
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Initialize Stack Pointers
-
- .def _coreInitStackPointer_
- .asmfunc
-
-_coreInitStackPointer_
-
- cps #17
- ldr sp, fiqSp
- cps #18
- ldr sp, irqSp
- cps #23
- ldr sp, abortSp
- cps #27
- ldr sp, undefSp
- cps #31
- ldr sp, userSp
- cps #19
- ldr sp, svcSp
- bx lr
-
-userSp .word 0x08000000+0x00001000
-svcSp .word 0x08000000+0x00001000+0x00000100
-fiqSp .word 0x08000000+0x00001000+0x00000100+0x00000100
-irqSp .word 0x08000000+0x00001000+0x00000100+0x00000100+0x00000100
-abortSp .word 0x08000000+0x00001000+0x00000100+0x00000100+0x00000100+0x00000100
-undefSp .word 0x08000000+0x00001000+0x00000100+0x00000100+0x00000100+0x00000100+0x00000100
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Get CPSR Value
-
- .def _getCPSRValue_
- .asmfunc
-
-_getCPSRValue_
-
- mrs r0, CPSR
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Take CPU to IDLE state
-
- .def _gotoCPUIdle_
- .asmfunc
-
-_gotoCPUIdle_
-
- WFI
- nop
- nop
- nop
- nop
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable VFP Unit
-
- .def _coreEnableVfp_
- .asmfunc
-
-_coreEnableVfp_
-
- mrc p15, #0x00, r0, c1, c0, #0x02
- orr r0, r0, #0xF00000
- mcr p15, #0x00, r0, c1, c0, #0x02
- mov r0, #0x40000000
- fmxr fpexc, r0
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Enable Event Bus Export
-
- .def _coreEnableEventBusExport_
- .asmfunc
-
-_coreEnableEventBusExport_
-
- stmfd sp!, {r0}
- mrc p15, #0x00, r0, c9, c12, #0x00
- orr r0, r0, #0x10
- mcr p15, #0x00, r0, c9, c12, #0x00
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Disable Event Bus Export
-
- .def _coreDisableEventBusExport_
- .asmfunc
-
-_coreDisableEventBusExport_
-
- stmfd sp!, {r0}
- mrc p15, #0x00, r0, c9, c12, #0x00
- bic r0, r0, #0x10
- mcr p15, #0x00, r0, c9, c12, #0x00
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable RAM ECC Support
-
- .def _coreEnableRamEcc_
- .asmfunc
-
-_coreEnableRamEcc_
-
- stmfd sp!, {r0}
- mrc p15, #0x00, r0, c1, c0, #0x01
- orr r0, r0, #0x0C000000
- mcr p15, #0x00, r0, c1, c0, #0x01
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Disable RAM ECC Support
-
- .def _coreDisableRamEcc_
- .asmfunc
-
-_coreDisableRamEcc_
-
- stmfd sp!, {r0}
- mrc p15, #0x00, r0, c1, c0, #0x01
- bic r0, r0, #0x0C000000
- mcr p15, #0x00, r0, c1, c0, #0x01
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable Flash ECC Support
-
- .def _coreEnableFlashEcc_
- .asmfunc
-
-_coreEnableFlashEcc_
-
- stmfd sp!, {r0}
- mrc p15, #0x00, r0, c1, c0, #0x01
- orr r0, r0, #0x02000000
- dmb
- mcr p15, #0x00, r0, c1, c0, #0x01
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Disable Flash ECC Support
-
- .def _coreDisableFlashEcc_
- .asmfunc
-
-_coreDisableFlashEcc_
-
- stmfd sp!, {r0}
- mrc p15, #0x00, r0, c1, c0, #0x01
- bic r0, r0, #0x02000000
- mcr p15, #0x00, r0, c1, c0, #0x01
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable Offset via Vic controller
-
- .def _coreEnableIrqVicOffset_
- .asmfunc
-
-_coreEnableIrqVicOffset_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c1, c0, #0
- orr r0, r0, #0x01000000
- mcr p15, #0, r0, c1, c0, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get data fault status register
-
- .def _coreGetDataFault_
- .asmfunc
-
-_coreGetDataFault_
-
- mrc p15, #0, r0, c5, c0, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Clear data fault status register
-
- .def _coreClearDataFault_
- .asmfunc
-
-_coreClearDataFault_
-
- stmfd sp!, {r0}
- mov r0, #0
- mcr p15, #0, r0, c5, c0, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get instruction fault status register
-
- .def _coreGetInstructionFault_
- .asmfunc
-
-_coreGetInstructionFault_
-
- mrc p15, #0, r0, c5, c0, #1
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Clear instruction fault status register
-
- .def _coreClearInstructionFault_
- .asmfunc
-
-_coreClearInstructionFault_
-
- stmfd sp!, {r0}
- mov r0, #0
- mcr p15, #0, r0, c5, c0, #1
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get data fault address register
-
- .def _coreGetDataFaultAddress_
- .asmfunc
-
-_coreGetDataFaultAddress_
-
- mrc p15, #0, r0, c6, c0, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Clear data fault address register
-
- .def _coreClearDataFaultAddress_
- .asmfunc
-
-_coreClearDataFaultAddress_
-
- stmfd sp!, {r0}
- mov r0, #0
- mcr p15, #0, r0, c6, c0, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get instruction fault address register
-
- .def _coreGetInstructionFaultAddress_
- .asmfunc
-
-_coreGetInstructionFaultAddress_
-
- mrc p15, #0, r0, c6, c0, #2
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Clear instruction fault address register
-
- .def _coreClearInstructionFaultAddress_
- .asmfunc
-
-_coreClearInstructionFaultAddress_
-
- stmfd sp!, {r0}
- mov r0, #0
- mcr p15, #0, r0, c6, c0, #2
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get auxiliary data fault status register
-
- .def _coreGetAuxiliaryDataFault_
- .asmfunc
-
-_coreGetAuxiliaryDataFault_
-
- mrc p15, #0, r0, c5, c1, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Clear auxiliary data fault status register
-
- .def _coreClearAuxiliaryDataFault_
- .asmfunc
-
-_coreClearAuxiliaryDataFault_
-
- stmfd sp!, {r0}
- mov r0, #0
- mcr p15, #0, r0, c5, c1, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get auxiliary instruction fault status register
-
- .def _coreGetAuxiliaryInstructionFault_
- .asmfunc
-
-_coreGetAuxiliaryInstructionFault_
-
- mrc p15, #0, r0, c5, c1, #1
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Clear auxiliary instruction fault status register
-
- .def _coreClearAuxiliaryInstructionFault_
- .asmfunc
-
-_coreClearAuxiliaryInstructionFault_
-
- stmfd sp!, {r0}
- mov r0, #0
- mrc p15, #0, r0, c5, c1, #1
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Disable interrupts - R4 IRQ & FIQ
-
- .def _disable_interrupt_
- .asmfunc
-
-_disable_interrupt_
-
- cpsid if
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Disable FIQ interrupt
-
- .def _disable_FIQ_interrupt_
- .asmfunc
-
-_disable_FIQ_interrupt_
-
- cpsid f
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Disable FIQ interrupt
-
- .def _disable_IRQ_interrupt_
- .asmfunc
-
-_disable_IRQ_interrupt_
-
- cpsid i
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Enable interrupts - R4 IRQ & FIQ
-
- .def _enable_interrupt_
- .asmfunc
-
-_enable_interrupt_
-
- cpsie if
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Clear ESM CCM errorss
-
- .def _esmCcmErrorsClear_
- .asmfunc
-
-_esmCcmErrorsClear_
-
- stmfd sp!, {r0-r2}
- ldr r0, ESMSR1_REG ; load the ESMSR1 status register address
- ldr r2, ESMSR1_ERR_CLR
- str r2, [r0] ; clear the ESMSR1 register
-
- ldr r0, ESMSR2_REG ; load the ESMSR2 status register address
- ldr r2, ESMSR2_ERR_CLR
- str r2, [r0] ; clear the ESMSR2 register
-
- ldr r0, ESMSSR2_REG ; load the ESMSSR2 status register address
- ldr r2, ESMSSR2_ERR_CLR
- str r2, [r0] ; clear the ESMSSR2 register
-
- ldr r0, ESMKEY_REG ; load the ESMKEY register address
- mov r2, #0x5 ; load R2 with 0x5
- str r2, [r0] ; clear the ESMKEY register
-
- ldr r0, VIM_INTREQ ; load the INTREQ register address
- ldr r2, VIM_INT_CLR
- str r2, [r0] ; clear the INTREQ register
- ldr r0, CCMR4_STAT_REG ; load the CCMR4 status register address
- ldr r2, CCMR4_ERR_CLR
- str r2, [r0] ; clear the CCMR4 status register
- ldmfd sp!, {r0-r2}
- bx lr
-
-ESMSR1_REG .word 0xFFFFF518
-ESMSR2_REG .word 0xFFFFF51C
-ESMSR3_REG .word 0xFFFFF520
-ESMKEY_REG .word 0xFFFFF538
-ESMSSR2_REG .word 0xFFFFF53C
-CCMR4_STAT_REG .word 0xFFFFF600
-ERR_CLR_WRD .word 0xFFFFFFFF
-CCMR4_ERR_CLR .word 0x00010000
-ESMSR1_ERR_CLR .word 0x80000000
-ESMSR2_ERR_CLR .word 0x00000004
-ESMSSR2_ERR_CLR .word 0x00000004
-VIM_INT_CLR .word 0x00000001
-VIM_INTREQ .word 0xFFFFFE20
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; C++ construct table pointers
-
- .def __TI_PINIT_Base, __TI_PINIT_Limit
- .weak SHT$$INIT_ARRAY$$Base, SHT$$INIT_ARRAY$$Limit
-
-__TI_PINIT_Base .long SHT$$INIT_ARRAY$$Base
-__TI_PINIT_Limit .long SHT$$INIT_ARRAY$$Limit
-
-
-
-;-------------------------------------------------------------------------------
-
+++ /dev/null
-;-------------------------------------------------------------------------------
-; sys_intvecs.asm
-;
-; (c) Texas Instruments 2009-2012, All rights reserved.
-;
-
- .sect ".intvecs"
-
-
-;-------------------------------------------------------------------------------
-; import reference for interrupt routines
-
- .ref _c_int00
- .ref vPortYieldProcessor
- .ref _dabort
-
-
-;-------------------------------------------------------------------------------
-; interrupt vectors
-
- b _c_int00
-undefEntry
- b undefEntry
- b vPortYieldProcessor
-prefetchEntry
- b prefetchEntry
- b _dabort
-reservedEntry
- b reservedEntry
- ldr pc,[pc,#-0x1b0]
- ldr pc,[pc,#-0x1b0]
-
-
-;-------------------------------------------------------------------------------
+++ /dev/null
-;-------------------------------------------------------------------------------
-; sys_mpu.asm
-;
-; (c) Texas Instruments 2012, All rights reserved.
-;
-
- .text
- .arm
-
-
-;-------------------------------------------------------------------------------
-; Initalize Mpu
-
- .def _mpuInit_
- .asmfunc
-
-_mpuInit_
- stmfd sp!, {r0}
- ; Disable mpu
- mrc p15, #0, r0, c1, c0, #0
- bic r0, r0, #1
- dsb
- mcr p15, #0, r0, c1, c0, #0
- isb
- ; Disable background region
- mrc p15, #0, r0, c1, c0, #0
- bic r0, r0, #0x20000
- mcr p15, #0, r0, c1, c0, #0
- ; Setup region 1
- mov r0, #0
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r1Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x1000
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (1 << 12) + (1 << 11) + (1 << 10) + (1 << 9) + (1 << 8) + (0x1F << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 2
- mov r0, #1
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r2Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x0600
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region
- mov r0, #2
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r3Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x0300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x11 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 4
- mov r0, #3
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r4Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x0300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x11 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 5
- mov r0, #4
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r5Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0000
- orr r0, r0, #0x0300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x19 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 6
- mov r0, #5
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r6Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0000
- orr r0, r0, #0x0300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x1A << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 7
- mov r0, #6
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r7Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x1200
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x16 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 8
- mov r0, #7
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r8Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0010
- orr r0, r0, #0x1300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x17 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 9
- mov r0, #8
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r9Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0010
- orr r0, r0, #0x1300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x08 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 10
- mov r0, #9
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r10Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0010
- orr r0, r0, #0x1300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((0 << 15) + (0 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x17 << 1) + (1))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 11
- mov r0, #10
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r11Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x1100
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((1 << 15) + (1 << 14) + (1 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x0A << 1) + (0))
- mcr p15, #0, r0, c6, c1, #2
- ; Setup region 12
- mov r0, #11
- mcr p15, #0, r0, c6, c2, #0
- ldr r0, r12Base
- mcr p15, #0, r0, c6, c1, #0
- mov r0, #0x0008
- orr r0, r0, #0x1300
- mcr p15, #0, r0, c6, c1, #4
- movw r0, #((1 << 15) + (1 << 14) + (0 << 13) + (0 << 12) + (0 << 11) + (0 << 10) + (0 << 9) + (0 << 8) + (0x15 << 1) + (0))
- mcr p15, #0, r0, c6, c1, #2
-
-
- ; Enable mpu background region
- mrc p15, #0, r0, c1, c0, #0
- orr r0, r0, #0x20000
- mcr p15, #0, r0, c1, c0, #0
- ; Enable mpu
- mrc p15, #0, r0, c1, c0, #0
- orr r0, r0, #1
- dsb
- mcr p15, #0, r0, c1, c0, #0
- isb
- ldmfd sp!, {r0}
- bx lr
-
-r1Base .word 0x00000000
-r2Base .word 0x00000000
-r3Base .word 0x08000000
-r4Base .word 0x08400000
-r5Base .word 0x60000000
-r6Base .word 0x80000000
-r7Base .word 0xF0000000
-r8Base .word 0xFC000000
-r9Base .word 0xFE000000
-r10Base .word 0xFF000000
-r11Base .word 0x08001000
-r12Base .word 0x20000000
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable Mpu
-
- .def _mpuEnable_
- .asmfunc
-
-_mpuEnable_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c1, c0, #0
- orr r0, r0, #1
- dsb
- mcr p15, #0, r0, c1, c0, #0
- isb
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Disable Mpu
-
- .def _mpuDisable_
- .asmfunc
-
-_mpuDisable_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c1, c0, #0
- bic r0, r0, #1
- dsb
- mcr p15, #0, r0, c1, c0, #0
- isb
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable Mpu background region
-
- .def _mpuEnableBackgroundRegion_
- .asmfunc
-
-_mpuEnableBackgroundRegion_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c1, c0, #0
- orr r0, r0, #0x20000
- mcr p15, #0, r0, c1, c0, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Disable Mpu background region
-
- .def _mpuDisableBackgroundRegion_
- .asmfunc
-
-_mpuDisableBackgroundRegion_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c1, c0, #0
- bic r0, r0, #0x20000
- mcr p15, #0, r0, c1, c0, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Returns number of implemented Mpu regions
-
- .def _mpuGetNumberOfRegions_
- .asmfunc
-
-_mpuGetNumberOfRegions_
-
- mrc p15, #0, r0, c0, c0, #4
- uxtb r0, r0, ROR #8
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Returns the type of the implemented mpu regions
-
- .def _mpuAreRegionsSeparate_
- .asmfunc
-
-_mpuAreRegionsSeparate_
-
- mrc p15, #0, r0, c0, c0, #4
- uxtb r0, r0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Set mpu region number
-
- .def _mpuSetRegion_
- .asmfunc
-
-_mpuSetRegion_
-
- mcr p15, #0, r0, c6, c2, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get mpu region number
-
- .def _mpuGetRegion_
- .asmfunc
-
-_mpuGetRegion_
-
- mrc p15, #0, r0, c6, c2, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Set base address
-
- .def _mpuSetRegionBaseAddress_
- .asmfunc
-
-_mpuSetRegionBaseAddress_
-
- mcr p15, #0, r0, c6, c1, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get base address
-
- .def _mpuGetRegionBaseAddress_
- .asmfunc
-
-_mpuGetRegionBaseAddress_
-
- mrc p15, #0, r0, c6, c1, #0
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Set type and permission
-
- .def _mpuSetRegionTypeAndPermission_
- .asmfunc
-
-_mpuSetRegionTypeAndPermission_
-
- orr r0, r0, r1
- mcr p15, #0, r0, c6, c1, #4
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get type
-
- .def _mpuGetRegionType_
- .asmfunc
-
-_mpuGetRegionType_
-
- mrc p15, #0, r0, c6, c1, #4
- bic r0, r0, #0xFF00
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Get permission
-
- .def _mpuGetRegionPermission_
- .asmfunc
-
-_mpuGetRegionPermission_
-
- mrc p15, #0, r0, c6, c1, #4
- bic r0, r0, #0xFF
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Set region size register value
-
- .def _mpuSetRegionSizeRegister_
- .asmfunc
-
-_mpuSetRegionSizeRegister_
-
- mcr p15, #0, r0, c6, c1, #2
- bx lr
-
- .endasmfunc
-
-
-
-;-------------------------------------------------------------------------------
-
+++ /dev/null
-;-------------------------------------------------------------------------------
-; sys_pmu.asm
-;
-; (c) Texas Instruments 2012, All rights reserved.
-;
-
- .text
- .arm
-
-
-;-------------------------------------------------------------------------------
-; Initialize Pmu
-; Note: It will reset all counters
-
- .def _pmuInit_
- .asmfunc
-
-_pmuInit_
-
- stmfd sp!, {r0}
- ; set control register
- mrc p15, #0, r0, c9, c12, #0
- orr r0, r0, #(1 << 4) + 6 + 1
- mcr p15, #0, r0, c9, c12, #0
- ; clear flags
- mov r0, #0
- mcr p15, #0, r0, c9, c12, #3
- ; select counter 0 event
- mcr p15, #0, r0, c9, c12, #5 ; select counter
- mov r0, #0x11
- mcr p15, #0, r0, c9, c13, #1 ; select event
- ; select counter 1 event
- mov r0, #1
- mcr p15, #0, r0, c9, c12, #5 ; select counter
- mov r0, #0x11
- mcr p15, #0, r0, c9, c13, #1 ; select event
- ; select counter 2 event
- mov r0, #2
- mcr p15, #0, r0, c9, c12, #5 ; select counter
- mov r0, #0x11
- mcr p15, #0, r0, c9, c13, #1 ; select event
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-
-;-------------------------------------------------------------------------------
-; Enable Counters Global [Cycle, Event [0..2]]
-; Note: It will reset all counters
-
- .def _pmuEnableCountersGlobal_
- .asmfunc
-
-_pmuEnableCountersGlobal_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c9, c12, #0
- orr r0, r0, #7
- mcr p15, #0, r0, c9, c12, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Disable Counters Global [Cycle, Event [0..2]]
-
- .def _pmuDisableCountersGlobal_
- .asmfunc
-
-_pmuDisableCountersGlobal_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c9, c12, #0
- bic r0, r0, #1
- mcr p15, #0, r0, c9, c12, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Reset Cycle Counter
-
- .def _pmuResetCycleCounter_
- .asmfunc
-
-_pmuResetCycleCounter_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c9, c12, #0
- orr r0, r0, #4
- mcr p15, #0, r0, c9, c12, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Reset Event Counters [0..2]
-
- .def _pmuResetEventCounters_
- .asmfunc
-
-_pmuResetEventCounters_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c9, c12, #0
- orr r0, r0, #2
- mcr p15, #0, r0, c9, c12, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Reset Cycle Counter abd Event Counters [0..2]
-
- .def _pmuResetCounters_
- .asmfunc
-
-_pmuResetCounters_
-
- stmfd sp!, {r0}
- mrc p15, #0, r0, c9, c12, #0
- orr r0, r0, #6
- mcr p15, #0, r0, c9, c12, #0
- ldmfd sp!, {r0}
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Start Counters [Cycle, 0..2]
-
- .def _pmuStartCounters_
- .asmfunc
-
-_pmuStartCounters_
-
- mcr p15, #0, r0, c9, c12, #1
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Stop Counters [Cycle, 0..2]
-
- .def _pmuStopCounters_
- .asmfunc
-
-_pmuStopCounters_
-
- mcr p15, #0, r0, c9, c12, #2
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Set Count event
-
- .def _pmuSetCountEvent_
- .asmfunc
-
-_pmuSetCountEvent_
-
- lsr r0, r0, #1
- mcr p15, #0, r0, c9, c12, #5 ; select counter
- mcr p15, #0, r1, c9, c13, #1 ; select event
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Get Cycle Count
-
- .def _pmuGetCycleCount_
- .asmfunc
-
-_pmuGetCycleCount_
-
- mrc p15, #0, r0, c9, c13, #0
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Get Event Counter Count Value
-
- .def _pmuGetEventCount_
- .asmfunc
-
-_pmuGetEventCount_
-
- lsr r0, r0, #1
- mcr p15, #0, r0, c9, c12, #5 ; select counter
- mrc p15, #0, r0, c9, c13, #2 ; read event counter
- bx lr
-
- .endasmfunc
-
-;-------------------------------------------------------------------------------
-; Get Overflow Flags
-
- .def _pmuGetOverflow_
- .asmfunc
-
-_pmuGetOverflow_
-
- mrc p15, #0, r0, c9, c12, #3 ; read overflow
- mov r1, #0
- mcr p15, #0, r1, c9, c12, #3 ; clear flags
- bx lr
-
- .endasmfunc
-
-
-
-;-------------------------------------------------------------------------------
-
+++ /dev/null
-/** @file notification.c
-* @brief User Notification Definition File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file defines empty notification routines.
-* The user needs to remove the while loop and define
-* the sequence.
-*
-*/
-
-/* Include Files */
-
-//#include "ti_drv_esm.h"
-//#include "sys_selftest.h"
-//#include "ti_drv_adc.h"
-//#include "ti_drv_can.h"
-//#include "ti_drv_gio.h"
-//#include "ti_drv_lin.h"
-//#include "ti_drv_mibspi.h"
-//#include "ti_drv_sci.h"
-//#include "ti_drv_het.h"
-//#include "ti_drv_i2c.h"
-/* USER CODE BEGIN (0) */
-//#include "FreeRTOS.h"
-//#include "os_semphr.h"
-//#include "os_task.h"
-
-#include "sys/sys.h"
-
-/* USER CODE END */
-
-void esmGroup1Notification(uint32_t channel)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-void esmGroup2Notification(uint32_t channel)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
-void memoryPort0TestFailNotification(uint32_t groupSelect, uint32_t dataSelect, uint32_t address, uint32_t data)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
-void memoryPort1TestFailNotification(uint32_t groupSelect, uint32_t dataSelect, uint32_t address, uint32_t data)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
-/* USER CODE BEGIN (12) */
-/** @brief Semaphore blocking task when it waits for interrupt signaling message receive
- *
- */
-// FIXME It seems that all the following are test application specific, because no one
-// else in the library uses this variables. The functionality the notification
-// provides could be replaced with a proper interface between subsystems.
-// This where called extern on the file, which is not a good approach to include
-// application specific variables in lower layers, coupling bidireccionally both
-// layers.
-// This was moved from cmd_can.c
-/** Semaphore used for blocking task until message is received */
-//xSemaphoreHandle canMsgReceived;
-/** Semaphore used for blocking task until message is sent */
-//xSemaphoreHandle canMsgSent;
-/** Pointer to Destination CAN registers */
-//canBASE_t* canDst;
-/** Can message box for received messages */
-//uint32_t canMsgBox;
-/** Error counter for errors in sending */
-//uint32_t canSendError;
-/** Error counter for errors in receiving */
-//uint32_t canRecError;
-
-/** Semaphore used for blocking task until message is received */
-extern xSemaphoreHandle canMsgReceived;
-/** Semaphore used for blocking task until message is sent */
-extern xSemaphoreHandle canMsgSent;
-/** Pointer to Destination CAN registers */
-extern canBASE_t* canDst;
-/** Pointer to Source CAN registers */
-extern canBASE_t* canSrc;
-/** Can message box for received messages */
-extern uint32_t canMsgBox;
-/** Error counter for errors in sending */
-extern uint32_t canSendError;
-/** Error counter for errors in receiving */
-extern uint32_t canRecError;
-
-/* USER CODE END */
-void canErrorNotification(canBASE_t *node, uint32_t notification)
-{
-/* USER CODE BEGIN (13) */
-
- if (node == canSrc) {
- canSendError = notification;
- xSemaphoreGiveFromISR(canMsgSent, NULL);
- }
- if (node == canDst) {
- canRecError = notification;
- xSemaphoreGiveFromISR(canMsgReceived, NULL);
- }
-
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-
-void canMessageNotification(canBASE_t *node, uint32_t messageBox)
-{
-/* USER CODE BEGIN (15) */
-
- if (messageBox == canMsgBox)
- {
- if (node == canDst) {
- // node 2 - receive testloopback message complete
- while(!canIsRxMessageArrived(node, canMsgBox))
- ;
- xSemaphoreGiveFromISR(canMsgReceived, NULL);
- }
- if (node == canSrc) {
- xSemaphoreGiveFromISR(canMsgSent, NULL);
- }
- }
-/* USER CODE END */
-}
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-void gioNotification(int bit)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-void i2cNotification(i2cBASE_t *i2c, uint32_t flags)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-void mibspiNotification(mibspiBASE_t *mibspi, uint32_t flags)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
-
-void mibspiGroupNotification(mibspiBASE_t *mibspi, uint32_t group)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-
-}
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
-void sciNotification(sciBASE_t *sci, uint32_t flags)
-{
-/* USER CODE BEGIN (29) */
- if (sci == sciREG) {
- if (flags & SCI_RX_INT) {
- sciReceive(sci, 1, NULL); // Restart receiving
- }
- }
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-void pwmNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (33) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (34) */
-/* USER CODE END */
-
-void edgeNotification(hetBASE_t * hetREG,uint32_t edge)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (35) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (36) */
-/* USER CODE END */
-
-void hetNotification(hetBASE_t *het, uint32_t offset)
-{
-/* enter user code and remove the while loop... */
- while(1);
-/* USER CODE BEGIN (37) */
-/* USER CODE END */
-
-}
-
-/** Semaphore used to stop command, until message is received */
-//xSemaphoreHandle linMsgReceived;
-/** Semaphore used to stop command, until ID is received */
-//xSemaphoreHandle linIDReceived;
-//void linNotification(linBASE_t *lin, uint32_t flags)
-//{
- /* FIXME Moved code from somewhere else. It was in cmd_lin.c
- * It seems that nobody in the library uses this.
- * sys/ti_drv_lin.c calls this function from linLowLevelInterrupt()
- * The function prototipe is in sys/ti_drv_lin.h, so maybe it should be
- * better to move it there, but because it is a "high-level" notification
- * it could be here.
- */
-/* if (flags & LIN_ID_INT) {
- xSemaphoreGiveFromISR(linIDReceived, NULL);
- }
- if (flags & LIN_RX_INT) {
- lin->FLR |= (1 << 9);
- xSemaphoreGiveFromISR(linMsgReceived, NULL);
- }
-}
-*/
-
-//#pragma INTERRUPT(EMACCore0RxIsr, FIQ)
-//void EMACCore0RxIsr(void)
-//{
- /* FIXME was in cmd_emac.c and should move somewhere else.
- rx_irq_cnt++;
-
- // We know we have only one RX Packet Buffer descriptor --
- // so we write it in CP to disable interrupt
- EMACRxCPWrite(emacBase, channel, (unsigned int)rx_desc);
- EMACCoreIntAck(emacBase, EMAC_INT_CORE0_RX);
- */
-//}
-
-
-
-/* USER CODE BEGIN (38) */
-/* USER CODE END */
+++ /dev/null
-#include "sys/ti_drv_emac.h"
-#include "sys/ti_drv_mdio.h"
-#include "sys/hw_mdio.h"
-#include "sys/hw_emac.h"
-#include "sys/phy.h"
-
-void PHY_partner_ability_get(unsigned int mdioBaseAddr, unsigned int phyAddr, unsigned short *data)
-{
- MDIOPhyRegRead(mdioBaseAddr, phyAddr, PHY_ANAR, data);
-}
-
-void PHY_configure(unsigned int mdioBaseAddr, unsigned int phyAddr)
-{
- volatile unsigned short data = 0;
-
- /* Enable Auto Negotiation */
- MDIOPhyRegWrite(mdioBaseAddr, phyAddr, PHY_BMCR, 0);
- MDIOPhyRegWrite(mdioBaseAddr, phyAddr, PHY_BMCR, PHY_RESET_m | PHY_AUTONEG_EN_m);
-
- /* Write Auto Negotiation capabilities */
- MDIOPhyRegRead(mdioBaseAddr, phyAddr, PHY_ANAR, &data);
- data |= (PHY_100BASETXDUPL_m | PHY_100BASETX_m | PHY_10BASETDUPL_m | PHY_10BASET_m);
- MDIOPhyRegWrite(mdioBaseAddr, phyAddr,
- PHY_ANAR, data);
-
- /* Start Auto Negotiation */
- MDIOPhyRegRead(mdioBaseAddr, phyAddr, PHY_BMCR, &data);
- data |= PHY_AUTONEG_REST;
- MDIOPhyRegWrite(mdioBaseAddr, phyAddr,
- PHY_BMCR, data);
-
- /* Get the auto negotiation status*/
- /* Wait till auto negotiation is complete */
- do {
- MDIOPhyRegRead(mdioBaseAddr, phyAddr, PHY_BMSR, &data);
- } while ((data & PHY_A_NEG_COMPLETE_m) == 0);
-}
+++ /dev/null
-/** @file sys_phantom.c
-* @brief Phantom Interrupt Source File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Phantom Interrupt Handler
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* Phantom Interrupt Handler */
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-#pragma INTERRUPT(phantomInterrupt, IRQ)
-
-void phantomInterrupt(void)
-{
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-}
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
+++ /dev/null
-/** @file pinmux.c
-* @brief PINMUX Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* Include Files */
-
-#include "sys/sys_pinmux.h"
-
-#define PINMUX_SET(REG, BALLID, MUX) \
- pinMuxReg->PINMUX##REG## = (pinMuxReg->PINMUX##REG## & PINMUX_BALL_##BALLID##_MASK) | (PINMUX_BALL_##BALLID##_##MUX##)
-
-#define PINMUX_GATE_EMIF_CLK_ENABLE \
- pinMuxReg->PINMUX29 = (pinMuxReg->PINMUX29 & PINMUX_GATE_EMIF_CLK_MASK) | PINMUX_GATE_EMIF_CLK
-
-#define PINMUX_GIOB_DISABLE_HET2_ENABLE \
- pinMuxReg->PINMUX29 = (pinMuxReg->PINMUX29 & PINMUX_GIOB_DISABLE_HET2_MASK) | PINMUX_GIOB_DISABLE_HET2
-
-#define PINMUX_ALT_ADC_TRIGGER_SELECT(num) \
- pinMuxReg->PINMUX30 = (pinMuxReg->PINMUX30 & PINMUX_ALT_ADC_TRIGGER_MASK) | (PINMUX_ALT_ADC_TRIGGER_##num##)
-
-#define PINMUX_ETHERNET_SELECT(interface) \
- pinMuxReg->PINMUX29 = (pinMuxReg->PINMUX29 & PINMUX_ETHERNET_MASK) | (PINMUX_ETHERNET_##interface##)
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-void muxInit(void){
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
- /* Enable Pin Muxing */
- kickerReg->KICKER0 = 0x83E70B13;
- kickerReg->KICKER1 = 0x95A4F1E0;
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
- pinMuxReg->PINMUX0 = PINMUX_BALL_C3_I2C_SCL | PINMUX_BALL_B2_I2C_SDA;
-
- pinMuxReg->PINMUX1 = PINMUX_BALL_E3_MIBSPI3NCS_4 | PINMUX_BALL_E5_EMIF_DATA_4 | PINMUX_BALL_F5_EMIF_DATA_5;
-
- pinMuxReg->PINMUX2 = PINMUX_BALL_C1_GIOA_2 | PINMUX_BALL_G5_EMIF_DATA_6 | PINMUX_BALL_E1_GIOA_3 | PINMUX_BALL_B5_GIOA_5;
-
- pinMuxReg->PINMUX3 = PINMUX_BALL_K5_EMIF_DATA_7 | PINMUX_BALL_H3_GIOA_6 | PINMUX_BALL_L5_EMIF_DATA_8;
-
- pinMuxReg->PINMUX4 = PINMUX_BALL_M1_GIOA_7 | PINMUX_BALL_M5_EMIF_DATA_9 | PINMUX_BALL_V2_HET1_01 | PINMUX_BALL_U1_SPI4NCS_0;
-
- pinMuxReg->PINMUX5 = PINMUX_BALL_K18_SPI4CLK | PINMUX_BALL_W5_SPI4SIMO | PINMUX_BALL_V6_SPI4SOMI | PINMUX_BALL_N5_EMIF_DATA_10;
-
- pinMuxReg->PINMUX6 = PINMUX_BALL_T1_HET1_07 | PINMUX_BALL_P5_EMIF_DATA_11 | PINMUX_BALL_V7_HET1_09 | PINMUX_BALL_R5_EMIF_DATA_12;
-
- pinMuxReg->PINMUX7 = PINMUX_BALL_R6_EMIF_DATA_13 | PINMUX_BALL_V5_MDCLK | PINMUX_BALL_W3_SCIRX | PINMUX_BALL_R7_EMIF_DATA_14;
-
- pinMuxReg->PINMUX8 = PINMUX_BALL_N2_SCITX | PINMUX_BALL_G3_MDIO | PINMUX_BALL_N1_MIBSPI1NCS_4 | PINMUX_BALL_R8_EMIF_DATA_15;
-
- pinMuxReg->PINMUX9 = PINMUX_BALL_R9_ETMTRACECLKIN | PINMUX_BALL_W9_MIBSPI3NCS_5 | PINMUX_BALL_V10_MIBSPI3NCS_0 | PINMUX_BALL_J3_MIBSPI1NCS_3;
-
- pinMuxReg->PINMUX10 = PINMUX_BALL_N19_MII_RX_ER | PINMUX_BALL_N15_EMIF_DATA_3 | PINMUX_BALL_N17_EMIF_nCS_0 | PINMUX_BALL_M15_EMIF_DATA_2;
-
- pinMuxReg->PINMUX11 = PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_M17_EMIF_nCS_4 | PINMUX_BALL_L15_EMIF_DATA_1 | PINMUX_BALL_P1_MII_RXD_0;
-
- pinMuxReg->PINMUX12 = PINMUX_BALL_A14_MII_RXD_1 | PINMUX_BALL_K15_EMIF_DATA_0 | PINMUX_BALL_G19_MII_RXD_2 | PINMUX_BALL_H18_MII_RXD_3;
-
- pinMuxReg->PINMUX13 = PINMUX_BALL_J18_MII_TXD_0 | PINMUX_BALL_J19_MII_TXD_1 | PINMUX_BALL_H19_MII_TXEN | PINMUX_BALL_R2_MII_TXD_2;
-
- pinMuxReg->PINMUX14 = PINMUX_BALL_E18_MII_TXD_3 | PINMUX_BALL_K19_MII_RXCLK | PINMUX_BALL_D17_EMIF_nWE | PINMUX_BALL_D16_EMIF_BA_1;
-
- pinMuxReg->PINMUX15 = PINMUX_BALL_C17_EMIF_ADDR_21 | PINMUX_BALL_C16_EMIF_ADDR_20 | PINMUX_BALL_C15_EMIF_ADDR_19 | PINMUX_BALL_D15_EMIF_ADDR_18;
-
- pinMuxReg->PINMUX16 = PINMUX_BALL_E13_EMIF_BA_0 | PINMUX_BALL_C14_EMIF_ADDR_17 | PINMUX_BALL_D14_EMIF_ADDR_16 | PINMUX_BALL_E12_EMIF_nOE;
-
- pinMuxReg->PINMUX17 = PINMUX_BALL_D19_MII_TX_CLK | PINMUX_BALL_E11_EMIF_nDQM_1 | PINMUX_BALL_B4_MII_CRS | PINMUX_BALL_E9_EMIF_ADDR_5;
-
- pinMuxReg->PINMUX18 = PINMUX_BALL_C13_EMIF_ADDR_15 | PINMUX_BALL_C12_EMIF_ADDR_14 | PINMUX_BALL_M2_GIOB_0;
-
- pinMuxReg->PINMUX19 = PINMUX_BALL_E8_EMIF_ADDR_4 | PINMUX_BALL_B11_MII_RX_DV | PINMUX_BALL_E10_EMIF_nDQM_0 | PINMUX_BALL_E7_EMIF_ADDR_3;
-
- pinMuxReg->PINMUX20 = PINMUX_BALL_C11_EMIF_ADDR_13 | PINMUX_BALL_C10_EMIF_ADDR_12 | PINMUX_BALL_F3_MII_COL | PINMUX_BALL_C9_EMIF_ADDR_11;
-
- pinMuxReg->PINMUX21 = PINMUX_BALL_D5_EMIF_ADDR_1 | PINMUX_BALL_C8_EMIF_ADDR_10 | PINMUX_BALL_C7_EMIF_ADDR_9;
-
- pinMuxReg->PINMUX22 = PINMUX_BALL_D4_EMIF_ADDR_0 | PINMUX_BALL_C5_EMIF_ADDR_7 | PINMUX_BALL_C4_EMIF_ADDR_6 | PINMUX_BALL_E6_EMIF_ADDR_2;
-
- pinMuxReg->PINMUX23 = 0x00010100| /* SPI4SOMI is on ball W6 */
- PINMUX_BALL_C6_EMIF_ADDR_8;
-
- pinMuxReg->PINMUX24 = 0x01010101;
-
- pinMuxReg->PINMUX25 = 0x01010101;
-
- /* Halcogen fix enabling N2HET1[29], N2HET1[31] */
- pinMuxReg->PINMUX26 = 0x0101 | PINMUX_BALL_W6_DMM_DATA_2 | PINMUX_BALL_T12_DMM_DATA_3;
-
- pinMuxReg->PINMUX27 = PINMUX_BALL_E19_DMM_DATA_5 | PINMUX_BALL_B6_DMM_DATA_6 | PINMUX_BALL_E16_DMM_DATA_9 | PINMUX_BALL_H17_DMM_DATA_10;
-
- pinMuxReg->PINMUX28 = PINMUX_BALL_G17_DMM_DATA_11 | PINMUX_BALL_E17_DMM_DATA_13 | PINMUX_BALL_H16_DMM_DATA_14 | PINMUX_BALL_G16_DMM_DATA_15;
-
- pinMuxReg->PINMUX29 = PINMUX_BALL_D3_SPI2NCS_1;
-
-
-
-
- PINMUX_ALT_ADC_TRIGGER_SELECT(1);
- PINMUX_ETHERNET_SELECT(MII);
-
- PINMUX_SET(0,A5,GIOA_0);
- PINMUX_SET(18,A11,HET1_14);
- PINMUX_SET(3,B3,HET1_22);
- PINMUX_SET(1,C2,GIOA_1);
- PINMUX_SET(21,K2,GIOB_1);
- PINMUX_SET(0,W10,GIOB_3);
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
- /* Disable Pin Muxing */
- kickerReg->KICKER0 = 0x00000000;
- kickerReg->KICKER1 = 0x00000000;
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-}
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
+++ /dev/null
-/** @file sys_selftest.c
-* @brief Selftest Source File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Selftest API's
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/sys_selftest.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void ccmSelfCheck(void)
-* @brief CCM module self check Driver
-*
-* This function self checks the CCM module.
-*/
-void ccmSelfCheck(void)
-{
- /* Run a diagnostic check on the CCM-R4F module */
- /* This step ensures that the CCM-R4F can actually indicate an error */
-
- /* Configure CCM in self-test mode */
- CCMKEYR = 0x6;
- /* Wait for CCM self-test to complete */
- while ((CCMSR & 0x100) != 0x100);
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
- /* Check if there was an error during the self-test */
- if ((CCMSR & 0x1) == 0x1)
- {
- /* STE is set */
- ccmFail(0);
- }
- else
- {
- /* Check CCM-R4 self-test error flag by itself (without compare error) */
-
- /* Configure CCM in self-test error-forcing mode */
- CCMKEYR = 0xF;
- if ((esmREG->ESTATUS1[0] & 0x80000000) != 0x80000000)
- {
- /* ESM flag is not set */
- ccmFail(1);
- }
- else
- {
- /* clear ESM group1 channel 31 flag */
- esmREG->ESTATUS1[0] = 0x80000000;
-
- /* Configure CCM in error-forcing mode */
- CCMKEYR = 0x9;
-
- /* check if compare error flag is set */
- if ((esmREG->ESTATUS1[1] & 0x4) != 0x4)
- {
- /* ESM flag is not set */
- ccmFail(2);
- }
- else
- {
- /* clear ESM group2 channel 2 flag */
- esmREG->ESTATUS1[1] = 0x4;
-
- /* clear ESM group2 shadow status flag */
- esmREG->ESTATUS5EMU = 0x4;
-
- /* ESM self-test error needs to also be cleared */
- esmREG->ESTATUS1[0] = 0x80000000;
-
- /* Clear CCM-R4 CMPE flag */
- CCMSR = 0x00010000;
-
- /* Return CCM-R4 to lock-step mode */
- CCMKEYR = 0x0;
-
- /* The nERROR pin will become inactive once the LTC counter expires */
- esmREG->KEY = 0x5;
- }
- }
- }
-}
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-/** @fn void ccmFail(unsigned int x)
-* @brief CCM module fail service routine
-*
-* This function is called if CCM module selftest fail.
-*/
-void ccmFail(unsigned int x)
-{
- if (x == 0)
- {
- /* CCM-R4 is not able to flag a compare error in self-test mode.
- * Lock-step operation cannot be verified.
- */
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
- }
- else if (x == 1)
- {
- /* CCM-R4 self-test error flag is not set in ESM register.
- * Could be due to a connection issue inside the part.
- */
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
- }
- else if (x == 2)
- {
- /* CCM-R4 compare error flag is not set in ESM.
- * Lock-step operation cannot be verified.
- */
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
- }
-}
-
-/** @fn void _memoryInit_(unsigned int ram)
-* @brief Memory Initialization Driver
-*
-* This function is called to perform Memory initialization of selected RAM's.
-*/
-void _memoryInit_(unsigned int ram)
-{
- /* Enable Memory Hardware Initialization */
- systemREG1->MINITGCR = 0xA;
-
- /* Enable Memory Hardware Initialization for selected RAM's */
- systemREG1->MSINENA = ram;
-
- /* Wait until Memory Hardware Initialization complete */
- while( systemREG1->MSTCGSTAT & 0x00000100 != 1);
-
- /* Disable Memory Hardware Initialization */
- systemREG1->MINITGCR = 0xA;
-}
-
-/** @fn void stcSelfCheck(void)
-* @brief STC module self check Driver
-*
-* This function is called to perform STC module self check.
-*/
-void stcSelfCheck(void)
-{
- volatile int i = 0;
-
- /* Run a diagnostic check on the CPU self-test controller */
- /* First set up the STC clock divider as STC is only supported up to 90MHz */
-
- /* STC clock is now normal mode CPU clock frequency/2 = 180MHz/2 */
- systemREG2->STCCLKDIV = 0x01000000;
-
- /* Select one test interval, restart self-test next time, 0x00010001 */
- stcREG->STCGCR0 = 0x00010001;
-
- /* Enable comparator self-check and stuck-at-0 fault insertion in CPU, 0x1A */
- stcREG->STCSCSCR = 0x1A;
-
- /* Maximum time-out period */
- stcREG->STCTPR = 0xFFFFFFFF;
-
- /* wait for 16 VBUS clock cycles at least */
- for (i=0; i<16; i++);
-
- /* Enable self-test */
- stcREG->STCGCR1 = 0xA;
-
- /* wait for 16 VBUS clock cycles at least */
- for (i=0; i<16; i++);
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
- /* Idle the CPU so that the self-test can start */
- _gotoCPUIdle_();
-
-}
-
-/** @fn void cpuSelfTest(unsigned int no_of_intervals, unsigned int max_timeout, boolean_t restart_test)
-* @brief CPU self test Driver
-* @param[in] no_of_intervals - Number of Test Intervals to be
-* @param[in] max_timeout - Maximun Timeout to complete selected test Intervals
-* @param[in] restart_test - Restart the test from Interval 0 or Continue from where it stopped.
-*
-* This function is called to perfrom CPU self test using STC module.
-*/
-void cpuSelfTest(unsigned int no_of_intervals, unsigned int max_timeout, boolean_t restart_test)
-{
- volatile int i = 0;
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- /* Run specified no of test intervals starting from interval 0 */
- /* Start test from interval 0 or continue the test. */
- stcREG->STCGCR0 = no_of_intervals << 16
- | (unsigned int) restart_test;
-
- /* Configure Maximum time-out period */
- stcREG->STCTPR = max_timeout;
-
- /* wait for 16 VBUS clock cycles at least */
- for (i=0; i<16; i++);
-
- /* Enable self-test */
- stcREG->STCGCR1 = 0xA;
-
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
- /* Idle the CPU so that the self-test can start */
-
- _gotoCPUIdle_();
-
-}
-
-/** @fn void pbistSelfCheck(void)
-* @brief PBIST self test Driver
-*
-* This function is called to perfrom PBIST self test.
-*/
-void pbistSelfCheck(void)
-{
- int i = 0;
- /* Run a diagnostic check on the memory self-test controller */
- /* First set up the PBIST ROM clock as this clock frequency is limited to 90MHz */
-
- /* PBIST ROM clock frequency = HCLK frequency /2 */
- systemREG1->MSTGCR |= 0x00000100;
-
- /* Enable PBIST controller */
- systemREG1->MSINENA = 0x1;
-
- /* clear MSTGENA field */
- systemREG1->MSTGCR &= ~(0xF);
-
- /* Enable PBIST self-test */
- systemREG1->MSTGCR |= 0xA;
-
- /* software loop to wait at least 32 VCLK cycles */
- for (i = 0; i < 32; i++);
-
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-
- /* Enable PBIST clocks and ROM clock */
- pbistREG->PACT = 0x3;
-
- /* Select algo#3, march13n to be run */
- pbistREG->ALGO = 0x00000004;
-
- /* Select RAM Group 1, which is actually the PBIST ROM */
- pbistREG->RINFOL = 0x1;
-
- /* ROM contents will not override ALGO and RINFOx settings */
- pbistREG->OVER = 0x0;
-
- /* Algorithm code is loaded from ROM */
- pbistREG->ROM = 0x3;
-
- /* Start PBIST */
- pbistREG->DLR = 0x14;
-
- /* wait until memory self-test done is indicated */
- while ((systemREG1->MSTCGSTAT & 0x1) != 0x1);
-
- /* Check for the failure */
- if (((pbistREG->FSRF0 & 0x1) != 0x1) & ((pbistREG->FSRF1 & 0x1) != 0x1))
- {
- /* no failure was indicated even if the march13n algorithm was run on a ROM */
- pbistSelfCheckFail();
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
- }
- else
- {
- /* PBIST self-check has passed */
-
- /* Disable PBIST clocks and ROM clock */
- pbistREG->PACT = 0x0;
-
- /* Disable PBIST */
- systemREG1->MSTGCR &= ~(0xF);
- systemREG1->MSTGCR |= 0x5;
-
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
- }
-}
-
-/** @fn void pbistSelfCheckFail(void)
-* @brief PBIST self test Driver failure service routine
-*
-* This function is called on PBIST self test failure.
-*/
-void pbistSelfCheckFail(void)
-{
- /* The PBIST controller is not capable of reporting a failure.
- * PBIST cannot be used to verify memory integrity.
- * Need custom handler here.
- */
-}
-
-/** @fn void pbistRun(unsigned int raminfoL, unsigned int algomask)
-* @brief CPU self test Driver
-* @param[in] raminfoL - Select the list of RAM to be tested.
-* @param[in] algomask - Select the list of Algorithm to be run.
-*
-* This function performs Memory Built-in Self test using PBIST module.
-*/
-void pbistRun(unsigned int raminfoL, unsigned int algomask)
-{
- int i = 0;
-
- /* PBIST ROM clock frequency = HCLK frequency /2 */
- systemREG1->MSTGCR |= 0x00000100;
-
- /* Enable PBIST controller */
- systemREG1->MSINENA = 0x1;
-
- /* clear MSTGENA field */
- systemREG1->MSTGCR &= ~(0xF);
-
- /* Enable PBIST self-test */
- systemREG1->MSTGCR |= 0xA;
-
- /* software loop to wait at least 32 VCLK cycles */
- for (i = 0; i < 32; i++);
-
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- /* Enable PBIST clocks and ROM clock */
- pbistREG->PACT = 0x3;
-
- /* Select all algorithms to be tested */
- pbistREG->ALGO = algomask;
-
- /* Select RAM groups */
- pbistREG->RINFOL = raminfoL;
-
- /* Select all RAM groups */
- pbistREG->RINFOU = 0x00000000;
-
- /* ROM contents will not override RINFOx settings */
- pbistREG->OVER = 0x0;
-
- /* Algorithm code is loaded from ROM */
- pbistREG->ROM = 0x3;
-
- /* Start PBIST */
- pbistREG->DLR = 0x14;
-}
-
-/** @fn void pbistStop(void)
-* @brief Routine to stop PBIST test enabled.
-*
-* This function is called to stop PBIST after test is performed.
-*/
-void pbistStop(void)
-{
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
- /* disable pbist clocks and ROM clock */
- pbistREG->PACT = 0x0;
- systemREG1->MSTGCR &= ~(0xF);
- systemREG1->MSTGCR |= 0x5;
-}
-
-/** @fn boolean_t pbistIsTestCompleted(void)
-* @brief Checks to see if the PBIST test is completed.
-* @return 1 if PBIST test completed, otherwise 0.
-*
-* Checks to see if the PBIST test is completed.
-*/
-boolean_t pbistIsTestCompleted(void)
-{
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- return ((systemREG1->MSTCGSTAT & 0x1) != 0);
-}
-
-/** @fn boolean_t pbistIsTestPassed(void)
-* @brief Checks to see if the PBIST test is completed sucessfully.
-* @return 1 if PBIST test passed, otherwise 0.
-*
-* Checks to see if the PBIST test is completed sucessfully.
-*/
-boolean_t pbistIsTestPassed(void)
-{
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-
- return ((pbistREG->FSRF0 || pbistREG->FSRF1) == 0);
-}
-
-/** @fn boolean_t pbistPortTestStatus(uint32_t port)
-* @brief Checks to see if the PBIST Port test is completed sucessfully.
-* @param[in] port - Select the port to get the status.
-* @return 1 if PBIST Port test completed sucessfully, otherwise 0.
-*
-* Checks to see if the selected PBIST Port test is completed sucessfully.
-*/
-boolean_t pbistPortTestStatus(uint32_t port)
-{
- boolean_t status;
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- if(port == PBIST_PORT0)
- {
- status = (pbistREG->FSRF0 == 0);
- }
- else
- {
- status = (pbistREG->FSRF1 == 0);
- }
-
- return status;
-}
-
-/** @fn void efcCheck(void)
-* @brief EFUSE module self check Driver
-*
-* This function self checks the EFSUE module.
-*/
-void efcCheck(void)
-{
- unsigned int efcStatus = 0;
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-
- /* read the EFC Error Status Register */
- efcStatus = efcREG->ERROR;
-
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- if (efcStatus == 0x0)
- {
- /* run stuck-at-zero test and check if it passed */
- if (efcStuckZeroTest())
- {
- /* start EFC ECC logic self-test */
- efcSelfTest();
- }
- else
- {
- /* EFC output is stuck-at-zero, device operation unreliable */
- efcClass2Error();
- }
- }
- /* EFC Error Register is not zero */
- else
- {
- /* one-bit error detected during autoload */
- if (efcStatus == 0x15)
- {
- /* start EFC ECC logic self-test */
- efcSelfTest();
- }
- else
- {
- /* Some other EFC error was detected */
- efcClass2Error();
- }
- }
-}
-
-/** @fn boolean_t efcStuckZeroTest(void)
-* @brief Checks to see if the EFUSE Stuck at zero test is completed sucessfully.
-* @return 1 if EFUSE Stuck at zero test completed, otherwise 0.
-*
-* Checks to see if the EFUSE Stuck at zero test is completed sucessfully.
-*/
-boolean_t efcStuckZeroTest(void)
-{
- boolean_t result = FALSE;
- unsigned int error_checks = EFC_INSTRUCTION_INFO_EN |
- EFC_INSTRUCTION_ERROR_EN |
- EFC_AUTOLOAD_ERROR_EN |
- EFC_SELF_TEST_ERROR_EN ;
-
- /* configure the output enable for auto load error , instruction info,
- instruction error, and self test error using boundary register
- and drive values one across all the errors */
- efcREG->BOUNDARY = (OUTPUT_ENABLE | error_checks);
-
- /* Read from the pin register. This register holds the current values
- of above errors. This value should be 0x5c00.If not at least one of
- the above errors is stuck at 0. */
- if ((efcREG->PINS & 0x5C00) == 0x5C00)
- {
- /* check if the ESM group1 channels 40 is set and group3 channel 2 is set */
- if (((esmREG->ESTATUS4[0] & 0x200) == 0x200) & ((esmREG->ESTATUS1[2] & 0x2) == 0x2))
- {
- /* stuck-at-zero test passed */
- result = TRUE;
- }
- }
-
- /* put the pins back low */
- efcREG->BOUNDARY = OUTPUT_ENABLE;
-
- /* clear group1 flags */
- esmREG->ESTATUS4[0] = 0x300;
-
- /* clear group3 flag */
- esmREG->ESTATUS1[2] = 0x2;
-
- /* The nERROR pin will become inactive once the LTC counter expires */
- esmREG->KEY = 0x5;
-
- return result;
-}
-
-/** @fn void efcSelfTest(void)
-* @brief EFUSE module self check Driver
-*
-* This function self checks the EFSUE module.
-*/
-void efcSelfTest(void)
-{
- /* configure self-test cycles */
- efcREG->SELF_TEST_CYCLES = 0x258;
-
- /* configure self-test signature */
- efcREG->SELF_TEST_SIGN = 0x5362F97F;
-
- /* configure boundary register to start ECC self-test */
- efcREG->BOUNDARY = 0x0000200F;
-}
-
-/** @fn boolean_t checkefcSelfTest(void)
-* @brief EFUSE module self check Driver
-*
-* This function self checks the EFSUE module.
-*/
-boolean_t checkefcSelfTest(void)
-{
- boolean_t result = FALSE;
-
- /* wait until EFC self-test is done */
- while(!(efcREG->PINS & EFC_SELF_TEST_DONE));
-
- /* check if EFC self-test error occurred */
- if (!(efcREG->PINS & EFC_SELF_TEST_ERROR) & !(efcREG->ERROR & SELF_TEST_ERROR))
- {
- /* check if EFC self-test error is set */
- if ((esmREG->ESTATUS4[0] & 0x100) != 0x100)
- {
- result = TRUE;
- }
- }
- return result;
-}
-
-/** @fn void efcClass1Error(void)
-* @brief EFUSE Class1 Error service routine
-*
-* This function is called if EFC ECC logic self-test.
-*/
-void efcClass1Error(void)
-{
- /* Autoload error was detected during device power-up, and device operation is not reliable. */
- while(1);
-}
-
-/** @fn void efcClass2Error(void)
-* @brief EFUSE Class2 Error service routine
-*
-* This function is called if EFC output is stuck-at-zero.
-*/
-void efcClass2Error(void)
-{
- /* The ECC logic inside the eFuse controller is not operational. Device operation is not reliable. */
- while(1);
-}
-
-/** @fn void fmcBus2Check(void)
-* @brief Self Check Flash Bus2 Interface
-*
-* This function self checks Flash Bus2 Interface
-*/
-void fmcBus2Check(void)
-{
- /* enable ECC logic inside FMC */
- flashWREG->FEDACCTRL1 = 0x000A060A;
-
- if (esmREG->ESTATUS1[0] & 0x40)
- {
- /* a 1-bit error was detected during flash OTP read by flash module
- run a self-check on ECC logic inside FMC */
-
- /* clear ESM group1 channel 6 flag */
- esmREG->ESTATUS1[0] = 0x40;
-
- fmcECCcheck();
- }
-
- /* no 2-bit or 1-bit error detected during power-up */
- else
- {
- fmcECCcheck();
- }
-}
-
-/** @fn void fmcECCcheck(void)
-* @brief Check Flash ECC Single Bit and multi Bit errors detection logic.
-*
-* This function Checks Flash ECC Single Bit and multi Bit errors detection logic.
-*/
-void fmcECCcheck(void)
-{
- volatile unsigned int otpread;
- volatile unsigned int temp;
-
- /* read location with deliberate 1-bit error */
- otpread = flash1bitError;
- if (esmREG->ESTATUS1[0] & 0x40)
- {
- /* 1-bit failure was indicated and corrected */
- flashWREG->FEDACSTATUS = 0x00010006;
-
- /* clear ESM group1 channel 6 flag */
- esmREG->ESTATUS1[0] = 0x40;
-
- /* read location with deliberate 2-bit error */
- otpread = flash2bitError;
- if (esmREG->ESTATUS1[2] & 0x80)
- {
- /* 2-bit failure was detected correctly */
- temp = flashWREG->FUNCERRADD;
- flashWREG->FEDACSTATUS = 0x00020100;
-
- /* clear ESM group3 channel 7 */
- esmREG->ESTATUS1[2] = 0x80;
-
- /* The nERROR pin will become inactive once the LTC counter expires */
- esmREG->KEY = 0x5;
-
- }
- else
- {
- /* ECC logic inside FMC cannot detect 2-bit error */
- fmcClass2Error();
- }
- }
- else
- {
- /* ECC logic inside FMC cannot detect 1-bit error */
- fmcClass2Error();
- }
-}
-
-/** @fn void fmcClass1Error(void)
-* @brief Flash Multi bit ECC error service routine detected during reset configuration.
-*
-* This function is called if Flash Multi bit ECC error detected during reset configuration.
-*/
-void fmcClass1Error(void)
-{
- /* there was a multi-bit error detected during the reset configuration word read from the OTP */
- /* This affects the device power domains, endianness, and exception handling ISA */
- /* Device operation is not reliable. */
- while(1);
-}
-
-/** @fn void fmcClass2Error(void)
-* @brief Flash OTP or EEPROM read Multi bit ECC error service routine
-*
-* This function is called if Flash OTP or EEPROM read Multi bit ECC error detected.
-*/
-void fmcClass2Error(void)
-{
- /* The ECC logic inside FMC used to protect against 1-bit and 2-bit errors in OTP and EEPROM banks */
- /* is not operational. Device operation is not reliable. */
- while(1);
-}
-
-/** @fn void checkB0RAMECC(void)
-* @brief Check TCRAM1 ECC error detection logic.
-*
-* This function checks TCRAM1 ECC error detection logic.
-*/
-void checkB0RAMECC(void)
-{
- volatile unsigned int ramread = 0;
-
- /* enable writes to ECC RAM, enable ECC error response */
- tcram1REG->RAMCTRL = 0x0005010A;
- tcram2REG->RAMCTRL = 0x0005010A;
-
- /* the first 1-bit error will cause an error response */
- tcram1REG->RAMTHRESHOLD = 0x1;
- tcram2REG->RAMTHRESHOLD = 0x1;
-
- /* allow SERR to be reported to ESM */
- tcram1REG->RAMINTCTRL = 0x1;
- tcram2REG->RAMINTCTRL = 0x1;
-
- /* cause a 1-bit ECC error */
- tcramA1bitError ^= 0x1;
-
- /* disable writes to ECC RAM */
- tcram1REG->RAMCTRL = 0x0005000A;
- tcram2REG->RAMCTRL = 0x0005000A;
-
- /* read from location with 1-bit ECC error */
- ramread = tcramA1bit;
-
- /* SERR not set in TCRAM1 or TCRAM2 modules */
- if (!((tcram1REG->RAMERRSTATUS & 1) || (tcram2REG->RAMERRSTATUS & 1)))
- {
- /* TCRAM module does not reflect 1-bit error reported by CPU */
- tcramClass2Error();
- }
- else
- {
- /* clear SERR flag */
- tcram1REG->RAMERRSTATUS = 0x1;
- tcram2REG->RAMERRSTATUS = 0x1;
-
- /* clear status flags for ESM group1 channels 26 and 28 */
- esmREG->ESTATUS1[0] = 0x14000000;
- }
-
- /* enable writes to ECC RAM, enable ECC error response */
- tcram1REG->RAMCTRL = 0x0005010A;
- tcram2REG->RAMCTRL = 0x0005010A;
-
- /* cause a 2-bit ECC error */
- tcramA2bitError ^= 0x3;
- ramread = tcram1REG->RAMCTRL;
- ramread = tcram2REG->RAMCTRL;
-
- /* read from location with 2-bit ECC error this will cause a data abort to be generated */
- ramread = tcramA2bit;
-}
-
-/** @fn void checkB1RAMECC(void)
-* @brief Check TCRAM2 ECC error detection logic.
-*
-* This function checks TCRAM2 ECC error detection logic.
-*/
-void checkB1RAMECC(void)
-{
- volatile unsigned int ramread = 0;
-
- /* enable writes to ECC RAM, enable ECC error response */
- tcram1REG->RAMCTRL = 0x0005010A;
- tcram2REG->RAMCTRL = 0x0005010A;
-
- /* the first 1-bit error will cause an error response */
- tcram1REG->RAMTHRESHOLD = 0x1;
- tcram2REG->RAMTHRESHOLD = 0x1;
-
- /* allow SERR to be reported to ESM */
- tcram1REG->RAMINTCTRL = 0x1;
- tcram2REG->RAMINTCTRL = 0x1;
-
- /* cause a 1-bit ECC error */
- tcramB1bitError ^= 0x1;
-
- /* disable writes to ECC RAM */
- tcram1REG->RAMCTRL = 0x0005000A;
- tcram2REG->RAMCTRL = 0x0005000A;
-
- /* read from location with 1-bit ECC error */
- ramread = tcramB1bit;
-
- /* SERR not set in TCRAM1 or TCRAM2 modules */
- if (!((tcram1REG->RAMERRSTATUS & 1) || (tcram2REG->RAMERRSTATUS & 1)))
- {
- /* TCRAM module does not reflect 1-bit error reported by CPU */
- tcramClass2Error();
- }
- else
- {
- /* clear SERR flag */
- tcram1REG->RAMERRSTATUS = 0x1;
- tcram2REG->RAMERRSTATUS = 0x1;
-
- /* clear status flags for ESM group1 channels 26 and 28 */
- esmREG->ESTATUS1[0] = 0x14000000;
- }
-
- /* enable writes to ECC RAM, enable ECC error response */
- tcram1REG->RAMCTRL = 0x0005010A;
- tcram2REG->RAMCTRL = 0x0005010A;
-
- /* cause a 2-bit ECC error */
- tcramB2bitError ^= 0x3;
-
- /* disable writes to ECC RAM */
- tcram1REG->RAMCTRL = 0x0005000A;
- tcram2REG->RAMCTRL = 0x0005000A;
-}
-
-/** @fn void tcramClass1Error(void)
-* @brief Error service routine called if TCRAM module cannot capture 2-bit error.
-*
-* Error service routine called if TCRAM module cannot respond to 2-bit error.
-*/
-void tcramClass1Error(void)
-{
- /* TCRAM module is not capable of responding to 2-bit error indicated by CPU.
- * Device operation is not reliable and not recommended.
- */
- while(1);
-}
-
-/** @fn void tcramClass2Error(void)
-* @brief Error service routine called if TCRAM module cannot capture 1-bit error.
-*
-* Error service routine called if TCRAM module cannot respond to 1-bit error.
-*/
-void tcramClass2Error(void)
-{
- /* TCRAM module is not capable of responding to 1-bit error indicated by CPU.
- * Device operation is possible, but is prone to future multi-bit errors not being detected.
- * Need custom handler here instead of the infinite loop.
- */
- while(1);
-}
-
-/** @fn void checkFlashECC(void)
-* @brief Check Flash ECC error detection logic.
-*
-* This function checks Flash ECC error detection logic.
-*/
-void checkFlashECC(void)
-{
- /* Routine to check operation of ECC logic inside CPU for accesses to program flash */
- volatile unsigned int flashread = 0;
-
- /* Flash Module ECC Response enabled */
- flashWREG->FEDACCTRL1 = 0x000A060A;
-
- /* Enable diagnostic mode and select diag mode 7 */
- flashWREG->FDIAGCTRL = 0x00050007;
-
- /* Select ECC diagnostic mode, single-bit to be corrupted */
- flashWREG->FPAROVR = 0x00005401;
-
- /* Set the trigger for the diagnostic mode */
- flashWREG->FDIAGCTRL |= 0x01000000;
-
- /* read a flash location from the mirrored memory map */
- flashread = flashBadECC;
-
- /* disable diagnostic mode */
- flashWREG->FDIAGCTRL = 0x000A0007;
-
- /* this will have caused a single-bit error to be generated and corrected by CPU */
- /* single-bit error not captured in flash module */
- if (!(flashWREG->FEDACSTATUS & 0x2))
- {
- flashClass2Error();
- }
- else
- {
- /* clear single-bit error flag */
- flashWREG->FEDACSTATUS = 0x2;
-
- /* clear ESM flag */
- esmREG->ESTATUS1[0] = 0x40;
-
- /* Enable diagnostic mode and select diag mode 7 */
- flashWREG->FDIAGCTRL = 0x00050007;
-
- /* Select ECC diagnostic mode, two bits of ECC to be corrupted */
- flashWREG->FPAROVR = 0x00005A03;
-
- /* Set the trigger for the diagnostic mode */
- flashWREG->FDIAGCTRL |= 0x01000000;
-
- /* read from flash location from mirrored memory map this will cause a data abort */
- flashread = flashBadECC;
- }
-
-}
-
-/** @fn void flashClass1Error(void)
-* @brief Error service routine called if Flash module cannot capture 2-bit error.
-*
-* Error service routine called if Flash module cannot capture 2-bit error.
-*/
-void flashClass1Error(void)
-{
- /* Flash module not able to capture 2-bit error from CPU.
- * Device operation not reliable.
- */
- while(1);
-
-}
-
-/** @fn void flashClass2Error(void)
-* @brief Error service routine called if Flash module cannot capture 1-bit error.
-*
-* Error service routine called if Flash module cannot capture 1-bit error.
-*/
-void flashClass2Error(void)
-{
- /* Flash module not able to capture 1-bit error from CPU.
- * Device operation possible if this weakness in diagnostic is okay.
- */
-}
-
-/** @fn void custom_dabort(void)
-* @brief Custom Data abort routine for the application.
-*
-* Custom Data abort routine for the application.
-*/
-void custom_dabort(void)
-{
- /* Need custom data abort handler here.
- * This data abort is not caused due to diagnostic checks of flash and TCRAM ECC logic.
- */
-}
-
-/** @fn void stcSelfCheckFail(void)
-* @brief STC Self test check fail service routine
-*
-* This function is called if STC Self test check fail.
-*/
-void stcSelfCheckFail(void)
-{
- /* CPU self-test controller's own self-test failed.
- * It is not possible to verify that STC is capable of indicating a CPU self-test error.
- * It is not recommended to continue operation.
- */
- while(1);
-}
-
-/** @fn void cpuSelfTestFail(void)
-* @brief CPU Self test check fail service routine
-*
-* This function is called if CPU Self test check fail.
-*/
-void cpuSelfTestFail(void)
-{
- /* CPU self-test has failed.
- * CPU operation is not reliable.
- */
- while(1);
-}
-
-
-/** @fn void vimParityCheck(void)
-* @brief Routine to check VIM RAM parity error detection and signaling mechanism
-*
-* Routine to check VIM RAM parity error detection and signaling mechanism
-*/
-void vimParityCheck(void)
-{
- volatile unsigned int vimramread = 0;
-
- /* Enable parity checking and parity test mode */
- VIM_PARCTL = 0x0000010A;
-
- /* flip a bit in the VIM RAM parity location */
- VIMRAMPARLOC ^= 0x1;
-
- /* disable parity test mode */
- VIM_PARCTL = 0x0000000A;
-
- /* cause parity error */
- vimramread = VIMRAMLOC;
-
- /* check if ESM group1 channel 15 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x8000))
- {
- /* VIM RAM parity error was not flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop. */
- while(1);
- }
- else
- {
- /* clear VIM RAM parity error flag in VIM */
- VIM_PARFLG = 0x1;
-
- /* clear ESM group1 channel 15 flag */
- esmREG->ESTATUS1[0] = 0x8000;
- }
-}
-
-/** @fn void dmaParityCheck(void)
-* @brief Routine to check DMA control packet RAM parity error detection and signaling mechanism
-*
-* Routine to check DMA control packet RAM parity error detection and signaling mechanism
-*/
-void dmaParityCheck(void)
-{
- volatile unsigned int dmaread = 0;
-
- /* Enable parity checking and parity test mode */
- DMA_PARCR = 0x0000010A;
-
- /* Flip a bit in DMA RAM parity location */
- DMARAMPARLOC ^= 0x1;
-
- /* Disable parity test mode */
- DMA_PARCR = 0x0000000A;
-
- /* Cause parity error */
- dmaread = DMARAMLOC;
-
- /* Check if ESM group1 channel 3 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x8))
- {
- /* DMA RAM parity error was not flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop. */
- while(1);
- }
- else
- {
- /* clear DMA parity error flag in DMA */
- DMA_PARADDR = 0x01000000;
-
- /* clear ESM group1 channel 3 flag */
- esmREG->ESTATUS1[0] = 0x8;
- }
-
-}
-
-/** @fn void het1ParityCheck(void)
-* @brief Routine to check HET1 RAM parity error detection and signaling mechanism
-*
-* Routine to check HET1 RAM parity error detection and signaling mechanism
-*/
-void het1ParityCheck(void)
-{
- volatile unsigned int nhetread = 0;
-
- /* Set TEST mode and enable parity checking */
- hetREG1->PCREG = 0x0000010A;
-
- /* flip parity bit */
- NHET1RAMPARLOC ^= 0x1;
-
- /* Disable TEST mode */
- hetREG1->PCREG = 0x0000000A;
-
- /* read to cause parity error */
- nhetread = NHET1RAMLOC;
-
- /* check if ESM group1 channel 7 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x80))
- {
- /* NHET1 RAM parity error was not flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop. */
- while(1);
- }
- else
- {
- /* clear ESM group1 channel 7 flag */
- esmREG->ESTATUS1[0] = 0x80;
- }
-}
-
-/** @fn void htu1ParityCheck(void)
-* @brief Routine to check HTU1 RAM parity error detection and signaling mechanism
-*
-* Routine to check HTU1 RAM parity error detection and signaling mechanism
-*/
-void htu1ParityCheck(void)
-{
- volatile unsigned int hturead = 0;
- /* Enable parity and TEST mode */
- htuREG1->PCR = 0x0000010A;
-
- /* flip parity bit */
- HTU1PARLOC ^= 0x1;
-
- /* Disable parity RAM test mode */
- htuREG1->PCR = 0x0000000A;
-
- /* read to cause parity error */
- hturead = HTU1RAMLOC;
-
- /* check if ESM group1 channel 8 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x100))
- {
- /* HTU1 RAM parity error was not flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop. */
- while(1);
- }
- else
- {
- /* Clear HTU parity error flag */
- htuREG1->PAR = 0x00010000;
- esmREG->ESTATUS1[0] = 0x100;
- }
-}
-
-/** @fn void het2ParityCheck(void)
-* @brief Routine to check HET2 RAM parity error detection and signaling mechanism
-*
-* Routine to check HET2 RAM parity error detection and signaling mechanism
-*/
-void het2ParityCheck(void)
-{
- volatile unsigned int nhetread = 0;
-
- /* Set TEST mode and enable parity checking */
- hetREG2->PCREG = 0x0000010A;
-
- /* flip parity bit */
- NHET2RAMPARLOC ^= 0x1;
-
- /* Disable TEST mode */
- hetREG2->PCREG = 0x0000000A;
-
- /* read to cause parity error */
- nhetread = NHET2RAMLOC;
-
- /* check if ESM group1 channel 7 or 34 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x80) && !(esmREG->ESTATUS4[0] & 0x4))
- {
- /* NHET2 RAM parity error was not flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop. */
- while(1);
- }
- else
- {
- /* clear ESM group1 channel 7 flag */
- esmREG->ESTATUS1[0] = 0x80;
-
- /* clear ESM group1 channel 34 flag */
- esmREG->ESTATUS4[0] = 0x4;
- }
-}
-
-/** @fn void htu2ParityCheck(void)
-* @brief Routine to check HTU2 RAM parity error detection and signaling mechanism
-*
-* Routine to check HTU2 RAM parity error detection and signaling mechanism
-*/
-void htu2ParityCheck(void)
-{
- volatile unsigned int hturead = 0;
-
- /* Enable parity and TEST mode */
- htuREG2->PCR = 0x0000010A;
-
- /* flip parity bit */
- HTU2PARLOC ^= 0x1;
-
- /* Disable parity RAM test mode */
- htuREG2->PCR = 0x0000000A;
-
- /* read to cause parity error */
- hturead = HTU2RAMLOC;
-
- /* check if ESM group1 channel 8 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x100))
- {
- /* HTU2 RAM parity error was not flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop. */
- while(1);
- }
- else
- {
- /* Clear HTU parity error flag */
- htuREG2->PAR = 0x00010000;
- esmREG->ESTATUS1[0] = 0x100;
- }
-}
-
-/** @fn void adc1ParityCheck(void)
-* @brief Routine to check ADC1 RAM parity error detection and signaling mechanism
-*
-* Routine to check ADC1 RAM parity error detection and signaling mechanism
-*/
-void adc1ParityCheck(void)
-{
- volatile unsigned int adcramread = 0;
-
- /* Set the TEST bit in the PARCR and enable parity checking */
- adcREG1->PARCR = 0x10A;
-
- /* Invert the parity bits inside the ADC1 RAM's first location */
- adcPARRAM1 = ~(adcPARRAM1);
-
- /* clear the TEST bit */
- adcREG1->PARCR = 0x00A;
-
- /* This read is expected to trigger a parity error */
- adcramread = adcRAM1;
-
- /* Check for ESM group1 channel 19 to be flagged */
- if (!(esmREG->ESTATUS1[0] & 0x80000))
- {
- /* no ADC1 RAM parity error was flagged to ESM */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear ADC1 RAM parity error flag */
- esmREG->ESTATUS1[0] = 0x80000;
- }
-}
-
-/** @fn void adc2ParityCheck(void)
-* @brief Routine to check ADC2 RAM parity error detection and signaling mechanism
-*
-* Routine to check ADC2 RAM parity error detection and signaling mechanism
-*/
-void adc2ParityCheck(void)
-{
- volatile unsigned int adcramread = 0;
-
- /* Set the TEST bit in the PARCR and enable parity checking */
- adcREG2->PARCR = 0x10A;
-
- /* Invert the parity bits inside the ADC2 RAM's first location */
- adcPARRAM2 = ~(adcPARRAM2);
-
- /* clear the TEST bit */
- adcREG2->PARCR = 0x00A;
-
- /* This read is expected to trigger a parity error */
- adcramread = adcRAM2;
-
- /* Check for ESM group1 channel 1 to be flagged */
- if (!(esmREG->ESTATUS1[0] & 0x2))
- {
- /* no ADC2 RAM parity error was flagged to ESM */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear ADC2 RAM parity error flag */
- esmREG->ESTATUS1[0] = 0x2;
- }
-}
-
-/** @fn void can1ParityCheck(void)
-* @brief Routine to check CAN1 RAM parity error detection and signaling mechanism
-*
-* Routine to check CAN1 RAM parity error detection and signaling mechanism
-*/
-void can1ParityCheck(void)
-{
- volatile unsigned int canread = 0;
-
- /* Disable parity, init mode, TEST mode */
- canREG1->CTL = 0x00001481;
-
- /* Enable RAM Direct Access mode */
- canREG1->TEST = 0x00000200;
-
- /* flip the parity bit */
- canPARRAM1 ^= 0x00001000;
-
- /* Enable parity, disable init, still TEST mode */
- canREG1->CTL = 0x00002880;
-
- /* Read location with parity error */
- canread = canRAM1;
-
- /* check if ESM group1 channel 21 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x00200000))
- {
- /* No DCAN1 RAM parity error was flagged to ESM */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear ESM group1 channel 21 flag */
- esmREG->ESTATUS1[0] = 0x00200000;
-
- /* disable TEST mode */
- canREG1->CTL = 0x00002800;
- }
-}
-
-/** @fn void can2ParityCheck(void)
-* @brief Routine to check CAN2 RAM parity error detection and signaling mechanism
-*
-* Routine to check CAN2 RAM parity error detection and signaling mechanism
-*/
-void can2ParityCheck(void)
-{
- volatile unsigned int canread = 0;
-
- /* Disable parity, init mode, TEST mode */
- canREG2->CTL = 0x00001481;
-
- /* Enable RAM Direct Access mode */
- canREG2->TEST = 0x00000200;
-
- /* flip the parity bit */
- canPARRAM2 ^= 0x00001000;
-
- /* Enable parity, disable init, still TEST mode */
- canREG2->CTL = 0x00002880;
-
- /* Read location with parity error */
- canread = canRAM2;
-
- /* check if ESM group1 channel 23 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x00800000))
- {
- /* No DCAN2 RAM parity error was flagged to ESM */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear ESM group1 channel 23 flag */
- esmREG->ESTATUS1[0] = 0x00800000;
-
- /* disable TEST mode */
- canREG2->CTL = 0x00002800;
- }
-}
-
-/** @fn void can3ParityCheck(void)
-* @brief Routine to check CAN3 RAM parity error detection and signaling mechanism
-*
-* Routine to check CAN3 RAM parity error detection and signaling mechanism
-*/
-void can3ParityCheck(void)
-{
- volatile unsigned int canread = 0;
-
- /* Disable parity, init mode, TEST mode */
- canREG3->CTL = 0x00001481;
-
- /* Enable RAM Direct Access mode */
- canREG3->TEST = 0x00000200;
-
- /* flip the parity bit */
- canPARRAM3 ^= 0x00001000;
-
- /* Enable parity, disable init, still TEST mode */
- canREG3->CTL = 0x00002880;
-
- /* Read location with parity error */
- canread = canRAM3;
-
- /* check if ESM group1 channel 22 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x00400000))
- {
- /* No DCAN3 RAM parity error was flagged to ESM */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear ESM group1 channel 22 flag */
- esmREG->ESTATUS1[0] = 0x00400000;
-
- /* disable TEST mode */
- canREG3->CTL = 0x00002800;
- }
-}
-
-/** @fn void mibspi1ParityCheck(void)
-* @brief Routine to check MIBSPI1 RAM parity error detection and signaling mechanism
-*
-* Routine to check MIBSPI1 RAM parity error detection and signaling mechanism
-*/
-void mibspi1ParityCheck(void)
-{
- volatile unsigned int spiread = 0;
-
- /* enable multi-buffered mode */
- mibspiREG1->MIBSPIE = 0x1;
-
- /* enable parity error detection */
- mibspiREG1->EDEN = 0xA;
-
- /* enable parity test mode */
- mibspiREG1->PTESTEN = 1;
-
- /* flip bit 0 of the parity location */
- mibspiPARRAM1 ^= 0x1;
-
- /* disable parity test mode */
- mibspiREG1->PTESTEN = 0;
-
- /* read from MibSPI1 RAM to cause parity error */
- spiread = *(unsigned int *) mibspiRAM1;
-
- /* check if ESM group1 channel 17 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x20000))
- {
- /* No MibSPI1 RAM parity error was flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear parity error flags */
- mibspiREG1->UERRSTAT = 0x3;
-
- /* clear ESM group1 channel 17 flag */
- esmREG->ESTATUS1[0] = 0x20000;
-
- /* enable parity test mode */
- mibspiREG1->PTESTEN = 1;
-
- /* Revert back to correct data, flip bit 0 of the parity location */
- mibspiPARRAM1 ^= 0x1;
-
- /* disable parity test mode */
- mibspiREG1->PTESTEN = 0;
- }
-}
-
-/** @fn void mibspi3ParityCheck(void)
-* @brief Routine to check MIBSPI3 RAM parity error detection and signaling mechanism
-*
-* Routine to check MIBSPI3 RAM parity error detection and signaling mechanism
-*/
-void mibspi3ParityCheck(void)
-{
- volatile unsigned int spiread = 0;
-
- /* enable multi-buffered mode */
- mibspiREG3->MIBSPIE = 0x1;
-
- /* enable parity test mode */
- mibspiREG3->PTESTEN = 1;
-
- /* flip bit 0 of the parity location */
- mibspiPARRAM3 ^= 0x1;
-
- /* enable parity error detection */
- mibspiREG3->EDEN = 0xA;
-
- /* disable parity test mode */
- mibspiREG3->PTESTEN = 0;
-
- /* read from MibSPI3 RAM to cause parity error */
- spiread = *(unsigned int *) mibspiRAM3;
-
- /* check if ESM group1 channel 18 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x40000))
- {
- /* No MibSPI3 RAM parity error was flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear parity error flags */
- mibspiREG3->UERRSTAT = 0x3;
-
- /* clear ESM group1 channel 18 flag */
- esmREG->ESTATUS1[0] = 0x40000;
-
- /* enable parity test mode */
- mibspiREG3->PTESTEN = 1;
-
- /* Revert back to correct data, flip bit 0 of the parity location */
- mibspiPARRAM3 ^= 0x1;
-
- /* disable parity test mode */
- mibspiREG3->PTESTEN = 0;
- }
-}
-
-/** @fn void mibspi5ParityCheck(void)
-* @brief Routine to check MIBSPI5 RAM parity error detection and signaling mechanism
-*
-* Routine to check MIBSPI5 RAM parity error detection and signaling mechanism
-*/
-void mibspi5ParityCheck(void)
-{
- volatile unsigned int spiread = 0;
-
- /* enable multi-buffered mode */
- mibspiREG5->MIBSPIE = 0x1;
-
- /* enable parity test mode */
- mibspiREG5->PTESTEN = 1;
-
- /* flip bit 0 of the parity location */
- mibspiPARRAM5 ^= 0x1;
-
- /* enable parity error detection */
- mibspiREG5->EDEN = 0xA;
-
- /* disable parity test mode */
- mibspiREG5->PTESTEN = 0;
-
- /* read from MibSPI5 RAM to cause parity error */
- spiread = *(unsigned int *) mibspiRAM5;
-
- /* check if ESM group1 channel 24 is flagged */
- if (!(esmREG->ESTATUS1[0] & 0x01000000))
- {
- /* No MibSPI5 RAM parity error was flagged to ESM. */
- /* Need custom routine to handle this failure instead of the infinite loop */
- while(1);
- }
- else
- {
- /* clear parity error flags */
- mibspiREG5->UERRSTAT = 0x3;
-
- /* clear ESM group1 channel 24 flag */
- esmREG->ESTATUS1[0] = 0x01000000;
-
- /* enable parity test mode */
- mibspiREG5->PTESTEN = 1;
-
- /* Revert back to correct data, flip bit 0 of the parity location */
- mibspiPARRAM5 ^= 0x1;
-
- /* disable parity test mode */
- mibspiREG5->PTESTEN = 0;
- }
-}
+++ /dev/null
-/** @file sys_startup.c
-* @brief Startup Source File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - Include Files
-* - Type Definitions
-* - External Functions
-* - VIM RAM Setup
-* - Startup Routine
-* .
-* which are relevant for the Startup.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* Include Files */
-
-#include "base.h"
-#include "sys/system.h"
-#include "sys/sys_vim.h"
-#include "sys/sys_core.h"
-#include "sys/sys_selftest.h"
-#include "sys/ti_drv_esm.h"
-
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/* Type Definitions */
-
-typedef void (*handler_fptr)(const uint8_t *in, uint8_t *out);
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-
-/* External Functions */
-
-#pragma WEAK(__TI_Handler_Table_Base)
-#pragma WEAK(__TI_Handler_Table_Limit)
-#pragma WEAK(__TI_CINIT_Base)
-#pragma WEAK(__TI_CINIT_Limit)
-
-extern uint32_t __TI_Handler_Table_Base;
-extern uint32_t __TI_Handler_Table_Limit;
-extern uint32_t __TI_CINIT_Base;
-extern uint32_t __TI_CINIT_Limit;
-extern uint32_t __TI_PINIT_Base;
-extern uint32_t __TI_PINIT_Limit;
-extern uint32_t * __binit__;
-
-extern void main(void);
-extern void exit(void);
-
-extern void muxInit(void);
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-
-/* Vim Ram Definition */
-/** @struct vimRam
-* @brief Vim Ram Definition
-*
-* This type is used to access the Vim Ram.
-*/
-/** @typedef vimRAM_t
-* @brief Vim Ram Type Definition
-*
-* This type is used to access the Vim Ram.
-*/
-typedef volatile struct vimRam
-{
- t_isrFuncPTR ISR[VIM_CHANNELS + 1];
-} vimRAM_t;
-
-#define vimRAM ((vimRAM_t *)0xFFF82000U)
-
-static const t_isrFuncPTR s_vim_init[] =
-{
- &phantomInterrupt,
- &esmHighInterrupt, // 0
- &phantomInterrupt,
-#if FREERTOS_VERSION_NUMBER_MAYOR == 7 && \
- FREERTOS_VERSION_NUMBER_MINOR == 0 && \
- FREERTOS_VERSION_NUMBER_REV == 2
- &vPreemptiveTick, // FreeRTOS 7.0.2
-#else
- &vPortPreemptiveTick, // FreeRTOS 7.4.0 and 7.4.2
-#endif
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 5
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 10
- &phantomInterrupt,
- &mibspi1HighLevelInterrupt,
- &linHighLevelInterrupt,
- &phantomInterrupt,
- &adc1Group1Interrupt, // 15
- &can1HighLevelInterrupt,
- &spi2HighLevelInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 20
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 25
- &mibspi1LowLevelInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &spi2LowLevelInterrupt, // 30
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &can2HighLevelInterrupt, // 35
- &phantomInterrupt,
- &mibspi3HighInterruptLevel,
- &mibspi3LowLevelInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 40
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &can3HighLevelInterrupt, // 45
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &spi4HighLevelInterrupt,
- &phantomInterrupt, // 50
- &adc2Group1Interrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &spi4LowLevelInterrupt,
- &phantomInterrupt, // 55
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 60
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &sciHighLevelInterrupt,
- &phantomInterrupt, // 65
- &i2cInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 70
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 75
- &phantomInterrupt,
- &EMACCore0TxIsr,
- &phantomInterrupt,
- &EMACCore0RxIsr,
- &phantomInterrupt, // 80
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 85
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 90
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 95
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt, // 100
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
- &phantomInterrupt,
-};
-
-
-/* Startup Routine */
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
-#pragma INTERRUPT(_c_int00, RESET)
-
-void _c_int00()
-{
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-
- /* Initialize Core Registers to avoid CCM Error */
- _coreInitRegisters_();
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- /* Initialize Stack Pointers */
- _coreInitStackPointer_();
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
- /* Implement work-around for CCM-R4 issue on silicon revision A */
- if (DEVICE_ID_REV == 0x802AAD05)
- {
- _esmCcmErrorsClear_();
- }
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- /* Enable response to ECC errors indicated by CPU for accesses to flash */
- flashWREG->FEDACCTRL1 = 0x000A060A;
-
- /* Enable CPU Event Export */
- /* This allows the CPU to signal any single-bit or double-bit errors detected
- * by its ECC logic for accesses to program flash or data RAM.
- */
- _coreEnableEventBusExport_();
-
- /* Enable CPU ECC checking for ATCM (flash accesses) */
- _coreEnableFlashEcc_();
-
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
- /* Reset handler: the following instructions read from the system exception status register
- * to identify the cause of the CPU reset.
- */
-
- /* check for power-on reset condition */
- if ((SYS_EXCEPTION & POWERON_RESET) != 0)
- {
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-
- /* clear all reset status flags */
- SYS_EXCEPTION = 0xFFFF;
-
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-
- /* continue with normal start-up sequence */
- }
- else if ((SYS_EXCEPTION & OSC_FAILURE_RESET) != 0)
- {
- /* Reset caused due to oscillator failure.
- Add user code here to handle oscillator failure */
-
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
- }
- else if ((SYS_EXCEPTION & WATCHDOG_RESET) !=0 )
- {
- /* Reset caused due
- * 1) windowed watchdog violation - Add user code here to handle watchdog violation.
- * 2) ICEPICK Reset - After loading code via CCS / System Reset through CCS
- */
- /* Check the WatchDog Status register */
- if(WATCHDOG_STATUS != 0U)
- {
- /* Add user code here to handle watchdog violation. */
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- /* Clear the Watchdog reset flag in Exception Status register */
- SYS_EXCEPTION = WATCHDOG_RESET;
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
- }
- else
- {
- /* Clear the ICEPICK reset flag in Exception Status register */
- SYS_EXCEPTION = ICEPICK_RESET;
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
- }
- }
- else if ((SYS_EXCEPTION & CPU_RESET) !=0 )
- {
- /* Reset caused due to CPU reset.
- CPU reset can be caused by CPU self-test completion, or
- by toggling the "CPU RESET" bit of the CPU Reset Control Register. */
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-
- /* clear all reset status flags */
- SYS_EXCEPTION = CPU_RESET;
-
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- }
- else if ((SYS_EXCEPTION & SW_RESET) != 0)
- {
- /* Reset caused due to software reset.
- Add user code to handle software reset. */
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
- }
- else
- {
- /* Reset caused by nRST being driven low externally.
- Add user code to handle external reset. */
-
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
- }
-
- /* Check if there were ESM group3 errors during power-up.
- * These could occur during eFuse auto-load or during reads from flash OTP
- * during power-up. Device operation is not reliable and not recommended
- * in this case.
- * An ESM group3 error only drives the nERROR pin low. An external circuit
- * that monitors the nERROR pin must take the appropriate action to ensure that
- * the system is placed in a safe state, as determined by the application.
- */
- if (esmREG->ESTATUS1[2])
- {
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
- while(1);
- }
-
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-
- /* Initialize System - Clock, Flash settings with Efuse self check */
- systemInit();
-
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-
- /* Run a diagnostic check on the memory self-test controller.
- * This function chooses a RAM test algorithm and runs it on an on-chip ROM.
- * The memory self-test is expected to fail. The function ensures that the PBIST controller
- * is capable of detecting and indicating a memory self-test failure.
- */
- pbistSelfCheck();
-
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
-
-
- /* Run PBIST on CPU RAM.
- * The PBIST controller needs to be configured separately for single-port and dual-port SRAMs.
- * The CPU RAM is a single-port memory. The actual "RAM Group" for all on-chip SRAMs is defined in the
- * device datasheet.
- */
- pbistRun(0x08300020, /* ESRAM Single Port PBIST */
- PBIST_March13N_SP);
-
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-
- /* Wait for PBIST for CPU RAM to be completed */
- while(!pbistIsTestCompleted());
-
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
- /* Check if CPU RAM passed the self-test */
- if( pbistIsTestPassed() != TRUE)
- {
- /* CPU RAM failed the self-test.
- * Need custom handler to check the memory failure
- * and to take the appropriate next step.
- */
- if(pbistPortTestStatus(PBIST_PORT0) != TRUE)
- {
- memoryPort0TestFailNotification(pbistREG->RGS, pbistREG->RDS, pbistREG->FSRA0, pbistREG->FSRDL0);
- }
- else if(pbistPortTestStatus(PBIST_PORT1) != TRUE)
- {
- memoryPort1TestFailNotification(pbistREG->RGS, pbistREG->RDS, pbistREG->FSRA1, pbistREG->FSRDL1);
- }
- else
- {
- while(1);
- }
- }
-
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-
- /* Disable PBIST clocks and disable memory self-test mode */
- pbistStop();
-
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-
- /* Initialize CPU RAM.
- * This function uses the system module's hardware for auto-initialization of memories and their
- * associated protection schemes. The CPU RAM is initialized by setting bit 0 of the MSIENA register.
- * Hence the value 0x1 passed to the function.
- * This function will initialize the entire CPU RAM and the corresponding ECC locations.
- */
- _memoryInit_(0x1);
-
-/* USER CODE BEGIN (31) */
-/* USER CODE END */
-
- /* Enable ECC checking for TCRAM accesses.
- * This function enables the CPU's ECC logic for accesses to B0TCM and B1TCM.
- */
- _coreEnableRamEcc_();
-
-/* USER CODE BEGIN (32) */
-/* USER CODE END */
-
- /* Start PBIST on all dual-port memories */
- pbistRun( 0x00000000 /* EMAC Dual Port PBIST */
- | 0x00000000 /* USB Dual Port PBIST for RMx / Reserved for TMS570x */
- | 0x00000800 /* DMA Dual Port PBIST */
- | 0x00000200 /* VIM Dual Port PBIST */
- | 0x00000040 /* MIBSPI1 Dual Port PBIST */
- | 0x00000080 /* MIBSPI3 Dual Port PBIST */
- | 0x00000100 /* MIBSPI5 Dual Port PBIST */
- | 0x00000004 /* CAN1 Dual Port PBIST */
- | 0x00000008 /* CAN2 Dual Port PBIST */
- | 0x00000010 /* CAN3 Dual Port PBIST */
- | 0x00000400 /* ADC1 Dual Port PBIST */
- | 0x00020000 /* ADC2 Dual Port PBIST */
- | 0x00001000 /* HET1 Dual Port PBIST */
- | 0x00040000 /* HET2 Dual Port PBIST */
- | 0x00002000 /* HTU1 Dual Port PBIST */
- | 0x00080000 /* HTU2 Dual Port PBIST */
- | 0x00004000 /* RTP Dual Port PBIST */
- | 0x00000000 /* FTU Dual Port PBIST for TMS570x / Reserved for RMx */
- | 0x00008000 /* FRAY Dual Port PBIST for TMS570x / Reserved for RMx */
- , PBIST_March13N_DP);
-
-/* USER CODE BEGIN (33) */
-/* USER CODE END */
-
-
- /* Test the CPU ECC mechanism for RAM accesses.
- * The checkBxRAMECC functions cause deliberate single-bit and double-bit errors in TCRAM accesses
- * by corrupting 1 or 2 bits in the ECC. Reading from the TCRAM location with a 2-bit error
- * in the ECC causes a data abort exception. The data abort handler is written to look for
- * deliberately caused exception and to return the code execution to the instruction
- * following the one that caused the abort.
- */
- checkB0RAMECC();
- tcram1REG->RAMCTRL &= ~(0x00000100); /* disable writes to ECC RAM */
- tcram2REG->RAMCTRL &= ~(0x00000100);
-
- checkB1RAMECC();
- tcram1REG->RAMCTRL &= ~(0x00000100); /* disable writes to ECC RAM */
- tcram2REG->RAMCTRL &= ~(0x00000100);
-
-/* USER CODE BEGIN (34) */
-/* USER CODE END */
-
-
- /* Test the CPU ECC mechanism for Flash accesses.
- * The checkFlashECC function uses the flash interface module's diagnostic mode 7
- * to create single-bit and double-bit errors in CPU accesses to the flash. A double-bit
- * error on reading from flash causes a data abort exception.
- * The data abort handler is written to look for deliberately caused exception and
- * to return the code execution to the instruction following the one that was aborted.
- *
- */
- checkFlashECC();
- flashWREG->FDIAGCTRL = 0x000A0007; /* disable flash diagnostic mode */
-
-/* USER CODE BEGIN (35) */
-/* USER CODE END */
-
-/* USER CODE BEGIN (36) */
-/* USER CODE END */
-
- /* Wait for PBIST for CPU RAM to be completed */
- while(!pbistIsTestCompleted());
-
-/* USER CODE BEGIN (37) */
-/* USER CODE END */
-
- /* Check if CPU RAM passed the self-test */
- if( pbistIsTestPassed() != TRUE)
- {
-
-/* USER CODE BEGIN (38) */
-/* USER CODE END */
-
- /* CPU RAM failed the self-test.
- * Need custom handler to check the memory failure
- * and to take the appropriate next step.
- */
- if(pbistPortTestStatus(PBIST_PORT0) != TRUE)
- {
- memoryPort0TestFailNotification(pbistREG->RGS, pbistREG->RDS, pbistREG->FSRA0, pbistREG->FSRDL0);
- }
- else if(pbistPortTestStatus(PBIST_PORT1) != TRUE)
- {
- memoryPort1TestFailNotification(pbistREG->RGS, pbistREG->RDS, pbistREG->FSRA1, pbistREG->FSRDL1);
- }
- else
- {
- while(1);
- }
- }
-
-/* USER CODE BEGIN (39) */
-/* USER CODE END */
-
- /* Disable PBIST clocks and disable memory self-test mode */
- pbistStop();
-
-
-/* USER CODE BEGIN (45) */
-/* USER CODE END */
-
- /* Release the MibSPI1 modules from local reset.
- * This will cause the MibSPI1 RAMs to get initialized along with the parity memory.
- */
- mibspiREG1->GCR0 = 0x1;
-
- /* Release the MibSPI3 modules from local reset.
- * This will cause the MibSPI3 RAMs to get initialized along with the parity memory.
- */
- mibspiREG3->GCR0 = 0x1;
-
- /* Release the MibSPI5 modules from local reset.
- * This will cause the MibSPI5 RAMs to get initialized along with the parity memory.
- */
- mibspiREG5->GCR0 = 0x1;
-
-/* USER CODE BEGIN (46) */
-/* USER CODE END */
-
- /* Initialize all on-chip SRAMs except for MibSPIx RAMs
- * The MibSPIx modules have their own auto-initialization mechanism which is triggered
- * as soon as the modules are brought out of local reset.
- */
- /* The system module auto-init will hang on the MibSPI RAM if the module is still in local reset.
- */
- _memoryInit_( 1 << 1 /* DMA Memory Init */
- | 1 << 2 /* VIM Memory Init */
- | 1 << 5 /* CAN1 Memory Init */
- | 1 << 6 /* CAN2 Memory Init */
- | 1 << 10 /* CAN3 Memory Init */
- | 1 << 8 /* ADC1 Memory Init */
- | 1 << 14 /* ADC2 Memory Init */
- | 1 << 3 /* HET1 Memory Init */
- | 1 << 4 /* HTU1 Memory Init */
- | 1 << 15 /* HET2 Memory Init */
- | 1 << 16 /* HTU2 Memory Init */
- | 1 << 13); /* Reserved for RMx Family / FTU Memory Init for TMS570x Family */
-
- /* Test the parity protection mechanism for peripheral RAMs
- * The following memories have parity protection that needs to be checked:
- * VIM, DMA, ADC1, ADC2, NHET1, NHET2, HTU1, HTU2, FlexRay, FTU,
- * MibSPI1, MibSPI3, MibSPI5, DCAN1, DCAN2, DCAN3 based on user selection
- */
-
-/* USER CODE BEGIN (47) */
-/* USER CODE END */
-
- het1ParityCheck();
-
-/* USER CODE BEGIN (48) */
-/* USER CODE END */
-
- htu1ParityCheck();
-
-/* USER CODE BEGIN (49) */
-/* USER CODE END */
-
- het2ParityCheck();
-
-/* USER CODE BEGIN (50) */
-/* USER CODE END */
-
- htu2ParityCheck();
-
-/* USER CODE BEGIN (51) */
-/* USER CODE END */
-
- adc1ParityCheck();
-
-/* USER CODE BEGIN (52) */
-/* USER CODE END */
-
- adc2ParityCheck();
-
-/* USER CODE BEGIN (53) */
-/* USER CODE END */
-
- can1ParityCheck();
-
-/* USER CODE BEGIN (54) */
-/* USER CODE END */
-
- can2ParityCheck();
-
-/* USER CODE BEGIN (55) */
-/* USER CODE END */
-
- can3ParityCheck();
-
-/* USER CODE BEGIN (56) */
-/* USER CODE END */
-
- vimParityCheck();
-
-/* USER CODE BEGIN (57) */
-/* USER CODE END */
-
- dmaParityCheck();
-
-
-/* USER CODE BEGIN (58) */
-/* USER CODE END */
-
- while (mibspiREG1->BUFINIT); /* wait for MibSPI1 RAM to complete initialization */
- while (mibspiREG3->BUFINIT); /* wait for MibSPI3 RAM to complete initialization */
- while (mibspiREG5->BUFINIT); /* wait for MibSPI5 RAM to complete initialization */
-
-/* USER CODE BEGIN (59) */
-/* USER CODE END */
-
- mibspi1ParityCheck();
-
-/* USER CODE BEGIN (60) */
-/* USER CODE END */
-
- mibspi3ParityCheck();
-
-/* USER CODE BEGIN (61) */
-/* USER CODE END */
-
- mibspi5ParityCheck();
-
-
-/* USER CODE BEGIN (62) */
-/* USER CODE END */
-
-
-/* USER CODE BEGIN (63) */
-/* USER CODE END */
-
-
- /* Initialize VIM table */
- {
- uint32_t i;
-
- for (i = 0; i < (VIM_CHANNELS + 1); i++)
- {
- vimRAM->ISR[i] = s_vim_init[i];
- }
- }
-
- /* set IRQ/FIQ priorities */
- vimREG->FIRQPR0 = SYS_FIQ
- | (SYS_FIQ << 1U)
- | (SYS_IRQ << 2U)
- | (SYS_IRQ << 3U)
- | (SYS_IRQ << 4U)
- | (SYS_IRQ << 5U)
- | (SYS_IRQ << 6U)
- | (SYS_IRQ << 7U)
- | (SYS_IRQ << 8U)
- | (SYS_IRQ << 9U)
- | (SYS_IRQ << 10U)
- | (SYS_IRQ << 11U)
- | (SYS_IRQ << 12U)
- | (SYS_IRQ << 13U)
- | (SYS_IRQ << 14U)
- | (SYS_IRQ << 15U)
- | (SYS_IRQ << 16U)
- | (SYS_IRQ << 17U)
- | (SYS_IRQ << 18U)
- | (SYS_IRQ << 19U)
- | (SYS_IRQ << 20U)
- | (SYS_IRQ << 21U)
- | (SYS_IRQ << 22U)
- | (SYS_IRQ << 23U)
- | (SYS_IRQ << 24U)
- | (SYS_IRQ << 25U)
- | (SYS_IRQ << 26U)
- | (SYS_IRQ << 27U)
- | (SYS_IRQ << 28U)
- | (SYS_IRQ << 29U)
- | (SYS_IRQ << 30U)
- | (SYS_IRQ << 31U);
-
- vimREG->FIRQPR1 = SYS_IRQ
- | (SYS_IRQ << 1U)
- | (SYS_IRQ << 2U)
- | (SYS_IRQ << 3U)
- | (SYS_IRQ << 4U)
- | (SYS_IRQ << 5U)
- | (SYS_IRQ << 6U)
- | (SYS_IRQ << 7U)
- | (SYS_IRQ << 8U)
- | (SYS_IRQ << 9U)
- | (SYS_IRQ << 10U)
- | (SYS_IRQ << 11U)
- | (SYS_IRQ << 12U)
- | (SYS_IRQ << 13U)
- | (SYS_IRQ << 14U)
- | (SYS_IRQ << 15U)
- | (SYS_IRQ << 16U)
- | (SYS_IRQ << 17U)
- | (SYS_IRQ << 18U)
- | (SYS_IRQ << 19U)
- | (SYS_IRQ << 20U)
- | (SYS_IRQ << 21U)
- | (SYS_IRQ << 22U)
- | (SYS_IRQ << 23U)
- | (SYS_IRQ << 24U)
- | (SYS_IRQ << 25U)
- | (SYS_IRQ << 26U)
- | (SYS_IRQ << 27U)
- | (SYS_IRQ << 28U)
- | (SYS_IRQ << 29U)
- | (SYS_IRQ << 30U)
- | (SYS_IRQ << 31U);
-
-
- vimREG->FIRQPR2 = SYS_IRQ
- | (SYS_IRQ << 1U)
- | (SYS_IRQ << 2U)
- | (SYS_IRQ << 3U)
- | (SYS_IRQ << 4U)
- | (SYS_IRQ << 5U)
- | (SYS_IRQ << 6U)
- | (SYS_IRQ << 7U)
- | (SYS_IRQ << 8U)
- | (SYS_IRQ << 9U)
- | (SYS_IRQ << 10U)
- | (SYS_IRQ << 11U)
- | (SYS_IRQ << 12U)
- | (SYS_FIQ << 13U) // EMAC
- | (SYS_IRQ << 14U)
- | (SYS_FIQ << 15U) // EMAC
- | (SYS_IRQ << 16U)
- | (SYS_IRQ << 17U)
- | (SYS_IRQ << 18U)
- | (SYS_IRQ << 19U)
- | (SYS_IRQ << 20U)
- | (SYS_IRQ << 21U)
- | (SYS_IRQ << 22U)
- | (SYS_IRQ << 23U)
- | (SYS_IRQ << 24U)
- | (SYS_IRQ << 25U)
- | (SYS_IRQ << 26U)
- | (SYS_IRQ << 27U)
- | (SYS_IRQ << 28U)
- | (SYS_IRQ << 29U)
- | (SYS_IRQ << 30U)
- | (SYS_IRQ << 31U);
-
- vimREG->FIRQPR3 = SYS_IRQ
- | (SYS_IRQ << 1U)
- | (SYS_IRQ << 2U)
- | (SYS_IRQ << 3U)
- | (SYS_IRQ << 4U)
- | (SYS_IRQ << 5U)
- | (SYS_IRQ << 6U)
- | (SYS_IRQ << 7U)
- | (SYS_IRQ << 8U)
- | (SYS_IRQ << 9U)
- | (SYS_IRQ << 10U)
- | (SYS_IRQ << 11U)
- | (SYS_IRQ << 12U)
- | (SYS_IRQ << 13U)
- | (SYS_IRQ << 14U)
- | (SYS_IRQ << 15U)
- | (SYS_IRQ << 16U)
- | (SYS_IRQ << 17U)
- | (SYS_IRQ << 18U)
- | (SYS_IRQ << 19U)
- | (SYS_IRQ << 20U)
- | (SYS_IRQ << 21U)
- | (SYS_IRQ << 22U)
- | (SYS_IRQ << 23U)
- | (SYS_IRQ << 24U)
- | (SYS_IRQ << 25U)
- | (SYS_IRQ << 26U)
- | (SYS_IRQ << 27U)
- | (SYS_IRQ << 28U)
- | (SYS_IRQ << 29U)
- | (SYS_IRQ << 30U)
- | (SYS_IRQ << 31U);
-
-
- /* enable interrupts */
- vimREG->REQMASKSET0 = 1U
- | (1U << 1U)
- | (1U << 2U)
- | (0U << 3U)
- | (0U << 4U)
- | (0U << 5U)
- | (0U << 6U)
- | (0U << 7U)
- | (0U << 8U)
- | (0U << 9U)
- | (0U << 10U)
- | (0U << 11U)
- | (1U << 12U)
- | (1U << 13U)
- | (0U << 14U)
- | (1U << 15U)
- | (1U << 16U)
- | (1U << 17U)
- | (0U << 18U)
- | (0U << 19U)
- | (0U << 20U)
- | (0U << 21U)
- | (0U << 22U)
- | (0U << 23U)
- | (0U << 24U)
- | (0U << 25U)
- | (1U << 26U)
- | (0U << 27U)
- | (0U << 28U)
- | (0U << 29U)
- | (1U << 30U)
- | (0U << 31U);
-
- vimREG->REQMASKSET1 = 0U
- | (0U << 1U)
- | (0U << 2U)
- | (1U << 3U)
- | (0U << 4U)
- | (1U << 5U)
- | (1U << 6U)
- | (0U << 7U)
- | (0U << 8U)
- | (0U << 9U)
- | (0U << 10U)
- | (0U << 11U)
- | (0U << 12U)
- | (1U << 13U)
- | (0U << 14U)
- | (0U << 15U)
- | (0U << 16U)
- | (1U << 17U)
- | (0U << 18U)
- | (1U << 19U)
- | (0U << 20U)
- | (0U << 21U)
- | (1U << 22U)
- | (0U << 23U)
- | (0U << 24U)
- | (0U << 25U)
- | (0U << 26U)
- | (0U << 27U)
- | (0U << 28U)
- | (0U << 29U)
- | (0U << 30U)
- | (0U << 31U);
-
- vimREG->REQMASKSET2 = 1U
- | (0U << 1U)
- | (0U << 2U)
- | (0U << 3U)
- | (0U << 4U)
- | (0U << 5U)
- | (0U << 6U)
- | (0U << 7U)
- | (0U << 8U)
- | (0U << 9U)
- | (0U << 10U)
- | (0U << 11U)
- | (0U << 12U)
- | (1U << 13U) // EMACCore0TxIsr
- | (0U << 14U)
- | (1U << 15U) // EMACCore0RxIsr
- | (0U << 16U)
- | (0U << 17U)
- | (0U << 18U)
- | (0U << 19U)
- | (0U << 20U)
- | (0U << 21U)
- | (0U << 22U)
- | (0U << 23U)
- | (0U << 24U)
- | (0U << 25U)
- | (0U << 26U)
- | (0U << 27U)
- | (0U << 28U)
- | (0U << 29U)
- | (0U << 30U)
- | (0U << 31U);
-
- vimREG->REQMASKSET3 = 0U
- | (0U << 1U)
- | (0U << 2U)
- | (0U << 3U)
- | (0U << 4U)
- | (0U << 5U)
- | (0U << 6U)
- | (0U << 7U)
- | (0U << 8U)
- | (0U << 9U)
- | (0U << 10U)
- | (0U << 11U)
- | (0U << 12U)
- | (0U << 13U)
- | (0U << 14U)
- | (0U << 15U)
- | (0U << 16U)
- | (0U << 17U)
- | (0U << 18U)
- | (0U << 19U)
- | (0U << 20U)
- | (0U << 21U)
- | (0U << 22U)
- | (0U << 23U)
- | (0U << 24U)
- | (0U << 25U)
- | (0U << 26U)
- | (0U << 27U)
- | (0U << 28U)
- | (0U << 29U)
- | (0U << 30U)
- | (0U << 31U);
-
-/* USER CODE BEGIN (64) */
-/* USER CODE END */
-
- /* Configure system response to error conditions signaled to the ESM group1 */
- /* This function can be configured from the ESM tab of HALCoGen */
- esmInit();
-
- /* initalise copy table */
- if ((uint32_t *)&__binit__ != (uint32_t *)0xFFFFFFFFU)
- {
- extern void copy_in(void *binit);
- copy_in((void *)&__binit__);
- }
-
- /* initalise the C global variables */
- if (&__TI_Handler_Table_Base < &__TI_Handler_Table_Limit)
- {
- uint8_t **tablePtr = (uint8_t **)&__TI_CINIT_Base;
- uint8_t **tableLimit = (uint8_t **)&__TI_CINIT_Limit;
-
- while (tablePtr < tableLimit)
- {
- uint8_t *loadAdr = *tablePtr++;
- uint8_t *runAdr = *tablePtr++;
- uint8_t idx = *loadAdr++;
- handler_fptr handler = (handler_fptr)(&__TI_Handler_Table_Base)[idx];
-
- (*handler)((const uint8_t *)loadAdr, runAdr);
- }
- }
-
- /* initalise contructors */
- if (__TI_PINIT_Base < __TI_PINIT_Limit)
- {
- void (**p0)() = (void *)__TI_PINIT_Base;
-
- while ((uint32_t)p0 < __TI_PINIT_Limit)
- {
- void (*p)() = *p0++;
- p();
- }
- }
-
-/* USER CODE BEGIN (65) */
-/* USER CODE END */
-
- /* call the application */
- main();
-
-/* USER CODE BEGIN (66) */
-/* USER CODE END */
-
- exit();
-/* USER CODE BEGIN (67) */
-/* USER CODE END */
-}
-
-/* USER CODE BEGIN (68) */
-/* USER CODE END */
+++ /dev/null
-/** @file system.c
-* @brief System Driver Source File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - API Funcions
-* .
-* which are relevant for the System driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* Include Files */
-
-#include "sys/system.h"
-#include "sys/sys_selftest.h"
-#include "sys/sys_pinmux.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void systemInit(void)
-* @brief Initializes System Driver
-*
-* This function initializes the System driver.
-*
-*/
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-void setupPLL(void)
-{
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
- /** - Configure PLL control registers */
- /** @b Initialize @b Pll1: */
-
- /** - Setup pll control register 1:
- * - Setup reset on oscillator slip
- * - Setup bypass on pll slip
- * - setup Pll output clock divider to max before Lock
- * - Setup reset on oscillator fail
- * - Setup reference clock divider
- * - Setup Pll multiplier
- */
- systemREG1->PLLCTL1 = 0x00000000U
- | 0x20000000U
- | ((0x1F)<< 24U)
- | 0x00000000U
- | ((6U - 1U)<< 16U)
- | ((120U - 1U)<< 8U);
-
- /** - Setup pll control register 2
- * - Enable/Disable frequency modulation
- * - Setup spreading rate
- * - Setup bandwidth adjustment
- * - Setup internal Pll output divider
- * - Setup spreading amount
- */
- systemREG1->PLLCTL2 = 0x00000000U
- | (255U << 22U)
- | (7U << 12U)
- | ((2U - 1U)<< 9U)
- | 61U;
-
- /** @b Initialize @b Pll2: */
-
- /** - Setup pll2 control register :
- * - setup Pll output clock divider to max before Lock
- * - Setup reference clock divider
- * - Setup internal Pll output divider
- * - Setup Pll multiplier
- */
- systemREG2->PLLCTL3 = ((2U - 1U) << 29U)
- | ((0x1F)<< 24U)
- | ((6U - 1U)<< 16U)
- | ((120U - 1U) << 8U);
-
- /** - Enable PLL(s) to start up or Lock */
- systemREG1->CSDIS = 0x00000000U
- | 0x00000000U
- | 0x00000008U
- | 0x00000080U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-}
-
-void trimLPO(void)
-{
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
- /** @b Initialize Lpo: */
- /** Load TRIM values from OTP if present else load user defined values */
- if(LPO_TRIM_VALUE != 0xFFFF)
- {
-
- systemREG1->LPOMONCTL = (1U << 24U)
- | LPO_TRIM_VALUE;
- }
- else
- {
-
- systemREG1->LPOMONCTL = (1U << 24U)
- | (16U << 8U)
- | 8U;
- }
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-
-}
-
-void setupFlash(void)
-{
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- /** - Setup flash read mode, address wait states and data wait states */
- flashWREG->FRDCNTL = 0x00000000U
- | (3U << 8U)
- | (1U << 4U)
- | 1U;
-
- /** - Setup flash access wait states for bank 7 */
- FSM_WR_ENA = 0x5;
- EEPROM_CONFIG = 0x00030002;
-
- /** - Disable write access to flash state machine registers */
- FSM_WR_ENA = 0xA;
-
- /** - Setup flash bank power modes */
- flashWREG->FBFALLBACK = 0x00000000
- | (SYS_ACTIVE << 14U)
- | (SYS_SLEEP << 12U)
- | (SYS_SLEEP << 10U)
- | (SYS_SLEEP << 8U)
- | (SYS_SLEEP << 6U)
- | (SYS_SLEEP << 4U)
- | (SYS_ACTIVE << 2U)
- | SYS_ACTIVE;
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
-}
-
-void periphInit(void)
-{
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- /** - Disable Peripherals before peripheral powerup*/
- systemREG1->PENA = 0U;
-
- /** - Release peripherals from reset and enable clocks to all peripherals */
- /** - Power-up all peripharals */
- pcrREG->PSPWRDWNCLR0 = 0xFFFFFFFFU;
- pcrREG->PSPWRDWNCLR1 = 0xFFFFFFFFU;
- pcrREG->PSPWRDWNCLR2 = 0xFFFFFFFFU;
- pcrREG->PSPWRDWNCLR3 = 0xFFFFFFFFU;
-
- /** - Enable Peripherals */
- systemREG1->PENA = 1U;
-
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
-}
-
-void mapClocks(void)
-{
-
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-
- /** @b Initialize @b Clock @b Tree: */
- /** - Diable / Enable clock domain */
- systemREG1->CDDIS= (FALSE << 4 ) /* AVCLK 1 OFF */
- |(FALSE << 5 ) /* AVCLK 2 OFF */
- |(FALSE << 8 ) /* VCLK3 OFF */
- |(FALSE << 10) /* AVCLK 3 OFF */
- |(FALSE << 11); /* AVCLK 4 OFF */
-
- /** - Wait for until clocks are locked */
- while ((systemREG1->CSVSTAT & ((systemREG1->CSDIS ^ 0xFF) & 0xFF)) != ((systemREG1->CSDIS ^ 0xFF) & 0xFF))
- {
- }
-
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-
- /* Now the PLLs are locked and the PLL outputs can be sped up */
- /* The R-divider was programmed to be 0xF. Now this divider is changed to programmed value */
- systemREG1->PLLCTL1 = (systemREG1->PLLCTL1 & 0xE0FFFFFF)|((1U - 1U)<< 24U);
- systemREG2->PLLCTL3 = (systemREG2->PLLCTL3 & 0xE0FFFFFF)|((1U - 1U)<< 24U);
-
- /** - Map device clock domains to desired sources and configure top-level dividers */
- /** - All clock domains are working off the default clock sources until now */
- /** - The below assignments can be easily modified using the HALCoGen GUI */
-
- /** - Setup GCLK, HCLK and VCLK clock source for normal operation, power down mode and after wakeup */
- systemREG1->GHVSRC = (SYS_PLL1 << 24U)
- | (SYS_PLL1 << 16U)
- | SYS_PLL1;
-
- /** - Setup synchronous peripheral clock dividers for VCLK1, VCLK2, VCLK3 */
- systemREG1->VCLKR = 1U;
- systemREG1->VCLK2R = 1U;
- systemREG2->VCLK3R = 1U;
-
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
-
- /** - Setup RTICLK1 and RTICLK2 clocks */
- systemREG1->RCLKSRC = (1U << 24U)
- | (SYS_VCLK << 16U)
- | (1U << 8U)
- | SYS_VCLK;
-
- /** - Setup asynchronous peripheral clock sources for AVCLK1 and AVCLK2 */
- systemREG1->VCLKASRC = (SYS_VCLK << 8U)
- | SYS_VCLK;
-
- systemREG2->VCLKACON1 = (1U << 24)
- | 1 << 20U
- | (SYS_VCLK << 16)
- | (1U << 8)
- | 1 << 4U
- | SYS_VCLK;
-
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
-}
-
-void systemInit(void)
-{
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-
- /* Configure PLL control registers and enable PLLs.
- * The PLL takes (127 + 1024 * NR) oscillator cycles to acquire lock.
- * This initialization sequence performs all the tasks that are not
- * required to be done at full application speed while the PLL locks.
- */
- setupPLL();
-
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- /* Run eFuse controller start-up checks and start eFuse controller ECC self-test.
- * This includes a check for the eFuse controller error outputs to be stuck-at-zero.
- */
- efcCheck();
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-
- /* Enable clocks to peripherals and release peripheral reset */
- periphInit();
-
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- /* Configure device-level multiplexing and I/O multiplexing */
- muxInit();
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-
- /* Wait for eFuse controller self-test to complete and check results */
- if (!checkefcSelfTest()) /* eFuse controller ECC logic self-test failed */
- {
- efcClass2Error(); /* device operation is not reliable */
- }
-
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- /** - Set up flash address and data wait states based on the target CPU clock frequency
- * The number of address and data wait states for the target CPU clock frequency are specified
- * in the specific part's datasheet.
- */
- setupFlash();
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-
- /** - Configure the LPO such that HF LPO is as close to 10MHz as possible */
- trimLPO();
-
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-
- /** - Check if there was an ESM error from FMC OTP read during power-up */
- fmcBus2Check();
-
-/* USER CODE BEGIN (22) */
-/* USER CODE END */
-
- /** - Wait for PLLs to start up and map clock domains to desired clock sources */
- mapClocks();
-
-/* USER CODE BEGIN (23) */
-/* USER CODE END */
-
- /** - set ECLK pins functional mode */
- systemREG1->SYSPC1 = 0U;
-
- /** - set ECLK pins default output value */
- systemREG1->SYSPC4 = 0U;
-
- /** - set ECLK pins output direction */
- systemREG1->SYSPC2 = 1U;
-
- /** - set ECLK pins open drain enable */
- systemREG1->SYSPC7 = 0U;
-
- /** - set ECLK pins pullup/pulldown enable */
- systemREG1->SYSPC8 = 0U;
-
- /** - set ECLK pins pullup/pulldown select */
- systemREG1->SYSPC9 = 1U;
-
- /** - Setup ECLK */
- systemREG1->ECPCNTL = (0U << 24U)
- | (0U << 23U)
- | ((8U - 1U) & 0xFFFFU);
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-}
-
-void systemPowerDown(uint32_t mode)
-{
-
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-
- /* Disable clock sources */
- systemREG1->CSDISSET = mode & 0x000000FFU;
-
- /* Disable clock domains */
- systemREG1->CDDIS = (mode >> 8U) & 0x00000FFFU;
-
- /* Idle CPU */
- asm(" wfi");
-
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
-
-}
-
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
+++ /dev/null
-/** @file adc.c
-* @brief ADC Driver Source File
-* @date 04.January.2012
-* @version 03.01.00
-*
-* This file contains:
-* - API Funcions
-* - Interrupt Handlers
-* .
-* which are relevant for the ADC driver.
-*/
-
-/* Include Files */
-#include "sys/ti_drv_adc.h"
-
-
-/** @fn void adcInit(void)
-* @brief Initializes ADC Driver
-*
-* This function initializes the ADC driver.
-*
-*/
-void adcInit(void)
-{
- /** @b Initialize @b ADC1: */
-
- /** - Reset ADC module */
- adcREG1->RSTCR = 1U;
- adcREG1->RSTCR = 0U;
-
- /** - Enable 12-BIT ADC */
- adcREG1->OPMODECR |= 0x80000000U;
-
- /** - Setup prescaler */
- adcREG1->CLOCKCR = 7U;
-
- /** - Setup memory boundaries */
- adcREG1->BNDCR =(8U << 16U)|(8U + 8U);
- adcREG1->BNDEND = 2U;
-
- /** - Setup event group conversion mode
- * - Setup data format
- * - Enable/Disable channel id in conversion result
- * - Enable/Disable continuous conversion
- */
- adcREG1->GxMODECR[0U] = ADC_12_BIT
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup event group hardware trigger
- * - Setup hardware trigger edge
- * - Setup hardware trigger source
- */
- adcREG1->G0SRC = 0x00000000U
- | ADC1_EVENT;
-
- /** - Setup event group sample window */
- adcREG1->G0SAMP = 0U;
-
- /** - Setup event group sample discharge
- * - Setup discharge prescaler
- * - Enable/Disable discharge
- */
- adcREG1->G0SAMPDISEN = 0U << 8U
- | 0x00000000U;
-
- /** - Setup group 1 conversion mode
- * - Setup data format
- * - Enable/Disable channel id in conversion result
- * - Enable/Disable continuous conversion
- */
- adcREG1->GxMODECR[1U] = ADC_12_BIT
- | 0x00000020U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup group 1 hardware trigger
- * - Setup hardware trigger edge
- * - Setup hardware trigger source
- */
- adcREG1->G1SRC = 0x00000000U
- | ADC1_EVENT;
-
- /** - Setup group 1 sample window */
- adcREG1->G1SAMP = 0U;
-
- /** - Setup group 1 sample discharge
- * - Setup discharge prescaler
- * - Enable/Disable discharge
- */
- adcREG1->G1SAMPDISEN = 0U << 8U
- | 0x00000000U;
-
- /** - Setup group 2 conversion mode
- * - Setup data format
- * - Enable/Disable channel id in conversion result
- * - Enable/Disable continuous conversion
- */
- adcREG1->GxMODECR[2U] = ADC_12_BIT
- | 0x00000020U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup group 2 hardware trigger
- * - Setup hardware trigger edge
- * - Setup hardware trigger source
- */
- adcREG1->G2SRC = 0x00000000U
- | ADC1_EVENT;
-
- /** - Setup group 2 sample window */
- adcREG1->G2SAMP = 0U;
-
- /** - Setup group 2 sample discharge
- * - Setup discharge prescaler
- * - Enable/Disable discharge
- */
- adcREG1->G2SAMPDISEN = 0U << 8U
- | 0x00000000U;
-
- /** - Enable ADC module */
- adcREG1->OPMODECR |= 0x80140001U;
-
- /** - Wait for buffer inialisation complete */
- while ((adcREG1->BUFINIT) != 0) { /* Wait */ }
-
- /** - Setup parity */
- adcREG1->PARCR = 0x00000005U;
-
-
-
- /** @b Initialize @b ADC2: */
-
- /** - Reset ADC module */
- adcREG2->RSTCR = 1U;
- adcREG2->RSTCR = 0U;
-
- /** - Enable 12-BIT ADC */
- adcREG2->OPMODECR |= 0x80000000U;
-
- /** - Setup prescaler */
- adcREG2->CLOCKCR = 7U;
-
- /** - Setup memory boundaries */
- adcREG2->BNDCR =(8U << 16U)|(8U + 8U);
- adcREG2->BNDEND = 2U;
-
- /** - Setup event group conversion mode
- * - Setup data format
- * - Enable/Disable channel id in conversion result
- * - Enable/Disable continuous conversion
- */
- adcREG2->GxMODECR[0U] = ADC_12_BIT
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup event group hardware trigger
- * - Setup hardware trigger edge
- * - Setup hardware trigger source
- */
- adcREG2->G0SRC = 0x00000000U
- | ADC2_EVENT;
-
- /** - Setup event group sample window */
- adcREG2->G0SAMP = 0U;
-
- /** - Setup event group sample discharge
- * - Setup discharge prescaler
- * - Enable/Disable discharge
- */
- adcREG2->G0SAMPDISEN = 0U << 8U
- | 0x00000000U;
-
- /** - Setup group 1 conversion mode
- * - Setup data format
- * - Enable/Disable channel id in conversion result
- * - Enable/Disable continuous conversion
- */
- adcREG2->GxMODECR[1U] = ADC_12_BIT
- | 0x00000020U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup group 1 hardware trigger
- * - Setup hardware trigger edge
- * - Setup hardware trigger source
- */
- adcREG2->G1SRC = 0x00000000U
- | ADC2_EVENT;
-
-
- /** - Setup group 1 sample window */
- adcREG2->G1SAMP = 0U;
-
- /** - Setup group 1 sample discharge
- * - Setup discharge prescaler
- * - Enable/Disable discharge
- */
- adcREG2->G1SAMPDISEN = 0U << 8U
- | 0x00000000U;
-
- /** - Setup group 2 conversion mode
- * - Setup data format
- * - Enable/Disable channel id in conversion result
- * - Enable/Disable continuous conversion
- */
- adcREG2->GxMODECR[2U] = ADC_12_BIT
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup group 2 hardware trigger
- * - Setup hardware trigger edge
- * - Setup hardware trigger source
- */
- adcREG2->G2SRC = 0x00000000U
- | ADC2_EVENT;
-
- /** - Setup group 2 sample window */
- adcREG2->G2SAMP = 0U;
-
- /** - Setup group 2 sample discharge
- * - Setup discharge prescaler
- * - Enable/Disable discharge
- */
- adcREG2->G2SAMPDISEN = 0U << 8U
- | 0x00000000U;
-
- /** - Enable ADC module */
- adcREG2->OPMODECR |= 0x80140001U;
-
- /** - Wait for buffer inialisation complete */
- while ((adcREG2->BUFINIT) != 0) { /* Wait */ }
-
- /** - Setup parity */
- adcREG2->PARCR = 0x00000005U;
-
- /** @note This function has to be called before the driver can be used.\n
- * This function has to be executed in priviledged mode.\n
- */
-}
-
-
-/** - s_adcSelect is used as constant table for channel selection */
-static const uint32_t s_adcSelect[2U][3U] =
-{
- // TODO configure another group for AD2IN[0,14,15]
-
- // ADC1, Group0
- //_BV( 0) |
- //_BV( 1) |
- //_BV( 2) |
- //_BV( 3) |
- //_BV( 4) |
- //_BV( 5) |
- //_BV( 6) |
- //_BV( 7) |
- //_BV( 8) |
- //_BV( 9) |
- //_BV(10) |
- //_BV(11) |
- //_BV(12) |
- //_BV(13) |
- //_BV(14) |
- //_BV(15) |
- 0x0,
-
-
- // ADC1, Group1
- // AD1IN[0-7] used for AIN
- // See tms570_trm.pdf p. 817 (809)
- _BV( 0) |
- _BV( 1) |
- _BV( 2) |
- _BV( 3) |
- _BV( 4) |
- _BV( 5) |
- _BV( 6) |
- _BV( 7) |
- _BV( 8) |
- _BV( 9) |
- _BV(10) |
- _BV(11) |
- //_BV(12) |
- //_BV(13) |
- //_BV(14) |
- //_BV(15) |
- 0x0,
-
- // ADC1, Group2
- //_BV( 0) |
- //_BV( 1) |
- //_BV( 2) |
- //_BV( 3) |
- //_BV( 4) |
- //_BV( 5) |
- //_BV( 6) |
- //_BV( 7) |
- //_BV( 8) |
- //_BV( 9) |
- //_BV(10) |
- //_BV(11) |
- //_BV(12) |
- //_BV(13) |
- //_BV(14) |
- //_BV(15) |
- 0x0,
-
- // ADC2, Group0
- //_BV( 0) |
- //_BV( 1) |
- //_BV( 2) |
- //_BV( 3) |
- //_BV( 4) |
- //_BV( 5) |
- //_BV( 6) |
- //_BV( 7) |
- //_BV( 8) |
- //_BV( 9) |
- //_BV(10) |
- //_BV(11) |
- //_BV(12) |
- //_BV(13) |
- //_BV(14) |
- //_BV(15) |
- 0x0,
-
- // ADC2, Group1
- // AD2IN[2-7] used for HOUT-IFBK
- //_BV( 0) |
- //_BV( 1) |
- _BV( 2) |
- _BV( 3) |
- _BV( 4) |
- _BV( 5) |
- _BV( 6) |
- _BV( 7) |
- //_BV( 8) |
- //_BV( 9) |
- //_BV(10) |
- //_BV(11) |
- //_BV(12) |
- //_BV(13) |
- //_BV(14) |
- //_BV(15) |
- 0x0,
-
- // ADC2, Group2
- //_BV( 0) |
- //_BV( 1) |
- //_BV( 2) |
- //_BV( 3) |
- //_BV( 4) |
- //_BV( 5) |
- //_BV( 6) |
- //_BV( 7) |
- //_BV( 8) |
- //_BV( 9) |
- //_BV(10) |
- //_BV(11) |
- //_BV(12) |
- //_BV(13) |
- //_BV(14) |
- //_BV(15) |
- 0x0
-};
-
- // ADC, Group
-static const uint32_t s_adcFiFoSize[2U][3U] =
-{
- {0U, 12U, 0U},
- {0U, 6U, 0U}
-};
-
-/** @fn void adcStartConversion(adcBASE_t *adc, uint32_t group)
-* @brief Starts an ADC conversion
-* @param[in] adc Pointer to ADC module:
-* - adcREG1: ADC1 module pointer
-* - adcREG2: ADC2 module pointer
-* @param[in] group Hardware group of ADC module:
-* - adcGROUP0: ADC event group
-* - adcGROUP1: ADC group 1
-* - adcGROUP2: ADC group 2
-*
-* This function starts a conversion of the ADC hardware group.
-*
-* @note The function adcInit has to be called before this function can be
-* used.
-*/
-void adcStartConversion(adcBASE_t *adc, uint32_t group)
-{
- uint32_t index = adc == adcREG1 ? 0U : 1U;
-
- // Setup FiFo size
- // - For ADC1 Group1 see tms570_trm.pdf p. 796 (788)
- adc->GxINTCR[group] = s_adcFiFoSize[index][group];
-
- // Start Conversion
- // - For ADC1 Group1 see tms570_trm.pdf p. 817 (809)
- adc->GxSEL[group] = s_adcSelect[index][group];
-}
-
-
-/** @fn void adcStopConversion(adcBASE_t *adc, uint32_t group)
-* @brief Stops an ADC conversion
-* @param[in] adc Pointer to ADC module:
-* - adcREG1: ADC1 module pointer
-* - adcREG2: ADC2 module pointer
-* @param[in] group Hardware group of ADC module:
-* - adcGROUP0: ADC event group
-* - adcGROUP1: ADC group 1
-* - adcGROUP2: ADC group 2
-*
-* This function stops a convesion of the ADC hardware group.
-*
-* @note The function adcInit has to be called before this function can be
-* used.
-*/
-void adcStopConversion(adcBASE_t *adc, uint32_t group)
-{
- /** - Stop Conversion */
- adc->GxSEL[group] = 0U;
-}
-
-
-/**
- * Resets FiFo read and write pointer.
- *
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- *
- * @note The function adcInit has to be called before this function can be
- * used.\n
- * The conversion should be stopped before calling this function.
- *
- */
-void adcResetFiFo(adcBASE_t *adc, uint32_t group)
-{
- /** - Reset FiFo */
- adc->GxFIFORESETCR[group] = 1U;
-}
-
-
-
-/**
- * Gets converted a ADC values.
- *
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- * @param[out] data Pointer to store ADC converted data.
- *
- * @return The function will return the number of converted values copied
- * into data buffer.
- *
- * @note The function adcInit has to be called before this function can be
- * used.\n
- * The user is responsible to initialize the message box.
- *
- */
-uint32_t adcGetData(adcBASE_t *adc, uint32_t group, adcData_t *data)
-{
- uint32_t i;
- uint32_t buf;
- uint32_t mode;
- uint32_t index = adc == adcREG1 ? 0U : 1U;
- uint32_t count;
- if(adc->GxINTCR[group] >= 256U) {
- count = s_adcFiFoSize[index][group];
- } else {
- count = s_adcFiFoSize[index][group] - (uint32_t)(adc->GxINTCR[group] & 0xFF);
- }
- adcData_t *ptr = data;
-
- mode = ((adc->GxMODECR[group]) & 0x00000300U);
-
- if(mode == ADC_12_BIT) {
-
- // Get conversion data and channel/pin id
- for (i = 0; i < count; i++) {
- buf = adc->GxBUF[group].BUF0;
- ptr->value = (uint16_t)(buf & 0xFFFU);
- ptr->id = (uint32_t)((buf >> 16U) & 0x1FU);
- ptr++;
- }
-
- } else {
-
- // Get conversion data and channel/pin id
- for (i = 0; i < count; i++) {
- buf = adc->GxBUF[group].BUF0;
- ptr->value = (uint16_t)(buf & 0x3FFU);
- ptr->id = (uint32_t)((buf >> 10U) & 0x1FU);
- ptr++;
- }
- }
-
- adc->GxINTFLG[group] = 9U;
-
- return count;
-}
-
-
-/**
- * Checks if FiFo buffer is full.
- *
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- *
- * @return The function will return:
- * - 0: When FiFo buffer is not full
- * - 1: When FiFo buffer is full
- * - 3: When FiFo buffer overflow occured
- *
- *
- * @note The function adcInit has to be called before this function can be
- * used.
- *
- */
-uint32_t adcIsFifoFull(adcBASE_t *adc, uint32_t group)
-{
- // Read FiFo flag
- uint32_t flags = adc->GxINTFLG[group] & 3U;
- return flags;
-}
-
-
-/**
- * Checks if Conversion is complete.
- *
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- * @return The function will return:
- * - 0: When is not finished
- * - 8: When conversion is complete
- *
- * @note The function adcInit has to be called before this function can be
- * used.
-*/
-uint32_t adcIsConversionComplete(adcBASE_t *adc, uint32_t group)
-{
- uint32_t flags;
-
- /** - Read conversion flags */
- flags = adc->GxINTFLG[group] & 8U;
-
- return flags;
-}
-
-
-/**
- * Computes offset error using Calibration mode.
- *
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * - adcREG3: ADC3 module pointer
- *
- * @note The function adcInit has to be called before this function can be
- * used.
- */
-void adcCalibration(adcBASE_t *adc)
-{
- uint32_t conv_val[5] = {0, 0, 0, 0, 0}, loop_index = 0;
- uint32_t offset_error = 0;
- uint32_t backup_mode;
-
- /** - Backup Mode before Calibration */
- backup_mode = adc->OPMODECR;
-
- /** - Enable 12-BIT ADC */
- adcREG1->OPMODECR |= 0x80000000U;
-
- /* Disable all channels for conversion */
- adc->GxSEL[0]=0x00;
- adc->GxSEL[1]=0x00;
- adc->GxSEL[2]=0x00;
-
- for(loop_index = 0; loop_index < 4; loop_index++) {
-
- /* Disable Self Test and Calibration mode */
- adc->CALCR = 0x0;
-
- switch(loop_index) {
-
- case 0 : /* Test 1 : Bride En = 0 , HiLo =0 */
- adc->CALCR=0x0;
- break;
-
- case 1 : /* Test 1 : Bride En = 0 , HiLo =1 */
- adc->CALCR=0x0100;
- break;
-
- case 2 : /* Test 1 : Bride En = 1 , HiLo =0 */
- adc->CALCR=0x0200;
- break;
-
- case 3 : /* Test 1 : Bride En = 1 , HiLo =1 */
- adc->CALCR=0x0300;
- break;
- }
-
- /* Enable Calibration mode */
- adc->CALCR |= 0x1;
-
- /* Start calibration conversion */
- adc->CALCR |= 0x00010000;
-
- /* Wait for calibration conversion to complete */
- while((adc->CALCR & 0x00010000) == 0x00010000);
-
- /* Read converted value */
- conv_val[loop_index] = adc->CALR;
- }
-
- /* Disable Self Test and Calibration mode */
- adc->CALCR = 0x0;
-
- /* Compute the Offset error correction value */
- conv_val[4] = conv_val[0] + conv_val[1] + conv_val[2] + conv_val[3];
-
- conv_val[4] = (conv_val[4] / 4);
-
- offset_error=conv_val[4]-0x7FF;
-
- /* Write the offset error to the Calibration register */
- /* Load 2;s complement of the computed value to ADCALR register */
- offset_error = ~offset_error;
- offset_error = offset_error & 0xFFF;
- offset_error = offset_error+1;
-
- adc->CALR = offset_error;
-
- // - Restore Mode after Calibration
- adc->OPMODECR = backup_mode;
-}
-
-
-/** @fn void adcMidPointCalibration(adcBASE_t *adc)
-* @brief Computes offset error using Mid Point Calibration mode
-* @param[in] adc Pointer to ADC module:
-* - adcREG1: ADC1 module pointer
-* - adcREG2: ADC2 module pointer
-* - adcREG3: ADC3 module pointer
-* This function computes offset error using Mid Point Calibration mode
-*
-* @note The function adcInit has to be called before this function can be
-* used.
-*/
-uint32_t adcMidPointCalibration(adcBASE_t *adc)
-{
- uint32_t conv_val[3] = {0, 0, 0}, loop_index = 0;
- uint32_t offset_error = 0;
- uint32_t backup_mode;
-
- /** - Backup Mode before Calibration */
- backup_mode = adc->OPMODECR;
-
- /** - Enable 12-BIT ADC */
- adcREG1->OPMODECR |= 0x80000000U;
-
- /* Disable all channels for conversion */
- adc->GxSEL[0]=0x00;
- adc->GxSEL[1]=0x00;
- adc->GxSEL[2]=0x00;
-
- for(loop_index=0;loop_index<2;loop_index++) {
-
- /* Disable Self Test and Calibration mode */
- adc->CALCR=0x0;
-
- switch(loop_index) {
-
- case 0 : /* Test 1 : Bride En = 0 , HiLo =0 */
- adc->CALCR=0x0;
- break;
-
- case 1 : /* Test 1 : Bride En = 0 , HiLo =1 */
- adc->CALCR=0x0100;
- break;
-
- }
-
- /* Enable Calibration mode */
- adc->CALCR |= 0x1;
-
- /* Start calibration conversion */
- adc->CALCR |= 0x00010000;
-
- /* Wait for calibration conversion to complete */
- while((adc->CALCR & 0x00010000) == 0x00010000);
-
- /* Read converted value */
- conv_val[loop_index]= adc->CALR;
- }
-
- /* Disable Self Test and Calibration mode */
- adc->CALCR = 0x0;
-
- /* Compute the Offset error correction value */
- conv_val[2] = (conv_val[0]) + (conv_val[1]);
-
- conv_val[2] = (conv_val[2] / 2);
-
- offset_error = conv_val[2] - 0x7FF;
-
- /* Write the offset error to the Calibration register */
- /* Load 2's complement of the computed value to ADCALR register */
- offset_error = ~offset_error;
- offset_error = offset_error & 0xFFF;
- offset_error = offset_error + 1;
-
- adc->CALR = offset_error;
-
- // - Restore Mode after Calibration
- adc->OPMODECR = backup_mode;
-
- return offset_error;
-}
-
-
-/** @fn void adcEnableNotification(adcBASE_t *adc, uint32_t group)
- * @brief Enable notification
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * - adcREG3: ADC3 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- *
- * This function will enable the notification of a conversion.
- * In single conversion mode for conversion complete and
- * in continuous conversion mode when the FiFo buffer is full.
- *
- * @note The function adcInit has to be called before this function can be
- * used.\n
- * This function should be called before the conversion is started.
- */
-void adcEnableNotification(adcBASE_t *adc, uint32_t group)
-{
- uint32_t notif = adc->GxMODECR[group] & 2U ? 1U : 8U;
-
- adc->GxINTENA[group] = notif;
-}
-
-
-/** @fn void adcDisableNotification(adcBASE_t *adc, uint32_t group)
- * @brief Disable notification
- * @param[in] adc Pointer to ADC module:
- * - adcREG1: ADC1 module pointer
- * - adcREG2: ADC2 module pointer
- * - adcREG3: ADC3 module pointer
- * @param[in] group Hardware group of ADC module:
- * - adcGROUP0: ADC event group
- * - adcGROUP1: ADC group 1
- * - adcGROUP2: ADC group 2
- *
- * This function will disable the notification of a conversion.
- *
- * @note The function adcInit has to be called before this function can be
- * used.
- */
-void adcDisableNotification(adcBASE_t *adc, uint32_t group)
-{
- adc->GxINTENA[group] = 0U;
-}
-
-
-/** @fn void adc1Group0Interrupt(void)
- * @brief ADC1 Event Group Interrupt Handler
- */
-#pragma INTERRUPT(adc1Group0Interrupt, IRQ)
-void adc1Group0Interrupt(void)
-{
- adcNotification(adcREG1, adcGROUP0);
- adcREG1->GxINTFLG[0U] = _BV(3) | _BV(0);
-}
-
-
-/** @fn void adc1Group1Interrupt(void)
- * @brief ADC1 Group 1 Interrupt Handler
- */
-#pragma INTERRUPT(adc1Group1Interrupt, IRQ)
-void adc1Group1Interrupt(void)
-{
- adcNotification(adcREG1, adcGROUP1);
- // For ADC1 Group1 see tms570_trm.pdf p. 791 (783)
- adcREG1->GxINTFLG[1U] = _BV(3) | _BV(0);
-}
-
-
-/** @fn void adc1Group2Interrupt(void)
- * @brief ADC1 Group 2 Interrupt Handler
- */
-#pragma INTERRUPT(adc1Group2Interrupt, IRQ)
-void adc1Group2Interrupt(void)
-{
- adcNotification(adcREG1, adcGROUP2);
- adcREG1->GxINTFLG[2U] = _BV(3) | _BV(0);;
-}
-
-
-/** @fn void adc2Group0Interrupt(void)
- * @brief ADC2 Event Group Interrupt Handler
- */
-#pragma INTERRUPT(adc2Group0Interrupt, IRQ)
-void adc2Group0Interrupt(void)
-{
- adcNotification(adcREG2, adcGROUP0);
- adcREG2->GxINTFLG[0U] = _BV(3) | _BV(0);
-}
-
-
-/** @fn void adc2Group1Interrupt(void)
- * @brief ADC2 Group 1 Interrupt Handler
- */
-#pragma INTERRUPT(adc2Group1Interrupt, IRQ)
-void adc2Group1Interrupt(void)
-{
- adcNotification(adcREG2, adcGROUP1);
- adcREG2->GxINTFLG[1U] = _BV(3) | _BV(0);
-}
-
-
-/** @fn void adc2Group2Interrupt(void)
- * @brief ADC2 Group 2 Interrupt Handler
- */
-#pragma INTERRUPT(adc2Group2Interrupt, IRQ)
-void adc2Group2Interrupt(void)
-{
- adcNotification(adcREG2, adcGROUP2);
- adcREG2->GxINTFLG[2U] = _BV(3) | _BV(0);
-}
-
+++ /dev/null
-/** @file can.c
-* @brief CAN Driver Source File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - API Funcions
-* - Interrupt Handlers
-* .
-* which are relevant for the CAN driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-
-/* Include Files */
-
-#include "sys/ti_drv_can.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/* Global and Static Variables */
-
-#ifndef __little_endian__
- static const uint32_t s_canByteOrder[] = {3U, 2U, 1U, 0U, 7U, 6U, 5U, 4U};
-#endif
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-
-/** @fn void canInit(void)
-* @brief Initializes CAN Driver
-*
-* This function initializes the CAN driver.
-*
-*/
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-void canInit(void)
-{
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
- /** @b Initialize @b CAN1: */
-
- /** - Setup control register
- * - Disable automatic wakeup on bus activity
- * - Local power down mode disabled
- * - Disable DMA request lines
- * - Enable global Interrupt Line 0 and 1
- * - Disable debug mode
- * - Release from software reset
- * - Enable/Disable parity or ECC
- * - Enable/Disable auto bus on timer
- * - Setup message completion before entering debug state
- * - Setup normal operation mode
- * - Request write access to the configuration registers
- * - Setup automatic retransmission of messages
- * - Disable error interrups
- * - Disable status interrupts
- * - Enter initialization mode
- */
- canREG1->CTL = 0x00000000U
- | 0x00000000U
- | 0x00000005U
- | 0x000200043U;
-
- /** - Clear all pending error flags and reset current status */
- canREG1->ES = 0x0000031FU;
-
- /** - Assign interrupt level for messages */
- canREG1->INTMUXx[0U] = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- canREG1->INTMUXx[1U] = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup auto bus on timer pewriod */
- canREG1->ABOTR = 0U;
-
- /** - Initialize message 1
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x80000000U | 0x40000000U | 0x20000000U | ((1U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 1;
-
- /** - Initialize message 2
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x80000000U | 0x40000000U | 0x00000000U | ((2U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 2;
-
- /** - Initialize message 3
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x80000000U | 0x40000000U | 0x00000000U | ((3U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 3;
-
- /** - Initialize message 4
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((4U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 4;
-
- /** - Initialize message 5
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((5U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 5;
-
- /** - Initialize message 6
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((6U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 6;
-
- /** - Initialize message 7
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((7U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 7;
-
- /** - Initialize message 8
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((8U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 8;
-
- /** - Initialize message 9
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((9U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 9;
-
- /** - Initialize message 10
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((10U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 10;
-
- /** - Initialize message 11
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((11U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 11;
-
- /** - Initialize message 12
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((12U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 12;
-
- /** - Initialize message 13
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((13U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 13;
-
- /** - Initialize message 14
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((14U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 14;
-
- /** - Initialize message 15
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((15U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 15;
-
- /** - Initialize message 16
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((16U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 16;
-
- /** - Initialize message 17
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((17U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 17;
-
- /** - Initialize message 18
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((18U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 18;
-
- /** - Initialize message 19
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((19U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 19;
-
- /** - Initialize message 20
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((20U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 20;
-
- /** - Initialize message 21
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((21U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 21;
-
- /** - Initialize message 22
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((22U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 22;
-
- /** - Initialize message 23
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((23U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 23;
-
- /** - Initialize message 24
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((24U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 24;
-
- /** - Initialize message 25
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((25U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 25;
-
- /** - Initialize message 26
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((26U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 26;
-
- /** - Initialize message 27
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((27U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 27;
-
- /** - Initialize message 28
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((28U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 28;
-
- /** - Initialize message 29
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((29U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 29;
-
- /** - Initialize message 30
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((30U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 30;
-
- /** - Initialize message 31
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((31U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 31;
-
- /** - Initialize message 32
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((32U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 32;
-
- /** - Initialize message 33
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((33U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 33;
-
- /** - Initialize message 34
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((34U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 34;
-
- /** - Initialize message 35
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((35U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 35;
-
- /** - Initialize message 36
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((36U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 36;
-
- /** - Initialize message 37
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((37U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 37;
-
- /** - Initialize message 38
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((38U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 38;
-
- /** - Initialize message 39
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((39U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 39;
-
- /** - Initialize message 40
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((40U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 40;
-
- /** - Initialize message 41
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((41U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 41;
-
- /** - Initialize message 42
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((42U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 42;
-
- /** - Initialize message 43
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((43U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 43;
-
- /** - Initialize message 44
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((44U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 44;
-
- /** - Initialize message 45
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((45U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 45;
-
- /** - Initialize message 46
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((46U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 46;
-
- /** - Initialize message 47
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((47U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 47;
-
- /** - Initialize message 48
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((48U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 48;
-
- /** - Initialize message 49
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((49U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 49;
-
- /** - Initialize message 50
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((50U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 50;
-
- /** - Initialize message 51
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((51U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 51;
-
- /** - Initialize message 52
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((52U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 52;
-
- /** - Initialize message 53
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((53U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 53;
-
- /** - Initialize message 54
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((54U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 54;
-
- /** - Initialize message 55
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((55U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 55;
-
- /** - Initialize message 56
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((56U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 56;
-
- /** - Initialize message 57
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((57U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 57;
-
- /** - Initialize message 58
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((58U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 58;
-
- /** - Initialize message 59
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((59U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 59;
-
- /** - Initialize message 60
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((60U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 60;
-
- /** - Initialize message 61
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((61U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 61;
-
- /** - Initialize message 62
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((62U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 62;
-
- /** - Initialize message 63
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((63U & 0x1FFFFFFFU) << 0U);
- canREG1->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF1CMD = 0xF8;
- canREG1->IF1NO = 63;
-
- /** - Initialize message 64
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG1->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((64U & 0x1FFFFFFFU) << 0U);
- canREG1->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG1->IF2CMD = 0xF8;
- canREG1->IF2NO = 64;
-
- /** - Setup IF1 for data transmission
- * - Wait until IF1 is ready for use
- * - Set IF1 control byte
- */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1CMD = 0x87;
-
- /** - Setup IF2 for reading data
- * - Wait until IF1 is ready for use
- * - Set IF1 control byte
- */
- while (canREG1->IF2STAT & 0x80);
-
- canREG1->IF2CMD = 0x17;
- /** - Setup bit timing
- * - Setup baud rate prescaler extension
- * - Setup TSeg2
- * - Setup TSeg1
- * - Setup sample jump width
- * - Setup baud rate prescaler
- */
- canREG1->BTR = (0U << 16U) |
- ((2U - 1U) << 12U) |
- (((3U + 2U) - 1U) << 8U) |
- ((2U - 1U) << 6U) |
- 19U;
-
- /** - CAN1 Port output values */
- canREG1->TIOC = (1 << 18 )
- | (0 << 17 )
- | (1 << 3 )
- | (0 << 2 )
- | (0 << 1 )
- | (0 );
- canREG1->RIOC = (1 << 18 )
- | (0 << 17 )
- | (1 << 3 )
- | (0 << 2 )
- | (0 <<1 )
- | (0 );
-
-
- /** - Leave configuration and initialization mode */
- canREG1->CTL &= ~0x00000041U;
-
-
- /** @b Initialize @b CAN2: */
-
- /** - Setup control register
- * - Disable automatic wakeup on bus activity
- * - Local power down mode disabled
- * - Disable DMA request lines
- * - Enable global Interrupt Line 0 and 1
- * - Disable debug mode
- * - Release from software reset
- * - Enable/Disable parity or ECC
- * - Enable/Disable auto bus on timer
- * - Setup message completion before entering debug state
- * - Setup normal operation mode
- * - Request write access to the configuration registers
- * - Setup automatic retransmission of messages
- * - Disable error interrups
- * - Disable status interrupts
- * - Enter initialization mode
- */
- canREG2->CTL = 0x00000000U
- | 0x00000000U
- | 0x00000005U
- | 0x000200043U;
-
- /** - Clear all pending error flags and reset current status */
- canREG2->ES = 0x0000031FU;
-
-
- /** - Assign interrupt level for messages */
- canREG2->INTMUXx[0U] = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- canREG2->INTMUXx[1U] = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
-
- /** - Setup auto bus on timer pewriod */
- canREG2->ABOTR = 0U;
-
- /** - Initialize message 1
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x80000000U | 0x40000000U | 0x00000000U | ((1U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 1;
-
- /** - Initialize message 2
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x80000000U | 0x40000000U | 0x20000000U | ((2U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 2;
-
- /** - Initialize message 3
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x80000000U | 0x40000000U | 0x00000000U | ((3U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 3;
-
- /** - Initialize message 4
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((4U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 4;
-
- /** - Initialize message 5
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((5U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 5;
-
- /** - Initialize message 6
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((6U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 6;
-
- /** - Initialize message 7
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((7U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 7;
-
- /** - Initialize message 8
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((8U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 8;
-
- /** - Initialize message 9
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((9U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 9;
-
- /** - Initialize message 10
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((10U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 10;
-
- /** - Initialize message 11
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((11U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 11;
-
- /** - Initialize message 12
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((12U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 12;
-
- /** - Initialize message 13
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((13U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 13;
-
- /** - Initialize message 14
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((14U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 14;
-
- /** - Initialize message 15
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((15U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 15;
-
- /** - Initialize message 16
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((16U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 16;
-
- /** - Initialize message 17
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((17U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 17;
-
- /** - Initialize message 18
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((18U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 18;
-
- /** - Initialize message 19
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((19U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 19;
-
- /** - Initialize message 20
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((20U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 20;
-
- /** - Initialize message 21
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((21U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 21;
-
- /** - Initialize message 22
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((22U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 22;
-
- /** - Initialize message 23
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((23U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 23;
-
- /** - Initialize message 24
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((24U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 24;
-
- /** - Initialize message 25
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((25U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 25;
-
- /** - Initialize message 26
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((26U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 26;
-
- /** - Initialize message 27
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((27U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 27;
-
- /** - Initialize message 28
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((28U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 28;
-
- /** - Initialize message 29
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((29U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 29;
-
- /** - Initialize message 30
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((30U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 30;
-
- /** - Initialize message 31
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((31U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 31;
-
- /** - Initialize message 32
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((32U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 32;
-
- /** - Initialize message 33
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((33U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 33;
-
- /** - Initialize message 34
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((34U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 34;
-
- /** - Initialize message 35
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((35U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 35;
-
- /** - Initialize message 36
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((36U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 36;
-
- /** - Initialize message 37
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((37U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 37;
-
- /** - Initialize message 38
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((38U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 38;
-
- /** - Initialize message 39
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((39U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 39;
-
- /** - Initialize message 40
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((40U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 40;
-
- /** - Initialize message 41
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((41U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 41;
-
- /** - Initialize message 42
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((42U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 42;
-
- /** - Initialize message 43
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((43U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 43;
-
- /** - Initialize message 44
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((44U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 44;
-
- /** - Initialize message 45
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((45U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 45;
-
- /** - Initialize message 46
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((46U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 46;
-
- /** - Initialize message 47
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((47U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 47;
-
- /** - Initialize message 48
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((48U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 48;
-
- /** - Initialize message 49
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((49U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 49;
-
- /** - Initialize message 50
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((50U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 50;
-
- /** - Initialize message 51
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((51U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 51;
-
- /** - Initialize message 52
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((52U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 52;
-
- /** - Initialize message 53
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((53U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 53;
-
- /** - Initialize message 54
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((54U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 54;
-
- /** - Initialize message 55
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((55U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 55;
-
- /** - Initialize message 56
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((56U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 56;
-
- /** - Initialize message 57
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((57U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 57;
-
- /** - Initialize message 58
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((58U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 58;
-
- /** - Initialize message 59
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((59U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 59;
-
- /** - Initialize message 60
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((60U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 60;
-
- /** - Initialize message 61
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((61U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 61;
-
- /** - Initialize message 62
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((62U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 62;
-
- /** - Initialize message 63
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((63U & 0x1FFFFFFFU) << 0U);
- canREG2->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF1CMD = 0xF8;
- canREG2->IF1NO = 63;
-
- /** - Initialize message 64
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG2->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((64U & 0x1FFFFFFFU) << 0U);
- canREG2->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG2->IF2CMD = 0xF8;
- canREG2->IF2NO = 64;
-
- /** - Setup IF1 for data transmission
- * - Wait until IF1 is ready for use
- * - Set IF1 control byte
- */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1CMD = 0x87;
-
- /** - Setup IF2 for reading data
- * - Wait until IF1 is ready for use
- * - Set IF1 control byte
- */
- while (canREG2->IF2STAT & 0x80);
-
- canREG2->IF2CMD = 0x17;
- /** - Setup bit timing
- * - Setup baud rate prescaler extension
- * - Setup TSeg2
- * - Setup TSeg1
- * - Setup sample jump width
- * - Setup baud rate prescaler
- */
- canREG2->BTR = (0U << 16U) |
- ((2U - 1U) << 12U) |
- (((3U + 2U) - 1U) << 8U) |
- ((2U - 1U) << 6U) |
- 19U;
-
- /** - CAN2 Port output values */
- canREG2->TIOC = (1 << 18 )
- | (0 << 17 )
- | (1 << 3 )
- | (0 << 2 )
- | (0 << 1 )
- | (0 );
- canREG2->RIOC = (1 << 18 )
- | (0 << 17 )
- | (1 << 3 )
- | (0 << 2 )
- | (0 <<1 )
- | (0 );
-
- /** - Leave configuration and initialization mode */
- canREG2->CTL &= ~0x00000041U;
-
- /** @b Initialize @b CAN3: */
-
- /** - Setup control register
- * - Disable automatic wakeup on bus activity
- * - Local power down mode disabled
- * - Disable DMA request lines
- * - Enable global Interrupt Line 0 and 1
- * - Disable debug mode
- * - Release from software reset
- * - Enable/Disable parity or ECC
- * - Enable/Disable auto bus on timer
- * - Setup message completion before entering debug state
- * - Setup normal operation mode
- * - Request write access to the configuration registers
- * - Setup automatic retransmission of messages
- * - Disable error interrups
- * - Disable status interrupts
- * - Enter initialization mode
- */
- canREG3->CTL = 0x00000000U
- | 0x00000000U
- | 0x00000005U
- | 0x000200043U;
-
- /** - Clear all pending error flags and reset current status */
- canREG3->ES = 0x0000031FU;
-
- /** - Assign interrupt level for messages */
- canREG3->INTMUXx[0U] = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup auto bus on timer pewriod */
- canREG3->ABOTR = 0U;
-
- /** - Initialize message 1
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x80000000U | 0x40000000U | 0x00000000U | ((1U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 1;
-
- /** - Initialize message 2
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x80000000U | 0x40000000U | 0x00000000U | ((2U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 2;
-
- /** - Initialize message 3
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x80000000U | 0x40000000U | 0x20000000U | ((3U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000C00U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 3;
-
- /** - Initialize message 4
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((4U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 4;
-
- /** - Initialize message 5
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((5U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 5;
-
- /** - Initialize message 6
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((6U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 6;
-
- /** - Initialize message 7
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((7U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 7;
-
- /** - Initialize message 8
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((8U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 8;
-
- /** - Initialize message 9
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((9U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 9;
-
- /** - Initialize message 10
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((10U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 10;
-
- /** - Initialize message 11
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((11U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 11;
-
- /** - Initialize message 12
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((12U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 12;
-
- /** - Initialize message 13
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((13U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 13;
-
- /** - Initialize message 14
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((14U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 14;
-
- /** - Initialize message 15
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((15U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 15;
-
- /** - Initialize message 16
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((16U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 16;
-
- /** - Initialize message 17
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((17U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 17;
-
- /** - Initialize message 18
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((18U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 18;
-
- /** - Initialize message 19
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((19U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 19;
-
- /** - Initialize message 20
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((20U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 20;
-
- /** - Initialize message 21
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((21U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 21;
-
- /** - Initialize message 22
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((22U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 22;
-
- /** - Initialize message 23
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((23U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 23;
-
- /** - Initialize message 24
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((24U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 24;
-
- /** - Initialize message 25
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((25U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 25;
-
- /** - Initialize message 26
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((26U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 26;
-
- /** - Initialize message 27
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((27U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 27;
-
- /** - Initialize message 28
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((28U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 28;
-
- /** - Initialize message 29
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((29U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 29;
-
- /** - Initialize message 30
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((30U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 30;
-
- /** - Initialize message 31
- * - Wait until IF1 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF1 control byte
- * - Set IF1 message number
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF1ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((31U & 0x1FFFFFFFU) << 0U);
- canREG3->IF1MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF1CMD = 0xF8;
- canREG3->IF1NO = 31;
-
- /** - Initialize message 32
- * - Wait until IF2 is ready for use
- * - Set message mask
- * - Set message control word
- * - Set message arbitration
- * - Set IF2 control byte
- * - Set IF2 message number
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2MSK = 0xC0000000U | ((0x000007FFU & 0x1FFFFFFFU) << 0U);
- canREG3->IF2ARB = 0x00000000U | 0x40000000U | 0x20000000U | ((32U & 0x1FFFFFFFU) << 0U);
- canREG3->IF2MCTL = 0x00001080U | 0x00000000U | 8U;
- canREG3->IF2CMD = 0xF8;
- canREG3->IF2NO = 32;
-
- /** - Setup IF1 for data transmission
- * - Wait until IF1 is ready for use
- * - Set IF1 control byte
- */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1CMD = 0x87;
-
- /** - Setup IF2 for reading data
- * - Wait until IF1 is ready for use
- * - Set IF1 control byte
- */
- while (canREG3->IF2STAT & 0x80);
-
- canREG3->IF2CMD = 0x17;
-
- /** - Setup bit timing
- * - Setup baud rate prescaler extension
- * - Setup TSeg2
- * - Setup TSeg1
- * - Setup sample jump width
- * - Setup baud rate prescaler
- */
- canREG3->BTR = (0U << 16U) |
- ((2U - 1U) << 12U) |
- (((3U + 2U) - 1U) << 8U) |
- ((2U - 1U) << 6U) |
- 19U;
-
-
- /** - CAN3 Port output values */
- canREG3->TIOC = (1 << 18 )
- | (0 << 17 )
- | (1 << 3 )
- | (0 << 2 )
- | (0 << 1 )
- | (0 );
- canREG3->RIOC = (1 << 18 )
- | (0 << 17 )
- | (1 << 3 )
- | (0 << 2 )
- | (0 <<1 )
- | (0 );
-
- /** - Leave configuration and initialization mode */
- canREG3->CTL &= ~0x00000041U;
-
- /** @note This function has to be called before the driver can be used.\n
- * This function has to be executed in priviledged mode.\n
- */
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-}
-
-
-/** @fn uint32_t canTransmit(canBASE_t *node, uint32_t messageBox, const uint8_t *data)
-* @brief Transmits a CAN message
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] messageBox Message box number of CAN node:
-* - canMESSAGE_BOX1: CAN message box 1
-* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
-* - canMESSAGE_BOX64: CAN message box 64
-* @param[in] data Pointer to CAN TX data
-* @return The function will return:
-* - 0: When the setup of the TX message box wasn't successful
-* - 1: When the setup of the TX message box was successful
-*
-* This function writes a CAN message into a CAN message box.
-*
-*/
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
-uint32_t canTransmit(canBASE_t *node, uint32_t messageBox, const uint8_t *data)
-{
- uint32_t i;
- uint32_t success = 0U;
- uint32_t regIndex = (messageBox - 1U) >> 5U;
- uint32_t bitIndex = 1U << ((messageBox - 1U) & 0x1FU);
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
- /** - Check for pending message:
- * - pending message, return 0
- * - no pending message, start new transmission
- */
- if (node->TXRQx[regIndex] & bitIndex)
- {
- return success;
- }
-
- /** - Wait until IF1 is ready for use */
- while (node->IF1STAT & 0x80);
-
- /** - Copy TX data into IF1 */
- for (i = 0U; i < 8U; i++)
- {
-#ifdef __little_endian__
- node->IF1DATx[i] = *data++;
-#else
- node->IF1DATx[s_canByteOrder[i]] = *data++;
-#endif
- }
-
- /** - Copy TX data into mesasge box */
- node->IF1NO = messageBox;
-
- success = 1U;
-
- /** @note The function canInit has to be called before this function can be used.\n
- * The user is responsible to initialize the message box.
- */
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- return success;
-}
-
-
-/** @fn uint32_t canGetData(canBASE_t *node, uint32_t messageBox, uint8_t * const data)
-* @brief Gets received a CAN message
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] messageBox Message box number of CAN node:
-* - canMESSAGE_BOX1: CAN message box 1
-* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
-* - canMESSAGE_BOX64: CAN message box 64
-* @param[out] data Pointer to store CAN RX data
-* @return The function will return:
-* - 0: When RX message box hasn't received new data
-* - 1: When RX data are stored in the data buffer
-* - 3: When RX data are stored in the data buffer and a message was lost
-*
-* This function writes a CAN message into a CAN message box.
-*
-*/
-
-
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
-uint32_t canGetData(canBASE_t *node, uint32_t messageBox, uint8_t * const data)
-{
- uint32_t i;
- uint32_t size;
- uint8_t *pData = (uint8_t *)data;
- uint32_t success = 0U;
- uint32_t regIndex = (messageBox - 1U) >> 5U;
- uint32_t bitIndex = 1U << ((messageBox - 1U) & 0x1FU);
-
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-
- /** - Check if new data have been arrived:
- * - no new data, return 0
- * - new data, get received message
- */
- if (!(node->NWDATx[regIndex] & bitIndex))
- {
- return success;
- }
-
- /** - Wait until IF2 is ready for use */
- while (node->IF2STAT & 0x80);
-
- /** - Copy data into IF2 */
- node->IF2NO = messageBox;
-
- /** - Wait until data are copied into IF2 */
- while (node->IF2STAT & 0x80);
-
- /** - Get number of received bytes */
- size = node->IF2MCTL & 0xFU;
-
- /** - Copy RX data into destination buffer */
- for (i = 0U; i < size; i++)
- {
-#ifdef __little_endian__
- *pData++ = node->IF2DATx[i];
-#else
- *pData++ = node->IF2DATx[s_canByteOrder[i]];
-#endif
- }
-
- success = 1U;
-
- /** - Check if data have been lost:
- * - no data lost, return 1
- * - data lost, return 3
- */
- if (node->IF2MCTL & 0x4000U)
- {
- success = 3U;
- }
-
- /** @note The function canInit has to be called before this function can be used.\n
- * The user is responsible to initialize the message box.
- */
-
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-
- return success;
-}
-
-
-/** @fn uint32_t canIsTxMessagePending(canBASE_t *node, uint32_t messageBox)
-* @brief Gets Tx message box transmission status
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] messageBox Message box number of CAN node:
-* - canMESSAGE_BOX1: CAN message box 1
-* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
-* - canMESSAGE_BOX64: CAN message box 64
-* @return The function will return the tx request flag
-*
-* Checks to see if the Tx message box has a pending Tx request, returns
-* 0 is flag not set otherwise will return the Tx request flag itself.
-*/
-
-
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
-
-uint32_t canIsTxMessagePending(canBASE_t *node, uint32_t messageBox)
-{
- uint32_t flag;
- uint32_t regIndex = (messageBox - 1U) >> 5U;
- uint32_t bitIndex = 1U << ((messageBox - 1U) & 0x1FU);
-
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- /** - Read Tx request reigster */
- flag = node->TXRQx[regIndex] & bitIndex;
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-
- return flag;
-}
-
-
-/** @fn uint32_t canIsRxMessageArrived(canBASE_t *node, uint32_t messageBox)
-* @brief Gets Rx message box reception status
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] messageBox Message box number of CAN node:
-* - canMESSAGE_BOX1: CAN message box 1
-* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
-* - canMESSAGE_BOX64: CAN message box 64
-* @return The function will return the new data flag
-*
-* Checks to see if the Rx message box has pending Rx data, returns
-* 0 is flag not set otherwise will return the Tx request flag itself.
-*/
-
-
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
-uint32_t canIsRxMessageArrived(canBASE_t *node, uint32_t messageBox)
-{
- uint32_t flag;
- uint32_t regIndex = (messageBox - 1U) >> 5U;
- uint32_t bitIndex = 1U << ((messageBox - 1U) & 0x1FU);
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-
- /** - Read Tx request register */
- flag = node->NWDATx[regIndex] & bitIndex;
-
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- return flag;
-}
-
-
-/** @fn uint32_t canIsMessageBoxValid(canBASE_t *node, uint32_t messageBox)
-* @brief Chechs if message box is valid
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] messageBox Message box number of CAN node:
-* - canMESSAGE_BOX1: CAN message box 1
-* - canMESSAGE_BOXn: CAN message box n [n: 1-64]
-* - canMESSAGE_BOX64: CAN message box 64
-* @return The function will return the new data flag
-*
-* Checks to see if the message box is valid for operation, returns
-* 0 is flag not set otherwise will return the validation flag itself.
-*/
-
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-
-uint32_t canIsMessageBoxValid(canBASE_t *node, uint32_t messageBox)
-{
- uint32_t flag;
- uint32_t regIndex = (messageBox - 1U) >> 5U;
- uint32_t bitIndex = 1U << ((messageBox - 1U) & 0x1FU);
-
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- /** - Read Tx request register */
- flag = node->MSGVALx[regIndex] & bitIndex;
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-
- return flag;
-}
-
-
-/** @fn uint32_t canGetLastError(canBASE_t *node)
-* @brief Gets last RX/TX-Error of CAN message traffic
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @return The function will return:
-* - canERROR_OK (0): When no CAN error occured
-* - canERROR_STUFF (1): When a stuff error occured on RX message
-* - canERROR_FORMAT (2): When a form/format error occured on RX message
-* - canERROR_ACKNOWLEDGE (3): When a TX message wasn't acknowledged
-* - canERROR_BIT1 (4): When a TX message monitored dominant level where recessive is expected
-* - canERROR_BIT0 (5): When a TX message monitored recessive level where dominant is expected
-* - canERROR_CRC (6): When a RX message has wrong CRC value
-* - canERROR_NO (7): When no error occured since last call of this function
-*
-* This function returns the last occured error code of an RX or TX message,
-* since the last call of this function.
-*
-*/
-
-
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-
-uint32_t canGetLastError(canBASE_t *node)
-{
- uint32_t errorCode;
-
-/* USER CODE BEGIN (22) */
-/* USER CODE END */
-
- /** - Get last error code */
- errorCode = node->ES & 7U;
-
- /** @note The function canInit has to be called before this function can be used. */
-
-/* USER CODE BEGIN (23) */
-/* USER CODE END */
-
- return errorCode;
-}
-
-
-/** @fn uint32_t canGetErrorLevel(canBASE_t *node)
-* @brief Gets error level of a CAN node
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @return The function will return:
-* - canLEVEL_ACTIVE (0x00): When RX- and TX error counters are below 96
-* - canLEVEL_WARNING (0x40): When RX- or TX error counter are between 96 and 127
-* - canLEVEL_PASSIVE (0x20): When RX- or TX error counter are between 128 and 255
-* - canLEVEL_BUS_OFF (0x80): When RX- or TX error counter are above 255
-*
-* This function returns the current error level of a CAN node.
-*
-*/
-
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-
-uint32_t canGetErrorLevel(canBASE_t *node)
-{
- uint32_t errorLevel;
-
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-
- /** - Get error level */
- errorLevel = node->ES & 0xE0U;
-
- /** @note The function canInit has to be called before this function can be used. */
-
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
-
- return errorLevel;
-}
-
-
-/** @fn void canEnableErrorNotification(canBASE_t *node)
-* @brief Enable error notification
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-*
-* This function will enable the notification for the reaching the error levels warning, passive and bus off.
-*/
-
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-
-void canEnableErrorNotification(canBASE_t *node)
-{
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
- node->CTL |= 8U;
-
- /** @note The function canInit has to be called before this function can be used. */
-
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-}
-
-
-/** @fn void canDisableErrorNotification(canBASE_t *node)
-* @brief Disable error notification
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-*
-* This function will disable the notification for the reaching the error levels warning, passive and bus off.
-*/
-
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-
-void canDisableErrorNotification(canBASE_t *node)
-{
-/* USER CODE BEGIN (31) */
-/* USER CODE END */
-
- node->CTL &= ~8U;
-
- /** @note The function canInit has to be called before this function can be used. */
-
-/* USER CODE BEGIN (32) */
-/* USER CODE END */
-}
-
-/** @fn void canIoSetDirection(canBASE_t *node,uint32_t TxDir,uint32_t RxDir)
-* @brief Set Port Direction
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] TxDir - TX Pin direction
-* @param[in] RxDir - RX Pin direction
-*
-* Set the direction of CAN pins at runtime when configured as IO pins.
-*/
-void canIoSetDirection(canBASE_t *node,uint32_t TxDir,uint32_t RxDir)
-{
- node->TIOC = TxDir << 2;
- node->RIOC = RxDir << 2;
-}
-
-/** @fn void canIoSetPort(canBASE_t *node, uint32_t TxValue, uint32_t RxValue)
-* @brief Write Port Value
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-* @param[in] TxValue - TX Pin value 0 or 1
-* @param[in] RxValue - RX Pin value 0 or 1
-*
-* Writes a value to TX and RX pin of a given CAN module when configured as IO pins.
-*/
-void canIoSetPort(canBASE_t *node, uint32_t TxValue, uint32_t RxValue)
-{
-/* USER CODE BEGIN (33) */
-/* USER CODE END */
-
- node->TIOC = TxValue << 1;
- node->RIOC = RxValue << 1;
-
-/* USER CODE BEGIN (34) */
-/* USER CODE END */
-}
-
-/** @fn uint32_t canIoTxGetBit(canBASE_t *node)
-* @brief Read TX Bit
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-*
-* Reads a the current value from the TX pin of the given CAN port
-*/
-uint32_t canIoTxGetBit(canBASE_t *node)
-{
-/* USER CODE BEGIN (35) */
-/* USER CODE END */
-
- return (node->TIOC >> 0) & 1U;
-}
-
-/** @fn uint32_t canIoRxGetBit(canBASE_t *node)
-* @brief Read RX Bit
-* @param[in] node Pointer to CAN node:
-* - canREG1: CAN1 node pointer
-* - canREG2: CAN2 node pointer
-* - canREG3: CAN3 node pointer
-*
-* Reads a the current value from the RX pin of the given CAN port
-*/
-uint32_t canIoRxGetBit(canBASE_t *node)
-{
-/* USER CODE BEGIN (36) */
-/* USER CODE END */
-
- return (node->RIOC >> 0) & 1U;
-}
-
-/** @fn void can1HighLevelInterrupt(void)
-* @brief CAN1 Level 0 Interrupt Handler
-*/
-
-/* USER CODE BEGIN (37) */
-/* USER CODE END */
-
-
-#pragma INTERRUPT(can1HighLevelInterrupt, IRQ)
-
-void can1HighLevelInterrupt(void)
-{
- uint32_t value = canREG1->INT;
-
-/* USER CODE BEGIN (38) */
-/* USER CODE END */
-
- if (value == 0x8000U)
- {
- canErrorNotification(canREG1, canREG1->ES);
- return;
- }
-
- /** - Setup IF1 for clear pending interrupt flag */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1CMD = 0x08;
- canREG1->IF1NO = value;
-
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1CMD = 0x87;
-
- canMessageNotification(canREG1, value);
-
-/* USER CODE BEGIN (39) */
-/* USER CODE END */
-}
-
-
-/** @fn void can1LowLevelInterrupt(void)
-* @brief CAN1 Level 1 Interrupt Handler
-*/
-
-/* USER CODE BEGIN (40) */
-/* USER CODE END */
-
-#pragma INTERRUPT(can1LowLevelInterrupt, IRQ)
-
-void can1LowLevelInterrupt(void)
-{
- uint32_t messageBox = canREG1->INT >> 16U;
-
-/* USER CODE BEGIN (41) */
-/* USER CODE END */
-
- /** - Setup IF1 for clear pending interrupt flag */
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1CMD = 0x08;
- canREG1->IF1NO = messageBox;
-
- while (canREG1->IF1STAT & 0x80);
-
- canREG1->IF1CMD = 0x87;
-
- canMessageNotification(canREG1, messageBox);
-
-/* USER CODE BEGIN (42) */
-/* USER CODE END */
-}
-
-
-/** @fn void can2HighLevelInterrupt(void)
-* @brief CAN2 Level 0 Interrupt Handler
-*/
-
-/* USER CODE BEGIN (43) */
-/* USER CODE END */
-
-#pragma INTERRUPT(can2HighLevelInterrupt, IRQ)
-
-void can2HighLevelInterrupt(void)
-{
- uint32_t value = canREG2->INT;
-
-/* USER CODE BEGIN (44) */
-/* USER CODE END */
-
- if (value == 0x8000U)
- {
- canErrorNotification(canREG2, canREG2->ES);
- return;
- }
-
- /** - Setup IF1 for clear pending interrupt flag */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1CMD = 0x08;
- canREG2->IF1NO = value;
-
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1CMD = 0x87;
-
- canMessageNotification(canREG2, value);
-
-/* USER CODE BEGIN (45) */
-/* USER CODE END */
-}
-
-
-/** @fn void can2LowLevelInterrupt(void)
-* @brief CAN2 Level 1 Interrupt Handler
-*/
-
-/* USER CODE BEGIN (46) */
-/* USER CODE END */
-
-#pragma INTERRUPT(can2LowLevelInterrupt, IRQ)
-
-void can2LowLevelInterrupt(void)
-{
- uint32_t messageBox = canREG2->INT >> 16U;
-
-/* USER CODE BEGIN (47) */
-/* USER CODE END */
-
- /** - Setup IF1 for clear pending interrupt flag */
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1CMD = 0x08;
- canREG2->IF1NO = messageBox;
-
- while (canREG2->IF1STAT & 0x80);
-
- canREG2->IF1CMD = 0x87;
-
- canMessageNotification(canREG2, messageBox);
-
-/* USER CODE BEGIN (48) */
-/* USER CODE END */
-}
-
-
-/** @fn void can3HighLevelInterrupt(void)
-* @brief CAN3 Level 0 Interrupt Handler
-*/
-
-/* USER CODE BEGIN (49) */
-/* USER CODE END */
-
-#pragma INTERRUPT(can3HighLevelInterrupt, IRQ)
-
-void can3HighLevelInterrupt(void)
-{
- uint32_t value = canREG3->INT;
-
-/* USER CODE BEGIN (50) */
-/* USER CODE END */
-
- if (value == 0x8000U)
- {
- canErrorNotification(canREG3, canREG3->ES);
- return;
- }
-
- /** - Setup IF1 for clear pending interrupt flag */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1CMD = 0x08;
- canREG3->IF1NO = value;
-
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1CMD = 0x87;
-
- canMessageNotification(canREG3, value);
-
-/* USER CODE BEGIN (51) */
-/* USER CODE END */
-}
-
-
-/** @fn void can3LowLevelInterrupt(void)
-* @brief CAN3 Level 1 Interrupt Handler
-*/
-
-/* USER CODE BEGIN (52) */
-/* USER CODE END */
-
-#pragma INTERRUPT(can3LowLevelInterrupt, IRQ)
-
-void can3LowLevelInterrupt(void)
-{
- uint32_t messageBox = canREG3->INT >> 16U;
-
-/* USER CODE BEGIN (53) */
-/* USER CODE END */
-
- /** - Setup IF1 for clear pending interrupt flag */
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1CMD = 0x08;
- canREG3->IF1NO = messageBox;
-
- while (canREG3->IF1STAT & 0x80);
-
- canREG3->IF1CMD = 0x87;
-
- canMessageNotification(canREG3, messageBox);
-
-/* USER CODE BEGIN (54) */
-/* USER CODE END */
-}
-
+++ /dev/null
-/** @file dma.c
-* @brief DMA Driver Inmplmentation File
-* @date 22.Aug.2011
-* @version 1.01.000
-*
-*/
-
-/* (c) Texas Instruments 2009-2010, All rights reserved. */
-
-
-#include "sys/ti_drv_dma.h"
-
-g_dmaCTRL g_dmaCTRLPKT;
-
-/** @fn void dmaEnable(void)
-* @brief enables dma module
-*
-* This function brings DMA out of reset
-*/
-
-void dmaEnable(void)
-{
- dmaREG->GCTRL = 0x00000001; /* reset dma */
- dmaREG->GCTRL |= 0x00010000; /* enable dma */
- dmaREG->GCTRL |= 0x00000300; /* stop at suspend */
-}
-
-
-
-/** @fn void dmaReqAssign(uint32_t channel,uint32_t reqline)
-* @brief Initializes the DMA Driver
-*
-* This function assigns dma request lines to channels
-*/
-
-void dmaReqAssign(uint32_t channel,uint32_t reqline)
-{
- register uint32_t i=0,j=0;
-
- i = channel >> 2; /* Find the register to configure */
- j = channel -(i<<2); /* Find the offset of the type */
- j = 3-j; /* reverse the byte order */
- j = j<<3; /* find the bit location */
-
- /* mapping channel 'i' to request line 'j' */
- dmaREG->DREQASI[i] &= ~(0xff<<j);
- dmaREG->DREQASI[i] |= (reqline<<j);
-}
-
-
-
-/** @fn void dmaSetCtrlPacket(uint32_t channel)
-* @brief Initializes the DMA Driver
-*
-* This function sets control packet
-*/
-
-void dmaSetCtrlPacket(uint32_t channel)
-{
- register uint32_t i=0,j=0;
-
- dmaRAMREG->PCP[channel].ISADDR = g_dmaCTRLPKT.SADD;
-
- dmaRAMREG->PCP[channel].IDADDR = g_dmaCTRLPKT.DADD;
-
- dmaRAMREG->PCP[channel].ITCOUNT = (g_dmaCTRLPKT.FRCNT << 16) | g_dmaCTRLPKT.ELCNT;
-
- dmaRAMREG->PCP[channel].CHCTRL = (g_dmaCTRLPKT.RDSIZE << 14) | (g_dmaCTRLPKT.WRSIZE << 12) | (g_dmaCTRLPKT.TTYPE << 8)| \
- (g_dmaCTRLPKT.ADDMODERD << 3 ) | (g_dmaCTRLPKT.ADDMODEWR << 1 ) | (g_dmaCTRLPKT.AUTOINIT);
-
- dmaRAMREG->PCP[channel].CHCTRL |= (g_dmaCTRLPKT.CHCTRL << 16);
-
- dmaRAMREG->PCP[channel].EIOFF = (g_dmaCTRLPKT.ELDOFFSET << 16) | (g_dmaCTRLPKT.ELSOFFSET);
-
- dmaRAMREG->PCP[channel].FIOFF = (g_dmaCTRLPKT.FRDOFFSET << 16) | (g_dmaCTRLPKT.FRSOFFSET);
-
- i = channel >> 3; /* Find the register to write */
- j = channel -(i << 3); /* Find the offset of the 4th bit */
- j = 7 -j; /* Reverse the order of the 4th bit offset */
- j = j<<2; /* Find the bit location of the 4th bit to write */
-
- dmaREG->PAR[i] &= ~(0xf<<j);
- dmaREG->PAR[i] |= (g_dmaCTRLPKT.PORTASGN<<j);
-}
-
-
-
-/** @fn void dmaSetCtrlPacket(uint32_t channel)
-* @brief Initializes the DMA Driver
-*
-* This function sets control packet
-*/
-
-void dmaSetChEnable(uint32_t channel,uint32_t type)
-{
- if(type == DMA_HW)
- {
- dmaREG->HWCHENAS = (1 << channel);
- }
- else if(type == DMA_SW)
- {
- dmaREG->SWCHENAS = (1 << channel);
- }
-}
-
-
-
-/**/
-
+++ /dev/null
-/** @file dmm.c
-* @brief DMM Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/ti_drv_dmm.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void dmmInit(void)
-* @brief Initializes the DMM Driver
-*
-* This function initializes the DMM module.
-*/
-
-/* ***************************************************** */
-/* Modify only by hand -- do not use Halcogen! */
-/* ***************************************************** */
-void dmmInit(void)
-{
- /** - DMM pins default output value
- * 1 - High, 0 - Low
- */
- dmmREG->PC3 = 0 /* DMM SYNC - FAN_CONTROL*/
- | (0 << 1) /* DMM CLK - ETH_RESET */
- | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
- | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
- | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
- | (0 << 5) /* DMM DATA[3] - VBAT_EN */
- | (0 << 6) /* DMM DATA[4] - NOT USED */
- | (0 << 7) /* DMM DATA[5] - SPICSA */
- | (0 << 8) /* DMM DATA[6] - SPICSB */
- | (0 << 9) /* DMM DATA[7] - NOT USED */
- | (0 << 10) /* DMM DATA[8] - NOT USED */
- | (1 << 11) /* DMM DATA[9] - MOUT1_EN */
- | (1 << 12) /* DMM DATA[10] - MOUT2_EN */
- | (1 << 13) /* DMM DATA[11] - CAN_NSTB */
- | (0 << 14) /* DMM DATA[12] - NOT USED */
- | (0 << 15) /* DMM DATA[13] - CAN_EN */
- | (1 << 16) /* DMM DATA[14] - LIN2_NSLP */
- | (1 << 17) /* DMM DATA[15] - LIN1_NSLP */
- | (0 << 18); /* DMM ENA - DIN_INT */
-
- /** - DMM pins direction
- * 1 - Output, 0 - Input
- */
- dmmREG->PC1 = 1 /* DMM SYNC - FAN_CONTROL*/
- | (1 << 1) /* DMM CLK - ETH_RESET */
- | (1 << 2) /* DMM DATA[0] - VBAT_1_EN */
- | (1 << 3) /* DMM DATA[1] - VBAT_2_EN */
- | (1 << 4) /* DMM DATA[2] - VBAT_3_EN */
- | (1 << 5) /* DMM DATA[3] - VBAT_EN */
- | (1 << 6) /* DMM DATA[4] - NOT USED */
- | (1 << 7) /* DMM DATA[5] - SPICSA */
- | (1 << 8) /* DMM DATA[6] - SPICSB */
- | (1 << 9) /* DMM DATA[7] - NOT USED */
- | (1 << 10) /* DMM DATA[8] - NOT USED */
- | (0 << 11) /* DMM DATA[9] - MOUT1_EN */
- | (0 << 12) /* DMM DATA[10] - MOUT2_EN */
- | (1 << 13) /* DMM DATA[11] - CAN_NSTB */
- | (1 << 14) /* DMM DATA[12] - NOT USED */
- | (1 << 15) /* DMM DATA[13] - CAN_EN */
- | (1 << 16) /* DMM DATA[14] - LIN2_NSLP */
- | (1 << 17) /* DMM DATA[15] - LIN1_NSLP */
- | (1 << 18); /* DMM ENA - DIN_INT */
-
- /** - DMM pins open drain enable
- * 1 - Enabled, 0 - Disabled
- */
- dmmREG->PC6 = 0 /* DMM SYNC - FAN_CONTROL*/
- | (0 << 1) /* DMM CLK - ETH_RESET */
- | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
- | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
- | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
- | (0 << 5) /* DMM DATA[3] - VBAT_EN */
- | (0 << 6) /* DMM DATA[4] - NOT USED */
- | (0 << 7) /* DMM DATA[5] - SPICSA */
- | (0 << 8) /* DMM DATA[6] - SPICSB */
- | (0 << 9) /* DMM DATA[7] - NOT USED */
- | (0 << 10) /* DMM DATA[8] - NOT USED */
- | (1 << 11) /* DMM DATA[9] - MOUT1_EN */
- | (1 << 12) /* DMM DATA[10] - MOUT2_EN */
- | (0 << 13) /* DMM DATA[11] - CAN_NSTB */
- | (0 << 14) /* DMM DATA[12] - NOT USED */
- | (0 << 15) /* DMM DATA[13] - CAN_EN */
- | (0 << 16) /* DMM DATA[14] - LIN2_NSLP */
- | (0 << 17) /* DMM DATA[15] - LIN1_NSLP */
- | (0 << 18); /* DMM ENA - DIN_INT */
-
-
- /** - DMM pins pull type selection
- * 1 - Pull-up, 0 - Pull-down
- */
- dmmREG->PC8 = 0 /* DMM SYNC - FAN_CONTROL*/
- | (0 << 1) /* DMM CLK - ETH_RESET */
- | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
- | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
- | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
- | (0 << 5) /* DMM DATA[3] - VBAT_EN */
- | (0 << 6) /* DMM DATA[4] - NOT USED */
- | (0 << 7) /* DMM DATA[5] - SPICSA */
- | (0 << 8) /* DMM DATA[6] - SPICSB */
- | (0 << 9) /* DMM DATA[7] - NOT USED */
- | (0 << 10) /* DMM DATA[8] - NOT USED */
- | (1 << 11) /* DMM DATA[9] - MOUT1_EN */
- | (1 << 12) /* DMM DATA[10] - MOUT2_EN */
- | (0 << 13) /* DMM DATA[11] - CAN_NSTB */
- | (0 << 14) /* DMM DATA[12] - NOT USED */
- | (0 << 15) /* DMM DATA[13] - CAN_EN */
- | (0 << 16) /* DMM DATA[14] - LIN2_NSLP */
- | (0 << 17) /* DMM DATA[15] - LIN1_NSLP */
- | (0 << 18); /* DMM ENA - DIN_INT */
-
-
- /** - DMM pins pull resistor enable
- * 1 - Enabled, 0 - Disabled
- */
- dmmREG->PC7 = 1 /* DMM SYNC - FAN_CONTROL*/
- | (1 << 1) /* DMM CLK - ETH_RESET */
- | (1 << 2) /* DMM DATA[0] - VBAT_1_EN */
- | (1 << 3) /* DMM DATA[1] - VBAT_2_EN */
- | (1 << 4) /* DMM DATA[2] - VBAT_3_EN */
- | (1 << 5) /* DMM DATA[3] - VBAT_EN */
- | (1 << 6) /* DMM DATA[4] - NOT USED */
- | (1 << 7) /* DMM DATA[5] - SPICSA */
- | (1 << 8) /* DMM DATA[6] - SPICSB */
- | (1 << 9) /* DMM DATA[7] - NOT USED */
- | (1 << 10) /* DMM DATA[8] - NOT USED */
- | (0 << 11) /* DMM DATA[9] - MOUT1_EN */
- | (0 << 12) /* DMM DATA[10] - MOUT2_EN */
- | (1 << 13) /* DMM DATA[11] - CAN_NSTB */
- | (1 << 14) /* DMM DATA[12] - NOT USED */
- | (1 << 15) /* DMM DATA[13] - CAN_EN */
- | (1 << 16) /* DMM DATA[14] - LIN2_NSLP */
- | (1 << 17) /* DMM DATA[15] - LIN1_NSLP */
- | (1 << 18); /* DMM ENA - DIN_INT */
-
- /** - DMM pins type selection
- * 1 - Pin is functional, 0 - Pin is GPIO
- */
- dmmREG->PC0 = 0 /* DMM SYNC - FAN_CONTROL*/
- | (0 << 1) /* DMM CLK - ETH_RESET */
- | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
- | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
- | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
- | (0 << 5) /* DMM DATA[3] - VBAT_EN */
- | (0 << 6) /* DMM DATA[4] - NOT USED */
- | (0 << 7) /* DMM DATA[5] - SPICSA */
- | (0 << 8) /* DMM DATA[6] - SPICSB */
- | (0 << 9) /* DMM DATA[7] - NOT USED */
- | (0 << 10) /* DMM DATA[8] - NOT USED */
- | (0 << 11) /* DMM DATA[9] - MOUT1_EN */
- | (0 << 12) /* DMM DATA[10] - MOUT2_EN */
- | (0 << 13) /* DMM DATA[11] - CAN_NSTB */
- | (0 << 14) /* DMM DATA[12] - NOT USED */
- | (0 << 15) /* DMM DATA[13] - CAN_EN */
- | (0 << 16) /* DMM DATA[14] - LIN2_NSLP */
- | (0 << 17) /* DMM DATA[15] - LIN1_NSLP */
- | (0 << 18); /* DMM ENA - DIN_INT */
-
-}
+++ /dev/null
-/**
- * \file emac.c
- *
- * \brief EMAC APIs.
- *
- * This file contains the device abstraction layer APIs for EMAC.
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-
-#include "base.h"
-#include "sys/hw_reg_access.h"
-#include "sys/ti_drv_emac.h"
-#include "sys/hw_emac.h"
-#include "sys/hw_emac_ctrl.h"
-
-/*******************************************************************************
-* INTERNAL MACRO DEFINITIONS
-*******************************************************************************/
-#define EMAC_CONTROL_RESET (0x01u)
-#define EMAC_SOFT_RESET (0x01u)
-#define EMAC_MAX_HEADER_DESC (8u)
-#define EMAC_UNICAST_DISABLE (0xFFu)
-
-/*******************************************************************************
-* API FUNCTION DEFINITIONS
-*******************************************************************************/
-/**
- * \brief Enables the TXPULSE Interrupt Generation.
- *
- * \param emacBase Base address of the EMAC Module registers.
- * \param emacCtrlBase Base address of the EMAC CONTROL module registers
- * \param ctrlCore Control core for which the interrupt to be enabled.
- * \param channel Channel number for which interrupt to be enabled
- *
- * \return None
- *
- **/
-void EMACTxIntPulseEnable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel)
-{
- HWREG(emacBase + EMAC_TXINTMASKSET) |= (1 << channel);
-
- HWREG(emacCtrlBase + EMAC_CTRL_CnTXEN(ctrlCore)) |= (1 << channel);
-}
-
-/**
- * \brief Disables the TXPULSE Interrupt Generation.
- *
- * \param emacBase Base address of the EMAC Module registers.
- * \param emacCtrlBase Base address of the EMAC CONTROL module registers
- * \param ctrlCore Control core for which the interrupt to be disabled.
- * \param channel Channel number for which interrupt to be disabled
- *
- * \return None
- *
- **/
-void EMACTxIntPulseDisable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel)
-{
- HWREG(emacBase + EMAC_TXINTMASKCLEAR) |= (1 << channel);
-
- HWREG(emacCtrlBase + EMAC_CTRL_CnTXEN(ctrlCore)) &= ~(1 << channel);
-}
-
-/**
- * \brief Enables the RXPULSE Interrupt Generation.
- *
- * \param emacBase Base address of the EMAC Module registers.
- * \param emacCtrlBase Base address of the EMAC CONTROL module registers
- * \param ctrlCore Control core for which the interrupt to be enabled.
- * \param channel Channel number for which interrupt to be enabled
- *
- * \return None
- *
- **/
-void EMACRxIntPulseEnable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel)
-{
- HWREG(emacBase + EMAC_RXINTMASKSET) |= (1 << channel);
-
- HWREG(emacCtrlBase + EMAC_CTRL_CnRXEN(ctrlCore)) |= (1 << channel);
-}
-
-/**
- * \brief Disables the RXPULSE Interrupt Generation.
- *
- * \param emacBase Base address of the EMAC Module registers.
- * \param emacCtrlBase Base address of the EMAC CONTROL module registers
- * \param ctrlCore Control core for which the interrupt to be disabled.
- * \param channel Channel number for which interrupt to be disabled
- *
- * \return None
- *
- **/
-void EMACRxIntPulseDisable(unsigned int emacBase, unsigned int emacCtrlBase,
- unsigned int ctrlCore, unsigned int channel)
-{
- HWREG(emacBase + EMAC_RXINTMASKCLEAR) |= (1 << channel);
-
- HWREG(emacCtrlBase + EMAC_CTRL_CnRXEN(ctrlCore)) &= ~(1 << channel);
-}
-/**
- * \brief This API sets the RMII speed. The RMII Speed can be 10 Mbps or
- * 100 Mbps
- *
- * \param emacBase Base address of the EMAC Module registers.
- * \param speed speed for setting.
- * speed can take the following values. \n
- * EMAC_RMIISPEED_10MBPS - 10 Mbps \n
- * EMAC_RMIISPEED_100MBPS - 100 Mbps.
- *
- * \return None
- *
- **/
-void EMACRMIISpeedSet(unsigned int emacBase, unsigned int speed)
-{
- HWREG(emacBase + EMAC_MACCONTROL) &= ~EMAC_MACCONTROL_RMIISPEED;
-
- HWREG(emacBase + EMAC_MACCONTROL) |= speed;
-}
-
-/**
- * \brief This API enables the MII control block
- *
- * \param emacBase Base address of the EMAC Module registers.
- *
- * \return None
- *
- **/
-void EMACMIIEnable(unsigned int emacBase)
-{
- HWREG(emacBase + EMAC_MACCONTROL) |= EMAC_MACCONTROL_GMIIEN;
-}
-
-/**
- * \brief This API sets the duplex mode of operation(full/half) for MAC.
- *
- * \param emacBase Base address of the EMAC Module registers.
- * \param duplexMode duplex mode of operation.
- * duplexMode can take the following values. \n
- * EMAC_DUPLEX_FULL - Full Duplex \n
- * EMAC_DUPLEX_HALF - Half Duplex.
- *
- * \return None
- *
- **/
-void EMACDuplexSet(unsigned int emacBase, unsigned int duplexMode)
-{
- HWREG(emacBase + EMAC_MACCONTROL) &= ~EMAC_MACCONTROL_FULLDUPLEX;
-
- HWREG(emacBase + EMAC_MACCONTROL) |= duplexMode;
-}
-
-/**
- * \brief API to enable the transmit in the TX Control Register
- * After the transmit is enabled, any write to TXHDP of
- * a channel will start transmission
- *
- * \param emacBase Base Address of the EMAC Module Registers.
- *
- * \return None
- *
- **/
-void EMACTxEnable(unsigned int emacBase)
-{
- HWREG(emacBase + EMAC_TXCONTROL) = EMAC_TXCONTROL_TXEN;
-}
-
-/**
- * \brief API to enable the receive in the RX Control Register
- * After the transmit is enabled, and write to RXHDP of
- * a channel, the data can be received in the destination
- * specified by the corresponding RX buffer descriptor.
- *
- * \param emacBase Base Address of the EMAC Module Registers.
- *
- * \return None
- *
- **/
-void EMACRxEnable(unsigned int emacBase)
-{
- HWREG(emacBase + EMAC_RXCONTROL) = EMAC_RXCONTROL_RXEN;
-}
-
-/**
- * \brief API to write the TX HDP register. If transmit is enabled,
- * write to the TX HDP will immediately start transmission.
- * The data will be taken from the buffer pointer of the TX buffer
- * descriptor written to the TX HDP
- *
- * \param emacBase Base Address of the EMAC Module Registers.\n
- * \param descHdr Address of the TX buffer descriptor
- * \param channel Channel Number
- *
- * \return None
- *
- **/
-volatile unsigned int lastInputdescHdr = 0;
-volatile unsigned int valHDPbefWrite = 0;
-void EMACTxHdrDescPtrWrite(unsigned int emacBase, unsigned int descHdr,
- unsigned int channel)
-{
- valHDPbefWrite = HWREG(emacBase + EMAC_TXHDP(channel));
- HWREG(emacBase + EMAC_TXHDP(channel)) = descHdr;
- lastInputdescHdr = descHdr;
-}
-
-/**
- * \brief API to write the RX HDP register. If receive is enabled,
- * write to the RX HDP will enable data reception to point to
- * the corresponding RX buffer descriptor's buffer pointer.
- *
- * \param emacBase Base Address of the EMAC Module Registers.\n
- * \param descHdr Address of the RX buffer descriptor
- * \param channel Channel Number
- *
- * \return None
- *
- **/
-void EMACRxHdrDescPtrWrite(unsigned int emacBase, unsigned int descHdr,
- unsigned int channel)
-{
- HWREG(emacBase + EMAC_RXHDP(channel)) = descHdr;
-}
-
-/**
- * \brief This API Initializes the EMAC and EMAC Control modules. The
- * EMAC Control module is reset, the CPPI RAM is cleared. also,
- * all the interrupts are disabled. This API doesnot enable any
- * interrupt or operation of the EMAC.
- *
- * \param emacCtrlBase Base Address of the EMAC Control module
- * registers.\n
- * \param emacBase Base address of the EMAC module registers
- *
- * \return None
- *
- **/
-void EMACInit(unsigned int emacCtrlBase, unsigned int emacBase)
-{
- unsigned int cnt;
-
- /* Reset the EMAC Control Module. This clears the CPPI RAM also */
- HWREG(emacCtrlBase + EMAC_CTRL_SOFTRESET) = EMAC_CONTROL_RESET;
-
- while(HWREG(emacCtrlBase + EMAC_CTRL_SOFTRESET) & EMAC_CONTROL_RESET);
-
- /* Reset the EMAC Control Module. This clears the CPPI RAM also */
- HWREG(emacBase + EMAC_SOFTRESET) = EMAC_SOFT_RESET;
-
- while(HWREG(emacBase + EMAC_SOFTRESET) & EMAC_SOFT_RESET);
-
- HWREG(emacBase + EMAC_MACCONTROL)= 0;
- HWREG(emacBase + EMAC_RXCONTROL)= 0;
- HWREG(emacBase + EMAC_TXCONTROL)= 0;
-
- /* Initialize all the header descriptor pointer registers */
- for(cnt = 0; cnt< EMAC_MAX_HEADER_DESC; cnt++)
- {
- HWREG(emacBase + EMAC_RXHDP(cnt)) = 0;
- HWREG(emacBase + EMAC_TXHDP(cnt)) = 0;
- HWREG(emacBase + EMAC_RXCP(cnt)) = 0;
- HWREG(emacBase + EMAC_TXCP(cnt)) = 0;
- HWREG(emacBase + EMAC_RXFREEBUFFER(cnt)) = 0xFF;
- }
- /* Clear the interrupt enable for all the channels */
- HWREG(emacBase + EMAC_TXINTMASKCLEAR) = 0xFF;
- HWREG(emacBase + EMAC_RXINTMASKCLEAR) = 0xFF;
-
- HWREG(emacBase + EMAC_MACHASH1) = 0;
- HWREG(emacBase + EMAC_MACHASH2) = 0;
-
- HWREG(emacBase + EMAC_RXBUFFEROFFSET) = 0;
-}
-
-/**
- * \brief Sets the MAC Address in MACSRCADDR registers.
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param macAddr Start address of a MAC address array.
- * The array[0] shall be the LSB of the MAC address
- *
- * \return None
- *
- **/
-void EMACMACSrcAddrSet(unsigned int emacBase, unsigned char *macAddr)
-{
- HWREG(emacBase + EMAC_MACSRCADDRHI) = macAddr[5] |(macAddr[4] << 8)
- |(macAddr[3] << 16) |(macAddr[2] << 24);
- HWREG(emacBase + EMAC_MACSRCADDRLO) = macAddr[1] | (macAddr[0] << 8);
-}
-
-/**
- * \brief Sets the MAC Address in MACADDR registers.
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number
- * \param matchFilt Match or Filter
- * \param macAddr Start address of a MAC address array.
- * The array[0] shall be the LSB of the MAC address
- * matchFilt can take the following values \n
- * EMAC_MACADDR_NO_MATCH_NO_FILTER - Address is not used to match
- * or filter incoming packet. \n
- * EMAC_MACADDR_FILTER - Address is used to filter incoming packets \n
- * EMAC_MACADDR_MATCH - Address is used to match incoming packets \n
- *
- * \return None
- *
- **/
-void EMACMACAddrSet(unsigned int emacBase, unsigned int channel,
- unsigned char *macAddr, unsigned int matchFilt)
-{
- HWREG(emacBase + EMAC_MACINDEX) = channel;
-
- HWREG(emacBase + EMAC_MACADDRHI) = macAddr[5] |(macAddr[4] << 8)
- |(macAddr[3] << 16) |(macAddr[2] << 24);
- HWREG(emacBase + EMAC_MACADDRLO) = macAddr[1] | (macAddr[0] << 8)
- | matchFilt | (channel << 16);
-}
-
-/**
- * \brief Acknowledges an interrupt processed to the EMAC Control Core.
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param eoiFlag Type of interrupt to acknowledge to the EMAC Control
- * module.
- * eoiFlag can take the following values \n
- * EMAC_INT_CORE0_TX - Core 0 TX Interrupt
- * EMAC_INT_CORE1_TX - Core 1 TX Interrupt
- * EMAC_INT_CORE2_TX - Core 2 TX Interrupt
- * EMAC_INT_CORE0_RX - Core 0 RX Interrupt
- * EMAC_INT_CORE1_RX - Core 1 RX Interrupt
- * EMAC_INT_CORE2_RX - Core 2 RX Interrupt
- * \return None
- *
- **/
-void EMACCoreIntAck(unsigned int emacBase, unsigned int eoiFlag)
-{
- /* Acknowledge the EMAC Control Core */
- HWREG(emacBase + EMAC_MACEOIVECTOR) = eoiFlag;
-}
-
-/**
- * \brief Writes the the TX Completion Pointer for a specific channel
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number.
- * \param comPtr Completion Pointer Value to be written
- *
- * \return None
- *
- **/
-void EMACTxCPWrite(unsigned int emacBase, unsigned int channel, unsigned int comPtr)
-{
- HWREG(emacBase + EMAC_TXCP(channel)) = comPtr;
-}
-
-uint32_t EMACTxCPRead(unsigned int emacBase, unsigned int channel)
-{
- return (HWREG(emacBase + EMAC_TXCP(channel)));
-}
-
-/**
- * \brief Writes the the RX Completion Pointer for a specific channel
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number.
- * \param comPtr Completion Pointer Value to be written
- *
- * \return None
- *
- **/
-void EMACRxCPWrite(unsigned int emacBase, unsigned int channel, unsigned int comPtr)
-{
- HWREG(emacBase + EMAC_RXCP(channel)) = comPtr;
-}
-
-/**
- * \brief Acknowledges an interrupt processed to the EMAC module. After
- * processing an interrupt, the last processed buffer descriptor is
- * written to the completion pointer. Also this API acknowledges
- * the EMAC Control Module that the RX interrupt is processed for
- * a specified core
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number
- * \param comPtr Completion Pointer value. This shall be the buffer
- * descriptor address last processed.
- * \param eoiFlag Type of interrupt to acknowledge to the EMAC Control
- module.
- * eoiFlag can take the following values \n
- * EMAC_INT_CORE0_RX - Core 0 RX Interrupt
- * EMAC_INT_CORE1_RX - Core 1 RX Interrupt
- * EMAC_INT_CORE2_RX - Core 2 RX Interrupt
- * \return None
- *
- **/
-void EMACRxIntAckToClear(unsigned int emacBase, unsigned int channel,
- unsigned int comPtr, unsigned eoiFlag)
-{
- HWREG(emacBase + EMAC_RXCP(channel)) = comPtr;
-
- /* Acknowledge the EMAC Control Core */
- HWREG(emacBase + EMAC_MACEOIVECTOR) = eoiFlag;
-}
-
-/**
- * \brief Enables a specific channel to receive broadcast frames
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number.
- *
- * \return None
- *
- **/
-void EMACRxBroadCastEnable(unsigned int emacBase, unsigned int channel)
-{
- HWREG(emacBase + EMAC_RXMBPENABLE) &= ~EMAC_RXMBPENABLE_RXBROADCH;
-
- HWREG(emacBase + EMAC_RXMBPENABLE) |=
- EMAC_RXMBPENABLE_RXBROADEN |
- (channel << EMAC_RXMBPENABLE_RXBROADCH_SHIFT);
-}
-
-void EMACRxPromiscEnable(unsigned int emacBase, unsigned int channel)
-{
- HWREG(emacBase + EMAC_RXMBPENABLE) |= EMAC_RXMBPENABLE_RXCAFEN | EMAC_RXMBPENABLE_RXCEFEN;
- HWREG(emacBase + EMAC_RXMBPENABLE) |= (channel << EMAC_RXMBPENABLE_RXPROMCH_SHIFT);
-}
-/**
- * \brief Enables unicast for a specific channel
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number.
- *
- * \return None
- *
- **/
-void EMACRxUnicastSet(unsigned int emacBase, unsigned int channel)
-{
- HWREG(emacBase + EMAC_RXUNICASTSET) |= (1 << channel);
-}
-
-/**
- * \brief Set the free buffers for a specific channel
- *
- * \param emacBase Base Address of the EMAC module registers.
- * \param channel Channel Number.
- * \param nBuf Number of free buffers
- *
- * \return None
- *
- **/
-void EMACNumFreeBufSet(unsigned int emacBase, unsigned int channel,
- unsigned int nBuf)
-{
- HWREG(emacBase + EMAC_RXFREEBUFFER(channel)) = nBuf;
-}
-
-/**
- * \brief Gets the interrupt vectors of EMAC, which are pending
- *
- * \param emacBase Base Address of the EMAC module registers.
- *
- * \return Vectors
- *
- **/
-unsigned int EMACIntVectorGet(unsigned int emacBase)
-{
- return (HWREG(emacBase + EMAC_MACINVECTOR));
-}
-
-unsigned int EMACIntVectorRawGet(unsigned int emacBase)
-{
- return (HWREG(emacBase + EMAC_RXINTSTATRAW));
-}
-
-/***************************** End Of File ***********************************/
+++ /dev/null
-/** @file emif.c
-* @brief emif Driver Implementation File
-* @date 15.January.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-
-#include "sys/system.h"
-#include "sys/ti_drv_emif.h"
-
-/** @fn void emif_SDRAMInit()
-* @brief Initializes the emif Driver for SDRAM
-*
-* This function initializes the emif driver for SDRAM (SDRAM initialization function).
-*/
-
-
-void emif_SDRAMInit()
-{
- uint32_t buffer;
- unsigned long saveif;
-
- /*
- * configure for SDRAM 64MB IS45S16320
- *
- * 4 banks, 1024 rows and 8192 columns
- * 2 bits , 10 bits and 13 bits
- * CL = 2/3
- * full refresh 64 ms
- * for 80 degC 16 ms
- * self refresh exit time 67 ns
- */
-
- saveif = _disable_IRQ();
-
- /*
- * From UM 4.3.3 Control of Special Multiplexed Options
- * Any application that requires the EMIF functionality
- * must set GPREG1[31]. This allows these 8 EMIF module
- * outputs to be driven on to the assigned balls.
- */
-
- systemREG1->GPREG1 |= 0x80000000;
-
- emifREG->SDTIMR = ((9-1) << 27)| /* TRF_C REFR to REFR*/
- ((3-1) << 24)| /* T_RP PRE to ACTIV or REFR */
- (0 << 23)|
- ((3-1) << 20)| /* T_RCD ACTIV to RD/WR */
- (0 << 19)|
- ((2-1) << 16)| /* T_WR WRITE to PRE */
- ((6-1) << 12)| /* T_RAS ACTIV to PRE */
- ((9-1) << 8)| /* T_RC ACTIV to ACTIV */
- (0 << 7)|
- ((2-1) << 4)| /* T_RRD ACTIV to ACTIV other bank */
- (0 << 3);
-
- /* configure refresh rate*/
- emifREG->SDSRETR = (5+3-1);
-
- /* 80e6 * 16e-3 / 8192 => less or equal to 156 */
- emifREG->SDRCR = 156;
-
-/** -general clearing of register
-* -for NM for setting 16 bit data bus
-* -cas latency
-* -BIT11_9CLOCK to allow the cl field to be written
-* -selecting the banks
-* -setting the pagesize
-*/
- emifREG->SDCR = (0 << 31)| /* SR self refresh mode */
- (0 << 30)| /* PD power down */
- (0 << 29)| /* PDWR refresh in PD */
- (1 << 14)| /* NM narrow mode */
- (3 << 9)| /* CAS latency */
- (1 << 8)| /* CAS latency lock */
- (2 << 4)| /* IBANK .. 4 banks */
- (2 << 0); /* PAGESIZE .. 10 bit / 1024ele */
-/* wait for a read to happen*/
- buffer = *(volatile uint32_t *)PTR;
- buffer = buffer;
- emifREG->SDRCR = 156;
-
- _restore_interrupts(saveif);
-}
-
-
-
-
-
-
-
+++ /dev/null
-/** @file esm.c
-* @brief Esm Driver Source File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-* This file contains:
-* - API Funcions
-* .
-* which are relevant for the Esm driver.
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-/* Include Files */
-
-#include "sys/ti_drv_esm.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-
-/** @fn void esmInit(void)
-* @brief Initializes Esm Driver
-*
-* This function initializes the Esm driver.
-*
-*/
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-void esmInit(void)
-{
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
- /** - Disable error pin channels */
- esmREG->EPENACLR1 = 0xFFFFFFFFU;
- esmREG->EPENACLR4 = 0xFFFFFFFFU;
-
- /** - Disable interrupts */
- esmREG->INTENACLR1 = 0xFFFFFFFFU;
- esmREG->INTENACLR4 = 0xFFFFFFFFU;
-
- /** - Clear error status flags */
- esmREG->ESTATUS1[0U] = 0xFFFFFFFFU;
- esmREG->ESTATUS1[1U] = 0xFFFFFFFFU;
- esmREG->ESTATUS2EMU = 0xFFFFFFFFU;
- esmREG->ESTATUS1[2U] = 0xFFFFFFFFU;
- esmREG->ESTATUS4[0U] = 0xFFFFFFFFU;
- esmREG->ESTATUS4[1U] = 0xFFFFFFFFU;
- esmREG->ESTATUS5EMU = 0xFFFFFFFFU;
- esmREG->ESTATUS4[2U] = 0xFFFFFFFFU;
-
- /** - Setup LPC preload */
- esmREG->LTCPRELOAD = 16384U - 1U;
-
- /** - Reset error pin */
- if (esmREG->EPSTATUS == 0U)
- {
- esmREG->KEY = 0x00000005U;
- }
- else
- {
- esmREG->KEY = 0x00000000U;
- }
-
- /** - Clear interrupt level */
- esmREG->INTLVLCLR1 = 0xFFFFFFFFU;
- esmREG->INTLVLCLR4 = 0xFFFFFFFFU;
-
- /** - Set interrupt level */
- esmREG->INTLVLSET1 = (0U << 31U)
- | (0U << 30U)
- | (0U << 29U)
- | (0U << 28U)
- | (0U << 27U)
- | (0U << 26U)
- | (0U << 25U)
- | (0U << 24U)
- | (0U << 23U)
- | (0U << 22U)
- | (0U << 21U)
- | (0U << 20U)
- | (0U << 19U)
- | (0U << 18U)
- | (0U << 17U)
- | (0U << 16U)
- | (0U << 15U)
- | (0U << 14U)
- | (0U << 13U)
- | (0U << 12U)
- | (0U << 11U)
- | (0U << 10U)
- | (0U << 9U)
- | (0U << 8U)
- | (0U << 7U)
- | (0U << 6U)
- | (0U << 5U)
- | (0U << 4U)
- | (0U << 3U)
- | (0U << 2U)
- | (0U << 1U)
- | (0U);
-
- esmREG->INTLVLSET4 = (0U << 31U)
- | (0U << 30U)
- | (0U << 29U)
- | (0U << 28U)
- | (0U << 27U)
- | (0U << 26U)
- | (0U << 25U)
- | (0U << 24U)
- | (0U << 23U)
- | (0U << 22U)
- | (0U << 21U)
- | (0U << 20U)
- | (0U << 19U)
- | (0U << 18U)
- | (0U << 17U)
- | (0U << 16U)
- | (0U << 15U)
- | (0U << 14U)
- | (0U << 13U)
- | (0U << 12U)
- | (0U << 11U)
- | (0U << 10U)
- | (0U << 9U)
- | (0U << 8U)
- | (0U << 7U)
- | (0U << 6U)
- | (0U << 5U)
- | (0U << 4U)
- | (0U << 3U)
- | (0U << 2U)
- | (0U << 1U)
- | (0U);
-
- /** - Enable error pin channels */
- esmREG->EPENASET1 = (0U << 31U)
- | (0U << 30U)
- | (0U << 29U)
- | (0U << 28U)
- | (0U << 27U)
- | (0U << 26U)
- | (0U << 25U)
- | (0U << 24U)
- | (0U << 23U)
- | (0U << 22U)
- | (0U << 21U)
- | (0U << 20U)
- | (0U << 19U)
- | (0U << 18U)
- | (0U << 17U)
- | (0U << 16U)
- | (0U << 15U)
- | (0U << 14U)
- | (0U << 13U)
- | (0U << 12U)
- | (0U << 11U)
- | (0U << 10U)
- | (0U << 9U)
- | (0U << 8U)
- | (0U << 7U)
- | (0U << 6U)
- | (0U << 5U)
- | (0U << 4U)
- | (0U << 3U)
- | (0U << 2U)
- | (0U << 1U)
- | (0U);
-
- esmREG->EPENASET4 = (0U << 31U)
- | (0U << 30U)
- | (0U << 29U)
- | (0U << 28U)
- | (0U << 27U)
- | (0U << 26U)
- | (0U << 25U)
- | (0U << 24U)
- | (0U << 23U)
- | (0U << 22U)
- | (0U << 21U)
- | (0U << 20U)
- | (0U << 19U)
- | (0U << 18U)
- | (0U << 17U)
- | (0U << 16U)
- | (0U << 15U)
- | (0U << 14U)
- | (0U << 13U)
- | (0U << 12U)
- | (0U << 11U)
- | (0U << 10U)
- | (0U << 9U)
- | (0U << 8U)
- | (0U << 7U)
- | (0U << 6U)
- | (0U << 5U)
- | (0U << 4U)
- | (0U << 3U)
- | (0U << 2U)
- | (0U << 1U)
- | (0U);
-
- /** - Enable interrpts */
- esmREG->INTENASET1 = (0U << 31U)
- | (0U << 30U)
- | (0U << 29U)
- | (0U << 28U)
- | (0U << 27U)
- | (0U << 26U)
- | (0U << 25U)
- | (0U << 24U)
- | (0U << 23U)
- | (0U << 22U)
- | (0U << 21U)
- | (0U << 20U)
- | (0U << 19U)
- | (0U << 18U)
- | (0U << 17U)
- | (0U << 16U)
- | (0U << 15U)
- | (0U << 14U)
- | (0U << 13U)
- | (0U << 12U)
- | (0U << 11U)
- | (0U << 10U)
- | (0U << 9U)
- | (0U << 8U)
- | (0U << 7U)
- | (0U << 6U)
- | (0U << 5U)
- | (0U << 4U)
- | (0U << 3U)
- | (0U << 2U)
- | (0U << 1U)
- | (0U);
-
- esmREG->INTENASET4 = (0U << 31U)
- | (0U << 30U)
- | (0U << 29U)
- | (0U << 28U)
- | (0U << 27U)
- | (0U << 26U)
- | (0U << 25U)
- | (0U << 24U)
- | (0U << 23U)
- | (0U << 22U)
- | (0U << 21U)
- | (0U << 20U)
- | (0U << 19U)
- | (0U << 18U)
- | (0U << 17U)
- | (0U << 16U)
- | (0U << 15U)
- | (0U << 14U)
- | (0U << 13U)
- | (0U << 12U)
- | (0U << 11U)
- | (0U << 10U)
- | (0U << 9U)
- | (0U << 8U)
- | (0U << 7U)
- | (0U << 6U)
- | (0U << 5U)
- | (0U << 4U)
- | (0U << 3U)
- | (0U << 2U)
- | (0U << 1U)
- | (0U);
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-}
-
-
-/** @fn uint32_t esmError(void)
-* @brief Return Error status
-*
-* @return The error status
-*
-* Returns the error status.
-*/
-uint32_t esmError(void)
-{
- uint32_t status;
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-
- status = esmREG->EPSTATUS;
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- return status;
-}
-
-
-/** @fn void esmEnableError(uint64_t channels)
-* @brief Enable Group 1 Channels Error Signals propagation
-*
-* @param[in] channels - Channel mask
-*
-* Enable Group 1 Channels Error Signals propagation to the error pin.
-*/
-void esmEnableError(uint64_t channels)
-{
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
- esmREG->EPENASET4 = (uint32_t)((channels >> 32) & 0xFFFFFFFF);
- esmREG->EPENASET1 = (uint32_t)(channels & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmDisableError(uint64_t channels)
-* @brief Disable Group 1 Channels Error Signals propagation
-*
-* @param[in] channels - Channel mask
-*
-* Disable Group 1 Channels Error Signals propagation to the error pin.
-*/
-void esmDisableError(uint64_t channels)
-{
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
- esmREG->EPENACLR4 = (uint32_t)((channels >> 32) & 0xFFFFFFFF);
- esmREG->EPENACLR1 = (uint32_t)(channels & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmTriggerErrorPinReset(void)
-* @brief Trigger error pin reset and switch back to normal operation
-*
-* Trigger error pin reset and switch back to normal operation.
-*/
-void esmTriggerErrorPinReset(void)
-{
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-
- esmREG->KEY = 5U;
-
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmActivateNormalOperation(void)
-* @brief Activate normal operation
-*
-* Activates normal operation mode.
-*/
-void esmActivateNormalOperation(void)
-{
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- esmREG->KEY = 0U;
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmEnableInterrupt(uint64_t channels)
-* @brief Enable Group 1 Channels Interrupts
-*
-* @param[in] channels - Channel mask
-*
-* Enable Group 1 Channels Interrupts.
-*/
-void esmEnableInterrupt(uint64_t channels)
-{
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- esmREG->INTENASET4 = (uint32_t)((channels >> 32) & 0xFFFFFFFF);
- esmREG->INTENASET1 = (uint32_t)(channels & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmDisableInterrupt(uint64_t channels)
-* @brief Disable Group 1 Channels Interrupts
-*
-* @param[in] channels - Channel mask
-*
-* Disable Group 1 Channels Interrupts.
-*/
-void esmDisableInterrupt(uint64_t channels)
-{
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- esmREG->INTENACLR4 = (uint32_t)((channels >> 32) & 0xFFFFFFFF);
- esmREG->INTENACLR1 = (uint32_t)(channels & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmSetInterruptLevel(uint64_t channels, uint64_t flags)
-* @brief Set Group 1 Channels Interrupt Levels
-*
-* @param[in] channels - Channel mask
-* @param[in] flags - Level mask: - 0: Low priority interrupt
-* - 1: High priority interrupt
-*
-* Set Group 1 Channels Interrupts levels.
-*/
-void esmSetInterruptLevel(uint64_t channels, uint64_t flags)
-{
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- esmREG->INTLVLCLR4 = (uint32_t)(((channels & ~flags) >> 32) & 0xFFFFFFF);
- esmREG->INTLVLSET4 = (uint32_t)(((channels & flags) >> 32) & 0xFFFFFFFF);
- esmREG->INTLVLCLR1 = (uint32_t)(channels & ~flags & 0xFFFFFFF);
- esmREG->INTLVLSET1 = (uint32_t)(channels & flags & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmClearStatus(uint32_t group, uint64_t channels)
-* @brief Clear Group error status
-*
-* @param[in] group - Error group
-* @param[in] channels - Channel mask
-*
-* Clear Group error status.
-*/
-void esmClearStatus(uint32_t group, uint64_t channels)
-{
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-
- esmREG->ESTATUS4[group] = (uint32_t)((channels >> 32) & 0xFFFFFFFF);
- esmREG->ESTATUS1[group] = (uint32_t)(channels & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (22) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmClearStatusBuffer(uint64_t channels)
-* @brief Clear Group 2 error status buffer
-*
-* @param[in] channels - Channel mask
-*
-* Clear Group 2 error status buffer.
-*/
-void esmClearStatusBuffer(uint64_t channels)
-{
-/* USER CODE BEGIN (23) */
-/* USER CODE END */
-
- esmREG->ESTATUS5EMU = (uint32_t)((channels >> 32) & 0xFFFFFFFF);
- esmREG->ESTATUS2EMU = (uint32_t)(channels & 0xFFFFFFFF);
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmSetCounterPreloadValue(uint32_t value)
-* @brief Set couter preload value
-*
-* @param[in] value - Counter preload value
-*
-* Set counter preload value.
-*/
-void esmSetCounterPreloadValue(uint32_t value)
-{
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-
- esmREG->LTCPRELOAD = value & 0xC000U;
-
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
-}
-
-
-/** @fn uint64_t esmGetStatus(uint32_t group, uint64_t channels)
-* @brief Return Error status
-*
-* @param[in] group - Error group
-* @param[in] channels - Error Channels
-*
-* @return The channels status of selected group
-*
-* Returns the channels status of selected group.
-*/
-uint64_t esmGetStatus(uint32_t group, uint64_t channels)
-{
- uint64_t status;
-
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-
- status = (((uint64_t)esmREG->ESTATUS4[group] << 32) | (uint64_t)esmREG->ESTATUS1[group]) & channels;
-
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
- return status;
-}
-
-
-/** @fn uint64_t esmGetStatusBuffer(uint64_t channels)
-* @brief Return Group 2 channel x Error status buffer
-*
-* @param[in] channels - Error Channels
-*
-* @return The channels status
-*
-* Returns the group 2 bufferd status of selected channels.
-*/
-uint64_t esmGetStatusBuffer(uint64_t channels)
-{
- uint64_t status;
-
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-
- status = (((uint64_t)esmREG->ESTATUS5EMU << 32) | (uint64_t)esmREG->ESTATUS2EMU) & channels;
-
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-
- return status;
-}
-
-/** @fn void esmHighInterrupt(void)
-* @brief High Level Interrupt for ESM
-*/
-#pragma INTERRUPT(esmHighInterrupt, FIQ)
-
-
-void esmHighInterrupt(void)
-{
- int vec = esmREG->INTOFFH - 1;
-
-/* USER CODE BEGIN (31) */
-/* USER CODE END */
-
- if (vec >= 96)
- {
- esmREG->ESTATUS4[1U] = 1U << (vec-96);
- esmGroup2Notification(vec-64);
- }
- else if (vec >= 64)
- {
- esmREG->ESTATUS4[0U] = 1U << (vec-64);
- esmGroup1Notification(vec-32);
- }
- else if (vec >= 32)
- {
- esmREG->ESTATUS1[1U] = 1U << (vec-32);
- esmGroup2Notification(vec-32);
- }
- else if (vec >= 0)
- {
- esmREG->ESTATUS1[0U] = 1 << vec;
- esmGroup1Notification(vec);
- }
- else
- {
- esmREG->ESTATUS4[0U] = 0xFFFFFFFFU;
- esmREG->ESTATUS4[1U] = 0xFFFFFFFFU;
- esmREG->ESTATUS1[0U] = 0xFFFFFFFFU;
- esmREG->ESTATUS1[1U] = 0xFFFFFFFFU;
- }
-
-/* USER CODE BEGIN (32) */
-/* USER CODE END */
-}
-
-
-/** @fn void esmLowInterrupt(void)
-* @brief Low Level Interrupt for ESM
-*/
-#pragma INTERRUPT(esmLowInterrupt, IRQ)
-
-void esmLowInterrupt(void)
-{
-
- /* Note : Group 1 Error */
- /* 1 to 32 -> channel 0 to 31 */
- /* 65 to 96 -> channel 32 to 63 */
-
- int vec = esmREG->INTOFFL - 1;
-
-/* USER CODE BEGIN (33) */
-/* USER CODE END */
-
-
- if (vec >= 64) /* channel 32 to 63 */
- {
- esmREG->ESTATUS4[0U] = 1U << (vec-64);
- esmGroup1Notification(vec-32);
- }
- else if (vec >= 0) /* channel 0 to 31 */
- {
- esmREG->ESTATUS1[0U] = 1U << vec;
- esmGroup1Notification(vec);
- }
- else
- {
- esmREG->ESTATUS4[0U] = 0xFFFFFFFFU;
- esmREG->ESTATUS1[0U] = 0xFFFFFFFFU;
- }
-
-/* USER CODE BEGIN (34) */
-/* USER CODE END */
-}
-
-/* USER CODE BEGIN (35) */
-/* USER CODE END */
+++ /dev/null
-/** @file gio.c
-* @brief GIO Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/ti_drv_gio.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void gioInit(void)
-* @brief Initializes the GIO Driver
-*
-* This function initializes the GIO module and set the GIO ports
-* to the inital values.
-*/
-void gioInit(void)
-{
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
- /** bring GIO module out of reset */
- gioREG->GCR0 = 1;
- gioREG->INTENACLR = 0xFF;
- gioREG->LVLCLR = 0xFF;
-
- /** @b initalise @b Port @b A */
-
- /** - Port A default output value
- * 1 - High, 0 - Low
- */
- gioPORTA->DOUT = 0x0
- //| _BV(7) /* DIN8 */
- //| _BV(6) /* DIN9 */
- //| _BV(5) /* DIN10 */
- //| _BV(4) /* DIN11 */
- //| _BV(3) /* DIN12 */
- //| _BV(2) /* DIN13 */
- //| _BV(1) /* DIN14 */
- //| _BV(0) /* DIN15 */
- | 0x0;
-
- /** - Port A direction
- * 1 - Output, 0 - Input
- */
- gioPORTA->DIR = 0x0
- //| _BV(7) /* DIN8 */
- //| _BV(6) /* DIN9 */
- //| _BV(5) /* DIN10 */
- //| _BV(4) /* DIN11 */
- //| _BV(3) /* DIN12 */
- //| _BV(2) /* DIN13 */
- //| _BV(1) /* DIN14 */
- //| _BV(0) /* DIN15 */
- | 0x0;
-
- /** - Port A open drain enable
- * 1 - Enabled, 0 - Disabled
- */
- gioPORTA->PDR = 0x0
- //| _BV(7) /* DIN8 */
- //| _BV(6) /* DIN9 */
- //| _BV(5) /* DIN10 */
- //| _BV(4) /* DIN11 */
- //| _BV(3) /* DIN12 */
- //| _BV(2) /* DIN13 */
- //| _BV(1) /* DIN14 */
- //| _BV(0) /* DIN15 */
- | 0x0;
-
- /** - Port A pull type selection
- * 1 - Pull-up, 0 - Pull-down
- */
- gioPORTA->PSL = 0x0
- //| _BV(7) /* DIN8 */
- //| _BV(6) /* DIN9 */
- //| _BV(5) /* DIN10 */
- //| _BV(4) /* DIN11 */
- //| _BV(3) /* DIN12 */
- //| _BV(2) /* DIN13 */
- //| _BV(1) /* DIN14 */
- //| _BV(0) /* DIN15 */
- | 0x0;
-
- /** - Port A pull resistor enable
- * 1 - Disabled, 0 - Enabled
- */
- gioPORTA->PULDIS = 0x0
- //| _BV(7) /* DIN8 */
- //| _BV(6) /* DIN9 */
- //| _BV(5) /* DIN10 */
- //| _BV(4) /* DIN11 */
- //| _BV(3) /* DIN12 */
- //| _BV(2) /* DIN13 */
- //| _BV(1) /* DIN14 */
- //| _BV(0) /* DIN15 */
- | 0x0;
-
- /** @b initalise @b Port @b B */
-
- /** - Port B default output value
- * 1 - High, 0 - Low
- */
- gioPORTB->DOUT = 0x0
- //| _BV(7) /* MOUT3IN */
- //| _BV(6) /* MOUT4IN */
- | _BV(5) /* MOUT3EN */
- | _BV(4) /* MOUT4EN */
- //| _BV(3) /* MOUT5IN */
- //| _BV(2) /* MOUT6IN */
- | _BV(1) /* MOUT5EN */
- | _BV(0) /* MOUT6EN */
- | 0x0;
-
- /** - Port B direction
- * 1 - Output, 0 - Input
- */
- gioPORTB->DIR = 0x0
- | _BV(7) /* MOUT3IN */
- | _BV(6) /* MOUT4IN */
- //| _BV(5) /* MOUT3EN */
- //| _BV(4) /* MOUT4EN */
- | _BV(3) /* MOUT5IN */
- | _BV(2) /* MOUT6IN */
- //| _BV(1) /* MOUT5EN */
- //| _BV(0) /* MOUT6EN */
- | 0x0;
-
- /** - Port B open drain enable
- * 1 - Enabled, 0 - Disabled
- */
- gioPORTB->PDR = 0x0
- //| _BV(7) /* MOUT3IN */
- //| _BV(6) /* MOUT4IN */
- | _BV(5) /* MOUT3EN */
- | _BV(4) /* MOUT4EN */
- //| _BV(3) /* MOUT5IN */
- //| _BV(2) /* MOUT6IN */
- | _BV(1) /* MOUT5EN */
- | _BV(0) /* MOUT6EN */
- | 0x0;
-
- /** - Port B pull type selection
- * 1 - Pull-up, 0 - Pull-down
- */
- gioPORTB->PSL = 0x0
- //| _BV(7) /* MOUT3IN */
- //| _BV(6) /* MOUT4IN */
- | _BV(5) /* MOUT3EN */
- | _BV(4) /* MOUT4EN */
- //| _BV(3) /* MOUT5IN */
- //| _BV(2) /* MOUT6IN */
- | _BV(1) /* MOUT5EN */
- | _BV(0) /* MOUT6EN */
- | 0x0;
-
- /** - Port B pull resistor enable
- * 1 - Disabled, 0 - Enabled
- */
- gioPORTB->PULDIS = 0x0
- //| _BV(7) /* MOUT3IN */
- //| _BV(6) /* MOUT4IN */
- | _BV(5) /* MOUT3EN */
- | _BV(4) /* MOUT4EN */
- //| _BV(3) /* MOUT5IN */
- //| _BV(2) /* MOUT6IN */
- | _BV(1) /* MOUT5EN */
- | _BV(0) /* MOUT6EN */
- | 0x0;
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
- /** @b initalise @b interrupts */
-
- /** - interrupt polarity */
- gioREG->POL = 0 /* Bit 0 */
- | (0 << 1) /* Bit 1 */
- | (0 << 2) /* Bit 2 */
- | (0 << 3) /* Bit 3 */
- | (0 << 4) /* Bit 4 */
- | (0 << 5) /* Bit 5 */
- | (0 << 6) /* Bit 6 */
- | (0 << 7) /* Bit 7 */
-
- | (0 << 8) /* Bit 8 */
- | (0 << 9) /* Bit 9 */
- | (0 << 10) /* Bit 10 */
- | (0 << 11) /* Bit 11 */
- | (0 << 12) /* Bit 12 */
- | (0 << 13) /* Bit 13 */
- | (0 << 14) /* Bit 14 */
- | (0 << 15);/* Bit 15 */
-
-
- /** - interrupt level */
- gioREG->LVLSET = 0 /* Bit 0 */
- | (0 << 1) /* Bit 1 */
- | (0 << 2) /* Bit 2 */
- | (0 << 3) /* Bit 3 */
- | (0 << 4) /* Bit 4 */
- | (0 << 5) /* Bit 5 */
- | (0 << 6) /* Bit 6 */
- | (0 << 7) /* Bit 7 */
-
- | (0 << 8) /* Bit 8 */
- | (0 << 9) /* Bit 9 */
- | (0 << 10) /* Bit 10 */
- | (0 << 11) /* Bit 11 */
- | (0 << 12) /* Bit 12 */
- | (0 << 13) /* Bit 13 */
- | (0 << 14) /* Bit 14 */
- | (0 << 15);/* Bit 15 */
-
-
-
-
- /** - clear all pending interrupts */
- gioREG->FLG = 0xFF;
-
- /** - enable interrupts */
- gioREG->INTENASET = 0 /* Bit 0 */
- | (0 << 1) /* Bit 1 */
- | (0 << 2) /* Bit 2 */
- | (0 << 3) /* Bit 3 */
- | (0 << 4) /* Bit 4 */
- | (0 << 5) /* Bit 5 */
- | (0 << 6) /* Bit 6 */
- | (0 << 7) /* Bit 7 */
-
- | (0 << 8) /* Bit 8 */
- | (0 << 9) /* Bit 9 */
- | (0 << 10) /* Bit 10 */
- | (0 << 11) /* Bit 11 */
- | (0 << 12) /* Bit 12 */
- | (0 << 13) /* Bit 13 */
- | (0 << 14) /* Bit 14 */
- | (0 << 15);/* Bit 15 */
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-}
-
-
-/** @fn void gioSetDirection(gioPORT_t *port, uint32_t dir)
-* @brief Set Port Direction
-* @param[in] port pointer to GIO port:
-* - gioPORTA: PortA pointer
-* - gioPORTB: PortB pointer
-* @param[in] dir value to write to DIR register
-*
-* Set the direction of GIO pins at runtime.
-*/
-void gioSetDirection(gioPORT_t *port, uint32_t dir)
-{
- port->DIR = dir;
-}
-
-
-/** @fn void gioSetBit(gioPORT_t *port, uint32_t bit, uint32_t value)
-* @brief Write Bit
-* @param[in] port pointer to GIO port:
-* - gioPORTA: PortA pointer
-* - gioPORTB: PortB pointer
-* @param[in] bit number 0-7 that specifies the bit to be written to.
-* - 0: LSB
-* - 7: MSB
-* @param[in] value binrary value to write to bit
-*
-* Writes a value to the specified pin of the given GIO port
-*/
-void gioSetBit(gioPORT_t *port, uint32_t bit, uint32_t value)
-{
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-
- if (value != 0)
- {
- port->DSET = 1 << bit;
- }
- else
- {
- port->DCLR = 1 << bit;
- }
-}
-
-
-/** @fn void gioSetPort(gioPORT_t *port, uint32_t value)
-* @brief Write Port Value
-* @param[in] port pointer to GIO port:
-* - gioPORTA: PortA pointer
-* - gioPORTB: PortB pointer
-* @param[in] value value to write to port
-*
-* Writes a value to all pin of a given GIO port
-*/
-void gioSetPort(gioPORT_t *port, uint32_t value)
-{
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- port->DOUT = value;
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
-}
-
-
-/** @fn uint32_t gioGetBit(gioPORT_t *port, uint32_t bit)
-* @brief Read Bit
-* @param[in] port pointer to GIO port:
-* - gioPORTA: PortA pointer
-* - gioPORTB: PortB pointer
-* @param[in] bit number 0-7 that specifies the bit to be written to.
-* - 0: LSB
-* - 7: MSB
-*
-* Reads a the current value from the specified pin of the given GIO port
-*/
-uint32_t gioGetBit(gioPORT_t *port, uint32_t bit)
-{
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- return (port->DIN >> bit) & 1U;
-}
-
-
-/** @fn uint32_t gioGetPort(gioPORT_t *port)
-* @brief Read Port Value
-* @param[in] port pointer to GIO port:
-* - gioPORTA: PortA pointer
-* - gioPORTB: PortB pointer
-*
-* Reads a the current value of a given GIO port
-*/
-uint32_t gioGetPort(gioPORT_t *port)
-{
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
- return port->DIN;
-}
-
-/** @fn void gioToggleBit(gioPORT_t *port, uint32_t bit)
-* @brief Write Bit
-* @param[in] port pointer to GIO port:
-* - gioPORTA: PortA pointer
-* - gioPORTB: PortB pointer
-* @param[in] bit number 0-7 that specifies the bit to be written to.
-* - 0: LSB
-* - 7: MSB
-*
-* Toggle a value to the specified pin of the given GIO port
-*/
-void gioToggleBit(gioPORT_t *port, uint32_t bit)
-{
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-
- if ((port->DIN & (1 << bit)) != 0)
- {
- port->DCLR = 1 << bit;
- }
- else
- {
- port->DSET = 1 << bit;
- }
-}
-
-/** @fn void gioEnableNotification(uint32_t bit)
-* @brief Enable Interrupt
-* @param[in] bit interrupt pin to enable
-* - 0: LSB
-* - 7: MSB
-*
-* Enables an innterrupt pin of PortA
-*/
-void gioEnableNotification(uint32_t bit)
-{
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-
- gioREG->INTENASET = 1 << bit;
-}
-
-
-/** @fn void gioDisableNotification(uint32_t bit)
-* @brief Disable Interrupt
-* @param[in] bit interrupt pin to enable
-* - 0: LSB
-* - 7: MSB
-*
-* Disables an innterrupt pin of PortA
-*/
-void gioDisableNotification(uint32_t bit)
-{
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
-
- gioREG->INTENACLR = 1 << bit;
-}
-
-
-/** @fn void gioHighLevelInterrupt(void)
-* @brief GIO Interrupt Handler
-*
-* High Level Interrupt handler for GIO pin interrupt
-*
-*/
-#pragma INTERRUPT(gioHighLevelInterrupt, IRQ)
-
-void gioHighLevelInterrupt(void)
-{
- int offset = gioREG->OFFSET0 - 1U;
-
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- if (offset >= 0)
- {
- gioNotification(offset);
- }
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-
-}
-
-
-/** @fn void gioLowLevelInterrupt(void)
-* @brief GIO Interrupt Handler
-*
-* Low Level Interrupt handler for GIO pin interrupt
-*
-*/
-#pragma INTERRUPT(gioLowLevelInterrupt, IRQ)
-
-void gioLowLevelInterrupt(void)
-{
- int offset = gioREG->OFFSET1 - 1U;
-
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- if (offset >= 0)
- {
- gioNotification(offset);
- }
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-
-}
-
-
-
+++ /dev/null
-/** @file het.c
-* @brief HET Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-#include "sys/ti_drv_het.h"
-
-
-/*----------------------------------------------------------------------------*/
-/* Global variables */
-
-static const uint32_t s_het1pwmPolarity[] =
-{
- 3U,
- 3U,
- 3U,
- 3U,
- 3U,
- 3U,
- 3U,
- 3U,
-};
-
-
-/*----------------------------------------------------------------------------*/
-/* Default Program */
-
-/** @var const hetINSTRUCTION_t het1PROGRAM[]
-* @brief Default Program
-*
-* Het program running after initialization.
-*/
-
-static const hetINSTRUCTION_t het1PROGRAM[58] =
-{
- /* CNT: Timebase
- * - Instruction = 0
- * - Next instruction = 1
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = na
- * - Reg = T
- */
- {
- /* Program */
- 0x00002C80U,
- /* Control */
- 0x01FFFFFFU,
- /* Data */
- 0xFFFFFF80U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 0 -> Duty Cycle
- * - Instruction = 1
- * - Next instruction = 2
- * - Conditional next instruction = 2
- * - Interrupt = 1
- * - Pin = 7
- */
- {
- /* Program */
- 0x000055C0U,
- /* Control */
- (0x00004006U | (7U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 0 -> Period
- * - Instruction = 2
- * - Next instruction = 3
- * - Conditional next instruction = 41
- * - Interrupt = 2
- * - Pin = na
- */
- {
- /* Program */
- 0x00007480U,
- /* Control */
- 0x00052006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 1 -> Duty Cycle
- * - Instruction = 3
- * - Next instruction = 4
- * - Conditional next instruction = 4
- * - Interrupt = 3
- * - Pin = 16
- */
- {
- /* Program */
- 0x000095C0U,
- /* Control */
- (0x00008006U | (16U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 1 -> Period
- * - Instruction = 4
- * - Next instruction = 5
- * - Conditional next instruction = 43
- * - Interrupt = 4
- * - Pin = na
- */
- {
- /* Program */
- 0x0000B480U,
- /* Control */
- 0x00056006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 2 -> Duty Cycle
- * - Instruction = 5
- * - Next instruction = 6
- * - Conditional next instruction = 6
- * - Interrupt = 5
- * - Pin = 18
- */
- {
- /* Program */
- 0x0000D5C0U,
- /* Control */
- (0x0000C006U | (18U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 2 -> Period
- * - Instruction = 6
- * - Next instruction = 7
- * - Conditional next instruction = 45
- * - Interrupt = 6
- * - Pin = na
- */
- {
- /* Program */
- 0x0000F480U,
- /* Control */
- 0x0005A006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 3 -> Duty Cycle
- * - Instruction = 7
- * - Next instruction = 8
- * - Conditional next instruction = 8
- * - Interrupt = 7
- * - Pin = 20
- */
- {
- /* Program */
- 0x000115C0U,
- /* Control */
- (0x00010006U | (20U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 3 -> Period
- * - Instruction = 8
- * - Next instruction = 9
- * - Conditional next instruction = 47
- * - Interrupt = 8
- * - Pin = na
- */
- {
- /* Program */
- 0x00013480U,
- /* Control */
- 0x0005E006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 4 -> Duty Cycle
- * - Instruction = 9
- * - Next instruction = 10
- * - Conditional next instruction = 10
- * - Interrupt = 9
- * - Pin = 22
- */
- {
- /* Program */
- 0x000155C0U,
- /* Control */
- (0x00014006U | (22U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 4 -> Period
- * - Instruction = 10
- * - Next instruction = 11
- * - Conditional next instruction = 49
- * - Interrupt = 10
- * - Pin = na
- */
- {
- /* Program */
- 0x00017480U,
- /* Control */
- 0x00062006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 5 -> Duty Cycle
- * - Instruction = 11
- * - Next instruction = 12
- * - Conditional next instruction = 12
- * - Interrupt = 11
- * - Pin = 25
- */
- {
- /* Program */
- 0x000195C0U,
- /* Control */
- (0x00018006U | (25U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 5 -> Period
- * - Instruction = 12
- * - Next instruction = 13
- * - Conditional next instruction = 51
- * - Interrupt = 12
- * - Pin = na
- */
- {
- /* Program */
- 0x0001B480U,
- /* Control */
- 0x00066006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 6 -> Duty Cycle
- * - Instruction = 13
- * - Next instruction = 14
- * - Conditional next instruction = 14
- * - Interrupt = 13
- * - Pin = 29
- */
- {
- /* Program */
- 0x0001D5C0U,
- /* Control */
- (0x0001C006U | (29U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 6 -> Period
- * - Instruction = 14
- * - Next instruction = 15
- * - Conditional next instruction = 53
- * - Interrupt = 14
- * - Pin = na
- */
- {
- /* Program */
- 0x0001F480U,
- /* Control */
- 0x0006A006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PWCNT: PWM 7 -> Duty Cycle
- * - Instruction = 15
- * - Next instruction = 16
- * - Conditional next instruction = 16
- * - Interrupt = 15
- * - Pin = 19
- */
- {
- /* Program */
- 0x000215C0U,
- /* Control */
- (0x00020006U | (19U << 8U) | (3U << 3U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* DJZ: PWM 7 -> Period
- * - Instruction = 16
- * - Next instruction = 17
- * - Conditional next instruction = 55
- * - Interrupt = 16
- * - Pin = na
- */
- {
- /* Program */
- 0x00023480U,
- /* Control */
- 0x0006E006U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 0
- * - Instruction = 17
- * - Next instruction = 18
- * - Conditional next instruction = 18
- * - Interrupt = 17
- * - Pin = 9
- */
- {
- /* Program */
- 0x00025440U,
- /* Control */
- (0x00024007U | (9U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 1
- * - Instruction = 18
- * - Next instruction = 19
- * - Conditional next instruction = 19
- * - Interrupt = 18
- * - Pin = 11
- */
- {
- /* Program */
- 0x00027440U,
- /* Control */
- (0x00026007U | (11U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 2
- * - Instruction = 19
- * - Next instruction = 20
- * - Conditional next instruction = 20
- * - Interrupt = 19
- * - Pin = 13
- */
- {
- /* Program */
- 0x00029440U,
- /* Control */
- (0x00028007U | (13U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 3
- * - Instruction = 20
- * - Next instruction = 21
- * - Conditional next instruction = 21
- * - Interrupt = 20
- * - Pin = 15
- */
- {
- /* Program */
- 0x0002B440U,
- /* Control */
- (0x0002A007U | (15U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 4
- * - Instruction = 21
- * - Next instruction = 22
- * - Conditional next instruction = 22
- * - Interrupt = 21
- * - Pin = 20
- */
- {
- /* Program */
- 0x0002D440U,
- /* Control */
- (0x0002C007U | (20U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 5
- * - Instruction = 22
- * - Next instruction = 23
- * - Conditional next instruction = 23
- * - Interrupt = 22
- * - Pin = 21
- */
- {
- /* Program */
- 0x0002F440U,
- /* Control */
- (0x0002E007U | (21U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 6
- * - Instruction = 23
- * - Next instruction = 24
- * - Conditional next instruction = 24
- * - Interrupt = 23
- * - Pin = 22
- */
- {
- /* Program */
- 0x00031440U,
- /* Control */
- (0x00030007U | (22U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* ECNT: CCU Edge 7
- * - Instruction = 24
- * - Next instruction = 25
- * - Conditional next instruction = 25
- * - Interrupt = 24
- * - Pin = 23
- */
- {
- /* Program */
- 0x00033440U,
- /* Control */
- (0x00032007U | (23U << 8U) | (1U << 4U)),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 0
- * - Instruction = 25
- * - Next instruction = 26
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 0
- */
- {
- /* Program */
- 0x00034E00U | (0U << 6U) | (0U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 0
- * - Instruction = 26
- * - Next instruction = 27
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 0 + 1
- */
- {
- /* Program */
- 0x00036E80U | (0U << 6U) | ((0U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 1
- * - Instruction = 27
- * - Next instruction = 28
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 2
- */
- {
- /* Program */
- 0x00038E00U | (0U << 6U) | (2U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 1
- * - Instruction = 28
- * - Next instruction = 29
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 2 + 1
- */
- {
- /* Program */
- 0x0003AE80U | (0U << 6U) | ((2U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 2
- * - Instruction = 29
- * - Next instruction = 30
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 4
- */
- {
- /* Program */
- 0x0003CE00U | (0U << 6U) | (4U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 2
- * - Instruction = 30
- * - Next instruction = 31
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 4 + 1
- */
- {
- /* Program */
- 0x0003EE80U | (0U << 6U) | ((4U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 3
- * - Instruction = 31
- * - Next instruction = 32
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 6
- */
- {
- /* Program */
- 0x00040E00U | (0U << 6U) | (6U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 3
- * - Instruction = 32
- * - Next instruction = 33
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 6 + 1
- */
- {
- /* Program */
- 0x00042E80U | (0U << 6U) | ((6U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 4
- * - Instruction = 33
- * - Next instruction = 34
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 24
- */
- {
- /* Program */
- 0x00044E00U | (0U << 6U) | (24U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 4
- * - Instruction = 34
- * - Next instruction = 35
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 24 + 1
- */
- {
- /* Program */
- 0x00046E80U | (0U << 6U) | ((24U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 5
- * - Instruction = 35
- * - Next instruction = 36
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 26
- */
- {
- /* Program */
- 0x00048E00U | (0U << 6U) | (26U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 5
- * - Instruction = 36
- * - Next instruction = 37
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 26 + 1
- */
- {
- /* Program */
- 0x0004AE80U | (0U << 6U) | ((26U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 6
- * - Instruction = 37
- * - Next instruction = 38
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 28
- */
- {
- /* Program */
- 0x0004CE00U | (0U << 6U) | (28U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 6
- * - Instruction = 38
- * - Next instruction = 39
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 28 + 1
- */
- {
- /* Program */
- 0x0004EE80U | (0U << 6U) | ((28U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Duty 7
- * - Instruction = 39
- * - Next instruction = 40
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 30
- */
- {
- /* Program */
- 0x00050E00U | (0U << 6U) | (30U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* PCNT: Capture Period 7
- * - Instruction = 40
- * - Next instruction = 57
- * - Conditional next instruction = na
- * - Interrupt = na
- * - Pin = 30 + 1
- */
- {
- /* Program */
- 0x00072E80U | (0U << 6U) | ((30U) + 1U),
- /* Control */
- 0x00000000U,
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 0 -> Duty Cycle Update
- * - Instruction = 41
- * - Next instruction = 42
- * - Conditional next instruction = 2
- * - Interrupt = 1
- * - Pin = 7
- */
- {
- /* Program */
- 0x00054201U,
- /* Control */
- (0x00004007U | (0U << 22U) | (7U << 8U) | (3U << 3U)),
- /* Data */
- 48128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 0 -> Period Update
- * - Instruction = 42
- * - Next instruction = 3
- * - Conditional next instruction = 41
- * - Interrupt = 2
- * - Pin = na
- */
- {
- /* Program */
- 0x00006202U,
- /* Control */
- (0x00052007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 1 -> Duty Cycle Update
- * - Instruction = 43
- * - Next instruction = 44
- * - Conditional next instruction = 4
- * - Interrupt = 3
- * - Pin = 16
- */
- {
- /* Program */
- 0x00058203U,
- /* Control */
- (0x00008007U | (0U << 22U) | (16U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 1 -> Period Update
- * - Instruction = 44
- * - Next instruction = 5
- * - Conditional next instruction = 43
- * - Interrupt = 4
- * - Pin = na
- */
- {
- /* Program */
- 0x0000A204U,
- /* Control */
- (0x00056007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 2 -> Duty Cycle Update
- * - Instruction = 45
- * - Next instruction = 46
- * - Conditional next instruction = 6
- * - Interrupt = 5
- * - Pin = 18
- */
- {
- /* Program */
- 0x0005C205U,
- /* Control */
- (0x0000C007U | (0U << 22U) | (18U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 2 -> Period Update
- * - Instruction = 46
- * - Next instruction = 7
- * - Conditional next instruction = 45
- * - Interrupt = 6
- * - Pin = na
- */
- {
- /* Program */
- 0x0000E206U,
- /* Control */
- (0x0005A007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 3 -> Duty Cycle Update
- * - Instruction = 47
- * - Next instruction = 48
- * - Conditional next instruction = 8
- * - Interrupt = 7
- * - Pin = 20
- */
- {
- /* Program */
- 0x00060207U,
- /* Control */
- (0x00010007U | (0U << 22U) | (20U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 3 -> Period Update
- * - Instruction = 48
- * - Next instruction = 9
- * - Conditional next instruction = 47
- * - Interrupt = 8
- * - Pin = na
- */
- {
- /* Program */
- 0x00012208U,
- /* Control */
- (0x0005E007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 4 -> Duty Cycle Update
- * - Instruction = 49
- * - Next instruction = 50
- * - Conditional next instruction = 10
- * - Interrupt = 9
- * - Pin = 22
- */
- {
- /* Program */
- 0x00064209U,
- /* Control */
- (0x00014007U | (0U << 22U) | (22U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 4 -> Period Update
- * - Instruction = 50
- * - Next instruction = 11
- * - Conditional next instruction = 49
- * - Interrupt = 10
- * - Pin = na
- */
- {
- /* Program */
- 0x0001620AU,
- /* Control */
- (0x00062007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 5 -> Duty Cycle Update
- * - Instruction = 51
- * - Next instruction = 52
- * - Conditional next instruction = 12
- * - Interrupt = 11
- * - Pin = 25
- */
- {
- /* Program */
- 0x0006820BU,
- /* Control */
- (0x00018007U | (0U << 22U) | (25U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 5 -> Period Update
- * - Instruction = 52
- * - Next instruction = 13
- * - Conditional next instruction = 51
- * - Interrupt = 12
- * - Pin = na
- */
- {
- /* Program */
- 0x0001A20CU,
- /* Control */
- (0x00066007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 6 -> Duty Cycle Update
- * - Instruction = 53
- * - Next instruction = 54
- * - Conditional next instruction = 14
- * - Interrupt = 13
- * - Pin = 29
- */
- {
- /* Program */
- 0x0006C20DU,
- /* Control */
- (0x0001C007U | (0U << 22U) | (29U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 6 -> Period Update
- * - Instruction = 54
- * - Next instruction = 15
- * - Conditional next instruction = 53
- * - Interrupt = 14
- * - Pin = na
- */
- {
- /* Program */
- 0x0001E20EU,
- /* Control */
- (0x0006A007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 7 -> Duty Cycle Update
- * - Instruction = 55
- * - Next instruction = 56
- * - Conditional next instruction = 16
- * - Interrupt = 15
- * - Pin = 19
- */
- {
- /* Program */
- 0x0007020FU,
- /* Control */
- (0x00020007U | (0U << 22U) | (19U << 8U) | (3U << 3U)),
- /* Data */
- 80128U,
- /* Reserved */
- 0x00000000U
- },
- /* MOV64: PWM 7 -> Period Update
- * - Instruction = 56
- * - Next instruction = 17
- * - Conditional next instruction = 55
- * - Interrupt = 16
- * - Pin = na
- */
- {
- /* Program */
- 0x00022210U,
- /* Control */
- (0x0006E007U),
- /* Data */
- 159872U,
- /* Reserved */
- 0x00000000U
- },
- /* WCAP: Capture timestamp
- * - Instruction = 57
- * - Next instruction = 0
- * - Conditional next instruction = 0
- * - Interrupt = na
- * - Pin = na
- * - Reg = T
- */
- {
- /* Program */
- 0x00001600U,
- /* Control */
- (0x00000004U),
- /* Data */
- 0x00000000U,
- /* Reserved */
- 0x00000000U
- },
-};
-
-
-
-/**
- * Initializes the het Driver
- *
- * This function initializes the het 1 module.
- */
-void hetInit(void)
-{
- /** @b intalise @b HET */
-
- /** - HET pins default output value
- * 1 - High, 0 - Low
- */
- hetREG1->DOUT = 0x0
- //| _BV(31)
- //| _BV(30)
- //| _BV(29)
- //| _BV(28)
- //| _BV(27)
- //| _BV(26)
- //| _BV(25)
- //| _BV(24)
- //| _BV(23)
- //| _BV(22)
- //| _BV(21)
- //| _BV(20)
- //| _BV(19)
- //| _BV(18)
- //| _BV(17)
- //| _BV(16)
- //| _BV(15)
- //| _BV(14) /* MOUT2IN */
- //| _BV(13)
- //| _BV(12)
- //| _BV(11)
- //| _BV(10)
- //| _BV( 9) /* MOUT1IN */
- //| _BV( 8)
- //| _BV( 7)
- //| _BV( 6)
- //| _BV( 5)
- //| _BV( 4)
- //| _BV( 3)
- //| _BV( 2)
- //| _BV( 1)
- //| _BV( 0)
- | 0x0;
-
- /** - HET pins direction
- * 1 - Output, 0 - Input
- */
- hetREG1->DIR = 0x0
- //| _BV(31)
- | _BV(30)
- //| _BV(29)
- | _BV(28)
- //| _BV(27)
- | _BV(26)
- //| _BV(25)
- | _BV(24)
- //| _BV(23)
- | _BV(22)
- //| _BV(21)
- //| _BV(20)
- //| _BV(19)
- //| _BV(18)
- | _BV(17)
- //| _BV(16)
- //| _BV(15)
- | _BV(14) /* MOUT2IN */
- //| _BV(13)
- //| _BV(12)
- //| _BV(11)
- //| _BV(10)
- | _BV( 9) /* MOUT1IN */
- //| _BV( 8)
- | _BV( 7)
- //| _BV( 6)
- //| _BV( 5)
- | _BV( 4)
- //| _BV( 3)
- //| _BV( 2)
- | _BV( 1)
- //| _BV( 0)
- | 0x0;
-
- /** - HET pins open drain enable
- * 1 - Enabled, 0 - Disabled
- */
- hetREG1->PDR = 0x0
- //| _BV(31)
- //| _BV(30)
- //| _BV(29)
- //| _BV(28)
- //| _BV(27)
- //| _BV(26)
- //| _BV(25)
- //| _BV(24)
- //| _BV(23)
- //| _BV(22)
- //| _BV(21)
- //| _BV(20)
- //| _BV(19)
- //| _BV(18)
- //| _BV(17)
- //| _BV(16)
- //| _BV(15)
- //| _BV(14) /* MOUT2IN */
- //| _BV(13)
- //| _BV(12)
- //| _BV(11)
- //| _BV(10)
- //| _BV( 9) /* MOUT1IN */
- //| _BV( 8)
- //| _BV( 7)
- //| _BV( 6)
- //| _BV( 5)
- //| _BV( 4)
- //| _BV( 3)
- //| _BV( 2)
- //| _BV( 1)
- //| _BV( 0)
- | 0x0;
-
- /** - HET pins pull resistor enable
- * 1 - Disabled, 0 - Enabled
- */
- hetREG1->PULDIS = 0x0
- //| _BV(31)
- //| _BV(30)
- //| _BV(29)
- //| _BV(28)
- //| _BV(27)
- //| _BV(26)
- //| _BV(25)
- //| _BV(24)
- //| _BV(23)
- //| _BV(22)
- //| _BV(21)
- //| _BV(20)
- //| _BV(19)
- //| _BV(18)
- //| _BV(17)
- //| _BV(16)
- //| _BV(15)
- //| _BV(14) /* MOUT2IN */
- //| _BV(13)
- //| _BV(12)
- //| _BV(11)
- //| _BV(10)
- //| _BV( 9) /* MOUT1IN */
- //| _BV( 8)
- | _BV( 7)
- //| _BV( 6)
- //| _BV( 5)
- | _BV( 4)
- //| _BV( 3)
- //| _BV( 2)
- //| _BV( 1)
- //| _BV( 0)
- | 0x0;
-
- /** - HET pins pull type selection
- * 1 - Pull-up, 0 - Pull-down
- */
- hetREG1->PSL = 0x0
- | _BV(31)
- | _BV(30)
- | _BV(29)
- | _BV(28)
- | _BV(27)
- | _BV(26)
- | _BV(25)
- | _BV(24)
- | _BV(23)
- | _BV(22)
- | _BV(21)
- | _BV(20)
- | _BV(19)
- | _BV(18)
- | _BV(17)
- | _BV(16)
- | _BV(15)
- //| _BV(14) /* MOUT2IN */
- | _BV(13)
- | _BV(12)
- | _BV(11)
- | _BV(10)
- //| _BV( 9) /* MOUT1IN */
- | _BV( 8)
- //| _BV( 7)
- | _BV( 6)
- | _BV( 5)
- //| _BV( 4)
- | _BV( 3)
- | _BV( 2)
- | _BV( 1)
- | _BV( 0)
- | 0x0;
-
- /** - Set HET pins high resolution share */
- hetREG1->HRSH = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Set HET pins AND share */
- hetREG1->AND = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Set HET pins XOR share */
- hetREG1->XOR = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Setup prescaler values
- * - Loop resolution prescaler
- * - High resolution prescaler
- */
- hetREG1->PFR = (6U << 8U)
- | (0U);
-
- /** - Fill HET RAM with opcodes and Data */
- memcpy((void *)hetRAM1, (const void *)het1PROGRAM, sizeof(het1PROGRAM));
-
- /** - Setup interrupt priority level
- * - PWM 0 end of duty level
- * - PWM 0 end of period level
- * - PWM 1 end of duty level
- * - PWM 1 end of period level
- * - PWM 2 end of duty level
- * - PWM 2 end of period level
- * - PWM 3 end of duty level
- * - PWM 3 end of period level
- * - PWM 4 end of duty level
- * - PWM 4 end of period level
- * - PWM 5 end of duty level
- * - PWM 5 end of period level
- * - PWM 6 end of duty level
- * - PWM 6 end of period level
- * - PWM 7 end of duty level
- * - PWM 7 end of period level
-
- * - CCU Edge Detection 0 level
- * - CCU Edge Detection 1 level
- * - CCU Edge Detection 2 level
- * - CCU Edge Detection 3 level
- * - CCU Edge Detection 4 level
- * - CCU Edge Detection 5 level
- * - CCU Edge Detection 6 level
- * - CCU Edge Detection 7 level
- */
- hetREG1->PRY = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Enable interrupts
- * - PWM 0 end of duty
- * - PWM 0 end of period
- * - PWM 1 end of duty
- * - PWM 1 end of period
- * - PWM 2 end of duty
- * - PWM 2 end of period
- * - PWM 3 end of duty
- * - PWM 3 end of period
- * - PWM 4 end of duty
- * - PWM 4 end of period
- * - PWM 5 end of duty
- * - PWM 5 end of period
- * - PWM 6 end of duty
- * - PWM 6 end of period
- * - PWM 7 end of duty
- * - PWM 7 end of period
- * - CCU Edge Detection 0
- * - CCU Edge Detection 1
- * - CCU Edge Detection 2
- * - CCU Edge Detection 3
- * - CCU Edge Detection 4
- * - CCU Edge Detection 5
- * - CCU Edge Detection 6
- * - CCU Edge Detection 7
- */
- hetREG1->INTENAC = 0xFFFFFFFFU;
- hetREG1->INTENAS = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
-
- /** - Parity control register
- * - Enable/Disable Parity check
- */
- hetREG1->PCREG = 0x00000005U;
-
- /** - Setup control register
- * - Enable output buffers
- * - Ignore software breakpoints
- * - Master mode
- * - Enable HET
- */
- hetREG1->GCR = 0x01030001U;
- /** @note This function has to be called before the driver can be used.\n
- * This function has to be executed in priviledged mode.\n
- */
-}
-
-/**
- * Start the given pwm signal.
- *
- * @param[in] hetRAM Pointer to HET RAM:
- * - hetRAM1: HET1 RAM pointer
- * - hetRAM2: HET2 RAM pointer
- *
- * @param[in] pwm Pwm signal:
- * - pwm0: Pwm 0
- * - pwm1: Pwm 1
- * - pwm2: Pwm 2
- * - pwm3: Pwm 3
- * - pwm4: Pwm 4
- * - pwm5: Pwm 5
- * - pwm6: Pwm 6
- * - pwm7: Pwm 7
- */
-void pwmStart( hetRAMBASE_t * hetRAM, uint32_t pwm)
-{
- hetRAM->Instruction[(pwm << 1U) + 41U].Control |= 0x00400000U;
-}
-
-
-/**
- * Stop the given pwm signal.
- *
- * @param[in] hetRAM Pointer to HET RAM:
- * - hetRAM1: HET1 RAM pointer
- * - hetRAM2: HET2 RAM pointer
- *
- * @param[in] pwm Pwm signal:
- * - pwm0: Pwm 0
- * - pwm1: Pwm 1
- * - pwm2: Pwm 2
- * - pwm3: Pwm 3
- * - pwm4: Pwm 4
- * - pwm5: Pwm 5
- * - pwm6: Pwm 6
- * - pwm7: Pwm 7
- */
-void pwmStop( hetRAMBASE_t * hetRAM, uint32_t pwm)
-{
- hetRAM->Instruction[(pwm << 1U) + 41U].Control &= ~0x00400000U;
-}
-
-
-/**
- * Sets a new duty cycle on the given pwm signal.
- *
- * @param[in] hetRAM Pointer to HET RAM:
- * - hetRAM1: HET1 RAM pointer
- * - hetRAM2: HET2 RAM pointer
- *
- * @param[in] pwm Pwm signal:
- * - pwm0: Pwm 0
- * - pwm1: Pwm 1
- * - pwm2: Pwm 2
- * - pwm3: Pwm 3
- * - pwm4: Pwm 4
- * - pwm5: Pwm 5
- * - pwm6: Pwm 6
- * - pwm7: Pwm 7
- *
- * @param[in] duty duty cycle in %.
- */
-void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32_t pwm, uint32_t duty)
-{
- uint32_t action;
- uint32_t pwmPolarity;
- double period = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128U;
-
- if(hetRAM == hetRAM1) {
-
- pwmPolarity = s_het1pwmPolarity[pwm];
-
- } else {
- // FIXME What? See pwmSetSignal()
- }
-
- if(duty == 0U) {
-
- action = (pwmPolarity == 3U) ? 0U : 2U;
-
- } else if (duty >= 100U) {
-
- action = (pwmPolarity == 3U) ? 2U : 0U;
-
- } else {
-
- action = pwmPolarity;
- }
-
- hetRAM->Instruction[(pwm << 1U) + 41U].Control = (hetRAM->Instruction[(pwm << 1U) + 41U].Control & ~0x18U) | (action << 3U);
- hetRAM->Instruction[(pwm << 1U) + 41U].Data = (uint32_t)(period * duty / 100.0) + 128U;
-}
-
-
-/**
- * Sets a new pwm signal.
- *
- * @param[in] hetRAM Pointer to HET RAM:
- * - hetRAM1: HET1 RAM pointer
- * - hetRAM2: HET2 RAM pointer
- *
- * @param[in] pwm Pwm signal:
- * - pwm0: Pwm 0
- * - pwm1: Pwm 1
- * - pwm2: Pwm 2
- * - pwm3: Pwm 3
- * - pwm4: Pwm 4
- * - pwm5: Pwm 5
- * - pwm6: Pwm 6
- * - pwm7: Pwm 7
- *
- * @param[in] signal signal
- * - duty cycle in %.
- * - period period in us.
- */
-void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm, hetSIGNAL_t signal)
-{
- uint32_t action;
- uint32_t pwmPeriod;
- uint32_t pwmPolarity;
-
- if(hetRAM == hetRAM1) {
-
- pwmPeriod = (uint32_t)(signal.period * 1000.0 / 800.000) << 7U;
- pwmPolarity = s_het1pwmPolarity[pwm];
-
- } else {
- // FIXME HalCoGen didn't included settings for HET2. If user try to
- // use hetRAM != hetRAM1 then 'pwmPolarity' is dirty memory, and
- // can propagate to 'action', with unknown result to HET
- // registers. Code here was empty. I added this two lines
- // from a newly generated HalCoGen project, but lacks definition
- // of s_het2pwmPolarity. - Carlos
- //pwmPeriod = (uint32_t)((signal.period * 1000.0) / 1422.222) << 7U;
- //pwmPolarity = s_het2pwmPolarity[pwm];
- }
-
- if (signal.duty == 0U) {
-
- action = (pwmPolarity == 3U) ? 0U : 2U;
-
- } else if (signal.duty >= 100U) {
-
- action = (pwmPolarity == 3U) ? 2U : 0U;
-
- } else {
-
- action = pwmPolarity;
- }
-
- hetRAM->Instruction[(pwm << 1U) + 41U].Control = (hetRAM->Instruction[(pwm << 1U) + 41U].Control & ~0x18U) | (action << 3U);
- hetRAM->Instruction[(pwm << 1U) + 41U].Data = (uint32_t)(pwmPeriod * signal.duty / 100.0) + 128U;
- hetRAM->Instruction[(pwm << 1U) + 42U].Data = pwmPeriod - 128U;
-}
-
-
-/** @fn hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm)
-* @brief Get duty cycle
-* @param[in] hetRAM Pointer to HET RAM:
-* - hetRAM1: HET1 RAM pointer
-* - hetRAM2: HET2 RAM pointer
-* @param[in] pwm Pwm signal:
-* - pwm0: Pwm 0
-* - pwm1: Pwm 1
-* - pwm2: Pwm 2
-* - pwm3: Pwm 3
-* - pwm4: Pwm 4
-* - pwm5: Pwm 5
-* - pwm6: Pwm 6
-* - pwm7: Pwm 7
-*
-* Gets current signal of the given pwm signal.
-*/
-hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM, uint32_t pwm)
-{
- hetSIGNAL_t signal;
- uint32_t duty = hetRAM->Instruction[(pwm << 1U) + 41U].Data - 128;
- uint32_t period = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128;
-
- signal.duty = (uint32_t)(100.0 * duty / period);
-
- if(hetRAM == hetRAM1)
- {
- signal.period = (period >> 7U) * 800.000 / 1000.0;
- }
- else
- {
- signal.period = (period >> 7U) * 800.000 / 1000.0;
- }
- return signal;
-}
-
-
-/** @fn void pwmEnableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)
-* @brief Enable pwm notification
-* @param[in] hetREG Pointer to HET Module:
-* - hetREG1: HET1 Module pointer
-* - hetREG2: HET2 Module pointer
-* @param[in] pwm Pwm signal:
-* - pwm0: Pwm 0
-* - pwm1: Pwm 1
-* - pwm2: Pwm 2
-* - pwm3: Pwm 3
-* - pwm4: Pwm 4
-* - pwm5: Pwm 5
-* - pwm6: Pwm 6
-* - pwm7: Pwm 7
-* @param[in] notification Pwm notification:
-* - pwmEND_OF_DUTY: Notification on end of duty
-* - pwmEND_OF_PERIOD: Notification on end of end period
-* - pwmEND_OF_BOTH: Notification on end of both duty and period
-*/
-void pwmEnableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)
-{
- hetREG->FLG = notification << (pwm << 1U);
- hetREG->INTENAS = notification << (pwm << 1U);
-}
-
-
-/** @fn void pwmDisableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)
-* @brief Enable pwm notification
-* @param[in] hetREG Pointer to HET Module:
-* - hetREG1: HET1 Module pointer
-* - hetREG2: HET2 Module pointer
-* @param[in] pwm Pwm signal:
-* - pwm0: Pwm 0
-* - pwm1: Pwm 1
-* - pwm2: Pwm 2
-* - pwm3: Pwm 3
-* - pwm4: Pwm 4
-* - pwm5: Pwm 5
-* - pwm6: Pwm 6
-* - pwm7: Pwm 7
-* @param[in] notification Pwm notification:
-* - pwmEND_OF_DUTY: Notification on end of duty
-* - pwmEND_OF_PERIOD: Notification on end of end period
-* - pwmEND_OF_BOTH: Notification on end of both duty and period
-*/
-void pwmDisableNotification(hetBASE_t * hetREG, uint32_t pwm, uint32_t notification)
-{
- hetREG->INTENAC = notification << (pwm << 1U);
-}
-
-
-/** @fn void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)
-* @brief Resets edge counter to 0
-* @param[in] hetRAM Pointer to HET RAM:
-* - hetRAM1: HET1 RAM pointer
-* - hetRAM2: HET2 RAM pointer
-* @param[in] edge Edge signal:
-* - edge0: Edge 0
-* - edge1: Edge 1
-* - edge2: Edge 2
-* - edge3: Edge 3
-* - edge4: Edge 4
-* - edge5: Edge 5
-* - edge6: Edge 6
-* - edge7: Edge 7
-*
-* Reset edge counter to 0.
-*/
-void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)
-{
- hetRAM->Instruction[edge + 17U].Data = 0U;
-}
-
-
-/** @fn uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)
-* @brief Get current edge counter value
-* @param[in] hetRAM Pointer to HET RAM:
-* - hetRAM1: HET1 RAM pointer
-* - hetRAM2: HET2 RAM pointer
-* @param[in] edge Edge signal:
-* - edge0: Edge 0
-* - edge1: Edge 1
-* - edge2: Edge 2
-* - edge3: Edge 3
-* - edge4: Edge 4
-* - edge5: Edge 5
-* - edge6: Edge 6
-* - edge7: Edge 7
-*
-* Gets current edge counter value.
-*/
-uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM, uint32_t edge)
-{
- return hetRAM->Instruction[edge + 17U].Data >> 7U;
-}
-
-
-/** @fn void edgeEnableNotification(hetBASE_t * hetREG, uint32_t edge)
-* @brief Enable edge notification
-* @param[in] hetREG Pointer to HET Module:
-* - hetREG1: HET1 Module pointer
-* - hetREG2: HET2 Module pointer
-* @param[in] edge Edge signal:
-* - edge0: Edge 0
-* - edge1: Edge 1
-* - edge2: Edge 2
-* - edge3: Edge 3
-* - edge4: Edge 4
-* - edge5: Edge 5
-* - edge6: Edge 6
-* - edge7: Edge 7
-*/
-void edgeEnableNotification(hetBASE_t * hetREG, uint32_t edge)
-{
- hetREG->FLG = 0x20000U << edge;
- hetREG->INTENAS = 0x20000U << edge;
-}
-
-
-/** @fn void edgeDisableNotification(hetBASE_t * hetREG, uint32_t edge)
-* @brief Enable edge notification
-* @param[in] hetREG Pointer to HET Module:
-* - hetREG1: HET1 Module pointer
-* - hetREG2: HET2 Module pointer
-* @param[in] edge Edge signal:
-* - edge0: Edge 0
-* - edge1: Edge 1
-* - edge2: Edge 2
-* - edge3: Edge 3
-* - edge4: Edge 4
-* - edge5: Edge 5
-* - edge6: Edge 6
-* - edge7: Edge 7
-*/
-void edgeDisableNotification(hetBASE_t * hetREG, uint32_t edge)
-{
- hetREG->INTENAC = 0x20000U << edge;
-}
-
-
-/** @fn hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM, uint32_t cap)
-* @brief Get capture signal
-* @param[in] hetRAM Pointer to HET RAM:
-* - hetRAM1: HET1 RAM pointer
-* - hetRAM2: HET2 RAM pointer
-* @param[in] cap captured signal:
-* - cap0: Captured signal 0
-* - cap1: Captured signal 1
-* - cap2: Captured signal 2
-* - cap3: Captured signal 3
-* - cap4: Captured signal 4
-* - cap5: Captured signal 5
-* - cap6: Captured signal 6
-* - cap7: Captured signal 7
-*
-* Gets current signal of the given capture signal.
-*/
-hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM, uint32_t cap)
-{
- uint32_t duty = hetRAM->Instruction[(cap << 1U) + 25U].Data;
- uint32_t period = hetRAM->Instruction[(cap << 1U) + 26U].Data;
- hetSIGNAL_t signal;
-
- signal.duty = (uint32_t)(100.0 * duty / period);
-
- if( hetRAM == hetRAM1)
- {
- signal.period = (period >> 7U) * 800.000 / 1000.0;
- }
- else
- {
- signal.period = (period >> 7U) * 800.000 / 1000.0;
- }
- return signal;
-}
-
-
-/** @fn void hetResetTimestamp(hetRAMBASE_t *hetRAM)
-* @brief Resets timestamp
-* @param[in] hetRAM Pointer to HET RAM:
-* - hetRAM1: HET1 RAM pointer
-* - hetRAM2: HET2 RAM pointer
-*
-* Resets loop count based timstamp.
-*/
-void hetResetTimestamp(hetRAMBASE_t * hetRAM)
-{
- hetRAM->Instruction[0U].Data = 0;
-}
-
-
-/** @fn uint32_t hetGetTimestamp(hetRAMBASE_t *hetRAM)
-* @brief Returns timestamp
-*
-* Returns loop count based timstamp.
-*/
-uint32_t hetGetTimestamp(hetRAMBASE_t * hetRAM)
-{
- return hetRAM->Instruction[57U].Data;
-}
-
-
-/** @fn void het1HighLevelInterrupt(void)
-* @brief Level 0 Interrupt for HET1
-*/
-#pragma INTERRUPT(het1HighLevelInterrupt, IRQ)
-
-void het1HighLevelInterrupt(void)
-{
- uint32_t vec = hetREG1->OFF1;
-
- if (vec < 18U)
- {
- if ((vec & 1U) != 0)
- {
- pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_PERIOD);
- }
- else
- {
- pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_DUTY);
- }
- }
- else
- {
- edgeNotification(hetREG1,vec - 18U);
- }
-}
-
-
-/** @fn void het1LowLevelInterrupt(void)
-* @brief Level 1 Interrupt for HET1
-*/
-#pragma INTERRUPT(het1LowLevelInterrupt, IRQ)
-
-void het1LowLevelInterrupt(void)
-{
- uint32_t vec = hetREG1->OFF2;
-
- if (vec < 18U)
- {
- if ((vec & 1U) != 0)
- {
- pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_PERIOD);
- }
- else
- {
- pwmNotification(hetREG1,(vec >> 1U) - 1U, pwmEND_OF_DUTY);
- }
- }
- else
- {
- edgeNotification(hetREG1,vec - 18U);
- }
-}
-
+++ /dev/null
-/** @file i2c.c
-* @brief I2C Driver Implementation File
-* @date 10.March.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/ti_drv_i2c.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @struct g_I2CTransfer
-* @brief Interrupt mode globals
-*
-*/
-struct g_i2cTransfer
-{
- uint32_t mode;
- uint32_t length;
- uint8_t *data;
-} g_i2cTransfer[2];
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-/** @fn void i2cInit(void)
-* @brief Initializes the i2c Driver
-*
-* This function initializes the i2c module.
-*/
-void i2cInit(void)
-{
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
- /** @b intialize @b I2C */
-
- /** - i2c out of reset */
- i2cREG1->MDR = (1 << 5);
-
- /** - set i2c mode */
- i2cREG1->MDR = (0 << 15) /* nack mode */
- | (0 << 14) /* free running */
- | 0 /* start condtion - master mode only */
- | (1 <<11) /* stop condtion */
- | (1 <<10) /* Master/Slave mode */
- | (I2C_TRANSMITTER) /* Transmitter/receiver */
- | (I2C_7BIT_AMODE) /* xpanded address */
- | (0 << 7) /* repeat mode */
- | (0 << 6) /* digital loopback */
- | (0 << 4) /* start byte - master only */
- | (0) /* free data format */
- | I2C_8_BIT; /* bit count */
-
-
- /** - set i2c extended mode */
- i2cREG1->EMDR = (0 << 25);
-
- /** - set i2c data count */
- i2cREG1->CNT = 3;
-
- /** - disable all interrupts */
- i2cREG1->IMR = 0x00U;
-
- /** - set prescale */
- i2cREG1->PSC = 9;
-
- /** - set clock rate */
- i2cREG1->CLKH = 35;
- i2cREG1->CLKL = 35;
-
- /** - set i2c pins functional mode */
- i2cREG1->FUN = (0 );
-
- /** - set i2c pins default output value */
- i2cREG1->DOUT = (0 << 1) /* sda pin */
- | (0); /* scl pin */
-
- /** - set i2c pins output direction */
- i2cREG1->DIR = (1 << 1) /* sda pin */
- | (1); /* scl pin */
-
- /** - set i2c pins open drain enable */
- i2cREG1->ODR = (0 << 1) /* sda pin */
- | (0); /* scl pin */
-
- /** - set i2c pins pullup/pulldown enable */
- i2cREG1->PD = (0 << 1) /* sda pin */
- | (0); /* scl pin */
-
- /** - set i2c pins pullup/pulldown select */
- i2cREG1->PSL = (1 << 1) /* sda pin */
- | (1); /* scl pin */
-
- /** - set interrupt enable */
- i2cREG1->IMR = (0 << 6) /* Address as slave interrupt */
- | (0 << 5) /* Stop Condition detect interrupt */
- | (1 << 4) /* Transmit data ready interrupt */
- | (1 << 3) /* Receive data ready interrupt */
- | (0 << 2) /* Register Access ready interrupt */
- | (0 << 1) /* No Acknowledgement interrupt */
- | (1); /* Arbitration Lost interrupt */
-
- i2cREG1->MDR |= I2C_RESET_OUT; /* i2c out of reset */
-
- /** - inialise global transfer variables */
- g_i2cTransfer[0].mode = 1 << 8;
- g_i2cTransfer[0].length = 0;
-
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
-}
-
-/** @fn void i2cSetOwnAdd(i2cBASE_t *i2c, uint32_t oadd)
-* @brief Set I2C Own Address
-* @param[in] oadd - I2C Own address (7-bit or 10 -bit address)
-* @param[in] i2c - i2c module base address
-* Set the Own address of the I2C module.
-*/
-void i2cSetOwnAdd(i2cBASE_t *i2c, uint32_t oadd)
-{
- i2cREG1->OAR = oadd; /* set own address */
-}
-
-/** @fn void i2cSetSlaveAdd(i2cBASE_t *i2c, uint32_t sadd)
-* @brief Set Port Direction
-* @param[in] sadd - I2C Slave address
-* @param[in] i2c - i2c module base address
-* Set the Slave address to communicate which is must in Master mode.
-*/
-void i2cSetSlaveAdd(i2cBASE_t *i2c, uint32_t sadd)
-{
- i2cREG1->SAR = sadd; /* set slave address */
-}
-
-/** @fn void i2cSetBaudrate(i2cBASE_t *i2c, uint32_t baud)
-* @brief Change baudrate at runtime.
-* @param[in] i2c - i2c module base address
-* @param[in] baud - baudrate in KHz
-*
-* Change the i2c baudrate at runtime.
-*/
-void i2cSetBaudrate(i2cBASE_t *i2c, uint32_t baud)
-{
- uint32_t prescale;
- uint32_t d;
- uint32_t ck;
- double vclk = 80.000 * 1000000.0;
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
- prescale = (uint32_t) ((vclk /8000000) - 1);
-
- if(prescale>=2)
- {
- d = 5;
- }
- else
- {
- d = prescale ? 6 : 7;
- }
-
- ck = ((vclk)/(2*baud*1000*(prescale+1)))-d;
-
- i2cREG1->PSC = prescale;
- i2cREG1->CLKH = ck;
- i2cREG1->CLKL = ck;
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
-}
-
-/** @fn void i2cSetStart(i2cBASE_t *i2c)
-* @brief Set i2c start condition
-* @param[in] i2c - i2c module base address
-* Set i2c to generate a start bit (Only in Master mode)
-*/
-void i2cSetStart(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-
- i2cREG1->MDR |= I2C_START_COND; /* set start condition */
-
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-}
-
-/** @fn void i2cSetStop(i2cBASE_t *i2c)
-* @brief Set i2c stop condition
-* @param[in] i2c - i2c module base address
-* Set i2c to generate a stop bit (Only in Master mode)
-*/
-void i2cSetStop(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
- i2cREG1->MDR |= I2C_STOP_COND; /* generate stop condition */
-
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-}
-
-/** @fn void i2cSetCount(i2cBASE_t *i2c,uint32_t cnt)
-* @brief Set i2c data count
-* @param[in] i2c - i2c module base address
-* @param[in] cnt - data count
-* Set i2c count to a transfer value after which the stop condition needs to be generated.
-* (Only in Master Mode)
-*/
-void i2cSetCount(i2cBASE_t *i2c ,uint32_t cnt)
-{
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-
- i2cREG1->CNT = cnt; /* set i2c count */
-
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
-}
-
-/** @fn uint32_t i2cIsTxReady(i2cBASE_t *i2c)
-* @brief Check if Tx buffer empty
-* @param[in] i2c - i2c module base address
-*
-* @return The TX ready flag
-*
-* Checks to see if the Tx buffer ready flag is set, returns
-* 0 is flags not set otherwise will return the Tx flag itself.
-*/
-uint32_t i2cIsTxReady(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- return i2cREG1->STR & I2C_TX_INT;
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-}
-
-/** @fn void i2cSendByte(i2cBASE_t *i2c, uint8_t byte)
-* @brief Send Byte
-* @param[in] i2c - i2c module base address
-* @param[in] byte - byte to transfer
-*
-* Sends a single byte in polling mode, will wait in the
-* routine until the transmit buffer is empty before sending
-* the byte. Use i2cIsTxReady to check for Tx buffer empty
-* before calling i2cSendByte to avoid waiting.
-*/
-void i2cSendByte(i2cBASE_t *i2c, uint8_t byte)
-{
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- while ((i2cREG1->STR & I2C_TX_INT) == 0) { /* wait */ };
- i2cREG1->DXR = byte;
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-}
-
-/** @fn void i2cSend(i2cBASE_t *i2c, uint32_t length, uint8_t *data)
-* @brief Send Data
-* @param[in] i2c - i2c module base address
-* @param[in] length - number of data words to transfer
-* @param[in] data - pointer to data to send
-*
-* Send a block of data pointed to by 'data' and 'length' bytes
-* long. If interrupts have been enabled the data is sent using
-* interrupt mode, otherwise polling mode is used. In interrupt
-* mode transmition of the first byte is started and the routine
-* returns imediatly, i2cSend must not be called again until the
-* transfer is complete, when the i2cNotification callback will
-* be called. In polling mode, i2cSend will not return until
-* the transfer is complete.
-*
-* @note if data word is less than 8 bits, then the data must be left
-* aligned in the data byte.
-*/
-void i2cSend(i2cBASE_t *i2c, uint32_t length, uint8_t *data)
-{
- uint32_t index = i2c == i2cREG1 ? 0 : 1;
-
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- if ((g_i2cTransfer[index].mode & I2C_TX_INT) != 0)
- {
- /* we are in interrupt mode */
-
- g_i2cTransfer[index].length = length;
- g_i2cTransfer[index].data = data;
-
- /* start transmit by sending first byte */
- i2cREG1->DXR = *g_i2cTransfer[index].data++;
- i2cREG1->IMR = I2C_TX_INT;
- }
- else
- {
- /* send the data */
- while (length-- > 0)
- {
- while ((i2cREG1->STR & I2C_TX_INT) == 0) { /* wait */ };
- i2cREG1->DXR = *data++;
- }
- }
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-}
-
-/** @fn uint32_t i2cIsRxReady(i2cBASE_t *i2c)
-* @brief Check if Rx buffer full
-* @param[in] i2c - i2c module base address
-*
-* @return The Rx ready flag
-*
-* Checks to see if the Rx buffer full flag is set, returns
-* 0 is flags not set otherwise will return the Rx flag itself.
-*/
-uint32_t i2cIsRxReady(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- return i2cREG1->STR & I2C_RX_INT;
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-}
-
-
-/** @fn uint32_t i2cRxError(i2cBASE_t *i2c)
-* @brief Return Rx Error flags
-* @param[in] i2c - i2c module base address
-*
-* @return The Rx error flags
-*
-* Returns the Rx framing, overun and parity errors flags,
-* also clears the error flags before returning.
-*/
-uint32_t i2cRxError(i2cBASE_t *i2c)
-{
- uint32_t status = i2cREG1->STR & (I2C_AL_INT | I2C_NACK_INT);
-
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-
- i2cREG1->STR = I2C_AL_INT | I2C_NACK_INT;
-
-/* USER CODE BEGIN (22) */
-/* USER CODE END */
-
- return status;
-
-}
-
-/** @fn void i2cClearSCD(i2cBASE_t *i2c)
-* @brief Clears the Stop condition detect flags.
-* @param[in] i2c - i2c module base address
-*
-* This sunction is called to clear the Stop condition detect(SCD) flag
-*/
-void i2cClearSCD(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (23) */
-/* USER CODE END */
-
- i2cREG1->STR = I2C_SCD_INT;
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-}
-
-/** @fn uint32_t i2cReceiveByte(i2cBASE_t *i2c)
-* @brief Receive Byte
-* @param[in] i2c - i2c module base address
-*
-* @return Received byte
-*
-* Recieves a single byte in polling mode. If there is
-* not a byte in the receive buffer the routine will wait
-* until one is received. Use i2cIsRxReady to check to
-* see if the buffer is full to avoid waiting.
-*/
-uint32_t i2cReceiveByte(i2cBASE_t *i2c)
-{
- while ((i2cREG1->STR & I2C_RX_INT) == 0) { /* wait */ };
-
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-
- return i2cREG1->DRR;
-}
-
-/** @fn void i2cReceive(i2cBASE_t *i2c, uint32_t length, uint8_t *data)
-* @brief Receive Data
-* @param[in] i2c - i2c module base address
-* @param[in] length - number of data words to transfer
-* @param[in] data - pointer to data buffer
-*
-* Receive a block of 'length' bytes long and place it into the
-* data buffer pointed to by 'data'. If interrupts have been
-* enabled the data is received using interrupt mode, otherwise
-* polling mode is used. In interrupt mode receive is setup and
-* the routine returns imediatly, i2cReceive must not be called
-* again until the transfer is complete, when the i2cNotification
-* callback will be called. In polling mode, i2cReceive will not
-* return until the transfer is complete.
-*/
-void i2cReceive(i2cBASE_t *i2c, uint32_t length, uint8_t *data)
-{
-
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
- if ((i2cREG1->IMR & I2C_RX_INT) != 0)
- {
- /* we are in interrupt mode */
- uint32_t index = i2c == i2cREG1 ? 0 : 1;
-
- /* clear error flags */
- i2cREG1->STR = I2C_AL_INT | I2C_NACK_INT;
-
- g_i2cTransfer[index].length = length;
- g_i2cTransfer[index].data = data;
- }
- else
- {
- while (length-- > 0)
- {
- while ((i2cREG1->STR & I2C_RX_INT) == 0) { /* wait */ };
- *data++ = i2cREG1->DRR;
- }
- }
-
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-}
-
-/** @fn void i2cEnableLoopback(i2cBASE_t *i2c)
-* @brief Enable Loopback mode for self test
-* @param[in] i2c - i2c module base address
-*
-* This function enables the Loopback mode for self test.
-*/
-void i2cEnableLoopback(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
- /* enable digital loopback */
- i2cREG1->MDR |= (1 << 6);
-
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-}
-
-/** @fn void i2cDisableLoopback(i2cBASE_t *i2c)
-* @brief Enable Loopback mode for self test
-* @param[in] i2c - i2c module base address
-*
-* This function disable the Loopback mode.
-*/
-void i2cDisableLoopback(i2cBASE_t *i2c)
-{
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-
- /* Disable Loopback Mode */
- i2cREG1->MDR &= 0xFFFFFFBF;
-
-/* USER CODE BEGIN (31) */
-/* USER CODE END */
-}
-
-/** @fn i2cEnableNotification(i2cBASE_t *i2c, uint32_t flags)
-* @brief Enable interrupts
-* @param[in] i2c - i2c module base address
-* @param[in] flags - Interrupts to be enabled, can be ored value of:
-* i2c_FE_INT - framming error,
-* i2c_OE_INT - overrun error,
-* i2c_PE_INT - parity error,
-* i2c_RX_INT - receive buffer ready,
-* i2c_TX_INT - transmit buffer ready,
-* i2c_WAKE_INT - wakeup,
-* i2c_BREAK_INT - break detect
-*/
-void i2cEnableNotification(i2cBASE_t *i2c, uint32_t flags)
-{
- uint32_t index = i2c == i2cREG1 ? 0 : 1;
-
-/* USER CODE BEGIN (32) */
-/* USER CODE END */
-
- g_i2cTransfer[index].mode |= (flags & I2C_TX_INT);
- i2cREG1->IMR = (flags & ~I2C_TX_INT);
-}
-
-/** @fn i2cDisableNotification(i2cBASE_t *i2c, uint32_t flags)
-* @brief Disable interrupts
-* @param[in] i2c - i2c module base address
-* @param[in] flags - Interrupts to be disabled, can be ored value of:
-* i2c_FE_INT - framming error,
-* i2c_OE_INT - overrun error,
-* i2c_PE_INT - parity error,
-* i2c_RX_INT - receive buffer ready,
-* i2c_TX_INT - transmit buffer ready,
-* i2c_WAKE_INT - wakeup,
-* i2c_BREAK_INT - break detect
-*/
-void i2cDisableNotification(i2cBASE_t *i2c, uint32_t flags)
-{
- uint32_t index = i2c == i2cREG1 ? 0 : 1;
-
-/* USER CODE BEGIN (33) */
-/* USER CODE END */
-
- g_i2cTransfer[index].mode &= ~(flags & I2C_TX_INT);
- i2cREG1->IMR = (flags & ~I2C_TX_INT);
-}
-
-/** @fn void i2cInterrupt(void)
-* @brief Interrupt for I2C
-*/
-#pragma INTERRUPT(i2cInterrupt, IRQ)
-
-void i2cInterrupt(void)
-{
- uint32_t vec = (i2cREG1->IVR & 0x00000007);
-
-/* USER CODE BEGIN (34) */
-/* USER CODE END */
-
- switch (vec)
- {
- case 1:
-/* USER CODE BEGIN (35) */
-/* USER CODE END */
- i2cNotification(i2cREG1, I2C_AL_INT);
- break;
- case 2:
-/* USER CODE BEGIN (36) */
-/* USER CODE END */
- i2cNotification(i2cREG1, I2C_NACK_INT);
- break;
- case 3:
-/* USER CODE BEGIN (37) */
-/* USER CODE END */
- i2cNotification(i2cREG1, I2C_ARDY_INT);
- break;
- case 4:
-/* USER CODE BEGIN (38) */
-/* USER CODE END */
- /* receive */
- { uint32_t byte = i2cREG1->DRR;
-
- if (g_i2cTransfer[0].length > 0)
- {
- *g_i2cTransfer[0].data++ = byte;
- g_i2cTransfer[0].length--;
- if (g_i2cTransfer[0].length == 0)
- {
- i2cNotification(i2cREG1, I2C_RX_INT);
- }
- }
- }
- break;
- case 5:
-/* USER CODE BEGIN (39) */
-/* USER CODE END */
- /* transmit */
- if (--g_i2cTransfer[0].length > 0)
- {
- i2cREG1->DXR = *g_i2cTransfer[0].data++;
- }
- else
- {
- i2cREG1->STR = I2C_TX_INT;
- i2cNotification(i2cREG1, I2C_TX_INT);
- }
- break;
-
-
- case 6:
-/* USER CODE BEGIN (40) */
-/* USER CODE END */
- /* transmit */
- i2cNotification(i2cREG1, I2C_SCD_INT);
- break;
-
- case 7:
-/* USER CODE BEGIN (41) */
-/* USER CODE END */
- i2cNotification(i2cREG1, I2C_AAS_INT);
- break;
-
- default:
-/* USER CODE BEGIN (42) */
-/* USER CODE END */
- /* phantom interrupt, clear flags and return */
- i2cREG1->STR = 0x000007FF;
- break;
- }
-/* USER CODE BEGIN (43) */
-/* USER CODE END */
-}
-
-
+++ /dev/null
-/** @file lin.c
-* @brief LIN Driver Implementation File
-* @date 20.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/ti_drv_lin.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void linInit(void)
-* @brief Initializes the lin Driver
-*
-* This function initializes the lin module.
-*/
-void linInit(void)
-{
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
- /** @b intalise @b LIN */
-
- /** - Release from reset */
- linREG->GCR0 = 1U;
-
- /** - Start LIN configuration
- * - Keep state machine in software reset
- */
- linREG->GCR1 = 00U;
-
- /** - Enable LIN Mode */
- linREG->GCR1 = 0x40U;
-
- /** - Setup control register 1
- * - Enable transmitter
- * - Enable receiver
- * - Stop when debug mode is entered
- * - Disable Loopback mode
- * - Disable / Enable HGENCTRL (Mask filtering with ID-Byte)
- * - Use enhance checksum
- * - Enable multi buffer mode
- * - Disable automatic baudrate adjustment
- * - Disable sleep mode
- * - Set LIN module as master
- * - Enable/Disable parity
- * - Disable data length control in ID4 and ID5
- */
- linREG->GCR1 |= 0x03000C60U
- | (1U << 12U)
- | (0U << 2U);
-
- /** - Setup maximum baud rate prescaler */
- linREG->MBRSR = 3600U;
-
- /** - Setup baud rate prescaler */
- linREG->BRSR = 249U;
-
- /** - Setup RX and TX reception masks */
- linREG->MASK = (0xFFU << 16U) | 0xFFU;
-
- /** - Setup compare
- * - Sync delimiter
- * - Sync break extension
- */
- linREG->COMP = ((1U - 1U) << 8U) | (13U - 13U);
-
- /** - Setup response length */
- linREG->LENGTH = (8U - 1U);
-
- /** - Set LIN pins functional mode
- * - TX
- * - RX
- * - CLK
- */
- linREG->FUN = 4U | 2U | 0U;
-
- /** - Set LIN pins default output value
- * - TX
- * - RX
- * - CLK
- */
- linREG->DOUT = 0U | 0U | 0U;
-
- /** - Set LIN pins output direction
- * - TX
- * - RX
- * - CLK
- */
- linREG->DIR = 0U | 0U | 0U;
-
- /** - Set LIN pins open drain enable
- * - TX
- * - RX
- * - CLK
- */
- linREG->ODR = 0U | 0U | 0U;
-
- /** - Set LIN pins pullup/pulldown enable
- * - TX
- * - RX
- * - CLK
- */
- linREG->PD = 0U | 0U | 0U;
-
- /** - Set LIN pins pullup/pulldown select
- * - TX
- * - RX
- * - CLK
- */
- linREG->PSL = 4U | 2U | 1U;
-
- /** - Set interrupt level
- * - Bit error level
- * - Physical bus error level
- * - Checksum error level
- * - Inconsistent sync field error level
- * - No response error level
- * - Framing error level
- * - Overrun error level
- * - Parity error level
- * - Identifier level
- * - RX level
- * - TX level
- * - Timeout after 3 wakeup signals level
- * - Timeout after wakeup signal level
- * - Timeout level
- * - Wakeup level
- * - Break detect level
- */
- linREG->SETINTLVL = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Set interrupt enable
- * - Enable/Disable bit error
- * - Enable/Disable physical bus error level
- * - Enable/Disable checksum error level
- * - Enable/Disable inconsistent sync field error level
- * - Enable/Disable no response error level
- * - Enable/Disable framing error level
- * - Enable/Disable overrun error level
- * - Enable/Disable parity error level
- * - Enable/Disable identifier level
- * - Enable/Disable RX level
- * - Enable/Disable TX level
- * - Enable/Disable timeout after 3 wakeup signals level
- * - Enable/Disable timeout after wakeup signal level
- * - Enable/Disable timeout level
- * - Enable/Disable wakeup level
- * - Enable/Disable break detect level
- */
- linREG->SETINT = 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00002000U
- | 0x00000200U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U
- | 0x00000000U;
-
- /** - Finaly start LIN */
- linREG->GCR1 |= 0x00000080U;
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-}
-
-
-/** @fn void linSetFunctional(linBASE_t *lin, uint32_t port)
-* @brief Change functional behavoiur of pins at runtime.
-* @param[in] lin - lin module base address
-* @param[in] port - Value to write to FUN register
-*
-* Change the value of the PCFUN register at runtime, this allows to
-* dynaimcaly change the functionality of the LIN pins between functional
-* and GIO mode.
-*/
-void linSetFunctional(linBASE_t *lin, uint32_t port)
-{
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
- lin->FUN = port;
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-}
-
-
-/** @fn void linSendHeader(linBASE_t *lin, uint8_t identifier)
-* @brief Send lin header.
-* @param[in] lin - lin module base address
-* @param[in] identifier - lin header id
-*
-* Send lin header including sync break field, sync field and identifier.
-*/
-void linSendHeader(linBASE_t *lin, uint8_t identifier)
-{
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- lin->IDBYTE = identifier;
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-}
-
-
-/** @fn void linSendWakupSignal(linBASE_t *lin)
-* @brief Send lin wakeup signal.
-* @param[in] lin - lin module base address
-*
-* Send lin wakeup signal to terminate the sleep mode of any lin node connected to the BUS.
-*/
-void linSendWakupSignal(linBASE_t *lin)
-{
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- lin->TDx[0] = 0xF0;
- lin->GCR2 |= 0x00000100U;
-
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-}
-
-/** @fn void linEnterSleep(linBASE_t *lin)
-* @brief Take Module to Sleep.
-* @param[in] lin - lin module base address
-*
-* Application must call this function to take Module to Sleep when Sleep command is received.
-* This function can also be called to forcefully enter Sleep when no activity on BUS.
-*/
-void linEnterSleep(linBASE_t *lin)
-{
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
- lin->GCR2 |= 0x00000001U;
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-}
-
-/** @fn void linSoftwareReset(linBASE_t *lin)
-* @brief Perform sofware reset.
-* @param[in] lin - lin module base address
-*
-* Perform software reset of lin module.
-* This function will reset the lin state machine and clear all pending flags.
-* It is required to call this function after a wakeup signal has been sent.
-*/
-void linSoftwareReset(linBASE_t *lin)
-{
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
-
- lin->GCR1 &= ~0x00000080U;
- lin->GCR1 |= 0x00000080U;
-
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-}
-
-/** @fn uint32_t linIsTxReady(linBASE_t *lin)
-* @brief Check if Tx buffer empty
-* @param[in] lin - lin module base address
-*
-* @return The TX ready flag
-*
-* Checks to see if the Tx buffer ready flag is set, returns
-* 0 is flags not set otherwise will return the Tx flag itself.
-*/
-uint32_t linIsTxReady(linBASE_t *lin)
-{
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-
- return lin->FLR & LIN_TX_READY;
-}
-
-/** @fn void linSetLength(linBASE_t *lin, uint32_t length)
-* @brief Send Data
-* @param[in] lin - lin module base address
-* @param[in] length - number of data words in bytes. Range: 1-8.
-*
-* Send data response length in bytes.
-*/
-void linSetLength(linBASE_t *lin, uint32_t length)
-{
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- lin->LENGTH = length - 1U;
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-}
-
-/** @fn void linSend(linBASE_t *lin, const uint8_t *data)
-* @brief Send Data
-* @param[in] lin - lin module base address
-* @param[in] data - pointer to data to send
-*
-* Send a block of data pointed to by 'data'.
-* The number of data to transmit must be set with 'linSetLength' before.
-*/
-void linSend(linBASE_t *lin, const uint8_t *data)
-{
- int i;
- int length = lin->LENGTH;
- uint8_t *pData = (uint8_t *)data + length;
-
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- for (i = length; i >= 0; i--)
- {
- lin->TDx[i] = *pData--;
- }
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-}
-
-/** @fn uint32_t linIsRxReady(linBASE_t *lin)
-* @brief Check if Rx buffer full
-* @param[in] lin - lin module base address
-*
-* @return The Rx ready flag
-*
-* Checks to see if the Rx buffer full flag is set, returns
-* 0 is flags not set otherwise will return the Rx flag itself.
-*/
-uint32_t linIsRxReady(linBASE_t *lin)
-{
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- return lin->FLR & LIN_RX_INT;
-}
-
-
-/** @fn uint32_t linTxRxError(linBASE_t *lin)
-* @brief Return Tx and Rx Error flags
-* @param[in] lin - lin module base address
-*
-* @return The Tx and Rx error flags
-*
-* Returns the bit, physical bus, checksum, inconsisten sync field,
-* no response, framing, overun, parity and timeout error flags.
-* It also clears the error flags before returning.
-*/
-uint32_t linTxRxError(linBASE_t *lin)
-{
- uint32_t status = lin->FLR & (LIN_BE_INT
- | LIN_PBE_INT
- | LIN_CE_INT
- | LIN_ISFE_INT
- | LIN_NRE_INT
- | LIN_FE_INT
- | LIN_OE_INT
- | LIN_PE_INT
- | LIN_TOA3WUS_INT
- | LIN_TOAWUS_INT
- | LIN_TO_INT);
-
- lin->FLR = LIN_BE_INT
- | LIN_PBE_INT
- | LIN_CE_INT
- | LIN_ISFE_INT
- | LIN_NRE_INT
- | LIN_FE_INT
- | LIN_OE_INT
- | LIN_PE_INT
- | LIN_TOA3WUS_INT
- | LIN_TOAWUS_INT
- | LIN_TO_INT;
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-
- return status;
-}
-
-
-/** @fn uint32_t linGetIdentifier(linBASE_t *lin)
-* @brief Get last received identifier
-* @param[in] lin - lin module base address
-*
-* @return Identifier
-*
-* Read last received identifier.
-*/
-uint32_t linGetIdentifier(linBASE_t *lin)
-{
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
- return lin->RXID;
-}
-
-
-/** @fn void linGetData(linBASE_t *lin, uint8_t * const data)
-* @brief Read received data
-* @param[in] lin - lin module base address
-* @param[in] data - pointer to data buffer
-*
-* Read a block of bytes and place it into the data buffer pointed to by 'data'.
-*/
-void linGetData(linBASE_t *lin, uint8_t * const data)
-{
- uint32_t i;
- uint32_t length = lin->LENGTH;
- uint8_t *pData = (uint8_t *)data;
-
-/* USER CODE BEGIN (22) */
-/* USER CODE END */
-
- for (i = 0U; i <= length; i++)
- {
- *pData++ = lin->RDx[i];
- }
-
-/* USER CODE BEGIN (23) */
-/* USER CODE END */
-}
-
-
-/** @fn void linEnableLoopback(linBASE_t *lin, Loopbacktype_t Loopbacktype)
-* @brief Enable Loopback mode for self test
-* @param[in] lin - lin module base address
-* @param[in] Loopbacktype - Digital or Analog
-*
-* This function enables the Loopback mode for self test.
-*/
-void linEnableLoopback(linBASE_t *lin, Loopbacktype_t Loopbacktype)
-{
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-
- /* Clear Loopback incase enbaled already */
- lin->IODFTCTRL = 0;
-
- /* Enable Loopback either in Analog or Digital Mode */
- lin->IODFTCTRL = 0x00000A00
- | Loopbacktype << 1;
-
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-}
-
-/** @fn void linDisableLoopback(linBASE_t *lin)
-* @brief Enable Loopback mode for self test
-* @param[in] lin - lin module base address
-*
-* This function disable the Loopback mode.
-*/
-void linDisableLoopback(linBASE_t *lin)
-{
-/* USER CODE BEGIN (26) */
-/* USER CODE END */
-
- /* Disable Loopback Mode */
- lin->IODFTCTRL = 0x000005000;
-
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-}
-
-
-/** @fn linEnableNotification(linBASE_t *lin, uint32_t flags)
-* @brief Enable interrupts
-* @param[in] lin - lin module base address
-* @param[in] flags - Interrupts to be enabled, can be ored value of:
-* LIN_BE_INT - bit error,
-* LIN_PBE_INT - physical bus error,
-* LIN_CE_INT - checksum error,
-* LIN_ISFE_INT - inconsistent sync field error,
-* LIN_NRE_INT - no response error,
-* LIN_FE_INT - framming error,
-* LIN_OE_INT - overrun error,
-* LIN_PE_INT - parity error,
-* LIN_ID_INT - received matching identifier,
-* LIN_RX_INT - receive buffer ready,
-* LIN_TOA3WUS_INT - time out after 3 wakeup signals,
-* LIN_TOAWUS_INT - time out after wakeup signal,
-* LIN_TO_INT - time out signal,
-* LIN_WAKEUP_INT - wakeup,
-* LIN_BREAK_INT - break detect
-*/
-void linEnableNotification(linBASE_t *lin, uint32_t flags)
-{
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
- lin->SETINT = flags;
-
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-}
-
-
-/** @fn linDisableNotification(linBASE_t *lin, uint32_t flags)
-* @brief Disable interrupts
-* @param[in] lin - lin module base address
-* @param[in] flags - Interrupts to be disabled, can be ored value of:
-* LIN_BE_INT - bit error,
-* LIN_PBE_INT - physical bus error,
-* LIN_CE_INT - checksum error,
-* LIN_ISFE_INT - inconsistent sync field error,
-* LIN_NRE_INT - no response error,
-* LIN_FE_INT - framming error,
-* LIN_OE_INT - overrun error,
-* LIN_PE_INT - parity error,
-* LIN_ID_INT - received matching identifier,
-* LIN_RX_INT - receive buffer ready,
-* LIN_TOA3WUS_INT - time out after 3 wakeup signals,
-* LIN_TOAWUS_INT - time out after wakeup signal,
-* LIN_TO_INT - time out signal,
-* LIN_WAKEUP_INT - wakeup,
-* LIN_BREAK_INT - break detect
-*/
-void linDisableNotification(linBASE_t *lin, uint32_t flags)
-{
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-
- lin->CLRINT = flags;
-
-/* USER CODE BEGIN (31) */
-/* USER CODE END */
-}
-
-
-/** @fn void linHighLevelInterrupt(void)
-* @brief Level 0 Interrupt for LIN
-*/
-#pragma INTERRUPT(linHighLevelInterrupt, IRQ)
-
-void linHighLevelInterrupt(void)
-{
- uint32_t vec = linREG->INTVECT0;
-
-/* USER CODE BEGIN (32) */
-/* USER CODE END */
-
- switch (vec)
- {
- case 1: linNotification(linREG, LIN_WAKEUP_INT); break;
- case 2: linNotification(linREG, LIN_ISFE_INT); break;
- case 3: linNotification(linREG, LIN_PE_INT); break;
- case 4: linNotification(linREG, LIN_ID_INT); break;
- case 5: linNotification(linREG, LIN_PBE_INT); break;
- case 6: linNotification(linREG, LIN_FE_INT); break;
- case 7: linNotification(linREG, LIN_BREAK_INT); break;
- case 8: linNotification(linREG, LIN_CE_INT); break;
- case 9: linNotification(linREG, LIN_OE_INT); break;
- case 10: linNotification(linREG, LIN_BE_INT); break;
- case 11: linNotification(linREG, LIN_RX_INT); break;
- case 13: linNotification(linREG, LIN_NRE_INT); break;
- case 14: linNotification(linREG, LIN_TOAWUS_INT); break;
- case 15: linNotification(linREG, LIN_TOA3WUS_INT); break;
- case 16: linNotification(linREG, LIN_TO_INT); break;
- default:
- /* phantom interrupt, perform software reset */
- linREG->GCR1 &= ~0x00000080U;
- linREG->GCR1 |= 0x00000080U;
- break;
- }
-/* USER CODE BEGIN (33) */
-/* USER CODE END */
-}
-
-
-/** @fn void linLowLevelInterrupt(void)
-* @brief Level 1 Interrupt for LIN
-*/
-#pragma INTERRUPT(linLowLevelInterrupt, IRQ)
-
-void linLowLevelInterrupt(void)
-{
- uint32_t vec = linREG->INTVECT1;
-
-/* USER CODE BEGIN (34) */
-/* USER CODE END */
-
- switch (vec)
- {
- case 1: linNotification(linREG, LIN_WAKEUP_INT); break;
- case 2: linNotification(linREG, LIN_ISFE_INT); break;
- case 3: linNotification(linREG, LIN_PE_INT); break;
- case 4: linNotification(linREG, LIN_ID_INT); break;
- case 5: linNotification(linREG, LIN_PBE_INT); break;
- case 6: linNotification(linREG, LIN_FE_INT); break;
- case 7: linNotification(linREG, LIN_BREAK_INT); break;
- case 8: linNotification(linREG, LIN_CE_INT); break;
- case 9: linNotification(linREG, LIN_OE_INT); break;
- case 10: linNotification(linREG, LIN_BE_INT); break;
- case 11: linNotification(linREG, LIN_RX_INT); break;
- case 13: linNotification(linREG, LIN_NRE_INT); break;
- case 14: linNotification(linREG, LIN_TOAWUS_INT); break;
- case 15: linNotification(linREG, LIN_TOA3WUS_INT); break;
- case 16: linNotification(linREG, LIN_TO_INT); break;
- default:
- /* phantom interrupt, perform software reset */
- linREG->GCR1 &= ~0x00000080U;
- linREG->GCR1 |= 0x00000080U;
- break;
- }
-/* USER CODE BEGIN (35) */
-/* USER CODE END */
-}
-
+++ /dev/null
-/**
- * \file mdio.c
- *
- * \brief MDIO APIs.
- *
- * This file contains the device abstraction layer APIs for MDIO.
- */
-
-/* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
- * ALL RIGHTS RESERVED
- */
-
-
-#include "base.h"
-#include "sys/hw_reg_access.h"
-#include "sys/ti_drv_mdio.h"
-#include "sys/hw_mdio.h"
-
-/*******************************************************************************
-* INTERNAL MACRO DEFINITIONS
-*******************************************************************************/
-#define PHY_REG_MASK (0x1Fu)
-#define PHY_ADDR_MASK (0x1Fu)
-#define PHY_DATA_MASK (0xFFFFu)
-#define PHY_REG_SHIFT (21u)
-#define PHY_ADDR_SHIFT (16u)
-
-/*******************************************************************************
-* API FUNCTION DEFINITIONS
-*******************************************************************************/
-
-/**
- * \brief Reads a PHY register using MDIO.
- *
- * \param baseAddr Base Address of the MDIO Module Registers.
- * \param phyAddr PHY Adress.
- * \param regNum Register Number to be read.
- * \param dataPtr Pointer where the read value shall be written.
- *
- * \return status of the read \n
- * TRUE - read is successful.\n
- * FALSE - read is not acknowledged properly.
- *
- **/
-unsigned int MDIOPhyRegRead(unsigned int baseAddr, unsigned int phyAddr,
- unsigned int regNum, volatile unsigned short *dataPtr)
-{
- /* Wait till transaction completion if any */
- while(HWREG(baseAddr + MDIO_USERACCESS0) & MDIO_USERACCESS0_GO);
-
- HWREG(baseAddr + MDIO_USERACCESS0)
- = (MDIO_USERACCESS0_READ | MDIO_USERACCESS0_GO
- |((regNum & PHY_REG_MASK) << PHY_REG_SHIFT)
- |((phyAddr & PHY_ADDR_MASK) << PHY_ADDR_SHIFT));
-
- /* wait for command completion */
- while(HWREG(baseAddr + MDIO_USERACCESS0) & MDIO_USERACCESS0_GO);
-
- /* Store the data if the read is acknowledged */
- if((HWREG(baseAddr + MDIO_USERACCESS0)) & MDIO_USERACCESS0_ACK)
- {
- *dataPtr = (unsigned short)((HWREG(baseAddr + MDIO_USERACCESS0))
- & PHY_DATA_MASK);
- return TRUE;
- }
-
- return FALSE;
-}
-
-/**
- * \brief Writes a PHY register using MDIO.
- *
- * \param baseAddr Base Address of the MDIO Module Registers.
- * \param phyAddr PHY Adress.
- * \param regNum Register Number to be read.
- * \param RegVal Value to be written.
- *
- * \return None
- *
- **/
-void MDIOPhyRegWrite(unsigned int baseAddr, unsigned int phyAddr,
- unsigned int regNum, unsigned short RegVal)
-{
- /* Wait till transaction completion if any */
- while(HWREG(baseAddr + MDIO_USERACCESS0) & MDIO_USERACCESS0_GO);
-
- HWREG(baseAddr + MDIO_USERACCESS0) =
- (MDIO_USERACCESS0_WRITE
- | MDIO_USERACCESS0_GO
- |((regNum & PHY_REG_MASK) << PHY_REG_SHIFT)
- |((phyAddr & PHY_ADDR_MASK) << PHY_ADDR_SHIFT)
- | RegVal);
-
- /* wait for command completion*/
- while(HWREG(baseAddr + MDIO_USERACCESS0) & MDIO_USERACCESS0_GO);
-}
-/**
- * \brief Reads the alive status of all PHY connected to this MDIO.
- * The bit correponding to the PHY address will be set if the PHY
- * is alive.
- *
- * \param baseAddr Base Address of the MDIO Module Registers.
- *
- * \return MDIO alive register state
- *
- **/
-unsigned int MDIOPhyAliveStatusGet(unsigned int baseAddr)
-{
- return (HWREG(baseAddr + MDIO_ALIVE));
-}
-
-/**
- * \brief Reads the link status of all PHY connected to this MDIO.
- * The bit correponding to the PHY address will be set if the PHY
- * link is active.
- *
- * \param baseAddr Base Address of the MDIO Module Registers.
- *
- * \return MDIO link register state
- *
- **/
-unsigned int MDIOPhyLinkStatusGet(unsigned int baseAddr)
-{
- return (HWREG(baseAddr + MDIO_LINK));
-}
-
-/**
- * \brief Initializes the MDIO peripheral. This enables the MDIO state
- * machine, uses standard pre-amble and set the clock divider value.
- *
- * \param baseAddr Base Address of the MDIO Module Registers.
- * \param mdioInputFreq The clock input to the MDIO module
- * \param mdioOutputFreq The clock output required on the MDIO bus
- * \return None
- *
- **/
-#define MDIO_CTRL_ENABLE_m (1 << 30)
-#define MDIO_CTRL_CLKDIV_m (0xff)
-#define MDIO_HIGHEST_USER_CHANNEL_m (0xf)
-#define MDIO_HIGHEST_USER_CHANNEL_sh 24
-
-void MDIOInit(unsigned int baseAddr, unsigned int mdioInputFreq,
- unsigned int mdioOutputFreq)
-{
- //HWREG(baseAddr + MDIO_CONTROL) = 0x41000020u;
-
- HWREG(baseAddr + MDIO_CONTROL) = (1 << MDIO_HIGHEST_USER_CHANNEL_sh) |
- MDIO_CTRL_ENABLE_m | (0x60 & MDIO_CTRL_CLKDIV_m);
-}
-
-/***************************** End Of File ***********************************/
+++ /dev/null
-/** @file mibspi.c
-* @brief MIBSPI Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/ti_drv_mibspi.h"
-
-/* USER CODE BEGIN (1) */
-/* USER CODE END */
-
-/** @fn void mibspiInit(void)
-* @brief Initializes the MIBSPI Driver
-*
-* This function initializes the MIBSPI module.
-*/
-void mibspiInit(void)
-{
-int i ;
-
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
-
-
-
- /** @b intalise @b MIBSPI5 */
-
- /** bring MIBSPI out of reset */
- mibspiREG5->GCR0 = 1U;
-
- /** enable MIBSPI RAM Parity */
- mibspiREG5->EDEN = 0x00000005U;
-
- /** enable MIBSPI5 multibuffered mode and enable buffer RAM */
- mibspiREG5->MIBSPIE = 1U;
-
- /** MIBSPI5 master mode and clock configuration */
- mibspiREG5->GCR1 = (1 << 1) /* CLOKMOD */
- | 1; /* MASTER */
-
- /** MIBSPI5 enable pin configuration */
- mibspiREG5->ENAHIGHZ = 0; /* ENABLE HIGHZ */
-
- /** - Delays */
- mibspiREG5->DELAY = (0 << 24) /* C2TDELAY */
- | (0 << 16) /* T2CDELAY */
- | (0 << 8) /* T2EDELAY */
- | 0; /* C2EDELAY */
-
- /** - Data Format 0 */
- mibspiREG5->FMT0 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 16; /* data word length */
-
- /** - Data Format 1 */
- mibspiREG5->FMT1 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 16; /* data word length */
-
- /** - Data Format 2 */
- mibspiREG5->FMT2 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 16; /* data word length */
-
- /** - Data Format 3 */
- mibspiREG5->FMT3 = (0 << 24) /* wdelay */
- | (0 << 23) /* parity Polarity */
- | (0 << 22) /* parity enable */
- | (0 << 21) /* wait on enable */
- | (0 << 20) /* shift direction */
- | (0 << 17) /* clock polarity */
- | (0 << 16) /* clock phase */
- | (79 << 8) /* baudrate prescale */
- | 16; /* data word length */
-
- /** - wait for buffer inialisation complete before accessing MibSPI registers */
- while ((mibspiREG5->BUFINIT) != 0) { /* wait */ }
-
- /** - inialise transfer groups */
- mibspiREG5->TGCTRL[0] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | (0 << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[1] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | (8 << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[2] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | ((8+0) << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[3] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | ((8+0+0) << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[4] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | ((8+0+0+0) << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[5] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | ((8+0+0+0+0) << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[6] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | ((8+0+0+0+0+0) << 8); /* start buffer */
-
- mibspiREG5->TGCTRL[7] = (1 << 30) /* oneshot */
- | (0 << 29) /* pcurrent reset */
- | (TRG_ALWAYS << 20) /* trigger event */
- | (TRG_DISABLED << 16) /* trigger source */
- | ((8+0+0+0+0+0+0) << 8); /* start buffer */
-
-
- mibspiREG5->TGCTRL[8] = 8+0+0+0+0+0+0+0 << 8;
-
- mibspiREG5->LTGPEND = 8+0+0+0+0+0+0+0-1;
-
- /** - initalise buffer ram */
- { i = 0;
-
- if (8 > 0)
- {
- while (i < 8-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_0; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_0; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_1; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_1; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_2; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_2; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0+0+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_3; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_3; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0+0+0+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_4; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_4; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0+0+0+0+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_5; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_5; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0+0+0+0+0+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_6; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_6; /* chip select */
- }
- if (0 > 0)
- {
- while (i < 8+0+0+0+0+0+0+0-1)
- {
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* hold chip select Based on Lock selection */
- | (0 << 11) /* lock transmission */
- | (0 << 8) /* data format */
- | CS_7; /* chip select */
- }
- mibspiRAM5->tx[i++].control = (4 << 13) /* buffer mode */
- | (0 << 12) /* chip select hold */
- | (0 << 10) /* enable WDELAY */
- | (0 << 8) /* data format */
- | CS_7; /* chip select */
- }
- }
-
- /** - set interrupt levels */
- mibspiREG5->LVL = (0 << 9) /* TXINT */
- | (0 << 8) /* RXINT */
- | (0 << 6) /* OVRNINT */
- | (0 << 4) /* BITERR */
- | (0 << 3) /* DESYNC */
- | (0 << 2) /* PARERR */
- | (0 << 1) /* TIMEOUT */
- | (0); /* DLENERR */
-
- /** - clear any pending interrupts */
- mibspiREG5->FLG = 0xFFFFU;
-
- /** - enable interrupts */
- mibspiREG5->INT0 = (0 << 9) /* TXINT */
- | (0 << 8) /* RXINT */
- | (0 << 6) /* OVRNINT */
- | (0 << 4) /* BITERR */
- | (0 << 3) /* DESYNC */
- | (0 << 2) /* PARERR */
- | (0 << 1) /* TIMEOUT */
- | (0); /* DLENERR */
-
- /** @b initalise @b MIBSPI5 @b Port */
-
- /** - MIBSPI5 Port output values */
- mibspiREG5->PCDOUT = 0 /* SCS[0] */
- | (0 << 1) /* SCS[1] */
- | (0 << 2) /* SCS[2] */
- | (0 << 3) /* SCS[3] */
- | (0 << 8) /* ENA */
- | (0 << 9) /* CLK */
- | (0 << 10) /* SIMO */
- | (0 << 19)
- | (0 << 25)
- | (0 << 26)
- | (0 << 27)
- | (0 << 17)
- | (0 << 18)
- | (0 << 11); /* SOMI */
-
- /** - MIBSPI5 Port direction */
- mibspiREG5->PCDIR = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (0 << 8) /* ENA */
- | (1 << 9) /* CLK */
- | (1 << 10) /* SIMO */
- | (0 << 19)
- | (0 << 25)
- | (0 << 26)
- | (0 << 27)
- | (0 << 17)
- | (0 << 18)
- | (0 << 11); /* SOMI */
-
- /** - MIBSPI5 Port open drain enable */
- mibspiREG5->PCPDR = 0 /* SCS[0] */
- | (0 << 1) /* SCS[1] */
- | (0 << 2) /* SCS[2] */
- | (0 << 3) /* SCS[3] */
- | (0 << 8) /* ENA */
- | (0 << 9) /* CLK */
- | (0 << 10) /* SIMO */
- | (0 << 19)
- | (0 << 25)
- | (0 << 26)
- | (0 << 27)
- | (0 << 17)
- | (0 << 18)
- | (0 << 11); /* SOMI */
-
- /** - MIBSPI5 Port pullup / pulldown selection */
- mibspiREG5->PCPSL = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (1 << 8) /* ENA */
- | (1 << 9) /* CLK */
- | (1 << 10) /* SIMO */
- | (1 << 19)
- | (1 << 25)
- | (1 << 26)
- | (1 << 27)
- | (1 << 17)
- | (1 << 18)
- | (1 << 11); /* SOMI */
-
- /** - MIBSPI5 Port pullup / pulldown enable*/
- mibspiREG5->PCDIS = 0 /* SCS[0] */
- | (0 << 1) /* SCS[1] */
- | (0 << 2) /* SCS[2] */
- | (0 << 3) /* SCS[3] */
- | (0 << 8) /* ENA */
- | (0 << 9) /* CLK */
- | (0 << 10) /* SIMO */
- | (0 << 19)
- | (0 << 25)
- | (0 << 26)
- | (0 << 27)
- | (0 << 17)
- | (0 << 18)
- | (0 << 11); /* SOMI */
-
- /* MIBSPI5 set all pins to functional */
- mibspiREG5->PCFUN = 1 /* SCS[0] */
- | (1 << 1) /* SCS[1] */
- | (1 << 2) /* SCS[2] */
- | (1 << 3) /* SCS[3] */
- | (1 << 8) /* ENA */
- | (1 << 9) /* CLK */
- | (1 << 10) /* SIMO */
- | (1 << 19)
- | (1 << 25)
- | (1 << 26)
- | (1 << 27)
- | (0 << 17)
- | (0 << 18)
- | (1 << 11); /* SOMI */
-
-
-
- /** - Finaly start MIBSPI5 */
- mibspiREG5->ENA = 1U;
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-
-}
-
-
-/** @fn void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32_t port)
-* @brief Change functional behavoiur of pins at runtime.
-* @param[in] mibspi - mibspi module base address
-* @param[in] port - Value to write to PCFUN register
-*
-* Change the value of the PCFUN register at runtime, this allows to
-* dynaimcaly change the functionality of the MIBSPI pins between functional
-* and GIO mode.
-*/
-void mibspiSetFunctional(mibspiBASE_t *mibspi, uint32_t port)
-{
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
- mibspi->PCFUN = port;
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-}
-
-
-/** @fn void mibspiSetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])
-* @brief Set Buffer Data
-* @param[in] mibspi - Spi module base address
-* @param[in] group - Transfer group (0..7)
-* @param[in] data - new data for transfer group
-*
-* This function updates the data for the specified transfer group,
-* the length of the data must match the length of the transfer group.
-*/
-void mibspiSetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])
-{
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- mibspiRAM_t *ram = mibspi == mibspiREG1 ? mibspiRAM1 : (mibspi == mibspiREG3 ? mibspiRAM3 : mibspiRAM5);
- uint32_t start = (mibspi->TGCTRL[group] >> 8) & 0xFF;
- uint32_t end = group == 7 ? (mibspi->LTGPEND + 1) : (mibspi->TGCTRL[group+1] >> 8) & 0xFF;
-
- if (end < start) {end = 128;}
-
- while (start < end)
- {
- ram->tx[start].data = *data++;
- start++;
- }
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-}
-
-
-/** @fn void mibspiGetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])
-* @brief Retrieves Buffer Data fro receive buffer
-* @param[in] mibspi - Spi module base address
-* @param[in] group - Transfer group (0..7)
-* @param[out] data - pointer to data array
-*
-* @return error flags from data buffer, if there was a receive error on
-* one of the buffers this will be rerflected in the return value.
-*
-* This function transfers the data from the specified transfer group receve
-* buffers to the data array, the length of the data must match the length
-* of the transfer group.
-*/
-uint32_t mibspiGetData(mibspiBASE_t *mibspi, uint32_t group, uint16_t data[])
-{
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- mibspiRAM_t *ram = mibspi == mibspiREG1 ? mibspiRAM1 : (mibspi == mibspiREG3 ? mibspiRAM3 : mibspiRAM5);
- uint32_t start = (mibspi->TGCTRL[group] >> 8) & 0xFF;
- uint32_t end = group == 7 ? (mibspi->LTGPEND + 1) : (mibspi->TGCTRL[group+1] >> 8) & 0xFF;
- uint32_t flags = 0;
-
- if (end < start) {end = 128;}
-
- while (start < end)
- {
- flags |= ram->rx[start].flags;
- *data++ = ram->rx[start].data;
- start++;
- }
-
-/* USER CODE BEGIN (9) */
-/* USER CODE END */
-
- return (flags >> 8) & 0x5F;
-}
-
-
-/** @fn void mibspiTransfer(mibspiBASE_t *mibspi, uint32_t group)
-* @brief Transmit Transfer Group
-* @param[in] mibspi - Spi module base address
-* @param[in] group - Transfer group (0..7)
-*
-* Initiates a transfer for the specified transfer group.
-*/
-void mibspiTransfer(mibspiBASE_t *mibspi, uint32_t group)
-{
-/* USER CODE BEGIN (10) */
-/* USER CODE END */
-
- mibspi->TGCTRL[group] |= 0x80000000;
-
-/* USER CODE BEGIN (11) */
-/* USER CODE END */
-}
-
-
-/** @fn int mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32_t group)
-* @brief Check for Transfer Group Ready
-* @param[in] mibspi - Spi module base address
-* @param[in] group - Transfer group (0..7)
-*
-* @return 1 is transfer complete, otherwise 0.
-*
-* Checks to see if the transfer for the specified transfer group
-* has finished.
-*/
-int mibspiIsTransferComplete(mibspiBASE_t *mibspi, uint32_t group)
-{
-/* USER CODE BEGIN (12) */
-/* USER CODE END */
- return (mibspi->INTFLGRDY >> group) & 1;
-}
-
-
-/** @fn void mibspiEnableLoopback(mibspiBASE_t *mibspi, Loopbacktype_t Loopbacktype)
-* @brief Enable Loopback mode for self test
-* @param[in] mibspi - Mibspi module base address
-* @param[in] Loopbacktype - Digital or Analog
-*
-* This function enables the Loopback mode for self test.
-*/
-void mibspiEnableLoopback(mibspiBASE_t *mibspi, Loopbacktype_t Loopbacktype)
-{
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- /* Clear Loopback incase enbaled already */
- mibspi->IOLPKTSTCR = 0;
-
- /* Enable Loopback either in Analog or Digital Mode */
- mibspi->IOLPKTSTCR = 0x00000A00
- | Loopbacktype << 1;
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-}
-
-/** @fn void mibspiDisableLoopback(mibspiBASE_t *mibspi)
-* @brief Enable Loopback mode for self test
-* @param[in] mibspi - Mibspi module base address
-*
-* This function disable the Loopback mode.
-*/
-void mibspiDisableLoopback(mibspiBASE_t *mibspi)
-{
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- /* Disable Loopback Mode */
- mibspi->IOLPKTSTCR = 0x000005000;
-
-/* USER CODE BEGIN (16) */
-/* USER CODE END */
-}
-
-
-/** @fn void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32_t group, uint32_t level)
-* @brief Enable Transfer Group interrupt
-* @param[in] mibspi - Spi module base address
-* @param[in] group - Transfer group (0..7)
-* @param[in] level - Interrupt level
-*
-* This function enables the transfer group finished interrupt.
-*/
-void mibspiEnableGroupNotification(mibspiBASE_t *mibspi, uint32_t group, uint32_t level)
-{
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-
- if (level != 0)
- {
- mibspi->SETINTLVLRDY = 1 << group;
- }
- else
- {
- mibspi->CLRINTLVLRDY = 1 << group;
- }
- mibspi->SETINTENARDY = 1 << group;
-
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-}
-
-
-/** @fn void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32_t group)
-* @brief Disable Transfer Group interrupt
-* @param[in] mibspi - Spi module base address
-* @param[in] group - Transfer group (0..7)
-*
-* This function disables the transfer group finished interrupt.
-*/
-void mibspiDisableGroupNotification(mibspiBASE_t *mibspi, uint32_t group)
-{
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-
- mibspi->CLRINTENARDY = 1 << group;
-
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-}
-
-
-
-/** @fn void mibspi5HighLevelInterrupt(void)
-* @brief Level 0 Interrupt for MIBSPI5
-*/
-#pragma INTERRUPT(mibspi5HighLevelInterrupt, IRQ)
-
-void mibspi5HighLevelInterrupt(void)
-{
- uint32_t vec = mibspiREG5->INTVECT0;
-
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-
- if (vec > 0x21U)
- {
- uint32_t flags = mibspiREG5->FLG & (~mibspiREG5->LVL & 0x035F);
- mibspiREG5->FLG = flags;
- mibspiNotification(mibspiREG5, flags);
- }
- else
- {
- mibspiGroupNotification(mibspiREG5, ((vec & 0x3FU) >> 1U) - 1U);
- }
-/* USER CODE BEGIN (30) */
-/* USER CODE END */
-}
-
-
-/** @fn void mibspi5LowLevelInterrupt(void)
-* @brief Level 1 Interrupt for MIBSPI5
-*/
-#pragma INTERRUPT(mibspi5LowLevelInterrupt, IRQ)
-
-void mibspi5LowLevelInterrupt(void)
-{
- uint32_t vec = mibspiREG5->INTVECT1;
-
-/* USER CODE BEGIN (31) */
-/* USER CODE END */
-
- if (vec > 0x21U)
- {
- uint32_t flags = mibspiREG5->FLG & (mibspiREG5->LVL & 0x035F);
- mibspiREG5->FLG = flags;
- mibspiNotification(mibspiREG5, flags);
- }
- else
- {
- mibspiGroupNotification(mibspiREG5, ((vec & 0x3FU) >> 1U) - 1U);
- }
-/* USER CODE BEGIN (32) */
-/* USER CODE END */
-}
-
+++ /dev/null
-/** @file sci.c
-* @brief SCI Driver Implementation File
-* @date 15.Mar.2012
-* @version 03.01.00
-*
-*/
-
-/* (c) Texas Instruments 2009-2012, All rights reserved. */
-
-/* USER CODE BEGIN (0) */
-/* USER CODE END */
-
-#include "sys/ti_drv_sci.h"
-
-/* USER CODE BEGIN (1) */
-//#include "cmdproc_io_tisci.h"
-//#include "os_queue.h"
-
-/* USER CODE END */
-/** @struct g_sciTransfer
-* @brief Interrupt mode globals
-*
-*/
-struct g_sciTransfer
-{
- uint32_t mode;
- uint32_t length;
- uint8_t *data;
-} g_sciTransfer[2];
-
-
-/** Buffer used for sending to SCI */
-tBuffer sciOutBuffer;
-/** Buffer used for receiving from SCI */
-tBuffer sciInBuffer;
-
-
-/** @fn void sciInit(void)
-* @brief Initializes the SCI Driver
-*
-* This function initializes the SCI module.
-*/
-void sciInit(void)
-{
-/* USER CODE BEGIN (2) */
-/* USER CODE END */
-
- /** Initialize buffers */
- sciOutBuffer.buf = xQueueCreate(MAX_BUFFER_LEN, sizeof(uint8_t));
- sciOutBuffer.mutex = xSemaphoreCreateMutex();
- sciOutBuffer.flags = 0;
- sciInBuffer.buf = xQueueCreate(MAX_BUFFER_LEN, sizeof(uint8_t));
- sciInBuffer.mutex = xSemaphoreCreateMutex();
- sciInBuffer.flags = 0;
-
- /** @b Initialize @b SCI */
-
- /** - bring SCI out of reset */
- sciREG->GCR0 = 1U;
-
- /** - Disable all interrupts */
- sciREG->CLRINT = 0xFFFFFFFFU;
- sciREG->CLRINTLVL = 0xFFFFFFFFU;
-
- /** - global control 1 */
- sciREG->GCR1 = (1 << 25) /* enable transmit */
- | (1 << 24) /* enable receive */
- | (1 << 5) /* internal clock (device has no clock pin) */
- | ((1-1) << 4) /* number of stop bits */
- | (0 << 3) /* even parity, otherwise odd */
- | (0 << 2) /* enable parity */
- | (1 << 1); /* asynchronous timing mode */
-
- /** - set baudrate */
- sciREG->BAUD = 520; /* baudrate */
-
- /** - tranmision length */
- sciREG->LENGTH = 8 - 1; /* length */
-
- /** - set SCI pins functional mode */
- sciREG->FUN = (1 << 2) /* tx pin */
- | (1 << 1) /* rx pin */
- | (0); /* clk pin */
-
- /** - set SCI pins default output value */
- sciREG->DOUT = (0 << 2) /* tx pin */
- | (0 << 1) /* rx pin */
- | (0); /* clk pin */
-
- /** - set SCI pins output direction */
- sciREG->DIR = (1 << 2) /* tx pin */
- | (0 << 1) /* rx pin */
- | (0); /* clk pin */
-
- /** - set SCI pins open drain enable */
- sciREG->ODR = (0 << 2) /* tx pin */
- | (0 << 1) /* rx pin */
- | (0); /* clk pin */
-
- /** - set SCI pins pullup/pulldown enable */
- sciREG->PD = (0 << 2) /* tx pin */
- | (0 << 1) /* rx pin */
- | (0); /* clk pin */
-
- /** - set SCI pins pullup/pulldown select */
- sciREG->PSL = (1 << 2) /* tx pin */
- | (1 << 1) /* rx pin */
- | (1); /* clk pin */
-
- /** - set interrupt level */
- sciREG->SETINTLVL = (0 << 26) /* Framing error */
- | (0 << 25) /* Overrun error */
- | (0 << 24) /* Pariry error */
- | (0 << 9) /* Receive */
- | (0 << 8) /* Transmit */
- | (0 << 1) /* Wakeup */
- | (0); /* Break detect */
-
- /** - set interrupt enable */
- sciREG->SETINT = (0 << 26) /* Framing error */
- | (0 << 25) /* Overrun error */
- | (0 << 24) /* Pariry error */
- | (1 << 9) /* Receive */
- | (0 << 1) /* Wakeup */
- | (0); /* Break detect */
-
- /** - inialise global transfer variables */
- g_sciTransfer[0].mode = 1 << 8;
- g_sciTransfer[0].length = 0;
-
- /** - Finaly start SCI */
- sciREG->GCR1 |= (1 << 7);
-
-
-/* USER CODE BEGIN (3) */
-/* USER CODE END */
-}
-
-
-/** @fn void sciSetFunctional(sciBASE_t *sci, uint32_t port)
-* @brief Change functional behavoiur of pins at runtime.
-* @param[in] sci - sci module base address
-* @param[in] port - Value to write to FUN register
-*
-* Change the value of the PCFUN register at runtime, this allows to
-* dynaimcaly change the functionality of the SCI pins between functional
-* and GIO mode.
-*/
-void sciSetFunctional(sciBASE_t *sci, uint32_t port)
-{
-/* USER CODE BEGIN (4) */
-/* USER CODE END */
-
- sci->FUN = port;
-
-/* USER CODE BEGIN (5) */
-/* USER CODE END */
-}
-
-
-/** @fn void sciSetBaudrate(sciBASE_t *sci, uint32_t baud)
-* @brief Change baudrate at runtime.
-* @param[in] sci - sci module base address
-* @param[in] baud - baudrate in Hz
-*
-* Change the SCI baudrate at runtime.
-*/
-void sciSetBaudrate(sciBASE_t *sci, uint32_t baud)
-{
- double vclk = 80.000 * 1000000.0;
- uint32_t f = sci->GCR1 & 2 ? 16 : 1;
-
-/* USER CODE BEGIN (6) */
-/* USER CODE END */
-
- sci->BAUD = ((uint32_t)((vclk /(f*baud) + 0.5)) - 1) & 0x00FFFFFF;
-
-/* USER CODE BEGIN (7) */
-/* USER CODE END */
-}
-
-
-/** @fn int sciIsTxReady(sciBASE_t *sci)
-* @brief Check if Tx buffer empty
-* @param[in] sci - sci module base address
-*
-* @return The TX ready flag
-*
-* Checks to see if the Tx buffer ready flag is set, returns
-* 0 is flags not set otherwise will return the Tx flag itself.
-*/
-int sciIsTxReady(sciBASE_t *sci)
-{
-/* USER CODE BEGIN (8) */
-/* USER CODE END */
-
- return sci->FLR & SCI_TX_INT;
-}
-
-
-/** @fn void sciSendByte(sciBASE_t *sci, uint8_t byte)
-* @brief Send Byte
-* @param[in] sci - sci module base address
-* @param[in] byte - byte to transfer
-*
-* Sends a single byte in polling mode, will wait in the
-* routine until the transmit buffer is empty before sending
-* the byte. Use sciIsTxReady to check for Tx buffer empty
-* before calling sciSendByte to avoid waiting.
-*/
-/*
-void sciSendByte(sciBASE_t *sci, uint8_t byte)
-{
- while ((sci->FLR & SCI_TX_INT) == 0) {}; // Wait
- sci->TD = byte;
-}
-*/
-
-
-/** @fn void sciSend(sciBASE_t *sci, uint32_t length, uint8_t *data)
-* @brief Send Data
-* @param[in] sci - sci module base address
-* @param[in] length - number of data words to transfer
-* @param[in] data - pointer to data to send
-*
-* Send a block of data pointed to by 'data' and 'length' bytes
-* long. If interrupts have been enabled the data is sent using
-* interrupt mode, otherwise polling mode is used. In interrupt
-* mode transmition of the first byte is started and the routine
-* returns imediatly, sciSend must not be called again until the
-* transfer is complete, when the sciNotification callback will
-* be called. In polling mode, sciSend will not return until
-* the transfer is complete.
-*
-* @note if data word is less than 8 bits, then the data must be left
-* aligned in the data byte.
-*/
-// Unused, see drv/sci.c/drv_sci_send()
-/*
-void sciSend(sciBASE_t *sci, uint32_t length, uint8_t *data)
-{
- int index = sci == sciREG ? 0 : 1;
-
- if ((g_sciTransfer[index].mode & SCI_TX_INT) != 0)
- {
- // We are in interrupt mode
- g_sciTransfer[index].length = length;
- g_sciTransfer[index].data = data;
-
- // Start transmit by sending first byte
- sci->TD = *g_sciTransfer[index].data++;
- sci->SETINT = SCI_TX_INT;
- }
- else
- {
- // Send the data
- while (length-- > 0)
- {
- while ((sci->FLR & SCI_TX_INT) == 0) {}; // Wait
- sci->TD = *data++;
- }
- }
-}
-*/
-
-/** @fn int sciIsRxReady(sciBASE_t *sci)
-* @brief Check if Rx buffer full
-* @param[in] sci - sci module base address
-*
-* @return The Rx ready flag
-*
-* Checks to see if the Rx buffer full flag is set, returns
-* 0 is flags not set otherwise will return the Rx flag itself.
-*/
-int sciIsRxReady(sciBASE_t *sci)
-{
-/* USER CODE BEGIN (13) */
-/* USER CODE END */
-
- return sci->FLR & SCI_RX_INT;
-}
-
-
-/** @fn int sciRxError(sciBASE_t *sci)
-* @brief Return Rx Error flags
-* @param[in] sci - sci module base address
-*
-* @return The Rx error flags
-*
-* Returns the Rx framing, overun and parity errors flags,
-* also clears the error flags before returning.
-*/
-int sciRxError(sciBASE_t *sci)
-{
- int status = sci->FLR & (SCI_FE_INT | SCI_OE_INT |SCI_PE_INT);
-
-/* USER CODE BEGIN (14) */
-/* USER CODE END */
-
- sci->FLR = SCI_FE_INT | SCI_OE_INT | SCI_PE_INT;
- return status;
-}
-
-
-/** @fn uint32_t sciReceiveByte(sciBASE_t *sci)
-* @brief Receive Byte
-* @param[in] sci - sci module base address
-*
-* @return Received byte
-*
-* Recieves a single byte in polling mode. If there is
-* not a byte in the receive buffer the routine will wait
-* until one is received. Use sciIsRxReady to check to
-* see if the buffer is full to avoid waiting.
-*/
-int sciReceiveByte(sciBASE_t *sci)
-{
-/* USER CODE BEGIN (15) */
-/* USER CODE END */
-
- while ((sci->FLR & SCI_RX_INT) == 0) { /* wait */ };
-
- return sci->RD;
-}
-
-
-/** @fn void sciReceive(sciBASE_t *sci, uint32_t length, uint8_t *data)
-* @brief Receive Data
-* @param[in] sci - sci module base address
-* @param[in] length - number of data words to transfer
-* @param[in] data - pointer to data buffer
-*
-* Receive a block of 'length' bytes long and place it into the
-* data buffer pointed to by 'data'. If interrupts have been
-* enabled the data is received using interrupt mode, otherwise
-* polling mode is used. In interrupt mode receive is setup and
-* the routine returns imediatly, sciReceive must not be called
-* again until the transfer is complete, when the sciNotification
-* callback will be called. In polling mode, sciReceive will not
-* return until the transfer is complete.
-*/
-void sciReceive(sciBASE_t *sci, uint32_t length, uint8_t *data)
-{
-/* USER CODE BEGIN (16) */
- // Delete generated content after user code block!!!
- if (sci->SETINT & SCI_RX_INT)
- {
- /* We are in iterrupt mode, clear error flags */
- sci->FLR = SCI_FE_INT | SCI_OE_INT | SCI_PE_INT;
-
- }
- else
- {
- while (length-- > 0)
- {
- while ((sci->FLR & SCI_RX_INT) == 0) { /* wait */ };
- *data++ = sci->RD;
- }
- }
-/* USER CODE END */
-
-
-/* USER CODE BEGIN (17) */
-/* USER CODE END */
-}
-
-/** @fn void sciEnableLoopback(sciBASE_t *sci, Loopbacktype_t Loopbacktype)
-* @brief Enable Loopback mode for self test
-* @param[in] sci - sci module base address
-* @param[in] Loopbacktype - Digital or Analog
-*
-* This function enables the Loopback mode for self test.
-*/
-void sciEnableLoopback(sciBASE_t *sci, Loopbacktype_t Loopbacktype)
-{
-/* USER CODE BEGIN (18) */
-/* USER CODE END */
-
- /* Clear Loopback incase enbaled already */
- sci->IODFTCTRL = 0;
-
- /* Enable Loopback either in Analog or Digital Mode */
- sci->IODFTCTRL = 0x00000A00
- | Loopbacktype << 1;
-
-/* USER CODE BEGIN (19) */
-/* USER CODE END */
-}
-
-/** @fn void sciDisableLoopback(sciBASE_t *sci)
-* @brief Enable Loopback mode for self test
-* @param[in] sci - sci module base address
-*
-* This function disable the Loopback mode.
-*/
-void sciDisableLoopback(sciBASE_t *sci)
-{
-/* USER CODE BEGIN (20) */
-/* USER CODE END */
-
- /* Disable Loopback Mode */
- sci->IODFTCTRL = 0x000005000;
-
-/* USER CODE BEGIN (21) */
-/* USER CODE END */
-}
-
-/** @fn sciEnableNotification(sciBASE_t *sci, uint32_t flags)
-* @brief Enable interrupts
-* @param[in] sci - sci module base address
-* @param[in] flags - Interrupts to be enabled, can be ored value of:
-* SCI_FE_INT - framming error,
-* SCI_OE_INT - overrun error,
-* SCI_PE_INT - parity error,
-* SCI_RX_INT - receive buffer ready,
-* SCI_TX_INT - transmit buffer ready,
-* SCI_WAKE_INT - wakeup,
-* SCI_BREAK_INT - break detect
-*/
-void sciEnableNotification(sciBASE_t *sci, uint32_t flags)
-{
- int index = sci == sciREG ? 0 : 1;
-
-/* USER CODE BEGIN (22) */
-/* USER CODE END */
-
- g_sciTransfer[index].mode |= (flags & SCI_TX_INT);
- sci->SETINT = (flags & ~SCI_TX_INT);
-
-/* USER CODE BEGIN (23) */
-/* USER CODE END */
-}
-
-
-/** @fn sciDisableNotification(sciBASE_t *sci, uint32_t flags)
-* @brief Disable interrupts
-* @param[in] sci - sci module base address
-* @param[in] flags - Interrupts to be disabled, can be ored value of:
-* SCI_FE_INT - framming error,
-* SCI_OE_INT - overrun error,
-* SCI_PE_INT - parity error,
-* SCI_RX_INT - receive buffer ready,
-* SCI_TX_INT - transmit buffer ready,
-* SCI_WAKE_INT - wakeup,
-* SCI_BREAK_INT - break detect
-*/
-void sciDisableNotification(sciBASE_t *sci, uint32_t flags)
-{
- int index = sci == sciREG ? 0 : 1;
-
-/* USER CODE BEGIN (24) */
-/* USER CODE END */
-
- g_sciTransfer[index].mode &= ~(flags & SCI_TX_INT);
- sci->CLRINT = (flags & ~SCI_TX_INT);
-
-/* USER CODE BEGIN (25) */
-/* USER CODE END */
-}
-
-static uint32_t receiveError;
-
-/** @fn void sciHighLevelInterrupt(void)
-* @brief Level 0 Interrupt for SCI
-*/
-#pragma INTERRUPT(sciHighLevelInterrupt, IRQ)
-
-void sciHighLevelInterrupt(void)
-{
- uint32_t vec = sciREG->INTVECT0;
-
-/* USER CODE BEGIN (26) */
- // Delete generated content after user code block!!!
- switch (vec)
- {
- case 1:
- sciNotification(sciREG, SCI_WAKE_INT);
- break;
- case 3:
- sciNotification(sciREG, SCI_PE_INT);
- break;
- case 6:
- sciNotification(sciREG, SCI_FE_INT);
- break;
- case 7:
- sciNotification(sciREG, SCI_BREAK_INT);
- break;
- case 9:
- sciNotification(sciREG, SCI_OE_INT);
- break;
-
- case 11:
- // Receive
- { uint8_t byte = sciREG->RD;
- if (xQueueSendFromISR(sciInBuffer.buf, (void*)&byte, NULL) == errQUEUE_FULL) {
- receiveError++;
- }
- sciNotification(sciREG, SCI_RX_INT);
- }
- break;
-
- case 12:
- // Transmit
- {
- uint8_t byte = 0;
- if (xQueueReceiveFromISR(sciOutBuffer.buf, (uint8_t *)&byte, NULL) == errQUEUE_EMPTY) {
- sciREG->CLRINT = SCI_TX_INT;
- sciOutBuffer.flags &= ~BUF_TRANSFER_IN_PROGRESS;
- }
- else {
- sciREG->TD = byte;
- }
- }
- break;
- default:
- // phantom interrupt, clear flags and return
- sciREG->FLR = ~sciREG->SETINTLVL & 0x07000303;
- break;
- }
-/* USER CODE END */
-/* USER CODE BEGIN (27) */
-/* USER CODE END */
-}
-
-/** @fn void sciLowLevelInterrupt(void)
-* @brief Level 1 Interrupt for SCI
-*/
-#pragma INTERRUPT(sciLowLevelInterrupt, IRQ)
-
-void sciLowLevelInterrupt(void)
-{
- uint32_t vec = sciREG->INTVECT1;
-
-/* USER CODE BEGIN (28) */
-/* USER CODE END */
-
- switch (vec)
- {
- case 1:
- sciNotification(sciREG, SCI_WAKE_INT);
- break;
- case 3:
- sciNotification(sciREG, SCI_PE_INT);
- break;
- case 6:
- sciNotification(sciREG, SCI_FE_INT);
- break;
- case 7:
- sciNotification(sciREG, SCI_BREAK_INT);
- break;
- case 9:
- sciNotification(sciREG, SCI_OE_INT);
- break;
-
- case 11:
- /* receive */
- { uint32_t byte = sciREG->RD;
-
- if (g_sciTransfer[0].length > 0)
- {
- *g_sciTransfer[0].data++ = byte;
- g_sciTransfer[0].length--;
- if (g_sciTransfer[0].length == 0)
- {
- sciNotification(sciREG, SCI_RX_INT);
- }
- }
- }
- break;
-
- case 12:
- /* transmit */
- if (--g_sciTransfer[0].length > 0)
- {
- sciREG->TD = *g_sciTransfer[0].data++;
- }
- else
- {
- sciREG->CLRINT = SCI_TX_INT;
- sciNotification(sciREG, SCI_TX_INT);
- }
- break;
-
- default:
- /* phantom interrupt, clear flags and return */
- sciREG->FLR = sciREG->SETINTLVL & 0x07000303;
- break;
- }
-/* USER CODE BEGIN (29) */
-/* USER CODE END */
-}
-
-
-
projects / pes-rpp / rpp-test-sw.git / commitdiff