+
+static inline
+void i82527_irq_update_filter(struct chip_t *chip, struct msgobj_t *obj)
+{
+ struct canfilt_t filt;
+ unsigned long id;
+
+ if(canqueue_ends_filt_conjuction(obj->qends, &filt)) {
+ canobj_write_reg(chip,obj,(MVAL_RES|TXIE_RES|RXIE_RES|INTPD_RES),iMSGCTL0);
+ if(obj->object == 15) {
+ i82527_message15_mask(chip,filt.id,filt.mask);
+ }
+ if (filt.flags&MSG_EXT) {
+ id=filt.id<<3;
+ canobj_write_reg(chip,obj,id,iMSGID3);
+ canobj_write_reg(chip,obj,id>>8,iMSGID2);
+ canobj_write_reg(chip,obj,id>>16,iMSGID1);
+ canobj_write_reg(chip,obj,id>>24,iMSGID0);
+ canobj_write_reg(chip,obj,MCFG_XTD,iMSGCFG);
+ }
+ else {
+ id=filt.id<<5;
+ canobj_write_reg(chip,obj,id,iMSGID1);
+ canobj_write_reg(chip,obj,id>>8,iMSGID0);
+ canobj_write_reg(chip,obj,0x00,iMSGCFG);
+ }
+
+ canobj_write_reg(chip,obj,(NEWD_RES|MLST_RES|TXRQ_RES|RMPD_RES), iMSGCTL1);
+ canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
+
+ CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",obj->obj_base_addr);
+
+ }
+}
+
+
+void i82527_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
+{
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
+
+ if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
+ if(canobj_read_reg(chip,obj,iMSGCTL1)&TXRQ_RES)
+ i82527_irq_write_handler(chip, obj);
+ }
+
+ if(!obj->tx_slot) {
+ if(can_msgobj_test_and_clear_fl(obj,FILTCH_REQUEST)) {
+ i82527_irq_update_filter(chip, obj);
+ }
+ }
+
+ can_msgobj_clear_fl(obj,TX_LOCK);
+ if(can_msgobj_test_fl(obj,TX_REQUEST))
+ continue;
+ if(can_msgobj_test_fl(obj,FILTCH_REQUEST) && !obj->tx_slot)
+ continue;
+ break;
+ }
+}
+