2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.2 9 Jul 2003
11 #include "./constants.h"
12 #include "./can_sysdep.h"
13 #include "./can_queue.h"
14 #include "lincan_config.h"
17 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "can.o (debug): " fmt,\
20 #define DEBUGMSG(fmt,args...)
23 #define CANMSG(fmt,args...) can_printk(KERN_ERR "can.o: " fmt,##args)
26 extern can_spinlock_t canuser_manipulation_lock;
29 * struct canhardware_t - structure representing pointers to all CAN boards
30 * @nr_boards: number of present boards
31 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
32 * @rtr_lock: locking for RTR queue
33 * @candevice: array of pointers to CAN devices/boards
35 struct canhardware_t {
37 struct rtr_id *rtr_queue;
38 can_spinlock_t rtr_lock;
39 struct candevice_t *candevice[MAX_HW_CARDS];
43 * struct candevice_t - CAN device/board structure
44 * @hwname: text string with board type
45 * @candev_idx: board index in canhardware_t.candevice[]
46 * @io_addr: IO/physical MEM address
47 * @res_addr: optional reset register port
48 * @dev_base_addr: CPU translated IO/virtual MEM address
49 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
50 * can be programmed into board
51 * @nr_all_chips: number of chips present on the board
52 * @nr_82527_chips: number of Intel 8257 chips
53 * @nr_sja1000_chips: number of Philips SJA100 chips
54 * @chip: array of pointers to the chip structures
55 * @hwspecops: pointer to board specific operations
56 * @hosthardware_p: pointer to the root hardware structure
57 * @sysdevptr: union reserved for pointer to bus specific
58 * device structure (case @pcidev is used for PCI devices)
60 * The structure represent configuration and state of associated board.
61 * The driver infrastructure prepares this structure and calls
62 * board type specific board_register() function. The board support provided
63 * register function fills right function pointers in @hwspecops structure.
64 * Then driver setup calls functions init_hw_data(), init_chip_data(),
65 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
66 * and init_chip_data() have to specify number and types of connected chips
67 * or objects respectively.
68 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
69 * and @nr_sja1000_chips in the board non-specific functions.
70 * The @io_addr and @dev_base_addr is filled from module parameters
71 * to the same value. The request_io function can fix-up @dev_base_addr
72 * field if virtual address is different than bus address.
75 char *hwname; /* text board type */
76 int candev_idx; /* board index in canhardware_t.candevice[] */
77 unsigned long io_addr; /* IO/physical MEM address */
78 unsigned long res_addr; /* optional seset register port */
79 unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */
84 struct chip_t *chip[MAX_HW_CHIPS];
86 struct hwspecops_t *hwspecops;
88 struct canhardware_t *hosthardware_p;
91 #ifdef CAN_ENABLE_PCI_SUPPORT
92 struct pci_dev *pcidev;
93 #endif /*CAN_ENABLE_PCI_SUPPORT*/
99 * struct chip_t - CAN chip state and type information
100 * @chip_type: text string describing chip type
101 * @chip_idx: index of the chip in candevice_t.chip[] array
102 * @chip_irq: chip interrupt number if any
103 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
104 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
105 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
106 * @clock: chip base clock frequency in Hz
107 * @baudrate: selected chip baudrate in Hz
108 * @write_register: write chip register function copy -
109 * @read_register: read chip register function copy
110 * @sja_cdr_reg: SJA specific register -
111 * holds hardware specific options for the Clock Divider
112 * register. Options defined in the sja1000.h file:
113 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
114 * @sja_ocr_reg: SJA specific register -
115 * hold hardware specific options for the Output Control
116 * register. Options defined in the sja1000.h file:
117 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
118 * %OCR_TX0_LH, %OCR_TX1_ZZ.
119 * @int_cpu_reg: Intel specific register -
120 * holds hardware specific options for the CPU Interface
121 * register. Options defined in the i82527.h file:
122 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
123 * @int_clk_reg: Intel specific register -
124 * holds hardware specific options for the Clock Out
125 * register. Options defined in the i82527.h file:
126 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
127 * @int_bus_reg: Intel specific register -
128 * holds hardware specific options for the Bus Configuration
129 * register. Options defined in the i82527.h file:
130 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
131 * @msgobj: array of pointers to individual communication objects
132 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
133 * @hostdevice: pointer to chip hosting board
134 * @max_objects: maximal number of communication objects connected to this chip
135 * @chip_lock: reserved for synchronization of the chip supporting routines
136 * (not used in the current driver version)
137 * @worker_thread: chip worker thread ID (RT-Linux specific field)
138 * @pend_flags: holds information about pending interrupt and tx_wake() operations
139 * (RT-Linux specific field). Masks values:
140 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
141 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
142 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
143 * for some of above reasons
145 * The fields @write_register and @read_register are copied from
146 * corresponding fields from @hwspecops structure
147 * (chip->hostdevice->hwspecops->write_register and
148 * chip->hostdevice->hwspecops->read_register)
149 * to speedup can_write_reg() and can_read_reg() functions.
153 int chip_idx; /* chip index in candevice_t.chip[] */
155 unsigned long chip_base_addr;
157 long clock; /* Chip clock in Hz */
160 void (*write_register)(unsigned char data,unsigned long address);
161 unsigned (*read_register)(unsigned long address);
163 unsigned short sja_cdr_reg; /* sja1000 only! */
164 unsigned short sja_ocr_reg; /* sja1000 only! */
165 unsigned short int_cpu_reg; /* intel 82527 only! */
166 unsigned short int_clk_reg; /* intel 82527 only! */
167 unsigned short int_bus_reg; /* intel 82527 only! */
169 struct msgobj_t *msgobj[MAX_MSGOBJS];
171 struct chipspecops_t *chipspecops;
173 struct candevice_t *hostdevice;
175 int max_objects; /* 1 for sja1000, 15 for i82527 */
177 can_spinlock_t chip_lock;
180 pthread_t worker_thread;
181 unsigned long pend_flags;
182 #endif /*CAN_WITH_RTL*/
186 * struct msgobj_t - structure holding communication object state
188 * @minor: associated device minor number
189 * @object: object number in chip_t structure +1
190 * @flags: message object flags
191 * @ret: field holding status of the last Tx operation
192 * @qends: pointer to message object corresponding ends structure
193 * @tx_qedge: edge corresponding to transmitted message
194 * @tx_slot: slot holding transmitted message, slot is taken from
195 * canque_test_outslot() call and is freed by canque_free_outslot()
196 * or rescheduled canque_again_outslot()
197 * @tx_retry_cnt: transmission attempt counter
198 * @tx_timeout: can be used by chip driver to check for the transmission timeout
199 * @rx_msg: temporary storage to hold received messages before
200 * calling to canque_filter_msg2edges()
201 * @hostchip: pointer to the &chip_t structure this object belongs to
202 * @obj_used: counter of users (associated file structures for Linux
203 * userspace clients) of this object
204 * @obj_users: list of user structures of type &canuser_t.
205 * @obj_flags: message object specific flags. Masks values:
206 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
207 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
208 * is running inside TX activation processing code
211 unsigned long obj_base_addr;
212 unsigned int minor; /* associated device minor number */
213 unsigned int object; /* object number in chip_t +1 for debug printk */
214 unsigned long obj_flags;
217 struct canque_ends_t *qends;
219 struct canque_edge_t *tx_qedge;
220 struct canque_slot_t *tx_slot;
222 struct timer_list tx_timeout;
224 struct canmsg_t rx_msg;
226 struct chip_t *hostchip;
229 struct list_head obj_users;
232 #define CAN_USER_MAGIC 0x05402033
235 * struct canuser_t - structure holding CAN user/client state
236 * @flags: used to distinguish Linux/RT-Linux type
237 * @peers: for connection into list of object users
238 * @qends: pointer to the ends structure corresponding for this user
239 * @msgobj: communication object the user is connected to
240 * @rx_edge0: default receive queue for filter IOCTL
241 * @userinfo: stores user context specific information.
242 * The field @fileinfo.file holds pointer to open device file state structure
243 * for the Linux user-space client applications
244 * @magic: magic number to check consistency when pointer is retrieved
245 * from file private field
249 struct list_head peers;
250 struct canque_ends_t *qends;
251 struct msgobj_t *msgobj;
252 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
255 struct file *file; /* back ptr to file */
259 struct rtl_file *file;
261 #endif /*CAN_WITH_RTL*/
267 * struct hwspecops_t - hardware/board specific operations
268 * @request_io: reserve io or memory range for can board
269 * @release_io: free reserved io memory range
270 * @reset: hardware reset routine
271 * @init_hw_data: called to initialize &candevice_t structure, mainly
272 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
274 * @init_chip_data: called initialize each &chip_t structure, mainly
275 * @chip_type, @chip_base_addr, @clock and chip specific registers.
276 * It is responsible to setup &chip_t->@chipspecops functions
277 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
278 * @init_obj_data: called initialize each &msgobj_t structure,
279 * mainly @obj_base_addr field.
280 * @program_irq: program interrupt generation hardware of the board
281 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
282 * @write_register: low level write register routine
283 * @read_register: low level read register routine
286 int (*request_io)(struct candevice_t *candev);
287 int (*release_io)(struct candevice_t *candev);
288 int (*reset)(struct candevice_t *candev);
289 int (*init_hw_data)(struct candevice_t *candev);
290 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
291 int (*init_obj_data)(struct chip_t *chip, int objnr);
292 int (*program_irq)(struct candevice_t *candev);
293 void (*write_register)(unsigned char data,unsigned long address);
294 unsigned (*read_register)(unsigned long address);
298 * struct chipspecops_t - can controller chip specific operations
299 * @chip_config: CAN chip configuration
300 * @baud_rate: set communication parameters
301 * @standard_mask: setup of mask for message filtering
302 * @extended_mask: setup of extended mask for message filtering
303 * @message15_mask: set mask of i82527 message object 15
304 * @clear_objects: clears state of all message object residing in chip
305 * @config_irqs: tunes chip hardware interrupt delivery
306 * @pre_read_config: prepares message object for message reception
307 * @pre_write_config: prepares message object for message transmission
308 * @send_msg: initiate message transmission
309 * @remote_request: configures message object and asks for RTR message
310 * @check_tx_stat: checks state of transmission engine
311 * @wakeup_tx: wakeup TX processing
313 * @enable_configuration: enable chip configuration mode
314 * @disable_configuration: disable chip configuration mode
315 * @set_btregs: configures bitrate registers
316 * @start_chip: starts chip message processing
317 * @stop_chip: stops chip message processing
318 * @irq_handler: interrupt service routine
320 struct chipspecops_t {
321 int (*chip_config)(struct chip_t *chip);
322 int (*baud_rate)(struct chip_t *chip, int rate, int clock, int sjw,
323 int sampl_pt, int flags);
324 int (*standard_mask)(struct chip_t *chip, unsigned short code,
325 unsigned short mask);
326 int (*extended_mask)(struct chip_t *chip, unsigned long code,
328 int (*message15_mask)(struct chip_t *chip, unsigned long code,
330 int (*clear_objects)(struct chip_t *chip);
331 int (*config_irqs)(struct chip_t *chip, short irqs);
332 int (*pre_read_config)(struct chip_t *chip, struct msgobj_t *obj);
333 int (*pre_write_config)(struct chip_t *chip, struct msgobj_t *obj,
334 struct canmsg_t *msg);
335 int (*send_msg)(struct chip_t *chip, struct msgobj_t *obj,
336 struct canmsg_t *msg);
337 int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj);
338 int (*check_tx_stat)(struct chip_t *chip);
339 int (*wakeup_tx)(struct chip_t *chip, struct msgobj_t *obj);
340 int (*filtch_rq)(struct chip_t *chip, struct msgobj_t *obj);
341 int (*enable_configuration)(struct chip_t *chip);
342 int (*disable_configuration)(struct chip_t *chip);
343 int (*set_btregs)(struct chip_t *chip, unsigned short btr0,
344 unsigned short btr1);
345 int (*start_chip)(struct chip_t *chip);
346 int (*stop_chip)(struct chip_t *chip);
347 can_irqreturn_t (*irq_handler)(int irq, void *dev_id, struct pt_regs *regs);
352 struct mem_addr *next;
356 /* Structure for the RTR queue */
359 struct canmsg_t *rtr_message;
360 wait_queue_head_t rtr_wq;
365 extern int minor[MAX_TOT_CHIPS];
367 extern int baudrate[MAX_TOT_CHIPS];
368 extern char *hw[MAX_HW_CARDS];
369 extern int irq[MAX_IRQ];
370 extern unsigned long io[MAX_HW_CARDS];
371 extern int processlocal;
373 extern struct canhardware_t *hardware_p;
374 extern struct chip_t *chips_p[MAX_TOT_CHIPS];
375 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
377 extern struct mem_addr *mem_head;
380 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
381 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
383 outb(data, chip->chip_base_addr+address);
385 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
387 return inb(chip->chip_base_addr+address);
389 extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
390 unsigned char data, unsigned address)
392 outb(data, obj->obj_base_addr+address);
394 extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
397 return inb(obj->obj_base_addr+address);
400 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
401 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
403 writeb(data, chip->chip_base_addr+address);
405 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
407 return readb(chip->chip_base_addr+address);
409 extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
410 unsigned char data, unsigned address)
412 writeb(data, obj->obj_base_addr+address);
414 extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
417 return readb(obj->obj_base_addr+address);
420 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
421 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
422 #define CONFIG_OC_LINCAN_DYNAMICIO
425 /* Inline function to write to the hardware registers. The argument address is
426 * relative to the memory map of the chip and not the absolute memory address.
428 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned address)
430 unsigned long address_to_write;
431 address_to_write = chip->chip_base_addr+address;
432 chip->write_register(data, address_to_write);
435 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned address)
437 unsigned long address_to_read;
438 address_to_read = chip->chip_base_addr+address;
439 return chip->read_register(address_to_read);
442 extern inline void canobj_write_reg(const struct chip_t *chip, const struct msgobj_t *obj,
443 unsigned char data, unsigned address)
445 unsigned long address_to_write;
446 address_to_write = obj->obj_base_addr+address;
447 chip->write_register(data, address_to_write);
450 extern inline unsigned canobj_read_reg(const struct chip_t *chip, const struct msgobj_t *obj,
453 unsigned long address_to_read;
454 address_to_read = obj->obj_base_addr+address;
455 return chip->read_register(address_to_read);
458 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
460 int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base);
461 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
462 void can_release_io_region(unsigned long start, unsigned long n);
463 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
464 void can_release_mem_region(unsigned long start, unsigned long n);
467 const char *boardtype;
468 int (*board_register)(struct hwspecops_t *hwspecops);
472 const struct boardtype_t* boardtype_find(const char *str);
475 extern int can_rtl_priority;
476 #endif /*CAN_WITH_RTL*/