]> rtime.felk.cvut.cz Git - jailhouse.git/log
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7 years agocore: panic_stop: print current cell only if it has been set
Antonios Motakis [Fri, 17 Jun 2016 12:37:30 +0000 (14:37 +0200)]
core: panic_stop: print current cell only if it has been set

Currently during a panic, panic_stop will print the current cell
on the CPU where the panic occurred. However, if the hypervisor
panics sufficiently early during initialization, we may end up in
a situation where the root cell has not been initialized. This can
easily cause a trap loop, making the panic output less useful.

Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agocore: make phys_processor_id() return unsigned long
Antonios Motakis [Fri, 17 Jun 2016 14:38:41 +0000 (16:38 +0200)]
core: make phys_processor_id() return unsigned long

32 bits ought not be enough for anybody.

Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agodriver: sync I-cache, D-cache and memory
Dmitry Voytik [Fri, 17 Jun 2016 12:37:29 +0000 (14:37 +0200)]
driver: sync I-cache, D-cache and memory

Syncronize I-cache with D-cache after loading the hypervisor
image or a cell image. This must be done in arm64 according to
ARMv8 ARM spec. See page 1712, D3.4.6 "Non-cacheable accesses
and instruction caches".

This patch fixes coherency problems observed on real HW targets.
On x86 this operation is a NOP.

Signed-off-by: Dmitry Voytik <dmitry.voytik@huawei.com>
Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
[antonios.motakis@huawei.com: edited comments]

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agodriver: ioremap the hypervisor firmware to any kernel address
Antonios Motakis [Fri, 17 Jun 2016 12:37:29 +0000 (14:37 +0200)]
driver: ioremap the hypervisor firmware to any kernel address

At the moment the Linux driver maps the Jailhouse binary to
JAILHOUSE_BASE. The underlying assumption is that Linux may map the
firmware (in the Linux kernel space), to the same virtual address it
has been built to run from.

This assumption is unworkable on ARMv8 processors running in AArch64
mode. Kernel memory is allocated in a high address region, that is
not addressable from EL2, where the hypervisor will run from.

This patch removes the assumption, by introducing the
JAILHOUSE_BORROW_ROOT_PT define, which signals the behavior of the
current architectures.

We also turn the entry point in the header, into an offset from the
Jailhouse load address, so we can enter the image regardless of
where it  will be mapped.

Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoci: Update CA certificates to unbreak Coverity build
Jan Kiszka [Thu, 23 Jun 2016 07:08:31 +0000 (09:08 +0200)]
ci: Update CA certificates to unbreak Coverity build

See https://github.com/travis-ci/docs-travis-ci-com/pull/617

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Fix byte-wise write access to GICD_ITARGETSRn
Jan Kiszka [Thu, 23 Jun 2016 06:31:02 +0000 (08:31 +0200)]
arm: Fix byte-wise write access to GICD_ITARGETSRn

While expanding byte accesses to full words, we forgot to adjust the
address as well. This led to unaligned word accesses on writes, followed
by hypervisor aborts.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agogitignore: Remove user-specific rules
Jan Kiszka [Sun, 19 Jun 2016 18:54:59 +0000 (20:54 +0200)]
gitignore: Remove user-specific rules

A project's .gitignore should be about project-specific rules, shared by
everyone compiling it. So, instead of adding more and more rules for
user-specific editors or tools, remove them completely and no longer
accept new ones. Users can easily define local rules, see gitignore man
page.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoEnforce zero warnings
Jan Kiszka [Sat, 18 Jun 2016 10:18:58 +0000 (12:18 +0200)]
Enforce zero warnings

Break the build in case of warnings. Can still be temporarily
overwritten by appending EXTRA_CFLAGS=-Wno-error to a build.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agotools: Include EXTRA_CFLAGS into build
Jan Kiszka [Sat, 18 Jun 2016 10:03:14 +0000 (12:03 +0200)]
tools: Include EXTRA_CFLAGS into build

This allows to pass in additional flags or override existing ones, just
like it is already possible for the parts under Kbuild control.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Consolidate gic_irqchip to irqchip
Jan Kiszka [Thu, 16 Jun 2016 09:24:13 +0000 (11:24 +0200)]
arm: Consolidate gic_irqchip to irqchip

Likely, we will never support alternative irqchips to the GIC (only
cascaded ones). So this copying-over is not required.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Reject unknown GIC versions
Jan Kiszka [Thu, 16 Jun 2016 09:20:37 +0000 (11:20 +0200)]
arm: Reject unknown GIC versions

We would likely crash anyway due to irqchip containing only NULL
pointers.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Make cpu_init and cpu_reset callbacks mandatory
Jan Kiszka [Thu, 16 Jun 2016 09:15:03 +0000 (11:15 +0200)]
arm: Make cpu_init and cpu_reset callbacks mandatory

No need for checking them to be NULL, we need them in both
implementations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Protect hypervisor used SGIs and PPIs from cell changes
Jan Kiszka [Thu, 16 Jun 2016 16:28:56 +0000 (18:28 +0200)]
arm: Protect hypervisor used SGIs and PPIs from cell changes

We must not allow the cells to manipulate distributor registers or
register bits related to the hypervisor SGIs or the maintenance
interrupt.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Enable / disable maintenance interrupt in distributor
Jan Kiszka [Thu, 16 Jun 2016 16:25:58 +0000 (18:25 +0200)]
arm: Enable / disable maintenance interrupt in distributor

We did not get any maintenance interrupts so far because we didn't
enable the source in the distributor so far. Fix this, but also disable
it again when shutting down.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Enable maintenance interrupt also from irqchip_set_pending
Jan Kiszka [Thu, 16 Jun 2016 14:28:19 +0000 (16:28 +0200)]
arm: Enable maintenance interrupt also from irqchip_set_pending

In case we set an interrupt pending for the local CPU and cannot queue
it with the hardware, make sure the maintenance interrupt is on.
Otherwise, we risk to delay guest interrupts or cause the guest to get
stuck.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove try_inject parameter from irqchip_set_pending
Jan Kiszka [Thu, 16 Jun 2016 14:22:49 +0000 (16:22 +0200)]
arm: Remove try_inject parameter from irqchip_set_pending

We can only perform injection (and we also always want to) if target
CPU equals caller CPU, and this is better checked inside the function.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Convert software queue of pending interrupts into a ring
Jan Kiszka [Thu, 16 Jun 2016 09:07:46 +0000 (11:07 +0200)]
arm: Convert software queue of pending interrupts into a ring

This massively simplifies the code and reduces the memory usage in
struct per_cpu. However, adding interrupt priorities later on may
require another rework.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Make sure to not queue interrupt that were rejected as duplicates
Jan Kiszka [Thu, 16 Jun 2016 08:33:33 +0000 (10:33 +0200)]
arm: Make sure to not queue interrupt that were rejected as duplicates

If the inject_irq callback detect that an interrupt is already queued
in some list register, do not insert it into the software queue, thus
coalesce the event like real hardware does.

The change in the return code of inject_irq is more cosmetic, to reflect
the meaning better.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Disable maintenance interrupt on successful injection
Jan Kiszka [Tue, 14 Jun 2016 05:30:09 +0000 (07:30 +0200)]
arm: Disable maintenance interrupt on successful injection

We enable the maintenance interrupt when all list registers are in use.
However, there was no disabling of it again. Apparently, it rarely
triggered in the field, otherwise we would have seen a lot of
maintenance interrupt storms, thus locked-up systems.

This introduces another callback to enable or disable the maintenance
interrupt. It is now controlled by irqchip_inject_pending, the function
that is also called when handling a maintenance interrupt.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove unused return code of irqchip_set_pending
Jan Kiszka [Thu, 16 Jun 2016 08:30:49 +0000 (10:30 +0200)]
arm: Remove unused return code of irqchip_set_pending

No caller evaluated it so far, and none of them has a use case for it.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove return code from irqchip_inject_pending
Jan Kiszka [Thu, 16 Jun 2016 10:19:57 +0000 (12:19 +0200)]
arm: Remove return code from irqchip_inject_pending

It's always 0.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove irq field from pending_irq
Jan Kiszka [Mon, 13 Jun 2016 17:17:10 +0000 (19:17 +0200)]
arm: Remove irq field from pending_irq

Always identical to virt_id.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove cpuid from pending_irq
Jan Kiszka [Mon, 13 Jun 2016 17:13:42 +0000 (19:13 +0200)]
arm: Remove cpuid from pending_irq

Was always set to 0.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove hw flag from pending_irq
Jan Kiszka [Mon, 13 Jun 2016 17:10:37 +0000 (19:10 +0200)]
arm: Remove hw flag from pending_irq

Can be derived from virt_id.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove maintenance flag from pending_irq.type.sgi
Jan Kiszka [Mon, 13 Jun 2016 17:07:36 +0000 (19:07 +0200)]
arm: Remove maintenance flag from pending_irq.type.sgi

It was always cleared.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove write-only priority field from pending_irq
Jan Kiszka [Mon, 13 Jun 2016 17:00:04 +0000 (19:00 +0200)]
arm: Remove write-only priority field from pending_irq

We do not support interrupt priorities so far, and we may have to model
them differently into queues once we do. Remove the de facto unused
field.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Un-inline spi_in_cell
Jan Kiszka [Sat, 11 Jun 2016 17:35:52 +0000 (19:35 +0200)]
arm: Un-inline spi_in_cell

To big to be inlined, and we also want to avoid dereferencing struct
cell in the header due to upcoming include reordering.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Remove unneeded include from irqchip.h
Jan Kiszka [Sat, 11 Jun 2016 17:22:03 +0000 (19:22 +0200)]
arm: Remove unneeded include from irqchip.h

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Fix build warning in gic-v3
Jan Kiszka [Tue, 14 Jun 2016 05:28:16 +0000 (07:28 +0200)]
arm: Fix build warning in gic-v3

Leftover from the mmio_perform_access refactoring.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Add missing printk.h include
Jan Kiszka [Tue, 14 Jun 2016 05:26:33 +0000 (07:26 +0200)]
arm: Add missing printk.h include

Some implicit inclusion disappeared.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoarm: Use asm-defines.h for struct per_cpu members
Jan Kiszka [Mon, 13 Jun 2016 09:47:22 +0000 (11:47 +0200)]
arm: Use asm-defines.h for struct per_cpu members

Port the logic over from x86 and also drop CHECK_ASSUMPTION here.

The only slightly ugly detail: the PERCPU_SIZE_SHIFT define is now
duplicated in both asm/percpu.h instances because there is no good
generic header yet to hold it. Can be cleaned up later on.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoDocumentation: Rewrap Banana Pi README to 80 chars
Jan Kiszka [Wed, 15 Jun 2016 17:27:36 +0000 (19:27 +0200)]
Documentation: Rewrap Banana Pi README to 80 chars

For better readability in the absence of a markdown viewer.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoDocumentation: More BananaPi documentation
cyng93 [Sat, 11 Jun 2016 00:40:46 +0000 (08:40 +0800)]
Documentation: More BananaPi documentation

This patch include more details about how to setup Jailhouse on a BananaPi-M1 board.

Basically this documentation covered:
1. Installation of Bananian(BananaPi offical OS) on BananaPi
2. Modifying U-boot configuration on BananaPi to run Jailhouse.
3. Update Bananian to newer kernel so Jailhouse could works.
    - Compiling Kernel.
    - Installing Kernel.
4. Installing Jailhouse on BananaPi.
5. Simple demo/test: Running Jailhouse with Freertos-cell on BananaPi.

Signed-off-by: CHING-YI NG <cyng93@gmail.com>
[Jan: removed external media link showing FUSE selection - not needed]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoDocumentation: Move BananaPi-related docs out
cyng93 [Sat, 11 Jun 2016 00:40:45 +0000 (08:40 +0800)]
Documentation: Move BananaPi-related docs out

This patch move BananaPi-related documentation out from `README.md` to
`Documentation/setup-on-banana-pi-arm-board.md`

Signed-off-by: CHING-YI NG <cyng93@gmail.com>
[Jan: removed some blank lines from README.md]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agox86: Add missing include to amd_iommu.h
Jan Kiszka [Sat, 11 Jun 2016 17:00:13 +0000 (19:00 +0200)]
x86: Add missing include to amd_iommu.h

Reported by header-check script: We need this in the header due to the
use of struct jailhouse_memory. Consequently, we can remove the include
from the corresponding amd_iommu.c.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agotools: simplify python statement
Ralf Ramsauer [Fri, 3 Jun 2016 19:41:20 +0000 (21:41 +0200)]
tools: simplify python statement

Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoinmates/lib: cmdline.c
Xuguo Wang [Tue, 31 May 2016 03:44:16 +0000 (11:44 +0800)]
inmates/lib: cmdline.c

There is no point in checking for *p == 0 in the while loop,
after over the blanks, then checking for the parameters, if
find, return true, otherwise continue check the parameters,
if to the end of the cmdline, return false.

Signed-off-by: Xuguo Wang <huddy1985@gmail.com>
[Jan: also removed curly braces]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agotools: fix missing hardware-check after make install
Georg Schiesser [Fri, 20 May 2016 18:07:06 +0000 (20:07 +0200)]
tools: fix missing hardware-check after make install

Add the new hardware-check script to the HELPERS, such that
"make install" will install it properly, just like the other
scripts, into: $DESTDIR/usr/local/libexec/jailhouse/

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoTODO: Add item for config generator refactoring
Jan Kiszka [Fri, 20 May 2016 08:29:14 +0000 (10:29 +0200)]
TODO: Add item for config generator refactoring

Based on http://thread.gmane.org/gmane.linux.jailhouse/4893.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agox86: Make SMI filter feature test of AMD IOMMU stricter
Jan Kiszka [Fri, 20 May 2016 08:27:12 +0000 (10:27 +0200)]
x86: Make SMI filter feature test of AMD IOMMU stricter

The only valid value of SmiFSup we are aware of is 01b.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agotools: Add hardware feature check
Jan Kiszka [Wed, 18 May 2016 23:17:13 +0000 (01:17 +0200)]
tools: Add hardware feature check

The hypervisor itself is not very helpful when it comes to analyzing
feature deficits of the target platform. This adds another extension
script to the jailhouse command which checks the hardware using the
same key criteria that also the hypervisor applied.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
7 years agoREADME: Update and improve the configuration section
Jan Kiszka [Fri, 20 May 2016 08:26:11 +0000 (10:26 +0200)]
README: Update and improve the configuration section

We actually neglected to mention the config generator - fix this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoREADME: Update Banana Pi documentation
Jan Kiszka [Mon, 16 May 2016 17:56:55 +0000 (19:56 +0200)]
README: Update Banana Pi documentation

Add a note about the simple framebuffer pitfall that more recent U-Boot
versions create via CONFIG_VIDEO. Drop references to snapshot versions.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoREADME: Remove superfluous CPU features from QEMU command line
Jan Kiszka [Sun, 15 May 2016 15:09:36 +0000 (17:09 +0200)]
README: Remove superfluous CPU features from QEMU command line

On Intel, x2apic is set via the CPU type. On AMD, "host" pulls in svm,
and x2apic only generates warnings with latest QEMU.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoREADME: Add drive format property to QEMU command line
Jan Kiszka [Sat, 14 May 2016 06:33:37 +0000 (08:33 +0200)]
README: Add drive format property to QEMU command line

Newer QEMU versions complain about missing format property, possibly
reject such configurations eventually.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoconfigs, core, tools: Remove device_limit field from system configuration
Jan Kiszka [Thu, 12 May 2016 07:20:11 +0000 (09:20 +0200)]
configs, core, tools: Remove device_limit field from system configuration

Once introduced for AMD IOMMUs, we actually do not need it as device
table segmentation saves us in practice from allocating large tables.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agotools: fix gcc sign-compare warnings
Georg Schiesser [Tue, 10 May 2016 21:40:10 +0000 (23:40 +0200)]
tools: fix gcc sign-compare warnings

Cosmetic change to avoid multiple gcc sign-compare warnings between
signed int argc and unsigned int arg_num, both being small and
non-negative. Alternatively, we could use unsigned int argc or
disable the warning with gcc -Wno-sign-compare.

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
[Jan: reordered lines for visual pleasure]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agotools: enable additional compiler warnings
Georg Schiesser [Tue, 10 May 2016 21:39:55 +0000 (23:39 +0200)]
tools: enable additional compiler warnings

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoconfigs: fixed typo in e1000-demo pio_bitmap
Georg Schiesser [Tue, 10 May 2016 21:39:42 +0000 (23:39 +0200)]
configs: fixed typo in e1000-demo pio_bitmap

The pio_bitmap initialization incorrectly assigns overlapping ranges to
different values, similar to commit 886ca63f.  As Jan pointed out:
"Fortunately, it was harmless because succeeding initializations
overwrote this exceeding one."

see also: https://gcc.gnu.org/onlinedocs/gcc/Designated-Inits.html

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoconfigs: enable additional compiler warnings
Georg Schiesser [Tue, 10 May 2016 21:39:26 +0000 (23:39 +0200)]
configs: enable additional compiler warnings

Make it easier to spot configuration problems like commit 886ca63f.
gcc -Wextra includes -Woverride-init, which will print warnings like:

qemu-vm.c:190:3: warning: initialized field overwritten [-Woverride-init]
   [  0x78/8 ...   0x7f/7] = -1,
   [  0x80/8 ...   0x87/8] = 0xfe, /* Linux: native_io_delay() */
   ^
qemu-vm.c:190:3: warning: (near initialization for 'config.pio_bitmap[16]')

see also: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agogitignore: VIM backup and undo files
Georg Schiesser [Tue, 10 May 2016 21:38:59 +0000 (23:38 +0200)]
gitignore: VIM backup and undo files

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoconfigs: Update QEMU IOAPIC ID to upcoming VT-d IR patches
Jan Kiszka [Tue, 10 May 2016 07:09:40 +0000 (09:09 +0200)]
configs: Update QEMU IOAPIC ID to upcoming VT-d IR patches

Peter Xu's VT-d interrupt remapping patches use a different IOAPIC ID
than older patches of me. Adjust the QEMU config to be ready for them.

Tested successfully with v6 of Peter's patches and
-machine q35,kernel_irqchip=split,iommu=on,intremap=on.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agotools: fixed typo in rootcell config template pio_bitmap
Georg Schiesser [Tue, 10 May 2016 00:03:35 +0000 (02:03 +0200)]
tools: fixed typo in rootcell config template pio_bitmap

This typo was introduced with commit 598c04f6

Signed-off-by: Georg Schiesser <georg.schiesser@opentech.at>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Block DMA from unlisted devices in AMD IOMMU
Jan Kiszka [Sat, 7 May 2016 17:02:28 +0000 (19:02 +0200)]
x86: Block DMA from unlisted devices in AMD IOMMU

Invalid device table entries in the AMD IOMMU mean that those devices
are actually allowed to perform DMA requests and issue interrupts. We
have to avoid this case because only devices listed in a config are
permitted to do so. We already achieve this effect when removing an
existing device from the table, but we have to ensure it also for any
unlisted device.

Devices with IDs not covered by any table are blocked by the IOMMU, see
AMD I/O Virtualization Technology spec, 2.2.2.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Use safer pattern with AMD IOMMU to block DMA requests
Jan Kiszka [Mon, 9 May 2016 17:55:45 +0000 (19:55 +0200)]
x86: Use safer pattern with AMD IOMMU to block DMA requests

The AMD IOMMU spec is not 100% clear if a device table entry with V=1
but TV=0 implies that DMA requests from that device are blocked. Play
safe and use the pattern that Linux uses as well: TV=1, Mode=0 and IW as
well as IR cleared.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agodriver: fix unsigned long overflow in leave_hypervisor
Antonios Motakis [Thu, 28 Apr 2016 14:01:29 +0000 (16:01 +0200)]
driver: fix unsigned long overflow in leave_hypervisor

When shutting down the hypervisor, in the leave_hypervisor
function, the Linux driver touches every hypervisor page, to
ensure all pages are mapped. However, the current implementation
assumes hv_core_and_percpu_size is aligned to PAGE_SIZE. This may
not be the case, if PAGE_SIZE is different on the hypervisor side.

This can cause an unsigned long overflow, leading to an infinite
loop of touching successive pages starting from hypervisor_mem.
The loop will be broken as soon as Linux tries to touch an invalid
page, leading to a kernel crash.

Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore: map the zero page to the full hypervisor memory region
Antonios Motakis [Thu, 28 Apr 2016 14:01:28 +0000 (16:01 +0200)]
core: map the zero page to the full hypervisor memory region

During initialization, in init_early, the hypervisor maps the
memory used by the hypervisor with empty pages for the root cell.
However, if the root cell tries to access the region used by the
hypervisor, this is only safe if both sides agree on PAGE_SIZE.
It is a long shot to try to guess the granularity used by the
root cell; the safest bet is to map the full range that has been
allocated for the hypervisor to use.

Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoDocumentation: articles: LJ-article-04-2015.txt
Jim Huang [Wed, 27 Apr 2016 05:29:44 +0000 (13:29 +0800)]
Documentation: articles: LJ-article-04-2015.txt

Fix indentation of the commands

Signed-off-by: Jim Huang <jserv.tw@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agohypervisor: mmio: fix typo
Peng Fan [Tue, 19 Apr 2016 08:40:35 +0000 (16:40 +0800)]
hypervisor: mmio: fix typo

Fix typo.
Change "at the end if the list" to "at the end of the list".

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: lib: fix strncmp
peter03192003@gmail.com [Tue, 5 Apr 2016 18:01:13 +0000 (11:01 -0700)]
inmates: lib: fix strncmp

We only tested the first character of the strings so far. Make sure to
advance the pointers correctly.

Signed-off-by: ShengYen Peng <peter03192003@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agomemory-layout: fix typo
Peng Fan [Tue, 5 Apr 2016 08:10:01 +0000 (16:10 +0800)]
memory-layout: fix typo

Fix typo: change "visible it its address" to "visible in its address".

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: lib: fix command line parsing of hex ints
Antonios Motakis [Wed, 24 Feb 2016 10:07:53 +0000 (11:07 +0100)]
inmates: lib: fix command line parsing of hex ints

The cmdline_parse_int function is currently broken;
luckily, it is a simple fix.

Signed-off-by: Antonios Motakis <antonios.motakis@huawei.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Support updates of the VTD Fault Event shadow registers
Jan Kiszka [Fri, 18 Mar 2016 07:04:56 +0000 (08:04 +0100)]
x86: Support updates of the VTD Fault Event shadow registers

Linux may adjust the affinity of the event on CPU hotplug or other
changes. Just keep track of the changes so that we can apply them on
shutdown.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reported-and-tested-by: Magnus Thulin <magnus2lin@gmail.com>
8 years agox86: Mask VTD Fault Event interrupt before restoring
Jan Kiszka [Fri, 18 Mar 2016 10:23:30 +0000 (11:23 +0100)]
x86: Mask VTD Fault Event interrupt before restoring

To avoid delivering it to an inconsistent configuration. Theoretically,
we could lose an IR fault event during that window, but that's
negligible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Simplify VTD Fault Event register saving/restoring
Jan Kiszka [Fri, 18 Mar 2016 10:21:27 +0000 (11:21 +0100)]
x86: Simplify VTD Fault Event register saving/restoring

Just use an array, all relevant regs are adjacent.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore: Fix pci_cell_init for cells without PCI devices
Jan Kiszka [Sat, 12 Mar 2016 10:28:55 +0000 (11:28 +0100)]
core: Fix pci_cell_init for cells without PCI devices

Now that page_alloc returns NULL if we request 0 pages, we need to
account for this properly.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore: Protect against zero-length page allocations
Jan Kiszka [Sat, 12 Mar 2016 10:22:12 +0000 (11:22 +0100)]
core: Protect against zero-length page allocations

We return a non-NULL pointer so far which will cause troubles when
forwarding that to page_free.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Unify AMD page tables for CPU and IOMMU
Jan Kiszka [Tue, 1 Mar 2016 22:31:31 +0000 (23:31 +0100)]
x86: Unify AMD page tables for CPU and IOMMU

This exploits AMD's architecture feature that you can reuse the nested
page tables also for the IOMMU.

Both tables have the same depth (4), share the same address fields, the
valid bit - but all other bits are separate. Therefore, we need to
enhance the NPT paging handlers so that they fold both bit sets into an
entry.

The rewards are saving of several lines of code as well as a bunch of
hypervisor pages (typically some dozen).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Add amd_iommu pending faults check
Valentine Sinitsyn [Wed, 15 Jul 2015 19:42:36 +0000 (00:42 +0500)]
x86: Add amd_iommu pending faults check

Add iommu_pending_faults() for amd_iommu. This looks into
Hardware Event Register first, and then loops over the event log
printing what's in it. This way, we don't miss errors that happen
when event logging is unavailable.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
[Jan: Cleanups]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Implement amd_iommu event log
Valentine Sinitsyn [Wed, 15 Jul 2015 19:34:47 +0000 (00:34 +0500)]
x86: Implement amd_iommu event log

Add functions to read event logs AMD IOMMU provides and print their
contents. The latter is rather basic, but decoding all possible log
entries is hairy, so we'd better wait and collect stats which
problems occur most often.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
[Jan: Cleanups, refactored amd_iommu_print_event]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Add iommu_commit_config() for amd_iommu
Jan Kiszka [Wed, 15 Jul 2015 19:34:47 +0000 (00:34 +0500)]
x86: Add iommu_commit_config() for amd_iommu

Implement functions to apply configuration for an IOMMU.
In case something goes wrong, we need to trigger an NMI, which
amd_iommu_init_fault_nmi() configures.

Based on patch by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Factor out iommu_select_fault_reporting_cpu
Jan Kiszka [Sat, 5 Mar 2016 19:43:28 +0000 (20:43 +0100)]
x86: Factor out iommu_select_fault_reporting_cpu

The logic to pick a root cell CPU for IOMMU fault reporting will be
reused for AMD. Factor it out.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Add device management functions for amd_iommu
Jan Kiszka [Wed, 15 Jul 2015 19:13:05 +0000 (00:13 +0500)]
x86: Add device management functions for amd_iommu

Implement iommu_add_pci_device() for amd_iommu.

Basically, this is all about filling DTE entry. However, there is no way
to allocate device tables sparsely with ADM IOMMU. To save some memory,
Device Table Segmentation (Revision 2.6 and up) is used whenever possible,
and this adds some infrastructure.

Based on patch by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Implement amd_iommu command posting
Valentine Sinitsyn [Wed, 15 Jul 2015 19:13:05 +0000 (00:13 +0500)]
x86: Implement amd_iommu command posting

Add basic infrastructure (heavily influenced by Linux amd_iommu driver)
to submit commands to AMD IOMMU command buffer. For now, having only
INVALIDATE_IOMMU_PAGES and COMPLETION_WAIT seems to be sufficient.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
[Jan: Cleanups, simplification of draining]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Add amd_iommu's memory mapping functions
Valentine Sinitsyn [Wed, 15 Jul 2015 19:13:05 +0000 (00:13 +0500)]
x86: Add amd_iommu's memory mapping functions

Implement iommu_map_memory_region() and iommu_unmap_memory_region()
for amd_iommu.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
[Jan: Cleanups]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Implement amd_iommu cell management functions
Valentine Sinitsyn [Wed, 15 Jul 2015 19:10:42 +0000 (00:10 +0500)]
x86: Implement amd_iommu cell management functions

Add iommu_cell_init() and iommu_cell_destroy() for amd_iommu.

Signed-off-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Add amd_iommu initialization code
Jan Kiszka [Tue, 14 Jul 2015 19:54:30 +0000 (00:54 +0500)]
x86: Add amd_iommu initialization code

Implement iommu_init() and iommu_shutdown() for AMD-based systems.

Based on patch by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Add amd_iommu hardware structs and definitions
Jan Kiszka [Wed, 9 Sep 2015 19:59:48 +0000 (00:59 +0500)]
x86: Add amd_iommu hardware structs and definitions

Introduce all hardware-related structures and definitions needed for
AMD IOMMU support.

Based on patch by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Extend bit range returned by x86_64_get_flags
Jan Kiszka [Tue, 1 Mar 2016 06:15:38 +0000 (07:15 +0100)]
x86: Extend bit range returned by x86_64_get_flags

In order to support also the AMD IOMMU with x86_64_paging, we extend
the set of bits returned by get_flags handler. We now include all bits
ignored by the MMU, which includes the bits relevant for the AMD IOMMU.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore, configs, tools: Add AMD-specific fields to struct jailhouse_iommu
Jan Kiszka [Fri, 13 Mar 2015 17:41:02 +0000 (22:41 +0500)]
core, configs, tools: Add AMD-specific fields to struct jailhouse_iommu

For AMD, we also need to store the PCI address, capability offset and
IOMMU feature bits coming from ACPI (overwriting what the hardware
reports) in the cell configuration file.

Based on patches by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Fold vtd.h into vtd.c
Jan Kiszka [Mon, 29 Feb 2016 08:06:44 +0000 (09:06 +0100)]
x86: Fold vtd.h into vtd.c

There is no interface specified in that header anymore. Move its used
content over to vtd.c and delete the header.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Use more BIT_MASK macro for paging tasks
Jan Kiszka [Sun, 28 Feb 2016 19:48:55 +0000 (20:48 +0100)]
x86: Use more BIT_MASK macro for paging tasks

Instead of manually defining bitmasks, use the more readable BIT_MASK
macro. No constant value is changed.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Rename i386_get_next_pt_l2 to i386_get_next_pt
Jan Kiszka [Sun, 28 Feb 2016 19:47:41 +0000 (20:47 +0100)]
x86: Rename i386_get_next_pt_l2 to i386_get_next_pt

There are no handlers for other levels.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Consolidate identical x86-64 get_next_pt handlers
Jan Kiszka [Sun, 28 Feb 2016 19:40:44 +0000 (20:40 +0100)]
x86: Consolidate identical x86-64 get_next_pt handlers

The handlers for level 4 and that for level 2/3 always contained the
same logic. Consolidate them.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Filter out physical address that can't be handled by DMAR units
Jan Kiszka [Wed, 24 Feb 2016 09:19:54 +0000 (10:19 +0100)]
x86: Filter out physical address that can't be handled by DMAR units

Make sure that we do not try to program DMAR page tables with physical
addresses beyond the supported range (39 or 48 bits, depending on the
page table levels).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Account for DMAR units with multi-page register sets
Jan Kiszka [Sat, 20 Feb 2016 18:10:22 +0000 (19:10 +0100)]
x86: Account for DMAR units with multi-page register sets

The fault reporting registers we use may be placed in a 2nd or even 3rd
page. Account for such cases by using the MMIO region size now provided
via the system config.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore, configs, tools: Prepare for variable IOMMU register set sizes
Jan Kiszka [Sat, 20 Feb 2016 18:09:49 +0000 (19:09 +0100)]
core, configs, tools: Prepare for variable IOMMU register set sizes

Introduce a size field to struct jailhouse_iommu and fill it via the
config generator. The information can be retrieved from the ACPI tables
for AMD. On Intel, we need to study the Linux mappings, thus we need to
demand that DMAR is enabled now while retrieving system information.

Based on patches by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore, configs, tools: Introduce struct jailhouse_iommu
Jan Kiszka [Thu, 18 Feb 2016 06:13:02 +0000 (07:13 +0100)]
core, configs, tools: Introduce struct jailhouse_iommu

For both AMD and Intel, we need to store not only base address but also
a size to map the complete MMIO region. Moreover, AMD requires a number
of PCI device parameters for the IOMMU. Introduce struct jailhouse_iommu
that will encapsulate all required data.

Based on patches by Valentine Sinitsyn.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoTODO: Update according to latest improvements
Jan Kiszka [Tue, 9 Feb 2016 09:43:47 +0000 (10:43 +0100)]
TODO: Update according to latest improvements

ARMv7 is merged, v8 is on the way now. MMIO dispatching and sub-page
handling are both done.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoREADME.md: fix markdown
Henning Schild [Mon, 8 Feb 2016 11:54:39 +0000 (12:54 +0100)]
README.md: fix markdown

We either need to escape the asterisk or mark the whole word as code,
otherwise the asterisk makes the following text italic. (seen in vim)

Signed-off-by: Henning Schild <henning.schild@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: e1000-demo: Enable queues explicitly
Jan Kiszka [Wed, 3 Feb 2016 17:55:23 +0000 (18:55 +0100)]
inmates: e1000-demo: Enable queues explicitly

Newer NICs require us to enable the RX and TX queue. Although they
should be on after reset, at least the I350 refuses to work otherwise.
As the related bit is harmless or even unused on older NICs, do this
unconditionally (just like ipxe does).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: e1000-demo: Do not set ASDE bit
Jan Kiszka [Wed, 3 Feb 2016 11:24:32 +0000 (12:24 +0100)]
inmates: e1000-demo: Do not set ASDE bit

ASDE is apparently not needed on older NICs but caused troubles on newer
ones like 82575. Remove it.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: e1000-demo: Fix FRCSPD bit definition for control register
Jan Kiszka [Wed, 3 Feb 2016 10:51:53 +0000 (11:51 +0100)]
inmates: e1000-demo: Fix FRCSPD bit definition for control register

It's bit 11, in fact. Bit 12 is FRCDPLX which is cleared on reset.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: e1000-demo: Write RX tail only after enabling the queue
Jan Kiszka [Tue, 2 Feb 2016 20:52:27 +0000 (21:52 +0100)]
inmates: e1000-demo: Write RX tail only after enabling the queue

The 82575 ignores all writes prior to enabling the queue or the complete
receiver. Reorder writes, clearing the tail first - just in case.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: e1000-demo: Hard-wire PHY address
Jan Kiszka [Wed, 3 Feb 2016 16:44:11 +0000 (17:44 +0100)]
inmates: e1000-demo: Hard-wire PHY address

All known e1000-compatible cards have their PHYs at address 1. Searching
for them does not work reliably, so simply hard-wire the address.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoinmates: e1000-demo: Ensure ring alignment requirements on newer NICs
Jan Kiszka [Tue, 2 Feb 2016 20:27:46 +0000 (21:27 +0100)]
inmates: e1000-demo: Ensure ring alignment requirements on newer NICs

The Intel 82575 and newer NICs require 128-byte alignment of the RX and
TX rings.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Make debug UART port configurable via system config
Jan Kiszka [Tue, 26 Jan 2016 08:27:40 +0000 (09:27 +0100)]
x86: Make debug UART port configurable via system config

We already allow to enable a VGA console via the system config, so let's
make the UART port configurable this way as well: phys_start will hold
the port, and flags must not have JAILHOUSE_MEM_IO set, in order to
differentiate us from the memory-mapped VGA console. And by leaving
phys_start at 0, we can even turn off the console now.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agocore: Initialize system_config earlier
Jan Kiszka [Tue, 26 Jan 2016 08:26:11 +0000 (09:26 +0100)]
core: Initialize system_config earlier

On x86, we want to make the debug UART configurable via the system
config. That means we will need this pointer in arch_dbg_write_init
already.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agoconfig: Set .debug_console for x86 targets
Jan Kiszka [Tue, 26 Jan 2016 08:24:17 +0000 (09:24 +0100)]
config: Set .debug_console for x86 targets

We will make the debug console UART port configurable via the system
config. Set the corresponding values, they will be ignored so far.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
8 years agox86: Pull usage check out of vga_write
Jan Kiszka [Sun, 24 Jan 2016 20:28:24 +0000 (21:28 +0100)]
x86: Pull usage check out of vga_write

This makes the code more regular.

Account for the additional contributor at this chance.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>