2016-04-18 |
Martin Jerabek | layout: CAN, added dual choke footprints
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2016-04-13 |
Martin Jerabek | layout: main regulator
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2016-04-13 |
Martin Jerabek | CAN and user I/O moved to JX1, expanders to JX2
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2016-04-13 |
Martin Jerabek | layout: CAN
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2016-04-12 |
Martin Jerabek | footprints positioned, better D-SUB footprints, fixes
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2016-04-12 |
Martin Jerabek | added initial PCB layout
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2016-04-12 |
Martin Jerabek | user leds: transistors replaced by 4-channel XOR gates
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2016-04-11 |
Martin Jerabek | optional common CAN termination, debouncing capacitors...
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2016-04-10 |
Martin Jerabek | power: LM2676, VCCIO reg FB divider changed, footprints...
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2016-04-10 |
Martin Jerabek | power: used TPS2260DDC, added choke footprints
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2016-04-10 |
Martin Jerabek | power reg changed, I/O pin assignment, testpoints, CAN
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2016-04-05 |
Martin Jerabek | CAN termination & merging redesigned, added connectors...
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2016-03-15 |
Martin Jerabek | Used MicroHeaders from kicad-parts
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2016-03-15 |
Martin Jerabek | Added .gitignore
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2016-03-15 |
Martin Jerabek | Added LEDs, buttons, DC connector.
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2016-03-15 |
Martin Jerabek | Separated to hierarchical sheets.
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2016-03-15 |
Martin Jerabek | vcco renamed to vccio
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2016-03-15 |
Martin Jerabek | Added 2nd microheader.
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2016-03-14 |
Martin Jerabek | Added basic schema with 4x CAN Transceiver and 1x MicroHeader.
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