]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/commit
added initial PCB layout
authorMartin Jerabek <jerabma7@fel.cvut.cz>
Tue, 12 Apr 2016 00:25:00 +0000 (02:25 +0200)
committerMartin Jerabek <jerabma7@fel.cvut.cz>
Tue, 12 Apr 2016 00:25:00 +0000 (02:25 +0200)
commitf3ff811a037741aff32f32b3d77d76691e864687
treeeab0845cd2b54a48ca784a25d2198ccef06c3399
parent4170a842161e281a72c678f526139caf95b0c6ab
added initial PCB layout
canbench-hw.kicad_pcb [new file with mode: 0644]