]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/commit
power: LM2676, VCCIO reg FB divider changed, footprints, descriptions
authorMartin Jerabek <jerabma7@fel.cvut.cz>
Sun, 10 Apr 2016 22:46:05 +0000 (00:46 +0200)
committerMartin Jerabek <jerabma7@fel.cvut.cz>
Sun, 10 Apr 2016 22:52:07 +0000 (00:52 +0200)
commit5ac25cb9659f0ff46de94aa49f73e6e06078bc53
treecaab96051cb9b8ef147b4685dfa920770cd27e9a
parentf6366829abfa70d9f5f13a07ff9fb3fdd6b4875d
power: LM2676, VCCIO reg FB divider changed, footprints, descriptions

- LM2676 used as main regulator
- VCCIO reg feedback voltage divider changed
- added capacitors voltage
- footprint assignment
lib/README.txt
lib/footprints.pretty/TO-263-7-TEXAS.kicad_mod [new file with mode: 0644]
lib/mcp.dcm
lib/mcp.lib
power.sch