]> rtime.felk.cvut.cz Git - fpga/virtex2/uart.git/tree
Building procedure changed.
-rw-r--r-- 249 .gitmodules
drwxr-xr-x - build
drwxr-xr-x - coregen
-rw-r--r-- 313 memory.bmm
-rw-r--r-- 3278 omsp_quadcount.vhd
-rw-r--r-- 11926 openMSP430_defines.v
-rw-r--r-- 1012 openMSP430_uart.prj
-rw-r--r-- 1252 openMSP430_uart.ucf
-rw-r--r-- 8451 openMSP430_uart.vhd
m--------- - openmsp430
m--------- - quadcount
drwxr-xr-x - software
m--------- - uart