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fpga/virtex2/msp_motion.git
13 years agoHDL Makefile added
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Vladimir Burian [Thu, 14 Apr 2011 20:42:15 +0000 (22:42 +0200)]
HDL Makefile added

13 years agoTop-level modul created.
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Vladimir Burian [Thu, 14 Apr 2011 20:31:11 +0000 (22:31 +0200)]
Top-level modul created.

Contains openMSP430, user constraints file and MCU memory definition file.

13 years agoSubmodule openMSP430 added
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Vladimir Burian [Thu, 14 Apr 2011 17:51:57 +0000 (19:51 +0200)]
Submodule openMSP430 added

13 years agoInitial empty commit
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Vladimir Burian [Thu, 14 Apr 2011 17:48:35 +0000 (19:48 +0200)]
Initial empty commit

MSP430 BLDC control HW and PXMC SW - top level design for Virtex 2 V2MB1000 board