]> rtime.felk.cvut.cz Git - zynq/linux.git/commitdiff
dmaengine: xilinx: dma: In axidma add support for 64MB data transfer
authorRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Fri, 27 Apr 2018 10:12:48 +0000 (15:42 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 2 May 2018 06:29:56 +0000 (08:29 +0200)
In 2018.1 axidma IP support for 64 MB data transfer is added by increasing
buffer length width to 26bit. Modify DT "xlnx,sg-length-width" validation
accordingly. Since max length for previous IP version is 23 bit display a
warning message if length is in 23-26 bit range. It would have an ideal
solution to add a separate compatibility string and config structure for
this changed IP but due to lack of proper DMA IP versioning it's dropped.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/dma/xilinx/xilinx_dma.c

index b78d005fbfff3be6031f52f34944796b0980f2e7..0a669c23a68074725b2d181441a51da2577e4889 100644 (file)
 /* AXI DMA Specific Masks/Bit fields */
 #define XILINX_DMA_MAX_TRANS_LEN_MIN   8
 #define XILINX_DMA_MAX_TRANS_LEN_MAX   23
+#define XILINX_DMA_V2_MAX_TRANS_LEN_MAX        26
 #define XILINX_DMA_CR_COALESCE_MAX     GENMASK(23, 16)
 #define XILINX_DMA_CR_CYCLIC_BD_EN_MASK        BIT(4)
 #define XILINX_DMA_CR_COALESCE_SHIFT   16
@@ -2732,12 +2733,14 @@ static int xilinx_dma_probe(struct platform_device *pdev)
                if (!of_property_read_u32(node, "xlnx,sg-length-width",
                                          &len_width)) {
                        if (len_width < XILINX_DMA_MAX_TRANS_LEN_MIN ||
-                           len_width > XILINX_DMA_MAX_TRANS_LEN_MAX) {
+                           len_width > XILINX_DMA_V2_MAX_TRANS_LEN_MAX) {
                                dev_warn(xdev->dev,
                                         "invalid xlnx,sg-length-width property value using default width\n");
                        } else {
-                               xdev->max_buffer_len = GENMASK(len_width - 1,
-                                                              0);
+                               if (len_width > XILINX_DMA_MAX_TRANS_LEN_MAX)
+                                       dev_warn(xdev->dev, "Please ensure that IP supports buffer length > 23 bits\n");
+
+                               xdev->max_buffer_len = GENMASK(len_width - 1, 0);
                        }
                }
        }