]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/ip/spi_leds_and_enc_1.0/hdl/spi_leds_and_enc_v1_0_spi_fsm.vhd
microzed_apo: Correct JX1_LVDS_21_N pin assignment on FPGA_IO header.
[fpga/zynq/canbench-sw.git] / system / ip / spi_leds_and_enc_1.0 / hdl / spi_leds_and_enc_v1_0_spi_fsm.vhd
2017-02-07 Pavel Pisamicrozed_apo: Add SPI FSM for LEDs and encoder communic...