]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/history - system/ip/can_crossbar_1.0/hdl/can_crossbar_v1_0_S00_AXI.v
can_crossbar: fixed STBY bit position in register
[fpga/zynq/canbench-sw.git] / system / ip / can_crossbar_1.0 / hdl / can_crossbar_v1_0_S00_AXI.v
2016-05-24 Martin Jerabekcan_crossbar: fixed STBY bit position in register
2016-05-16 Martin Jerabeksystem: can_crossbar fixed and added to device tree...
2016-05-12 Martin Jerabekcan_crossbar: fixes (but still not working)
2016-05-12 Martin Jerabeksystem: added CAN crossbar IP