| 2016-04-25 |
Martin Jerabek | layout: CAN transceiver blocking capacitors moved a... |
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| 2016-04-25 |
Martin Jerabek | changed diode footprints, added text to bottom layer |
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| 2016-04-22 |
Martin Jerabek | RPI connector changed, enlarged connector distance... |
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| 2016-04-22 |
Martin Jerabek | layout: solder mask clearance, fixes |
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| 2016-04-22 |
Martin Jerabek | layout: fixes |
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| 2016-04-22 |
Martin Jerabek | layout: added board description |
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| 2016-04-22 |
Martin Jerabek | layout: fixes, silk screen |
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| 2016-04-21 |
Martin Jerabek | layout: finished routing |
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| 2016-04-21 |
Martin Jerabek | layout: connectors, KEYs; added ESD protection |
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| 2016-04-20 |
Martin Jerabek | layout: CAN, user LEDs, KEYs, SWs, JX2 |
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| 2016-04-18 |
Martin Jerabek | layout: common CAN moved, schema: connected CAN ground... |
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| 2016-04-18 |
Martin Jerabek | layout: CAN, added dual choke footprints |
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| 2016-04-13 |
Martin Jerabek | layout: main regulator |
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| 2016-04-13 |
Martin Jerabek | CAN and user I/O moved to JX1, expanders to JX2 |
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| 2016-04-13 |
Martin Jerabek | layout: CAN |
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| 2016-04-12 |
Martin Jerabek | footprints positioned, better D-SUB footprints, fixes |
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| 2016-04-12 |
Martin Jerabek | added initial PCB layout |
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projects / fpga / zynq / canbench-hw.git / history