]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/commit
layout: solder mask clearance, fixes
authorMartin Jerabek <jerabma7@fel.cvut.cz>
Fri, 22 Apr 2016 09:37:18 +0000 (11:37 +0200)
committerMartin Jerabek <jerabma7@fel.cvut.cz>
Fri, 22 Apr 2016 09:37:18 +0000 (11:37 +0200)
commit3e17057317cd78b70a948c36fa1ffecd7c1bac16
tree5a4b37143f29314cfff87039c9cc40362af80f2c
parent2c3bb9ae031a89e08b5f89693113c4aedb058542
layout: solder mask clearance, fixes
canbench-hw.kicad_pcb