]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-hw.git/log
fpga/zynq/canbench-hw.git
7 years agoschemaric: formatting, comments; board definition file moved to SW repository master
Martin Jerabek [Fri, 27 May 2016 06:46:28 +0000 (08:46 +0200)]
schemaric: formatting, comments; board definition file moved to SW repository

7 years agoadded BOM, schematic changes (present in RevA)
Martin Jerabek [Fri, 6 May 2016 08:30:03 +0000 (10:30 +0200)]
added BOM, schematic changes (present in RevA)

7 years agolayout: CAN transceiver blocking capacitors moved a bit, silk screen
Martin Jerabek [Mon, 25 Apr 2016 11:59:01 +0000 (13:59 +0200)]
layout: CAN transceiver blocking capacitors moved a bit, silk screen

7 years agochanged diode footprints, added text to bottom layer
Martin Jerabek [Mon, 25 Apr 2016 07:51:43 +0000 (09:51 +0200)]
changed diode footprints, added text to bottom layer

7 years agoadded script to rename & pack output Gerber files
Martin Jerabek [Fri, 22 Apr 2016 12:49:46 +0000 (14:49 +0200)]
added script to rename & pack output Gerber files

7 years agoRPI connector changed, enlarged connector distance, routing changes
Martin Jerabek [Fri, 22 Apr 2016 12:07:11 +0000 (14:07 +0200)]
RPI connector changed, enlarged connector distance, routing changes

7 years agolayout: solder mask clearance, fixes
Martin Jerabek [Fri, 22 Apr 2016 09:37:18 +0000 (11:37 +0200)]
layout: solder mask clearance, fixes

7 years agolayout: fixes
Martin Jerabek [Fri, 22 Apr 2016 07:43:27 +0000 (09:43 +0200)]
layout: fixes

7 years agolayout: added board description
Martin Jerabek [Fri, 22 Apr 2016 02:03:28 +0000 (04:03 +0200)]
layout: added board description

7 years agolayout: fixes, silk screen
Martin Jerabek [Fri, 22 Apr 2016 01:44:23 +0000 (03:44 +0200)]
layout: fixes, silk screen

7 years agolayout: finished routing
Martin Jerabek [Thu, 21 Apr 2016 19:13:46 +0000 (21:13 +0200)]
layout: finished routing

7 years agolayout: connectors, KEYs; added ESD protection
Martin Jerabek [Thu, 21 Apr 2016 01:58:55 +0000 (03:58 +0200)]
layout: connectors, KEYs; added ESD protection

8 years agolayout: CAN, user LEDs, KEYs, SWs, JX2
Martin Jerabek [Wed, 20 Apr 2016 02:25:43 +0000 (04:25 +0200)]
layout: CAN, user LEDs, KEYs, SWs, JX2

8 years agolayout: common CAN moved, schema: connected CAN ground (D-SUB pin 3)
Martin Jerabek [Mon, 18 Apr 2016 07:16:01 +0000 (09:16 +0200)]
layout: common CAN moved, schema: connected CAN ground (D-SUB pin 3)

8 years agolayout: CAN, added dual choke footprints
Martin Jerabek [Fri, 15 Apr 2016 16:47:52 +0000 (18:47 +0200)]
layout: CAN, added dual choke footprints

8 years agolayout: main regulator
Martin Jerabek [Wed, 13 Apr 2016 21:22:46 +0000 (23:22 +0200)]
layout: main regulator

8 years agoCAN and user I/O moved to JX1, expanders to JX2
Martin Jerabek [Wed, 13 Apr 2016 20:27:24 +0000 (22:27 +0200)]
CAN and user I/O moved to JX1, expanders to JX2

8 years agolayout: CAN
Martin Jerabek [Wed, 13 Apr 2016 19:47:52 +0000 (21:47 +0200)]
layout: CAN

8 years agofootprints positioned, better D-SUB footprints, fixes
Martin Jerabek [Tue, 12 Apr 2016 21:25:36 +0000 (23:25 +0200)]
footprints positioned, better D-SUB footprints, fixes

- user LEDS: XOR gate changed to buffer gate
- power: fixed diode direction
- JX: I/O remapped
- universal D-SUB footprints (both straight and angled)
- PCB layout: footprints positioned (almost)

8 years agoadded initial PCB layout
Martin Jerabek [Tue, 12 Apr 2016 00:25:00 +0000 (02:25 +0200)]
added initial PCB layout

8 years agouser leds: transistors replaced by 4-channel XOR gates
Martin Jerabek [Tue, 12 Apr 2016 00:24:18 +0000 (02:24 +0200)]
user leds: transistors replaced by 4-channel XOR gates

8 years agooptional common CAN termination, debouncing capacitors only 10nF, footprints
Martin Jerabek [Mon, 11 Apr 2016 23:03:47 +0000 (01:03 +0200)]
optional common CAN termination, debouncing capacitors only 10nF, footprints

8 years agopower: LM2676, VCCIO reg FB divider changed, footprints, descriptions
Martin Jerabek [Sun, 10 Apr 2016 22:46:05 +0000 (00:46 +0200)]
power: LM2676, VCCIO reg FB divider changed, footprints, descriptions

- LM2676 used as main regulator
- VCCIO reg feedback voltage divider changed
- added capacitors voltage
- footprint assignment

8 years agopower: used TPS2260DDC, added choke footprints
Martin Jerabek [Sun, 10 Apr 2016 11:05:40 +0000 (13:05 +0200)]
power: used TPS2260DDC, added choke footprints

8 years agopower reg changed, I/O pin assignment, testpoints, CAN
Martin Jerabek [Sun, 10 Apr 2016 09:20:48 +0000 (11:20 +0200)]
power reg changed, I/O pin assignment, testpoints, CAN

- I/O (LEDs, KEYs, SWs, CANs, connectors) connected to headers,
  created according pin assignment file for Vivado
- CAN termination moved, fixed common CAN termination
- added D-SUB connector footprints

JX headers:
- removed as submodule, added directly
- footprint origin moved to center to allow positioning
- pin types changed to enable ERC

Power:
- VCCIO regulator changed to TPS62260DDC, also included variant with MCP16301
- added testpoints to power outputs and power-good outputs
- added jumper JP13 to pull up VCCIO_EN for testing without MicroZed

8 years agoCAN termination & merging redesigned, added connectors, power regulators, user I/O
Martin Jerabek [Tue, 5 Apr 2016 19:23:48 +0000 (21:23 +0200)]
CAN termination & merging redesigned, added connectors, power regulators, user I/O

8 years agoUsed MicroHeaders from kicad-parts
Martin Jerabek [Tue, 15 Mar 2016 14:06:28 +0000 (15:06 +0100)]
Used MicroHeaders from kicad-parts

8 years agoAdded .gitignore
Martin Jerabek [Tue, 15 Mar 2016 13:43:34 +0000 (14:43 +0100)]
Added .gitignore

8 years agoAdded LEDs, buttons, DC connector.
Martin Jerabek [Tue, 15 Mar 2016 13:42:46 +0000 (14:42 +0100)]
Added LEDs, buttons, DC connector.

8 years agoSeparated to hierarchical sheets.
Martin Jerabek [Tue, 15 Mar 2016 12:40:11 +0000 (13:40 +0100)]
Separated to hierarchical sheets.

8 years agovcco renamed to vccio
Martin Jerabek [Tue, 15 Mar 2016 12:08:15 +0000 (13:08 +0100)]
vcco renamed to vccio

8 years agoAdded 2nd microheader.
Martin Jerabek [Tue, 15 Mar 2016 12:01:44 +0000 (13:01 +0100)]
Added 2nd microheader.

8 years agoAdded basic schema with 4x CAN Transceiver and 1x MicroHeader.
Martin Jerabek [Mon, 14 Mar 2016 19:55:54 +0000 (20:55 +0100)]
Added basic schema with 4x CAN Transceiver and 1x MicroHeader.

8 years agoInitialize KiCad design of 4 channel CAN transceiver board for MicroZed board
Pavel Pisa [Fri, 4 Mar 2016 09:54:39 +0000 (10:54 +0100)]
Initialize KiCad design of 4 channel CAN transceiver board for MicroZed board

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>