signal cumul_data: std_logic_vector(71 downto 0); --unconsistent data, containing different amounts of measurments
signal prepared_data: std_logic_vector(71 downto 0); --consistent data, waiting for clk sync to propagate to output
signal m_count_sig: std_logic_vector(8 downto 0); --measurments count waiting for clk to propagate to output
+ signal first_pass: std_logic;
begin
process
- variable data_ready : std_logic;
variable channel: channel_type;
variable reset_re: std_logic:='0';
variable reset_count: std_logic_vector (3 downto 0);
reset_re:='0'; --clear reset flag
adc_scs<='1'; --active-low SS
adc_sclk<='0'; --lower clock
- data_ready:='0'; --mark data as unprepared
+ first_pass<='1'; --mark data as unprepared
channel:=ch0; --prepare channel0
adc_data<=(others=>'0'); --null working data
cumul_data<=(others=>'0'); --null working data
state<=r7;
when r7=> --7th rising edge, data ready
adc_sclk<='1';
- if (data_ready='1') then
+ if (first_pass='0') then
--add the current current to sum and shift the register
cumul_data(71 downto 0)<=
std_logic_vector(unsigned(cumul_data(47 downto 24))
when f8=> --8th falling edge
adc_sclk<='0';
adc_mosi<='0'; --PD0
- if (data_ready='1') then
+ if (first_pass='0') then
case channel is
when ch0=>
adc_address<="101"; --ch1 address
adc_address<="010"; --ch2 address
channel:=ch2; --next channel code
when ch2=>
+ --data order schould be: ch2 downto ch0 downto ch1
prepared_data(71 downto 0)<=cumul_data(71 downto 0);
m_count_sig<=std_logic_vector(unsigned(m_count_sig)+1);
adc_address<="001"; --ch0 address
channel:=ch0; --next channel code
end case;
end if;
- data_ready:='1';
state<=r8;
when r8=> --8th rising edge (adc gets PD0), we propagate our results to output
adc_sclk<='1';
adc_channels <= prepared_data; --data
measur_count <= m_count_sig; --count of measurments
+ first_pass<='0'; --data in next cycle are usable
state<=f9;
when f9=> --9th falling edge busy state between conversion (we write nothing)
adc_sclk<='0';
*/
void printData(struct rpi_in data){
float cur0, cur1, cur2;
+ int i;
if (data.adc_m_count){
cur0=data.ch0/data.adc_m_count;
cur1=data.ch1/data.adc_m_count;
cur2=data.ch2/data.adc_m_count;
}
+ for (i = 0; i < 16; i++) {
+ if (!(i % 6))
+ puts("");
+ printf("%.2X ", data.debug_rx[i]);
+ }
+ puts("");
printf("\npozice=%d\n",(int32_t)data.pozice);
printf("hal1=%d, hal2=%d, hal3=%d\n",data.hal1,data.hal2,data.hal3);
- //printf("en1=%d, en2=%d, en3=%d (Predchozi hodnoty)\n",data.en1,data.en2,data.en3);
- //printf("shdn1=%d, shdn2=%d, shdn3=%d (P.h.)\n",data.shdn1,data.shdn2,data.shdn3);
- //printf("PWM1(10d5)b54=%d %d %d %d %d %d=b49(P.h.)\n",data.b54,data.b53,data.b52,data.b51,data.b50,data.b49);
- //printf("PWM2(10d4)b48=%d %d %d %d %d %d %d=b42(P.h.)\n",data.b48,data.b47,data.b46,data.b45,data.b44,data.b43,data.b42);
- //printf("PWM3(10d5)b41=%d %d %d %d %d %d=b36(P.h.)\n",data.b41,data.b40,data.b39,data.b38,data.b37,data.b36);
+ printf("en1=%d, en2=%d, en3=%d (Last sent)\n",!!(0x40&test),!!(0x20&test),!!(0x10&test));
+ printf("shdn1=%d, shdn2=%d, shdn3=%d (L.s.)\n",!!(0x08&test),!!(0x04&test),!!(0x02&test));
+ printf("PWM1=%u(L.s.)\n",pwm1);
+ printf("PWM2=%u(L.s.)\n",pwm2);
+ printf("PWM3=%u(L.s.)\n",pwm3);
printf("Pocet namerenych proudu=%u\n",data.adc_m_count);
- printf("(pwm1)proud1 (ch1)=%d (avg=%4.0f) (%2.2f%%)\n",data.ch1,cur1,diff_p(cur1));
- printf("(pwm2)proud2 (ch2)=%d (avg=%4.0f)(%2.2f%%)\n",data.ch2,cur2,diff_p(cur2));
- printf("(pwm3)proud3 (ch0)=%d (avg=%4.0f)(%2.2f%%)\n",data.ch0,cur0,diff_p(cur0));
+ printf("(pwm1) (ch1)=%d (avg=%4.0f) (%2.2f%%)\n",data.ch1,cur1,diff_p(cur1));
+ printf("(pwm2) (ch2)=%d (avg=%4.0f)(%2.2f%%)\n",data.ch2,cur2,diff_p(cur2));
+ printf("(pwm3) (ch0)=%d (avg=%4.0f)(%2.2f%%)\n",data.ch0,cur0,diff_p(cur0));
printf("soucet prumeru=%5.0f (%2.2f%%)\n",cur0+cur1+cur2,diff_s(cur0+cur1+cur2));
}
void prepare_tx(uint8_t * tx){
/*Data format:
- * tx[0] - bity 95 downto 88 - bits that are sent first
- * tx[1] - bity 87 downto 80
- * tx[2] - bity 79 downto 72
- * tx[3] - bity 71 downto 64
- * tx[4] - bity 63 downto 56
- * tx[5] - bity 55 downto 48
- * tx[6] - bity 47 downto 40
- * tx[7] - bity 39 downto 32
- * tx[8] - bity 31 downto 24
- * tx[9] - bity 23 downto 16
- * tx[10] - bity 15 downto 8
- * tx[11] - bity 7 downto 0
+ * tx[4] - bity 95 downto 88 - bits that are sent first
+ * tx[5] - bity 87 downto 80
+ * tx[6] - bity 79 downto 72
+ * tx[7] - bity 71 downto 64
+ * tx[8] - bity 63 downto 56
+ * tx[9] - bity 55 downto 48
+ * tx[10] - bity 47 downto 40
+ * tx[11] - bity 39 downto 32
+ * tx[12] - bity 31 downto 24
+ * tx[13] - bity 23 downto 16
+ * tx[14] - bity 15 downto 8
+ * tx[15] - bity 7 downto 0
*
* bit 95 - ADC reset
* bit 94 - enable PWM1
* .
* .
* .
- * bits 34 .. 24 - match PWM1
- * bits 23 .. 13 - match PWM2
+ * bits 66 .. 56 - match PWM1
+ * bits 55 .. 45 - match PWM2
* bit 11,12 - Unused
- * bits 10 .. 0 - match PWM3
+ * bits 42 .. 32 - match PWM3
*/
ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr);
/*vypisovani prichozich dat */
- /*/
+
if (ret < 1)
pabort("can't send spi message");
for (ret = 0; ret < ARRAY_SIZE; ret++) {
- if (!(ret % 6))
- puts("");
- printf("%.2X ", rx[ret]);
+ in.debug_rx[ret]=rx[ret];
}
- puts("");
+
/*/
/*prichozi data:
/** currents
- * ch0 - bits 71 downto 48
+ * ch2 - bits 71 downto 48
* 71..64 in rx[7] - all byte
* 63..56 in rx[8] - all byte
* 55..48 in rx[9] - all byte
- * ch1 - bits 47 downto 24
+ * ch0 - bits 47 downto 24
* 47..40 in rx[10] - all byte
* 39..32 in rx[11] - all byte
* 31..24 in rx[12] - all byte
- * ch2 - bits 23 downto 0
+ * ch1 - bits 23 downto 0
* 23..16 in rx[13] - all byte
* 15..8 in rx[14] - all byte
* 7..0 in rx[15] - all byte
*/
- in.ch0=rx[7];
+ in.ch2=rx[7];
+ in.ch2<<=8;
+ in.ch2|=rx[8];
+ in.ch2<<=8;
+ in.ch2|=rx[9];
+
+ in.ch0=rx[10];
in.ch0<<=8;
- in.ch0|=rx[8];
+ in.ch0|=rx[11];
in.ch0<<=8;
- in.ch0|=rx[9];
+ in.ch0|=rx[12];
- in.ch1=rx[10];
+ in.ch1=rx[13];
in.ch1<<=8;
- in.ch1|=rx[11];
+ in.ch1|=rx[14];
in.ch1<<=8;
- in.ch1|=rx[12];
-
- in.ch2=rx[13];
- in.ch2<<=8;
- in.ch2|=rx[14];
- in.ch2<<=8;
- in.ch2|=rx[15];
+ in.ch1|=rx[15];
return in;