2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
4 use ieee.std_logic_unsigned.all;
6 entity tb_priority_encoder is
7 end tb_priority_encoder;
9 --------------------------------------------------------------------------------
11 architecture testbench of tb_priority_encoder is
13 constant period : time := 1 us;
14 constant offset : time := 0 us;
16 signal CLK_I : std_logic;
17 signal RST_I : std_logic;
19 signal SEL : std_logic_vector (3 downto 0);
20 signal CODE : std_logic_vector (1 downto 0);
22 --------------------------------------------------------------------------------
26 uut: entity work.priority_encoder
35 SYSCON_CLK : process is
47 SYSCON_RST : process is
58 --------------------------------------------------------------------------------
68 SEL <= conv_std_logic_vector(i, 4);