]> rtime.felk.cvut.cz Git - fpga/openmsp430.git/tree - memory/
projects / fpga / openmsp430.git / tree
? search:
summary | shortlog | log | commit | commitdiff | tree
history | HEAD | snapshot
New top module with external data bus
[fpga/openmsp430.git] / memory /
drwxr-xr-x   ..
drwxr-xr-x - coregen tree | history
-rw-r--r-- 9378 ram_generic.vhd blob | history | raw
Local version/partial copy of OpenCores's openMSP430 project (http://opencores.org/project,openmsp430)