Submodule uart

  > Resets changed from asynchronous to synchronous.
  > Early initialization of all relevant signals.

diff --git a/uart b/uart
index 81d30909cb24a0f382a045c90f11444dd35cc1cf..584557d9d1b75aec4196c39d12560f7784ec4174 160000 (submodule)
--- a/uart
+++ b/uart
@@ -1 +1 @@
-Subproject commit 81d30909cb24a0f382a045c90f11444dd35cc1cf
+Subproject commit 584557d9d1b75aec4196c39d12560f7784ec4174