-- this is a very simple address block decoder, just "internal" dmem or "external"
-- clken and int hardwired for fast internal data-memory
- DMEMB_i_s.clken <= '1' when (dmem_sel_s = '1') else XMEMB_i.clken;
+ DMEMB_i_s.bus_wait <= '0' when (dmem_sel_s = '1') else XMEMB_i.bus_wait;
+ DMEMB_i_s.bus_taken <= '0' when (dmem_sel_s = '1') else XMEMB_i.bus_taken;
DMEMB_i_s.data <= dmem_data_s when (dmem_sel_r = '1') else XMEMB_i.data;
DMEMB_i_s.int <= XMEMB_i.int;
if (rst_i = '1') then -- synchronous reset ...
dmem_sel_r <= '1';
else -- delay select_external_mem (needed for reading ...)
- if (DMEMB_i_s.clken = '1') then
- dmem_sel_r <= dmem_sel_s; -- OR c2dmemb_s.wre; ??
- end if;
+ dmem_sel_r <= dmem_sel_s; -- OR c2dmemb_s.wre; ??
end if;
end process regd_proc;
--
tumbl_xmemb_i_s.int <= '0'; -- No interrupt
-- Enable clken only when available for Tumbl
- tumbl_xmemb_i_s.clken <= not master_tumbl_xmem_lock_s;
+ tumbl_xmemb_i_s.bus_taken <= master_tumbl_xmem_lock_s;
+ tumbl_xmemb_i_s.bus_wait <= '0';
+
-- Bus update
end process;
-- Enable xmem clken only when bus available for Tumbl
- xmemb_i_s.clken <= not delay_access_s;
+ xmemb_i_s.bus_taken <= delay_access_s;
+ xmemb_i_s.bus_wait <= '0';
xmemb_process :process
variable xmemb_addr_v : std_logic_vector(14 downto 0);