hw/lx-rocon_tumbl/lx_rocon_imem.vhd

   1 library ieee;
   2
   3 use ieee.std_logic_1164.all;
   4 use ieee.std_logic_arith.all;
   5 use ieee.std_logic_unsigned.all;
   6 use ieee.numeric_std.all;
   7 use work.mbl_Pkg.all;
   8 use work.lx_rocon_pkg.all;
   9
  10 -- 2 kB instruction memory for Thumbl core
  11 -- To be flashed from the Master CPU
  12
  13 entity lx_rocon_imem is
  14         port
  15         (
  16                 -- Memory wiring for Tumbl
  17                 clk_i : in std_logic;
  18                 cs_i  : in std_logic;
  19                 adr_i : in std_logic_vector(10 downto 2);
  20                 dat_o : out std_logic_vector(31 downto 0);
  21
  22                 -- Memory wiring for Master CPU
  23                 clk_m  : in std_logic;
  24     en_m   : in std_logic;
  25     we_m   : in std_logic_vector(3 downto 0);
  26     addr_m : in std_logic_vector(8 downto 0);
  27     din_m  : in std_logic_vector(31 downto 0);
  28     dout_m : out std_logic_vector(31 downto 0)
  29
  30         );
  31 end lx_rocon_imem;
  32
  33 architecture rtl of lx_rocon_imem is
  34 begin
  35
  36         I_RAMB: xilinx_dualport_bram
  37         generic map
  38         (
  39                 we_width => 4,
  40                 byte_width => 8,
  41                 address_width => 9
  42         )
  43         port map
  44         (
  45                 -- Tumblr port
  46                 clka => clk_i,
  47                 rsta => '0',
  48                 ena => cs_i,
  49                 wea => "0000",
  50                 addra => adr_i(10 downto 2),
  51                 dina => C_32_ZEROS,
  52                 douta => dat_o,
  53
  54                 -- Master CPU port
  55                 clkb => clk_m,
  56                 rstb => '0',
  57                 enb => en_m,
  58                 web => we_m,
  59                 addrb => addr_m,
  60                 dinb => din_m,
  61                 doutb => dout_m
  62         );
  63
  64 end rtl;