]> rtime.felk.cvut.cz Git - fpga/virtex2/uart.git/commit
Connection of HW UART peripheral
authorVladimir Burian <buriavl2@fel.cvut.cz>
Fri, 4 Feb 2011 19:41:16 +0000 (20:41 +0100)
committerVladimir Burian <buriavl2@fel.cvut.cz>
Fri, 4 Feb 2011 19:41:16 +0000 (20:41 +0100)
commit18168561d4ba83c72a2bb46379eed51551045138
treef26dfb36b8de5e2312b8ed6a2a6faf61a64eddcd
parent79ea0ca600c0045d539a955a73513a57b0a0fc85
Connection of HW UART peripheral

Peripherals of SW UART (GPIO and TimerA) were exchanged by HW UART peripheral.
openMSP430_uart.prj
openMSP430_uart.vhd