Software modification to work whit HW UART

[fpga/virtex2/uart.git] / .gitmodules

diff --git a/.gitmodules b/.gitmodules
index 947525606f68c989eb17fa17b8608349ce8d596d..cbe47daa8f864495a8a4e25188297e86dcb525f2 100644 (file)
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,3 +1,9 @@
 [submodule "openmsp430"]
        path = openmsp430
        url = git@rtime.felk.cvut.cz:fpga/openmsp430
+[submodule "quadcount"]
+       path = quadcount
+       url = git@rtime.felk.cvut.cz:fpga/quadcount
+[submodule "uart"]
+       path = uart
+       url = git@rtime.felk.cvut.cz:fpga/uart