4 #define __msp430_have_port3
5 #define __MSP430_HAS_PORT3__
12 //QuadCounter registers
17 //QuadCount IRQ vector
18 #define QCNT_VECTOR 14
29 //Port Output Register 'P1OUT, P2OUT':
30 #define P1OUT_INIT TX //Init Output data of port1
31 #define P2OUT_INIT 0 //Init Output data of port2
32 #define P3OUT_INIT 0 //Init Output data of port3
34 //Port Direction Register 'P1DIR, P2DIR':
35 #define P1DIR_INIT TX //Init of Port1 Data-Direction Reg (Out=1 / Inp=0)
36 #define P2DIR_INIT ~RX //Init of Port2 Data-Direction Reg (Out=1 / Inp=0)
37 #define P3DIR_INIT 0xff //Init of Port3 Data-Direction Reg (Out=1 / Inp=0)
39 //Selection of Port or Module -Function on the Pins 'P1SEL, P2SEL'
40 #define P1SEL_INIT 0 //P1-Modules:
41 #define P2SEL_INIT RX //P2-Modules:
42 #define P3SEL_INIT 0 //P3-Modules:
44 //Interrupt capabilities of P1 and P2
45 #define P1IE_INIT 0 //Interrupt Enable (0=dis 1=enabled)
46 #define P2IE_INIT 0 //Interrupt Enable (0=dis 1=enabled)
47 #define P1IES_INIT 0 //Interrupt Edge Select (0=pos 1=neg)
48 #define P2IES_INIT 0 //Interrupt Edge Select (0=pos 1=neg)
51 #define WDTCTL_INIT WDTPW|WDTHOLD
53 #define BCSCTL1_FLL XT2OFF|DIVA1|RSEL2|RSEL0
55 #define TACTL_FLL TASSEL_2|TACLR
56 #define CCTL2_FLL CM0|CCIS0|CAP
58 #define TACTL_AFTER_FLL TASSEL_2|TACLR|ID_0
60 //#define BAUD 40 //9600 @3MHz div 8
61 //#define BAUD 20 //19200 @3MHz div 8
62 //#define BAUD 20 //9600 @1.5MHz div 8
63 //#define BAUD 140 //9600 @1.5MHz div 8
65 //#define BAUD 2083 //9600 @20.0MHz div 1
66 //#define BAUD 1042 //19200 @20.0MHz div 1
67 //#define BAUD 521 //38400 @20.0MHz div 1
68 //#define BAUD 347 //57600 @20.0MHz div 1
69 //#define BAUD 174 //115200 @20.0MHz div 1
70 //#define BAUD 87 //230400 @20.0MHz div 1
72 #define BAUD 208 //115200 @24.0MHz div 1
74 //Selection of 'Digitally Controlled Oszillator' (desired frquency in HZ, 1..3 MHz)
75 #define DCO_FREQ 1536000 //3072000/2 makes 9600 a bit more precise
77 //Automatic, do not edit
78 #define DCO_FSET (DCO_FREQ/8192) //DCO_FSET = DCO_FREQ / (32768/4)
79 #define DCOCTL_MAX 0xff // Used from FLL to check when Rsel must be changed
80 #define DCOCTL_MIN 0 // Used from FLL to check when Rsel must be changed